Method, apparatus, medium, and computer program for video coding
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- TENCENT AMERICA LLC
- Filing Date
- 2025-08-18
- Publication Date
- 2026-07-29
AI Technical Summary
Existing video encoding technologies face challenges in efficiently reducing redundancy and optimizing intra-prediction modes, particularly with the increasing number of possible directions in video coding techniques, leading to suboptimal compression efficiency.
The proposed solution involves decoding profile information for image slices in a video bitstream, performing intra-prediction, and reconstructing images based on this information, including flags to indicate intra-coding and picture containment, to optimize syntax element processing and improve compression efficiency.
This approach enhances video encoding by reducing redundancy and improving compression efficiency through optimized intra-prediction and syntax element handling, resulting in more effective data representation.
Smart Images

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Abstract
Description
[Technical Field]
[0001] Incorporation by Reference This application claims the benefit of priority to U.S. Patent Application No. 17 / 220,481, entitled "Method and Apparatus for Video Encoding," filed April 1, 2021, which in turn claims the benefit of priority to U.S. Provisional Patent Application No. 63 / 007,187, entitled "Constraints on Syntax Elements for Various Profiles," filed April 8, 2020, and U.S. Provisional Patent Application No. 63 / 029,000, entitled "Group of General Constraint Flags," filed May 22, 2020. The entire disclosures of these earlier applications are incorporated herein by reference in their entirety.
[0002] Technical Field This disclosure describes embodiments generally related to video encoding. [Background technology]
[0003] The background discussion provided herein is intended to generally present the context for the present disclosure. The work of the inventors named in this application, to the extent that their work is described in this background section, and aspects of this description that may not otherwise qualify as prior art at the time of filing, are not admitted, expressly or implicitly, as prior art to the present disclosure.
[0004] Video encoding and decoding can be performed using inter-picture prediction with motion compensation. Uncompressed digital video can contain a series of pictures, each with spatial dimensions of, for example, 1920 x 1080 luminance samples and associated chrominance samples. The series of pictures can have a fixed or variable picture rate (informally known as frame rate), for example, 60 pictures per second or 60 Hz. Uncompressed video has significant bitrate requirements. For example, 1080p60 4:2:0 video (1920 x 1080 luminance sample resolution at a 60 Hz frame rate) with 8 bits per sample requires a bandwidth approaching 1.5 Gbit / s. One hour of such video requires more than 600 Gbytes of storage space.
[0005] One goal of video encoding and decoding can be reducing redundancy in an input video signal through compression. Compression can help reduce the aforementioned bandwidth or storage space requirements, sometimes by more than two orders of magnitude. Both lossless and lossy compression, as well as combinations thereof, can be used. Lossless compression refers to a technique that allows an exact copy of an original signal to be reconstructed from a compressed version of the original signal. When lossy compression is used, the reconstructed signal may not be identical to the original signal, but the distortion between the original and reconstructed signal is small enough to make the reconstructed signal useful for its intended application. For video, lossy compression is widely used. The amount of acceptable distortion depends on the application; for example, users of certain consumer streaming applications may tolerate higher distortion than users of television distribution applications. The achievable compression ratio can reflect that higher tolerable / acceptable distortion can result in a higher compression ratio.
[0006] Video encoders and decoders may utilize techniques from several broad categories, including motion compensation, transform, quantization, and entropy coding.
[0007] Video codec technologies can include a technique known as intra-coding. In intra-coding, sample values are represented without reference to samples or other data from a previously reconstructed reference picture. In some video codecs, a picture is spatially divided into blocks of samples. If all blocks of samples are coded in intra mode, the picture may be an intra-picture. Intra-pictures and their derivatives, such as independent decoder refresh pictures, can be used to reset the decoder state and thus can be used as the first picture in a coded video bitstream and video session, or as a still image. Samples in intra-blocks can be subjected to a transform, and the transform coefficients can be quantized before entropy coding. Intra-prediction can be a technique that minimizes sample values in the pre-transform domain. In some cases, the smaller the DC value and AC coefficients after the transform, the fewer bits required for a given quantization step size to represent the block after entropy coding.
[0008] Traditional intra-coding, e.g., as known from MPEG-2 generation coding techniques, does not use intra-prediction. However, some newer video compression techniques include techniques that attempt to predict intra-prediction from surrounding sample data and / or metadata obtained during the encoding / decoding of blocks of data that are spatially neighboring and preceding in decoding order. Such techniques are hereinafter referred to as "intra-prediction" techniques. Note that, at least in some cases, intra-prediction uses only reference data from the current picture being reconstructed, and not from reference pictures.
[0009] There can be various forms of intra prediction. If two or more such techniques are available for a given video coding technique, the technique used can be coded as an intra prediction mode. In some cases, a mode can have sub-modes and / or parameters, which can be coded separately or included in a mode codeword. Which codeword to use for a given mode / sub-mode / parameter combination can affect the coding efficiency gain through intra prediction, as well as the entropy coding technique used to convert the codeword into a bitstream.
[0010] A mode of intra prediction was introduced in H.264, refined in H.265, and further refined in newer coding techniques such as the Joint Exploration Model (JEM), Versatile Video Coding (VVC), and Benchmark Set (BMS). A predictor block can be formed using neighboring sample values belonging to already available samples. The sample values of the neighboring samples are copied into the predictor block according to a certain direction. A reference to the direction used can be coded in the bitstream or may itself be predicted.
[0011] Referring to FIG. 1A, a subset of nine known predictor directions from the 33 possible predictor directions (corresponding to the 33 angular modes of the 35 intra modes) of H.265 is depicted in the lower right. The point where the arrows converge (101) represents the predicted sample. The arrows represent the direction in which the sample is predicted. For example, arrow (102) indicates that sample (101) is predicted from the sample(s) to the upper right and at an angle of 45 degrees from horizontal. Similarly, arrow (103) indicates that sample (101) is predicted from the sample(s) to the lower left of sample (101), at an angle of 22.5 degrees from horizontal.
[0012] Continuing with FIG. 1A , a square block (104) of 4×4 samples is depicted in the upper left (indicated by a thick dashed line). The square block (104) contains 16 samples, each labeled with “S” and its position in the Y dimension (e.g., row index) and its position in the X dimension (e.g., column index). For example, sample S21 is the second sample (from the top) in the Y dimension and the first sample (from the left) in the X dimension. Similarly, sample S44 is the fourth sample in the block (104) in both the Y and X dimensions. Because the block is 4×4 samples in size, S44 is located in the lower right. Also shown are reference samples that follow a similar numbering scheme. The reference samples are labeled R and their Y position (e.g., row index) and X position (column index) relative to the block (104). In both H.264 and H.265, predicted samples are neighbors of the block being reconstructed, so negative values need not be used.
[0013] Intra-picture prediction works by copying reference sample values from neighboring samples appropriate for the signaled prediction direction. For example, assume that the coded video bitstream includes signaling indicating a prediction direction consistent with arrow (102) for this block. That is, samples are predicted from the predicted sample(s) to the upper right and at a 45-degree angle from horizontal. In that case, samples S41, S32, S23, and S14 are predicted from the same reference sample R05. Sample S44 is then predicted from reference sample R08.
[0014] In some cases, especially when the direction is not divisible by 45 degrees, the values of multiple reference samples can be combined, for example by interpolation, to calculate the reference sample.
[0015] As video coding technology has evolved, the number of possible directions has increased. In H.264 (2003), nine different directions could be represented. This increased to 33 in H.265 (2013), and JEM / VVC / BMS, as of the time of this disclosure, can support up to 65 directions. Experiments are performed to identify the most likely directions, and certain techniques in entropy coding are used to represent those likely directions with a small number of bits while accepting some penalty for less likely directions. Furthermore, the direction itself can sometimes be predicted from nearby directions used in nearby, already decoded blocks.
[0016] Figure 1B shows a schematic diagram (105) depicting 65 intra-prediction directions with JEM to illustrate the increasing number of prediction directions over time.
[0017] The mapping of intra-prediction direction bits in a coded video bitstream to represent direction can vary from one video coding technique to another, ranging from a simple direct mapping of prediction direction to intra-prediction mode, to complex adaptation schemes involving codewords, most-probable modes, and similar techniques. However, in any case, there may be some directions that are statistically less likely to occur in the video content than other directions. Because the goal of video compression is to reduce redundancy, in a well-performing video coding technique, these less likely ways are represented by more bits than the more likely directions.
[0018] Motion compensation can be a lossy compression technique and can refer to a technique used to predict a newly reconstructed picture or portion thereof after blocks of sample data from a previously reconstructed picture or portion thereof (reference picture) are spatially shifted in a direction indicated by a motion vector (MV). In some cases, the reference picture can be the same as the picture currently being reconstructed. MV can have two dimensions, X and Y, or three dimensions, with the third dimension being an indication of the reference picture used (which may indirectly be the temporal dimension).
[0019] In some video compression techniques, the MV applicable to a region of sample data can be predicted from other MVs, e.g., from the MV associated with another region of sample data that is spatially adjacent to the region being reconstructed and precedes that MV in decoding order. Doing so can significantly reduce the amount of data required to encode the MV, thereby removing redundancy and increasing compression. MV prediction can work in a directional manner because, for example, when encoding an input video signal derived from a camera (known as natural video), there is a statistical likelihood that regions larger than the region to which a single MV is applicable will move in a similar direction and thus, in some cases, can be predicted using similar MVs derived from MVs in nearby regions. As a result, the MV found for a given region will be similar or identical to the MV predicted from the surrounding MVs, and, after entropy coding, can be represented with fewer bits than would be used to encode the MV directly. In some cases, MV prediction can be an example of lossless compression of a signal (i.e., MV) derived from the original signal (i.e., sample stream). In other cases, the MV prediction itself may be lossy, for example due to rounding errors in computing the predictor from several surrounding MVs.
[0020] H.265 / HEVC (ITU-T Rec. H.265, "High Efficiency Video Coding," December 2016) describes various MV prediction mechanisms. Among the many MV prediction mechanisms provided by H.265, a technique hereafter referred to as "spatial merge" is described herein.
[0021] 1C, the current block (101) may contain samples that the encoder found during the motion search process to be predictable from a spatially shifted previous block of the same size. Instead of directly encoding its MV, the MV can be derived from metadata associated with one or more reference pictures, for example, from the most recent reference picture (in decoding order) using the MV associated with any of five surrounding samples, denoted A0, A1, and B0, B1, B2 (112 to 116, respectively). In H.265, MV prediction can use predictors from the same reference picture as neighboring blocks. Summary of the Invention [Means for solving the problem]
[0022] Aspects of the present disclosure provide an apparatus for video encoding / decoding. The apparatus includes a processing circuit that decodes profile information for a plurality of image slices in prediction information for an encoded video bitstream. The profile information includes profile identification information for a profile for which each of the image slices in the encoded video bitstream is intra-coded. The processing circuit performs intra prediction on each image slice in the encoded video bitstream. The processing circuit reconstructs at least one image picture based on the intra prediction.
[0023] In one embodiment, the profile information includes a first flag indicating whether each image slice in the coded video bitstream is intra-coded, and a second flag indicating whether each image slice in the coded video bitstream is contained in a single picture.
[0024] In one embodiment, the first flag is decoded after the second flag, and indicates that each image slice in the coded video bitstream is intra-coded based on the second flag indicating that each image slice in the coded video bitstream is contained in one picture.
[0025] In an embodiment, the first flag indicates that each image slice in the coded video bitstream is intra-coded based on a profile identification of a profile for which each image slice in the coded video bitstream is intra-coded.
[0026] In one embodiment, the second flag indicates that each image slice in the coded video bitstream is contained in one picture, based on the profile being a still picture profile in which only one picture is contained in the coded video bitstream.
[0027] In one embodiment, non-intra-related syntax elements are not included in the prediction information based on one of: (i) a first flag indicating that each image slice in the coded video bitstream is intra-coded; and (ii) a second flag indicating that each image slice in the coded video bitstream is included in one picture.
[0028] In some embodiments, the prediction information includes a third flag indicating whether each image slice in the coded video bitstream is intra-coded and contained in one picture, and the third flag is not included in the profile information.
[0029] In one embodiment, the third flag indicates that each image slice in the coded video bitstream is intra-coded and contained in one picture, based on the second flag indicating that each image slice in the coded video bitstream is contained in one picture.
[0030] Aspects of the present disclosure provide a method for video encoding / decoding, in which profile information of a plurality of image slices in prediction information of an encoded video bitstream is decoded, the profile information including profile identification information of a profile for which each of the image slices in the encoded video bitstream is intra-coded, intra-prediction is performed for each image slice in the encoded video bitstream, and at least one image picture is reconstructed based on the intra-prediction.
[0031] Aspects of the present disclosure provide an apparatus for video encoding / decoding. The apparatus includes a processing circuit that decodes profile information in prediction information of an encoded video bitstream. The profile information includes a plurality of groups of syntax elements and indicates a profile for the encoded video bitstream. The processing circuit determines at least one of the plurality of groups of syntax elements based on the profile indicated in the profile information. The processing circuit decodes syntax elements included in the prediction information based on the determined at least one of the plurality of groups of syntax elements. The processing circuit reconstructs at least one picture based on the decoded syntax elements included in the prediction information.
[0032] In an embodiment, the determined order of at least one of the plurality of groups of syntax elements for the profile follows a predetermined order of the plurality of groups of syntax elements in the profile information.
[0033] In one embodiment, byte alignment is checked for each of the plurality of groups of syntax elements in the profile information.
[0034] Aspects of the present disclosure provide a method for video encoding / decoding. The method includes decoding profile information in prediction information of an encoded video bitstream. The profile information includes a plurality of groups of syntax elements and indicates a profile for the encoded video bitstream. At least one of the plurality of groups of syntax elements is determined based on the profile indicated in the profile information. A syntax element included in the prediction information is decoded based on the determined at least one of the plurality of groups of syntax elements. At least one picture is reconstructed based on the decoded syntax element in the prediction information.
[0035] Aspects of the present disclosure also provide a non-transitory computer-readable medium storing instructions that, when executed by a computer for video decoding, cause the computer to perform any one or combination of the above-described methods for video decoding. [Brief explanation of the drawings]
[0036] Further features, nature and various advantages of the disclosed subject matter will become more apparent from the following detailed description and accompanying drawings.
[0037] [Figure 1A] FIG. 2 is a schematic diagram of an example subset of intra-prediction modes.
[0038] [Figure 1B] FIG. 1 is an illustration of an exemplary intra-prediction direction.
[0039] [Figure 1C] FIG. 1 is a schematic diagram of a current block and its surrounding spatial merge candidates in one example.
[0040] [Figure 2] FIG. 1 is a schematic diagram of a simplified block diagram of a communication system according to an embodiment.
[0041] [Figure 3] FIG. 1 is a schematic diagram of a simplified block diagram of a communication system according to an embodiment.
[0042] [Figure 4] FIG. 2 is a schematic diagram of a simplified block diagram of a decoder according to an embodiment.
[0043] [Figure 5] FIG. 2 is a schematic diagram of a simplified block diagram of an encoder according to an embodiment.
[0044] [Figure 6] 4 shows a block diagram of an encoder according to another embodiment;
[0045] [Figure 7] 4 shows a block diagram of a decoder according to another embodiment;
[0046] [Figure 8] 1 illustrates an exemplary flowchart according to an embodiment.
[0047] [Figure 9] 1 illustrates an exemplary flowchart according to an embodiment.
[0048] [Figure 10] 1 is a schematic diagram of a computer system according to an embodiment. DETAILED DESCRIPTION OF THE INVENTION
[0049] I. Video Decoder and Encoder Systems
[0050] Figure 2 illustrates a simplified block diagram of a communication system (200) according to an embodiment of the present disclosure. The communication system (200) includes multiple terminal devices that can communicate with each other, for example, via a network (250). For example, the communication system (200) includes a first pair of terminal devices (210) and (220) interconnected via the network (250). In the example of Figure 2, the first pair of terminal devices (210) and (220) perform unidirectional transmission of data. For example, the terminal device (210) may encode video data (e.g., a stream of video pictures captured by the terminal device (210)) for transmission to the other terminal device (220) via the network (250). The encoded video data can be transmitted in the form of one or more coded video bitstreams. The terminal device 220 may receive encoded video data from the network 250, decode the encoded video data to restore a video picture, and display the video picture according to the restored video data. One-way data transmission may be common in media service applications, etc.
[0051] In another example, the communication system (200) includes a second pair of terminal devices (230) and (240) that perform bidirectional transmission of encoded video data, such as may occur during a video conference. For the bidirectional transmission of data, in one example, each of the terminal devices (230) and (240) may encode video data (e.g., a stream of video pictures captured by the terminal device) for transmission to the other of the terminal devices (230) and (240) over the network (250). Each of the terminal devices (230) and (240) may receive the encoded video data transmitted by the other of the terminal devices (230) and (240), decode the encoded video data to recover the video pictures, and display the video pictures on an accessible display device in accordance with the recovered video data.
[0052] In the example of FIG. 2 , terminal devices 210, 220, 230, and 240 may be depicted as a server, a personal computer, and a smartphone, although the principles of the present disclosure may not be limited thereto. Embodiments of the present disclosure find application in laptop computers, tablet computers, media players, and / or dedicated videoconferencing equipment. Network 250 represents any number of networks that convey encoded video data between terminal devices 210, 220, 230, and 240, including, for example, wired and / or wireless communications networks. Communications network 250 may exchange data over circuit-switched and / or packet-switched channels. Exemplary networks include telecommunications networks, local area networks, wide area networks, and / or the Internet. For purposes of the present discussion, the architecture and topology of network 250 may not be important to the operation of the present disclosure, unless otherwise described below.
[0053] 3 illustrates the arrangement of a video encoder and a video decoder in a streaming environment as an example of an application for the disclosed subject matter. The disclosed subject matter may be equally applicable to other video-enabled applications, including, for example, video conferencing, digital TV, storage of compressed video on digital media including CDs, DVDs, memory sticks, etc.
[0054] The streaming system may include a video source (301), such as a digital camera, and may also include a capture subsystem (313) that generates, for example, a stream of uncompressed video pictures (302). In one example, the stream of video pictures (302) includes samples captured by the digital camera. The stream of video pictures (302), depicted as a bold line to emphasize its high data volume compared to the encoded video data (304) (or coded video bitstream), may be processed by an electronic device (320) that includes a video encoder (303) coupled to the video source (301). The video encoder (303) may include hardware, software, or a combination thereof to enable or implement aspects of the disclosed subject matter, as described in more detail below. The encoded video data (304) (or encoded video bitstream (304)), depicted as a thin line to emphasize its lower data volume compared to the stream of video pictures (302), can be stored on a streaming server (305) for future use. One or more streaming client subsystems, such as the client subsystems (306) and (308) of FIG. 3, can access the streaming server (305) to retrieve copies (307) and (309) of the encoded video data (304). The client subsystem (306) can include a video decoder (310), for example, within the electronic device (330). The video decoder (310) decodes the incoming copy of the encoded video data (307) and generates an outgoing stream of video pictures (311) that can be rendered on a display (312) (e.g., a display screen) or other rendering device (not shown). In some streaming systems, the encoded video data (304), (307), and (309) (e.g., video bitstream) may be encoded according to some video coding / compression standard.Examples of these standards include ITU-T Recommendation H.265. In one example, a video coding standard under development is informally known as VVC. The disclosed subject matter may be used in the context of VVC.
[0055] It should be noted that electronic devices 320 and 330 may include other components (not shown). For example, electronic device 320 may include a video decoder (not shown), and electronic device 330 may also include a video encoder (not shown).
[0056] 4 shows a block diagram of a video decoder (410) according to one embodiment of the present disclosure. The video decoder (410) can be included in an electronic device (430). The electronic device (430) can include a receiver (431) (e.g., a receiving circuit). The video decoder (410) can be used in place of the video decoder (310) in the example of FIG. 3.
[0057] The receiver (431) may receive one or more coded video sequences to be decoded by the video decoder (410); in the same or another embodiment, one coded video sequence at a time, with the decoding of each coded video sequence being independent of the other coded video sequences. The coded video sequences may be received from a channel (401), which may be a hardware or software link to a storage device that stores the encoded video data. The receiver (431) may also receive the encoded video data along with other data, such as coded audio data and / or auxiliary data streams, which may be transferred to respective usage entities (not shown). The receiver (431) may separate the coded video sequences from other data. To combat network jitter, a buffer memory (415) may be coupled between the receiver (431) and the entropy decoder / parser (420) (hereinafter referred to as the "parser"). In some applications, the buffer memory (415) is part of the video decoder (410). In other applications, it may be external to the video decoder (410) (not shown). In still other applications, there may be a buffer memory (not shown) external to the video decoder (410), for example, to combat network jitter, and there may be another buffer memory (415) internal to the video decoder (410), for example, to handle playback timing. If the receiver (431) is receiving data from a storage / forwarding device with sufficient bandwidth and controllability or from an isochronous network, the buffer memory (415) may not be required or may be small. For use with best-effort packet networks such as the Internet, the buffer memory (415) may be required, may be relatively large, may advantageously be adaptively sized, and may be implemented, at least in part, in an operating system or similar element (not shown) external to the video decoder (410).
[0058] The video decoder (410) may include a parser (420) for reconstructing symbols (421) from the coded video sequence. These symbol categories include information used to manage the operation of the video decoder (410) and, potentially, information for controlling a rendering device, such as a render device (412) (e.g., a display screen). The render device may be coupled to the electronic device (430) rather than being an integral part of the electronic device (430), as shown in FIG. 4. Control information for the rendering device(s) may be in the form of a Supplementary Enhancement Information (SEI) message or a Video Usability Information (VUI) parameter set fragment (not shown). The parser (420) may parse / entropy decode the received coded video sequence. The coding of the coded video sequence may follow a video coding technique or standard and may follow various principles, including variable-length coding, Huffman coding, arithmetic coding with or without context sensitivity, etc. The parser (420) can extract from the coded video sequence a set of subgroup parameters for at least one of the subgroups of pixels in the video decoder based on at least one parameter corresponding to the group. The subgroups can include groups of pictures (GOPs), pictures, tiles, slices, macroblocks, coding units (CUs), blocks, transform units (TUs), prediction units (PUs), etc. The parser (420) can also extract information from the coded video sequence, such as transform coefficients, quantizer parameter values, and MVs.
[0059] The parser (420) performs an entropy decoding / parsing operation on the video sequence received from the buffer memory (415), thereby generating symbols (421).
[0060] The reconstruction of the symbols (421) can involve several different units, depending on the type of coded video picture or portions thereof (e.g., inter and intra pictures, inter and intra blocks) and other factors. Which units are involved and how can be controlled by subgroup control information parsed by the parser (420) from the coded video sequence. The flow of such subgroup control information between the parser (420) and the following units is not depicted for clarity.
[0061] In addition to the functional blocks already mentioned, the video decoder (410) can be conceptually divided into several functional units, as described below. In a practical implementation operating within commercial constraints, many of these units will interact closely with each other and may be at least partially integrated with each other. However, for purposes of describing the disclosed subject matter, the following conceptual subdivision into functional units is appropriate.
[0062] The first unit is the scaler / inverse transform unit (451). The scaler / inverse transform unit (451) receives quantized transform coefficients and control information as symbol(s) (421) from the parser (420). The control information includes which transform to use, block size, quantization factor, quantization scaling matrix, etc. The scaler / inverse transform unit (451) can output blocks containing sample values that can be input to the aggregator (455).
[0063] In some cases, the output samples of the scaler / inverse transform (451) may relate to intra-coded blocks, i.e., blocks that do not use prediction information from a previously reconstructed picture but can use prediction information from a previously reconstructed portion of the current picture. Such prediction information may be provided by an intra-picture prediction unit (452). In some cases, the intra-picture prediction unit (452) generates a block of the same size and shape as the block being reconstructed using surrounding, already reconstructed information taken from a current picture buffer (458). The current picture buffer (458), for example, buffers a partially reconstructed and / or fully reconstructed current picture. The aggregator (455), in some cases, adds, on a sample-by-sample basis, the prediction information generated by the intra-prediction unit (452) to the output sample information provided by the scaler / inverse transform unit (451).
[0064] In other cases, the output samples of the scaler / inverse transform unit (451) may relate to an inter-coded, potentially motion-compensated, block. In such cases, the motion compensation prediction unit (453) may access a reference picture memory (457) to retrieve samples used for prediction. After motion-compensating the retrieved samples according to the symbols (421) for the block, these samples may be added by an aggregator (455) to the output of the scaler / inverse transform unit (in this case, referred to as residual samples or residual signals) to generate output sample information. The addresses in the reference picture memory (457) from which the motion compensation unit (453) retrieves prediction samples may be controlled by MVs available to the motion compensation unit (453) in the form of symbols (421). The symbols may have, for example, X, Y, and reference picture components. Motion compensation may include interpolation of sample values retrieved from the reference picture memory (457) when subsample-accurate MVs are used, MV prediction mechanisms, and the like.
[0065] The output samples of the aggregator (455) can be subjected to various loop filtering techniques in a loop filter unit (456). Video compression techniques can include in-loop filtering techniques that are controlled by parameters contained in the coded video sequence (also called the coded video bitstream) and made available to the loop filter unit (456) as symbols (421) from the parser (420), but can also be responsive to meta-information obtained during decoding of previous portions (in decoding order) of the coded picture or coded video sequence, as well as to previously reconstructed loop-filtered sample values.
[0066] The output of the loop filter unit (456) can be a sample stream, which can be output to a render device (412) or stored in a reference picture memory (457) for use in future inter-picture prediction.
[0067] Once a coded picture is fully reconstructed, it can be used as a reference picture for future predictions. For example, once the coded picture corresponding to the current picture is fully reconstructed and the coded picture is identified as a reference picture (e.g., by the parser (420)), the current picture buffer (458) can become part of the reference picture memory (457), and a fresh current picture buffer can be reallocated before starting the reconstruction of the subsequent coded picture.
[0068] The video decoder (410) can perform decoding operations according to a predetermined video compression technique in a standard, such as ITU-T Recommendation H.265. A coded video sequence can conform to the syntax prescribed by the video compression technique or standard being used, in the sense that the coded video sequence follows the syntax of the video compression technique or standard and the profile documented in the video compression technique or standard. Specifically, a profile can select certain tools from all tools available in the video compression technique or standard as those available exclusively for use under that profile. Compliance may also require that the complexity of the coded video sequence be within a range defined by the level of the video compression technique or standard. In some cases, the level constrains the maximum picture size, maximum frame rate, maximum reconstruction sample rate (e.g., measured in megasamples per second), maximum reference picture size, etc. The limits set by the level can be further constrained through a hypothetical reference decoder (HRD) specification and metadata for HRD buffer management, which are sometimes signaled in the coded video sequence.
[0069] In some embodiments, the receiver (431) may receive additional (redundant) data along with the encoded video. The additional data may be included as part of the encoded video sequence(s). The additional data may be used by the video decoder (410) to properly decode the data and / or to more accurately reconstruct the original video data. The additional data may be in the form of, for example, temporal, spatial, or signal-to-noise ratio (SNR) improvement layers, redundant slices, redundant pictures, forward error correction codes, etc.
[0070] 5 shows a block diagram of a video encoder (503) according to one embodiment of the present disclosure. The video encoder (503) is included in an electronic device (520). The electronic device (520) includes a transmitter (540) (e.g., a transmitting circuit). The video encoder (503) can be used in place of the video encoder (303) in the example of FIG. 3.
[0071] The video encoder (503) can receive video samples from a video source (501) (which is not part of the electronic device (520) in the example of FIG. 5) that can capture video images to be encoded by the video encoder (503). In another example, the video source (501) is part of the electronic device (520).
[0072] The video source (501) can provide a source video sequence to be encoded by the video encoder (503) in the form of a digital video sample stream, which can be of any suitable bit depth (e.g., 8-bit, 10-bit, 12-bit, ...), any color space (e.g., BT.601 YCrCB, RGB, ...), and any suitable sampling structure (e.g., YCrCb 4:2:0, YCrCb 4:4:4). In a media service system, the video source (501) can be a storage device storing pre-prepared video. In a video conferencing system, the video source (501) can be a camera that locally captures image information as a video sequence. The video data can be provided as multiple individual pictures that, when viewed in sequence, impart motion. The pictures themselves can be organized as a spatial array of pixels, each of which can contain one or more samples, depending on the sampling structure, color space, etc., in use. Those skilled in the art can readily understand the relationship between pixels and samples. The following description focuses on samples.
[0073] According to one embodiment, the video encoder (503) can encode and compress pictures of a source video sequence into a coded video sequence (543) in real time or under any other time constraint required by the application. Enforcing an appropriate coding rate is one function of the controller (550). In some embodiments, the controller (550) controls and is operatively coupled to other functional units, such as those described below. Such coupling is not depicted for clarity. Parameters set by the controller (550) can include parameters related to rate control (picture skip, quantizer, lambda value for rate-distortion optimization techniques, etc.), picture size, group of pictures (GOP) layout, maximum MV allowed reference region, etc. The controller (550) can be configured to have other suitable functions for the video encoder (503) optimized for certain system designs.
[0074] In some embodiments, the video encoder (503) is configured to operate in an encoding loop. As a simplistic explanation, in one example, the encoding loop can include a source encoder (530) (e.g., responsible for generating symbols, such as a symbol stream, based on an input picture to be encoded and a reference picture(s)) and a (local) decoder (533) embedded in the video encoder (503). The decoder (533) reconstructs the symbols to generate sample data in a manner similar to that which a (remote) decoder would also generate (in the video compression techniques considered in the disclosed subject matter, any compression between the symbols and the encoded video bitstream is lossless). The reconstructed sample stream (sample data) is input to a reference picture memory (534). Because decoding of the symbol stream yields bit-accurate results regardless of the decoder location (local or remote), the contents of the reference picture memory (534) are also bit-accurate between the local and remote encoders. In other words, the predictor in the encoder "sees" the exact same sample values as the decoder "sees" when using the prediction during decoding. This fundamental principle of reference picture synchrony (and the resulting drift when synchrony cannot be maintained, e.g., due to channel errors) is also used in several related technologies.
[0075] The operation of the "local" decoder (533) may be the same as the operation of the "remote" decoder, e.g., the video decoder (410), already described in detail above in connection with Figure 4. However, referring also briefly to Figure 4, because symbols are available and the encoding / decoding of the symbols into a coded video sequence by the entropy coder (545) and parser (420) may be lossless, the entropy decoding portion of the video decoder (410), including the buffer memory (415) and parser (420), may not be fully implemented in the local decoder (533).
[0076] An observation that can be made at this point is that any decoder technology, with the exception of parsing / entropy decoding, that exists in the decoder must exist in substantially the same functional form in the corresponding encoder. For this reason, the disclosed subject matter focuses on decoder operation. The description of the encoder technology can be abbreviated, since it is the inverse of the decoder technology, which is described generically. Only in certain areas is more detailed explanation necessary, and is provided below.
[0077] In operation, in some examples, the source encoder (530) may perform motion-compensated predictive encoding, which predictively encodes an input picture with reference to one or more previously encoded pictures from a video sequence, designated as “reference pictures.” In this manner, the encoding engine (532) encodes differences between pixel blocks of the input picture and pixel blocks of reference picture(s) that may be selected as predictive references for the input picture.
[0078] The local video decoder (533) can decode the coded video data of pictures that may be designated as reference pictures based on the symbols generated by the source encoder (530). The operation of the coding engine (532) can advantageously be a lossy process. When the coded video data is decoded by a video decoder (not shown in FIG. 5), the reconstructed video sequence may typically be a copy of the source video sequence with some errors. The local video decoder (533) can replicate the decoding process that may be performed on the reference pictures by the video decoder and store the reconstructed reference pictures in a reference picture cache (534). In this way, the video encoder (503) can locally store copies of reconstructed reference pictures that have common content (barring transmission errors) as reconstructed reference pictures that would be obtained by a far-end video decoder.
[0079] The predictor (535) can perform a prediction search for the coding engine (532). That is, for a new picture to be coded, the predictor (535) can search the reference picture memory (534) for sample data (as candidate reference pixel blocks) or certain metadata, such as reference picture MVs, block shapes, etc., that can serve as suitable prediction references for the new picture. The predictor (535) can operate on a sample block-by-pixel block basis to find suitable prediction references. In some cases, as determined by the search results obtained by the predictor (535), the input picture can have prediction references drawn from multiple reference pictures stored in the reference picture memory (534).
[0080] The controller (550) may manage the encoding operations of the source encoder (530), including, for example, setting the parameters and subgroup parameters used to encode the video data.
[0081] The output of all the above functional units can be subjected to entropy coding in an entropy coder (545), which converts the symbols produced by the various functional units into a coded video sequence by losslessly compressing the symbols according to techniques such as Huffman coding, variable length coding, arithmetic coding, etc.
[0082] The transmitter (540) can buffer the coded video sequence produced by the entropy coder (545) and prepare it for transmission over a communication channel (560), which can be a hardware or software link to a storage device that stores the coded video data. The transmitter (540) can merge the coded video data from the video coder (530) with other data to be transmitted, such as coded audio data and / or auxiliary data streams (sources not shown).
[0083] The controller (550) may manage the operation of the video encoder (503). During encoding, the controller (550) may assign a coding picture type to each coded picture. The coding picture type may affect the coding technique that may be applied to each picture. For example, pictures may often be assigned as one of the following picture types:
[0084] An intra picture (I picture) may be one that can be coded and decoded without using other pictures in the sequence as a source of prediction. Some video codecs allow different types of intra pictures, including, for example, Independent Decoder Refresh ("IDR") pictures. Those skilled in the art will recognize these variations of I pictures and their respective uses and characteristics.
[0085] A predicted picture (P picture) may be one that can be coded and decoded using intra prediction or inter prediction, which uses at most one MV and reference index to predict the sample values of each block.
[0086] Bidirectionally predicted pictures (B pictures) may be coded and decoded using intra- or inter-prediction, which uses up to two MVs and reference indices to predict the sample values of each block. Similarly, multi-predictive pictures can use more than two reference pictures and associated metadata for the reconstruction of a single block.
[0087] A source picture is typically spatially divided into multiple sample blocks (e.g., blocks of 4x4, 8x8, 4x8, or 16x16 samples each) and coded block by block. Blocks may be predictively coded with reference to other (already coded) blocks, as determined by the coding assignment applied to each picture of the block. For example, blocks of an I picture may be non-predictively coded or predictively coded with reference to previously coded blocks of the same picture (spatial prediction or intra-prediction). Pixel blocks of a P picture may be predictively coded via spatial prediction or temporal prediction with reference to one previously coded reference picture. Blocks of a B picture may be predictively coded via spatial prediction or temporal prediction with reference to one or two previously coded reference pictures.
[0088] The video encoder (503) may perform encoding operations according to a predetermined video encoding technique or standard, such as ITU-T Recommendation H.265. In its operations, the video encoder (503) may perform various compression operations, including predictive encoding operations that exploit temporal and spatial redundancies in the input video sequence. Thus, the encoded video data may conform to a syntax specified by the video encoding technique or standard used.
[0089] In some embodiments, the transmitter (540) may transmit additional data along with the encoded video. The source encoder (530) may include such data as part of the coded video sequence. The additional data may include temporal, spatial, or SNR enhancement layers, other forms of redundant data such as redundant pictures and slices, SEI messages, VUI parameter set fragments, etc.
[0090] Video may be captured as multiple source pictures (video pictures) in a temporal sequence. Intra-picture prediction (often abbreviated as intra-prediction) exploits spatial correlation within a given picture, while inter-picture prediction exploits correlation (temporal or otherwise) between pictures. In one example, a particular picture to be encoded / decoded, called the current picture, is divided into blocks. If a block in the current picture is similar to a reference block in a previously coded and still buffered reference picture in the video, that block in the current picture can be coded by a vector called a vector vector (MV). The MV points to a reference block in the reference picture and may have a third dimension that identifies the reference picture if multiple reference pictures are used.
[0091] In some embodiments, bi-prediction techniques can be used in inter-picture prediction. Bi-prediction techniques use two reference pictures, such as a first reference picture and a second reference picture, both of which precede the current picture in video decoding order (but may be past and future, respectively, in display order). A block in the current picture can be coded by a first MV that points to a first reference block in the first reference picture and a second MV that points to a second reference block in the second reference picture. A block can be predicted by a combination of the first and second reference blocks.
[0092] Furthermore, to improve coding efficiency, merge mode techniques can be used in inter-picture prediction.
[0093] According to some embodiments of the present disclosure, prediction, such as inter-picture prediction and intra-picture prediction, is performed in units of blocks. For example, according to the HEVC standard, pictures in a sequence of video pictures are divided into coding tree units (CTUs) for compression, and the CTUs in a picture have the same size, such as 64x64 pixels, 32x32 pixels, or 16x16 pixels. Generally, a CTU includes three coding tree blocks (CTBs), one luma CTB and two chroma CTBs. Each CTU can be recursively quadtree-decomposed into one or more coding units (CUs). For example, a 64x64 pixel CTU can be divided into one CU of 64x64 pixels, four CUs of 32x32 pixels, or 16 CUs of 16x16 pixels. In one example, each CU is analyzed to determine a prediction type for that CU, such as an inter prediction type or an intra prediction type. A CU is divided into one or more prediction units (PUs) depending on temporal and / or spatial predictability. Generally, each PU includes a luma prediction block (PB) and two chroma PBs. In an embodiment, prediction operations in encoding / decoding are performed in units of prediction blocks. Taking a luma prediction block as an example of a prediction block, the prediction block includes a matrix of values (e.g., luma values) for pixels, such as 8x8 pixels, 16x16 pixels, 8x16 pixels, 16x8 pixels, etc.
[0094] 6 shows a diagram of a video encoder (603) according to another embodiment of the present disclosure. The video encoder (603) is configured to receive a processed block of sample values (e.g., a predictive block) in a current video picture in a sequence of video pictures and encode the processed block into a coded picture that is part of a coded video sequence. In one example, the video encoder (603) is used in place of the video encoder (303) in the example of FIG. 3.
[0095] In an HEVC example, the video encoder (603) receives a matrix of sample values for a processing block, such as a prediction block, such as 8x8 samples. The video encoder (603) determines whether the processing block is best coded using intra-mode, inter-mode, or bi-prediction mode, e.g., using rate-distortion optimization. If the processing block is coded in intra-mode, the video encoder (603) may use intra-prediction techniques to encode the processing block into a coded picture; if the processing block is coded in inter-mode or bi-prediction mode, the video encoder (603) may use inter-prediction or bi-prediction techniques, respectively, to encode the processing block into a coded picture. In certain video coding techniques, merge mode may be an inter-picture prediction submode in which MVs are derived from one or more MV predictors but without the benefit of coded MV components outside the predictors. In certain other video coding techniques, there may be MV components applicable to the current block. In one example, the video encoder (603) includes other components, such as a mode decision module (not shown) for determining the mode of the processing block.
[0096] In the example of Figure 6, the video encoder (603) includes an inter-encoder (630), an intra-encoder (622), a residual calculator (623), a switch (626), a residual encoder (624), a general controller (621), and an entropy coder (625), coupled together as shown in Figure 6.
[0097] The inter-encoder (630) is configured to receive samples of a current block (e.g., a processing block), compare the block with one or more reference blocks in a reference picture (e.g., blocks in a previous picture and a subsequent picture), generate inter-prediction information (e.g., a description of redundant information due to inter-encoding techniques, MV, merge mode information), and calculate an inter-prediction result (e.g., a prediction block) based on the inter-prediction information using any suitable technique. In some examples, the reference picture is a decoded reference picture that is decoded based on encoded video information.
[0098] The intra encoder (622) is configured to receive samples of a current block (e.g., a processing block), optionally compare the block with previously coded blocks in the same picture, generate transformed and quantized coefficients, and optionally generate intra prediction information (e.g., intra prediction direction information according to one or more intra encoding techniques). In one example, the intra encoder (622) also calculates an intra prediction result (e.g., a prediction block) based on the intra prediction information and reference blocks in the same picture.
[0099] The general controller (621) is configured to determine general control data and control other components of the video encoder (603) based on the general control data. In one example, the general controller (621) determines the mode of the block and provides a control signal to the switch (626) based on the mode. For example, if the mode is intra mode, the general controller (621) controls the switch (626) to select the intra mode result for use by the residual calculator (623) and controls the entropy encoder (625) to select intra prediction information and include the intra prediction information in the bitstream; if the mode is inter mode, the general controller (621) controls the switch (626) to select the inter prediction result for use by the residual calculator (623) and controls the entropy encoder (625) to select inter prediction information and include the inter prediction information in the bitstream.
[0100] The residual calculator (623) is configured to calculate the difference (residual data) between the received block and a prediction result selected from the intra-encoder (622) or the inter-encoder (630). The residual encoder (624) is configured to encode the residual data to generate transform coefficients based on the residual data. In one example, the residual encoder (624) is configured to transform the residual data from the spatial domain to the frequency domain to generate transform coefficients. The transform coefficients are then subjected to a quantization process to obtain quantized transform coefficients. In various embodiments, the video encoder (603) also includes a residual decoder (628). The residual decoder (628) is configured to perform an inverse transform to generate decoded residual data. The decoded residual data can be suitably used by the intra-encoder (622) and the inter-encoder (630). For example, the inter-encoder (630) can generate decoded blocks based on the decoded residual data and inter-prediction information, and the intra-encoder (622) can generate decoded blocks based on the decoded residual data and intra-prediction information. The decoded blocks are suitably processed to generate decoded pictures, which can be buffered in memory circuitry (not shown) and, in some examples, used as reference pictures.
[0101] The entropy encoder (625) is configured to format a bitstream to include the encoded blocks. The entropy encoder (625) is configured to include various information in accordance with a suitable standard, such as HEVC. In one example, the entropy encoder (625) is configured to include general control data, selected prediction information (e.g., intra-prediction information or inter-prediction information), residual information, and other suitable information in the bitstream. Note that, according to the disclosed subject matter, when encoding a block in a merged sub-mode of either an inter-mode or a bi-prediction mode, the residual information is not present.
[0102] 7 shows a diagram of a video decoder (710) according to another embodiment of the present disclosure. The video decoder (710) is configured to receive coded pictures that are part of a coded video sequence and decode the coded pictures to generate reconstructed pictures. In one example, the video decoder (710) is used in place of the video decoder (310) in the example of FIG. 3.
[0103] In the example of Figure 7, the video decoder (710) includes an entropy decoder (771), an inter decoder (780), a residual decoder (773), a reconstruction module (774), and an intra decoder (772) coupled together as shown in Figure 7.
[0104] The entropy decoder (771) can be configured to reconstruct, from a coded picture, certain symbols representing the syntax elements of which the coded picture is composed. Such symbols can include, for example, the mode in which the block is coded (e.g., intra mode, inter mode, bi-prediction mode, merged submode, or the latter two in another submode), prediction information (e.g., intra-prediction information or inter-prediction information), which can identify certain samples or metadata used for prediction by the intra-decoder (772) or inter-decoder (780), respectively, residual information in the form of quantized transform coefficients, etc. In one example, if the prediction mode is an inter- or bi-prediction mode, the inter-prediction information is provided to the inter-decoder (780); if the prediction type is an intra-prediction type, the intra-prediction information is provided to the intra-decoder (772). The residual information can undergo inverse quantization and be provided to the residual decoder (773).
[0105] The inter decoder (780) is configured to receive inter prediction information and generate inter prediction results based on the inter prediction information.
[0106] The intra decoder (772) is configured to receive intra prediction information and generate a prediction result based on the intra prediction information.
[0107] The residual decoder (773) is configured to perform inverse quantization to extract dequantized transform coefficients, and process the dequantized transform coefficients to transform the residual from the frequency domain to the spatial domain. The residual decoder (773) may also require certain control information (including quantizer parameters (QP)), which may be provided by the entropy decoder (771) (this is only low-volume control information, so the data path is not depicted).
[0108] The reconstruction module (774) is configured to combine, in the spatial domain, the residual output by the residual decoder (773) and the prediction result (output by the intra- or inter-prediction module, as the case may be) to form a reconstructed block, which may be part of a reconstructed picture, which may be part of a reconstructed video. It is noted that other suitable operations, such as deblocking operations, may be performed to improve visual quality.
[0109] It should be noted that the video encoders (303), (503), (603) and video decoders (310), (410), (710) may be implemented using any suitable techniques. In one embodiment, the video encoders (303), (503), (603) and video decoders (310), (410), (710) may be implemented using one or more integrated circuits. In another embodiment, the video encoders (303), (503), (603) and video decoders (310), (410), (710) may be implemented using one or more processors executing software instructions.
[0110] II. Example High-Level Syntax Elements
[0111] Table 1 shows exemplary sequence parameter set (SPS) syntax elements in some relevant examples, such as VVC. Both intra-coding and inter-coding related syntax elements are included in Table 1. Note that for intra profiles that contain only intra slices, inter-coding syntax elements may be present in the SPS, but are not used in the intra profile decoding process. This situation also applies to any still picture profile. That is, for still picture profiles that contain only intra slice(s), inter-coding syntax elements are not used in the still profile decoding process. Table 1. Sequence Parameter Set raw byte sequence payload (RBSP) syntax [Table 1] JPEG2025161904000003.jpg226163 JPEG2025161904000004.jpg226165 JPEG2025161904000005.jpg227163 JPEG2025161904000006.jpg226164 JPEG2025161904000007.jpg131163
[0112] Table 2 shows exemplary Picture Parameter Set (PPS) syntax elements in some relevant examples, such as VVC. Both intra-coding and inter-coding related syntax elements are included in Table 2. Note that for intra profiles that contain only intra slices, inter-coding syntax elements may be present in the PPS, but are not used in the intra profile decoding process. This situation also applies to any still picture profile. That is, for still picture profiles that contain only intra slice(s), inter-coding syntax elements are not used in the still profile decoding process. Table 2. Picture Parameter RBSP Syntax [Table 2] JPEG2025161904000009.jpg223163 JPEG2025161904000010.jpg227163 JPEG2025161904000011.jpg22163
[0113] Tables 3 and 4 show exemplary picture header (PH) syntax elements in some relevant examples, such as VVC. A picture may contain a combination of intra and inter slices. If a picture contains only intra slices, inter-coding syntax elements may be present in the PH but are not used in the picture decoding process. To reduce overhead in the picture, in some examples, the ph_inter_slice_allowed_flag and ph_intra_slice_allowed_flag in Table 4 are used to conditionally signal syntax elements related to intra coding and syntax elements related to inter coding. Table 3 Picture Header RBSP Syntax [Table 3] Table 4 Picture header structure [Table 4] JPEG2025161904000014.jpg225163 JPEG2025161904000015.jpg224163 JPEG2025161904000016.jpg208163
[0114] III. Example Profile Information
[0115] Table 5 shows exemplary profile information for some related examples such as VVC. The profile information resides in profile_tier_level() in the SPS as shown in Table 5 and may include general constraint information general_constraint_info().
[0116] Table 6 shows exemplary general constraint information in some related examples such as VVC. A first flag such as an intra-only constraint flag (e.g., intra_only_constraint_flag in Table 6) in the general constraint information can be used to indicate whether the slice type of an image slice conforming to the profile is an intra slice. The first flag equal to 1 specifies that the slice type of an image slice conforming to the profile is an intra slice (slice_type=I slice). The first flag equal to 0 does not impose such a constraint. Table 5 Profile information in SPS [Table 5] Table 6 General constraint information in profile information [Table 6]
[0117] A bitstream conforming to the Main 10 profile may comply with the following constraints: (i) the referenced SPS has chroma_format_idc equal to 0 or 1; (ii) the referenced SPS has bit_depth_minus8 in the range 0 to 2 (inclusive); (iii) the referenced SPS has sps_palette_enabled_flag equal to 0; (iv) for all values of i in the View Parameter Set (VPS) (if available) and the referenced SPS, general_level_idc and sublayer_level_idc[i] are not equal to 255 (which indicates level 8.5); (v) the tier and level constraints specified for the Main 10 profile in VVC may be met, as appropriate.
[0118] Conformance of a bitstream to the Main 10 profile is indicated by general_profile_idc equal to 1. A decoder that conforms to the Main 10 profile at a particular level in a particular tier can decode all bitstreams for which all of the following conditions are true: (i) the bitstream is indicated to conform to the Main 10 profile; (ii) the bitstream is indicated to conform to a tier lower than or equal to the specified tier; and (iii) the bitstream is indicated to conform to a level lower than or equal to the specified level but not level 8.5.
[0119] A bitstream conforming to the Main 4:4:4 10 profile may comply with the following constraints: (i) the referenced SPS has a chroma_format_idc in the range 0 to 3 (inclusive), (ii) the referenced SPS has a bit_depth_minus8 in the range 0 to 2 (inclusive), (iii) for all values of i in the VPS (if available) and the referenced SPS, general_level_idc and sublayer_level_idc[i] equal 255 (which indicates level 8.5); (iv) the layer and level constraints specified for the Main 4:4:4 10 profile in VVC may be met, as appropriate.
[0120] Conformance of a bitstream to the Main 4:4:4 10 profile is indicated by general_profile_idc equal to 2. A decoder that conforms to the Main 4:4:4 10 profile at a particular level in a particular stratum can decode all bitstreams for which all of the following conditions are true: (i) the bitstream is indicated to conform to the Main 4:4:4 10 or Main 10 profile; (ii) the bitstream is indicated to conform to a stratum lower than or equal to the specified stratum; and (iii) the bitstream is indicated to conform to a level lower than or equal to the specified level that is not level 8.5.
[0121] IV. Profile Information for Video Sequences Containing Intra-Slices Only
[0122] In some related examples, an SPS-level flag (e.g., sps_inter_allowed_flag) can be used to indicate that only intra slices are included in the coded video sequence or bitstream. This flag can be used to skip signaling of syntax elements related to inter coding to reduce redundancy. For example, if sps_inter_allowed_flag is equal to 1, syntax elements related to inter coding can be present in the SPS. If sps_inter_allowed_flag is equal to 0, only syntax elements related to intra coding can be present in the SPS.
[0123] Furthermore, in some related examples, a PPS-level flag (e.g., pps_inter_allowed_flag) can be used to indicate that the coded video sequence contains only intra slices. This flag can be used to skip signaling of syntax elements related to inter coding to reduce redundancy. For example, if pps_inter_allowed_flag is equal to 1, syntax elements related to inter coding can be present in the PPS. If pps_inter_allowed_flag is equal to 0, only syntax elements related to intra coding can be present in the PPS.
[0124] This disclosure includes methods for using profile information to indicate when only intra slices are included in a coded video sequence.
[0125] According to aspects of this disclosure, an all intra profile can be used to indicate that a coded video sequence contains only intra slices. In an all intra profile, all slices that conform to this profile are intra-coded. An all intra profile can be indicated by profile information such as a profile identification (e.g., general_profile_idc in Table 5).
[0126] A still picture profile can be used to indicate that a coded video sequence contains only intra slices. In a still picture profile, all slices that conform to this profile are intra-coded. A still picture can be indicated by profile information such as a profile identification (e.g., General Profile IDC). A still picture profile can be used for still photographs captured by a camera, computer-generated images, snapshots extracted from a video sequence, etc. A still picture profile can have a subset of the features of the Main 10 profile described above.
[0127] In one embodiment, for a still picture profile, a second flag, such as a one_picture_only_constraint_flag (e.g., one_picture_only_constraint_flag in Table 7), can be included in the profile information. The one_picture_only constraint flag can indicate whether all slices are intra-coded and there is only one picture in the coded video sequence. In one example, a one_picture_only constraint flag equal to 1 specifies that all slices that conform to the still picture profile in the coded video sequence are intra-coded (e.g., slice_type=I slice) and there is only one picture in the coded video sequence. A one_picture_only constraint flag equal to 0 imposes no such constraint.
[0128] In one embodiment, the one picture only constraint flag is signaled in the general constraint information (e.g., general_constraint_info()) in the profile information (e.g., profile_tier_level()). Table 7 provides an example of general constraint information including the one picture only constraint flag. As mentioned above, the general constraint information in Table 7 can be included in profile information such as profile_tier_level() in Table 5. Table 7 General Constraint Information with Constraint Flags for Only One Picture [Table 7]
[0129] According to aspects of the present disclosure, in bitstream compatibility, one or more constraints may be applied between a first flag and a second flag, such as an intra-only constraint flag and a one-picture-only constraint flag.
[0130] In one embodiment, the one picture only constraint flag is signaled before the intra only constraint flag, as shown in Table 7. If the one picture only constraint flag indicates that all slices conforming to the still picture profile in the coded video sequence are intra-coded and contained in one picture (e.g., one_picture_only_constraint_flag=1 in Table 7), the intra only constraint flag can be set to indicate that the slice type of the slices conforming to the still picture profile based on bitstream conformance is intra slice (e.g., intra_only_constraint_flag=1 in Table 7).
[0131] In one embodiment, the one picture only constraint flag equal to 1 specifies that the slice type of a slice conforming to the Still Picture Profile is an intra slice (e.g., slice_type=I slice) and that only one picture is present in the bitstream. The one picture only constraint flag equal to 0 imposes no such constraint. The intra only constraint flag equal to 1 specifies that the slice type of a slice is an intra slice (slice_type=I slice). The intra only constraint flag equal to 0 imposes no such constraint. Based on bitstream conformance, if the one picture only constraint flag is true, the intra only constraint flag is also true.
[0132] In one embodiment, if the only one picture constraint flag is equal to 1, the only pictures in the coded video sequence may be intra random access pictures (IRAP), such as instantaneous decoding refresh (IDR) pictures or clean random access (CRA) pictures.
[0133] In one embodiment, if only one picture has a constraint flag equal to 1, the video parameter set (VPS) may not be present and the number of layers in the coded video sequence may be equal to 1.
[0134] In an embodiment, if the only one picture constraint flag is equal to 1, the reference picture list (RPL) and picture order count (POC) may not be present in the picture header or slice header.
[0135] In one embodiment, if the only one picture constraint flag is equal to 1, the access unit delimiter (AUD) and end of stream (EOS) network abstraction layer (NAL) units may not be present in the bitstream.
[0136] In one embodiment, for an all-intra profile, the intra-only constraint flag indicates that all slices conforming to this profile are only intra-coded, e.g., when the intra-only constraint flag is set to 1. Thus, in an all-intra profile, only intra slices can be present in the bitstream.
[0137] In one embodiment, for a Still Picture profile, both the One Picture Only constraint flag and the Intra Only constraint flag can be set to 1, indicating that only intra slices can be present in the bitstream and only one picture can be present in the bitstream.
[0138] In one embodiment, for a Still Picture profile, the Only One Picture Constraint flag can be set to 1, indicating that only intra slices can be present in the bitstream and only one picture can be present in the bitstream.
[0139] According to aspects of this disclosure, one or more non-intra-related syntax elements may be excluded based on an intra-only constraint flag. For example, if the intra-only constraint flag is present and indicates that all slices in the bitstream are intra-coded (e.g., the intra-only constraint flag is equal to 1), then no non-intra related syntax elements are signaled.
[0140] In one embodiment, if the intra-only constraint flag is present and indicates that all slices in the bitstream are intra-coded (e.g., if the intra-only constraint flag is equal to 1), one or more flags may be set to 0. For example, both the aforementioned sps_inter_allowed_flag and pps_inter_allowed_flag may be set to 0. If the intra-only constraint flag is not present or equal to 0, no such constraints apply to the one or more flags, such as sps_inter_allowed_flag and pps_inter_allowed_flag.
[0141] According to aspects of the present disclosure, one or more non-intra-related syntax elements may be excluded based on the only one picture constraint flag. For example, if the only one picture constraint flag is present and indicates that all slices in the bitstream are intra-coded and only one picture is present in the bitstream, e.g., if the only one picture constraint flag is equal to 1, then no non-intra-related syntax elements are signaled.
[0142] In an embodiment, if the only one picture constraint flag is present and indicates that all slices in the bitstream are intra-coded and only one picture is present in the bitstream, e.g., if the only one picture constraint flag is equal to 1, then one or more flags may be set to 0. For example, both the aforementioned sps_inter_allowed_flag and pps_inter_allowed_flag may be set to 0. If the only one picture constraint flag is not present or equal to 0, then no such constraint applies to said one or more flags, e.g., sps_inter_allowed_flag and pps_inter_allowed_flag.
[0143] According to aspects of the present disclosure, a third flag may be used to indicate that all slices in a coded video sequence are intra-coded and contained in one picture. The third flag may be an SPS only one picture present flag, which may be signaled separately from the profile information. For example, the SPS only one picture present flag may be signaled in the SPS. An SPS only one picture present flag equal to 1 specifies that the slice type of the slice in the coded video sequence is an intra slice (slice_type=I slice) and that there is only one picture in the sequence. An SPS only one picture present flag equal to 0 does not impose such a constraint.
[0144] In an embodiment, one or more syntax elements may be excluded based on the only one picture constraint flag. For example, if the only one picture constraint flag is present and indicates that all slices in the bitstream are intra-coded and only one picture is present in the bitstream, e.g., if the only one picture constraint flag is equal to 1, then non-intra-related syntax elements and / or syntax elements related to POC values and RPL are not signaled.
[0145] In one embodiment, if the Only 1 Picture Constraints flag is present and equal to 1, the Only 1 Picture Present flag in the SPS can be set to the same value as the Only 1 Picture Constraints flag based on bitstream compatibility.
[0146] Table 8 shows some example syntax elements in the general constraint information, including both the one-picture constraint flag and the intra-only constraint flag. As mentioned above, the general constraint information in Table 8 can be included in profile information such as profile_tier_level() in Table 5. In Table 8, the one-picture constraint flag is general_one_picture_only_constraint_flag. general_one_picture_only_constraint_flag equal to 1 specifies that there is only one coded picture in the bitstream, and general_one_picture_only_constraint_flag equal to 0 does not impose such a constraint. Furthermore, the intra-only constraint flag is intra_only_constraint_flag. intra_only_constraint_flag equal to 1 specifies that the slice type in the slice header is an intra slice (sh_slice_type=I), and intra_only_constraint_flag equal to 0 does not impose such a constraint. If general_one_picture_only_constraint_flag is equal to 1, the value of intra_only_constraint_flag can be set as 1. Table 8. General Constraint Information Syntax [Table 8] JPEG2025161904000021.jpg157166
[0147] According to aspects of the present disclosure, a bitstream that conforms to the Main 10 or Main 10 Still Picture Profile may comply with the following constraints: (i) for a bitstream that conforms to the Main 10 Still Picture Profile, the bitstream contains only one picture; (ii) the referenced SPS has sps_chroma_format_idc equal to 0 or 1; (iii) the referenced SPS has sps_bit_depth_minus8 in the range of 0 to 2, inclusive; (iv) for a bitstream that conforms to the Main 10 Still Picture Profile, the referenced SPS has max_dec_pic_buffering_minus1[sps_max_sublayers1] equal to 0; (v) the referenced SPS has sps_palette_enabled_flag equal to 0; (vi) for a bitstream that does not conform to the Main 10 Still Picture Profile, the referenced SPS has max_dec_pic_buffering_minus1[sps_max_sublayers1] equal to 0; (vii) For bitstreams conforming to the Main 10 profile, general_level_idc and sublayer_level_idc[i] are not equal to 255 (which indicates level 15.5) for all values of i in the referenced VPS (if available) and the referenced SPS; and (vii) the layer and level constraints specified for the Main 10 or Main 10 Still Picture Profile in VVC can be met, as appropriate.
[0148] Conformance of a bitstream to the Main 10 profile can be indicated by the profile identification information (eg, general_profile_idc=1 in Table 5).
[0149] Conformance of a bitstream to the Main 10 Still Picture Profile can be indicated by the one picture constraint flag (e.g., general_one_picture_only_constraint_flag=1 in Table 8) along with the profile identification (e.g., general_profile_idc=1 in Table 5).
[0150] Note that if conformance of a bitstream to the Main 10 still picture profile is indicated as above and the indicated level is not level 15.5, the conditions for indicating conformance of a bitstream to the Main 10 profile are also met.
[0151] A decoder that conforms to the Main 10 profile at a particular level in a particular tier can decode any bitstream for which all of the following conditions are true: (i) the bitstream is indicated to conform to the Main 10 or Main 10 Still Picture profile; (ii) the bitstream is indicated to conform to a tier lower than or equal to the specified tier; and (iii) the bitstream is indicated to conform to a level lower than or equal to the specified level, other than level 15.5.
[0152] A decoder that conforms to the Main 10 Still Picture Profile at a particular level in a particular tier can decode any bitstream for which all of the following conditions are true: (i) the bitstream is indicated to conform to the Main 10 Still Picture Profile; (ii) the bitstream is indicated to conform to a tier lower than or equal to the specified tier; and (iii) the bitstream is indicated to conform to a level lower than or equal to the specified level, other than level 15.5.
[0153] According to aspects of the present disclosure, a bitstream conforming to the Main 4:4:4 10 or Main 4:4:4 10 Still Picture Profile may comply with the following constraints: (i) for a bitstream conforming to the Main 4:4:4 10 Still Picture Profile, the bitstream contains only one picture; (ii) the referenced SPS has an sps_chroma_format_idc in the range from 0 to 3, inclusive; (iii) the referenced SPS has an sps_bit_depth_minus8 in the range from 0 to 2, inclusive; (iv) for a bitstream conforming to the Main 4:4:4 10 Still Picture Profile, the referenced SPS has max_dec_pic_buffering_minus1 [sps_max_sublayers_minus1] equal to 0; (v) for a Main 4:4:4 not conforming to the Main 4:4:4 10 Still Picture Profile, the referenced SPS has max_dec_pic_buffering_minus1 [sps_max_sublayers_minus1] equal to 0; For a bitstream conforming to the 10 profile, general_level_idc and sublayer_level_idc[i] shall not be equal to 255 (which indicates level 15.5) for all values of i in the referenced VPS (if available) and the referenced SPS, and (vi) the layer and level constraints specified in VVC for the Main 4:4:4 10 or Main 4:4:4 10 Still Picture Profile, as appropriate, can be met.
[0154] Conformance of a bitstream to the Main 4:4:4 10 profile is indicated by the profile identification information (eg, general_profile_idc=2 in Table 5).
[0155] Conformance of a bitstream to the Main 4:4:4 10 Still Picture Profile is indicated by the one picture constraint flag (e.g., general_one_picture_only_constraint_flag=1 in Table 8) along with the profile identification (e.g., general_profile_idc=2 in Table 5).
[0156] Note that if conformance of a bitstream to the Main 10 4:4:4 Still Picture Profile is indicated as above and the indicated level is not level 15.5, then the conditions for indicating conformance of a bitstream to the Main 10 4:4:4 Profile are also met.
[0157] A decoder that conforms to the Main 4:4:4 10 profile at a particular level in a particular stratum can decode any bitstream for which all of the following conditions are true: (i) the bitstream is shown to conform to the Main 4:4:4 10, Main 10, Main 4:4:4 10 Still Picture, or Main 10 Still Picture profile; (ii) the bitstream is shown to conform to a stratum lower than or equal to the specified stratum; and (iii) the bitstream is shown to conform to a level lower than or equal to the specified level, other than level 15.5.
[0158] A decoder that conforms to the Main 4:4:4 10 Still Picture Profile at a particular level in a particular stratum can decode any bitstream for which all of the following conditions are true: (i) the bitstream is indicated to conform to the Main 4:4:4 10 Still Picture or the Main 10 Still Picture Profile; (ii) the bitstream is indicated to conform to a stratum lower than or equal to the specified stratum; and (iii) the bitstream is indicated to conform to a level lower than or equal to the specified level, but not to level 15.5.
[0159] V. General Constraint Flag Group
[0160] The general constraint information described above may include multiple syntax elements (e.g., the syntax elements in Table 8). However, a decoder need only decode a subset of the syntax elements to conform to a profile. This disclosure includes a method for grouping the syntax elements in the general constraint information. Grouping the syntax elements may allow a decoder to finish parsing the general constraint information earlier, which may speed up the decoding process.
[0161] According to aspects of the present disclosure, the syntax elements in the general constraint information can be grouped based on usage scenarios, such as profiles. There may also be subgroups within a group. Each group or subgroup of syntax elements includes a trunk of syntax elements that are consecutively present in the bitstream. Thus, a decoder can use group knowledge to terminate parsing the general constraint information early.
[0162] In some embodiments, the decoder may have knowledge of the total number and order of groups of syntax elements included in the general constraint information.
[0163] In one embodiment, the general constraint information includes three groups of syntax elements: a non-intra non-inter group (Group I), an intra group (Group II), and an inter group (Group III), as shown in Table 9. For example, the intra group (Group II) includes the trunks of syntax elements related to intra-coding tools, the inter group (Group III) includes the trunks of syntax elements related to inter-coding tools, and the non-intra non-inter group (Group I) includes the trunks of syntax elements related to neither intra-coding tools nor inter-coding tools. In one example, the non-intra non-inter group (Group I) appears first in the bitstream, followed by the intra group (Group II), and the inter group (Group III) appears last.
[0164] As mentioned above, the general constraint information in Table 9 can be included in profile information such as profile_tier_level() in Table 5. Table 9. General constraint information, including three groups of syntax elements [Table 9] JPEG2025161904000023.jpg199163
[0165] For the Main 10 Still Picture or Main 10 4:4:4 Still Picture Profile, bitstream conformance can be indicated by the one picture only constraint flag (e.g., general_one_picture_only_constraint_flag=1 in Table 9) along with the profile identification information (e.g., general_profile_idc=1 in Table 5). If the one picture only constraint flag is equal to 1, the value of the intra only constraint flag is equal to 1. For other profiles, e.g., profiles that contain only intra pictures, the intra only constraint flag may also be equal to 1.
[0166] If the intra-only constraint flag is equal to 1, the values of all syntax elements in the inter-group (Group III) in Table 9, such as no_ref_wraparound_constraint_flag and no_temporal_mvp_constraint_flag, are equal to 1.
[0167] Thus, knowledge of the groups of syntax elements allows the decoder to terminate parsing of the general constraint information earlier, which may be beneficial for decoding speed and procedure.
[0168] In one embodiment, as shown in Table 10, the general constraint information includes two groups of syntax elements: a non-inter group (Group I) and an inter group (Group II). The inter group (Group II) may include the trunks of syntax elements related to inter coding tools. The non-inter group (Group I) may include the trunks of syntax elements not related to inter coding tools. In one example, the non-inter group (Group I) appears first in the bitstream, followed by the inter group (Group II).
[0169] As mentioned above, the general constraint information in Table 10 can be included in profile information such as profile_tier_level() in Table 5. Table 10. General Constraint Information, containing two groups of syntax elements [Table 10] JPEG2025161904000025.jpg187163
[0170] For the Main 10 Still Picture or Main 10 4:4:4 Still Picture Profile, bitstream conformance can be indicated by the one picture only constraint flag (e.g., general_one_picture_only_constraint_flag=1 in Table 10) along with the profile identification information (general_profile_idc=1 in Table 5). If the one picture only constraint flag is equal to 1, the value of the intra only constraint flag is equal to 1. For other profiles, e.g., profiles that contain only intra pictures, the intra only constraint flag may also be equal to 1.
[0171] If the intra-only constraint flag is equal to 1, the values of all Inter-Group (Group II) syntax elements such as no_ref_wraparound_constraint_flag and no_temporal_mvp_constraint_flag in Table 10 are equal to 1.
[0172] Thus, knowledge of the groups of syntax elements allows the decoder to terminate parsing of the general constraint information earlier, which is beneficial to decoding speed and procedure.
[0173] According to some embodiments, whenever a new syntax element is introduced into the general constraint information (e.g., general_constraint_info() in Table 9 or Table 10), the new syntax element can be included into an existing group or subgroup so that the general constraint information does not need to form a new group for an existing group.
[0174] In one embodiment, for general constraint information including a non-intra non-inter group (Group I), an intra group (Group II), and an inter group (Group III), if a new syntax element related to an intra-coding tool is included in the general constraint information, the new syntax element can be included in the intra group (Group II). If a new syntax element related to an inter-coding tool is included in the general constraint information, the new syntax element can be included in the inter group (Group III). If the new syntax element is not related to either an intra-coding or inter-coding tool, the new syntax element can be included in the non-intra non-inter group (Group I).
[0175] In the example shown in Table 11, a new syntax element, no_weighted_pred_constraint_flag (e.g., no_weighted_pred_constraint_flag), which specifies whether weighted prediction can be applied to P slices, is introduced into the general constraint information, which contains three groups of syntax elements: The new syntax element is included in the inter group (group III) because it is a syntax element related to inter coding tools.
[0176] As mentioned above, the general constraint information in Table 11 can be included in profile information such as profile_tier_level() in Table 5. Table 11. New syntax elements introduced for general constraint information, including three groups of syntax elements [Table 11]
[0177] In one embodiment, for general constraint information including a non-inter group (Group I) and an inter group (Group II), if a new syntax element related to an inter-coding tool is included in the general constraint information, the new syntax element can be included in the inter group (Group II). If a new syntax element not related to an inter-coding tool is included in the general constraint information, the new syntax element can be included in the non-inter group (Group I).
[0178] In the example shown in Table 12, a new syntax element, no_weighted_pred_constraint_flag (e.g., no_weighted_pred_constraint_flag), which specifies whether weighted prediction can be applied to P slices, is introduced into the general constraint information, which includes two groups of syntax elements: The new syntax element is a syntax element related to inter coding tools, and therefore can be included in the inter group (group II).
[0179] As mentioned above, the general constraint information in Table 12 can be included in profile information such as profile_tier_level() in Table 5. Table 12. New syntax elements introduced for general constraint information, including two groups of syntax elements [Table 12]
[0180] According to aspects of the present disclosure, byte alignment can be checked after each group or subgroup to facilitate parsing and early termination.
[0181] Table 13 shows an example byte alignment for each group in the general constraint information, which includes three groups of syntax elements. Byte alignment is checked at the end of each group or subgroup. If the syntax elements signaled within a group or subgroup are not byte-aligned, additional bits can be signaled to ensure that the total bits used for each group are byte-aligned.
[0182] As mentioned above, the general constraint information in Table 13 can be included in profile information such as profile_tier_level() in Table 5. Table 13. Byte alignment for each group in the general constraint information containing three groups of syntax elements [Table 13] JPEG2025161904000029.jpg217165
[0183] Table 14 shows an example byte alignment for each group in general constraint information containing two groups of syntax elements. Byte alignment is checked at the end of each group or subgroup. If the syntax elements signaled within a group or subgroup are not byte aligned, additional bits are signaled to ensure that the total bits used for each group are byte aligned.
[0184] As mentioned above, the general constraint information in Table 14 can be included in profile information such as profile_tier_level() in Table 5. Table 14. Byte alignment for each group in the general constraint information containing two groups of syntax elements [Table 14] JPEG2025161904000031.jpg197163
[0185] VII. Flowchart
[0186] 8 shows a flowchart outlining an example process (800) according to certain embodiments of the present disclosure. In various embodiments, the process (800) is performed by processing circuitry within the terminal devices (210), (220), (230), and (240), a processing circuitry performing the functions of the video encoder (303), a processing circuitry performing the functions of the video decoder (310), a processing circuitry performing the functions of the video decoder (410), a processing circuitry performing the functions of the intra prediction module (452), a processing circuitry performing the functions of the video encoder (503), a processing circuitry performing the functions of the predictor (535), a processing circuitry performing the functions of the intra encoder (622), a processing circuitry performing the functions of the intra decoder (772), or the like. In some embodiments, the process (800) is implemented with software instructions, such that the processing circuitry performs the process (800) when it executes the software instructions.
[0187] The process (800) generally begins at step (S810), where the process (800) decodes profile information for a plurality of image slices in prediction information for the coded video bitstream. The profile information includes profile identification information for a profile in which each of the image slices in the coded video bitstream is intra-coded. The process (800) then proceeds to step (S820).
[0188] In step S820, the process 800 performs intra prediction for each image slice in the coded video bitstream. The process 800 then proceeds to step S830.
[0189] In step S830, the process reconstructs at least one image picture based on intra prediction, and then the process ends.
[0190] In one embodiment, the profile information includes a first flag indicating whether each image slice in the coded video bitstream is intra-coded, and a second flag indicating whether each image slice in the coded video bitstream is contained in a single picture.
[0191] In one embodiment, the first flag is decoded after the second flag, and indicates that each image slice in the coded video bitstream is intra-coded based on the second flag indicating that each image slice in the coded video bitstream is contained in one picture.
[0192] In an embodiment, the first flag indicates that each image slice in the coded video bitstream is intra-coded based on a profile identification of a profile for which each image slice in the coded video bitstream is intra-coded.
[0193] In one embodiment, the second flag indicates that each image slice in the coded video bitstream is contained in one picture, based on the profile being a still picture profile in which only one picture is contained in the coded video bitstream.
[0194] In one embodiment, non-intra-related syntax elements are not included in the prediction information based on one of: (i) a first flag indicating that each image slice in the coded video bitstream is intra-coded; and (ii) a second flag indicating that each image slice in the coded video bitstream is included in one picture.
[0195] In some embodiments, the prediction information includes a third flag indicating whether each image slice in the coded video bitstream is intra-coded and contained in one picture, and the third flag is not included in the profile information.
[0196] In one embodiment, the third flag indicates that each image slice in the coded video bitstream is intra-coded and contained in one picture, based on the second flag indicating that each image slice in the coded video bitstream is contained in one picture.
[0197] 9 shows another flowchart outlining an exemplary process (900) according to certain embodiments of the present disclosure. In various embodiments, the process (900) is performed by processing circuitry within the terminal devices (210), (220), (230), and (240), a processing circuitry performing the functions of the video encoder (303), a processing circuitry performing the functions of the video decoder (310), a processing circuitry performing the functions of the video decoder (410), a processing circuitry performing the functions of the intra prediction module (452), a processing circuitry performing the functions of the video encoder (503), a processing circuitry performing the functions of the predictor (535), a processing circuitry performing the functions of the intra encoder (622), a processing circuitry performing the functions of the intra decoder (772), or the like. In some embodiments, the process (900) is implemented with software instructions, such that the processing circuitry performs the process (900) when the processing circuitry executes the software instructions.
[0198] The process (900) may generally begin at step (S910), where the process (900) decodes profile information in prediction information of the coded video bitstream. The profile information includes multiple groups of syntax elements and indicates a profile of the coded video bitstream. The process (900) then proceeds to step (S920).
[0199] In step S920, the process 900 determines at least one of a plurality of groups of syntax elements based on the profile indicated in the profile information. The process 900 then proceeds to step S930.
[0200] In step (S930), the process (900) decodes the syntax elements included in the prediction information based on the determined at least one of the plurality of groups of syntax elements. Then, the process (900) proceeds to step (S940).
[0201] In step (S940), the process (900) reconstructs at least one picture based on the decoded syntax elements included in the prediction information.
[0202] In an embodiment, the determined order of at least one of the plurality of groups of syntax elements for a profile follows a predetermined order of the plurality of groups of syntax elements in the profile information.
[0203] In one embodiment, byte alignment is checked for each of the plurality of groups of syntax elements within the profile information.
[0204] VIII. Computer Systems
[0205] The techniques described above can be implemented as computer software using computer-readable instructions and can be physically stored on one or more computer-readable media. For example, Figure 10 illustrates a computer system (1000) suitable for implementing certain embodiments of the disclosed subject matter.
[0206] Computer software may be coded using any suitable machine code or computer language and may be subjected to assembly, compilation, linking, or similar mechanisms to create code containing instructions that are executable by one or more computer central processing units (CPUs), graphics processing units (GPUs), etc., either directly, or through interpretation, microcode execution, etc.
[0207] The instructions may be executed on various types of computers or components thereof, including, for example, personal computers, tablet computers, servers, smartphones, gaming devices, Internet of Things devices, etc.
[0208] 10 for computer system 1000 are exemplary in nature and are not intended to suggest any limitation as to the scope of use or functionality of the computer software implementing embodiments of the present disclosure. Neither the arrangement of components should be interpreted as having any dependency or requirement regarding any one or combination of components shown in the exemplary embodiment of computer system 1000.
[0209] The computer system (1000) may include certain human interface input devices that can respond to input by one or more human users through, for example, tactile input (e.g., keystrokes, swipes, data glove movements), audio input (e.g., voice, claps), visual input (e.g., gestures), or olfactory input (not shown). The human interface devices may also be used to capture certain media that do not necessarily involve direct human conscious input, such as audio (e.g., speech, music, ambient sounds), images (e.g., scanned images, photographic images obtained from still cameras), and video (e.g., two-dimensional video, three-dimensional video, including stereoscopic video).
[0210] The input human interface devices may include one or more (only one of each is shown) of a keyboard (1001), a mouse (1002), a trackpad (1003), a touchscreen (1010), a data glove (not shown), a joystick (1005), a microphone (1006), a scanner (1007), and a camera (1008).
[0211] The computer system (1000) may also include some type of human interface output device. Such human interface output devices may stimulate one or more of the human user's senses, for example, through tactile output, sound, light, and smell / taste. Such human interface output devices may include haptic output devices (e.g., haptic feedback via a touchscreen (1010), data gloves (not shown), or joystick (1005) (although haptic feedback devices may also function as input devices), audio output devices (e.g., speakers (1009), headphones (not shown)), visual output devices (e.g., screens (1010), including CRT screens, LCD screens, plasma screens, and OLED screens; each may or may not have touchscreen input capabilities, each may or may not have haptic feedback capabilities, some of which may output two-dimensional visual output or output in greater than three dimensions through means such as stereoscopic output; virtual reality glasses (not shown), holographic displays, and smoke tanks (not shown)), and printers (not shown). These output devices (such as a screen (1010)) can be connected to the system bus (1048) through a graphics adapter (1050).
[0212] The computer system (1000) may also include human-accessible storage devices and associated media, such as optical media including CD / DVD ROM / RW (1020) along with CD / DVD or similar media (1021), thumb drives (1022), removable hard drives or solid state drives (1023), legacy magnetic media such as tape and floppy disks (not shown), specialized ROM / ASIC / PLD-based devices (not shown) such as security dongles, etc.
[0213] Those skilled in the art should also understand that the term "computer-readable medium" as used in connection with the presently disclosed subject matter does not encompass transmission media, carrier waves, or other transitory signals.
[0214] The computer system (1000) may also include a network interface (1054) to one or more communication networks (1055). The one or more communication networks (1055) may be, for example, wireless, wired, or optical. The one or more communication networks (1055) may further be local, wide-area, metropolitan, in-vehicle, industrial, real-time, delay-tolerant, etc. Examples of the one or more communication networks (1055) include cellular networks including Ethernet, WLAN, GSM, 3G, 4G, 5G, LTE, etc.; TV wired or wireless wide-area digital networks including cable, satellite, and terrestrial broadcast television; in-vehicle and industrial networks including CAN Bus; etc. Some networks typically require an external network interface adapter attached to some kind of general-purpose data port or peripheral bus (1049) (e.g., a USB port on the computer system (1000)). Others are typically integrated into the core of the computer system (1000) by attachment to a system bus, as described below (e.g., an Ethernet interface to a PC computer system or a cellular network interface to a smartphone computer system). Using any of these networks, the computer system (1000) can communicate with other entities. Such communication may be unidirectional, receive-only (e.g., broadcast television), unidirectional transmit-only (e.g., CANbus to certain CANbus devices), or bidirectional, for example, to other computer systems using local or wide-area digital networks. Each of these networks and network interfaces, as described above, may use certain protocols and protocol stacks.
[0215] The aforementioned human interface devices, human-accessible storage devices, and network interfaces may be attached to the core (1040) of the computer system (1000).
[0216] A core (1040) may include one or more central processing units (CPUs) (1041), graphics processing units (GPUs) (1042), specialized programmable processing units in the form of field programmable gate arrays (FPGAs) (1043), hardware accelerators for certain tasks (1044), etc. These devices may be connected through a system bus (1048), along with read-only memory (ROM) (1045), random access memory (1046), and internal mass storage devices (1047), such as internal non-user-accessible hard drives or solid-state drives (SSDs). In some computer systems, the system bus (1048) may be accessible in the form of one or more physical plugs to allow expansion with additional CPUs, GPUs, etc. Peripheral devices may be attached directly to the core's system bus (1048) or through a peripheral bus (1049). Architectures for peripheral buses include PCI, USB, etc.
[0217] The CPU (1041), GPU (1042), FPGA (1043), and accelerator (1044) can execute certain instructions that, in combination, can constitute the above-mentioned computer code. The computer code can be stored in ROM (1045) or RAM (1046). Temporary data can also be stored in RAM (1046), while persistent data can be stored, for example, in internal mass storage device (1047). Fast storage and retrieval to any of the memory devices can be enabled through the use of cache memory, which can be closely associated with one or more of the CPU (1041), GPU (1042), mass storage device (1047), ROM (1045), RAM (1046), etc.
[0218] The computer-readable medium can have computer code thereon for performing various computer-implemented operations. The medium and computer code may be those specially designed and constructed for the purposes of the present disclosure, or they may be of the kind well known and available to those having skill in the computer software arts.
[0219] By way of example and not limitation, the architecture (1000), and in particular a computer system having a core (1040), can provide functionality as a result of a processor (including a CPU, GPU, FPGA, accelerator, etc.) executing software embodied in one or more tangible computer-readable media. Such computer-readable media can be user-accessible mass storage, as discussed above, as well as media associated with some type of storage of the core (1040) that is non-transitory, such as a core-internal mass storage device (1047) or ROM (1045). Software implementing various embodiments of the present disclosure can be stored on such devices and executed by the core (1040). The computer-readable media can include one or more memory devices or chips, depending on particular needs. The software can cause the core (1040) and in particular the processor (including a CPU, GPU, FPGA, etc.) therein to perform certain processes or certain portions thereof described herein, including defining data structures stored in RAM (1046) and modifying such data structures according to software-defined processes. Additionally or alternatively, a computer system may provide functionality as a result of logic hardwired or otherwise embodied in circuitry (e.g., accelerator (1044)), which may operate in place of or in conjunction with software to perform particular processes or portions of particular processes described herein. Reference to software includes logic, and vice versa, as appropriate. Reference to a computer-readable medium may encompass circuitry (e.g., an integrated circuit (IC)) that stores software for execution, circuitry that embodies logic for execution, or both, as appropriate. The present disclosure encompasses any suitable combination of hardware and software.
[0220] While this disclosure has described several exemplary embodiments, there are alterations, substitutions, and various substitute equivalents that fall within the scope of this disclosure. It will thus be appreciated that those skilled in the art will be able to devise many systems and methods that, although not explicitly shown or described herein, embody the principles of the present disclosure and are therefore within the spirit and scope of the present disclosure.
[0221] Appendix A: Acronyms AMVP: Advanced Motion Vector Prediction ASIC: Application-Specific Integrated Circuit ATMVP: Alternative / Advanced Temporal Motion Vector Prediction BMS:Benchmark Set BV: Block Vector CANBus: Controller Area Network Bus CB: Coding Block CD: Compact Disc CPR: Current Picture Referencing CPU: Central Processing Unit CRT:Cathode Ray Tube CTB: Coding Tree Block CTU: Coding Tree Unit CU: Coding Unit DPB: Decoder Picture Buffer DVD: Digital Video Disc FPGA: Field Programmable Gate Area GOP: Group of Pictures GPU: Graphics Processing Unit GSM: Global System for Mobile communications HEVC: High Efficiency Video Coding HRD: Hypothetical Reference Decoder IBC: Intra Block Copy IC: Integrated Circuit JEM: Joint Exploration Model JVET: Joint Video Exploration Team LAN: Local Area Network LCD: Liquid-Crystal Display LTE: Long-Term Evolution MV: Motion Vector OLED: Organic Light-Emitting Diode PB: Prediction Block PCI: Peripheral Component Interconnect PH: Picture Header PLD: Programmable Logic Device PPS: Picture Parameter Setting POC: Picture Order Count PU: Prediction Unit RAM: Random Access Memory RBSP: Raw Byte Sequence Payload ROM: Read-Only Memory RPL: Reference Picture List SCC: Screen Content Coding SDR: Standard Dynamic Range SEI: Supplementary Enhancement Information SNR: Signal-to-Noise Ratio SPS: Sequence Parameter Set SSD: Solid-state drive TU: Transform Unit USB: Universal Serial Bus VUI: Video Usability Information VVC:Versatile Video Coding
Claims
1. A method for storing an encoded video bitstream, performed by a processor, comprising: The step of determining whether each of the multiple image slices that should be included in the encoded video bitstream is included in a single picture; A step of generating profile information for the plurality of image slices, wherein the profile information includes profile identification information for a profile in which each of the image slices in the encoded video bitstream is intra-encoded, the profile information includes information indicating whether each image slice in the encoded video bitstream is contained in one picture, and the indication that the information is contained in one picture indicates that each image slice in the encoded video bitstream is intra-encoded; The step of performing intraprediction for each image slice; The steps include: encoding at least one image picture based on the intra prediction; A step of storing a bitstream representing the encoded at least one image picture. including, method.
2. The method according to claim 1, further comprising a first flag indicating whether each image slice in the encoded video bitstream is intra-encoded.
3. The method according to claim 2, wherein the first flag indicates that each image slice in the encoded video bitstream is intra-encoded based on the profile identification information of the profile in which each image slice in the encoded video bitstream is intra-encoded.
4. The method according to any one of claims 1 to 3, wherein the prediction information for the encoded video bitstream includes a third flag indicating whether each image slice in the encoded video bitstream is intra-encoded and contained in a single picture, and the third flag is not included in the profile information.
5. The information indicating whether each image slice in the encoded video bitstream is contained in a single picture is one of the Main 10 still picture profile and the Main 4:4:4 10 still picture profile. The method according to any one of claims 1 to 4, further comprising restricting the encoded video bitstream corresponding to the plurality of image slices conforming to either the Main 10 still picture profile or the Main 4:4:4 10 still picture profile to contain only one picture.
6. An apparatus having a processing circuit configured to perform the method described in any one of claims 1 to 5.
7. A non-temporary computer-readable storage medium storing instructions that, when executed by at least one processor, cause the at least one processor to perform the method according to any one of claims 1 to 5.
8. A computer program for causing at least one processor to perform the method described in any one of claims 1 to 5.
9. A method for encoding at least one image picture, performed by a processor, comprising: The step of determining whether each of the multiple image slices that should be included in the encoded video bitstream is included in a single picture; A step of generating profile information for the plurality of image slices, wherein the profile information includes profile identification information for a profile in which each of the image slices in the encoded video bitstream is intra-encoded, the profile information includes information indicating whether each image slice in the encoded video bitstream is contained in one picture, and the indication that the information is contained in one picture indicates that each image slice in the encoded video bitstream is intra-encoded; The step of performing intraprediction for each image slice; A step of encoding at least one image picture based on the intra prediction. Methods that include...