Imaging element and imaging apparatus

Abstract

SOLUTION: An imaging element includes: a pixel section having a plurality of pixels; a processing circuit section that processes pixel signals output from the plurality of pixels; and a heat-dissipation path that dissipates heat generated in the processing circuit section to the outside. In the imaging element, the pixel section includes a first pixel block and a second pixel block, each having pixels. The processing circuit section includes a first processing block that processes pixel signals output from the first pixel block, and a second processing block that processes pixel signals output from the second pixel block. The heat-dissipation path may include a heat-dissipation path for the first processing block and a heat-dissipation path for the second processing block.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to an imaging element and an imaging device. [Background technology]

[0002] An imaging element including an AD conversion unit is known (for example, Patent Document 1). Conventionally, noise caused by heat generated in the AD conversion unit has been a problem. [Prior art document] [Patent documents] [Patent Document 1] JP 2013-51674 Summary of the Invention

[0003] In a first aspect of the present invention, an imaging element is provided with a pixel section having a plurality of pixels, a processing circuit section that processes pixel signals output from the plurality of pixels, and a heat dissipation path that dissipates heat generated by the processing circuit section to the outside.

[0004] A second aspect of the present invention is an imaging device comprising the imaging element described above.

[0005] The above summary of the invention does not list all of the features of the present invention, and subcombinations of these features may also be inventions. [Brief explanation of the drawings]

[0006] [Figure 1] FIG. 4 is a diagram showing an overview of an image sensor 400. [Figure 2] An example of a specific configuration of the pixel section 110 will be shown. [Figure 3] 1 shows an example of a circuit configuration of a pixel 112. [Figure 4] An example of a more specific configuration of the control circuit section 210 will be shown. [Figure 5] An example of a more specific configuration of the processing block 220 will be shown. [Figure 6] 2 is a cross-sectional view schematically showing heat dissipation elements 240 and 260 in one processing block 220. FIG. [Figure 7] 10 is a cross-sectional view schematically showing heat dissipation elements 240A, 250A, 240B, and 250B in two adjacent pixel current sources 121A and 121B. FIG. [Figure 8] FIG. 1 is a block diagram showing an example of the configuration of an imaging device 500 according to an embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0007] The present invention will be described below through embodiments of the invention, but the following embodiments do not limit the scope of the invention according to the claims. Furthermore, not all of the combinations of features described in the embodiments are necessarily essential to the solution of the invention.

[0008] In this specification, the X-axis and Y-axis are perpendicular to each other, and the Z-axis is perpendicular to the XY plane. The XYZ-axes form a right-handed system. The direction parallel to the Z-axis may be referred to as the stacking direction of the imaging element. In this specification, the terms "up" and "down" are not limited to the up and down directions in the direction of gravity. These terms merely refer to relative directions in the Z-axis direction. Note that in this specification, the arrangement in the X-axis direction will be described as a "row" and the arrangement in the Y-axis direction as a "column," but the matrix direction is not limited to this.

[0009] FIG. 1 is a diagram showing an overview of an imaging element 400. The imaging element 400 captures an image of a subject. The imaging element 400 generates image data of the captured subject. The imaging element 400 includes a first substrate 100, a second substrate 200, and a third substrate 300. As shown in FIG. 1, the first substrate 100 is stacked on the second substrate 200. Furthermore, the second substrate 200 is stacked on the third substrate 300.

[0010] The first substrate 100 has a pixel section 110. Light is incident on the pixel section 110. The pixel section 110 outputs a pixel signal based on the incident light. The first substrate 100 may be referred to as a pixel chip.

[0011] The second substrate 200 has a control circuit section 210 and a peripheral circuit section 230. The second substrate 200 may be referred to as a processing circuit chip.

[0012] The control circuit section 210 in this example is disposed on the second substrate 200 at a position facing the pixel section 110. The control circuit section 210 outputs a control signal to the pixel section 110 for controlling the driving of the pixel section 110. The control circuit section 210 also receives as input a pixel signal output from the pixel section 110.

[0013] The control circuit unit 210 performs signal processing on pixel signals. For example, the control circuit unit 210 performs processing to convert analog signals into digital signals. Specifically, the control circuit unit 210 performs processing to convert input pixel signals into digital signals. The control circuit unit 210 may also perform other signal processing. Examples of other signal processing include noise removal processing such as analog or digital CDS (Correlated Double Sampling).

[0014] The peripheral circuit section 230 controls the driving of the control circuit section 210. The peripheral circuit section 230 is arranged around the control circuit section 210 on the second substrate 200. The peripheral circuit section 230 may also be electrically connected to the first substrate 100 and control the driving of the pixel section 110.

[0015] The third substrate 300 has an image processing section 310. The third substrate 300 may be referred to as an image processing chip.

[0016] The image processing unit 310 in this example is disposed on the third substrate 300 at a position opposite to the control circuit unit 210. The control circuit unit 210 performs image processing on the pixel signals output by the control circuit unit 210. Furthermore, the image processing unit 310 also has a function of dissipating heat generated by the control circuit unit 210 to the outside. The structure of the image sensor 400 may be a back-illuminated type or a front-illuminated type.

[0017] 2 shows an example of a specific configuration of the pixel section 110. In this example, an enlarged view of the pixel section 110 and a pixel block 120 provided in the pixel section 110 is shown.

[0018] The pixel section 110 has a plurality of pixel blocks 120 arranged side by side in the row and column directions. In this example, the pixel section 110 has M×N (M and N are natural numbers) pixel blocks 120. In this example, the case where M is equal to N is illustrated, but M and N may be different.

[0019] Each pixel block 120 has at least one pixel 112. In this example, the pixel block 120 has m×n pixels 112 (m and n are natural numbers). For example, the pixel block 120 has 16×16 pixels 112. The number of pixels 112 corresponding to the pixel block 120 is not limited to this. In this example, the case where m is equal to n is illustrated, but m may be different from n. The pixel block 120 has multiple pixels 112 connected to a common control line in the row direction. For example, each pixel 112 in the pixel block 120 is connected to a common control line so that the pixels 112 are set to the same exposure time. In one example, n pixels 112 arranged in the row direction are connected by a common control line.

[0020] On the other hand, different exposure times may be set for each of the multiple pixel blocks 120. That is, the pixels 112 of each pixel block 120 may have the same exposure time, but may be set to different exposure times for the other pixel blocks 120. For example, when the pixels 112 of a pixel block 120 are connected in the row direction by a common control line, the pixels 112 of the other pixel blocks 120 may be connected in common by a different control line.

[0021] The pixel blocks 120 are arranged corresponding to the processing blocks 220 described below. In this embodiment, one pixel block 120 is arranged for one processing block 220.

[0022] The pixels 112 have a photoelectric conversion function that converts light into electric charges. The pixels 112 accumulate the electric charges generated by the photoelectric conversion. m pixels 112 are arranged side by side in the column direction and connected to a common signal line 122. The m pixels 112 are arranged side by side in n columns in the row direction in the pixel block 120.

[0023] In other words, the pixel block 120 is a group of pixels 112 connected by a common control line. The pixel block 120 can also be said to be the smallest unit of a circuit for multiple pixels 112 for which the same exposure time is set.

[0024] 3 shows an example of the circuit configuration of the pixel 112. The pixel 112 includes a photoelectric conversion unit 104, a transfer unit 123, a discharge unit 124, a reset unit 126, and a pixel output unit 127. The pixel output unit 127 includes an amplifier unit 128 and a selection unit 129. In this example, the transfer unit 123, the discharge unit 124, the reset unit 126, the amplifier unit 128, and the selection unit 129 are described as N-channel FETs, but the type of transistor is not limited to this.

[0025] The photoelectric conversion unit 104 has a photoelectric conversion function of converting light into electric charges. The photoelectric conversion unit 104 accumulates the electric charges generated by photoelectric conversion. The photoelectric conversion unit 104 is, for example, a photodiode.

[0026] The transfer unit 123 transfers the charges accumulated in the photoelectric conversion unit 104 to the storage unit 125. The transfer unit 123 is an example of a transfer gate that transfers the charges of the photoelectric conversion unit 104. In other words, the transfer unit 123 serves as the gate, the photoelectric conversion unit 104 serves as the source, and the storage unit 125 serves as the drain, forming a so-called transfer transistor. The gate terminal of the transfer unit 123 is connected to a local transfer control line for each pixel block 120 for inputting a control signal φTX1.

[0027] The discharge unit 124 discharges the charges accumulated in the photoelectric conversion unit 104 to a power supply wiring to which a power supply voltage VDD is supplied. A gate terminal of the discharge unit 124 is connected to a local discharge control line for each pixel block 120 for inputting a discharge control signal φTX2. Note that, in this example, the discharge unit 124 has been described as discharging the charges of the photoelectric conversion unit 104 to a power supply wiring to which a power supply voltage VDD is supplied, but the discharge unit 124 may also be discharged to a power supply wiring to which a power supply voltage different from the power supply voltage VDD is supplied.

[0028] The charge from the photoelectric conversion unit 104 is transferred to the accumulation unit 125 by the transfer unit 123. The accumulation unit 125 is an example of a floating diffusion (FD).

[0029] The reset unit 126 discharges the charge in the storage unit 125 to a power supply line to which a predetermined power supply voltage VDD is supplied. A gate terminal of the reset unit 126 is connected to a global reset control line across multiple pixel blocks 120 for inputting a reset control signal φRST.

[0030] The pixel output unit 127 outputs a signal based on the potential of the storage unit 125 to the signal line 122. The pixel output unit 127 has an amplifier unit 128 and a selection unit 129. The amplifier unit 128 has a gate terminal connected to the storage unit 125, a drain terminal connected to a power supply line to which a power supply voltage VDD is supplied, and a source terminal connected to the drain terminal of the selection unit 129.

[0031] The selection unit 129 controls the electrical connection between the pixel 112 and the signal line 122. When the selection unit 129 electrically connects the pixel 112 to the signal line 122, a pixel signal is output from the pixel 112 to the signal line 122. A gate terminal of the selection unit 129 is connected to a global selection control line that spans multiple pixel blocks 120 and inputs a selection control signal φSEL. A source terminal of the selection unit 129 is connected to the pixel current source 121.

[0032] The pixel current source 121 supplies a current to the signal line 122. The pixel current source 121 is provided on the second substrate 200 as will be described later.

[0033] Hereinafter, any one of the charges accumulated in the photoelectric conversion unit 104, the charges transferred to the accumulation unit 125, and the signal based on the potential of the accumulation unit 125, or all of these may be collectively referred to as a pixel signal.

[0034] In other words, the pixel 112 includes at least one photoelectric conversion unit 104, and a pixel output unit 127 as a readout unit that reads out an image signal from the at least one photoelectric conversion unit 104 to a signal line 122. The pixel 112 can also be said to be the smallest unit of a circuit that outputs pixel signals that constitute an image to the signal line 122.

[0035] 4 shows an example of a more specific configuration of the control circuit section 210. The control circuit section 210 has processing blocks 220 arranged in rows and columns. The control circuit section 210 of this example has M×N processing blocks 220.

[0036] The processing blocks 220 are each disposed at a position corresponding to the pixel block 120. For example, the processing block 220 and the pixel block 120 are disposed at a position where they overlap when viewed from the stacking direction of the first substrate 100 and the second substrate 200. In this case, the areas of the processing block 220 and the pixel block 120 may be substantially the same, including the margin between adjacent blocks.

[0037] 5 shows an example of a more specific configuration of the processing block 220. The processing block 220 controls the driving of the corresponding pixel block 120. For example, the processing block 220 controls the exposure time of the pixel block 120. The processing block 220 also has a processing circuit such as an AD converter, and processes the signal output by the pixel block 120. In one example, the processing block 220 converts the analog pixel signal output from the corresponding pixel block 120 into a digital signal. The processing block 220 in this example includes an exposure control unit 10, a pixel driving unit 20, a pixel current source 121, a conversion unit 40, and a signal output unit 50.

[0038] The exposure control unit 10 controls exposure of the multiple pixels 112. The exposure control unit 10 generates a signal for controlling the exposure time of the pixels 112. In one example, the exposure control unit 10 controls the exposure time for each pixel block 120 by adjusting at least one of the start timing and end timing of the exposure.

[0039] The pixel driving unit 20 is electrically connected to the plurality of pixels 112. The pixel driving unit 20 selects and drives an arbitrary pixel 112 from the plurality of pixels 112 based on a signal from the exposure control unit 10. The image sensor 400 can set the exposure time for each pixel block 120 according to the intensity of incident light, thereby expanding the dynamic range.

[0040] The pixel current source 121 supplies a current to the signal line 122 when reading out a pixel signal. The pixel current source 121 also has the function of electrically connecting the first substrate 100 and the second substrate 200. In particular, the pixel current source 121 inputs the pixel signal input from the first substrate 100 to the signal conversion unit 40 via the signal line 122. The signal lines 122 are provided corresponding to the n pixels 112 arranged in the row direction, and input the pixel signals to the signal conversion unit 40 for each column.

[0041] The conversion unit 40 converts the analog signal output by the pixel unit 110 into a digital signal. In this example, the conversion unit 40 converts the analog pixel signal into a digital signal. The conversion unit 40 sequentially converts the analog signals from m pixels 112 arranged in the column direction into digital signals. The conversion unit 40 converts the analog signals from n columns of pixels 112 in the row direction into digital signals in parallel. This can also be said to be a so-called column ADC method for one pixel block 120.

[0042] The signal output unit 50 receives the digital signal from the conversion unit 40. In one example, the signal output unit 50 temporarily stores the digital signal. The signal output unit 50 may include a latch circuit for storing the digital signal. The signal output unit 50 further outputs the temporarily stored digital signal to the image processing unit 310.

[0043] Note that instead of providing one processing block 220 for one pixel block 120, one processing block may be provided for N pixel blocks 120 (N is a natural number greater than or equal to 2). The N pixel blocks 120 corresponding to one pixel block may be referred to as a pixel block group. For example, two pixel blocks 120 arranged side by side in the column direction may be treated as one pixel block group, and one processing block 220 may be provided for each pixel block group. In this case, the processing block 220 may control the exposure time for each pixel block 120.

[0044] In other words, the processing block 220 is electrically connected to at least one pixel block 120 and can be said to be the smallest unit of a circuit that controls the pixels 112 of the at least one pixel block 120 .

[0045] The processing block 220 generates heat when processing pixel signals. For example, heat is generated when a current flows through the pixel current source 121 to read out the pixel signals. Heat is also generated when the read-out pixel signals are converted into digital signals by the conversion unit 40. When this heat is transmitted to the pixels 112, noise occurs in the pixel signals, which can cause what is known as pixel unevenness.

[0046] Therefore, in this embodiment, heat dissipation elements 240, 250, 260, and 270 are provided in the processing block 220 to absorb heat from the processing block 220 and dissipate the heat to the outside of the processing block 220. The pair of heat dissipation elements 240 and 250 are arranged to sandwich the pixel current source 121 in the X direction. On the other hand, the pair of heat dissipation elements 260 and 270 are arranged to sandwich the conversion unit 40 in the X direction.

[0047] Fig. 6 is a cross-sectional view showing the heat dissipation elements 240, 260 in one processing block 220, and Fig. 7 is a cross-sectional view showing the heat dissipation elements 240, 260 in two adjacent pixel current sources 121A, 121B. Note that in Figs. 6 and 7, configurations other than those related to heat dissipation are omitted for simplification.

[0048] As shown in Fig. 6, the heat dissipation element 240 is an active heat dissipation element. More specifically, the heat dissipation element 240 includes a Peltier element in which a plurality of P-type thermoelectric semiconductors and an N-type thermoelectric semiconductor are electrically connected, a heat transfer plate 241 thermally connected to the upper side of the Peltier element in the drawing, and a switch 243. The heat dissipation element 240 is connected to a power supply via the switch 243. Note that although the ground of the heat dissipation element 240 is depicted on the third substrate 300 side for convenience of illustration, it may be grounded on the second substrate 200. Furthermore, it is preferable that the Peltier element and the heat transfer plate 241 are electrically insulated from each other.

[0049] A through via 340 is thermally connected to the heat dissipation element 240 on the side facing the third substrate 300. As a result, when the switch 243 is turned on, the heat dissipation element 240 and the through via 340 form a heat dissipation path that dissipates heat mainly generated from the pixel current source 121 to the outside via the third substrate 300. From this perspective, this is sometimes referred to as the heat dissipation path of the pixel current source. Note that the configurations of the heat dissipation element 250 and the heat transfer plate 251 are similar to those of the heat dissipation element 240 and the heat transfer plate 241, and therefore a description thereof will be omitted.

[0050] The heat dissipation element 260 is also an active heat dissipation element. More specifically, the heat dissipation element 260 has a Peltier element in which a plurality of P-type thermoelectric semiconductors and an N-type thermoelectric semiconductor are electrically connected, and a switch 263. The heat dissipation element 260 is connected to a power supply via the switch 263. Note that although the ground of the heat dissipation element 260 is also drawn on the side of the third substrate 300, this is for convenience of illustration, and it may be grounded on the second substrate 200.

[0051] Through vias 360, 362, and 364 are thermally connected to the heat dissipation element 260 on the side of the third substrate 300. As a result, the heat dissipation element 260 and the through vias 360, 362, and 364 form a heat dissipation path that dissipates heat mainly generated from the conversion unit 40 to the outside via the third substrate 300. From this perspective, this may be referred to as the heat dissipation path of the conversion unit 40. Note that the configuration of the heat dissipation element 270 is similar to that of the heat dissipation element 260, and therefore a description thereof will be omitted.

[0052] Furthermore, as shown in Fig. 7, heat dissipation elements 370A and 370B may be provided on the third substrate 300. The heat dissipation elements 370A and 370B also have Peltier elements. Note that while Fig. 7 illustrates the Peltier element portions of the heat dissipation elements 370A and 370B, other components have been omitted to simplify the drawing.

[0053] The heat dissipation element 270A is arranged on the third substrate 300 side of the pixel current source 121A. As a result, the pixel current source 121A is sandwiched in the X direction between the heat dissipation elements 240A and 250A, and is also sandwiched in the Z direction between the heat transfer plates 241A and 251A and the heat dissipation element 370A. This allows the heat generated in the pixel current source 121A to be more efficiently dissipated to the outside. Similarly, the heat generated in the pixel current source 121B can also be efficiently dissipated to the outside by the heat dissipation elements 240B, 250B, and 370B.

[0054] In this case, the heat transfer plates 241A and 251A cover almost the entire surface of the pixel current source 121A facing the first substrate 100, except for the center. This allows the heat dissipation elements 240A and 250A to absorb heat generated by the pixel current source 121A more efficiently. In particular, this prevents heat from being transferred to the pixel 112. The heat transfer plates 241B and 251B have the same effect. The heat transfer plates 241A, 251A, 241B, and 251B are formed of, for example, metal or graphene. Alternatively, a portion of the wiring layer of the second substrate 200 may function as the heat transfer plates 241A, 251A, 241B, and 251B. A heat transfer plate may be provided that covers the first substrate 100 side of the conversion unit 40 and thermally connects the conversion unit 40 to the heat dissipation elements 260 and 270.

[0055] As described above, in this embodiment, each processing block 220 has a heat dissipation path. Furthermore, it can be said that each processing block 220 has a heat dissipation path for the pixel current source 121 and a heat dissipation path for the conversion unit 40. These heat dissipation paths are thermally connected to the outside, for example, to the package, and dissipate heat from the processing block 220 to the package side.

[0056] Here, the heat dissipation element 240 has a switch 243, and the heat dissipation element 260 has a switch 263. Therefore, the heat dissipation elements 240 and 260 may be controlled to be turned on and off independently for each processing block 220. For example, the processing block 220 may turn on the heat dissipation elements 240 and 260 when the current source is on and / or during AD conversion. Alternatively or in addition to this, a thermostat may be provided to control the on and off of the heat dissipation elements 240 and 260. Furthermore, each processing block 220 may control the on and off of the heat dissipation element 240 of the pixel current source 121 and the heat dissipation element 260 of the conversion unit 40 independently of each other.

[0057] Since the on / off of the heat dissipation elements can be controlled independently for each processing block 220, the on time and frequency of the heat dissipation elements 240, 260 may be increased for processing blocks 220 with a high processing frequency, for example, processing blocks 220 with a high frame rate. This allows efficient heat dissipation for processing blocks 220 that generate a large amount of heat, while reducing the power consumption of the heat dissipation elements for processing blocks 220 that generate a small amount of heat.

[0058] 7, the adjacent heat dissipation element 250A and heat dissipation element 240B are thermally connected to the through via 340. That is, the heat dissipation element 250A and the heat dissipation element 240B share the through via 340 as a heat dissipation path. This makes it possible to reduce the circuit area of ​​the third substrate 300. Alternatively, dedicated through vias, such as the through vias 340A and 340C, may be provided that are connected to the heat dissipation element 250A and the heat dissipation element 240B, respectively. In this case, the heat dissipation efficiency is further improved.

[0059] Furthermore, a heat dissipation element may be further provided on the third substrate 300 side of the conversion unit 40. Also, instead of an active heat dissipation element, a heat dissipation path may be formed using a passive element with high thermal conductivity, such as carbon nanotubes or graphene.

[0060] In any of the above embodiments, the discharge unit 124 of the pixel 112 may be omitted. Furthermore, the transfer unit 123 may also be omitted, in which case the storage unit 125 will no longer function as a floating diffusion. The storage unit 125 and pixel output unit 127 may be shared with other pixels. Furthermore, the pixel 112 may be configured with multiple photoelectric conversion units 104 and first transfer units 123.

[0061] Furthermore, in any of the above embodiments, the processing block 220 may not be provided with the exposure control unit 10 and pixel driving unit 20, and reading may be performed mainly for each processing block 220, and conversion may be performed by the signal conversion unit 40. In this case, the exposure time of the pixels 112 is controlled not for each pixel block 120, but for the entire pixel unit 110.

[0062] 8 is a block diagram showing an example of the configuration of an image capturing apparatus 500 according to an embodiment. The image capturing apparatus 500 includes an image sensor 400, a system control unit 501, a drive unit 502, a photometry unit 503, a work memory 504, a recording unit 505, a display unit 506, a drive unit 514, and a photographing lens 520.

[0063] The photographing lens 520 guides the subject light beam incident along the optical axis OA to the image sensor 400. The photographing lens 520 is composed of a group of multiple optical lenses, and focuses the subject light beam from the scene near its focal plane. The photographing lens 520 may be an interchangeable lens that can be attached to and detached from the image capturing device 500. Note that in FIG. 8, the photographing lens 520 is represented by a virtual single lens placed near the pupil.

[0064] The driver 514 drives the photographing lens 520. In one example, the driver 514 changes the focus position by moving the optical lens group of the photographing lens 520. The driver 514 may also drive an iris diaphragm in the photographing lens 520 to control the amount of subject light entering the image sensor 400.

[0065] The drive unit 502 has a control circuit that executes charge accumulation control such as timing control and area control of the image sensor 400 in accordance with instructions from the system control unit 501. Furthermore, the operation unit 508 receives instructions from the photographer using a release button or the like.

[0066] The image sensor 400 passes pixel signals to an image processing unit 511 in the system control unit 501. The image processing unit 511 generates image data by performing various image processes using the work memory 504 as a workspace. For example, when generating image data in JPEG file format, a color video signal is generated from a signal obtained using the Bayer array, and then compression processing is performed. The generated image data is recorded in a recording unit 505 and converted into a display signal, which is then displayed on a display unit 506 for a preset time.

[0067] The photometry unit 503 detects the luminance distribution of a scene prior to a series of shooting sequences for generating image data. The photometry unit 503 includes, for example, an AE sensor with approximately one million pixels. The calculation unit 512 of the system control unit 501 receives the output of the photometry unit 503 and calculates the luminance of each region of the scene.

[0068] The calculation unit 512 determines the shutter speed, aperture value, and ISO sensitivity according to the calculated luminance distribution. The image sensor 400 may also serve as the photometry unit 503. The calculation unit 512 also executes various calculations for operating the imaging device 500. Part or all of the drive unit 502 may be mounted on the image sensor 400. Part of the system control unit 501 may be mounted on the image sensor 400.

[0069] Although the present invention has been described above using embodiments, the technical scope of the present invention is not limited to the scope described in the above embodiments. It will be apparent to those skilled in the art that various modifications and improvements can be made to the above embodiments. It is clear from the claims that such modifications and improvements can also be included within the technical scope of the present invention.

[0070] It should be noted that the execution order of each process, such as operations, procedures, steps, and stages, in the devices, systems, programs, and methods shown in the claims, specifications, and drawings is not specifically stated as "before," "prior to," etc., and that the processes can be performed in any order unless the output of a previous process is used in a subsequent process. Even if the operational flow in the claims, specifications, and drawings is described using "first," "next," etc. for convenience, this does not mean that the processes must be performed in this order. [Explanation of symbols]

[0071] 10 exposure control unit, 20 pixel driving unit, 40 conversion unit, 50 signal output unit, 100 first substrate, 104 photoelectric conversion unit, 110 pixel unit, 112 pixel, 120 pixel block, 121, 121A, 121B pixel current source, 122 signal line, 123 transfer unit, 124 discharge unit, 125 storage unit, 126 reset unit, 127 pixel output unit, 128 amplifier unit, 129 selection unit, 200 second substrate, 210 control circuit unit, 220 processing block, 230 peripheral circuit unit, 240, 250, 260, 270, 370A, 370B heat dissipation element, 241, 251, 241A, 251A, 241B, 251B heat transfer plate, 243, 263 switch, 300 Third substrate, 310 image processing unit, 340, 340A, 340B, 340C, 360, 362, 364 through via, 400 imaging element, 500 imaging device, 501 system control unit, 502 driving unit, 503 photometry unit, 504 work memory, 505 recording unit, 506 display unit, 508 operation unit, 511 image processing unit, 512 calculation unit, 514 driving unit, 520 photographing lens

Claims

1. A first substrate having a pixel section in which multiple pixels are arranged, A second substrate laminated together with the first substrate, the second substrate having a first signal processing unit that processes signals output from at least a first pixel among the plurality of pixels, and a first Peltier element that absorbs heat generated in the first signal processing unit, A third substrate laminated together with the first substrate, having a first heat-conducting portion positioned closer to the first Peltier element than the first signal processing unit, and An image sensor equipped with the following features.

2. In the image sensor according to claim 1, The first heat-conducting portion is positioned closer to the first Peltier element than the first signal processing unit in a first direction that intersects the stacking direction in which the first substrate and the second substrate are stacked. Image sensor.

3. In the image sensor according to claim 2, The first heat-conducting section is positioned closer to the first Peltier element than the first signal processing section in the first direction perpendicular to the stacking direction. Image sensor.

4. In the image sensor according to claim 1, The first heat-conducting portion is positioned opposite the first Peltier element in the stacking direction in which the first substrate and the second substrate are stacked. Image sensor.

5. In the image sensor according to claim 1, The first Peltier element is positioned between the pixel portion and the first heat conduction portion in the stacking direction in which the first substrate and the second substrate are stacked. Image sensor.

6. In the image sensor according to claim 5, The first Peltier element is positioned between the first pixel and the first heat conduction portion in the stacking direction. Image sensor.

7. In the image sensor according to claim 1, The third substrate has a second heat-conducting portion located closer to the first Peltier element than the first signal processing unit. Image sensor.

8. In the image sensor according to claim 7, The first heat-conducting portion and the second heat-conducting portion are positioned opposite the first Peltier element in the stacking direction in which the first substrate and the second substrate are stacked. Image sensor.

9. In the image sensor according to claim 1, The first heat conduction section is thermally connected to the first Peltier element. Image sensor.

10. In the image sensor according to claim 1, The first heat-conducting portion has through vias that penetrate the third substrate, Image sensor.

11. In the image sensor according to claim 1, The second substrate has a second Peltier element that absorbs heat generated in the first signal processing unit, The first signal processing unit is positioned between the first Peltier element and the second Peltier element in a first direction perpendicular to the stacking direction in which the first substrate and the second substrate are stacked. Image sensor.

12. In the image sensor according to claim 11, The third substrate has a second heat-conducting portion located closer to the second Peltier element than the first signal processing unit. Image sensor.

13. In the image sensor according to claim 12, The first heat-conducting portion is positioned opposite the first Peltier element in the stacking direction, The second heat-conducting portion is positioned opposite the second Peltier element in the stacking direction. Image sensor.

14. In the image sensor according to claim 11, The first Peltier element and the second Peltier element are arranged so as to sandwich the first signal processing unit. Image sensor.

15. In the image sensor according to claim 11, The second substrate includes at least a first current source for supplying current to the first pixel, a third Peltier element for absorbing heat from the first current source, and a fourth Peltier element for absorbing heat from the first current source. The first current source is positioned between the third Peltier element and the fourth Peltier element in the first direction. Image sensor.

16. In the image sensor according to claim 1, The second substrate includes at least a first current source for supplying current to the first pixel, and a second Peltier element for absorbing heat from the first current source. Image sensor.

17. In the image sensor according to claim 16, The second substrate includes a first processing unit comprising the first signal processing unit, the first current source, the first Peltier element, and the second Peltier element; a second signal processing unit which processes signals output from at least one of the plurality of pixels, a second pixel arranged alongside the first pixel in a first direction orthogonal to the stacking direction in which the first substrate and the second substrate are stacked, and which is arranged alongside the first signal processing unit in the first direction; a second current source for supplying current to at least the second pixel; a third Peltier element for absorbing heat generated in the second signal processing unit; and a fourth Peltier element for absorbing heat generated in the second current source. The first processing unit and the second processing unit are arranged side by side in the first direction. Image sensor.

18. In the image sensor according to claim 17, The second substrate has a third processing unit which processes signals output from at least a third pixel among the plurality of pixels, which is arranged alongside the first pixel in a second direction orthogonal to the first direction, and which includes a third signal processing unit arranged alongside the first signal processing unit in the second direction, a third current source for supplying current to at least the third pixel, a fifth Peltier element for absorbing heat generated in the third signal processing unit, and a sixth Peltier element for absorbing heat generated in the third current source. Image sensor.

19. In the image sensor according to claim 16, The third substrate has a second heat-conducting portion positioned closer to the second Peltier element than the first current source. Image sensor.

20. In the image sensor according to claim 1, The second substrate has, at least among the plurality of pixels, a second signal processing unit which processes signals output from a second pixel arranged alongside the first pixel in a first direction orthogonal to the stacking direction in which the first substrate and the second substrate are stacked, and a second Peltier element which absorbs heat generated in the second signal processing unit. The third substrate is positioned closer to the second Peltier element than the second signal processing unit and has a second heat conductor positioned alongside the first heat conductor in the first direction. Image sensor.

21. In the image sensor according to claim 20, The first signal processing unit processes the signals output from a third pixel, which is arranged alongside the first pixel in at least a second direction orthogonal to the first direction among the plurality of pixels. Image sensor.

22. In the image sensor according to claim 20, The second substrate includes a third signal processing unit that processes signals output from at least one of the plurality of pixels, a third pixel arranged alongside the first pixel in a second direction orthogonal to the first direction, and a third Peltier element that absorbs heat generated by the third signal processing unit, and a third Peltier element that absorbs heat generated by the third signal processing unit. The third substrate is positioned closer to the third Peltier element than the third signal processing unit and has a third heat conductor positioned alongside the first heat conductor in the second direction. Image sensor.

23. In the image sensor according to claim 1, The first signal processing unit converts the signals output from at least the first pixel into digital signals. Image sensor.

24. In the image sensor according to claim 1, The third substrate has a first image processing unit that performs image processing on at least the signal output from the first pixel. Image sensor.

25. A first substrate having a first photoelectric conversion unit that converts light into electric charge, A substrate laminated together with the first substrate, comprising a first signal processing unit that performs signal processing on a first signal based on the charge converted by the first photoelectric conversion unit, and a second substrate having a semiconductor element comprising a semiconductor of a first conductivity type and a semiconductor of a second conductivity type different from the first conductivity type, and a first thermoelectric element for dissipating heat from the first signal processing unit, A third substrate laminated together with the first substrate, having a first connection portion that is thermally connected to the first thermoelectric element. An image sensor equipped with the following features.

26. In the image sensor according to claim 25, The first connection portion is positioned opposite the first thermoelectric element in the stacking direction in which the first substrate and the second substrate are stacked. Image sensor.

27. In the image sensor according to claim 26, The first thermoelectric element is positioned between the first photoelectric conversion unit and the first connection unit in the stacking direction. Image sensor.

28. In the image sensor according to claim 25, The first connection portion has a through via that penetrates the third substrate. Image sensor.

29. In the image sensor according to claim 25, The second substrate is a semiconductor element comprising a first conductivity type semiconductor and a second conductivity type semiconductor, and has a second thermoelectric element for dissipating heat from the first signal processing unit. The first signal processing unit is positioned between the first thermoelectric element and the second thermoelectric element in a first direction perpendicular to the stacking direction in which the first substrate and the second substrate are stacked. Image sensor.

30. In the image sensor according to claim 29, The third substrate has a second connection portion that is thermally connected to the second thermoelectric element. Image sensor.

31. An imaging device comprising an image sensor according to any one of claims 1 to 30.

32. In the imaging device according to claim 31, An imaging device comprising a second image processing unit that is electrically connected to the aforementioned image sensor and generates image data.

33. In the imaging device according to claim 32, An imaging device comprising a drive unit for driving an optical system that emits light to the image sensor.

34. In the imaging device according to claim 33, An imaging device comprising the aforementioned optical system.

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