Semiconductor device

Abstract

To provide a semiconductor device having less variation of transistor characteristics.SOLUTION: A semiconductor device has: an oxide semiconductor 230; a first conductor 242a and a second conductor 242b on the oxide semiconductor; a first insulator 271a which contacts a top face of the first conductor; a second insulator 271b which contacts a top face of the second conductor; a third insulator 275 which is arranged on the first insulator and the second insulator, and in which an opening is formed in a region between the first conductor and the second conductor in a superimposed manner; a fourth insulator 250 which is arranged on the oxide semiconductor and in a region between the first conductor and the second conductor; and a third conductor 260 on the fourth insulator, where the first insulator and the second insulator are metal oxide having an amorphous structure.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] One embodiment of the present invention relates to a transistor, a semiconductor device, and an electronic device. One embodiment of the present invention relates to a method for manufacturing a semiconductor device. Regarding Eha and modules.

[0002] In this specification and the like, a semiconductor device refers to a device that can function by utilizing semiconductor characteristics. This refers to semiconductor devices in general, including semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory devices. The device is one aspect of a semiconductor device. device, lighting device, electro-optical device, power storage device, memory device, semiconductor circuit, imaging device, electronic device etc. may be said to have a semiconductor device.

[0003] Note that one embodiment of the present invention is not limited to the above technical fields. One aspect of the present invention relates to an article, a method, or a manufacturing method. is a process, machine, manufacture, or composition of matter. This concerns the [Background technology]

[0004] In recent years, the development of semiconductor devices has progressed, especially LSI (Large Scale Integrated Circuits). rated Circuit) and CPU (Central Processing U) The development of CPUs and memory has progressed significantly. The semiconductor integrated circuit (at least a transistor and a memory) has electrodes serving as connection terminals. It is an assembly of semiconductor elements on which

[0005] Semiconductor circuits (IC chips) such as LSI, CPU, and memory are mounted on circuit boards, e.g. It is mounted on a printed wiring board and used as one of the components in various electronic devices.

[0006] In addition, a transistor is formed using a semiconductor thin film formed on a substrate having an insulating surface. This technology is attracting attention. electronic devices such as image display devices (also simply referred to as display devices) Silicon-based semiconductor materials are widely used as semiconductor thin films that can be used in transistors. However, oxide semiconductors are attracting attention as other materials.

[0007] Furthermore, a transistor including an oxide semiconductor has a very low leakage current in a non-conducting state. For example, the leakage current of a transistor using an oxide semiconductor is known to be small. A low-power CPU that utilizes this characteristic has been disclosed (see Patent Document 1). ) In addition, for example, the low leakage current of a transistor using an oxide semiconductor The application of this technology has led to the disclosure of a storage device that can retain stored content for a long period of time. (See Patent Document 2).

[0008] In recent years, with the trend toward smaller and lighter electronic devices, there has been a demand for even higher density integrated circuits. There is also a demand for improved productivity in the manufacture of semiconductor devices including integrated circuits. [Prior art documents] [Patent documents]

[0009] [Patent Document 1] Japanese Patent Application Laid-Open No. 2012-257187 [Patent Document 2] Japanese Patent Application Laid-Open No. 2011-151383 Summary of the Invention [Problem to be solved by the invention]

[0010] One embodiment of the present invention is to provide a semiconductor device with little variation in transistor characteristics. Another object of one embodiment of the present invention is to provide a semiconductor device with high reliability. Another object of one embodiment of the present invention is to provide a semiconductor device having favorable electrical characteristics. Another object of one embodiment of the present invention is to provide a semiconductor having a large on-state current. Another object of one embodiment of the present invention is to provide a device for miniaturization or high integration. Another object of the present invention is to provide a semiconductor device that can be integrated. It is another object of the present invention to provide a semiconductor device with low power consumption.

[0011] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The subject matter will be self-evident from the description, drawings, claims, etc. It is possible to extract other issues from the drawings, claims, etc. [Means for solving the problem]

[0012] One embodiment of the present invention is a semiconductor device including an oxide semiconductor, a first conductor, and a second conductor over the oxide semiconductor. a conductor and a first insulator in contact with the top surface of the first conductor; and a first insulator and a second insulator in contact with the top surface of the second conductor. a second insulator, and a first conductor and a second conductor disposed on the first insulator and the second insulator; a third insulator having an opening formed therein so as to overlap a region between the second conductors; and a third insulator on the oxide semiconductor. and a fourth insulator disposed in a region between the first conductor and the second conductor; and a third conductor on the first insulator, wherein the first insulator and the second insulator have an amorphous structure. The semiconductor device is a metal oxide having a structure.

[0013] One embodiment of the present invention is a semiconductor device including an oxide semiconductor, a first conductor, and a second conductor over the oxide semiconductor. A conductor, a first conductor, and a second conductor are covered, and a gap is formed between the first conductor and the second conductor. a first insulator having an opening formed therein so as to overlap the region; and a first insulating film disposed on the first insulator. a second insulator having an opening formed therein overlapping a region between the first conductor and the second conductor; a third insulator disposed on the semiconductor and in a region between the first conductor and the second conductor; a third conductor on the third insulator, and the first insulator has an amorphous structure. The present invention relates to a semiconductor device in which the metal oxide is a metal oxide.

[0014] One embodiment of the present invention is a semiconductor device including an oxide semiconductor, a first conductor, and a second conductor over the oxide semiconductor. a conductor and a first insulator in contact with the top surface of the first conductor; and a first insulator and a second insulator in contact with the top surface of the second conductor. a second insulator covering the first insulator and the second insulator, and a first conductor and a second conductor a third insulator having an opening formed therein overlapping the region between the first and second insulators; a fourth insulator having an opening formed therein overlapping the region between the first conductor and the second conductor; and a fifth conductive film disposed on the oxide semiconductor and in a region between the first conductive film and the second conductive film. a third conductor on the fifth insulator, The third insulator is a metal oxide having an amorphous structure, and the semiconductor device is.

[0015] In the above, the semiconductor device includes a sixth insulator and a fourth insulator under the oxide semiconductor. and a seventh insulator in contact with the top surface of the third conductor, The insulator is preferably a metal oxide having an amorphous structure.

[0016] In the above, the semiconductor device covers the seventh insulator and does not overlap with the fifth insulator. an eighth insulator in contact with the upper surface of the sixth insulator in the region; It is preferable that the metal oxide has an amorphous structure.

[0017] In the above, the semiconductor device includes a ninth insulator in contact with the lower surface of the sixth insulator, and a seventh insulator and a tenth insulator in contact with the upper surface of the edge, and the ninth insulator and the tenth insulator are , silicon nitride is preferred.

[0018] In the above, the semiconductor device has a dielectric and a fourth conductor, and a second insulator, a third An opening is formed in the third insulator and the fourth insulator, the opening reaching the second conductor, and the dielectric is A second conductor, a side surface of the second insulator, and a third insulator are disposed in the opening. a fourth conductor disposed in the opening and contacting the surface and a side surface of the fourth insulator; It is preferable that the upper surface of the body is in contact with the upper surface of the body.

[0019] In the above, the semiconductor device includes a first nitride semiconductor layer disposed between a first insulator and a third insulator. a nitride insulator and a second nitride insulator disposed between the second insulator and the third insulator; wherein the first nitride insulator and the second nitride insulator are silicon nitride. preferable.

[0020] In the above semiconductor device, the upper surface of the first insulator and the upper surface of the second insulator are It is preferable that the insulating material 3 is in contact with the insulating material.

[0021] In the above, the metal oxide having an amorphous structure is AlO x (x is greater than 0 It is preferable that the number of the suffixes is any number. [Effects of the Invention]

[0022] According to one embodiment of the present invention, a semiconductor device with little variation in transistor characteristics can be provided. According to one embodiment of the present invention, a highly reliable semiconductor device can be provided. According to one embodiment of the present invention, a semiconductor device having favorable electrical characteristics can be provided. According to one embodiment of the present invention, a semiconductor device with a large on-state current can be provided. Alternatively, according to one embodiment of the present invention, a semiconductor that can be miniaturized or highly integrated can be manufactured. According to one embodiment of the present invention, a semiconductor device with low power consumption can be provided. can be provided.

[0023] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have all of these effects. Effects other than these may be included in the description. The above is self-evident from the description, drawings, claims, etc. From the above descriptions, it is possible to extract other effects. [Brief explanation of the drawings]

[0024] [Figure 1] 1A is a top view of a semiconductor device according to one embodiment of the present invention, and FIGS. 1B to 1D are cross-sectional views of the semiconductor device according to one embodiment of the present invention. [Figure 2]FIG. 2 is a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Figure 3] Figure 3A is a diagram explaining the classification of IGZO crystal structures, Figure 3B is a diagram explaining the XRD spectrum of a CAAC-IGZO film, and Figure 3C is a diagram explaining the electron microbeam diffraction pattern of a CAAC-IGZO film. [Figure 4] 4A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 4B to 4D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 5] 5A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 5B to 5D are cross-sectional views illustrating the method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 6] 6A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 6B to 6D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 7] 7A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 7B to 7D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 8] 8A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 8B to 8D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 9] 9A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 9B to 9D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 10] 10A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 10B to 10D are cross-sectional views illustrating the method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 11] 11A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 11B to 11D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 12]12A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 12B to 12D are cross-sectional views illustrating the method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 13] 13A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 13B to 13D are cross-sectional views illustrating the method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 14] 14A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 14B to 14D are cross-sectional views illustrating the method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 15] 15A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 15B to 15D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 16] 16A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 16B to 16D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 17] FIG. 17 is a top view illustrating a microwave processing apparatus according to one embodiment of the present invention. [Figure 18] FIG. 18 is a cross-sectional view illustrating a microwave processing apparatus according to one embodiment of the present invention. [Figure 19] FIG. 19 is a cross-sectional view illustrating a microwave processing apparatus according to one embodiment of the present invention. [Figure 20] 20A is a top view of a semiconductor device according to one embodiment of the present invention, and FIGS. 20B to 20D are cross-sectional views of the semiconductor device according to one embodiment of the present invention. [Figure 21] 21A is a top view of a semiconductor device according to one embodiment of the present invention, and FIGS. 21B to 21D are cross-sectional views of the semiconductor device according to one embodiment of the present invention. [Figure 22] 22A is a top view of a semiconductor device according to one embodiment of the present invention, and FIGS. 22B to 22D are cross-sectional views of the semiconductor device according to one embodiment of the present invention. [Figure 23]23A is a top view of a semiconductor device according to one embodiment of the present invention, and FIGS. 23B to 23D are cross-sectional views of the semiconductor device according to one embodiment of the present invention. [Figure 24] 24A and 24B are cross-sectional views of a semiconductor device according to one embodiment of the present invention. [Figure 25] FIG. 25 is a cross-sectional view illustrating a configuration of a memory device according to one embodiment of the present invention. [Figure 26] FIG. 26 is a cross-sectional view illustrating a configuration of a memory device according to one embodiment of the present invention. [Figure 27] 27A and 27B are cross-sectional views of a semiconductor device according to one embodiment of the present invention. [Figure 28] 28A and 28B are cross-sectional views of a semiconductor device according to one embodiment of the present invention. [Figure 29] FIG. 29 is a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Figure 30] FIG. 30 is a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Figure 31] 31A and 31B are block diagrams illustrating a configuration example of a storage device according to one embodiment of the present invention. [Figure 32] 32A to 32H are circuit diagrams illustrating configuration examples of a memory device according to one embodiment of the present invention. [Figure 33] FIG. 33 is a diagram showing various storage devices by hierarchy. [Figure 34] 34A and 34B are block diagrams and schematic diagrams of a semiconductor device according to one embodiment of the present invention. [Figure 35] 35A and 35B are diagrams illustrating an example of an electronic component. [Figure 36] 36A to 36E are schematic diagrams of a memory device according to one embodiment of the present invention. [Figure 37] 37A to 37H are diagrams showing electronic devices according to one embodiment of the present invention. [Figure 38] 38A to 38C are schematic diagrams illustrating a method for calculating the operating frequency according to this embodiment. [Figure 39] Fig. 39A is a diagram showing electrical characteristics of a sample according to this example, and Fig. 39B is a diagram showing the results of calculating the operating frequency of the sample according to this example. [Figure 40] 40A and 40B are diagrams showing the stress time dependency of ΔVsh in the +GBT stress test according to this example. [Figure 41] FIG. 41 is a schematic diagram of a sample according to this example. [Figure 42] Figure 42A is a TEM image according to this example, and Figure 42B is an FFT image according to this example. [Figure 43] Figure 43A is a TEM image according to this example, and Figure 43B is an FFT image according to this example. [Figure 44] Figure 44A is a TEM image according to this example, and Figure 44B is an FFT image according to this example. [Figure 45] FIG. 45 is a diagram showing the deuterium concentration of the sample according to this example. DETAILED DESCRIPTION OF THE INVENTION

[0025] Hereinafter, embodiments will be described with reference to the drawings. It is understood that the present invention may be practiced in various different ways without departing from its spirit and scope. It will be readily apparent to those skilled in the art that various changes in form and details may be made. Therefore, the present invention should not be construed as being limited to the description of the following embodiments.

[0026] In the drawings, the size, thickness of layers, or areas may be exaggerated for clarity. Therefore, the drawings are not necessarily limited to the scale. The examples are shown in the drawings as a schematic illustration, and are not limited to the shapes or values ​​shown in the drawings. For example, In the actual manufacturing process, layers and resist masks are damaged by etching and other processes. However, in order to make it easier to understand, this may not be reflected in the diagram. In the drawings, the same parts or parts having similar functions are designated by the same reference numerals between different drawings. In addition, when referring to similar functions, In such cases, the hatch pattern may be the same and no particular reference numeral may be assigned.

[0027] In addition, the invention can be easily understood, especially in top views (also called "plan views") and perspective views. In order to simplify the description, some components may be omitted. The information may be omitted.

[0028] In addition, in this specification, ordinal numbers such as 1st, 2nd, etc. are used for convenience. It does not indicate the order of processes or stacking. For example, "first" may be changed to "second" The term "the" or "third" can be used interchangeably in the description. The ordinal numbers listed may not match the ordinal numbers used to identify an aspect of the present invention. There may be cases where this is the case.

[0029] In addition, in this specification, terms indicating arrangement such as "above" and "below" refer to the relationship between components. The positional relationship is used for convenience in describing the same with reference to the drawings. The relationship changes depending on the direction in which each component is depicted. The terms are not limited to those described above, and can be rephrased appropriately depending on the situation.

[0030] Furthermore, in this specification and the like, when it is explicitly stated that X and Y are connected, In this case, X and Y are electrically connected, and X and Y are functionally connected. The case where X and Y are directly connected and the case where X and Y are directly connected are both disclosed in the present specification. Therefore, the connection relationships are not limited to those shown in the drawings or text. The drawings and text do not include any connection relationships other than those shown in the drawings or text. Here, X and Y are the objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, Conductive film, layer, etc.

[0031] In this specification, a transistor includes a gate, a drain, and a source. It is an element having at least three terminals including a drain (drain terminal, drain Between the drain electrode and the source terminal The channel forming region is formed in the channel. A current can be passed between the source and the drain through the channel forming region. In this specification and the like, the channel formation region refers to a region through which current mainly flows.

[0032] In addition, there may be cases where transistors with polarity different from that described in the specification or drawings are used, or where circuit operation is different from that described in the specification or drawings. When the direction of current changes during operation, the functions of the source and drain are interchangeable. Therefore, in this specification and the like, the terms source and drain are used interchangeably. may be used interchangeably.

[0033] Note that the channel length is, for example, the length of a semiconductor (or transistor) in a top view of a transistor. When the transistor is in the on state, the gate electrode overlaps with the semiconductor (the part where current flows). The source (source region or source electrode) in the region where the source is formed or the channel forming region This refers to the distance between the transistor and the drain (drain region or drain electrode). In a transistor, the channel length does not necessarily have the same value in all regions. The channel length of the transistor may not be determined to a single value. In the case of the channel formation region, the channel length is either one value, a maximum value, a minimum value, or is the average value.

[0034] The channel width is, for example, the width of the semiconductor (or transistor) in a top view of the transistor. The area where the gate electrode overlaps with the semiconductor (the part of the semiconductor where current flows when the semiconductor is on). In the channel forming region, the channel is formed in a direction perpendicular to the channel length direction. The length of the formation region. In one transistor, the channel width is the length of the entire region. In other words, the channel width of a transistor does not necessarily take the same value. Therefore, in this specification, the channel width is determined based on the channel forming region. The value is any one of the values, the maximum value, the minimum value, or the average value.

[0035] In this specification and the like, depending on the structure of the transistor, the channel may not actually be formed. The channel width in the region where the transistor is The channel width shown in a top view of the star (hereinafter also referred to as the "apparent channel width") For example, if the gate electrode covers the side of the semiconductor, the effective When the channel width becomes larger than the apparent channel width and its effect cannot be ignored For example, in a transistor that is miniaturized and in which the gate electrode covers the side of the semiconductor, The proportion of the channel formation region formed on the side surface may become large. The effective channel width is larger than the upper channel width.

[0036] In such cases, it may be difficult to estimate the effective channel width through actual measurements. For example, to estimate the effective channel width from the design value, the shape of the semiconductor must be known. Therefore, if the shape of the semiconductor is not known accurately, the effective Channel width is difficult to measure accurately.

[0037] In this specification, when simply referring to the channel width, it refers to the apparent channel width. In this specification, when simply referred to as a channel width, it means an effective channel The channel length, channel width, effective channel width, apparent channel width, The channel width and other parameters can be determined by analyzing cross-sectional TEM images. can.

[0038] The impurities in a semiconductor refer to, for example, anything other than the main component that constitutes the semiconductor. Elements with a concentration of less than 0.1 atomic percent can be considered impurities. This can cause problems such as an increase in the density of defect levels in semiconductors and a decrease in crystallinity. When the semiconductor is an oxide semiconductor, impurities that change the properties of the semiconductor include, for example, , Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, oxide semiconductors There are transition metals other than the main component, such as hydrogen, lithium, sodium, silicon, These include boron, phosphorus, carbon, and nitrogen. Water can also act as an impurity. In addition, for example, impurities may be mixed in the oxide semiconductor, causing oxygen vacancies (V O :oxygen va A cancy (also called a cyst) may form.

[0039] In this specification, an oxynitride is a compound containing more oxygen than nitrogen. For example, silicon oxynitride has a composition in which oxygen is more abundant than nitrogen. Nitrogen oxide has a higher nitrogen content than oxygen in its composition. For example, silicon nitride oxide has a higher nitrogen content than oxygen content. many.

[0040] In addition, in this specification, the term "insulator" may be replaced with "insulating film" or "insulating layer." The term "conductor" can also be replaced with "conductive film" or "conductive layer." The term "semiconductor" can also be replaced with "semiconductor film" or "semiconductor layer." can.

[0041] In addition, in this specification, "parallel" means that two straight lines are at an angle of -10 degrees or more and 10 degrees or less. Therefore, it includes cases where the angle is between -5 degrees and 5 degrees. In addition, "approximately parallel" means that two straight lines are arranged at an angle of between -30 degrees and 30 degrees. Also, "perpendicular" means that two straight lines are arranged at an angle of 80 degrees or more and 100 degrees or less. Therefore, it includes the case where the angle is between 85 degrees and 95 degrees. "Perpendicular" refers to two straight lines that form an angle between 60 degrees and 120 degrees.

[0042] In this specification, the term "metal oxide" refers to a metal in a broad sense. Metal oxides are oxides of the following: oxide insulators, oxide conductors (including transparent oxide conductors), ), oxide semiconductor (also called oxide semiconductor or simply OS) For example, when a metal oxide is used in the semiconductor layer of a transistor, Such a metal oxide may be referred to as an oxide semiconductor. In this case, the transistor may be referred to as a transistor having a metal oxide or an oxide semiconductor. can be done.

[0043] In this specification, normally off means that no potential is applied to the gate, or When a ground potential is applied to the gate, the drain current per 1 μm of channel width that flows through the transistor is The input current is 1×10 at room temperature. -20 A or less, 1 x 10 at 85°C -18 Below A , or 1 × 10 at 125°C -16 This means that it is A or below.

[0044] (Embodiment 1) In this embodiment, a transistor 20 according to one embodiment of the present invention will be described with reference to FIGS. 1 to 24. An example of a semiconductor device having 0 and a manufacturing method thereof will be described.

[0045] <Configuration example of semiconductor device> The structure of a semiconductor device including a transistor 200 will be described with reference to FIGS. 1A to 1D. FIG. 1A is a top view of the semiconductor device. Also, FIGS. 1B to 1D are views of the semiconductor device. 1B is a cross-sectional view of the device, taken along the dashed line A1-A2 in FIG. 1C is a cross-sectional view of the transistor 200 in the channel length direction. 1A is a cross-sectional view of the portion indicated by the dashed line A3-A4 in FIG. 1A, showing the channel of the transistor 200. FIG. 1D is also a cross-sectional view in the width direction. Note that in the top view of FIG. 1A, some elements have been omitted for clarity. .

[0046] The semiconductor device according to one embodiment of the present invention includes an insulator 212 on a substrate (not shown) and a the insulator 214 on the transistor 200; an insulator 280, an insulator 282 on the insulator 280, and an insulator 283 on the insulator 282; The insulators 212, 214, 280, 282, and 283 are 83 functions as an interlayer film. It is also electrically connected to the transistor 200 and serves as a plug. The conductor 240 (conductor 240a and conductor 240b) functions as a The insulator 241 (insulator 241a and An insulator 241b is provided on the insulator 283 and the conductor 240. The conductor 246 (conductor 246a, The conductor 246 and the insulator 283 are provided with: An insulator 286 is provided.

[0047] Insulator 241 is in contact with the inner walls of the openings of insulators 280, 282, and 283. a is provided, and the first conductor of the conductor 240a is provided in contact with the side surface of the insulator 241a. , and a second conductor of the conductor 240a is provided further inside. An insulator 241b is provided in contact with the inner walls of the openings of the insulators 282 and 283. The first conductor of the conductor 240b is provided in contact with the side surface of the edge 241b, and the conductor The second conductor 240b is provided. Here, the height of the upper surface of the conductor 240 and The height of the upper surface of the insulator 283 in the area overlapping with the conductor 246 can be made to be approximately the same. In transistor 200, a first conductor of conductor 240 and a second conductor of conductor 240 Although a body stacking configuration is shown, the present invention is not limited to this. The conductor 240 may be a single layer or a laminated structure of three or more layers. When a body has a layered structure, ordinal numbers may be assigned to indicate the order of formation to distinguish them.

[0048] [Transistor 200] As shown in FIGS. 1A-1D, transistor 200 includes an insulator 21 on an insulator 214. 6, and the conductor 205 (conductor 205a, conductor the insulator 216 and the conductor 205. an insulator 222, an insulator 224 on the insulator 222, and an oxide 230a on the insulator 224; The oxide 230b on the oxide 230a and the oxide 243 on the oxide 230b (oxide 24 3a, and oxide 243b), conductor 242a on oxide 243a, and conductor 242 a, an insulator 271a on the insulator 271a, an insulator 273a on the insulator 271a, and a conductor 243b on the oxide 243b. conductor 242b, insulator 271b on conductor 242b, and insulator 271b on insulator 271b. 3b, an insulator 250 on the oxide 230b, and a layer of oxide 230b located on the insulator 250. The conductor 260 (conductor 260a and conductor 260b) overlapping with a part of the oxide 23 The insulator 272a contacts the side of the oxide 243a and the side of the conductor 242a. and contacts the side of the oxide 230b, the side of the oxide 243b, and the side of the conductor 242b. Insulator 272b, insulator 224, insulator 272a, insulator 272b, insulator 273a, and an insulator 275 disposed on the insulator 273b. 1C, the upper surface of the conductor 260 is at least partially overlapped with the upper surface of the insulator 250. and is disposed so as to be substantially flush with at least a portion of the upper surface of the insulator 280. In addition, the insulator 282 is formed on each of the conductor 260, the insulator 250, and the insulator 280. contact with at least a portion of the surface.

[0049] In the following, the oxide 230a and the oxide 230b will be collectively referred to as the oxide 230. In addition, the insulator 271a and the insulator 271b may be collectively referred to as the insulator 271. In addition, the insulator 272a and the insulator 272b may be collectively referred to as the insulator 272. In addition, the insulators 273a and 273b may be collectively referred to as the insulator 273. Furthermore, the conductor 242a and the conductor 242b may be collectively referred to as the conductor 242.

[0050] Insulator 280 and insulator 275 are provided with openings that reach oxide 230b. An insulator 250 and a conductor 260 are disposed within the opening. In the channel length direction of 200, the insulator 271a, the insulator 273a, the conductor 242a, and and oxide 243a, insulator 271b, insulator 273b, conductor 242b and oxide A conductor 260 and an insulator 250 are provided between the insulator 243b and the insulator 250. has a region in contact with the side surface of the conductor 260 and a region in contact with the bottom surface of the conductor 260. .

[0051] The oxide 230 is made up of an oxide 230a disposed on the insulator 224 and an oxide 230b disposed on the insulator 224. The oxide 230b is preferably disposed on the upper surface of the insulating film 230. By having the oxide 230a, the oxide 230a can be removed from the structure formed below the oxide 230a. This can suppress the diffusion of impurities into 30b.

[0052] In the transistor 200, the oxide 230 is divided into oxide 230a and oxide 23 0b are stacked, the present invention is not limited to this. For example, a single layer of oxide 230b or a laminated structure of three or more layers may be provided. Alternatively, the oxide 230a and the oxide 230b may each have a stacked structure.

[0053] The conductor 260 functions as a first gate (also called a top gate) electrode. 205 functions as a second gate (also called a back gate) electrode. 250 serves as the first gate insulator, and insulator 224 serves as the second gate insulator. The conductor 242a functions as either a source or a drain, and The body 242b functions as the other of the source and drain. At least a portion of the region overlapping with the body 260 functions as a channel forming region.

[0054] Here, an enlarged view of the vicinity of the channel formation region in FIG. 1B is shown in FIG. 2. The oxide 230b is formed in the region 230, which functions as a channel forming region of the transistor 200. 0bc and region 230bc are provided to sandwich the region, and are used as source regions or drain regions. The region 230bc has at least one functional region 230ba and one functional region 230bb. In other words, the region 230bc overlaps the conductor 24. The region 230ba is located between the conductor 242a and the conductor 242b. The region 230bb is provided overlapping the conductor 242b. do.

[0055] The region 230bc, which functions as a channel forming region, is formed by the region 230ba and the region 230 Compared to bb, it has fewer oxygen vacancies or a lower impurity concentration, resulting in a high resistance with a low carrier concentration. Also, the region 230ba and the region 230b functioning as a source region or a drain region are The region 230bb has many oxygen vacancies or high impurity concentrations such as hydrogen, nitrogen, and metal elements. This is a region where the carrier concentration is increased and the resistance is reduced due to the high temperature. The 0ba and region 230bb have a higher carrier concentration and a lower resistance than the region 230bc. This is a challenging area.

[0056] Here, the carrier concentration of the region 230bc that functions as a channel forming region is 1×10 18 cm -3 Preferably, it is 1×10 or less. 17 cm -3 Less than is preferable 1×10 16 cm -3 More preferably, it is less than 1×10 13 cm -3 More preferably, it is less than 1×10 12 cm -3 It is even more preferable that it is less than Regarding the lower limit of the carrier concentration of the region 230bc that functions as a channel forming region, There is no particular limitation on the size, but for example, 1×10 -9 cm -3It can be said that:

[0057] In addition, a carrier concentration is equal to or lower than the carrier concentration of the region 230ba and the region 230bb. , a region with a carrier concentration equal to or higher than that of region 230bc is formed. That is, the area may be the area 230bc and the area 230ba or the area 230bb. The junction region functions as a junction region. The junction region has a hydrogen concentration equal to that of the region 230ba and the region 2 The hydrogen concentration is equal to or lower than that of 30bb, and is equal to that of region 230bc. The junction region may be higher than the oxygen vacancy region 230. The oxygen vacancies in ba and area 230bb are equal to or less than those in area 230bc The oxygen deficiency may be equal to or greater than that of the

[0058] In FIG. 2, the regions 230ba, 230bb, and 230bc are oxide 2 30b, the present invention is not limited to this. For example, each of the above regions may be formed not only with oxide 230b but also with oxide 230a. .

[0059] In addition, it may be difficult to clearly detect the boundaries of each region in the oxide 230. The concentrations of metal elements and impurity elements such as hydrogen and nitrogen detected in each region are The change is not limited to a stepwise change for each region, but may be continuous within each region. The closer to the channel forming region, the more metal elements, hydrogen, nitrogen, etc. It is sufficient that the concentration of the impurity element is reduced.

[0060] The transistor 200 includes an oxide 230 (oxide 230a and and oxide 230b) and a metal oxide (hereinafter also referred to as an oxide semiconductor) that functions as a semiconductor. It is preferable to use

[0061] In addition, the metal oxide that functions as a semiconductor has a band gap of 2 eV or more, preferably It is preferable to use a material with a band gap of 2.5 eV or more. By using a metal oxide, the off-state current of a transistor can be reduced.

[0062] The oxide 230 may be, for example, In-M-Zn, which has indium, element M, and zinc. Oxides (element M is aluminum, gallium, yttrium, tin, copper, vanadium, Sodium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, la tantalum, tungsten, or magnesium It is preferable to use a metal oxide such as one or more selected from the group consisting of aluminum, etc. 230, In-M oxide, In-Ga oxide, In-Zn oxide, Indium oxide M-Zn oxide, M-Zn oxide, and oxide of element M may also be used.

[0063] Here, the atomic ratio of In to element M in the metal oxide used for the oxide 230b is is greater than the atomic ratio of In to element M in the metal oxide used for oxide 230a. It is preferable that it is large.

[0064] In this way, by disposing the oxide 230a under the oxide 230b, the oxide 230a Diffusion of impurities and oxygen from structures formed below the oxide 230b This can suppress dispersion.

[0065] In addition, the oxide 230a and the oxide 230b have a common element other than oxygen (main component). By doing so, the defect level density at the interface between the oxide 230a and the oxide 230b is reduced. The defect state density at the interface between the oxide 230a and the oxide 230b can be reduced. Therefore, the influence of interface scattering on carrier conduction is small, resulting in a high on-current. is obtained.

[0066] The oxide 230b preferably has crystallinity. CAAC-OS(c-axis aligned crystalline ox It is preferable to use a semiconductor device.

[0067] CAAC-OS has a highly crystalline and dense structure, and is free of impurities and defects (e.g., Oxygen deficiency (V O ) and other metal oxides with low levels of metal. Heat treatment is carried out at a temperature at which the oxide does not become polycrystalline (for example, 400°C or higher and 600°C or lower). By doing so, the CAAC-OS can have a more highly crystalline and dense structure. In this way, by increasing the density of the CAAC-OS, it is possible to remove impurities in the CAAC-OS. Alternatively, the diffusion of oxygen can be further reduced.

[0068] On the other hand, it is difficult to identify clear grain boundaries in CAAC-OS. Therefore, the decrease in electron mobility due to the CAAC-OS is unlikely to occur. Metal oxides have stable physical properties. Therefore, metal oxides with CAAC-OS Heat resistant and highly reliable.

[0069] In a transistor using an oxide semiconductor, a region where a channel is formed in the oxide semiconductor The presence of impurities and oxygen vacancies can cause fluctuations in electrical characteristics and reduce reliability. In addition, hydrogen atoms near the oxygen vacancies are converted into hydrogen atoms (hereinafter referred to as V O Call it H ) and generate electrons that act as carriers. If there are oxygen vacancies in the region where the channel is formed in the semiconductor, the transistor will not function properly. Mari-on characteristics (a channel exists even when no voltage is applied to the gate electrode, and the transistor Therefore, a channel is formed in the oxide semiconductor. In the region, impurities, oxygen vacancies, and V O It is preferable that H is reduced as much as possible. In other words, the carrier concentration in the region where the channel is formed in the oxide semiconductor is reduced. Preferably, the material is i-type (intrinsic) or substantially i-type.

[0070] On the other hand, oxygen that is desorbed by heating (hereinafter referred to as excess oxygen) is present near the oxide semiconductor. By providing an insulator containing SiO 2 and performing heat treatment, an oxide semiconductor can be obtained from the insulator. It supplies oxygen to the body and prevents oxygen deficiency and V O However, the source area If an excessive amount of oxygen is supplied to the drain or gate region, the on-current of the transistor 200 will decrease. This may cause a decrease in the field effect mobility or a decrease in the source region. The amount of oxygen supplied to the drain region varies within the substrate surface, resulting in a transistor having a This results in variations in the characteristics of the semiconductor device.

[0071] Therefore, in the oxide semiconductor, the region 230bc functioning as a channel formation region is The carrier concentration is reduced, and the source region is preferably i-type or substantially i-type. The regions 230ba and 230bb function as a drain region or a carrier It is preferable that the concentration is high and that the oxide semiconductor region 230bc is n-type. Deficiency, and V O H is reduced, and an excessive amount of oxygen is added to the regions 230ba and 230bb. It is preferable to prevent the supply of

[0072] Therefore, in this embodiment, the conductor 242a and the conductor 242b are formed on the oxide 230b. With the above structure in place, microwave treatment was performed in an oxygen-containing atmosphere, and the oxygen vacancies in the region 230bc were , and V O Here, microwave processing is a method of using microwaves to reduce H. This refers to a process using equipment with a power source that generates high-density plasma.

[0073] By microwave treatment in an atmosphere containing oxygen, microwaves or high frequency waves such as RF can be used. The oxygen gas can be converted into plasma using the oxygen plasma. Alternatively, microwaves or high frequencies such as RF can be irradiated onto the region 230bc. Due to the effects of Zuma, microwaves, etc., V in the area 230bc O H is split and hydrogen H is transferred to region 2 Removed from 30bc, oxygen-deficient V O can be supplemented with oxygen. In bc, "V O H→H+V O " reaction occurs, and the hydrogen concentration in the region 230bc Therefore, the oxygen vacancies in the region 230bc and the V O Reduces H, The carrier concentration can be reduced.

[0074] In addition, when microwave processing is performed in an atmosphere containing oxygen, high frequency waves such as microwaves or RF The action of the waves, oxygen plasma, etc. is shielded by the conductors 242a and 242b. 230ba and region 230bb. Furthermore, the action of the oxygen plasma is 230b, and an insulator 271, an insulator 273, which are provided to cover the conductor 242. This can be reduced by the insulators 275 and 280. During microwave treatment, V O Reduction of H and excess Since an excessive amount of oxygen is not supplied, a decrease in the carrier concentration can be prevented.

[0075] In this way, oxygen vacancies and V are selectively formed in the oxide semiconductor region 230bc. O H It can be removed to make the region 230bc i-type or substantially i-type. The regions 230ba and 230bb function as source and drain regions. This suppresses the supply of oxygen and maintains the n-type. The fluctuation of the electrical characteristics of the transistor 200 is suppressed, and the electrical characteristics of the transistor 200 vary within the substrate surface. This can suppress the

[0076] By using the above-described configuration, a semiconductor device with little variation in transistor characteristics can be provided. It is also possible to provide a semiconductor device with good reliability. A semiconductor device having good electrical characteristics can be provided.

[0077] In FIG. 1 and the like, the side surface of the opening in which the conductor 260 and the like are embedded is made of the oxide 230b. The grooves are also generally perpendicular to the surface on which the oxide 230b is formed. The shape is not limited to this. For example, the bottom of the opening has a gently curved surface. In addition, for example, the side surface of the opening may be a surface on which the oxide 230b is to be formed. It may be inclined with respect to

[0078] Also, as shown in FIG. 1C, in a cross-sectional view of the transistor 200 in the channel width direction, The oxide 230b may have a curved surface between the side surface and the top surface of the oxide 230b. The edges of the side surfaces and the edges of the top surface may be curved (also called rounded).

[0079] The radius of curvature of the curved surface is greater than 0 nm, and the oxide 2 in the region overlapping with the conductor 242 30b, or less than half the length of the region not having the curved surface. The radius of curvature of the curved surface is preferably more than 0 nm and not more than 20 nm. , preferably 1 nm or more and 15 nm or less, and more preferably 2 nm or more and 10 nm or less. By forming the insulating material 250 and the conductor 260 in this shape, the oxide 230b This can improve the coverage of the surface.

[0080] The oxide 230 preferably has a stacked structure of multiple oxide layers with different chemical compositions. Specifically, in the metal oxide used for the oxide 230a, the metal element that is the main component The atomic ratio of the element M to be used in the oxide 230b is the same as that of the metal oxide used in the oxide 230b. It is preferable that the atomic ratio of element M to the group element is larger than that of element M. In the metal oxide used, the atomic ratio of element M to In is It is preferable that the atomic ratio of element M to In in the metal oxide is larger than that of element M. In the metal oxide used for the oxide 230b, the atomic ratio of In to the element M is In the metal oxide used in 230a, the atomic ratio of In to element M is greater than that preferable.

[0081] The oxide 230b is preferably a crystalline oxide such as CAAC-OS. Crystalline oxides such as CAAC-OS are preferable because they contain impurities and defects (oxygen vacancies, etc.). Therefore, the source electrode or the drain electrode has a dense structure with a high crystallinity. It is possible to suppress the extraction of oxygen from the oxide 230b by the electrode. Even if heat treatment is performed, oxygen is reduced from being extracted from the oxide 230b. The transistor 200 is stable against high temperatures (so-called thermal budget) during the manufacturing process. It is fixed.

[0082] Here, at the junction between the oxide 230a and the oxide 230b, the conduction band minimum is gradually In other words, the conduction band edge at the junction between the oxide 230a and the oxide 230b changes as follows: In other words, it can be said that the acid changes or bonds continuously. When the defect level density of the mixed layer formed at the interface between the oxide 230a and the oxide 230b is reduced, good.

[0083] Specifically, the oxide 230a and the oxide 230b have a common element as a main component other than oxygen. By using the oxide 2, it is possible to form a mixed layer with a low defect level density. When 30b is an In-M-Zn oxide, the oxide 230a is an In-M-Zn oxide, M-Zn oxide, oxide of element M, In-Zn oxide, indium oxide, etc. good.

[0084] Specifically, the oxide 230a is In:M:Zn=1:3:4 [atomic ratio] or or a composition in the vicinity thereof, or In:M:Zn=1:1:0.5 [atomic ratio] or in the vicinity thereof In addition, a metal oxide having a composition similar to that of In:M:Zn may be used as the oxide 230b. 1:1:1 [atomic ratio] or a composition close to that, or In:M:Zn=4:2:3 [ It is sufficient to use a metal oxide having a composition of the atomic ratio or a composition close to that. The range of the desired atomic ratio is ±30%. In addition, gallium is used as the element M. is preferred.

[0085] When a metal oxide film is formed by sputtering, the above atomic ratio is The atomic ratio of the metal oxide is not limited to the atomic ratio of the sputtering target used for forming the metal oxide film. It may also be the atomic ratio of the dots.

[0086] By configuring the oxide 230a and the oxide 230b as described above, the oxide 230a and the oxide Therefore, the defect level density at the interface with the oxide 230b can be reduced. The influence of disturbances on carrier conduction is reduced, and the transistor 200 has a large on-current and and high frequency characteristics can be obtained.

[0087] Insulator 212, insulator 214, insulator 271, insulator 272, insulator 275, insulator 2 At least one of the insulating material 82, the insulating material 283, and the insulating material 286 is configured to prevent impurities such as water and hydrogen from Diffusion into the transistor 200 from the substrate side or from above the transistor 200 Therefore, the insulator 212 preferably functions as a barrier insulating film that suppresses the body 214, insulator 271, insulator 272, insulator 275, insulator 282, insulator 283, At least one of the insulators 286 is a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, or a hydrogen atom. Suppresses the diffusion of impurities such as nitrogen oxide molecules (N2O, NO, NO2, etc.) and copper atoms. It is preferable to use an insulating material that has the function (that is, that is difficult for the impurities to permeate). , which has the function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.) It is preferable to use an insulating material that is permeable to the oxygen.

[0088] In this specification, the term "barrier insulating film" refers to an insulating film having barrier properties. In this specification, the term "barrier property" refers to the function of suppressing the diffusion of a corresponding substance (low permeability). It also refers to the capture and fixation of the corresponding substance (gettering). This refers to the function.

[0089] Insulator 212, insulator 214, insulator 271, insulator 272, insulator 275, insulator 2 82, insulator 283, and insulator 286 include impurities such as water and hydrogen, and oxygen. It is preferable to use an insulator that has the function of suppressing the diffusion of aluminum oxide. Magnesium oxide, hafnium oxide, gallium oxide, indium gallium zinc oxide , silicon nitride, or silicon oxynitride, etc. can be used. 12, the insulator 272, the insulator 283, and the insulator 286 have higher hydrogen barrier properties. It is preferable to use silicon nitride or the like. 71, insulator 275, and insulator 282, which function to capture and fix hydrogen. It is preferable to use aluminum oxide or magnesium oxide, which have a high thermal conductivity. As a result, impurities such as water and hydrogen pass through the insulators 212 and 214 from the substrate side. It is possible to prevent impurities such as water and hydrogen from diffusing to the transistor 200 side. The impurity is formed on the outer side of the insulator 286, such as the interlayer insulating film. Alternatively, oxygen contained in the insulator 224 can be prevented from diffusing to the oxygen side. , and the diffusion to the substrate side through the insulator 212 and the insulator 214 can be suppressed. Alternatively, oxygen contained in the insulator 280 or the like can be transferred to the transistor via the insulator 282 or the like. In this way, the diffusion of the ions above the transistor 200 can be suppressed. 00 is an insulator 212 having a function of suppressing the diffusion of impurities such as water and hydrogen, and oxygen. , insulator 214, insulator 271, insulator 272, insulator 275, insulator 282, insulator 2 83 and an insulator 286.

[0090] Here, the insulator 212, the insulator 214, the insulator 271, the insulator 272, the insulator 275, The insulators 282, 283, and 286 are made of amorphous oxides. It is preferable to use an oxide such as AlO. x (x is any number greater than 0), or M gO y It is preferable to use a metal oxide such as (y is any number greater than 0). In metal oxides with an amorphous structure, oxygen atoms have dangling bonds. These dangling bonds may have the property of capturing or fixing hydrogen. Such a metal oxide having an amorphous structure is used as a component of the transistor 200. or provided around the transistor 200, the water contained in the transistor 200 The transistor 200 can capture or fix hydrogen present in the element or the surroundings of the transistor 200. In particular, trapping or fixing hydrogen contained in the channel forming region of the transistor 200 It is preferable that the metal oxide having an amorphous structure is used as a component of the transistor 200. By using it as a transistor or by providing it around the transistor 200, it has good characteristics and reliability. Therefore, a high-performance transistor 200 and a semiconductor device can be manufactured.

[0091] In addition, the insulators 212, 214, 271, 272, 275, and The insulator 282, the insulator 283, and the insulator 286 preferably have an amorphous structure. However, a polycrystalline region may be formed in part. 214, insulator 271, insulator 272, insulator 275, insulator 282, insulator 283, and The insulator 286 has a multilayer structure in which an amorphous structure layer and a polycrystalline structure layer are stacked. For example, a layer having a polycrystalline structure formed on a layer having an amorphous structure may be used. It may also have a layered structure.

[0092] Insulator 212, insulator 214, insulator 271, insulator 272, insulator 275, insulator 2 The insulating film 82, the insulator 283, and the insulator 286 are formed by, for example, sputtering. Since the sputtering method does not require the use of hydrogen as a deposition gas, the insulator 212 , insulator 214, insulator 271, insulator 272, insulator 275, insulator 282, insulator 2 The hydrogen concentration in the insulating layer 83 and the insulating layer 286 can be reduced. The method is not limited to the evaporating method, but may be a chemical vapor deposition (CVD) method. por Deposition method, molecular beam epitaxy (MBE) Beam Epitaxy, Pulsed Laser Deposition (PLD) Atomic Layer Deposition (ALD) method, Atomic Layer Deposition (ALD) method, The position method may also be used as appropriate.

[0093] It is also preferable that the resistivity of the insulators 212, 283, and 286 be low. For example, the resistivity of the insulator 212, the insulator 283, and the insulator 286 may be Approximately 1 x 10 13 By setting the resistance to Ωcm, it is possible to use plasma in the semiconductor device manufacturing process. In this case, the insulator 212, the insulator 283, and the insulator 286 are 242, conductor 260, or conductor 246. The resistivity of the insulator 212, the insulator 283, and the insulator 286 is preferably 1×10 10 Ωcm or more 1×10 15 Ωcm or less.

[0094] In addition, the insulators 216 and 280 have a lower dielectric constant than the insulator 214. It is preferable to use a material with a low dielectric constant as the interlayer film to reduce the parasitic capacitance that occurs between wirings. For example, the insulators 216 and 280 may be made of silicon oxide, silicon dioxide, or the like. Silicon nitride, silicon oxynitride, silicon nitride, silicon oxide doped with fluorine, carbon silicon oxide doped with carbon and nitrogen, silicon oxide with vacancies Recon or the like may be used as appropriate.

[0095] The conductor 205 is disposed so as to overlap the oxide 230 and the conductor 260. The conductor 205 is preferably embedded in an opening formed in the insulator 216. Note that a part of the conductor 205 may be embedded in the insulator 214. .

[0096] The conductor 205 includes a conductor 205a, a conductor 205b, and a conductor 205c. The conductor 205a is provided in contact with the bottom surface and sidewall of the opening. The conductive material 205a is embedded in a recess formed in the conductive material 205a. The upper surface of the conductor 205b is lower than the upper surface of the conductor 205a and the upper surface of the insulator 216. 05c is provided in contact with the upper surface of the conductor 205b and the side surface of the conductor 205a. Here, the height of the upper surface of the conductor 205c is the height of the upper surface of the conductor 205a and the height of the insulator 216. In other words, the height of the upper surface of the conductor 205b is approximately the same as that of the conductor 205a and the conductor 205b. The composition will be wrapped in 05c.

[0097] Here, the conductors 205a and 205c are hydrogen atoms, hydrogen molecules, water molecules, nitrogen Diffusion of impurities such as atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), copper atoms, etc. It is preferable to use a conductive material that has the function of suppressing the diffusion of oxygen (e.g., A conductive material having a function of suppressing the diffusion of at least one of oxygen atoms, oxygen molecules, etc. is used. It is preferable that

[0098] The conductor 205a and the conductor 205c are made of a conductive material having a function of reducing the diffusion of hydrogen. By using the material, impurities such as hydrogen contained in the conductor 205b are absorbed into the insulator 224, etc. Diffusion into the oxide 230 can be prevented through the conductor 205a and By using a conductive material having a function of suppressing oxygen diffusion for the conductor 205c, It is possible to prevent the conductor 205b from being oxidized and the conductivity from decreasing. Examples of conductive materials having a suppressing function include titanium, titanium nitride, tantalum, and nitride. It is preferable to use tantalum chloride, ruthenium, or ruthenium oxide. The conductor 205a may be a single layer or a multilayer of the above-mentioned conductive materials. The conductor 205a may be made of titanium nitride.

[0099] The conductor 205b is a conductive material mainly composed of tungsten, copper, or aluminum. For example, tungsten is preferably used for the conductor 205b. stomach.

[0100] Conductor 205 may function as a second gate electrode. The potential applied to the conductor 5 is changed independently of the potential applied to the conductor 260. This makes it possible to control the threshold voltage (Vth) of the transistor 200. Applying a negative potential to the conductor 205 increases the Vth of the transistor 200. Therefore, when a negative potential is applied to the conductor 205, When a potential of 0 V is applied to the conductor 260, the drain current is larger when the potential is applied than when no potential is applied. The in-current can be reduced.

[0101] The electrical resistivity of the conductor 205 is set in consideration of the potential applied to the conductor 205. The thickness of the conductor 205 is determined in accordance with the electrical resistivity. The film thickness of the conductive material 6 is approximately the same as that of the conductive material 205. It is preferable to make the film thickness of the conductor 205 and the insulator 216 thin. By thinning the insulator 216, the absolute amount of impurities such as hydrogen contained in the insulator 216 can be reduced. This reduces the diffusion of the impurities into the oxide 230.

[0102] As shown in FIG. 1A, the conductor 205 is formed by the conductor 242a of the oxide 230 and the conductor It is preferable that the area is larger than the area that does not overlap with the conductive material 242b. As shown in FIG. 1, the conductor 205 intersects with the channel width direction of the oxide 230a and the oxide 230b. It is preferable that the oxide 2 is extended in the region outside the dividing edge. On the outside of the side surface of the channel width direction of the conductor 30, the conductor 205 and the conductor 260 are It is preferable that the first gate electrode and the second gate electrode overlap each other via an insulator. The electric field of the conductor 260 acting as an electrode and the electric field of the conductor 20 acting as a second gate electrode The electric field of 5 can electrically surround the channel forming region of oxide 230. In this specification, the electric fields of the first gate and the second gate form a channel forming region. The structure of a transistor that electrically surrounds the region is called a surrounded channel ( This is called the S-channel structure.

[0103] In this specification, a transistor with an S-channel structure is a transistor with a pair of gate electrodes. The electric field of one and the other of the transistor electrodes electrically surrounds the channel forming region. The S-channel structure disclosed in this specification is a fin-type structure. The S-channel structure is different from the planar structure. In other words, the transistor is less susceptible to the short channel effect. It is possible.

[0104] As shown in FIG. 1C, the conductor 205 is extended to function as wiring. However, the present invention is not limited to this, and a conductor that functions as a wiring may be provided under the conductor 205. In addition, the conductor 205 does not necessarily have to be provided for each transistor. For example, the conductor 205 may be shared by multiple transistors. stomach.

[0105] In the transistor 200, the conductor 205 includes a conductor 205a, a conductor 205b, and conductor 205c are stacked in the illustrated configuration, but the present invention is not limited to this. The conductor 205 may be provided as a single layer, two layers, or a laminated structure of four or more layers. For example, a two-layer structure of the conductor 205a and the conductor 205b may be used.

[0106] Insulator 222 and insulator 224 function as gate insulators.

[0107] The insulator 222 suppresses the diffusion of hydrogen (e.g., at least one of hydrogen atoms, hydrogen molecules, etc.). It is preferable that the insulator 222 has a function of inhibiting oxygen (for example, oxygen atoms, It is preferable that the material has a function of suppressing the diffusion of at least one of oxygen molecules, etc. For example, Insulator 222 inhibits the diffusion of hydrogen and / or oxygen more than insulator 224. It is preferable that the function be

[0108] The insulator 222 is made of one or both of aluminum and hafnium, which are insulating materials. It is preferable to use an insulator containing an oxide. Examples of the insulator include aluminum oxide and hafnium oxide. oxides containing sulphur, aluminium and hafnium (hafnium aluminate) When the insulator 222 is formed using such a material, 2 is the release of oxygen from the oxide 230 to the substrate side and the removal of oxide from the periphery of the transistor 200. The insulator 222 functions as a layer that suppresses the diffusion of impurities such as hydrogen into the insulator 230. By providing the insulating layer, impurities such as hydrogen are prevented from diffusing into the inside of the transistor 200. This can suppress the generation of oxygen vacancies in the oxide 230. This can prevent the insulator 224 and the oxide 230 from reacting with oxygen.

[0109] Alternatively, the insulator may be, for example, aluminum oxide, bismuth oxide, or germanium oxide. , niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, oxide Zirconium may be added, or these insulators may be nitrided. The insulator 222 may be silicon oxide, silicon oxynitride, or silicon nitride. may be used in a laminated form.

[0110] The insulator 222 may be made of, for example, aluminum oxide, hafnium oxide, tantalum oxide, Zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrT Insulators including so-called high-k materials such as (Ba,Sr)TiO3 and (Ba,Sr)TiO3 (BST) The insulating layer may be a single layer or a multilayer. However, thinning the gate insulator may cause problems such as leakage current. By using a high-k material as an insulator that functions as a body, the thickness of the This makes it possible to reduce the gate potential during transistor operation.

[0111] The insulator 224 in contact with the oxide 230 contains excess oxygen (oxygen is released by heating). For example, the insulator 224 is preferably made of silicon oxide, silicon oxynitride, or the like. By providing an insulator containing oxygen in contact with the oxide 230, This can reduce oxygen vacancies in the silicon dioxide layer, thereby improving the reliability of the transistor 200.

[0112] Specifically, the insulator 224 is an oxide material from which part of oxygen is released by heating, in other words, Therefore, it is preferable to use an insulating material having an excess oxygen region. The oxides that are released are measured by TDS (Thermal Desorption Spectroscopy) copy) analysis, the amount of oxygen molecules released was 1.0 × 10 18 molecules / cm 3 or more, preferably 1.0 × 10 19 molecules / cm 3 More preferably, 2.0×10 19 molecules / cm 3 or more, or 3.0 x 10 20 molec ules / cm 3 The oxide film is as described above. The temperature is preferably in the range of 100°C to 700°C, or 100°C to 400°C. stomach.

[0113] In addition, during the manufacturing process of the transistor 200, when the surface of the oxide 230 is exposed, The heat treatment is preferably carried out at a temperature of, for example, 100° C. or higher and 600° C. or lower. The heat treatment is preferably performed at a temperature of 350° C. or higher and 550° C. or lower. Or in an inert gas atmosphere, or oxidizing gas is 10 ppm or more, 1% or more, or For example, it is preferable to carry out the heat treatment in an oxygen atmosphere. This supplies oxygen to the oxide 230, eliminating oxygen vacancies (V O ) can be reduced. The heat treatment may be carried out under reduced pressure. Alternatively, the heat treatment may be carried out under nitrogen gas or nitrogen gas. After heat treatment in an active gas atmosphere, oxidizing gas was added at 10p to compensate for the oxygen that was released. The treatment may be carried out in an atmosphere containing at least pm, at least 1%, or at least 10% of an oxidizing gas. After heat treatment in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more, Alternatively, the heat treatment may be performed in a nitrogen gas or inert gas atmosphere.

[0114] In addition, by subjecting the oxide 230 to oxygen addition treatment, oxygen vacancies in the oxide 230 are filled with oxygen. In other words, "V O +O→null” reaction. Furthermore, the supplied oxygen reacts with the hydrogen remaining in the oxide 230. This allows the hydrogen to be removed as H2O (dehydration). The hydrogen remaining in the substance 230 recombines with the oxygen vacancy to form V. O inhibits the formation of H It is possible.

[0115] The insulator 222 and the insulator 224 may have a laminated structure of two or more layers. In this case, it is not limited to a laminated structure made of the same material, but may be a laminated structure made of different materials. The insulator 224 may be formed in an island shape overlapping with the oxide 230a. In this case, the insulator 275 is configured to contact the side surface of the insulator 224 and the top surface of the insulator 222. .

[0116] Oxide 243a and oxide 243b are provided on oxide 230b. The oxide 43a and the oxide 243b are spaced apart with the conductor 260 interposed therebetween.

[0117] The oxide 243 (oxide 243a and oxide 243b) has a function of suppressing oxygen permeation. The conductor 242 serving as a source electrode and a drain electrode and the conductor 242 serving as an acid By disposing an oxide 243 having a function of suppressing oxygen permeation between the oxide 230b and the This is preferable because it reduces the electrical resistance between the conductor 242 and the oxide 230b. By adopting such a configuration, the electrical characteristics and reliability of the transistor 200 can be improved. In addition, the electrical resistance between the conductor 242 and the oxide 230b can be sufficiently increased. If the amount can be reduced, the oxide 243 may not be provided.

[0118] The oxide 243 may be a metal oxide containing the element M. In particular, the element M may be an aluminum oxide. Aluminum, gallium, yttrium, or tin can be used. It is preferable that the concentration of element M is higher than that of oxide 230b. Gallium may also be used. In addition, the oxide 243 may be a metal oxide such as In-M-Zn oxide. Specifically, in the metal oxide used for the oxide 243, The atomic ratio of the element M to In in the metal oxide used for the oxide 230b is The atomic ratio of the oxide 243 is preferably larger than that of the element M. The thickness of the oxide 243 is preferably 0.5 nm or more. Preferably, it is 5 nm or less, more preferably 1 nm or more and 3 nm or less, and even more preferably 1 nm or more. The oxide 243 preferably has a crystallinity. When 43 has crystallinity, it can suitably suppress the release of oxygen in the oxide 230. For example, if the oxide 243 has a hexagonal crystal structure, the oxide in the oxide 230 It may be possible to suppress the release of elements.

[0119] The conductor 242a is provided in contact with the upper surface of the oxide 243a, and the conductor 242b is provided on the upper surface of the oxide 243a. It is preferable that the conductor 242a and the conductor 242b are provided in contact with each other on the upper surface of the conductor 242a. b functions as the source electrode or the drain electrode of the transistor 200, respectively.

[0120] The conductor 242 (conductor 242a and conductor 242b) may be, for example, tantalum. nitrides containing titanium, nitrides containing molybdenum, nitrides containing tungsten nitrides containing tantalum and aluminum, nitrides containing titanium and aluminum In one aspect of the present invention, nitrides containing tantalum are particularly preferred. Also, for example, ruthenium oxide, ruthenium nitride, strontium and ruthenium Oxides containing lanthanum, oxides containing lanthanum and nickel, etc. may also be used. , because it is a conductive material that is resistant to oxidation, or a material that maintains its conductivity even when it absorbs oxygen. ,preferable.

[0121] The hydrogen contained in the oxide 230b and the like is transferred to the conductor 242a or the conductor 242b. In particular, the conductor 242a and the conductor 242b may contain nitrogen containing tantalum. By using the oxide, hydrogen contained in the oxide 230b etc. is converted into the conductor 242a or the conductor The diffused hydrogen is easily diffused into the conductor 242a or the conductor 242b. In other words, hydrogen contained in the oxide 230b etc. can bond with nitrogen, which is a conductor. It may be absorbed by 242a or conductor 242b.

[0122] In addition, no curved surface is formed between the side surface of the conductor 242 and the top surface of the conductor 242. By forming the conductor 242 without the curved surface, it is possible to This allows the cross-sectional area of ​​the conductor 242 in the cross section in the channel width direction to be increased. This increases the conductivity of the conductor 242 and increases the on-state current of the transistor 200. It is possible.

[0123] The insulator 271a is provided in contact with the upper surface of the conductor 242a, and the insulator 271b is The insulator 271 is provided in contact with the upper surface of the conductor 242b. Therefore, the insulator 271 preferably functions as a barrier insulating film to prevent oxygen It is preferable that the insulator 271 has a function of suppressing diffusion. It is preferable that the insulator 271 has a function of suppressing the diffusion of oxygen. The insulator 271 may be a nitride containing silicon, such as silicon nitride. In this case, the insulator 271 is preferably is a metal oxide having an amorphous structure, such as aluminum oxide or magnesium oxide. In particular, the insulator 271 may be an insulator such as silicon dioxide. By using aluminum oxide with a thin film or amorphous structure, This is preferable because it may be possible to capture or fix hydrogen more effectively. Therefore, a highly reliable transistor 200 and a semiconductor device can be manufactured. .

[0124] The insulator 273a is provided in contact with the upper surface of the insulator 271a, and the insulator 273b is The upper surface of the insulator 273a is in contact with the upper surface of the insulator 271b. 275, and the side of the insulator 273a preferably contacts the insulator 250. The upper surface of the edge 273b contacts the insulator 275, and the side surface of the insulator 273b contacts the insulator 250. The insulator 273, like the insulator 224, is preferably an excess oxygen region or an excess oxygen It is preferable that the insulator 273 has a low impurity concentration such as water and hydrogen. For example, the insulator 273 is preferably made of silicon oxide, silicon oxynitride, Oxides or nitrides containing silicon, such as silicon nitride and silicon nitride oxide, are used appropriately. By providing an insulator having excess oxygen in contact with the insulator 250, the insulator 25 The oxygen diffused into the oxide 230 through the oxygen reduces the oxygen vacancies in the oxide 230, This can improve the reliability of the register 200.

[0125] In addition, when sufficient oxygen can be supplied to the oxide 230 from the insulators 224 and 280, In this case, the insulator 273 may not be provided.

[0126] The insulator 272a is made of the oxide 230a, the oxide 230b, the oxide 243a, and the conductor 242. a, insulator 271a, and insulator 273a. 2b is an oxide 230a, an oxide 230b, an oxide 243b, a conductor 242b, an insulator 2 The insulating layer 272a is provided in contact with the side surfaces of the insulating layer 271b and the insulating layer 273b. The insulator 272b is provided in contact with the upper surface of the insulator 224. The insulator 272 has at least It is preferable that the insulator 272 functions as a barrier insulating film against oxygen. For example, the insulator 272 may have a function of suppressing the diffusion of oxygen. It is preferable that the insulator 272 has a function of suppressing oxygen diffusion more than the insulator 280. For example, a nitride containing silicon such as silicon nitride may be used.

[0127] By providing the insulators 271 and 272 as described above, the barrier properties against oxygen are improved. In other words, the conductor 242 can be wrapped in an insulator having the following structure. The oxygen added or contained in the insulator 273 is prevented from diffusing into the conductor 242. This allows oxygen added during the formation of the insulator 275 or the insulator 27 The conductor 242 is directly oxidized by the oxygen contained in the conductor 242, and the resistivity increases. Therefore, the reduction in the flow can be suppressed.

[0128] In FIG. 1B and other figures, the insulator 272 is made of the oxide 230a, the oxide 230b, and the oxide 230c. Regarding the configuration in contact with the side surfaces of the object 243, the conductor 242, the insulator 271, and the insulator 273, However, the insulator 272 is in contact with at least the side surfaces of the insulator 271 and the conductor 242. For example, the insulator 272 may be formed by the oxide 230a, the oxide 230b, and the oxide 243. , contacting the side surfaces of the conductor 242 and the insulator 271, but not contacting the insulator 273. In this case, the side surface of the insulator 273 comes into contact with the insulator 275.

[0129] If the insulator 275 has sufficient barrier properties against oxygen, etc., the insulator 271 and Alternatively, one or both of the insulating material 272 may be omitted.

[0130] The insulator 275 is provided to cover the insulators 224, 272, and 273. and openings are formed in the regions where the insulator 250 and the conductor 260 are to be provided. The insulator 275 is formed on the top surface of the insulator 224, the side surface of the insulator 272, and the top surface of the insulator 273. The insulator 275 is preferably provided in contact with the barrier 275. It is preferable that the insulator 275 functions as an insulating film. a barrier insulating film that suppresses diffusion of the impurities from above into the insulator 224 or the insulator 273; It is preferable that the catalyst has a function of capturing impurities such as hydrogen. In this case, the insulator 275 is a metal oxide having an amorphous structure, for example, an oxide Preferably, the insulating material includes an insulator such as aluminum oxide or magnesium oxide. As the 5, for example, a single layer of an insulator such as aluminum oxide or silicon nitride is used. The insulator 275 may be made of aluminum oxide or silicon nitride. When the insulating film is used in a laminated state, aluminum oxide is used as the insulating film 224, the insulating film 272, and the insulating film 273. It is preferable that the aluminum oxide is provided so as to be in contact with the body 273, and that silicon nitride is provided on the aluminum oxide. In addition, when the insulator 272 is not provided, the insulator 275 is made of the oxide 230a and the oxide 230b. 30b, the oxide 243, the conductor 242, and the insulator 271. When aluminum oxide is used for at least a part of 5, the aluminum oxide is amorphous. aluminum oxide having a crystalline structure or aluminum oxide having an amorphous structure It is preferable to use a metal oxide having an amorphous structure, particularly a metal oxide having an amorphous structure. Aluminum oxide with a crystal structure and amorphous aluminum oxide react with the surrounding water. It has good properties and is highly reliable because it can capture or fix elements. The transistor 200 and a semiconductor device can be manufactured.

[0131] In the region between the insulator 212 and the insulator 283, the insulator 280, the insulator 224, and the The insulator 275 is in contact with the insulator 273 and has the function of capturing impurities such as hydrogen. By doing so, hydrogen contained in the insulator 280, the insulator 224, or the insulator 273, etc. This traps impurities and makes it possible to keep the amount of hydrogen in the region constant. In this case, it is preferable to use aluminum oxide or the like as the insulator 275.

[0132] The insulator 250 functions as a gate insulator. The insulator 250 is formed on the oxide 230b. The insulator 250 is preferably made of silicon oxide or silicon oxynitride. , silicon oxynitride, silicon nitride, silicon oxide with fluorine addition, carbon-added oxide silicon oxide, silicon oxide doped with carbon and nitrogen, silicon oxide with vacancies, etc. In particular, silicon oxide and silicon oxynitride are stable to heat. This is preferable.

[0133] The insulator 250, like the insulator 224, has a low impurity concentration such as water and hydrogen. The thickness of the insulator 250 is preferably 1 nm or more and 20 nm or less. It is preferable to do so.

[0134] Although the insulator 250 is illustrated as a single layer in FIGS. 1B and 1C, it may have a laminated structure of two or more layers. When the insulator 250 has a two-layer laminated structure, the lower layer of the insulator 250 may be The insulating layer 250 is formed using an insulating material that releases oxygen when heated, and the upper layer of the insulating material 250 is formed using an insulating material that releases oxygen when heated. It is preferable to form the insulating layer using an insulating material having a function of suppressing the As a result, oxygen contained in the lower layer of the insulator 250 is prevented from diffusing into the conductor 260. In other words, it is possible to suppress a decrease in the amount of oxygen supplied to the oxide 230. Therefore, oxidation of the conductor 260 due to oxygen contained in the lower layer of the insulator 250 can be suppressed. For example, the lower layer of the insulator 250 may be made of the material that can be used for the insulator 250 described above. The upper layer of the insulator 250 can be formed using the same material as the insulator 222. do.

[0135] When silicon oxide or silicon oxynitride is used as the lower layer of the insulator 250, The upper layer of the body 250 may be an insulating material, such as a high-k material having a high dielectric constant. The gate insulator has a laminated structure of a lower layer of the insulator 250 and an upper layer of the insulator 250. By doing so, it is possible to obtain a laminated structure that is stable against heat and has a high relative dielectric constant. The gate potential applied during transistor operation is adjusted while maintaining the physical thickness of the gate insulator. In addition, it is possible to reduce the equivalent oxide thickness (EO T) can be made thinner.

[0136] The upper layer of the insulator 250 may be specifically made of hafnium, aluminum, gallium, or yttrium. Thorium, zirconium, tungsten, titanium, tantalum, nickel, germanium, Metal oxides or acids containing one or more metals selected from magnesium, etc. Metal oxides that can be used as the oxide 230 can be used. It is preferable to use an insulator containing oxides of one or both of tungsten and hafnium. For example, the insulator 250 may include silicon oxide and hafnium oxide on the silicon oxide. A laminated structure including the above may be used.

[0137] Furthermore, a metal oxide may be provided between the insulator 250 and the conductor 260. The material preferably suppresses the diffusion of oxygen from the insulator 250 to the conductor 260. By providing a metal oxide that suppresses diffusion, the diffusion of oxygen from the insulator 250 to the conductor 260 can be suppressed. In other words, the decrease in the amount of oxygen supplied to the oxide 230 can be suppressed. In addition, oxidation of the conductor 260 due to oxygen in the insulator 250 can be suppressed.

[0138] The metal oxide may function as a part of the first gate electrode. For example, the metal oxide that can be used as the oxide 230 may be the same as the above metal oxide. In this case, the conductor 260a can be formed by sputtering. This reduces the electrical resistance of the metal oxide, making it a conductor. The electrode can be called an Oxide Conductor (Oxide Conductor) electrode.

[0139] By including the metal oxide, the influence of the electric field from the conductor 260 is not weakened. This can improve the on-current of the transistor 200. The physical thickness of the metal oxide maintains the distance between the conductor 260 and the oxide 230. This makes it possible to suppress leakage current between the conductor 260 and the oxide 230. By providing a laminated structure of the insulator 250 and the metal oxide, the conductor 260 and the oxide the physical distance between the conductor 260 and the oxide 230, and the electric field strength from the conductor 260 to the oxide 230. can be easily adjusted appropriately.

[0140] Conductor 260 serves as the first gate electrode of transistor 200. 0 has a conductor 260a and a conductor 260b disposed on the conductor 260a. For example, it is preferable that the conductor 260a wraps around the bottom and sides of the conductor 260b. 1B and 1C, the conductor 260 1B and 1C, the uppermost part of the upper surface of the insulator 250 is substantially coincident with the uppermost part of the upper surface of the insulator 250. In FIG. 1C, the conductor 260 is shown as a two-layer structure of conductor 260a and conductor 260b. However, it may have a single layer structure or a laminated structure of three or more layers.

[0141] The conductor 260a is a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, or a nitrogen oxide molecule. It is preferable to use a conductive material that has the function of suppressing the diffusion of impurities such as copper atoms. Alternatively, the function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.) It is preferable to use a conductive material having the function.

[0142] In addition, the conductor 260a has a function of suppressing the diffusion of oxygen, so that the insulator 250 The oxygen contained therein can prevent the conductor 260b from being oxidized and the conductivity from decreasing. Examples of conductive materials that have the function of suppressing oxygen diffusion include titanium and nitride. Use of titanium, tantalum, tantalum nitride, ruthenium, or ruthenium oxide is preferred.

[0143] In addition, since the conductor 260 also functions as wiring, a conductor with high conductivity should be used. For example, the conductor 260b is preferably made primarily of tungsten, copper, or aluminum. The conductor 260b may have a laminated structure. For example, a laminated structure of titanium or titanium nitride and the above conductive material may be used.

[0144] In addition, in the transistor 200, the conductor 260 is formed on the insulator 280, etc. The conductor 260 is formed in a self-aligned manner so as to fill the opening. Thus, the conductor 260 is aligned in the region between the conductor 242a and the conductor 242b. It can be positioned reliably without any problems.

[0145] 1C, insulator 2 When the bottom surface of the conductor 260 is taken as the reference, the conductor 260 and the oxide 230b overlap. The height of the bottom surface of the non-contact region is preferably lower than the height of the bottom surface of the oxide 230b. A conductor 260 that functions as a gate electrode is connected to the oxide 230b via an insulator 250 or the like. By covering the side and top surfaces of the channel forming region, the electric field of the conductor 260 is oxidized. Therefore, the entire channel forming region of the transistor 200 The on-state current of the insulator 222 can be increased, and the frequency characteristics can be improved. As a standard, the oxide 230a and the oxide 230b do not overlap with the conductor 260. The difference between the height of the bottom surface of the conductor 260 and the height of the bottom surface of the oxide 230b in the thin region is 0 nm or more and 100 nm or less, preferably 3 nm or more and 50 nm or less, more preferably 5 The thickness is between 100 nm and 200 nm.

[0146] The insulator 280 is provided on the insulator 275, and the insulator 250 and the conductor 260 are provided on the insulator 275. An opening is formed in the region where the insulating material 280 is to be removed. Good too.

[0147] The insulator 280 that functions as an interlayer film preferably has a low dielectric constant. By using the material as an interlayer film, the parasitic capacitance between wirings can be reduced. It is preferable that the insulating layer 0 is made of the same material as the insulating layer 216. Silicon and silicon oxynitride are preferred because they are thermally stable. Materials such as silicon oxynitride, silicon oxide with vacancies, etc., are subject to oxygen desorption upon heating. This is preferable because it is possible to easily form a region containing

[0148] Insulator 280, like insulator 224, may have excess oxygen regions or excess oxygen. It is also preferable that the concentration of impurities such as water and hydrogen in the insulator 280 is reduced. For example, the insulator 280 may be made of silicon-containing material such as silicon oxide or silicon oxynitride. An insulator having excess oxygen can be provided in contact with the oxide 230. This reduces oxygen vacancies in the oxide 230 and improves the reliability of the transistor 200. It is possible.

[0149] The insulator 282 prevents impurities such as water and hydrogen from diffusing from above into the insulator 280. It is preferable that the film functions as a barrier insulating film that traps impurities such as hydrogen. It is preferable that the insulator 282 is a barrier insulating film that suppresses the permeation of oxygen. The insulator 282 is preferably a metal oxide having an amorphous structure. For example, an insulator such as aluminum oxide may be used. In the region sandwiched between the insulator 280 and the insulator 280, the insulator 280 has the function of capturing impurities such as hydrogen. By providing the insulator 282, impurities such as hydrogen contained in the insulator 280 can be captured. In particular, the amount of hydrogen in the insulator 282 can be made constant. and aluminum oxide having an amorphous structure, or aluminum oxide having an amorphous structure. The use of ammonium may be preferable because it may be possible to capture or fix hydrogen more effectively. This makes it possible to produce a transistor 200 and a semiconductor device having good characteristics and high reliability. It is possible to create a device.

[0150] The insulator 283 prevents impurities such as water and hydrogen from diffusing from above into the insulator 280. The insulator 283 functions as a barrier insulating film. The insulating layer 283 may be a silicon-containing nitride such as silicon nitride or silicon nitride oxide. For example, a film formed by sputtering is preferably used as the insulator 283. Silicon nitride may be used. The insulator 283 is formed by sputtering, It is possible to form a silicon nitride film that has high conductivity and is less likely to form voids. 283, a silicon nitride film was formed by sputtering, and then a CVD method was applied. A deposited silicon nitride film may be stacked.

[0151] The conductors 240a and 240b are mainly made of tungsten, copper, or aluminum. It is preferable to use a conductive material containing the conductive material 240a and the conductive material 240b. 0b may have a laminated structure.

[0152] In addition, when the conductor 240 has a laminated structure, the insulator 283, the insulator 282, the insulator 28 0, insulator 275, insulator 273, and conductors in contact with insulator 271 are free from water, hydrogen, etc. It is preferable to use a conductive material that has the function of suppressing the permeation of impurities. For example, Tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, or ruthenium oxide, etc. It is preferable to use a conductive material having a function of suppressing the permeation of impurities such as water and hydrogen. The conductive material may be used in a single layer or a laminated layer. Impurities such as hydrogen are mixed into the oxide 230 through the conductors 240a and 240b. This can prevent the intrusion of

[0153] The insulators 241a and 241b may be made of, for example, silicon nitride or aluminum oxide. The insulators 241a and 24b may be made of an insulator such as silicon nitride oxide. 1b is provided in contact with the insulators 283, 282, 275, and 271. Therefore, impurities such as water and hydrogen contained in the insulator 280 are absorbed into the conductor 240a and and the conductor 240b can prevent the nitrogen from being mixed into the oxide 230. Silicon dioxide is preferable because it has a high barrier property against hydrogen. This can prevent oxygen from being absorbed into the conductors 240a and 240b.

[0154] In addition, the conductive material 240a and the conductive material 240b are in contact with each other at the upper surface thereof and function as wiring. Conductor 246 (conductor 246a and conductor 246b) may be arranged. 46 uses conductive materials whose main components are tungsten, copper, or aluminum. The conductor may also have a laminated structure, for example, titanium or titanium nitride. The conductive material may be a laminate of a metal and the conductive material. It may be formed so as to be embedded in the opening.

[0155] The insulator 286 is provided on the conductor 246 and on the insulator 283. The top surface of the conductor 246 and the side surface of the conductor 246 are in contact with the insulator 286. The bottom surface of the conductor 246 is in contact with the insulator 283. By using such a structure, the airbag 280 can be protected from external oxygen. This can suppress the permeation of oxygen and prevent oxidation of the conductor 246. This is preferable because it can prevent impurities such as water and hydrogen from diffusing to the outside.

[0156] <Materials for semiconductor devices> The following describes constituent materials that can be used in semiconductor devices.

[0157] <<Substrate>> The substrate on which the transistor 200 is formed may be, for example, an insulating substrate, a semiconductor substrate, or A conductive substrate may be used. Examples of insulating substrates include glass substrates, quartz substrates, and silicon substrates. Fire substrate, stabilized zirconia substrate (yttria stabilized zirconia substrate, etc.), resin substrate Semiconductor substrates include those made of silicon or germanium. semiconductor substrates, or silicon carbide, silicon germanium, gallium arsenide, indium phosphide Compound semiconductor substrates made of gallium oxide, zinc oxide, and gallium oxide are also available. A semiconductor substrate having an insulating region inside the semiconductor substrate, for example, SOI (Silicon on Insulator) Conductive substrates include graphite substrates and metal substrates. , alloy substrates, conductive resin substrates, etc. Or, substrates having metal nitrides, metal oxides, etc. Furthermore, there are substrates in which a conductor or semiconductor is provided on an insulating substrate. Substrate, substrate with conductor or insulator provided on semiconductor substrate, substrate with semiconductor or insulator provided on conductive substrate There are also substrates with elements mounted on them. The elements provided on the substrate may include a capacitance element, a resistance element, a switch element, a light-emitting element, and the like. There are various types of memory elements.

[0158] <<Insulators>> Insulators include oxides, nitrides, oxynitrides, nitride oxides, and metal oxides that have insulating properties. These include metal oxide nitrides, metal oxynitrides, and metal oxynitrides.

[0159] For example, as transistors become smaller and more highly integrated, the gate insulator becomes thinner. This can cause problems such as leakage current. By using high-k materials, the voltage required for transistor operation can be reduced while maintaining the physical film thickness. On the other hand, it is possible to use a material with a low relative dielectric constant for the insulator that functions as the interlayer film. This reduces the parasitic capacitance between the wirings. Therefore, materials should be selected accordingly.

[0160] Insulators with high dielectric constants include gallium oxide, hafnium oxide, and zirconium oxide. oxides with aluminum, aluminum and hafnium, oxides with silicon and hafnium, oxides with silicon and hafnium, Examples include oxynitrides with hafnium, or nitrides with silicon and hafnium.

[0161] Insulators with low dielectric constants include silicon oxide, silicon oxynitride, and silicon nitride oxide. Silicon, silicon nitride, fluorine-doped silicon oxide, carbon-doped silicon oxide, Silicon oxide doped with carbon and nitrogen, silicon oxide with vacancies, or resin be.

[0162] In addition, transistors using metal oxides suppress the permeation of impurities such as hydrogen and oxygen. By surrounding the transistor with an insulator that has the function of stabilizing the electrical characteristics of the transistor, Insulators that have the function of suppressing the permeation of impurities such as hydrogen and oxygen include: For example, boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, Phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum Insulators containing tantalum, neodymium, hafnium, or tantalum are used, either in a single layer or in a multilayer configuration. Specifically, an insulating material that has the function of suppressing the permeation of impurities such as hydrogen and oxygen is used. As a body, aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, Yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, Metal oxides such as tantalum nitride, aluminum nitride, silicon nitride oxide, silicon nitride, etc. The following metal nitrides can be used.

[0163] In addition, the insulator that functions as the gate insulator has a region containing oxygen that is desorbed by heating. For example, it is preferable that the insulating material has a region containing oxygen that is desorbed by heating. By forming a structure in which silicon oxide or silicon oxynitride is in contact with the oxide 230, the oxide The oxygen deficiency of 230 can be compensated for.

[0164] <<Conductors>> Conductors include aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, and titanium. Tantalum, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium Sium, Zirconium, Beryllium, Indium, Ruthenium, Iridium, Strontium Metal elements selected from ammonium, lanthanum, etc., or alloys containing the above-mentioned metal elements It is preferable to use an alloy or the like that combines the above-mentioned metal elements. For example, tantalum nitride titanium nitride, tungsten, nitrides containing titanium and aluminum, tantalum and aluminum Ruthenium nitrides, ruthenium oxide, ruthenium nitride, strontium and ruthenium It is preferable to use an oxide containing lanthanum and nickel, or an oxide containing lanthanum and nickel. Tantalum, titanium nitride, nitrides containing titanium and aluminum, tantalum and aluminum Ruthenium nitride, ruthenium oxide, ruthenium nitride, oxide containing strontium and ruthenium Oxides containing lanthanum and nickel are conductive materials that are resistant to oxidation or absorb oxygen. It is a material that maintains conductivity even after oxidation, and is therefore preferred. Highly conductive semiconductors, such as polycrystalline silicon, nickel silicide, Silicide may also be used.

[0165] Alternatively, a plurality of conductive layers made of the above materials may be stacked. A laminated structure in which a material containing a metal element and a conductive material containing oxygen are combined may be used. In addition, a laminated layer that combines the material containing the metal element and the conductive material containing nitrogen is also available. In addition, a material containing the above-mentioned metal element, a conductive material containing oxygen, and a material containing nitrogen may be used. A laminated structure may be formed by combining a conductive material containing a silicon dioxide.

[0166] When an oxide is used for the channel formation region of a transistor, The conductor that functions as a conductive material is a material containing the above-mentioned metal element and a conductive material containing oxygen. In this case, it is preferable to use a laminated structure in which a conductive material containing oxygen is used. It is preferable to provide the conductive material containing oxygen on the channel forming region side. This makes it easier for oxygen released from the conductive material to be supplied to the channel formation region.

[0167] In particular, the metal oxide in which the channel is formed is used as a conductor that functions as a gate electrode. It is preferable to use a conductive material containing a metal element and oxygen. Conductive materials containing metal elements and nitrogen may also be used. For example, titanium nitride or titanium nitride. Alternatively, a conductive material containing nitrogen, such as indium tin oxide or titanium oxide, may be used. Indium oxide containing tungsten, indium zinc oxide containing tungsten oxide, oxide Indium oxide containing titanium, indium tin oxide containing titanium oxide, indium zinc Indium tin oxide and silicon-doped indium tin oxide may also be used. Diode gallium zinc oxide may also be used. By using such a material, the channel It may be possible to capture hydrogen contained in the metal oxide that is formed. In some cases, it may be possible to capture hydrogen that is mixed in from insulators, etc.

[0168] <<Metal oxides>> The oxide 230 is a metal oxide (oxide semiconductor) that functions as a semiconductor. The following describes metals applicable to the oxide 230 and oxide 243 according to the present invention. The oxide will be explained.

[0169] The metal oxide preferably contains at least indium or zinc. It is preferable that the alloy contains aluminum and zinc. It is preferable that the alloy contains boron, titanium, iron, nickel, or the like. Nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, One selected from aluminum, tantalum, tungsten, magnesium, cobalt, etc. One or more types may be included.

[0170] Here, the metal oxide is an In-M-Zn oxide having indium, element M, and zinc. The element M can be aluminum, gallium, yttrium, or The element M is tin. Other elements that can be used for M include boron, titanium, iron, and nickel. Ru, Germanium, Zirconium, Molybdenum, Lanthanum, Cerium, Neodymium, Hafnium However, the elements M and tantalum are also included. In some cases, a combination of the above elements may be used.

[0171] In this specification, metal oxides containing nitrogen are also referred to as metal oxides (metal oxides). Nitrogen-containing metal oxides are also called metal oxide nitrides (m etal oxynitride).

[0172] <Classification of crystal structures> First, classification of crystal structures in oxide semiconductors will be described with reference to FIG. 3A. FIG. 3A shows an oxide semiconductor, typically IGZO (a metal oxide containing In, Ga, and Zn). FIG. 1 is a diagram illustrating the classification of crystal structures of gallium nitrides.

[0173] As shown in Figure 3A, oxide semiconductors can be broadly divided into "amorphous" and " ", "Crystalline" and "Crystal" Also, "Amorphous" includes completely amorp Also, "Crystalline" includes CAAC (c-ax is-aligned crystalline), nc(nanocrystalli ne), and CAC (cloud-aligned composite) ( excluding single crystal and poly crystal l). The classification of "Crystalline" includes single crystal, Polycrystalline and completely amorphous materials are excluded. Also, "Crystal" includes single crystal and poly Contains crystals.

[0174] The structures within the bold frame in Figure 3A are classified into two types: "Amorphous" and "Crystalline". It is an intermediate state between "crystal" and "new crystal" This structure belongs to the line phase. It is completely different from the stable "Amorphous" and "Crystal" This can be rephrased as a structure.

[0175] The crystal structure of the film or substrate can be determined by X-ray diffraction (XRD). The crystallinity can be evaluated using the crystallinity spectrum. The GIXD (Grazing-Incidence) of CAAC-IGZO films The XRD spectrum obtained by the GIXD measurement is shown in Figure 3B. This is also called the Seemann-Bohlin method. The obtained XRD spectrum is simply referred to as the XRD spectrum. The composition of the C-IGZO film is approximately In:Ga:Zn=4:2:3 [atomic ratio]. The thickness of the CAAC-IGZO film shown in Figure 3B is 500 nm.

[0176] As shown in Figure 3B, the XRD spectrum of the CAAC-IGZO film shows clear crystallinity. Specifically, the XRD spectrum of the CAAC-IGZO film shows the following peaks: A peak indicating the c-axis orientation is detected near 2θ=31°. The peak near 2θ=31° is asymmetric with respect to the angle at which the peak intensity is detected.

[0177] The crystal structure of the film or substrate was also analyzed by nanobeam electron diffraction (NBED). Diffraction patterns (ultra-small) observed by electron diffraction It can be evaluated by the electron diffraction pattern. The folding pattern is shown in Figure 3C. Figure 3C shows the NBED in which the electron beam is incident parallel to the substrate. The diffraction pattern observed by the CAAC-IGZO film shown in Figure 3C is The composition is approximately In:Ga:Zn=4:2:3 [atomic ratio]. In this case, electron diffraction is performed with a probe diameter of 1 nm.

[0178] As shown in Figure 3C, the diffraction pattern of the CAAC-IGZO film shows multiple c-axis orientations. spots are observed.

[0179] <<Structure of oxide semiconductor>> When focusing on the crystal structure, oxide semiconductors may be classified differently from those shown in FIG. 3A. For example, oxide semiconductors are classified into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Examples of non-single-crystal oxide semiconductors include the above-mentioned CAAC-OS and Non-single-crystal oxide semiconductors include polycrystalline oxide semiconductors and pseudo-non-crystalline oxide semiconductors. amorphous-like oxide semiconductor (a-like OS) semiconductor), amorphous oxide semiconductor, etc.

[0180] Here, for details on the above-mentioned CAAC-OS, nc-OS, and a-like OS, , and provide an explanation.

[0181] [CAAC-OS] The CAAC-OS has multiple crystalline regions, each of which has a c-axis aligned in a specific direction. The specific direction is the thickness direction of the CAAC-OS film. , in the normal direction to the surface on which the CAAC-OS film is formed, or in the normal direction to the surface of the CAAC-OS film. The crystalline region is a region in which the atomic arrangement has periodicity. When viewed as a crystal arrangement, the crystalline region is also a region with a uniform lattice arrangement. The OS has a region where multiple crystalline regions are connected in the ab-plane direction, and this region has strain. The distortion may occur in a region where multiple crystal regions are connected. The area where the orientation of the lattice arrangement changes between a region with one lattice arrangement and a region with a different lattice arrangement. In other words, the CAAC-OS has a c-axis orientation and no clear orientation in the ab-plane direction. It is an oxide semiconductor that has not been

[0182] Each of the plurality of crystalline regions is made up of one or more minute crystals (maximum diameter 10 When a crystalline region is made up of a single microcrystal (crystals less than 1 nm in size), The maximum diameter of the crystalline region is less than 10 nm. When such crystal regions are formed, the size of the crystal regions may be on the order of several tens of nanometers.

[0183] In-M-Zn oxide (element M is aluminum, gallium, yttrium, sulphur, CAAC-OS is a material selected from the group consisting of aluminum, titanium, and other materials. A layer containing element M, zinc (Zn), and oxygen (hereinafter referred to as the In layer) and a layer containing element M, zinc (Zn), and oxygen (hereinafter referred to as the O layer) are formed. A layered crystal structure (also called a layered structure) is formed by stacking a layer having an element (hereinafter referred to as an (M, Zn) layer) and a layer having an element (hereinafter referred to as an (M, Zn) layer). Indium and element M are mutually substitutable. The (M,Zn) layer may contain indium. The In layer contains the element M. The In layer may contain Zn. In high-resolution TEM images, this is observed as a lattice pattern.

[0184] For example, when the structure of the CAAC-OS film is analyzed using an XRD device, the θ / 2θ phase In the out-of-plane XRD measurement using a can, two peaks indicating the c-axis orientation were observed. The peak indicating the c-axis orientation is detected at or near θ=31°. ) may vary depending on the type and composition of the metal elements that make up the CAAC-OS.

[0185] For example, in the electron diffraction pattern of the CAAC-OS film, multiple bright spots (spots) Note that one spot and another spot are the incident electron beams that have passed through the sample. The spot (also called the direct spot) is the center of symmetry, and the points are observed at positions that are point-symmetric. can be.

[0186] When the crystalline region is observed from the specific direction, the lattice arrangement within the crystalline region is a hexagonal lattice. However, the unit cell is not necessarily a regular hexagon, and may be a non-regular hexagon. The above distortion may have a lattice arrangement such as a pentagon or heptagon. -In OS, clear grain boundaries were confirmed even near the strain. In other words, the formation of grain boundaries is suppressed by the distortion of the lattice arrangement. This is because the arrangement of oxygen atoms in the CAAC-OS is close-packed in the ab-plane direction. The bond distance between atoms changes when metal atoms are substituted. , it is believed that this is because distortion can be tolerated.

[0187] The crystal structure in which clear grain boundaries are observed is called polycrystal. The grain boundaries act as recombination centers, trapping carriers and forming transistors. This is likely to cause a decrease in the on-state current and a decrease in the field effect mobility. CAAC-OS, which has no visible grain boundaries, has a crystal structure suitable for the semiconductor layer of a transistor. It is one of the crystalline oxides having Zn. For example, In-Zn oxide and In-Ga-Zn oxide are This is preferable because it can suppress the generation of grain boundaries more effectively than oxides.

[0188] CAAC-OS is an oxide semiconductor with high crystallinity and no clear grain boundaries. Therefore, the CAAC-OS is less susceptible to the decrease in electron mobility caused by grain boundaries. In addition, the crystallinity of oxide semiconductors may be reduced by the incorporation of impurities or the generation of defects. Therefore, CAAC-OS is an oxide semiconductor with few impurities and defects (such as oxygen vacancies). Therefore, the physical properties of an oxide semiconductor having a CAAC-OS are stable. Therefore, oxide semiconductors having CAAC-OS are heat-resistant and highly reliable. C-OS is stable even under high temperatures (so-called thermal budget) in the manufacturing process. Therefore, using CAAC-OS for OS transistors increases the flexibility of the manufacturing process. It becomes possible to

[0189] [nc-OS] nc-OS is a material that can be used in microscopic areas (e.g., areas between 1 nm and 10 nm, especially areas between 1 nm and 10 nm). In other words, nc-OS has a periodic atomic arrangement in the region of 3 nm or less. It has small crystals. The size of the minute crystals is, for example, 1 nm or more and 10 nm or less. Since the size of these tiny crystals is between 1 nm and 3 nm, they are also called nanocrystals. In nc-OS, there is no regularity in the crystal orientation between different nanocrystals. Therefore, depending on the analytical method, nc-OS may be considered as a-like In some cases, it is difficult to distinguish between an OS and an amorphous oxide semiconductor. For example, in the case of an nc-OS film, , Structural analysis was performed using an XRD instrument, and out-of-plane analysis using θ / 2θ scan was performed. In the XRD measurement, no peaks indicating crystallinity were detected. However, electron beam circuits using electron beams with probe diameters larger than nanocrystals (e.g., 50 nm or larger) are being used. When electron diffraction (also called selected area electron diffraction) is performed, a diffraction pattern resembling a halo pattern is observed. On the other hand, for the nc-OS film, the size of the nanocrystals is close to or smaller than that of the nanocrystals. Electron beam diffraction (nanobeam) using an electron beam with a probe diameter (for example, 1 nm to 30 nm) When electron diffraction is performed, a ring-shaped region is formed around the direct spot. An electron diffraction pattern may be obtained in which multiple spots are observed.

[0190] [a-like OS] The a-like OS is an oxide semiconductor with a structure between the nc-OS and amorphous oxide semiconductor. A-like OS has pores or low density regions. The OS has lower crystallinity than the nc-OS and CAAC-OS. The OS has a higher hydrogen concentration in the film than the nc-OS and CAAC-OS.

[0191] <<Oxide semiconductor structure>> Next, the details of the above-mentioned CAC-OS will be explained. Regarding the formation of

[0192] [CAC-OS] CAC-OS is a type of metal oxide in which the elements constituting the metal oxide are 0.5 nm to 10 nm in size. Preferably, the material is unevenly distributed in a size range of 1 nm to 3 nm or in the vicinity thereof. In the following, it is assumed that one or more metal elements are unevenly distributed in a metal oxide. The region having the metal element has a size of 0.5 nm to 10 nm, preferably 1 nm to 3 nm. A mixed state of particles with sizes of less than 1 m or close to that size is called a mosaic or patch state. .

[0193] Furthermore, CAC-OS is a material that separates into a first region and a second region. The first region has a structure distributed throughout the film (also called a cloud structure). In other words, the CAC-OS has a structure in which the first area and the second area are mixed. It is a composite metal oxide having a structure.

[0194] Here, the I ratio of the metal elements constituting the CAC-OS in the In-Ga-Zn oxide is The atomic ratios of n, Ga, and Zn are defined as [In], [Ga], and [Zn], respectively. For example, in the CAC-OS of In-Ga-Zn oxide, the first region is the region where [In] is larger than [In] in the composition of the CAC-OS film. The second region is a region where [Ga] is larger than [Ga] in the composition of the CAC-OS film. Or, for example, the first region has [In] higher than the [In] in the second region. In this region, [Ga] is larger than [Ga] in the first region. In addition, the second region has a larger [Ga] than the [Ga] in the first region and a smaller [I [n] is smaller than [In] in the first region.

[0195] Specifically, the first region is mainly composed of indium oxide, indium zinc oxide, etc. The second region is a region containing gallium oxide, gallium zinc oxide, etc. In other words, the first region is called a region in which In is the main component. The second region can be rephrased as a region containing Ga as the main component. It is possible.

[0196] Note that there are cases where a clear boundary between the first region and the second region cannot be observed. .

[0197] For example, in the case of CAC-OS in In-Ga-Zn oxide, energy dispersive X-ray diffraction (EDX) Optical method (EDX:Energy Dispersive X-ray spectrosc) The EDX mapping obtained using the opy revealed a region containing In as the main component (the first region). The structure has a structure in which a first region (a first region) and a region (a second region) mainly composed of Ga are unevenly distributed and mixed. It can be confirmed that this is the case.

[0198] When CAC-OS is used in a transistor, the conductivity due to the first region and the conductivity due to the second region are The insulating properties due to the region act complementary to each other to provide a switching function (On In other words, the CAC-OS and has a conductive function in a part of the material and an insulating function in a part of the material, and By separating the conductive function from the insulating function, Therefore, by using CAC-OS in transistors, This allows for a high on-state current (I on ), high field-effect mobility (μ), and good switching This allows for realizing a switching operation.

[0199] Oxide semiconductors have a variety of structures, each of which has different characteristics. The oxide semiconductors in Two or more of AC-OS, nc-OS, and CAAC-OS may be included.

[0200] <Transistors containing oxide semiconductors> Next, a case where the oxide semiconductor is used in a transistor will be described.

[0201] By using the oxide semiconductor for a transistor, a transistor with high field-effect mobility can be obtained. Furthermore, a highly reliable transistor can be realized.

[0202] An oxide semiconductor with a low carrier concentration is used for the channel formation region of a transistor. For example, the carrier concentration of the channel formation region of the oxide semiconductor is preferably 1×10 17 c m -3 Less than 1 × 10 15 cm -3 or less, more preferably 1 × 10 13 cm -3 Less than 1×10, more preferably 11 cm-3 or less, more preferably 1 × 10 10 c m -3 Less than 1 x 10 -9 cm -3 The carrier of the oxide semiconductor film In the case of lowering the concentration, the impurity concentration in the oxide semiconductor film is lowered, and the defect state density In this specification and the like, a low impurity concentration and a low defect level density are An oxide semiconductor having a low carrier concentration is referred to as a highly purified intrinsic oxide semiconductor or a substantially highly purified intrinsic oxide semiconductor. This may be referred to as a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor.

[0203] Furthermore, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a low density of defect states. Therefore, the trap level density may also be low.

[0204] In addition, the time required for the charges trapped in the trap levels of the oxide semiconductor to disappear is Therefore, the trap level density is high. A transistor in which a channel formation region is formed in an oxide semiconductor has unstable electrical characteristics. This may be the case.

[0205] Therefore, in order to stabilize the electrical characteristics of a transistor, the impurity concentration in the oxide semiconductor In order to reduce the impurity concentration in the oxide semiconductor, it is effective to reduce It is preferable to reduce the impurity concentration in the adjacent film. These include alkali metals, alkaline earth metals, iron, nickel, and silicon.

[0206] <Impurities> Here, the influence of each impurity in an oxide semiconductor will be described.

[0207] When oxide semiconductors contain silicon or carbon, which are elements of Group 14, they are oxidized. Defect levels are formed in the oxide semiconductor. The concentration of silicon and carbon in the oxide semiconductor and the silicon near the interface with the channel formation region of the oxide semiconductor are The concentration of ammonium nitrate and carbon (Secondary Ion Mass Spectroscopy (SIMS)) The concentration obtained by ss Spectrometry) is calculated as 2 x 10 18 atoms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 The following applies.

[0208] In addition, when an oxide semiconductor contains an alkali metal or an alkaline earth metal, defect levels are formed. Therefore, alkali metals or alkaline earth metals may be included. Transistors using oxide semiconductors, which are widely used in semiconductors, tend to be normally on. Therefore, the alkali metal or alkali metal in the channel formation region of the oxide semiconductor obtained by SIMS The concentration of alkaline earth metals is 1×10 18 atoms / cm 3 Less than or equal to 2 x 10 1 6 atoms / cm 3 Do the following:

[0209] In addition, when nitrogen is contained in an oxide semiconductor, electrons that serve as carriers are generated, and As a result, the nitrogen-containing oxide semiconductor becomes a semiconductor. The transistors used for the oxide semiconductors tend to be normally on. Therefore, if nitrogen is contained, trap levels may be formed. Therefore, the electrical properties of the oxide semiconductor obtained by SIMS may become unstable. The nitrogen concentration in the channel formation region is set to 5×10 19 atoms / cm 3 Less than, preferably 5×10 18 atoms / cm 3 Less than 1×10, more preferably 18 atoms / cm 3 Less than 5 × 10, more preferably 17 atoms / cm 3 Do the following:

[0210] In addition, hydrogen contained in oxide semiconductors reacts with oxygen that bonds with metal atoms to form water. When hydrogen enters the oxygen vacancy, the electron carrier In addition, some of the hydrogen atoms may bond with the oxygen atoms that bond with the metal atoms, forming chiral ions. Therefore, it is necessary to use an oxide semiconductor containing hydrogen. Therefore, the transistors with the oxide semiconductor channel are likely to be normally on. It is preferable that the hydrogen in the hole formation region is reduced as much as possible. In the channel formation region of the oxide semiconductor, the hydrogen concentration obtained by SIMS is 1×1 0 20 atoms / cm 3 Less than 5 x 10 19 atoms / cm 3 Less than, more than Preferably 1 x 10 19 atoms / cm 3 less than 5×10 18 ato ms / cm 3 less than 1×10 18 atoms / cm 3 Make it less than.

[0211] By using an oxide semiconductor with sufficiently reduced impurities for a channel formation region of a transistor, This makes it possible to impart stable electrical properties.

[0212] <<Other semiconductor materials>> The semiconductor materials that can be used for the oxide 230 are not limited to the above-mentioned metal oxides. As the compound 230, a semiconductor material having a band gap (a semiconductor that is not a zero-gap semiconductor) For example, semiconductors of elemental elements such as silicon, gallium arsenide, etc. Compound semiconductors, layered materials (also called atomic layer materials, two-dimensional materials, etc.) that function as semiconductors It is preferable to use layered materials that function as semiconductors. is preferably used as the semiconductor material.

[0213] In this specification, the term "layered material" is a general term for a group of materials having a layered crystal structure. The layered crystal structure is formed by covalent and ionic bonds, and the layers are The structure is made up of layers of molecules that are stacked via bonds weaker than covalent or ionic bonds, such as ionic bonds. Layered materials have high electrical conductivity within the unit layer, that is, high two-dimensional electrical conductivity. A material that functions as a semiconductor and has high two-dimensional electrical conductivity is used for the channel formation region. This makes it possible to provide a transistor with a large on-state current.

[0214] Layered materials include graphene, silicene, and chalcogenides. is a compound containing chalcogen. Chalcogen is also a general term for elements belonging to Group 16. and includes oxygen, sulfur, selenium, tellurium, polonium, and livermorium. Chalcogenides include transition metal chalcogenides and group 13 chalcogenides. .

[0215] The oxide 230 may be, for example, a transition metal chalcogenide that functions as a semiconductor. Specific examples of transition metal chalcogenides that can be used as the oxide 230 include: These include molybdenum sulfide (typically MoS2), molybdenum selenide (typically MoS e2), molybdenum telluride (typically MoTe2), tungsten sulfide (typically W S2), tungsten selenide (typically WSe2), tungsten telluride (typically is WTe2), hafnium sulfide (typically HfS2), hafnium selenide (typically HfSe2), zirconium sulfide (typically ZrS2), zirconium selenide (typically Typical examples include ZrSe2).

[0216] <Method for manufacturing semiconductor device> Next, a manufacturing method of the semiconductor device of one embodiment of the present invention shown in FIGS. 1A to 1D will be described with reference to FIGS. 4A to 16A, 4B to 16B, 4C to 16C, and 4D to 16D. This will be explained using:

[0217] 4A to 16A show top views, and FIGS. 4B to 16B show top views of the semiconductor device shown in FIGS. 4A to 16. 1 is a cross-sectional view corresponding to the portion indicated by the dashed line A1-A2 in FIG. 1A, 4A to 16A are cross-sectional views in the channel length direction. 1 is a cross-sectional view corresponding to the portion indicated by the dashed line A3-A4 in FIG. 4A to 16A are cross-sectional views in the width direction of the panel. 4A to 16A are cross-sectional views of the portion indicated by the dashed line in FIG. Some elements have been omitted for clarity of illustration.

[0218] In the following, insulating materials for forming insulators and conductive materials for forming conductors are used. The semiconductor materials used to form semiconductors are deposited by sputtering, CVD, MBE, etc. The film can be formed by using a suitable method such as a PLD method or an ALD method.

[0219] The sputtering method uses RF sputtering, which uses a high frequency power source. the ring method, the DC sputtering method using a DC power supply, and the method using a pulsed current applied to the electrode. There is a pulsed DC sputtering method that changes the pressure. The RF sputtering method is mainly used for insulating films. DC sputtering is mainly used to form conductive metal films. In addition, the pulsed DC sputtering method is mainly used to deposit oxides, nitrides, carbides, etc. It is used when depositing a compound film using the reactive sputtering method.

[0220] The CVD method is a plasma CVD (PECVD) method that uses plasma. Enhanced CVD (TCVD) method, and thermal CVD (TCVD) method. These methods can be further classified into the VD method, which uses light, and the Photo CVD method. Depending on the source gas, metal CVD (MCVD) and metal organic CVD are used. (MOCVD: Metal Organic CVD) method.

[0221] The plasma CVD method can produce high-quality films at relatively low temperatures. This film formation method does not use a plasma, so it is possible to reduce plasma damage to the object being treated. For example, wiring, electrodes, elements (transistors, capacitors, etc.) included in a semiconductor device ) may become charged up by receiving an electric charge from the plasma. When accumulated electric charges destroy wiring, electrodes, elements, etc. included in a semiconductor device. On the other hand, in the case of thermal CVD methods that do not use plasma, such plasma damage occurs. In addition, the thermal CVD method can increase the yield of semiconductor devices. Since no plasma damage occurs in the film, a film with few defects can be obtained.

[0222] In addition, the ALD method involves reacting precursors and reactants using only thermal energy. Thermal ALD method, P using plasma-excited reactants The EALD (Plasma Enhanced ALD) method or the like can be used.

[0223] In addition, the ALD method utilizes the self-regulating properties of atoms to deposit atoms one layer at a time. This allows for ultra-thin film deposition, film deposition on structures with high aspect ratios, and pinholes. It is possible to form films with few defects such as holes, and to form films with excellent coverage, and to form films at low temperatures. The PEALD method uses plasma, which allows film formation at lower temperatures. In addition, the precursors used in the ALD method contain impurities such as carbon. Therefore, films formed by the ALD method may be different from films formed by other film formation methods. The amount of impurities may be higher than that of the film that has been treated. X-ray Photoelectron Spectros (XPS) This can be done using the copy function.

[0224] The CVD and ALD methods are film formation methods in which particles emitted from a target are deposited. It is a film forming method in which a film is formed by a reaction on the surface of the object to be treated. Therefore, this is a film forming method that is less affected by the shape of the workpiece and has good step coverage. In addition, the ALD method has excellent step coverage and thickness uniformity, making it suitable for forming thin films with high aspect ratios. However, the ALD method is relatively slow in forming films. Because the deposition rate is slow, it should be used in combination with other deposition methods such as CVD, which has a high deposition rate. may be preferable.

[0225] In the CVD and ALD methods, the composition of the resulting film is controlled by the flow rate ratio of the source gases. For example, in the CVD and ALD methods, the flow rate ratio of the source gases can be adjusted to any value. In addition, for example, in the CVD method and the ALD method, it is possible to form a film having the following composition. By changing the flow rate ratio of the source gases while oxidizing, a film with a continuously changing composition can be formed. When forming a film while changing the flow rate ratio of the source gases, multiple film forming chambers can be used. Compared to forming a film using a vacuum, the time required for film formation is shorter because there is no time required for transport or pressure adjustment. Therefore, the productivity of the semiconductor device can be improved. There is.

[0226] First, a substrate (not shown) is prepared, and an insulator 212 is formed on the substrate (FIG. 4A). (See FIGS. 4A to 4D.) The insulator 212 is preferably formed by sputtering. By using a sputtering method that does not require the use of hydrogen as a deposition gas, the insulator 21 However, the insulator 212 is formed by sputtering. The method is not limited to the deposition method, but may be a CVD method, an MBE method, a PLD method, an ALD method, or the like. That's fine.

[0227] In this embodiment, a silicon target is used as the insulator 212 in an atmosphere containing nitrogen gas. Silicon nitride is deposited by pulsed DC sputtering. By using the ring method, particle generation caused by arcing on the target surface is suppressed. This allows for a more uniform film thickness distribution. By using high frequency voltage, the rise and fall of discharge can be made steeper. This allows for more efficient power supply to the electrodes, improving the sputtering rate and film quality. It is possible.

[0228] By using an insulator that is difficult for impurities such as water and hydrogen to penetrate, such as silicon nitride, Therefore, the diffusion of impurities such as water and hydrogen contained in the layer below the insulator 212 can be suppressed. In addition, the insulator 212 is made of an insulator that is difficult for copper to penetrate, such as silicon nitride. Therefore, a metal that easily diffuses, such as copper, is used for the conductor in the layer (not shown) below the insulator 212. Even if the metal is present, it is possible to prevent the metal from diffusing upward through the insulator 212.

[0229] Next, an insulator 214 is formed on the insulator 212 (see FIGS. 4A to 4D). The film 214 is preferably formed by sputtering. By using a sputtering method that does not require the use of a silicon dioxide gas, the hydrogen concentration in the insulator 214 can be reduced. However, the method for forming the insulator 214 is not limited to the sputtering method. Alternatively, a CVD method, an MBE method, a PLD method, an ALD method, or the like may be used as appropriate.

[0230] In this embodiment, the insulator 214 is an aluminum target in an atmosphere containing oxygen gas. Using a sintered body, an aluminum oxide film is formed by pulsed DC sputtering. By using the sputtering method, the film thickness distribution becomes more uniform, and the sputtering rate and film thickness are Quality can be improved.

[0231] As the insulator 214, an amorphous structure having a high function of capturing and fixing hydrogen is used. It is preferable to use a metal oxide having the above structure, for example, aluminum oxide. The hydrogen contained in the oxide 230 is captured or fixed, and the hydrogen is diffused into the oxide 230. In particular, the insulator 214 is made of aluminum oxide having an amorphous structure. By using aluminum oxide or amorphous aluminum oxide, hydrogen can be absorbed more effectively. This is preferable because it may be possible to capture or fix the Therefore, a highly efficient transistor 200 and a semiconductor device can be manufactured.

[0232] Next, the insulator 216 is deposited on the insulator 214. The insulator 216 is deposited by sputtering. It is preferable to use a sputtering method that does not require the use of hydrogen as a deposition gas. By using this method, the hydrogen concentration in the insulator 216 can be reduced. The deposition of 216 is not limited to the sputtering method, but can also be performed by CVD, MBE, PL Method D, ALD, etc. may also be used as appropriate.

[0233] In this embodiment, a silicon target is used as the insulator 216 in an atmosphere containing oxygen gas. A silicon oxide film is formed by pulse DC sputtering using the pulse DC sputtering method. By using the ring method, the film thickness distribution becomes more uniform, and the sputtering rate and film quality are improved. It is possible.

[0234] The insulators 212, 214, and 216 are continuous and not exposed to the atmosphere. For example, a multi-chamber film forming apparatus may be used. This reduces hydrogen in the insulators 212, 214, and 216. Furthermore, it is possible to reduce the amount of hydrogen that gets mixed into the film between each film formation process. .

[0235] Next, an opening is formed in the insulator 216 that reaches the insulator 214. The opening may be, for example, a groove or This also includes slits. The area where an opening is formed may also be referred to as an opening. The openings may be formed by wet etching, but it is more preferable to use dry etching. Insulator 214 is preferably formed by etching insulator 216 to form grooves. It is preferable to select an insulator that functions as an etching stopper film when etching. When silicon oxide or silicon oxynitride is used for the insulator 216 forming the groove, the insulating The insulator 214 may be made of silicon nitride, aluminum oxide, or hafnium oxide.

[0236] The dry etching equipment is a capacitively coupled plasma (CCP) device with parallel plate electrodes. (Capacitively Coupled Plasma) etching equipment is used. The capacitively coupled plasma etching apparatus having parallel plate electrodes can Alternatively, a high frequency voltage may be applied to one of the parallel plate type electrodes. Alternatively, a parallel plate electrode may be used. Alternatively, a high frequency voltage of the same frequency may be applied to each of the parallel plate electrodes. Alternatively, a high-density plasma source may be provided. A dry etching apparatus having a high density plasma source can be used. The plasma processing device is, for example, an inductively coupled plasma (ICP) type. A plasma etching device or the like can be used.

[0237] After the opening is formed, a conductive film 205A is formed (see FIGS. 4A to 4D). 5A preferably contains a conductor that has the function of suppressing oxygen permeation. For example, nitride Tantalum, tungsten nitride, titanium nitride, etc. can be used. Conductors that suppress overheating and materials such as tantalum, tungsten, titanium, molybdenum, and aluminum The conductive film 2 can be a laminated film of aluminum, copper, or molybdenum-tungsten alloy. 05A film formation uses methods such as sputtering, CVD, MBE, PLD, and ALD. This can be done.

[0238] In this embodiment, titanium nitride is deposited as the conductive film 205A. By using the insulating material as the lower layer of the conductor 205b, the conductor 20 In addition, the conductor 205b can be prevented from being oxidized. Even if a metal that easily dissolves is used, the metal can be prevented from diffusing out of the conductor 205a. Cut.

[0239] Next, the conductive film 205B is formed (see FIGS. 4A to 4D). are tantalum, tungsten, titanium, molybdenum, aluminum, copper, molybdenum titanium The conductive film can be formed by plating, sputtering, or the like. This can be done by using a method such as a CVD method, an MBE method, a PLD method, or an ALD method. In this embodiment, a tungsten film is formed as the conductive film 205B.

[0240] Next, a part of the conductive film 205A and the conductive film 205B is removed by CMP processing. , exposing the insulator 216 (see FIGS. 5A to 5D). As a result, only the openings are covered with conductive material. The insulating layer 205a and the conductor 205b remain. Part of 6 may be removed.

[0241] Next, etching is performed to remove the upper portion of the conductor 205b (see FIGS. 6A to 6D). As a result, the upper surface of the conductor 205b is in contact with the upper surface of the conductor 205a and the insulator 216. The conductor 205b is etched by dry etching or wet etching. However, dry etching is preferable for fine processing. .

[0242] Next, a conductive film 205C is formed on the insulator 216, the conductor 205a, and the conductor 205b. (See FIGS. 7A to 7D.) The conductive film 205C is formed by the following process, similar to the conductive film 205A: It is desirable to include a conductor that has the function of suppressing oxygen permeation.

[0243] In this embodiment, titanium nitride is deposited as the conductive film 205C. By using the insulating material as the upper layer of the conductor 205b, the conductor 20 In addition, the conductor 205b can be prevented from being oxidized. Even if a metal that easily dissolves is used, the metal can be prevented from diffusing out of the conductor 205c. Cut.

[0244] Next, a part of the conductive film 205C is removed by CMP processing to expose the insulator 216. As a result, the conductor 205a and the conductor 205b are formed only in the opening. As a result, the conductor 205 has a flat top surface. Furthermore, the conductor 205b can be formed by connecting the conductor 205a and the conductor 205 Therefore, impurities such as hydrogen are absorbed from the conductor 205b into the conductor 205c. 205a and conductor 205c, and to prevent diffusion outside of conductor 205a and conductor This can prevent oxygen from entering 205c from outside and oxidizing the conductor 205b. The CMP process may remove a portion of the insulator 216 .

[0245] Next, an insulator 222 is formed on the insulator 216 and the conductor 205 (FIGS. 9A to 9C). 9D.) As the insulator 222, one or both of aluminum and hafnium It is preferable to form an insulator containing oxide. As insulators containing both oxides, aluminum oxide, hafnium oxide, and aluminum It is preferable to use oxides containing hafnium (hafnium aluminate) and the like. Insulators containing oxides of either or both aluminum and hafnium are highly resistant to oxygen, hydrogen, and The insulator 222 has a barrier property against hydrogen and water. By having Water is prevented from diffusing into the inside of the transistor 200 through the insulator 222, and oxidation is prevented. The generation of oxygen vacancies in the material 230 can be suppressed.

[0246] The insulator 222 can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. In this embodiment, the insulator 222 is formed by sputtering. The hafnium oxide film is formed by sputtering, which does not require the use of hydrogen as a film-forming gas. By using the ring method, the hydrogen concentration in the insulator 222 can be reduced.

[0247] Subsequently, it is preferable to carry out a heat treatment. The heat treatment is preferably carried out at a temperature of 250°C or higher and 650°C or lower. Preferably, the temperature is 300°C or higher and 500°C or lower, more preferably 320°C or higher and 450°C or lower. The heat treatment is carried out in an atmosphere of nitrogen gas or inert gas, or in an atmosphere of oxidizing gas for 10 minutes. ppm or more, 1% or more, or 10% or more. For example, nitrogen gas and oxygen When heat treatment is performed in a mixed gas atmosphere, the oxygen gas content should be about 20%. The heat treatment may be carried out under reduced pressure, or under nitrogen gas or an inert gas atmosphere. After heat treatment in the atmosphere, oxidizing gas is added at 10 ppm or more, 1 % or more, or 10% or more.

[0248] It is also preferable that the gas used in the heat treatment is highly purified. The moisture content of the gas used in the heat treatment is 1 ppb or less, preferably 0.1 ppb or less. The concentration of the purified gas is preferably 0.05 ppb or less. By carrying out this treatment, it is possible to prevent moisture and the like from being absorbed into the insulator 222 as much as possible. can.

[0249] In this embodiment, as the heat treatment, after the insulator 222 is formed, a mixture of nitrogen gas and oxygen gas is The flow rate ratio is set to 4 slm:1 slm, and the treatment is carried out at a temperature of 400°C for 1 hour. By this process, impurities such as water and hydrogen contained in the insulator 222 can be removed. In addition, when an oxide containing hafnium is used as the insulator 222, the heat treatment As a result, part of the insulator 222 may be crystallized. It can also be performed at a timing such as after the film formation.

[0250] Next, an insulator 224 is deposited on the insulator 222 (see FIGS. 9A to 9D). The deposition of 24 is performed using methods such as sputtering, CVD, MBE, PLD, and ALD. In this embodiment, the insulator 224 is formed by a sputtering method. A silicon oxide film is formed by sputtering, which does not require the use of hydrogen as a film-forming gas. By doing so, the hydrogen concentration in the insulator 224 can be reduced. Since the oxide 230a comes into contact with the oxide 230a during the process, it is preferable that the hydrogen concentration is reduced in this manner. be.

[0251] Here, in order to form an excess oxygen region in the insulator 224, a plasma containing oxygen is used under reduced pressure. The oxygen-containing plasma treatment may be, for example, a high-density plasma treatment using microwaves. It is preferable to use a device having a power source that generates plasma. Alternatively, RF ( The plasma may have a power source that applies high-density plasma. By doing so, high density oxygen radicals can be generated, and by applying RF to the substrate side, As a result, oxygen radicals generated by the high-density plasma are efficiently guided into the insulator 224. Alternatively, after performing a plasma treatment containing an inert gas using this apparatus, In order to compensate for the desorbed oxygen, a plasma treatment containing oxygen may be performed. By appropriately selecting the processing conditions, impurities such as water and hydrogen contained in the insulator 224 can be removed. In this case, the heat treatment is not necessary.

[0252] Here, aluminum oxide is formed on the insulator 224 by, for example, a sputtering method. After the film formation, a CMP process may be performed until the insulator 224 is reached. By performing this, the surface of the insulator 224 can be flattened and smoothed. By placing the silicon on the insulator 224 and performing the CMP process, the end point of the CMP process can be easily detected. Furthermore, the CMP process polishes a portion of the insulator 224, and the insulator 224 The thickness of the insulator 224 may be adjusted when the insulator 224 is formed. 224 Planarizing and smoothing the surface prevents a decrease in the coverage of the oxide film that will be formed later. This may prevent a decrease in the yield of the semiconductor device. By forming an aluminum oxide film on the insulating layer 224 by sputtering, This is preferable because oxygen can be added to the

[0253] Next, an oxide film 230A and an oxide film 230B are formed in this order on the insulator 224 (see FIG. 9A). (See FIG. 9D.) The oxide film 230A and the oxide film 230B are not exposed to the atmospheric environment. It is preferable to form the oxide film 230A and the oxide film 230B successively. Furthermore, it is possible to prevent impurities or moisture from the atmospheric environment from adhering to the oxide film 230B. This allows the vicinity of the interface between the oxide film 230A and the oxide film 230B to be kept clean.

[0254] The oxide film 230A and the oxide film 230B are formed by sputtering, CVD, MBE, or the like. The method can be carried out using a method such as a PLD method or an ALD method.

[0255] For example, the oxide film 230A and the oxide film 230B are formed by sputtering. In this case, oxygen or a mixture of oxygen and a rare gas is used as the sputtering gas. By increasing the oxygen ratio in the sputtering gas, the excess oxygen in the oxide film to be formed can be reduced. In addition, when the oxide film is formed by sputtering, For example, the above-mentioned In-M-Zn oxide target can be used.

[0256] In particular, when forming the oxide film 230A, part of the oxygen contained in the sputtering gas becomes an insulator. Therefore, the oxygen contained in the sputtering gas may The ratio may be 70% or more, preferably 80% or more, and more preferably 100%.

[0257] In addition, when the oxide film 230B is formed by sputtering, the oxide film 230B is formed by sputtering. The proportion of oxygen to be added is more than 30% and not more than 100%, preferably 70% or more and not more than 100%. When the film is formed using the above method, an oxygen-excess oxide semiconductor is formed. The transistor used in the channel formation region has relatively high reliability. In the case where the oxide film 230B is formed by a sputtering method, The proportion of oxygen contained in the sputtering gas is 1% or more and 30% or less, preferably 5% or more and 20% or less. If the film is formed at a concentration of 0% or less, an oxygen-deficient oxide semiconductor is formed. Transistors that use compound semiconductors in the channel formation region have a relatively high field-effect mobility. Furthermore, by forming the film while heating the substrate, the crystallinity of the oxide film can be improved. It can be done.

[0258] In this embodiment, the oxide film 230A is formed by sputtering In:Ga: The film is formed using an oxide target with an atomic ratio of Zn=1:3:4. 0B, by the sputtering method, In:Ga:Zn=4:2:4.1 [atomic ratio Each oxide film is formed using an oxide target with the following film formation conditions and atomic ratio: By appropriately selecting the oxide 230a and the oxide 230b, the desired properties can be obtained. It is good to form.

[0259] Next, an oxide film 243A is formed on the oxide film 230B (see FIGS. 9A to 9D). The film 243A is formed by sputtering, CVD, MBE, PLD, ALD, etc. The oxide film 243A has an atomic ratio of Ga to In of the oxide film 2 It is preferable that the atomic ratio of Ga to In is larger than that of 30B. The oxide film 243A is formed by sputtering a compound of In:Ga:Zn=1:3:4 [atomic The film is formed using an oxide target with a [number ratio].

[0260] The insulator 222, the insulator 224, the oxide film 230A, the oxide film 230B, and the oxide film It is preferable to form the film by sputtering without exposing 243A to the atmosphere. For example, a multi-chamber film forming apparatus may be used. The insulator 224, the oxide film 230A, the oxide film 230B, and the oxide film 243A are oxidized by removing hydrogen from the films. Furthermore, it is possible to reduce the amount of hydrogen mixed into the film between each film formation process. can.

[0261] Next, it is preferable to perform a heat treatment. The temperature range is 250°C to 650°C, and the oxide film 243A does not become polycrystalline. The heat treatment is preferably performed at a temperature of 400° C. or higher and 600° C. or lower. Or in an inert gas atmosphere, or oxidizing gas is 10 ppm or more, 1% or more, or For example, heat treatment is carried out in a mixed atmosphere of nitrogen gas and oxygen gas. In this case, the oxygen gas concentration may be set to about 20%. The heat treatment may also be carried out under reduced pressure. Alternatively, the heat treatment may be carried out in a nitrogen gas or inert gas atmosphere, followed by desorption. To compensate for the lost oxygen, an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of oxidizing gas is used. The heat treatment may be carried out in an atmosphere.

[0262] It is also preferable that the gas used in the heat treatment is highly purified. The moisture content of the gas used in the heat treatment is 1 ppb or less, preferably 0.1 ppb or less. The concentration of the purified gas is preferably 0.05 ppb or less. By performing the treatment, moisture and the like are removed from the oxide film 230A, the oxide film 230B, and the oxide film 243A. can be prevented as much as possible from being captured.

[0263] In this embodiment, the heat treatment is performed in a nitrogen atmosphere at a temperature of 550° C. for 1 hour. After that, the heating is continued in an oxygen atmosphere at a temperature of 550°C for 1 hour. According to this theory, water, hydrogen, etc. in the oxide film 230A, the oxide film 230B, and the oxide film 243A are removed. Furthermore, the heat treatment can remove impurities from the oxide film 230B. This improves the crystallinity of the acid, resulting in a denser, more compact structure. This can reduce the diffusion of oxygen or impurities in the oxide film 230B.

[0264] Next, a conductive film 242A is formed on the oxide film 243A (see FIGS. 9A to 9D). The deposition of the conductive film 242A is performed by sputtering, CVD, MBE, PLD, ALD, etc. For example, the conductive film 242A can be formed by sputtering. It is sufficient to form a film of tantalum nitride. Note that, before forming the conductive film 242A, a heat treatment may be performed. The heat treatment is preferably performed under reduced pressure, and the conductive film 242 is continuously formed without being exposed to the air. By performing such a process, a film A may be formed on the surface of the oxide film 243A, etc. The adsorbed moisture and hydrogen are removed, and the oxide film 230A, the oxide film 230B, and The moisture concentration and hydrogen concentration in the oxide film 243A can be reduced. In this embodiment, the temperature of the heat treatment is preferably 100° C. or more and 400° C. or less. °C.

[0265] Next, an insulating film 271A is formed on the conductive film 242A (see FIGS. 9A to 9D). The insulating film 271A is formed by a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. The insulating film 271A has a function of suppressing the permeation of oxygen. For example, the insulating film 271A is preferably formed by sputtering. Therefore, a film of aluminum oxide or silicon nitride may be formed.

[0266] Next, an insulating film 273A is formed on the insulating film 271A (see FIGS. 9A to 9D). The insulating film 273A is formed by a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. For example, the insulating film 273A can be formed by sputtering. Therefore, a film of silicon nitride or silicon oxide may be formed.

[0267] The conductive film 242A, the insulating film 271A, and the insulating film 273A are exposed to the atmosphere. It is preferable to form the film by sputtering rather than by using a multi-chamber method. A film forming apparatus may be used. This allows the conductive film 242A, the insulating film 271A, and the insulating film 273A was formed by reducing the hydrogen in the film, and then, between each film formation process, hydrogen was mixed in the film. In addition, when a hard mask is provided on the insulating film 273A, The film that will become the hard mask may also be formed continuously without being exposed to the atmosphere.

[0268] Next, oxide film 230A, oxide film 230B, and oxide film 243A are formed by lithography. The conductive film 242A, the insulating film 271A, and the insulating film 273A are processed into an island shape, and an oxide 2 30a, oxide 230b, oxide layer 243B, conductive layer 242B, insulating layer 271B, and An insulating layer 273B is formed (see FIGS. 10A to 10D). Dry etching and wet etching can be used. The oxide film 230A, the oxide film 230B, the oxide film 243A, The conductive film 242A, the insulating film 271A, and the insulating layer 271B are processed under different conditions. In this process, the oxide 230a of the insulator 224 may be overlapped. In this process, the insulator 224 may be made of an oxide. It may be configured to overlap with 230a and be processed into an island shape.

[0269] In the lithography method, first, the resist is exposed to light through a mask. The resist mask is formed by removing or leaving the resist patterned area using a developer. By etching through the resist mask, a conductor, a semiconductor, an insulator, or the like can be formed. For example, KrF excimer laser light, ArF excimer laser light, etc. can be used to process the material into the desired shape. Laser beams, EUV (Extreme Ultraviolet) beams, etc. are used. A resist mask can be formed by exposing the resist to light. An immersion technique may be used in which a liquid (for example, water) is filled between the substrate and the light source. Instead of the electron beam or the ion beam, an electron beam or an ion beam may be used. When using a resist mask, the mask is not required. Dry etching is performed, wet etching is performed, and after dry etching Wet etching is performed, or wet etching is performed followed by dry etching. This can be removed by performing a thorough cleaning.

[0270] Furthermore, a hard mask made of an insulator or a conductor may be used under the resist mask. When a hard mask is used, an insulating film or a conductive film that will be a hard mask material is formed on the conductive film 242A. Then, a resist mask is formed on the hard mask, and the hard mask material is etched. A hard mask having a desired shape can be formed. This can be done after removing the resist mask, or with the resist mask left on. In the latter case, the resist mask may disappear during etching. After etching A, the hard mask may be removed by etching. If the mask material does not affect the subsequent process or can be used in the subsequent process, it is not necessarily hard There is no need to remove the mask. In this embodiment, the insulating layer 271B and the insulating layer 273 On the other hand, the insulating layer 271B functions well as a hard mask. In this case, the insulating layer 273A does not necessarily have to be provided. Furthermore, the insulating layer 273B is not provided, and the insulating layer 271B is used as a hard mask. In this case, the thickness of the insulating layer 271B is adjusted appropriately to prevent the insulating layer 271B from being insulated during etching of the conductive film 242A, etc. It is preferable to suppress the disappearance of the edge layer 271B.

[0271] Here, the insulating layer 271B and the insulating layer 273B function as a mask for the conductive layer 242B. Therefore, as shown in FIGS. 10B to 10D, the conductive layer 242B has a curved surface between the side and top surfaces. 1B and 1D. The end where the side surface and the top surface of the conductor 242 intersect is angular. The corner shape of the end portion of the conductor 242 increases the cross-sectional area of ​​the conductor 242 compared to when the end portion has a curved surface. This reduces the resistance of conductor 242, thereby reducing the ON resistance of transistor 200. The on-current can be increased.

[0272] In addition, the oxide 230a, the oxide 230b, the oxide layer 243B, the conductive layer 242B, the insulating layer 271B and the insulating layer 273B are formed so as to overlap at least a portion of the conductor 205. In addition, the oxide 230a, the oxide 230b, the oxide layer 243B, the conductive layer 242B, the insulating layer 243B, and the insulating layer 243B are The side surfaces of the edge layer 271B and the insulating layer 273B are approximately perpendicular to the upper surface of the insulator 222. It is preferable that the oxide 230a, the oxide 230b, the oxide layer 243B, and the conductive layer 24 The side surfaces of the insulating layer 271B, the insulating layer 273B are approximately Being substantially vertical allows for a smaller area and higher density when providing a plurality of transistors 200. Alternatively, the oxide 230a, the oxide 230b, the oxide layer 243B, the conductive layer 242 B, the angle formed by the side surface of the insulating layer 271B and the insulating layer 273B and the top surface of the insulator 222 is In this case, the oxide 230a, the oxide 230b, and the oxide 230c may be arranged to have a low angle. The side surfaces of layer 243B, conductive layer 242B, insulating layer 271B, and insulating layer 273B, and the insulator The angle formed with the upper surface of 222 is preferably 60 degrees or more and less than 70 degrees. In the subsequent process, the coating property of the insulator 275 is improved, and defects such as voids are reduced. It is possible.

[0273] In addition, by-products generated in the etching process include oxide 230a, oxide 230b, The oxide layer 243B, the conductive layer 242B, the insulating layer 271B, and the insulating layer 273B are provided on their side surfaces. In this case, the layer-like by-product may be oxide 230a, oxide 230b, oxide 243, conductor 242, insulator 271, and insulator 273 and insulator 2 72. Similarly, a layer of by-products is formed on the insulator 224. When the layer of by-products is formed on the insulator 224, the insulator Even if the layer 275 is formed, the layered by-products hinder the addition of oxygen to the insulator 224. Therefore, the layer of by-products formed on the top surface of the insulator 224 is It is preferable to remove it.

[0274] Next, the insulator 224, the oxide 230a, the oxide 230b, the oxide layer 243B, and the conductive layer 2 An insulating film that becomes the insulator 272 is formed on the insulating layer 42B, the insulating layer 271B, and the insulating layer 273B. The insulating film that becomes the insulator 272 can be formed by a sputtering method, a CVD method, an MBE method, or the like. This can be done by using a PLD method, an ALD method, or the like. In this embodiment, the insulator 272 and As the insulating film, a silicon nitride film is formed by sputtering.

[0275] Next, the insulating film that will become the insulator 272 is anisotropically etched to form a layer on the insulating layer 273B. The insulating film and the insulating film on the insulator 224 are removed (see FIGS. 11A to 11D). 10. If layer-like by-products remain in the process shown in FIG. 10, the anisotropic etching This allows the oxide 230a and the oxide 230b to be removed. the surface, the side surface of the oxide layer 243B, the side surface of the conductive layer 242B, the side surface of the insulating layer 271B, and the insulating An insulating layer 272A is formed in contact with the side surface of the edge layer 273B.

[0276] In this way, oxide 230a, oxide 230b, oxide layer 243B, and conductive layer 242B is made of insulating layer 272A and insulating layer 271 This allows the oxide 2 to be covered with B. Oxygen diffuses into the oxide layer 30a, the oxide 230b, the oxide layer 243B, and the conductive layer 242B. can be reduced.

[0277] Next, an insulator 275 is formed on the insulator 224, the insulating layer 272A, and the insulating layer 273B. (See FIGS. 11A to 11D.) The insulator 275 is formed by sputtering. This can be done using a CVD method, an MBE method, a PLD method, an ALD method, or the like. It is preferable that 75 is made of an insulating film that has the function of suppressing oxygen permeation. The edge 275 may be formed by depositing aluminum oxide by sputtering.

[0278] The insulator 275 is preferably formed by sputtering. By forming the insulator 275 by the method, oxygen is added to the insulator 224 and the insulating layer 273B. At this time, an insulating layer 271B is provided in contact with the upper surface of the conductive layer 242B, Since the insulating layer 272A is provided in contact with the side surface of the conductive layer 242B, Oxidation can be reduced.

[0279] Next, an insulating film that will become the insulator 280 is formed on the insulator 275. The insulating film is formed as follows: This can be done using methods such as sputtering, CVD, MBE, PLD, and ALD. For example, a silicon oxide film can be formed as the insulating film by using a sputtering method. An insulating film to be the insulator 280 is formed by sputtering in an atmosphere containing oxygen. By doing so, the insulator 280 containing excess oxygen can be formed. By using a sputtering method that does not require the use of hydrogen, the hydrogen concentration in the insulator 280 can be reduced. Note that heat treatment may be performed before the insulating film is formed. The insulating film may be formed continuously under reduced pressure without being exposed to the atmosphere. By carrying out such a treatment, the moisture and water adsorbed on the surface of the insulator 275 are removed. The oxide 230a, the oxide 230b, the oxide layer 243B, and the insulator The water and hydrogen concentrations in the 224 can be reduced. The heat treatment conditions can be used.

[0280] Next, the insulating film that will become the insulator 280 is subjected to CMP processing to form the insulator 280 with a flat upper surface. (See FIGS. 11A to 11D.) In addition, for example, sputtering is performed on the insulator 280. Silicon nitride is deposited by a tapping method, and the silicon nitride is deposited until it reaches the insulator 280. CMP processing may be performed.

[0281] Next, a part of the insulator 280, a part of the insulator 275, a part of the insulating layer 273B, and the insulating layer 27 1B, a portion of the insulating layer 272A, a portion of the conductive layer 242B, a portion of the oxide layer 243B, A portion of the oxide 230b is processed to form an opening that reaches the oxide 230b. It is preferable that the opening is formed so as to overlap with the conductor 205. Insulator 273a, insulator 273b, insulator 271a, insulator 271b, insulator 272a, insulator conductor 242a, conductor 242b, oxide 243a, and oxide 243b. (See FIGS. 12A to 12D).

[0282] When forming the opening, the upper part of the oxide 230b is removed. The removal of the oxide 230b forms a groove in the oxide 230b. Depending on the depth of the groove, The groove may be formed in the forming step of the opening, or in a step different from the forming step of the opening. It may also be formed by

[0283] In addition, a part of the insulator 280, a part of the insulator 275, a part of the insulating layer 273B, and the insulating layer 27 1B, a portion of the insulating layer 272A, a portion of the conductive layer 242B, a portion of the oxide layer 243B, The oxide 230b is partially processed using a dry etching method or a wet etching method. Dry etching is suitable for microfabrication. The processing may be performed under different conditions. For example, a part of the insulator 280 may be processed under dry air. By etching, a part of the insulator 275, a part of the insulating layer 273B, and a part of the insulating layer 271B are A part of the insulating layer 272A is processed by wet etching, and a part of the oxide layer 243B is processed by wet etching. A part of the conductive layer 242B and a part of the oxide 230b are processed by dry etching. In addition, processing a part of the oxide layer 243B and a part of the conductive layer 242B and forming an oxide 2 The processing of part of 30b may be carried out under different conditions.

[0284] Here, impurities attached to the surface of the oxide 230a, the oxide 230b, etc. or diffused inside the oxide 230a, etc. It is preferable to remove the oxide 230b formed on the surface by the dry etching. It is preferable to remove the damaged region. The body 275, a part of the insulating layer 273B, a part of the insulating layer 271B, a part of the insulating layer 272A, and and the components contained in the conductive layer 242B, and the components used in the device used to form the openings. This is caused by components contained in the materials used, or components contained in the gas or liquid used in etching. Examples of such impurities include aluminum, silicon, tantalum, and the like. Examples include fluorine, chlorine, etc.

[0285] In particular, impurities such as aluminum or silicon may be present in the CAAC-O oxide 230b. Therefore, aluminum or silicon, which inhibits the CAAC-OS formation, It is preferable that harmful impurity elements are reduced or removed. For example, oxide 230 The concentration of aluminum atoms in b and its vicinity should be 5.0 atomic % or less. Preferably, it is 2.0 atomic % or less, more preferably 1.5 atomic % or less, and more preferably 1.0 atomic % or less. more preferably less than 0.3 atomic %.

[0286] Note that impurities such as aluminum or silicon inhibit the formation of CAAC-OS. , quasi-amorphous oxide semiconductor (a-like OS: amorphous-like ox The region of the metal oxide that has become a semiconductor (CAAC) is called the non-CAAC region. In the non-CAAC region, the crystalline structure is less dense, so V O H Therefore, the oxide 230 Preferably, the non-CAAC region of b is reduced or eliminated.

[0287] In contrast, it is preferable that the oxide 230b has a layered CAAC structure. In addition, it is preferable that the oxide 230b has a CAAC structure up to the bottom end of the drain. In the transistor 200, the conductor 242a or the conductor 242b and its vicinity That is, the area near the bottom end of the conductor 242a (conductor 242b) functions as a drain. It is preferable that the oxide 230b has a CAAC structure. The damaged area of ​​oxide 230b is removed, even at the drain edge, which significantly affects the CA By having an AC structure, it is possible to further suppress fluctuations in the electrical characteristics of the transistor 200. In addition, the reliability of the transistor 200 can be improved.

[0288] In order to remove the above impurities, a cleaning process is carried out. There are various cleaning methods, such as wet cleaning using plasma, plasma treatment using plasma, and cleaning by heat treatment. The above cleaning processes may be combined as appropriate. This may occur.

[0289] For wet cleaning, ammonia water, oxalic acid, phosphoric acid, hydrofluoric acid, etc. are mixed with carbonated water. Alternatively, the cleaning treatment may be carried out using an aqueous solution diluted with pure water, pure water, carbonated water, or the like. Alternatively, ultrasonic cleaning may be performed using an aqueous solution of these, pure water, or carbonated water. These cleaning methods may be combined as appropriate.

[0290] In this specification and the like, an aqueous solution obtained by diluting commercially available hydrofluoric acid with pure water is referred to as diluted hydrofluoric acid. Ammonia is sometimes called an acid, and the aqueous solution obtained by diluting commercially available aqueous ammonia with pure water is sometimes called diluted aqueous ammonia. The concentration and temperature of the aqueous solution depend on the impurities to be removed and the semiconductor device to be cleaned. The ammonia concentration of diluted ammonia water is 0.0 The concentration is 1% or more and 5% or less, preferably 0.1% or more and 0.5% or less. The hydrogen fluoride concentration of the hydrofluoric acid is 0.01 ppm or more and 100 ppm or less, preferably 0.1 ppm or less. It should be between pm and 10 ppm.

[0291] For ultrasonic cleaning, a frequency of 200 kHz or more, preferably 900 kHz or more, is used. By using this frequency, damage to the oxide 230b etc. can be reduced. It can be reduced.

[0292] The above-mentioned cleaning treatment may be carried out multiple times, and the cleaning solution may be changed for each cleaning treatment. For example, the first cleaning treatment may be a treatment using diluted hydrofluoric acid or diluted aqueous ammonia. The first cleaning treatment may be performed using pure water or carbonated water, and the second cleaning treatment may be performed using pure water or carbonated water.

[0293] In this embodiment, the cleaning process is performed by wet cleaning using diluted hydrofluoric acid. Then, wet cleaning is performed using pure water or carbonated water. , removing impurities attached to the surface of the oxide 230a, the oxide 230b, etc. or diffused inside the oxide 230a, etc. Furthermore, the crystallinity of the oxide 230b can be improved.

[0294] Until now, by processing such as dry etching or the above cleaning process, The thickness of the insulator 224 in the region where it does not overlap with the oxide 230b is The thickness may be thinner than the thickness of the insulator 224 in the overlapping region.

[0295] After the etching or the cleaning, a heat treatment may be carried out. The heating temperature may be from 350°C to 450°C, preferably from 350°C to 400°C. The treatment is carried out in an atmosphere of nitrogen gas or inert gas, or an oxidizing gas of 10 ppm or more, 1% For example, heat treatment should be performed in an oxygen atmosphere. This is preferable. Oxygen is supplied to the oxide 230a and the oxide 230b, and the oxygen Missing V O In addition, by performing such a heat treatment, the oxide 23 The crystallinity of 0b can be improved. The heat treatment may be carried out under reduced pressure. Alternatively, after heat treatment in an oxygen atmosphere, the material is continuously heat treated in a nitrogen atmosphere without being exposed to the air. may be performed.

[0296] Next, an insulating film 250A is formed (see FIGS. 13A to 13D). The heat treatment may be carried out under reduced pressure without exposure to the atmosphere. The insulating film 250A may be formed continuously after the heat treatment. By performing such a treatment, the surface of the oxide 230b, etc. and removing the moisture and hydrogen adsorbed on the oxide 230a and the oxide 230b. The temperature of the heat treatment is 100°C or higher. The temperature is preferably at most 400°C.

[0297] The insulating film 250A can be formed by a method such as sputtering, CVD, MBE, PLD, or ALD. The insulating film 250A can be formed using a material in which hydrogen atoms are reduced or removed. It is preferable to form the insulating film 250A by a film forming method using a gas containing the water. The insulating film 250A is in contact with the oxide 230b in a later step. Since the insulator 250 is formed, it is preferable that the hydrogen concentration is reduced in this manner.

[0298] Moreover, it is preferable that the insulating film 250A be formed by the ALD method. The thickness of the insulator 250 that functions as the gate insulating film of the transistor 200 is extremely thin (e.g., For example, it is necessary to make the size between 5 nm and 30 nm, and to minimize the variation. In contrast, the ALD method alternately introduces a precursor and a reactant (oxidant). The film thickness can be adjusted by the number of times this cycle is repeated. Therefore, it is possible to precisely adjust the film thickness. As shown in FIGS. 13B and 13C, the accuracy of the gate insulating film can be achieved. The insulating film 250A is formed on the bottom and side surfaces of the opening formed by the insulator 280 and the like. The film must be deposited with good coverage. The bottom and side surfaces of the opening must be deposited with a layer of atoms. Since the insulating film 250A can be deposited in the opening with good coverage, It is possible.

[0299] Furthermore, for example, when the insulating film 250A is formed by using the PECVD method, a compound containing hydrogen is used. The membrane gas is decomposed in the plasma, generating a large amount of hydrogen radicals. The reaction extracts oxygen from the oxide 230b, forming V O When H is formed, oxide 2 However, the hydrogen concentration in the insulating film 250A is increased by using the ALD method. This suppresses the generation of hydrogen radicals both when introducing the precursor and when introducing the reactant. Therefore, by forming the insulating film 250A using the ALD method, it is possible to form an oxide film. This can prevent the hydrogen concentration in 230b from becoming too high.

[0300] 13B, 13C, and 13D, the insulating film 250A is illustrated as a single layer. When the insulating film 250A has a two-layered structure, the insulating film 25 The lower layer of insulating film 250A is formed using an insulator that releases oxygen when heated. The layer is preferably formed using an insulator that has a function of suppressing the diffusion of oxygen. By adopting such a configuration, oxygen contained in the lower layer of the insulator 250 is diffused into the conductor 260. In other words, the amount of oxygen supplied to the oxide 230 can be prevented from decreasing. In addition, oxidation of the conductor 260 due to oxygen contained in the lower layer of the insulator 250 can be suppressed. For example, the lower layer of the insulating film 250A may be the same as that used for the insulator 250 described above. The insulating film 250A is formed using a material that can be used for the insulating layer 222. It can be provided using.

[0301] Specifically, the upper layer of the insulating film 250A may be made of hafnium, aluminum, gallium, or indium. Tritium, Zirconium, Tungsten, Titanium, Tantalum, Nickel, Germanium a metal oxide containing one or more metals selected from the group consisting of magnesium, Metal oxides can be used as the oxide 230. In particular, aluminum It is preferable to use an insulator containing oxides of one or both of tungsten and hafnium. .

[0302] In this embodiment, the insulating film 250A has a two-layer laminate structure, with silicon oxide as the lower layer. The film is formed using the PEALD method, and a hafnium oxide film is formed as an upper layer using the thermal ALD method.

[0303] When the insulating film 250A has a two-layer laminated structure, the insulating film 250A is formed by laminating two layers. The insulating film on which the insulating film 250A is formed is continuously formed without exposure to the atmospheric environment. It is preferable that the insulating film that is the lower layer of the insulating film 250A is formed without exposure to the atmosphere. Impurities such as hydrogen from the atmospheric environment or water on the insulating film that is the upper layer of the insulating film 250A The insulating film 250A and the insulating film 250B can be prevented from adhering to each other. The area around the interface with the insulating film that is the upper layer of A can be kept clean.

[0304] Next, microwave treatment is performed in an oxygen-containing atmosphere (see FIGS. 13A to 13D). 13B, 13C, and 13D, the dotted lines indicate microwaves, RF, and other high-frequency waves, oxygen Plasma, oxygen radicals, etc. Microwave treatment is a process using microwaves, for example. It is preferable to use a microwave processing apparatus having a power source that generates high density plasma. The microwave processing device may also have a power source for applying RF to the substrate side. By using plasma, high density oxygen radicals can be generated. By applying RF to the oxygen ions generated by the high density plasma, the oxygen ions are efficiently converted into oxygen. The microwave treatment can be carried out under reduced pressure. Preferably, the pressure is 60 Pa or more, preferably 133 Pa or more, more preferably 200 Pa or more. The oxygen flow rate ratio (O2 / O2+ The treatment temperature is preferably 50% or less, more preferably 10% or more and 30% or less. The temperature may be 750°C or less, preferably 500°C or less, for example, about 400°C. After the nitrogen plasma treatment, a heat treatment may be carried out successively without exposure to the outside air.

[0305] As shown in Figures 13B, 13C, and 13D, microwave treatment was performed in an oxygen-containing atmosphere. By using microwaves or high frequencies such as RF, oxygen gas is turned into plasma, and the oxygen The plasma is applied to the region of the oxide 230b between the conductors 242a and 242b. At this time, microwaves or high frequencies such as RF can be irradiated onto the region 230bc. That is, it is possible to apply high-frequency waves such as microwaves or RF to the area 230bc shown in FIG. It can be used to treat plasma, microwaves, etc. From the V of the area 230bc O H can be split off and hydrogen H can be removed from the region 230bc. In other words, in the area 230bc, O H→H+V O " reaction occurs, and the territory Therefore, the hydrogen concentration in the region 230bc can be reduced. , and V O H can be reduced, and the carrier concentration can be reduced. The oxygen vacancies formed in step c are filled with oxygen radicals generated by the oxygen plasma or insulator 2. By supplying oxygen contained in 50, oxygen vacancies in the region 230bc are further reduced, The carrier concentration can be reduced.

[0306] On the other hand, the conductors 242a and 242b are formed on the regions 230ba and 230bb shown in FIG. As shown in Figures 13B, 13C, and 13D, 242a and the conductor 242b are connected to a microwave, a high frequency wave such as RF, an oxygen plasma, or the like. Since the ion beam shields the area 230a and the area 230b, these effects do not reach the area 230ba and the area 230bb. As a result, in the region 230ba and the region 230bb, V OSince H is reduced and excessive oxygen supply does not occur, a decrease in carrier concentration is prevented. It is possible.

[0307] In this way, oxygen vacancies and V are selectively formed in the oxide semiconductor region 230bc. O H It can be removed to make the region 230bc i-type or substantially i-type. The regions 230ba and 230bb function as source and drain regions. This suppresses the supply of oxygen and maintains the n-type structure. The variation in the electrical characteristics of the transistor 200 is suppressed, and the electrical characteristics of the transistor 200 are prevented from varying within the substrate surface. This can help prevent this.

[0308] Therefore, it is possible to provide a semiconductor device with little variation in transistor characteristics. Furthermore, it is possible to provide a semiconductor device with good reliability. A semiconductor device can be provided.

[0309] In the process shown in FIG. 13, microwave treatment was performed after the insulating film 250A was formed. The present invention is not limited to this. For example, a microwave treatment may be performed before the insulating film 250A is formed. Alternatively, microwave treatment may be performed both before and after the formation of the insulating film 250A. It is also possible.

[0310] For example, when the insulating film 250A has the above-mentioned two-layer structure, microwave treatment is performed to The silicon oxide layer under the film 250A is formed by the PEALD method, and the silicon oxide layer over the insulating film 250A is formed by the PEALD method. Hafnium can be deposited by thermal ALD. PEALD deposition of hafnium oxide and thermal ALD deposition of hafnium oxide can be performed without exposure to air. It is preferable to carry out continuous processing. For example, a multi-chamber processing device may be used. In addition, the microwave treatment was performed using the plasma-excited reactant ( The reactant (oxidant) may be replaced by oxygen gas. Just use

[0311] Alternatively, after the microwave treatment, a heat treatment may be carried out while maintaining the reduced pressure state. By performing such a process, the insulating film 250A, the oxide 230b, and the oxide 230a are In addition, a part of the hydrogen is removed by the conductor 242 (conductor 2 42a and conductor 242b). Even if the heating step is repeated multiple times while maintaining the reduced pressure after the treatment, By repeatedly performing the heat treatment, the insulating film 250A, the oxide 230b, and the oxide The hydrogen in the oxide 230a can be removed more efficiently. The temperature is preferably 300°C or higher and 500°C or lower.

[0312] In addition, by performing microwave processing to improve the film quality of the insulating film 250A, hydrogen, water, impurities, etc. Therefore, the diffusion of impurities and the like can be suppressed. By post-processing or post-treatment such as heat treatment, hydrogen, water, impurities, etc. However, it is possible to suppress diffusion of the oxide 230b, the oxide 230a, and the like.

[0313] Next, a conductive film that will become the conductor 260a and a conductive film that will become the conductor 260b are formed in this order. The conductive film that becomes the conductor 260a and the conductive film that becomes the conductor 260b are formed by sputtering. This can be done by using a method such as a CVD method, an MBE method, a PLD method, or an ALD method. In this embodiment, a conductive film that becomes the conductor 260a is formed by the ALD method, and a CVD method is used. A conductive film that will become the conductor 260b is formed.

[0314] Next, the insulating film 250A, the conductive film that will become the conductor 260a, and the conductive film are formed by CMP processing. The conductive film that becomes the conductive body 260b is polished until the insulator 280 is exposed. 250, and conductor 260 (conductor 260a and conductor 260b) are formed (FIG. 14A to 14D.) This allows the insulator 250 to have an opening that reaches the oxide 230b. The oxide 230b is disposed so as to cover the inner walls (side walls and bottom surface) of the groove. The conductor 260 is formed so as to fill the opening and the groove through the insulator 250. To be placed.

[0315] Next, heat treatment may be performed under the same conditions as the above heat treatment. The heat treatment is carried out in a nitrogen atmosphere at a temperature of 400°C for 1 hour. The moisture concentration and hydrogen concentration in the insulator 280 can be reduced. After the heat treatment, the next step of forming the insulator 282 can be carried out without exposing it to the atmosphere. good.

[0316] Next, an insulator 282 is formed on the insulator 250, the conductor 260, and the insulator 280. (See FIGS. 15A to 15D.) The insulator 282 is formed by a sputtering method, a C This can be done by using a VD method, an MBE method, a PLD method, an ALD method, or the like. The film formation is preferably carried out by sputtering. By using a good sputtering method, the hydrogen concentration in the insulator 282 can be reduced. In addition, the insulator 282 is formed in an oxygen-containing atmosphere by sputtering. In this way, oxygen can be added to the insulator 280 while the film is being formed. In this case, the substrate is heated while the insulator 2 is heated. It is preferable to deposit 82.

[0317] In this embodiment, the insulator 282 is an aluminum target in an atmosphere containing oxygen gas. Using a sintered body, an aluminum oxide film is formed by pulsed DC sputtering. By using the sputtering method, the film thickness distribution becomes more uniform, and the sputtering rate and film thickness are Quality can be improved.

[0318] Next, an insulator 283 is formed on the insulator 282 (see FIGS. 16A to 16D). The insulator 283 is formed by sputtering, CVD, MBE, PLD, or AL. The insulator 283 can be formed by sputtering. It is preferable to use a sputtering method that does not require the use of hydrogen as a deposition gas. This reduces the hydrogen concentration in the insulator 283. In addition, the insulator 283 is made of multiple layers. For example, a silicon nitride film may be formed by sputtering, and the silicon nitride film may be Silicon nitride may be deposited on the capacitor using CVD. 3 and insulator 212, the transistor 200 is protected from moisture and water. This can prevent elements from entering.

[0319] Next, heat treatment may be performed. In this embodiment, heat treatment is performed in a nitrogen atmosphere at a temperature of 400° C. The heat treatment is carried out for one hour. As a result of the heat treatment, a film of the insulator 282 is formed as shown in FIG. The oxygen added by the method is diffused into the insulator 280 and the insulator 250, and the oxide 230 is chalcogenide. The heat treatment can be selectively applied to the channel forming region. The step may be performed after the formation of the insulator 282, for example, without being limited to the step after the formation of the insulator 282.

[0320] Next, the insulator 271, the insulator 273, the insulator 275, the insulator 280, the insulator 282, and An opening is formed in the insulator 283 to reach the conductor 242 (see FIGS. 16A to 16D). The opening can be formed by using a lithography method. The shape of the opening is circular when viewed from above, but is not limited to this. For example, the opening may have a substantially circular shape such as an oval, a polygonal shape such as a square, or a rectangular shape when viewed from above. The corners of the polygon may be rounded.

[0321] Next, an insulating film that will become the insulator 241 is formed, and the insulating film is anisotropically etched to form the insulator 16A to 16D. Deposition of an insulating film that will become the insulator 241. This is done using the sputtering method, CVD method, MBE method, PLD method, or ALD method. The insulating film that becomes the insulator 241 has a function of suppressing oxygen permeation. For example, an insulating film made of aluminum oxide is preferably formed by the ALD method. Alternatively, it is preferable to form a silicon nitride film by using the PEALD method. Silicon nitride is preferred because it has a high barrier property against hydrogen.

[0322] The anisotropic etching of the insulating film that becomes the insulator 241 may be, for example, dry etching. By providing an insulator 241 on the side wall of the opening, oxygen from the outside can be prevented from entering. This suppresses the permeation of the conductor 240a and the conductor 240b to be formed next, thereby preventing oxidation. In addition, impurities such as water and hydrogen can be removed from the conductors 240a and 240b. It can prevent the spread to the outside.

[0323] Next, a conductive film that will become the conductor 240a and the conductor 240b is formed. The conductive film that becomes the conductor 240b has a function of suppressing the permeation of impurities such as water and hydrogen. It is desirable to use a laminated structure containing a conductive material such as tantalum nitride or titanium nitride. The conductor 240 may be a laminate of tungsten, molybdenum, copper, or the like. The conductive film is formed by sputtering, CVD, MBE, PLD or ALD. This can be done using methods such as the

[0324] Next, a CMP process is performed to remove the conductive film that will become the conductors 240a and 240b. A portion of the insulating film is removed to expose the upper surface of the insulating film 283. As a result, the conductive film remains only in the opening. By virtue of this, the conductors 240a and 240b can be formed with flat upper surfaces. (See FIGS. 16A to 16D.) Note that the CMP process Portions of the insulator 274 and portions of the top surface thereof may be removed.

[0325] Next, a conductive film that will become the conductor 246 is formed. It can be performed using methods such as sputtering, CVD, MBE, PLD, or ALD. can.

[0326] Next, the conductive film that will become the conductor 246 is processed by lithography to form the conductor 240a and a conductor 246b in contact with the upper surface of the conductor 240b. (See FIGS. 1A to 1D.) At this time, the conductors 246a and 246b are , a portion of the insulator 283 in the area where it does not overlap with the insulator 283 may be removed.

[0327] Next, an insulator 286 is formed on the conductor 246 and the insulator 283 (see FIG. 1A). (See FIG. 1D.) The insulator 286 can be formed by sputtering, CVD, MBE, or P This can be done using the LD method, the ALD method, etc. Also, the insulator 286 can be formed as a multilayer. For example, a silicon nitride film may be formed by sputtering, and the silicon nitride film may be A silicon nitride film may be formed on the silicon nitride film by using a CVD method.

[0328] Through the above steps, a semiconductor device including the transistor 200 shown in FIGS. 1A to 1D is manufactured. 4A to 16A, 4B to 16B, 4C to 16C, and 4D to 16D, a semiconductor device manufactured by the method for manufacturing the semiconductor device described in this embodiment mode is In this way, the transistor 200 can be manufactured.

[0329] <Microwave processing equipment> A microwave processing apparatus that can be used in the manufacturing method of the semiconductor device will be described below. and explain.

[0330] First, let us look at the configuration of a manufacturing device that minimizes the amount of impurities introduced during the manufacturing of semiconductor devices. 7, 18 and 19.

[0331] FIG. 17 is a schematic top view of a single-wafer multi-chamber manufacturing apparatus 2700. The manufacturing equipment 2700 includes a cassette port 2761 for accommodating substrates and a substrate alignment unit. and an atmosphere-side substrate supply chamber 2701 having an alignment port 2762 for performing the alignment. The substrate supply chamber 2701 is connected to the atmospheric substrate transfer chamber 2702, which transfers the substrate. and a load lock chamber in which the pressure inside the chamber is switched from atmospheric pressure to reduced pressure or from reduced pressure to atmospheric pressure. 2703a, and the substrate is removed, and the pressure in the chamber is reduced to atmospheric pressure, or atmospheric pressure to atmospheric pressure. The unload lock chamber 2703b is switched to a reduced pressure, and the transfer chamber 2703b transfers the substrate in a vacuum. 704, chamber 2706a, chamber 2706b, and chamber 2706c. , and chamber 2706d.

[0332] The atmospheric substrate transfer chamber 2702 is provided with a load lock chamber 2703a and an unload lock chamber 2703b. The load lock chamber 2703a and the unload lock chamber 2703b are connected to the 3b is connected to a transfer chamber 2704, which is connected to a chamber 2706a, a chamber Bar 2706b connects chamber 2706c and chamber 2706d.

[0333] A gate valve GV is provided at the connection between each chamber, and the atmosphere-side substrate supply chamber 270 1 and the atmosphere side substrate transfer chamber 2702, each chamber can be independently maintained in a vacuum state. In addition, a transfer robot 2763a is provided in the atmospheric substrate transfer chamber 2702. The transfer room 2704 is provided with a transfer robot 2763b. and a transfer robot 2763b, which can transfer substrates within the manufacturing equipment 2700. do.

[0334] The back pressure (total pressure) of the transfer chamber 2704 and each chamber is, for example, 1×10 -4 Pa or less , preferably 3 x 10 -5 Pa or less, more preferably 1×10 -5 Pa or less. In addition, the mass-to-charge ratio (m / z) of the gas molecules ( The partial pressure of the atom is, for example, 3×10 -5 Pa or less, preferably 1×10 -5 Pa or less, More preferably 3×10 -6 The pressure in the transfer chamber 2704 and each chamber is set to be equal to or less than Pa. The partial pressure of a gas molecule (atom) with m / z of 28 is, for example, 3 x 10 -5 Pa or less, preferred Or 1 x 10 -5 Pa or less, more preferably 3×10 -6 Pa or less. The partial pressure of gas molecules (atoms) with m / z of 44 in the delivery chamber 2704 and each chamber is, for example, 3×10 -5 Pa or less, preferably 1×10 -5 Pa or less, more preferably 3 x 1 0 -6 Pa or less.

[0335] The total pressure and partial pressure in the transfer chamber 2704 and each chamber were measured using a mass spectrometer. For example, a quadrupole mass spectrometer (Q-mass spectrometer) manufactured by ULVAC, Inc. Also known as s.) Qulee CGM-051 can be used.

[0336] In addition, the transfer chamber 2704 and each chamber are constructed to minimize external or internal leaks. For example, the leak rates of the transfer chamber 2704 and each chamber are , 3×10 -6 Pa·m 3 / s or less, preferably 1 × 10 -6 Pa·m 3 / s or less For example, the leak rate of a gas molecule (atom) with m / z 18 is 1×10 -7 P a·m 3 / s or less, preferably 3 × 10 -8 Pa·m 3 / s or less. Also, for example, The leak rate of gas molecules (atoms) with m / z of 28 is 1×10 -5 Pa·m 3 / s or less , preferably 1 x 10 -6 Pa·m 3 / s or less. For example, if the m / z is 44, The leak rate of gas molecules (atoms) is 3×10 -6 Pa·m 3 / s or less, preferably 1× 10 -6 Pa·m 3 / s or less.

[0337] The leak rate was calculated from the total pressure and partial pressure measured using the mass spectrometer mentioned above. The leak rate depends on the external leak and the internal leak. The problem is that gas enters from outside the vacuum system due to a small hole or poor sealing. Leaks occur due to leakage from partitions such as valves in the vacuum system or gas released from internal components. To keep the leak rate below the above-mentioned value, both external and internal leaks are considered. It is necessary to take measures from

[0338] For example, the opening and closing parts of the transfer chamber 2704 and each chamber are sealed with metal gaskets. Metal gaskets should be coated with iron fluoride, aluminum oxide, or chromium oxide. It is preferable to use a metal gasket coated with a metal. Metal gaskets have a higher adhesion than O-rings. In addition, iron fluoride, aluminum oxide, chromium oxide, etc. By using a metal passivation coated with a This suppresses the release of gas and reduces internal leakage.

[0339] In addition, the components constituting the manufacturing equipment 2700 are made of aluminum, which emits less gas containing impurities. The alloys used are aluminum, chromium, titanium, zirconium, nickel, or vanadium. The above-mentioned members may be used by being coated with an alloy containing iron, chromium, nickel, etc. Aluminum and nickel-containing alloys are rigid, heat resistant, and easy to process. Therefore, if the surface irregularities of the component are reduced by polishing or the like to reduce the surface area, Gas emissions can be reduced.

[0340] Alternatively, the components of the manufacturing apparatus 2700 may be made of iron fluoride, aluminum oxide, chromium oxide, etc. It may be coated with, for example.

[0341] It is preferable that the components of the manufacturing apparatus 2700 are made of metal only, for example, quartz. When installing a viewing window made of iron fluoride, the surface is coated with iron fluoride to suppress gas emissions. It is recommended to coat it thinly with aluminum oxide or chromium oxide.

[0342] The adsorbed substances present in the transfer chamber 2704 and each chamber are adsorbed to the inner walls, etc. Although it does not affect the pressure of the transfer chamber 2704 and each chamber, This causes gas release when the chamber is evacuated. Therefore, the leak rate is proportional to the pumping speed. Although there is no relation between the two, a pump with high exhaust capacity is used to pump the transfer chamber 2704 and each chamber. It is important to desorb as much of the adsorbed matter as possible and evacuate the gas in advance. To promote desorption of adsorbates, the transfer chamber 2704 and each chamber may be baked. Baking can increase the desorption rate of adsorbed substances by about 10 times. The heating may be performed at a temperature of 100°C or higher and 450°C or lower. When adsorbed substances are removed while being introduced into each chamber, they are difficult to desorb by simply evacuating. The desorption rate of water and other substances can be further increased. By heating the temperature to the same level as King's, the desorption rate of the adsorbed substances can be further increased. Here, it is preferable to use a rare gas as the inert gas.

[0343] Alternatively, an inert gas such as a heated rare gas or oxygen may be introduced into the transfer chamber 27. After a certain time has passed, the pressure in the transfer chamber 2704 and each chamber is increased. It is preferable to evacuate the chamber. and the adsorbed substances in each chamber can be desorbed. This process can reduce impurities present in the bar. This process should be repeated at least 2 times but no more than 30 times. It is effective to repeat the process preferably 5 to 15 times. An inert gas having a temperature of 40°C or higher and 400°C or lower, preferably 50°C or higher and 200°C or lower By introducing oxygen etc., the pressure in the transfer chamber 2704 and each chamber is kept below 0.1 Pa. and 10 kPa or less, preferably 1 Pa or more and 1 kPa or less, and more preferably 5 Pa or more and 10 kPa or less. The pressure is maintained for 1 minute to 300 minutes, preferably 5 minutes to 120 minutes. After that, the transfer chamber 2704 and each chamber are heated for 5 minutes or more and 300 minutes or more. The air is evacuated for a period of time of 10 minutes to 120 minutes.

[0344] Next, the chamber 2706b and the chamber 2706c are shown in the cross-sectional diagram of FIG. This will be explained using a diagram.

[0345] The chambers 2706b and 2706c are used to apply microwaves to the object to be treated. The chambers 2706b and 2706c are chambers where processing can be performed. The only difference between the 2706c and the 2706c is the atmosphere used during microwave processing. Since these are common to both, they will be explained together below.

[0346] Chamber 2706b and chamber 2706c are connected to a slot antenna plate 2808. , a dielectric plate 2809, a substrate holder 2812, and an exhaust port 2819. Outside the chambers 2706b and 2706c, a gas supply source 2801 and A valve 2802, a high frequency generator 2803, a waveguide 2804, and a mode converter 2805 , a gas pipe 2806, a waveguide 2807, a matching box 2815, and a high frequency power supply 2816, a vacuum pump 2817, and a valve 2818 are provided.

[0347] The high frequency generator 2803 is connected to the mode converter 2805 via the waveguide 2804. The mode converter 2805 is connected to a slot antenna plate 2808 via a waveguide 2807. The slot antenna plate 2808 is placed in contact with the dielectric plate 2809. The gas supply source 2801 is connected to a mode converter 2805 via a valve 2802. Then, the gas passing through the mode converter 2805, the waveguide 2807, and the dielectric plate 2809 Pipe 2806 delivers gas to chamber 2706b and chamber 2706c. The vacuum pump 2817 also supplies the chamber with air via a valve 2818 and an exhaust port 2819. It has the function of exhausting gases and the like from the member 2706b and the chamber 2706c. The high frequency power supply 2816 is connected to the substrate holder 2812 via a matching box 2815. Connected.

[0348] The substrate holder 2812 has a function of holding the substrate 2811. For example, It has the function of electrostatically chucking or mechanically chucking the object. It also has a heating mechanism 2813 inside, It has the function of heating the substrate 2811 .

[0349] Examples of vacuum pumps 2817 include dry pumps, mechanical booster pumps, Ion pump, titanium sublimation pump, cryopump or turbomolecular pump In addition to the vacuum pump 2817, a cryotrap can be used. Water can be efficiently pumped out by using a cryopump and a cryotrap. This is particularly preferred.

[0350] The heating mechanism 2813 may be, for example, a heating mechanism that uses a resistance heating element or the like. Alternatively, heat can be transferred by heat conduction or heat radiation from a medium such as a heated gas, as follows: For example, a GRTA (Gas Rapid Therma) l Annealing) or LRTA (Lamp Rapid Thermal Annealing) RTA (Rapid Thermal Annealing) GRTA uses high-temperature gas for heat treatment. Inert gas is used.

[0351] The gas supply source 2801 is connected to a refiner via a mass flow controller. The gas used has a dew point of -80°C or less, preferably -100°C or less. For example, oxygen gas, nitrogen gas, and rare gas (such as argon gas) are preferably used. Just use it.

[0352] The dielectric plate 2809 may be made of, for example, silicon oxide (quartz), aluminum oxide (aluminum), or the like. The dielectric plate 28 may be made of yttrium oxide (yttria) or yttrium oxide (yttria). Another protective layer may be formed on the surface of the substrate 9. The protective layer may be a layer of magnesium oxide. Sium, titanium oxide, chromium oxide, zirconium oxide, hafnium oxide, tantalum oxide, Silicon oxide, aluminum oxide, yttrium oxide, or the like may be used. 2809 is exposed to a particularly high density region of the high density plasma 2810 described later. Therefore, providing a protective layer can mitigate damage. This can suppress the increase in the number of

[0353] The high frequency generator 2803 can be used for frequencies in the range of 0.3 GHz to 3.0 GHz, for example, 0.7 GHz. Generates microwaves between 1.1GHz and 2.2GHz, or between 2.8GHz and 2.2GHz. The microwave generated by the high frequency generator 2803 is guided through the waveguide 2804. The mode converter 2805 converts the TE mode The transmitted microwaves are converted into TEM mode. Then, the microwaves pass through the waveguide 280 7 to the slot antenna plate 2808. The slot antenna plate 2808 has a plurality of The microwave passes through the slot holes and the dielectric plate 2809. Then, an electric field is generated below the dielectric plate 2809, and a high density plasma 2810 is generated. The high density plasma 2810 can be generated by the gas supply source 2801. There are ions and radicals depending on the gas species. For example, oxygen radicals exist. do.

[0354] At this time, the substrate 2811 is exposed to ions and radicals generated in the high-density plasma 2810. By this, it is possible to modify the film on the substrate 2811. It may be preferable to apply a bias to the substrate 2811 side using the high frequency power supply 28 For example, an RF power source with a frequency of 13.56 MHz or 27.12 MHz is used for 16. By applying a bias to the substrate side, the ions in the high density plasma 2810 are converted into the It is possible to efficiently reach the depths of the openings in the film on the plate 2811, etc.

[0355] For example, in chamber 2706b or chamber 2706c, gas source 2801 By introducing oxygen from the plasma, oxygen radical treatment using high density plasma 2810 can be performed. can.

[0356] Next, the chamber 2706a and the chamber 2706d are shown in the cross-sectional diagram of FIG. This will be explained using a diagram.

[0357] The chambers 2706a and 2706d are used for, for example, irradiating the object to be treated with electromagnetic waves. It is possible to perform a shot in this chamber. The only difference between this and 706d is the type of electromagnetic wave. Because there are many parts, we will explain them together below.

[0358] Chamber 2706a and chamber 2706d may contain one or more lamps 2820 , a substrate holder 2825, a gas inlet 2823, and an exhaust port 2830. , outside chamber 2706a and chamber 2706d, a gas supply source 2821 , a valve 2822, a vacuum pump 2828, and a valve 2829 are provided.

[0359] The gas supply source 2821 is connected to a gas inlet 2823 via a valve 2822 . The vacuum pump 2828 is connected to an exhaust port 2830 via a valve 2829. 2820 is disposed opposite to a substrate holder 2825. The substrate holder 2825 is The substrate holder 2825 has a function of holding the substrate 2824. The substrate holder 2825 also has a heating mechanism inside. 2826 and has the function of heating the substrate 2824.

[0360] The lamp 2820 has a function of emitting electromagnetic waves such as visible light or ultraviolet light. For example, a light source having a wavelength of 10 nm or more and 2500 nm or less, or 500 nm or less Emits electromagnetic waves with a peak between 2000 nm and 40 nm or between 340 nm and 400 nm. A light source having this function may be used.

[0361] For example, the lamp 2820 may be a halogen lamp, a metal halide lamp, or a xenon lamp. Arc lamps, carbon arc lamps, high-pressure sodium lamps, or high-pressure mercury lamps A light source of this type may be used.

[0362] For example, the electromagnetic waves emitted from the lamp 2820 may be partially or completely transmitted to the substrate 2824. By being absorbed by the substrate 2824, the film on the substrate 2824 can be modified. For example, It is possible to form or reduce impurities, or remove impurities. When this is done, defects can be efficiently generated or reduced, or impurities can be removed.

[0363] Alternatively, for example, the substrate holder 2825 may be heated by electromagnetic waves emitted from the lamp 2820. The substrate 2824 may be heated by generating heat inside the substrate holder 2825. The heat mechanism 2826 may not be included.

[0364] For the vacuum pump 2828, please refer to the description of the vacuum pump 2817. The mechanism 2826 is described with reference to the description of the heating mechanism 2813. Please refer to the description of the gas supply source 2801.

[0365] By using the above manufacturing equipment, it is possible to suppress the inclusion of impurities in the processed object while improving the film quality. This makes it possible to:

[0366] <Modification of Semiconductor Device> In the following, one embodiment of the present invention will be described with reference to FIGS. 20A to 20D and 21A to 21D. An example of a semiconductor device according to the present invention will be described.

[0367] Each figure A shows a top view of the semiconductor device. Each figure B shows a point A1-A2 shown in each figure A. Each figure C is a cross-sectional view corresponding to the portion indicated by the chain line. Each figure D is a cross-sectional view corresponding to the part indicated by the line. In the top view of each figure A, some elements are omitted for clarity. It omits the essentials.

[0368] In the semiconductor devices shown in each of Figures A to D, the semiconductor devices shown in <Configuration Examples of Semiconductor Devices> The same symbols are used for structures that have the same functions as those constituting the body device. However, the materials constituting the semiconductor device are the materials explained in detail in <Example of the configuration of the semiconductor device>. can be used.

[0369] <Semiconductor Device Modification 1> The semiconductor device shown in FIGS. 20A to 20D is a variation of the semiconductor device shown in FIGS. 1A to 1D. The semiconductor device shown in FIGS. 20A to 20D is an example of the semiconductor device shown in FIGS. 1A to 1D. The shape of the insulator 283 is different from that of the insulator device. The things they do are different.

[0370] In the semiconductor device shown in FIGS. 20A to 20D, the insulators 214, 216, and 217 are 22, insulator 224, insulator 275, insulator 280, and insulator 282 are patterned. In addition, the insulator 284 is made up of the insulators 212, 214, 216, and Structures covering body 222, insulator 224, insulator 275, insulator 280, and insulator 282 That is, the insulator 284 is formed between the upper surface of the insulator 282, the insulator 214, and the insulator 216, the sides of the insulator 222, the insulator 224, the insulator 275, and the insulator 280, The insulating member 284 is in contact with the upper surface of the edge member 212. Further, the insulating member 284 is disposed to cover the insulating member 284. As a result, the insulators 214, 216, and 217, including the oxide 230, are 22, insulator 224, insulator 280, and insulator 282 are insulators 283, 28 4 and insulator 212. In other words, transistor 20 0 is disposed within the area sealed by the insulator 284 and the insulator 212.

[0371] For example, insulator 214, insulator 271, insulator 275, insulator 282, and insulator 2 The material 84 may be formed using a material that has the function of capturing and fixing hydrogen. The insulator 284 can be made of the same insulator as the insulator 282. 212, and the insulator 283 is a material having the function of suppressing the diffusion of hydrogen and oxygen. The insulating film 214, the insulating film 271, the insulating film 275, the insulating film 282, The insulator 284 is a metal oxide having an amorphous structure, such as aluminum oxide. Typically, the insulator 212 and the insulator 283 are In particular, amorphous silicon nitride can be used as the insulator 284. Aluminum oxide having a structure or aluminum oxide having an amorphous structure can be used. This is preferable because it may be possible to capture or fix hydrogen more effectively. To manufacture a transistor 200 and a semiconductor device having good characteristics and high reliability. can be done.

[0372] By adopting the above-mentioned configuration, hydrogen contained outside the sealed region is absorbed into the sealed region. This can prevent the material from being mixed into the interior of the container.

[0373] Also, in the transistor 200 shown in FIGS. 20A to 20D, the insulator 212 and the insulating Although the configuration in which the edge 283 is provided as a single layer is shown, the present invention is not limited to this. For example, each of the insulator 212 and the insulator 283 may be formed in a laminated structure of two or more layers. It may also be configured to be provided as a structural element.

[0374] The insulator 274 is provided to cover the insulator 283 and functions as an interlayer film. The dielectric constant of the insulator 274 is preferably lower than that of the insulator 214. By forming the insulator 274 as a film, it is possible to reduce the parasitic capacitance that occurs between the wirings. For example, it can be provided using a material similar to that of the insulator 280 .

[0375] <Modification 2 of Semiconductor Device> The semiconductor device shown in FIGS. 21A to 21D is the same as the semiconductor device shown in FIGS. 20A to 20D. The semiconductor device shown in FIGS. 21A to 21D is a modified example of the semiconductor device shown in FIGS. The semiconductor device differs from the semiconductor device described above in that it has oxide 230c and oxide 230d. , and insulator 287. 3, and does not have the insulator 284.

[0376] 21A to 21D, the semiconductor device further includes an oxide 23 on the oxide 230b. 230c and oxide 230d on oxide 230c. 230d is provided in an opening formed in the insulator 280 and the insulator 275. The oxide 230c is formed on the side of the oxide 243a, the side of the oxide 243b, and the conductor 242a. The oxide layer 242a contacts the side of the conductor 242b, the side of the insulator 275, and the side of the conductor 242b. The top surface of the object 230c and the top surface of the oxide 230d contact the insulator 282.

[0377] By disposing the oxide 230d on the oxide 230c, the oxide 230d is disposed above the oxide 230d. Diffusion of impurities into oxide 230b or oxide 230c from the structure formed on the In addition, by disposing the oxide 230d on the oxide 230c, This can suppress the upward diffusion of oxygen from the oxide 230b or the oxide 230c. .

[0378] In addition, when viewed in a cross section in the channel length direction of the transistor, a groove is provided in the oxide 230b. It is preferable to fill the groove with oxide 230c. , and is arranged to cover the inner wall (side wall and bottom surface) of the groove. It is preferable that the thickness of the film is approximately the same as the depth of the groove. When forming an opening for embedding the conductor 260, the oxide 2 at the bottom of the opening is Even if a damaged area is formed on the surface of 30b, the damaged area can be removed. This makes it possible to suppress the deterioration of the electrical characteristics of the transistor 200 caused by the damaged region. .

[0379] Here, the atomic ratio of In to element M in the metal oxide used for the oxide 230c is is the ratio of the element M in the metal oxide used for the oxide 230a or the oxide 230d. It is preferable that the atomic ratio is larger than that of In.

[0380] In addition, when the oxide 230c is used as the main path of the carriers, The atomic ratio of indium to the metal element, which is the main component, in the oxide 230b is: It is preferable that the atomic ratio of indium is larger than that of the metal element that is the main component. In the oxide 230c, the atomic ratio of In to the element M is The atomic ratio of In to M is preferably larger than that of M. By using metal oxide in the channel formation region, the on-state current of the transistor can be increased. Therefore, in the oxide 230c, the ratio of indium to the metal element that is the main component is The atomic ratio is the ratio of the number of indium atoms to the metal element that is the main component in the oxide 230b. By increasing the ratio of the oxide 230c to the oxide 230c, the oxide 230c can be used as the main carrier path. The conduction band minimum of the oxide 230c is lower than that of the oxide 230a and the oxide 230b. It is preferable that the oxide 230c is farther from the vacuum level than the lower edge of the band. The electron affinity of oxide 230a is preferably greater than the electron affinity of oxide 230b. At this time, the main path of the carriers is the oxide 230c.

[0381] Specifically, the oxide 230c is In:M:Zn=4:2:3 [atomic ratio] or is a composition in the vicinity thereof, In:M:Zn=5:1:3 [atomic ratio] or a composition in the vicinity thereof, Or metal oxide with a composition of In:M:Zn=10:1:3 [atomic ratio] or close thereto , indium oxide, or the like may be used.

[0382] It is also preferable to use CAAC-OS as the oxide 230c. The c-axis of the crystal of the oxide 230c is oriented in a direction substantially perpendicular to the surface on which the oxide 230c is formed or the upper surface of the oxide 230c. It is preferable that the CAAC-OS has a property that oxygen easily migrates in the direction perpendicular to the c-axis. Therefore, the oxygen contained in the oxide 230c is efficiently supplied to the oxide 230b. It is possible.

[0383] The oxide 230d is a metal oxide containing a metal element that constitutes the metal oxide used in the oxide 230c. It is preferable that the metal element contains at least one of the above, and it is more preferable that the metal element contains all of the above. For example, the oxide 230c may be an In-M-Zn oxide, an In-Zn oxide, or an In-Zn oxide. In-M-Zn oxide, M-Zn oxide, Alternatively, an oxide of element M may be used. This allows the oxide 230c and the oxide 230d to be The defect level density at the interface can be reduced.

[0384] In addition, the conduction band minimum of the oxide 230d is closer to the vacuum level than the conduction band minimum of the oxide 230c. In other words, the electron affinity of the oxide 230d is preferably In this case, the oxide 230d is preferably smaller than the oxide 230a or It is preferable to use a metal oxide that can be used for the oxide 230b. The main path for the carriers is through oxide 230c.

[0385] Specifically, the oxide 230c is In:M:Zn=4:2:3 [atomic ratio] or is a composition in the vicinity thereof, In:M:Zn=5:1:3 [atomic ratio] or a composition in the vicinity thereof, Or metal oxide with a composition of In:M:Zn=10:1:3 [atomic ratio] or close thereto Alternatively, indium oxide may be used as the oxide 230d. Zn=1:3:4 [atomic ratio] or a composition close to that, M:Zn=2:1 [atomic ratio] Or a composition in the vicinity thereof, or a composition in the vicinity thereof, where M:Zn=2:5 [atomic ratio] The metal oxide of element M or the oxide of element M may be used. The range of the atomic ratio is ±30%. In addition, it is preferable to use gallium as the element M. stomach.

[0386] The oxide 230d is a metal that suppresses the diffusion or permeation of oxygen more than the oxide 230c. The oxide 230d is preferably disposed between the insulator 250 and the oxide 230c. By providing the oxide 230c, oxygen can be efficiently supplied to the oxide 230b via the oxide 230c. can be done.

[0387] In addition, in the metal oxide used for oxide 230d, I for the metal element that is the main component The atomic ratio of n is the main component of the metal element in the metal oxide used for oxide 230c. By making the atomic ratio of In smaller than the atomic ratio of In to In, the diffusion of In into the insulator 250 is suppressed. For example, in the oxide 230d, the atomic ratio of In to the element M can be The ratio of the number of atoms of In to the number of atoms of element M in the oxide 230c may be smaller than that. Since the body 250 functions as a gate insulator, when In is mixed into the insulator 250, Therefore, the oxide 230c and the insulator 250 are not formed between the oxide 230c and the insulator 250, resulting in poor transistor characteristics. By providing the oxide 230d, it is possible to provide a highly reliable semiconductor device.

[0388] The oxide 230c may be provided for each transistor 200. The oxide 230c of the transistor 200 and the oxide 230b of the transistor 200 adjacent to the transistor 200 The oxide 230c of the transistor 200 may not be in contact with the oxide 230c. and the oxide 230c of the transistor 200 adjacent to the transistor 200. In other words, the oxide 230c may separate the transistor 200 from the It is also possible to adopt a configuration in which the transistor 200 is not disposed between the adjacent transistors 200.

[0389] In a semiconductor device in which a plurality of transistors 200 are arranged side by side in the channel width direction, By adopting the above configuration, the oxides 230c are independently provided in the transistors 200. Therefore, the transistor 200 and the transistors adjacent to the transistor 200 The generation of a parasitic transistor between the transistor 200 and the gate 200 is suppressed, and the above-mentioned leakage path is prevented from occurring. Therefore, it is possible to suppress the occurrence of the problem of the problem. It is possible to provide a semiconductor device that can be integrated.

[0390] The insulator 287 may be made of the same material as the insulator 282 or the insulator 284. After forming the insulator 284 shown in FIG. 20, the insulating film 284 can be removed by dry etching. By anisotropically etching the insulating layer 214, the insulating layer 216, and the insulating layer 218 shown in FIG. 22, insulator 224, insulator 275, insulator 280, and insulator 282. An insulator 287 may be formed.

[0391] As shown in FIG. 21, the insulator 271 and the insulator 273 are not provided. In this case, there may be a curved surface between the side surface of the conductor 242 and the top surface of the conductor 242. That is, the edges of the side surfaces and the edges of the top surface may be curved. At the end of the body 242, the radius of curvature is 3 nm or more and 10 nm or less, preferably 5 nm or less. The thickness is 6 nm or less. By not having sharp edges, the film coverage in the subsequent film formation process is improved. The present invention is not limited to this, and in the configuration shown in FIG. Furthermore, a configuration may be adopted in which an insulator 271, an insulator 272, and an insulator 273 are provided.

[0392] <Semiconductor Device Modification 3> The semiconductor device shown in FIGS. 22A to 22D is the same as the semiconductor device shown in FIGS. 20A to 20D. The semiconductor device shown in FIGS. 22A to 22D is a modified example of the semiconductor device shown in FIGS. 20A to 20D. The semiconductor device differs from the semiconductor device described above in that the shape of the insulator 214 is different. Also, the structure of the insulator 275 is different.

[0393] In the semiconductor device shown in FIGS. 22A to 22D, the insulator 214 and the insulator 271 , insulator 275a, insulator 282, and insulator 284 each have an amorphous structure. For example, the insulator 214, the insulator 271, the insulator The body 275a, the insulator 282, and the insulator 284 each have an amorphous structure. Aluminum oxide or amorphous aluminum oxide is preferred. The insulator 214, the insulator 271, the insulator 275a, the insulator 282, and the insulator 284 are By including metal oxides each having an amorphous structure, the transistor 200 The hydrogen that is present in the transistor 200 or the surrounding area of ​​the transistor 200 can be captured or fixed. In particular, hydrogen contained in the channel forming region of the transistor 200 can be captured or fixed. It is preferable that

[0394] In the semiconductor device shown in FIGS. 22A to 22C, The insulator 250 has a laminated structure of an insulator 250a and an insulator 250b. For example, Silicon oxide is used as the insulator 250a, and hafnium oxide is used as the insulator 250b. It is possible.

[0395] As shown in FIGS. 22B to 22D, the insulator 214 is formed in a region other than the region overlapping with the insulator 222. In addition, in the region where the insulator 214 does not overlap with the insulator 222, the insulator The upper surface of the insulator 214 is in contact with the lower surface of the insulator 284. 212 is provided, and an insulator 283 is provided above the insulator 284. The transistor 200 is encapsulated by an insulator 214 and an insulator 284, which further insulates the transistor 200. The transistor 200 is encapsulated by the body 212 and the insulator 283. The hydrogen trapping or fixing insulator 214 and the insulator 284 seal the hydrogen trap. The insulating material 212 and the insulating material 283 are sealed to prevent diffusion of hydrogen and oxygen. By adopting such a structure, the transistor 200 has good characteristics and high reliability. and a semiconductor device can be manufactured.

[0396] In the semiconductor device shown in this modification, the insulator 275 includes an insulator 275a and an insulator For example, the insulator 275a has an amorphous structure. Aluminum oxide can be used as the insulating layer 275b, and silicon nitride can be used as the insulating layer 275c. The semiconductor device shown in the modification does not have the insulator 272, so the insulator 275a is made of oxide 2. 30a, oxide 230b, oxide 243, conductor 242, and insulator 271 are in contact with their sides. Therefore, the insulator 275a prevents the oxide 230a, the oxide 230b, the oxide 243, etc. The hydrogen contained therein can be captured or fixed. It is preferable to capture or fix the hydrogen contained in the formed region.

[0397] <Modification 4 of the semiconductor device> The semiconductor device shown in FIGS. 23A to 23D is the same as the semiconductor device shown in FIGS. 22A to 22D. The semiconductor device shown in FIGS. 23A to 23D is a modified example of the semiconductor device shown in FIGS. 22A to 22D. The semiconductor device differs from the semiconductor device described above in that the shape of the insulator 271 is different. is different.

[0398] As shown in FIG. 23B, since the insulator 273 is not provided, the insulator 275a is It is provided so as to be in contact with the upper surface of the edge body 271.

[0399] The insulator 271 is used as a hard mask in the manufacturing process of the transistor 200. In this modification, an insulator 273 that can function as a hard mask like the insulator 271 is used. Since the insulator 271 is not provided, the thickness of the insulator 271 is adjusted accordingly. It is preferable to prevent the insulator 271 from disappearing during the manufacturing process. The insulator 271 may be the same as that of the semiconductor device described above or the insulator described in the first to third modifications. It is preferable to form it thicker than the edge body 271 .

[0400] <Application examples of semiconductor devices> Hereinafter, the above-mentioned <Configuration Example of Semiconductor Device> and the above-mentioned <Configuration Example of Semiconductor Device> will be described with reference to FIGS. 24A and 24B. Transistor 2 according to one embodiment of the present invention, which is different from that shown in <Modification of Semiconductor Device> An example of a semiconductor device having the .00 will be described. In the semiconductor device, the semiconductor device shown in <<Modification of the semiconductor device>> (FIGS. 20A to 20C) 20D.) and structures having the same functions are given the same symbols. In the item, the constituent materials of the transistor 200 are described in <Configuration example of semiconductor device> and The materials described in detail in <Modifications of the semiconductor device> can be used.

[0401] 24A and 24B show a plurality of transistors 200_1 to 200_2. n is enclosed and sealed with an insulator 283 and an insulator 212. 4A and 24B, transistors 200_1 to 200_n are Although they appear to be aligned in the channel length direction, this is not the only way. The transistors 200_1 to 200_n may be arranged in the channel width direction. They may be arranged in a matrix, or may be arranged without regularity depending on the design. It may be possible.

[0402] As shown in FIG. 24A, a plurality of transistors 200_1 to 200_n On the outside, the portion where the insulator 283 and the insulator 212 contact (hereinafter referred to as the sealing portion 265) The sealing portion 265 is formed around the plurality of transistors 200_1 to 200_2. The transistor 200_n is surrounded by the transistor 200_n. The transistors 200_1 to 200_n are surrounded by an insulator 283 and an insulator 212. Therefore, the transistor group surrounded by the sealing portion 265 can be formed on the substrate. It will be set up.

[0403] In addition, dicing lines (scribe lines, dividing lines, or The substrate may be divided at the dicing lines. Therefore, the group of transistors enclosed by the sealing portion 265 can be extracted as a single chip. This becomes the case.

[0404] In addition, in FIG. 24A, a plurality of transistors 200_1 to 200_n are Although an example in which the sealing portion 265 is enclosed is shown, the present invention is not limited to this. As shown, a plurality of transistors 200_1 to 200_n are sealed by a plurality of sealing portions. In FIG. 24B, a plurality of transistors 200_1 to 200_2 may be surrounded by a The capacitor 200_n is surrounded by a sealing portion 265a and further surrounded by an outer sealing portion 265b. There are.

[0405] In this way, the plurality of transistors 200_1 to 200_2 are sealed by the plurality of sealing portions. By configuring the insulator 283 to surround the insulator 212, the area where the insulator 283 and the insulator 212 are in contact increases, This can further improve the adhesion between the insulator 283 and the insulator 212. Indeed, a plurality of transistors 200_1 to 200_n can be sealed. .

[0406] In this case, even if a dicing line is provided overlapping the sealing portion 265a or the sealing portion 265b, Alternatively, a dicing line may be provided between the sealing portion 265a and the sealing portion 265b.

[0407] 24A and 24B, the transistor 200 shown in FIG. Unlike the above, the upper surface of the insulator 274 is configured to be substantially flush with the upper surface of the insulator 283. In addition, the insulator 284 is not provided. However, the present invention is not limited to this. For example, the insulator 274 may cover the insulator 283, or the insulator 284 may be provided. It may be configured as follows.

[0408] According to one embodiment of the present invention, a semiconductor device with little variation in transistor characteristics can be provided. According to one embodiment of the present invention, a highly reliable semiconductor device can be provided. According to one embodiment of the present invention, a semiconductor device having favorable electrical characteristics can be provided. According to one embodiment of the present invention, a semiconductor device with a large on-state current can be provided. Alternatively, according to one embodiment of the present invention, a semiconductor that can be miniaturized or highly integrated can be manufactured. According to one embodiment of the present invention, a semiconductor device with low power consumption can be provided. can be provided.

[0409] The configurations, methods, and the like described in this embodiment may be used in combination with other configurations, methods, and the like described in this embodiment. The present invention may be appropriately combined with the configurations and methods shown in the embodiments or the configurations and methods shown in the examples. It can be used.

[0410] (Embodiment 2) In this embodiment mode, one mode of a semiconductor device will be described with reference to FIGS.

[0411] [Storage device 1] An example of a semiconductor device (memory device) according to one embodiment of the present invention is illustrated in FIG. In this semiconductor device, the transistor 200 is provided above the transistor 300, and the capacitance element The transistor 100 is provided above the transistor 300 and the transistor 200. The transistor 200 may be the transistor 200 described in the previous embodiment. This can be done.

[0412] The transistor 200 is a transistor in which a channel is formed in a semiconductor layer including an oxide semiconductor. The transistor 200 is used in a memory device because its off-state current is small. This allows the memory contents to be retained for a long period of time. Since no refresh operation is required or the frequency of refresh operations is extremely low, Power consumption can be reduced sufficiently.

[0413] In the semiconductor device shown in FIG. 25, the wiring 1001 is electrically connected to the source of the transistor 300. The wiring 1002 is electrically connected to the drain of the transistor 300. The wiring 1003 is electrically connected to one of the source and drain of the transistor 200. The wiring 1004 is electrically connected to the first gate of the transistor 200. 006 is electrically connected to the second gate of the transistor 200. The gate of transistor 300 and the other of the source and drain of transistor 200 are connected to a capacitor. The wiring 1005 is electrically connected to one of the electrodes of the capacitor 100. It is electrically connected to the other.

[0414] In addition, the memory device shown in FIG. 25 has a memory cell array arranged in a matrix. It can be configured.

[0415] <Transistor 300> The transistor 300 is provided on a substrate 311 and includes a conductor 316 that functions as a gate. , an insulator 315 serving as a gate insulator, and a semiconductor region 311 consisting of a portion of a substrate 311. 3, and a low resistance region 314a which functions as a source region or a drain region, and a low The transistor 300 may be a p-channel or n-channel It can be of any type.

[0416] Here, the transistor 300 shown in FIG. 25 has a semiconductor region 313 ( The side and top surfaces of the semiconductor region 313 are insulated. The conductor 316 is provided so as to cover the edge 315. Materials for adjusting the work function may also be used. It is also called a FIN type transistor because it uses a convex part. In addition, the insulating layer may have an insulating material that functions as a mask for forming the convex portions. Here, we have shown a case where a protrusion is formed by processing a part of a semiconductor substrate, but it is also possible to process an SOI substrate. A semiconductor film having a convex shape may be formed by the above process.

[0417] The transistor 300 shown in FIG. 25 is an example, and the structure is not limited to this. Appropriate transistors may be used depending on the structure and driving method.

[0418] <Capacitor element 100> The capacitor 100 is provided above the transistor 200. a conductor 110 serving as the first electrode and a conductor 120 serving as the second electrode; The insulator 130 functions as a dielectric. It is preferable to use an insulator that can be used as the insulator 286 shown in the embodiment.

[0419] Also, for example, the conductor 112 provided on the conductor 240 and the conductor 110 are formed at the same time. Note that the conductor 112 can be used in the capacitor 100, the transistor 200, and The wiring 301 functions as a plug or wiring that is electrically connected to the transistor 300. In addition, the conductor 112 and the conductor 110 correspond to the conductor 246 shown in the previous embodiment. .

[0420] In FIG. 25, the conductor 112 and the conductor 110 are shown as having a single-layer structure. For example, a conductive material having a barrier property and a conductive material having a high conductivity may be used. Conductors with barrier properties between weak conductors and highly conductive conductors with good adhesion may form a highly conductive material.

[0421] The insulator 130 may be, for example, silicon oxide, silicon oxynitride, or silicon nitride oxide. , silicon nitride, aluminum oxide, aluminum oxide nitride, aluminum nitride oxide, nitride Aluminum oxide, hafnium oxide, hafnium oxynitride, hafnium nitride oxide, hafnium nitride The material may be aluminum or the like, and may be provided as a laminated layer or a single layer.

[0422] For example, the insulator 130 may be made of a material with high dielectric strength such as silicon oxynitride and a material with high dielectric strength such as silicon oxynitride. It is preferable to use a laminated structure with a high-k material. The element 100 has a high dielectric constant (high-k) insulator, which ensures sufficient capacitance. By using an insulator with a high dielectric strength, the dielectric strength is improved, and the electrostatic breakdown of the capacitance element 100 is prevented. This can suppress the destruction.

[0423] In addition, oxide is used as an insulator for high dielectric constant (high-k) materials (materials with high relative dielectric constant). Contains gallium, hafnium oxide, zirconium oxide, aluminum and hafnium Oxide, Oxynitride with Aluminum and Hafnium, Silicon and Hafnium oxides having silicon and hafnium, oxide nitrides having silicon and hafnium, or oxide nitrides having silicon and hafnium Nitrides containing fluorine are also included.

[0424] On the other hand, materials with high dielectric strength (materials with low dielectric constant) include silicon oxide and oxynitride. silicon dioxide, silicon nitride oxide, silicon nitride, silicon oxide with fluorine added, carbon Doped silicon oxide, carbon and nitrogen doped silicon oxide, silicon oxide with vacancies Examples include concrete or resin.

[0425] <Wiring layer> Between each structure, a wiring layer including an interlayer film, wiring, plugs, etc. is provided. In addition, multiple wiring layers can be provided depending on the design. Conductors that function as wiring or wiring may be grouped together and given the same symbol. In addition, in this specification and the like, the wiring and the plug electrically connected to the wiring may be integrated. That is, when a part of the conductor functions as a wiring, or when the conductor Some may also function as plugs.

[0426] For example, an insulator 320, an insulator 322, an insulator 323, and an insulator 324 are provided over the transistor 300 as interlayer films. The insulating member 320, the insulating member 324, and the insulating member 326 are stacked in this order. The insulators 322, 324, and 326 are connected to the capacitive element 100 or the transistor. The conductive material 328 and the conductive material 330 are embedded in the conductive material 328 and the conductive material 330. The conductors 328 and 330 function as plugs or wiring.

[0427] In addition, the insulator that functions as an interlayer film acts as a planarizing film that covers the uneven shape underneath. For example, the top surface of the insulator 322 may be subjected to chemical mechanical polishing (CMP) to improve flatness. The surface may be planarized by a planarization process using a CMP method or the like.

[0428] A wiring layer may be provided on the insulator 326 and the conductor 330. For example, in FIG. In this case, an insulator 350, an insulator 352, and an insulator 354 are stacked in this order. In addition, a conductor 356 is formed on the insulators 350, 352, and 354. The conductor 356 functions as a plug or wiring.

[0429] Similarly, the insulators 210, 212, 214, and 216 are electrically conductive. The conductive material 218 and the conductive material (conductive material 205) that constitutes the transistor 200 are embedded. Note that the conductor 218 is electrically connected to the capacitor 100 or the transistor 300. The conductor 120 and the insulator 130 function as a plug or wiring. An insulator 150 is provided on 130 .

[0430] Here, similar to the insulator 241 shown in the above embodiment, the conductor 2 An insulator 217 is provided in contact with the side surface of the insulator 18. The insulator 217 is 212, insulator 214, and insulator 216 are provided in contact with the inner walls of the openings formed therein. That is, the insulator 217 is made up of the conductor 218, the insulator 210, the insulator 212, and the insulator 214 and the insulator 216. 18, the insulator 217 is in contact with the side of the conductor 205. Sometimes it may be formed.

[0431] The insulator 217 may be, for example, silicon nitride, aluminum oxide, or silicon nitride oxide. The insulator 217 may be an insulator such as silicon. Since the insulating member 210 and the insulating member 222 are provided in contact with each other, the insulating member 210 and the insulating member 222 are not Impurities such as water or hydrogen from the conductor 218 are mixed into the oxide 230. In particular, silicon nitride is preferred because it has a high barrier property against hydrogen. In addition, oxygen contained in the insulator 210 or the insulator 216 is absorbed into the conductor 218. This can prevent it from being

[0432] Insulator 217 can be formed in a similar manner to insulator 241. For example, PEA Silicon nitride is deposited using the LD method, and anisotropic etching is performed to reach the conductor 356. An opening can be formed to allow the hole to be opened.

[0433] Insulators that can be used as the interlayer film include oxides, nitrides, and oxides that have insulating properties. Examples of such materials include metal nitrides, nitride oxides, metal oxides, metal oxynitrides, and metal nitride oxides.

[0434] For example, by using a material with a low relative dielectric constant for the insulator that functions as an interlayer film, Therefore, depending on the function of the insulator, the material It is recommended to select:

[0435] For example, the insulators 150, 210, 352, and 354 have relatively It is preferable to have an insulator with a low dielectric constant, for example silicon oxynitride. , silicon nitride, fluorine-doped silicon oxide, carbon-doped silicon oxide, carbon and and silicon oxide with nitrogen added, silicon oxide or resin with pores. Alternatively, the insulator is preferably silicon oxide, silicon oxynitride, or silicon nitride oxide. silicon nitride, silicon oxide with fluorine, silicon oxide with carbon, Lamination of silicon oxide with added silicon and nitrogen or silicon oxide with pores and resin Silicon oxide and silicon oxynitride are thermally stable. Therefore, by combining it with resin, it is possible to create a laminated structure that is thermally stable and has a low dielectric constant. Examples of resins include polyester, polyolefin, polyamide (nylon), Examples include polyethylene, aramid, polyimide, polycarbonate, or acrylic.

[0436] In addition, a transistor using an oxide semiconductor can suppress the permeation of impurities such as hydrogen and oxygen. By surrounding the transistor with an insulator that has the function of suppressing the Therefore, the insulators 214, 212, and 350 can be filled with hydrogen and the like. An insulator having a function of suppressing the permeation of impurities and oxygen may be used.

[0437] Examples of insulators that have the function of suppressing the permeation of impurities such as hydrogen and oxygen include: Boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, salt Argon, Gallium, Germanium, Yttrium, Zirconium, Lanthanum, Neo Insulators containing zinc, hafnium or tantalum may be used in single or multilayer configurations. Specifically, as an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen, Aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttria oxide ammonium, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide or tungsten oxide Metal oxides such as talc, silicon nitride oxide, silicon nitride, etc. can be used. .

[0438] Conductors that can be used for wiring and plugs include aluminum, chromium, copper, silver, Gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium Sodium, niobium, manganese, magnesium, zirconium, beryllium, indium, Materials containing one or more metal elements selected from the group consisting of ruthenium and lithium can be used. Semiconductors with high electrical conductivity, such as polycrystalline silicon containing impurity elements such as silicon, Silicides such as nickel silicide may also be used.

[0439] For example, conductor 328, conductor 330, conductor 356, conductor 218, and conductor 1 12, etc., include metal materials, alloy materials, metal nitride materials, or Conductive materials such as metal oxide materials can be used in a single layer or in a laminated form. It is preferable to use a high-melting-point material such as tungsten or molybdenum, which is also electrically conductive. It is preferable to use tungsten. Alternatively, low-resistance conductive materials such as aluminum and copper may be used. It is preferable to form the wiring from a low-resistance conductive material. can be done.

[0440] <Wiring or plug in layer provided with oxide semiconductor> When an oxide semiconductor is used for the transistor 200, excess An insulator having an oxygen region may be provided. In this case, the insulator having the excess oxygen region and an insulator having a barrier property is provided between the insulator having the excess oxygen region and a conductor provided on the insulator. It is preferable to provide such a function.

[0441] For example, in FIG. 25, insulator 224 and insulator 280 have excess oxygen, and conductor 2 40. The insulator 241, the insulator 222, and the insulator 241 are preferably provided between the insulator 241 and the insulator 222. 75, the insulator 282, and the insulator 283 are provided in contact with each other, The transistor 200 is sealed with an insulator having a barrier property. can be done.

[0442] In other words, by providing the insulator 241, the excess of the insulators 224 and 280 It is possible to suppress the absorption of oxygen into the conductor 240. By having this, hydrogen, which is an impurity, diffuses into the transistor 200 through the conductor 240. This can prevent the following from happening:

[0443] The insulator 241 is made of a material that suppresses the diffusion of impurities such as water or hydrogen, and oxygen. For example, silicon nitride, silicon nitride oxide, It is preferable to use aluminum oxide or hafnium oxide. In particular, silicon nitride Magnesium oxide is preferred because it has a high barrier property against hydrogen. aluminum, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide Metal oxides such as tantalum oxide, neodymium oxide, or tantalum oxide can be used.

[0444] As described in the above embodiment, the transistor 200 includes the insulator 212 and the insulator 214, the insulator 282, and the insulator 283 may be sealed. By this configuration, hydrogen contained in the insulators 274, 150, etc. is absorbed into the insulators 280, etc. This can reduce contamination.

[0445] Here, the insulator 283 and the insulator 282 are connected to the conductor 240, the insulator 214 and the The conductor 218 penetrates the insulator 212, but as described above, the insulator 241 penetrates the conductor 218. 40, and the insulator 217 is provided in contact with the conductor 218. 212, insulator 214, insulator 216, and insulator 218 are connected via conductor 240 and conductor 218. 82 and the hydrogen mixed inside the insulator 283 can be reduced. Insulator 212, insulator 214, insulator 282, insulator 283, insulator 241, and The transistor 200 is sealed with the insulator 217, and impurities such as hydrogen contained in the insulator 274 are removed. It is possible to reduce contamination from outside.

[0446] <Dicing line> In the following, a large-area substrate is divided into individual semiconductor elements to form multiple semiconductor devices. Dicing lines (scribe lines, dividing lines) are provided when extracting chips. The dividing method is as follows: First, grooves (dicing lines) for dividing the semiconductor elements are formed on the substrate, and then the dicing In some cases, the substrate is cut by a grinder and divided (divided) into a plurality of semiconductor devices.

[0447] Here, for example, as shown in FIG. 25, the area where the insulator 283 and the insulator 212 contact each other It is preferable to design the chip so that the dicing line overlaps the chip. In the vicinity of the region that will become the dicing line provided on the outer edge of the memory cell having the capacitor 200, Insulator 282, insulator 280, insulator 275, insulator 224, insulator 222, insulator 216, and an opening is provided in the insulator 214.

[0448] That is, insulator 282, insulator 280, insulator 275, insulator 224, insulator 222, The openings in the insulators 216 and 214 allow the insulators 212 and 28 to pass through. For example, the insulator 212 and the insulator 283 are made of the same material and in the same manner. The insulator 212 and the insulator 283 may be formed using the same material and the same method. For example, silicon nitride is preferably used. I wish.

[0449] This structure allows the insulators 212, 214, 282, and 283 to , can encase the transistor 200. Insulator 212, insulator 214, insulator 2 At least one of the insulating material 282 and the insulating material 283 has a function of suppressing the diffusion of oxygen, hydrogen, and water. Therefore, the substrate can be formed for each circuit region in which the semiconductor element shown in this embodiment mode is formed. By dividing the substrate, even if it is processed into multiple chips, hydrogen or This can prevent impurities such as water from entering and diffusing into the transistor 200.

[0450] In addition, this structure prevents excess oxygen in the insulator 280 and the insulator 224 from diffusing to the outside. Therefore, the excess oxygen in the insulator 280 and the insulator 224 can be prevented from The oxide is efficiently supplied to form the channel of the transistor 200. The element reduces oxygen vacancies in the oxide in which the channel of the transistor 200 is formed. This allows the oxide layer on which the channel in the transistor 200 is formed to be removed. can be an oxide semiconductor having a low density of defect states and stable characteristics. Fluctuations in the electrical characteristics of the transistor 200 can be suppressed and reliability can be improved. do.

[0451] In the memory device shown in FIG. 25, the shape of the capacitor element 100 is a planar type. The storage device shown in the embodiment is not limited to this. For example, as shown in FIG. The shape of the capacitor element 100 may be a cylinder. The structure below the body 150 is similar to that of the semiconductor device shown in FIG.

[0452] The capacitance element 100 shown in FIG. 26 includes an insulator 150 on an insulator 130 and a The insulator 142 and the conductor disposed in the opening formed in the insulator 150 and the insulator 142. Conductor 115, insulator 145 on conductor 115 and insulator 142, and The wiring board 100 includes a conductor 125 and an insulator 152 on the conductor 125 and the insulator 145. The conductor 115 and the insulator 142 are inserted into the openings formed in the insulator 150 and the insulator 142. 5, and at least a portion of the conductor 125 is disposed on the insulator 152. 154 is disposed on the insulating material 154, and a conductor 153 and an insulator 156 are disposed on the insulating material 154. , the conductor 140 is made up of the insulator 130, the insulator 150, the insulator 142, the insulator 145, and the insulator 152 and in an opening formed in an insulator 154.

[0453] The conductor 115 functions as the lower electrode of the capacitor 100, and the conductor 125 functions as the 0, and the insulator 145 functions as a dielectric of the capacitive element 100. The capacitor 100 has openings in the insulators 150 and 142, not only on the bottom surface but also on the The upper and lower electrodes are also configured to face each other on the side with a dielectric material between them. Therefore, the deeper the opening, the greater the capacitance per area. In this way, the capacitance of the capacitor 100 can be increased. By increasing the capacitance per unit area, miniaturization or high integration of semiconductor devices can be achieved. can be promoted.

[0454] The insulator 152 may be made of an insulator that can be used for the insulator 280. The edge 142 acts as an etch stop when forming the opening in the insulator 150. It is preferable to use an insulator that can be used for the insulator 214.

[0455] The openings formed in the insulators 150 and 142 have a rectangular shape when viewed from above. Alternatively, the shape may be a polygon other than a square, or the corners of the polygon may be curved. Here, when viewed from above, the opening may have a circular shape including an ellipse. It is preferable that the overlapping area between the gate and the transistor 200 is large. As a result, the area occupied by the semiconductor device having the capacitor element 100 and the transistor 200 can be reduced. This can be done.

[0456] The conductor 115 is disposed in contact with the openings formed in the insulators 142 and 150. It is preferable that the upper surface of the conductor 115 is substantially flush with the upper surface of the insulator 142. The lower surface of the conductor 115 contacts the conductor 110 through the opening in the insulator 130. The conductive layer 5 is preferably formed by the ALD method or the CVD method. Any conductor that can be used for 05 may be used.

[0457] The insulator 145 is disposed to cover the conductor 115 and the insulator 142. For example, It is preferable to form the insulator 145 by using the ALD method, the CVD method, or the like. 45 is, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, Zirconium oxide, aluminum oxide, aluminum oxide nitride, aluminum oxide nitride, Aluminum nitride, hafnium oxide, hafnium oxynitride, hafnium nitride oxide, hafnium nitride For example, the insulator 1 may be made of aluminum or the like, and may be formed as a laminated layer or a single layer. 45, zirconium oxide, aluminum oxide, zirconium oxide are layered in this order. An insulating film having such a structure can be used.

[0458] The insulator 145 is made of a material with high dielectric strength, such as silicon oxynitride, or a material with high dielectric strength. It is preferable to use a material with a high dielectric constant (high-k). A stack of dielectric (high-k) materials may also be used.

[0459] In addition, oxide is used as an insulator for high dielectric constant (high-k) materials (materials with high relative dielectric constant). Contains gallium, hafnium oxide, zirconium oxide, aluminum and hafnium Oxide, Oxynitride with Aluminum and Hafnium, Silicon and Hafnium oxides having silicon and hafnium; oxide nitrides having silicon and hafnium; By using such high-k materials, the insulator 1 Even if the insulator 145 is made thick, the capacitance of the capacitor element 100 can be sufficiently ensured. By making the thickness of the conductive material 115 and the conductive material 125 thicker, the leakage current occurring between the conductive material 115 and the conductive material 125 is suppressed. It is possible.

[0460] On the other hand, materials with high dielectric strength include silicon oxide, silicon oxynitride, and silicon nitride oxide. Silicon, silicon nitride, fluorine-doped silicon oxide, carbon-doped silicon oxide, Examples include silicon oxide doped with carbon and nitrogen, silicon oxide with pores, and resin. For example, silicon nitride (SiN x ), which was produced using the PEALD method Silicon oxide (SiO x ), silicon nitride (SiN x ) Insulating films laminated in this order can be used. By using the above, the dielectric strength is improved and electrostatic breakdown of the capacitor element 100 can be suppressed. .

[0461] The conductor 125 is arranged to fill the openings formed in the insulators 142 and 150. The conductor 125 is connected to the wiring 10 via the conductor 140 and the conductor 153. The conductor 125 is formed by using the ALD method or the CVD method. For example, a conductor that can be used for the conductor 205 may be used. stomach.

[0462] The conductor 153 is provided on an insulator 154 and is covered with an insulator 156. The conductor 153 may be made of any conductor that can be used for the conductor 112. The insulator 156 may be an insulator that can be used for the insulator 152. 53 is in contact with the upper surface of the conductor 140, and It serves as a terminal of the transistor 300.

[0463] [Storage device 2] An example of a semiconductor device (memory device) according to one embodiment of the present invention is shown in FIGS. 27A and 27B. .

[0464] <Memory device configuration example 1> FIG. 27A is a cross-sectional view of a semiconductor device having a memory device 290. The memory device 290 includes a capacitor in addition to the transistor 200 shown in FIGS. 1A-1D. 27A is a cross-sectional view of the transistor 200 in the channel length direction. Equivalent.

[0465] The capacitance device 292 is made up of a conductor 242b and an insulator 27 disposed on the conductor 242b. 1b and insulator 273b, and insulator 272b provided in contact with the side surface of conductor 242b. an insulator 275 provided to cover the insulator 273b and the insulator 272b; 275 and a conductor 294 on the metal-insulated metal (MIM) capacitor device 292. The capacitor device 2 is a 2-layer (metal-insulator-metal) capacitor. One of the pair of electrodes of 92, that is, the conductor 242b, is the source electrode of the transistor. The dielectric layer of the capacitance device 292 can also function as a transistor. The protective layers provided, that is, the insulators 271, 272, and 275, also serve as the insulating layers. Therefore, in the manufacturing process of the capacitor device 292, the manufacturing process of the transistor can be performed. Since part of the manufacturing process can be shared, a semiconductor device with high productivity can be obtained. In addition, one of the pair of electrodes of the capacitance device 292, that is, the conductor 242b, is Since it also serves as the source electrode of the transistor, a transistor and a capacitance device are arranged. This makes it possible to reduce the area required.

[0466] The conductor 294 may be made of a material that can be used for the conductor 242. That's fine.

[0467] <Memory device configuration example 2> FIG. 27B shows a semiconductor device having a memory device 290 different from the structure shown in FIG. 27A. The memory device 290 shown in FIG. 27B is a cross-sectional view of the memory device 290 shown in FIGS. 22A to 22D. In addition to the transistor 200, the capacitor device 292 is shown in FIG. A portion of the capacitance device 292 differs from the capacitance device 292 shown in FIG. 27A in that the insulator 28 0, insulator 275, insulator 273b, and insulator 271b are provided in openings formed therein. 27B corresponds to a cross-sectional view of the transistor 200 in the channel length direction.

[0468] The capacitance device 292 is made up of a conductor 242b and an insulator 29 provided on the conductor 242b. 3 and a conductor 294 provided on the insulator 293. and conductor 294 are insulators 280, 275, 273b, and 27 The insulator 293 is disposed in an opening formed in the bottom and side of the opening. In other words, the insulator 293 is provided on the upper surface of the conductor 242b, the insulator 2 71b, a side of the insulator 273b, a side of the insulator 275a, a side of the insulator 275b, and contacts the side surface of the insulator 280. The insulator 293 is formed along the shape of the opening, The conductor 294 is provided to form a recess. The insulating member 293 and the conductor 29 The height of the upper surface of the insulating material 280, the insulating material 250, and the conductor 260 is approximately the same as the height of the upper surfaces of the insulating material 280, the insulating material 250, and the conductor 260. There may be an approximate match.

[0469] Here, conductor 242b serves as the bottom electrode of capacitive device 292, and conductor 294 The insulator 293 functions as the top electrode of the capacitor device 292. In this way, the capacitance device 292 constitutes an MIM capacitance. One of the pair of electrodes of the capacitance device 292, that is, the conductor 242b, is a transistor. Therefore, the capacitor device 292 can be fabricated in a simple manner. In this process, part of the manufacturing process of the transistor can be used, resulting in high productivity. In addition to the structure of the transistor 200, the insulator 293 Therefore, the insulator 292 can be adjusted to suit the performance required for the capacitance device 292. The structure and material of the capacitor device 292 can be selected appropriately. One of the pair of electrodes, i.e., the conductor 242b, also serves as the source electrode of the transistor. Therefore, it is possible to reduce the area in which the transistors and the capacitance devices are arranged. .

[0470] The insulator 293 is preferably made of a high dielectric constant (high-k) material. High-k materials (materials with high dielectric constants) are used as insulators, such as gallium oxide and hafnium oxide. Zirconium, Zirconium Oxide, Aluminum Oxide, Aluminum Oxide Nitride, Aluminum Oxide Nitride Aluminum, aluminum nitride, hafnium oxide, hafnium oxynitride, hafnium oxynitride , hafnium nitride, oxide with aluminum and hafnium, aluminum and Hafnium-containing oxynitride, silicon and hafnium-containing oxide, silicon and hafnium-containing oxide and hafnium-containing oxynitride or silicon and hafnium-containing nitride. In addition, the insulator 293 is made by stacking films of these high dielectric constant materials. For example, the insulator 293 may be made of zirconium oxide, aluminum oxide, or zirconium oxide. An insulating film in which a layer of a metal, a silicon, and an iron is stacked in this order can be used.

[0471] The conductor 294 may be made of a material that can be used for the conductor 260. The conductor 294 may have a layered structure similar to the conductor 260.

[0472] The insulator 293 and the conductor 294 are formed before the insulator 282 is formed, that is, The formation of the insulator 293 and the conductor 294 may be performed before the step shown in FIG. The formation of the insulator 28 can be performed in a similar manner to the formation of the conductor 250 and the conductor 260. 0, openings are formed in the insulator 275, the insulator 273b, and the insulator 271b, and the openings A laminated film that becomes an insulator 293 and a conductor 294 is formed so as to be embedded in the laminated film. A part of the insulating layer 293 and the conductive layer 294 are removed by a CMP process. good.

[0473] <Modifications of memory devices> In the following, the above-mentioned memory device will be explained with reference to Figs. 28A, 28B, 29, and 30. The transistor 200 according to one embodiment of the present invention and the transistor 200 according to another embodiment of the present invention are different from those shown in Structural Example 1 of the present invention. An example of a semiconductor device having a capacitor device 292 will be described. 28B, 29, and 30, the semiconductor device shown in the previous embodiment and The semiconductor device shown in the example 1 of the semiconductor device configuration (see FIG. 27A) has the same structure and function as the semiconductor device shown in the example 1 of the semiconductor device configuration (see FIG. 27A). In this section, the transistor 200 and The constituent materials of the capacitance device 292 are the same as those of the previous embodiments and the memory device The materials described in detail in the structural example 1 can be used. 29 and 30, the memory device shown in FIG. 27A is used as the memory device. However, the present invention is not limited to this. For example, the memory device shown in FIG. 27B etc. may also be used.

[0474] <<Memory Device Variation 1>> In the following, a transistor 200a, a transistor 200b, and a capacitor according to one embodiment of the present invention will be described. An example of a semiconductor device 600 having a capacitance device 292a and a capacitance device 292b is shown in FIG. This will be explained with reference to FIG. 28A.

[0475] FIG. 28A shows a transistor 200a, a transistor 200b, a capacitance device 292a, 10 is a cross-sectional view in the channel length direction of a semiconductor device 600 having a capacitance device 292b. Here, the capacitance device 292a is composed of the conductor 242a and a Insulator 271a and insulator 272a provided in contact with the side surface of conductor 242a, The insulating member 272a includes an edge member 271a and a conductor 294a provided to cover the edge member 271a and the insulator 272a. The capacitance device 292b is formed by a conductor 242b and an insulating film provided on the conductor 242b. an insulator 272b provided in contact with the side surface of the conductor 242b; 271b, and a conductor 294b provided covering the insulator 272b.

[0476] As shown in FIG. 28A, the semiconductor device 600 is formed by a line having a dashed line A3-A4 as an axis of symmetry. The transistor 200a has a symmetrical configuration. The source electrode or the drain electrode of the transistor 200b is connected to the conductor 242c. An insulator 271c is provided on the conductor 242c, and the insulator An insulator 273c is provided on the body 271c. , the connections to transistor 200a and transistor 200b also function as plugs. The conductor 240 serves as both. By configuring the capacitor device and the connection between the wiring and the plug as described above, miniaturization or high integration can be achieved. Therefore, it is possible to provide a semiconductor device that can be easily fabricated.

[0477] The transistor 200a, the transistor 200b, the capacitance device 292a, and the capacitance device The configuration and effect of each of the vise 292b are shown in FIGS. 1A to 1D and 2. 7A can be taken into consideration.

[0478] <<Memory Device Variation 2>> In the above, the transistor 200a and the transistor 20 0b, the capacitance device 292a, and the capacitance device 292b are given. The semiconductor device is not limited to this. For example, a semiconductor device as shown in FIG. 600 and a semiconductor device having the same configuration as the semiconductor device 600 are connected via a capacitance section. In this specification, the transistor 200a and the transistor 200b A semiconductor device having the capacitance device 292a and the capacitance device 292b is called a cell. The transistor 200a, the transistor 200b, the capacitance device 292a, and the capacitance device The configuration of device 292b is the same as that of transistors 200a and 200b described above. , the description of the capacitance device 292a and the capacitance device 292b can be taken into consideration. .

[0479] FIG. 28B shows a transistor 200a, a transistor 200b, a capacitance device 292a, and a semiconductor device 600 having a capacitance device 292b, and a semiconductor device 600 having a similar structure to the semiconductor device 600. FIG. 1 is a cross-sectional view in which cells having a configuration are connected via a capacitance portion.

[0480] As shown in FIG. 28B, one electrode of the capacitance device 292b of the semiconductor device 600 The conductor 294b functions as a semiconductor device 600 having a similar configuration. It also serves as one electrode of the capacitance device of the capacitor 01. , a conductor 292a that functions as one electrode of a capacitance device 292a included in the semiconductor device 600. 94a is the semiconductor device adjacent to the left side of the semiconductor device 600, that is, in the A1 direction in FIG. 28B. The right side of the semiconductor device 601 also serves as one electrode of the capacitance device of the semiconductor device. In FIG. 28B, the cells in the A2 direction have the same configuration. An array (also called a memory device layer) can be constructed. By using this configuration, the distance between adjacent cells can be reduced, which improves the projection of the cell array. The shadow area can be reduced, enabling high integration. The configuration of (a) is arranged in a matrix to form a matrix cell array. can be done.

[0481] As described above, in the configuration shown in this embodiment, the transistor 200a and the transistor 20 0b, capacitance device 292a and capacitance device 292b are formed to The area can be reduced, and the miniaturization or high integration of a semiconductor device having a cell array can be achieved. do.

[0482] The cell array may be configured not only as a plane but also as a stacked structure. As shown in FIG. 29, a plurality of cell arrays ( By stacking the cell arrays 610_1 to 610_n, the cell array Cells can be integrated and arranged without increasing the occupied area. Rays can be constructed.

[0483] <Memory Device Modification Example 3> FIG. 30 shows a memory unit 470 in a transistor layer 41 having a transistor 200T. 3 and four memory device layers 415 (memory device layers 415_1 to 415_2) An example having a layer 415_4) is shown.

[0484] The memory device layers 415_1 to 415_4 each include a plurality of memory The device 420 is also included.

[0485] The memory device 420 is connected to different memory devices via electrical conductors 424 and electrical conductors 205. The memory device 420 in the device layer 415 and the transistor layer 413 Electrically connect to transistor 200T.

[0486] The memory unit 470 includes an insulator 212, an insulator 214, an insulator 282, and an insulator The insulating body 283 is sealed (hereinafter referred to as a sealing structure for convenience). The insulator 274 is provided between the insulator 274, the insulator 283, and the insulator 212. A conductor 440 is provided on the element layer 411 and is electrically connected to the element layer 411 .

[0487] An insulator 280 is provided inside the sealing structure. The insulator 280 is heated. The insulator 280 has a function of releasing oxygen, or has an excess oxygen region.

[0488] The insulators 212 and 283 have a high barrier property against hydrogen. In addition, the insulator 214 and the insulator 282 are preferably made of a material that can capture hydrogen and Alternatively, it is preferable that the material has a function of fixing hydrogen.

[0489] For example, the material having a high barrier property against hydrogen is silicon nitride, or Silicon nitride oxide, etc. Also, the above-mentioned hydrogen capturing or hydrogen fixing function Materials having this property include aluminum oxide, hafnium oxide, and aluminum and hafnium oxide. Examples include oxides containing hafnium (hafnium aluminate).

[0490] The materials used for the insulators 212, 214, 282, and 283 are The crystal structure is not particularly limited, but may be either amorphous or crystalline. For example, amorphous oxides are used as materials that have the function of capturing or fixing hydrogen. It is preferable to use an aluminum film. Amorphous aluminum oxide is a highly crystalline oxide. It may capture and fix hydrogen to a greater extent than aluminum.

[0491] Also, between the transistor layer 413 and the memory device layer 415 or between each memory device Preferably, an insulator 282 and an insulator 214 are also provided between the layers 415. In addition, it is preferable that an insulator 296 is provided between the insulator 282 and the insulator 214. The insulator 296 can be made of the same material as the insulator 283. Alternatively, it can be made of silicon oxide. Silicon oxide nitride or silicon oxynitride can be used. Alternatively, a known insulating material can be used. stomach.

[0492] Here, the excess oxygen in the insulator 280 is converted into hydrogen in the oxide semiconductor in contact with the insulator 280. The following model can be considered for diffusion:

[0493] Hydrogen present in the oxide semiconductor is transferred to other The hydrogen diffuses into the structure. The excess oxygen in the insulator 280 is transferred to the oxide semiconductor. The hydrogen atoms react with the hydrogen atoms in the insulator to form OH bonds, which then diffuse through the insulator 280. The element is made of a material that has the function of capturing or fixing hydrogen (typically, an insulator 282 ), the hydrogen atom bonds with an atom in the insulator 282 (e.g., a metal atom) The oxygen atoms react with the insulator 282 and are captured or fixed in the insulator 282. It is assumed that the oxygen atoms of the excess oxygen remain in the insulator 280 as excess oxygen. The probability that excess oxygen in the insulator 280 plays a bridging role in the diffusion of hydrogen. is high.

[0494] In order to satisfy the above model, the manufacturing process of the semiconductor device is one of the important factors. .

[0495] For example, an insulator 280 having excess oxygen is formed on an oxide semiconductor, and then an insulating layer is formed on the oxide semiconductor. After that, a heat treatment is preferably performed. Specifically, in an atmosphere containing oxygen, an atmosphere containing nitrogen, or a mixture of oxygen and nitrogen, The heat treatment is carried out at a temperature of 350°C or higher, preferably 400°C or higher. The heat treatment time is 1 hour or longer. It is preferably 4 hours or more, and more preferably 8 hours or more.

[0496] By the heat treatment, hydrogen in the oxide semiconductor is converted into the insulator 280 and the insulator 28 2. That is, the oxide semiconductor and the oxide semiconductor The absolute amount of hydrogen present in the vicinity of the body can be reduced.

[0497] After the heat treatment, an insulator 283 is formed. The insulator 283 acts as a barrier against hydrogen. Because it is a material with high functionality, it can absorb hydrogen that has diffused outward or water that exists outside. The element is prevented from penetrating into the interior, specifically, the oxide semiconductor or the insulator 280 side. It is possible.

[0498] Regarding the above heat treatment, the following is performed after the insulator 282 is formed: For example, after forming the transistor layer 413 or after forming the memory After forming the re-device layer 415_1 to the memory device layer 415_3, the above-mentioned heating In addition, when hydrogen is diffused outward by the heat treatment, Hydrogen is diffused upward or laterally into the transistor layer 413. Similarly, the memory device layer When heat treatment is performed after forming the memory device layers 415_1 to 415_3, The elements are diffused upward or laterally.

[0499] By using the above manufacturing process, the insulator 212 and the insulator 283 are bonded to each other. By doing so, the above-mentioned sealing structure is formed.

[0500] As described above, the hydrogen concentration is reduced by using the above structure and manufacturing process. Therefore, a semiconductor device using an oxide semiconductor having high reliability can be provided. According to one embodiment of the present invention, a semiconductor device having good electrical characteristics can be provided. It is possible to provide a semiconductor device that

[0501] The configurations, methods, and the like described in this embodiment may be used in combination with other configurations, methods, and the like described in this embodiment. The present invention may be appropriately combined with the configurations and methods shown in the embodiments or the configurations and methods shown in the examples. It can be used.

[0502] (Embodiment 3) In this embodiment, the present invention will be explained with reference to FIGS. 31A, 31B, and 32A to 32H. According to one embodiment of the present invention, a transistor using an oxide as a semiconductor (hereinafter referred to as an OS transistor) ), and a storage device to which a capacitive element is applied (hereinafter referred to as an OS memory device) The OS memory device includes at least a capacitive element and a The memory device has an OS transistor that controls the charging and discharging of the element. The flash current is extremely small, so the OS memory device has excellent retention characteristics and is non-volatile. It can be made to function as such.

[0503] <Storage device configuration example> 31A shows an example of the configuration of an OS memory device. 1, and a memory cell array 1470. The peripheral circuit 1411 includes a row circuit 1420, It has column circuitry 1430, output circuitry 1440, and control logic circuitry 1460. .

[0504] The column circuitry 1430 includes, for example, a column decoder, a precharge circuit, a sense amplifier, a write The precharge circuit has a function of precharging the wiring. The amplifier has the function of amplifying the data signal read from the memory cell. The lines are wirings connected to memory cells in the memory cell array 1470. The amplified data signal is output via an output circuit 1440 as a data signal RDA TA to the outside of the storage device 1400. It has a decoder, a word line driver circuit, etc., and can select a row to be accessed.

[0505] The storage device 1400 is supplied with a low power supply voltage (VSS) from the outside as a power supply voltage, and a peripheral circuit 14 The high power supply voltage (VDD) for the 11 and the high power supply voltage (VIL) for the memory cell array 1470 are The storage device 1400 also receives control signals (CE, WE, RE), address signals, and The address signal ADDR and the data signal WDATA are input from the outside. The data signal WDATA is input to the write circuit. do.

[0506] The control logic circuit 1460 receives externally input control signals (CE, WE, R E) to generate control signals for the row decoder and column decoder. The control signal WE is a write enable signal, and the control signal R E is a read enable signal. The signal is not limited to this, and other control signals may be input as required.

[0507] The memory cell array 1470 includes a plurality of memory cells MC arranged in a matrix and a plurality of The wiring connecting the memory cell array 1470 and the row circuit 1420 is The number of lines is determined by the configuration of the memory cells MC, the number of memory cells MC in one row, etc. The number of wirings connecting the memory cell array 1470 and the column circuit 1430 is It is determined by the configuration of the memory cells MC, the number of memory cells MC in one row, etc.

[0508] In FIG. 31A, the peripheral circuit 1411 and the memory cell array 1470 are arranged on the same plane. However, the present embodiment is not limited to this. For example, As shown in FIG. 31B, a memory cell array 1470 is overlapped on a part of the peripheral circuit 1411. For example, the memory cell array 1470 may be provided so as to overlap the memory cell array 1470. A sense amplifier may be provided.

[0509] 32A to 32H show examples of memory cell configurations that can be applied to the above-described memory cell MC. I will explain.

[0510] [DOSRAM] 32A to 32C show examples of circuit configurations of memory cells in a DRAM. DRAM using a memory cell with one OS transistor and one capacitor element is called DOSRAM. (Dynamic Oxide Semiconductor Random Acce The memory cell 1471 shown in FIG. 32A is a The transistor M1 has a gate (top It has a gate (sometimes called a gate), and a back gate.

[0511] The first terminal of the transistor M1 is connected to the first terminal of the capacitance element CA, and the transistor M The second terminal of the transistor M1 is connected to the wiring BIL, and the gate of the transistor M1 is connected to the wiring WOL. The back gate of the transistor M1 is connected to the wiring BGL. The second terminal of A is connected to the wiring CAL.

[0512] The wiring BIL functions as a bit line, and the wiring WOL functions as a word line. CAL functions as a wiring for applying a predetermined potential to the second terminal of the capacitive element CA. When writing and reading data, a low level potential is applied to the wiring CAL. The wiring BGL is preferably used to apply a potential to the back gate of the transistor M1. By applying an arbitrary potential to the wiring BGL, The threshold voltage of M1 can be increased or decreased.

[0513] Here, the memory cell 1471 shown in FIG. 32A corresponds to the memory device shown in FIG. That is, the transistor M1 corresponds to the transistor 200, and the capacitance element CA corresponds to the capacitance device 29. It corresponds to 2.

[0514] Furthermore, the memory cells MC are not limited to the memory cells 1471, and the circuit configuration may be changed. For example, the memory cell MC can be configured as follows, as in the memory cell 1472 shown in FIG. The back gate of the transistor M1 is connected to the wiring WOL instead of the wiring BGL. Also, for example, the memory cell MC may be a memory cell 1473 shown in FIG. A transistor M having a single gate structure, i.e., a transistor without a back gate, The memory cell may be configured as 1.

[0515] When the semiconductor device described in the above embodiment is used for the memory cell 1471 or the like, The transistor 200 is used as M1, and the capacitance element 100 is used as the capacitance element CA. By using an OS transistor as the transistor M1, This makes it possible to make the leakage current of the transistor M1 very small. The transistor M1 allows the data to be retained for a long time, reducing the frequency of refreshing the memory cells. In addition, the refresh operation of the memory cells can be made unnecessary. In addition, since the leakage current is very small, the memory cells 1471 and 147 2. The memory cell 1473 can store multi-value data or analog data. do.

[0516] In addition, in the DOSRAM, as described above, the memory cell array 1470 is overlapped with the By providing a sense amplifier as described above, the bit line can be shortened. This reduces the bit line capacitance and the storage capacitance of the memory cell.

[0517] [NOSRAM] 32D to 32G show the circuit of a gain cell type memory cell having two transistors and one capacitor. The memory cell 1474 shown in FIG. 32D includes a transistor M2 and a transistor The transistor M2 has a top gate ( It may be simply called a gate.) and a back gate. A memory device having a gain cell type memory cell using an OS transistor as the transistor M2. , NOSRAM(Nonvolatile Oxide Semiconductor It is sometimes called RAM.

[0518] The first terminal of the transistor M2 is connected to the first terminal of the capacitance element CB, and the transistor M The second terminal of the transistor M2 is connected to the wiring WBL, and the gate of the transistor M3 is connected to the wiring WOL. The back gate of the transistor M2 is connected to the wiring BGL. The second terminal of transistor B is connected to the line CAL. The first terminal of transistor M3 is connected to the line R BL, the second terminal of the transistor M3 is connected to the line SL, and the second terminal of the transistor M The gate of 3 is connected to the first terminal of the capacitance element CB.

[0519] The wiring WBL functions as a write bit line, and the wiring RBL functions as a read bit line. The wiring WOL functions as a word line. The wiring CAL functions as the second wiring of the capacitance element CB. It functions as a wiring for applying a predetermined potential to the terminal. During the data read operation, a low level potential is applied to the wiring CAL. The wiring BGL is a wiring for applying a potential to the back gate of the transistor M2. By applying an arbitrary potential to the wiring BGL, the The threshold voltage can be increased or decreased.

[0520] Here, the memory cell 1474 shown in FIG. 32D corresponds to the memory device shown in FIG. That is, the transistor M2 is connected to the transistor 200, and the capacitance element CB is connected to the capacitance element 100. , the transistor M3 is connected to the transistor 300, the wiring WBL is connected to the wiring 1003, and the wiring WOL is connected to the wiring 1004, the wiring BGL is connected to the wiring 1006, the wiring CAL is connected to the wiring 1005, and the wiring R BL corresponds to the wiring 1002, and wiring SL corresponds to the wiring 1001.

[0521] Furthermore, the memory cells MC are not limited to the memory cells 1474, and the circuit configuration may be changed as appropriate. For example, the memory cell MC can be configured as a memory cell 1475 shown in FIG. In addition, the back gate of the transistor M2 is connected to the wiring WOL instead of the wiring BGL. For example, the memory cell MC may be a memory cell 1476 shown in FIG. As shown in the figure, a transistor with a single gate structure, i.e., a transistor without a back gate, For example, the memory cell MC may be configured as shown in FIG. As shown in FIG. 2G, the wiring WBL and the wiring RBL are connected to one wiring BIL. It may also be configured as a single unit.

[0522] When the semiconductor device described in the above embodiment is used for the memory cell 1474 or the like, The transistor 200 is used as the transistor M2, and the transistor 300 is used as the transistor M3. The capacitance element CB can be a capacitance element 100. By using an OS transistor, the leakage current of transistor M2 is made very small. This allows the written data to be stored for a long time by the transistor M2. Since the memory cells can be maintained at the same level, the frequency of refreshing the memory cells can be reduced. Furthermore, the refresh operation of the memory cells can be eliminated. Since the memory cell 1474 is always small, it can store multi-value data or analog data. The same applies to memory cells 1475 to 1477.

[0523] The transistor M3 is a transistor having silicon in the channel forming region (hereinafter referred to as The conductivity type of the Si transistor may be The Si transistor may be an n-channel type or a p-channel type. The field effect mobility may be higher than that of a read transistor. A Si transistor may be used as the transistor M3 that functions as a By using a Si transistor for transistor M3, a transistor can be stacked on top of transistor M3. Since the memory cell can be provided with the transistor M2, the area occupied by the memory cell can be reduced, and the memory device can be made more efficient. Integration can be achieved.

[0524] The transistor M3 may be an OS transistor. When an OS transistor is used for the transistor M3, the memory cell array 1470 is The circuit can be constructed using only transistors.

[0525] FIG. 32H shows an example of a gain cell type memory cell with three transistors and one capacitor. The memory cell 1478 shown in FIG. 32H includes transistors M4 through M6, and The memory cell 1478 has a wiring and a capacitor CC. The capacitor CC is provided as needed. The wiring is electrically connected to BIL, wiring RWL, wiring WWL, wiring BGL, and wiring GNDL. The wiring GNDL is a wiring that...

Claims

1. an oxide semiconductor; a first conductor having a region located above the oxide semiconductor; a second conductor having a region located above the oxide semiconductor; a first insulator having a region in contact with an upper surface of the first conductor; a second insulator having a region in contact with an upper surface of the second conductor; a third insulator having a region located above the first insulator and the second insulator, and having an opening overlapping a region between the first conductor and the second conductor; a fourth insulator having a region located above the oxide semiconductor and between the first conductor and the second conductor; a third conductor having an overlying region on the fourth insulator; a fifth insulator having a region in contact with the first side surface of the first insulator, the first side surface of the first conductor, and the first side surface of the oxide semiconductor; a sixth insulator having a region in contact with the first side surface of the second insulator, the first side surface of the second conductor, and the second side surface of the oxide semiconductor; the fourth insulator has a region in contact with the second side surface of the first conductor, the second side surface of the second conductor, the second side surface of the first insulator, and the second side surface of the second insulator; The semiconductor device, wherein the first insulator, the second insulator, the fifth insulator, and the sixth insulator are metal oxides having an amorphous structure.

2. an oxide semiconductor; a first conductor having a region located above the oxide semiconductor; a second conductor having a region located above the oxide semiconductor; a first insulator covering the first conductor and the second conductor and having an opening overlapping a region between the first conductor and the second conductor; a second insulator having a region located above the first insulator and having an opening overlapping a region between the first conductor and the second conductor; a third insulator having a region located above the oxide semiconductor and between the first conductor and the second conductor; a third conductor having an overlying region on the third insulator; a fourth insulator having a region in contact with the first side surface of the first insulator, the first side surface of the first conductor, and the first side surface of the oxide semiconductor; a fifth insulator having a region in contact with the second side surface of the first insulator, the first side surface of the second conductor, and the second side surface of the oxide semiconductor; the third insulator has a region in contact with the second side surface of the first conductor, the second side surface of the second conductor, and a third side surface of the first insulator in a region located between the first conductor and the second conductor; The semiconductor device, wherein the first insulator, the fourth insulator, and the fifth insulator are metal oxides having an amorphous structure.

3. an oxide semiconductor; a first conductor having a region located above the oxide semiconductor; a second conductor having a region located above the oxide semiconductor; a first insulator having a region in contact with an upper surface of the first conductor; a second insulator having a region in contact with an upper surface of the second conductor; a third insulator having a region located above the first insulator and the second insulator, and having an opening overlapping a region between the first conductor and the second conductor; a fourth insulator having a region located above the third insulator and having an opening overlapping a region between the first conductor and the second conductor; a fifth insulator having a region located above the oxide semiconductor and between the first conductor and the second conductor; a third conductor having an overlying region on the fifth insulator; the third insulator has a region in contact with a first side surface of the first insulator, a first side surface of the second insulator, a first side surface of the first conductor, a first side surface of the second insulator, and a side surface of the oxide semiconductor; the fifth insulator has a region in contact with the second side surface of the first conductor, the second side surface of the second conductor, the second side surface of the first insulator, the second side surface of the second insulator, and the first side surface of the third insulator in a region located between the first conductor and the second conductor; The semiconductor device, wherein the first insulator, the second insulator, and the third insulator are metal oxides having an amorphous structure.

4. In claim 3, a sixth insulator having a region located below the oxide semiconductor; a seventh insulator having an area in contact with an upper surface of the fourth insulator and an upper surface of the third conductor; The sixth insulator and the seventh insulator are metal oxides having an amorphous structure.

5. In claim 4, an eighth insulator covering the seventh insulator, the eighth insulator has a region in contact with an upper surface of the sixth insulator in a region where the eighth insulator does not overlap with the fifth insulator, The semiconductor device, wherein the eighth insulator is a metal oxide having an amorphous structure.

6. In claim 5, a ninth insulator having a region in contact with a lower surface of the sixth insulator; a tenth insulator having a region in contact with the top surface of the seventh insulator, The semiconductor device, wherein the ninth insulator and the tenth insulator are silicon nitride.

7. In claim 3, a dielectric; a fourth conductor; the second insulator, the third insulator, and the fourth insulator have openings formed therein that reach the second conductor; the dielectric is disposed in the opening and has an area in contact with a top surface of the second conductor, a third side surface of the second insulator, a second side surface of the third insulator, and a side surface of the fourth insulator; The fourth conductor is disposed in the opening and has a region in contact with the top surface of the dielectric.

8. In claim 3, a first nitride insulator between the first insulator and the third insulator; a second nitride insulator between the second insulator and the third insulator, The semiconductor device, wherein the first nitride insulator and the second nitride insulator are silicon nitride.

9. In claim 3, The semiconductor device has an upper surface of the first insulator and an upper surface of the second insulator each having a region in contact with the third insulator.

10. In claim 1, The semiconductor device wherein the metal oxide is AlOx (x is an arbitrary number greater than 0).

11. In claim 2, The semiconductor device wherein the metal oxide is AlOx (x is an arbitrary number greater than 0).

12. In claim 3, The semiconductor device wherein the metal oxide is AlOx (x is an arbitrary number greater than 0).

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