Photovoltaic devices and methods of fabrication

Abstract

Described herein is a photovoltaic device comprising a II-VI semiconductor absorber material having an improved carrier extraction layer. Methods for processing the semiconductor absorber layer and for forming the improved carrier extraction layer and the p-type contact layer are described.

Description

[Technical field]

[0001] This specification relates generally to layers for photovoltaic devices, and more particularly to the use of specific combinations of materials and layer formation parameters to improve the efficiency of photovoltaic devices. [Background technology]

[0002]

[0002] Photovoltaic devices generate power by converting light into electricity using semiconductor materials that exhibit the photovoltaic effect. P-type contacts with low contact resistivity and low recombination losses have been a continuing challenge in the development of thin-film cadmium telluride-based solar cells. The lack of high work function materials with good band alignment makes it difficult to form ohmic contacts to p-type CdTe and other II-VI semiconductor alloys. Material layers to improve the efficiency of photovoltaic devices are desired. Summary of the Invention [Problem to be solved by the invention]

[0003]

[0003] Thus, there is a need for alternative layer structures and compositions for use in photovoltaic devices. [Means for solving the problem]

[0004]

[0004] The embodiments described in the drawings are illustrative and exemplary in nature and are not intended to limit the subject matter defined by the claims. The following detailed description of illustrative embodiments can be understood when read in conjunction with the following drawings, in which like reference numerals indicate the same or corresponding parts throughout the drawings, in which: [Brief description of the drawings]

[0005] [Figure 1] FIG. 1 is a schematic illustration of a photovoltaic device according to one or more embodiments shown and described herein. [Diagram 2]

[0006] FIG. 2 is a schematic depiction of a cross-sectional view of a segment of the photovoltaic element of FIG. 1 according to one or more embodiments shown and described herein. [Diagram 3]

[0007] 3A and 3B are schematic illustrations of cross-sectional views of segments of a photovoltaic element according to embodiments shown and described herein. [Figure 4]

[0008] FIG. 4 is a schematic depicting a cross-sectional view of the formation of a self-assembled monolayer according to one or more embodiments shown and described herein. [Diagram 5]

[0009] 5A and 5B are diagrams illustrating the shift in the valence band offset of a device according to embodiments shown and described herein; [Figure 6]

[0010] 6A and 6B show band diagrams for a device according to embodiments shown and described herein; [Figure 7]

[0011] 7A and 7B show band diagrams for a device according to embodiments shown and described herein; [Figure 8]

[0012] 8A and 8B are graphs illustrating a comparison of the performance characteristics of photoluminescence intensity with respect to peak wavelength for a control device and a device according to an embodiment shown and described herein. [Figure 9]

[0013] FIG. 9 illustrates a comparison of performance characteristics of devices according to embodiments shown and described herein. [Figure 10-1]

[0014] 10A, 10B, and 10C show comparative performance characteristics of a control device and a device according to embodiments shown and described herein. [Figure 10-2] 10D and 10E are diagrams illustrating comparative performance characteristics of a control device and a device according to embodiments shown and described herein. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0006]

[0015] Photovoltaic devices can be formed from a stack of multiple functional layers formed above a substrate. One or more of the functional layers can include a thin film of material, i.e., the photovoltaic device can be a thin-film photovoltaic device. Thin-film photovoltaic devices can include an absorber layer for converting light into charge carriers, and a conductive layer for collecting the charge carriers. As the charge carriers are generated, an electric potential is created by the separation of the charges. The positive and negative charge carriers, holes and electrons, move in opposite directions toward the p-type and n-type regions on opposite sides of the absorber, respectively.

[0007]

[0016] Producing p-type contacts with low contact resistivity and low recombination losses has been a continuing challenge in the development of thin-film cadmium telluride-based solar cells. The scarcity of high work function materials with good band alignment has made it difficult to form ohmic contacts to p-type CdTe, its alloys, and other II-VI semiconductor alloys. Interface engineering using the described materials and methods provides an enhanced carrier extraction (ICE) layer between the absorber and the p-type contact layer, producing a structure with high hole conductivity, low electron affinity, chemical passivation, and controlled band alignment. Thus, when p-type majority carriers (holes) reach this contact interface, the ICE layer efficiently transports the holes from the absorber to the p-type contact layer, minimizing interfacial recombination.

[0008]

[0017] The ICE layer, in conjunction with the p-type contact layer, provides a good back contact for solar cells having an absorber comprising II-VI type semiconductor alloys, including alloys of cadmium and tellurium, including binary, ternary, and quaternary alloys. The ICE layer maintains chemical passivation at the surface of the absorber layer and provides control of work function energy band alignment. The p-type contact layer has a low hole transport barrier and a high electronic barrier to electron reflection. Ideally, the p-type contact layer has minimal interface defects, good passivation properties, and high conductivity. The p-type contact layer may have a deep Fermi level and high doping for high hole mobility. In some instances, the ICE layer and the p-type contact layer may be formed toward the back side of the module relative to the absorber layer. In some instances, the ICE layer and the p-type contact layer may be formulated to be substantially transparent. Embodiments provided herein relate to p-type contact layers and photovoltaic devices including the same. The layers of the present disclosure may improve the efficiency of the current collecting portion of the photovoltaic device.

[0009]

[0018] Referring now to FIG. 1, an embodiment of a photovoltaic element 100 is depicted in schematic form. The photovoltaic element 100 can be configured to receive light and convert the light into electrical energy, e.g., absorb photons from the light and convert them into electrical current via the photovoltaic effect. Thus, for purposes of discussion and clarity, the photovoltaic element 100 can define a front surface 102 configured to face a primary light source, e.g., the sun. Additionally, the photovoltaic element 100 can also define a back surface 104 offset from the front surface 102, e.g., by multiple functional layers of material. It should be noted that the term "light" can refer to various wavelengths of the electromagnetic spectrum, such as, but not limited to, wavelengths in the ultraviolet (UV), infrared (IR), and visible portions of the electromagnetic spectrum. As used herein, "sunlight" refers to light emitted by the sun.

[0010]

[0019] The photovoltaic element 100 may include multiple layers disposed between the front surface 102 and the back surface 104. As used herein, the term "layer" refers to a thickness of material provided on a surface. Each layer may cover all or a portion of an adjacent surface. In some embodiments, the layers of the photovoltaic element 100 may be divided into an array of photovoltaic cells 200. For example, the photovoltaic element 100 may be scored by a plurality of vertical row rules 202 and a plurality of horizontal row rules 204. The vertical row rules 202 may extend along the length Y of the photovoltaic element 100 and may define the boundaries of the photovoltaic cells 200 along the length Y of the photovoltaic element 100. Neighboring cells of the photovoltaic cells 200 may be connected in series along the width X of the photovoltaic element 100. In other words, monolithic interconnections of neighboring cells 200 may be formed, i.e., adjacent to the vertical row rules 202. The horizontal rules 204 can extend along the width X of the photovoltaic element 100 and can demarcate the photovoltaic cells 200 along the width X of the photovoltaic element 100. In operation, current 205 can flow primarily along the width X through the photovoltaic cells 200 connected in series by the vertical rules 202. In operation, the horizontal rules 204 can limit the ability of the current 205 to flow along the length Y. The horizontal rules 204 are optional and can be configured to separate the series connected photovoltaic cells 200 into groups 206 arranged along the length Y.

[0011]

[0020] 1 , the row rules 204 can electrically isolate groups 206 of photovoltaic cells 200 connected in series. In some embodiments, the groups 206 of photovoltaic cells 200 can be connected in parallel, such as via a bus bar. Optionally, the number of row rules 204 can be configured to limit the maximum current generated by each group 206 of photovoltaic cells 200. In some embodiments, the maximum current generated by each group 206 can be about 200 milliamps (mA) or less, such as, for example, about 100 mA or less in one embodiment, about 75 mA or less in another embodiment, or about 50 mA or less in further embodiments.

[0012]

[0021] 2, the layers of the photovoltaic element 100 may include a thin film stack provided above a substrate 110. The substrate 110 may be configured to facilitate the transmission of light to the photovoltaic element 100. The substrate 110 may be disposed on a front side 102 of the photovoltaic element 100. The substrate 110 may have a first surface 112 that faces substantially toward the front side 102 of the photovoltaic element 100 and a second surface 114 that faces substantially toward the back side 104 of the photovoltaic element 100. One or more layers may be disposed between the first surface 112 and the second surface 114 of the substrate 110.

[0013]

[0022] The substrate 110 can include a transparent layer. The transparent layer can be a substantially transparent material, such as, for example, glass. Suitable glasses can include soda-lime glass, or glass with reduced iron content. The transparent layer can have a transmittance range, for example, in a range including visible light and near ultraviolet and / or infrared. In some embodiments, the transmittance range can include wavelengths from 250 nm to 1,300 nm, or a portion therein. The transparent layer can also be characterized by a percent transmittance, including, for example, greater than about 50% in one embodiment, greater than about 60% in another embodiment, greater than about 70% in yet another embodiment, greater than about 80% in a further embodiment, or greater than about 85% in yet a further embodiment. In one embodiment, the transparent layer can include glass with a transmittance of about 90% or greater. Optionally, the substrate 110 can include a coating on the first surface 112. The coating can be configured to interact with light or improve durability of the substrate 110, such as, but not limited to, an anti-reflective coating, an anti-soiling coating, or a combination thereof.

[0014]

[0023] Referring again to FIG. 2, the photovoltaic element 100 may include a barrier layer 130 configured to mitigate diffusion of contaminants (e.g., sodium) from the substrate 110, which may result in degradation or delamination of other layers of the photovoltaic stack. The barrier layer 130 may have a first surface 132 that faces substantially toward the front side 102 of the photovoltaic element 100, and a second surface 134 that faces substantially toward the back 104 of the photovoltaic element 100. In some embodiments, the barrier layer 130 may be provided adjacent to the substrate 110. For example, the first surface 132 of the barrier layer 130 may be provided on the second surface 114 of the substrate 100. As used herein, the term "adjacent" means that two layers are disposed in contact with each other with no intervening material between at least a portion of the layers.

[0015]

[0024] In general, the barrier layer 130 can be substantially transparent, thermally stable, have a low number of pinholes, high sodium blocking capability, and good adhesion. Alternatively or additionally, the barrier layer 130 can be configured to add color suppression to light. The barrier layer 130 can include one or more layers of material, including, but not limited to, tin oxide, silicon dioxide, aluminum doped silicon oxide, silicon oxide, silicon nitride, or aluminum oxide. The barrier layer 130 can have a thickness bounded by the first surface 132 and the second surface 134, including, for example, in one embodiment, greater than 10.0 nm, in one embodiment, greater than about 15.0 nm, and in further embodiments, less than about 80.0 nm, or less than about 20.0 nm.

[0016]

[0025] With further reference to FIG. 2, the photovoltaic device 100 can include an n-type contact layer 140 configured to provide an electrical contact for transporting charge carriers generated by the photovoltaic device 100. The n-type contact layer can be a transparent conductive oxide (TCO) layer 140. The n-type contact layer 140 can have a first surface 142 facing substantially toward the front side 102 of the photovoltaic device 100 and a second surface 144 facing substantially toward the back 104 of the photovoltaic device 100. In some embodiments, the n-type contact layer 140 can be provided adjacent to the barrier layer 130. For example, the first surface 142 of the n-type contact layer 140 can be provided on the second surface 134 of the barrier layer 130. In general, the n-type contact layer 140 can include one or more layers of a substantially transparent, wide bandgap n-type semiconductor material. In particular, the wide bandgap can have a larger value compared to the energy of the light photons, and can mitigate undesired light absorption. The n-type contact layer 140 may include one or more layers of materials including, but not limited to, tin dioxide, doped tin dioxide (e.g., F-SnO2), indium tin oxide, or cadmium tin oxide, including cadmium stannate (Cd2SnO4). In embodiments in which the n-type contact layer 140 includes cadmium stannate, the cadmium stannate may be provided in a crystalline form. For example, the cadmium stannate may be deposited as a film and then subjected to an annealing process, which converts the thin film into a crystallized film.

[0017]

[0026] The photovoltaic device 100 may include a buffer layer 150 configured to provide an insulating layer between the n-type contact layer 140 and the semiconductor layer. The buffer layer 150 may have a first surface 152 facing substantially toward the front side 102 of the photovoltaic device 100 and a second surface 154 facing substantially toward the back 104 of the photovoltaic device 100. In some embodiments, the buffer layer 150 may be provided adjacent to the n-type contact layer 140. For example, the first surface 152 of the buffer layer 150 may be provided on the second surface 144 of the n-type contact layer 140. The buffer layer 150 may be made of any suitable material, including, but not limited to, intrinsic tin dioxide, zinc magnesium oxide (e.g., Zn 1-x Mg x The buffer layer 150 may include a material having a higher resistivity than the n-type contact layer 140, including silicon dioxide (SiO2), aluminum oxide (Al2O3), aluminum nitride (AlN), zinc tin oxide, zinc oxide, silicon tin oxide, or any combination thereof. In some embodiments, the material of the buffer layer 150 may be configured to substantially match the band gap of an adjacent semiconductor layer (e.g., absorber). The buffer layer 150 may have a thickness between the first surface 152 and the second surface 154, for example, greater than about 10.0 nm in one embodiment, including between 10.0 nm and 120.0 nm, between 10.0 nm and 80.0 nm, or in further embodiments between 15.0 nm and 60.0 nm.

[0018]

[0027] 2, the photovoltaic device 100 can include an absorber layer 160 configured to cooperate with another layer to form a p-n junction within the photovoltaic device 100. Thus, absorbed light photons can free electron-hole pairs, creating carrier flow and generating electrical energy.

[0019]

[0028] The partially formed device, including the substrate 110, the n-type layer including the TCO layer 140 and / or the buffer layer 150, and the layers therebetween, may be referred to as the substrate stack 113. The absorber layer 160 may be formed above the substrate stack 113. The absorber layer 160 may have a first surface 162 that faces substantially toward the front side 102 of the photovoltaic device 100, and a second surface 164 that faces substantially toward the back 104 of the photovoltaic device 100. A thickness of the absorber layer 160 may be defined between the first surface 162 and the second surface 164. The thickness of the absorber layer 160 may be, for example, from about 500 nm to about 10,000 nm, such as from about 1,000 nm to about 7,000 nm in one embodiment, or from about 1,500 nm to about 4,000 nm in another embodiment.

[0020]

[0029] The absorber layer 160 may include a p-type semiconductor material having an excess of positive charge carriers, i.e., holes or acceptors. The absorber layer 160 may include a p-type semiconductor material, such as, for example, II-VI semiconductors, such as cadmium and tellurium. Further examples include, but are not limited to, semiconductor materials including cadmium, zinc, tellurium, selenium, or any combination thereof. In some embodiments, the absorber layer 160 may include a ternary compound of cadmium, selenium, and tellurium (e.g., CdSe x Te 1-x ), or compounds containing cadmium, selenium, tellurium, and one or more additional elements (e.g., Cd y Zinc 1-y Se x Te 1-x ). The absorber layer 160 may further include one or more dopants. The photovoltaic devices 100 provided herein may include multiple absorber materials.

[0021]

[0030] Alternatively, in some embodiments, the absorber layer 160 may comprise an n-type semiconductor material having an excess of negative charge carriers, i.e., electrons or donors. The absorber layer 160 may comprise an n-type semiconductor material comprising a II-VI semiconductor, e.g., cadmium and selenium. In some embodiments, the absorber layer 160 is n-type cadmium selenide; in some embodiments, the absorber layer is a ternary compound of cadmium, selenium, and tellurium, e.g., CdSe x Te 1-x where x is greater than 0.5, or compounds containing cadmium, selenium, tellurium, and one or more additional elements.

[0022]

[0031] In embodiments in which the absorber layer 160 is p-type and includes tellurium and cadmium, the average atomic percentage of tellurium in the absorber layer 160 may be greater than or equal to about 25 atomic percent and less than or equal to about 50 atomic percent, such as, for example, greater than about 30 atomic percent and less than about 50 atomic percent in one embodiment, greater than about 40 atomic percent and less than about 50 atomic percent in a further embodiment, or greater than about 47 atomic percent and less than about 50 atomic percent in yet another embodiment. Alternatively or additionally, the average atomic percentage of tellurium in the absorber layer 160 may be greater than about 45 atomic percent, such as, for example, greater than about 49% in one embodiment. It should be noted that the average atomic percentages described herein are representative of the entire absorber layer 160, and that the atomic percentage of material at a particular location within the absorber layer 160 may be graded through the thickness as compared to the overall composition of the absorber layer 160. For example, the absorber layer 160 may have a graded composition.

[0023]

[0032] In embodiments in which absorber layer 160 is p-type and includes selenium and tellurium, the average atomic percent of selenium in absorber layer 160 can be greater than 0 atomic percent and less than or equal to about 25 atomic percent, such as, for example, greater than about 1 atomic percent and less than about 20 atomic percent in one embodiment, greater than about 1 atomic percent and less than about 15 atomic percent in another embodiment, or greater than about 1 atomic percent and less than about 8 atomic percent in a further embodiment. It is noted that the concentration of tellurium, selenium, or both can be graded through the thickness of absorber layer 160. For example, if absorber layer 160 is a compound including a mole fraction of x selenium and a mole fraction of 1-x tellurium (Se x Te 1-x ), x can vary in the absorber layer 160 with distance from the first surface 162 of the absorber layer 160. x Te 1-x In an exemplary absorber layer comprising CdSe, the mole fraction of selenium may be such that x is greater than 0 and less than 0.40; in some embodiments, x is less than 0.30. x Te 1-x and the average value of x in the absorber layer is less than 0.16.

[0024]

[0033] With further reference to FIG. 2, the absorber layer 160 can be doped with a dopant configured to manipulate the charge carrier concentration. In some embodiments, the absorber layer 160 can be doped p-type with a group V dopant, such as, for example, arsenic, phosphorous, antimony, or a combination thereof. Alternatively or additionally, the absorber layer 160 can be doped with a group IB dopant, such as, for example, copper, silver, gold, or a combination thereof. The total density of dopants in the absorber layer 160 can be controlled. Moreover, the amount of dopant can vary with distance from the first surface 162 of the absorber layer 160.

[0025]

[0034] A pn junction can be formed by an absorber layer and a layer having an opposite charge type. In a device with a p-type absorber layer, a pn junction can be formed by providing an absorber layer 160 in sufficient proximity to a portion of the photovoltaic device 100 having an excess of negative charge carriers, i.e., electrons or donors. For example, a p-type absorber layer may be provided on top of an n-type TCO layer 140, optionally with an intervening buffer layer 150. In some embodiments, the absorber layer 160 can be provided adjacent to an n-type semiconductor material. Alternatively, one or more intervening layers can be provided between the absorber layer 160 and the n-type semiconductor material. In some embodiments, the absorber layer 160 can be provided adjacent to the buffer layer 150. For example, a first surface 162 of the absorber layer 160 can be provided on top of a second surface 154 of the buffer layer 150. In some embodiments, the absorber layer 160 can be provided adjacent to an n-type contact layer 140. For example, the first surface 162 of the absorber layer 160 may be provided on the second surface 144 of the n-type contact layer 140 .

[0026]

[0035] As shown in Figures 3A-3B, the photovoltaic device 100 can include an improved carrier extraction (ICE) layer 170 between the absorber layer 160 and the conductive layer 190. In the structure shown in Figure 3A, the improved carrier extraction (ICE) layer 170 can be disposed between the absorber layer 160 and the p-type contact layer 180. The ICE layer 170 can have a first surface 172 that faces substantially toward the front side 102 of the photovoltaic device 100 and a second surface 174 that faces substantially toward the back 104 of the photovoltaic device 100. The ICE layer 170 can be provided between the p-type contact layer 180 and the absorber layer 160. In some embodiments, the ICE layer 170 can be provided directly adjacent to one or both of the p-type contact layer 180 and the absorber layer 160. For example, as shown in Figures 2 and 3A, a first surface 172 of the ICE layer 170 can be provided on the second surface 164 of the absorber layer 160, and a second surface 174 of the ICE layer 170 can be adjacent to a first surface 182 of the p-type contact layer 180.

[0027]

[0036] As shown in FIG. 3B, in an alternative structure, the device may include a first p-type contact layer 180a between the absorber layer 160 and the ICE layer 170; alternatively or in addition, the device may include a second p-type contact layer 180b between the ICE layer 170 and the conductive layer 190.

[0028]

[0037] A thickness of ICE layer 170 can be defined between first surface 172 and second surface 174. The thickness of ICE layer 170 can be greater than about 0.2 nm, such as, for example, 0.25 nm or more, 0.3 nm or more, 0.4 nm or more, 0.5 nm or more, 0.8 nm or more, 1.0 nm or more, 2.0 nm or more, or 4.0 nm or more. The thickness of the ICE layer can be less than about 30 nm, such as, for example, 25.0 nm or less, 20.0 nm or less, 15.0 nm or less, 10.0 nm or less, 5.0 nm or less, or 4.0 nm or less. In one example, the thickness of the ICE layer is between 0.3 nm and 6.0 nm. In another example, the thickness of the ICE layer is between about 0.4 nm and about 25 nm, or between about 0.5 nm and about 15 nm, in one embodiment. In some embodiments, the thickness of ICE layer 170 can be between about 0.2 nm and about 20 nm, such as, for example, between about 0.2 nm and about 5.0 nm, in one embodiment.

[0029]

[0038] The ICE layer 170 may be formed from molecules of one or more organosulfur compounds. The ICE layer includes thiol-based molecules or thiol derivatives, such as thiol alkanes or thiophenes. Thiol-based molecules can include, for example, one or more of cysteamine, also known as 2-aminoethanethiol (AET); 4-fluorothiophenol (4-FTP); 4-aminothiophenol (4-ATP); 1,2-ethanedithiol, also known as ethylene mercaptan (EDT); L-cysteine, also known as (R)-2-amino-3-mercaptopropionic acid (L-Cys); thioglycolic acid, also known as mercaptoacetic acid (TGA); 1-octanethiol (OT); 4-fluorobenzyl mercaptan, also known as (4-fluorophenyl)methanethiol (4-FMB); 3,3,4,4,5,5,6,6,7,7,8,8,8-tridecafluoro-1-octanethiol (TDF-OT); 4-trifluoromethylbenzyl mercaptan (4-TFMBM). The ICE layer may be comprised of thiol-based molecules that include reaction products or tautomers of one or more other molecules, including, for example, isothioureas from the tautomerization of thioureas. The ICE layer may be comprised of thiol-based molecules generated from salt forms, including, for example, sodium thiophenolate or sodium thioglycolate.

[0030]

[0039] The photovoltaic device 100 can include a p-type contact layer 180 configured to provide an electrical contact to the absorber layer 160. The p-type contact layer 180 can have a first surface 182 that faces substantially toward the energy side 102 of the photovoltaic device 100, and a second surface 184 that faces substantially toward the opposite side 104 of the photovoltaic device 100. The p-type contact layer 180 can be a back contact layer having the first surface 182 that faces substantially toward the absorber layer 160. A thickness of the p-type contact layer 180 can be defined between the first surface 182 and the second surface 184. The thickness of the p-type contact layer 180 can be less than about 500 nm, such as, for example, from about 0.5 nm to about 100 nm in one embodiment, or from about 5 nm to about 50 nm in another embodiment. In some embodiments, the thickness of the p-type contact layer 180 can be from about 5 nm to about 200 nm, such as, for example, from about 10 nm to about 50 nm in one embodiment.

[0031]

[0040] In some embodiments, the p-type contact layers 180, 180a, 180b are one or more layers that include polymers, small molecules, or inorganic compounds. These materials can be doped to modify their electrical and optical properties.

[0032]

[0041] In some embodiments, the p-type contact layer comprises an inorganic compound including one or more metals, oxides, or nitrides. In some embodiments, the p-type contact layer comprises nickel oxide (NiO x ), cuprous thiocyanate (CuSCN), copper iodide (CuI), or copper oxide (CuO).

[0033]

[0042] In some embodiments, the p-type contact layer may be poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine] (PTAA), poly(9,9-dioctylfluorene-alt-N-(4-sec-butylphenyl)-diphenylamine (TFB), poly[(9,9-dioctylfluorenyl-2,7-diyl)-co-(4,4'-(N-(2,4-dimethylphenyl))diphenylamine)] (PF8-TAA), poly[[(2,4-dimethylphenyl)imino]-1,4-phenylene (6 ,12-dihydro6,6,12,12-tetraoctylindeno[1,2-b]fluorene-2,8-diyl)-1,4-phenylene (PIF8-TAA), poly(3-hexylthiophene-2,5-diyl) (P3HT), poly(N,N'-bis-4-butylphenyl-N,N'-bisphenyl)benzidine (PolyTPD), polythiophene, or poly(3,4-ethylenedioxythiophene)-poly(styrenesulfonate) (PEDOT:PSS).

[0034]

[0043] In some embodiments, the p-type contact layer is selected from the group consisting of N2,N2,N2',N2',N7,N7,N7',N7'-octakis(4-methoxyphenyl)-9,9'-spirobi[9H-fluorene]-2,2',7,7'-tetraamine (Spiro-OMeTAD), N2,N2,N2',N2',N7,N7,N7',N7'-octakis(4-methoxyphenyl)-10-phenyl-10H-spiro[acridine-9,9'-fluorene]-2,2',7,7'-tetraamine (SAF-OMe), N and a small molecule selected from N,N',dialkylperylene diimide (PDI), 4,4'-bis(N-carbazolyl)-1,1'-biphenyl (CBP), tris(4-carbazolyl-9-ylphenyl)amine (TCTA), 1,3,5-tris(carbazol-9-yl)benzene (TCP), tris{N,N-bis(4-methoxyphenyl)-N-phenyl}aminequinolidinoarsidine (OMeTPA-FA), SGT-407, fused-F, or tetrathiafulvalene (TTF-1). In some embodiments, the p-type contact layer comprises a material selected from α-NPD, 6,13-bis(triisopropylsilylethynyl)pentacene (TIPS-pentacene), poly[2,6-(4,4-bis-(2-ethylhexyl)-4H-cyclopenta[2,1-b;3,4-b']dithiophene)-alt-4,7(2,1,3-benzothiadiazole] (PCPDTBT), poly[N-9'-heptadecanyl-2,7-carbazole-alt-5,5-(4',7'-di-2-thienyl-2',1',3'-benzothiadiazole)] (PCDTBT), graphene oxide, and quinolidinoacridine.

[0035]

[0044] The composition of the p-type contact layer may be doped. For example, p-type dopants for small molecule compositions may include, but are not limited to, 2,3,5,6-tetrafluoro-7,7,8,8-tetracyanoquinodimethane (F4-TCNQ), transition metal oxides such as molybdenum trioxide (MoO3), vanadium pentoxide (VO5) or tungsten trioxide (WO3), and molybdenum tris[1,2-bis(trifluoromethyl-)ethane-1,2-dithiolene] (Mo(tfd)3).

[0036]

[0045] The thin film junction 176 may be defined as the thin film stack that primarily contributes to the photovoltaic effect. For example, in some embodiments, as shown in Figure 2, the thin film junction 176 may include n-type contact layer 140, buffer layer 150, absorber layer 160, improved carrier extraction (ICE) layer 170, and p-type contact layer 180. Figures 3A-3B show the thin film junction 176 including layers between and including n-type contact layer 140 and p-type contact layer 180.

[0037]

[0046] The photovoltaic element 100 may include a conductive layer 190 configured to provide electrical contact with the absorber layer 160. The conductive layer 190 may have a first surface 192 that faces substantially toward the energy side 102 of the photovoltaic element 100 and a second surface 194 that faces substantially toward the opposite side 104 of the photovoltaic element 100. In some embodiments, the conductive layer 190 may be provided adjacent to the p-type contact layer 180. For example, the first surface 192 of the conductive layer 190 may be provided on the second surface 184 of the p-type contact layer 180. The conductive layer 190 may include a conductive material such as, for example, one or more layers of a metal, an oxide, an oxynitride, a nitride, a nitrogen-containing metal, silver, nickel, copper, aluminum, titanium, palladium, chromium, molybdenum, gold, or the like. Examples of nitrogen-containing metal layers include nitrogen-doped zinc telluride, nitrogen-doped cadmium zinc telluride, nitrogen-doped zinc oxide, molybdenum nitride, molybdenum oxynitride, aluminum nitride, nickel nitride, titanium nitride, tungsten nitride, selenium nitride, tantalum nitride, or vanadium nitride. The conductive material may include one or more metal elements. The conductive material may include metal alloys, nitrides, oxides, and / or oxynitrides. The conductive material may have sublayers of different compositions.

[0038]

[0047] The photovoltaic element 100 may include a back support 196 configured to cooperate with the substrate 110 to form a housing for the photovoltaic element 100. The back support 196 may be disposed on the opposite side 102 of the photovoltaic element 100. For example, the back support 196 may be formed adjacent to the conductive layer 190. The back support 196 may include, for example, glass, a polymer sheet, borosilicate glass, float glass, soda lime glass, carbon fiber, or polycarbonate.

[0039]

[0048] 1-3 collectively, the substrate stack 113 of the photovoltaic element 100 is disposed on the front surface 102 facing the light, opposite the back surface 104. The layers comprising the substrate stack 113 are substantially transparent. An absorber layer is provided above the substrate stack 113 to form an absorber stack 115.

[0040]

[0049] In some embodiments, the partially formed element including the layer stack 115 may be subjected to one or more surface treatments to modify a surface region 364 of the absorber layer 160 at the back interface. The surface region 364 of the absorber layer may include a portion of the absorber layer 160 at the second surface 164 and extend into the thickness of the absorber layer 160. In one embodiment, the surface region 364 includes the top surface of the absorber stack 115 and extends into the absorber layer 160 to a depth of about 10 nm, about 5 nm, or in the range of 0.2 nm to 15 nm. In one embodiment, the surface region 364 is passivated by a treatment. In one embodiment, the surface region 364 is a Cd-rich layer. In one embodiment, the surface region 364 includes cadmium and tellurium, and the ratio of Cd to Te in the surface region 364 is in the range of 1:1 to 4:1.

[0041]

[0050] In some embodiments, the partially formed device including the layer stack 115 may be subjected to one or more surface treatments to modify a surface region 384 of the first p-type contact layer 180a at the back interface. The surface region 384 of the first p-type contact layer may include a portion of the first p-type contact layer 180a at the second surface 184 and extend into the thickness of the p-type contact layer 180a. In one embodiment, the surface region 384 includes the upper surface of the absorber stack 115 and extends into the first p-type contact layer 180a to a depth in the range of 0.01% to 10.0% of the thickness of the first p-type contact layer 180a. In one embodiment, the surface region 384 is passivated by a treatment.

[0042]

[0051] Photovoltaic device 100 can include multiple layers, and where layers are not specifically shown adjacent, the photovoltaic device may include intervening layers not depicted. The layers can include one or more functional layers of material, and a single layer may have a compositional gradient therein. Ready-to-deploy devices may further include electrical connections, encapsulation, and other functions.

[0043]

[0052] A photovoltaic device may contain several layers of materials deposited in sequence above a substrate. The steps for manufacturing a photovoltaic device may include sequentially arranging functional layers or layer precursors in a "stack" of layers through one or more deposition processes, including, but not limited to, spin coating, thermal spraying, slot coating, blade coating, dip coating, sputtering, evaporation, molecular beam deposition, pyrolysis, confined sublimation (CSS), pulsed laser deposition (PLD), chemical vapor deposition (CVD), electrochemical vapor deposition (ECD), atomic layer deposition (ALD), or vapor transport deposition (VTD). The as-deposited layer or layer stack may be treated to modify properties using one or more methods, for example, by annealing, passivation, heating, vapor contact, or chemical treatment. The manufacturing of a photovoltaic device may further include selectively removing a portion of a certain layer of the stack of layers, such as by scribing, to divide the photovoltaic device into multiple photovoltaic cells.

[0044]

[0053] Surface treatment of the top surface of the absorber stack prior to forming the improved carrier extraction layer can include passivation. For example, chemical passivation can be applied to the back surface of the absorber layer prior to forming the p-type back contact. For CdTe-based absorber materials, including doped ternary and quaternary alloys with equal amounts of cadmium and tellurium, an alkaline treatment can produce a Cd-rich surface. The improved carrier extraction layer can be formed above and in direct contact with the Cd-rich back surface to form the absorber interface, and a p-type contact layer can be formed above and in direct contact with the improved carrier extraction layer. The described structure can beneficially provide a reduction in surface recombination velocity at the absorber interface. However, this benefit can be negated by high temperature formation of a p-type back contact layer, such as depositing a nitrogen-doped zinc telluride layer by vapor transport deposition above the passivated surface of the absorber layer.

[0045]

[0054] In some embodiments, maintaining high temperatures may reduce the benefits of the passivation step, damage the improved carrier extraction layer, or damage other layers of the partially formed device layer stack. To maintain the integrity of the absorber passivation and layer stack, processing steps following passivation of the absorber surface may be selected to avoid or limit exposure of the intermediate structure comprising the absorber layer above the substrate stack to high temperatures or other conditions that may cause damage. Many p-type contact materials, including most organic polymer hole transport materials, are susceptible to damage from heat, moisture, corrosive solutions, and some solvents. Due to these limitations, many processes used with other photovoltaic devices or for previously deposited layers may not be suitable for processing steps following the formation of the absorber layer Cd enrichment step and improved carrier extraction layer.

[0046]

[0055] In some embodiments, depositing the layer using a low temperature method is performed by at least one of thermal evaporation, spray pyrolysis, confined sublimation (CSS), chemical vapor deposition (CVD), atomic layer deposition (ALD), spin coating, thermal spraying, slot-die coating, blade coating, roll coating, dip coating, inkjet printing, or sol-gel coating. In some embodiments, depositing the layer using a low temperature method is performed at a substrate temperature of 150° C. or less, 120° C. or less, or 100° C. or less to avoid excessive heating of the substrate layer stack during the deposition process.

[0047]

[0056] The absorber surface may be passivated by an alkaline chemical surface cleaning, which may further provide surface cleaning, surface organic contaminant removal, and oxide removal. The term "cleaning" or "cleaning" includes subjecting, exposing, or contacting a cleaning fluid to a surface, such as the back surface of the absorber layer. As non-limiting examples, the surface may be at least partially submerged in the bath by immersion in the cleaning fluid, or the cleaning fluid may be applied to the substrate by spraying, coating, painting, flowing, or other methods to contact at least a portion of the surface with the bath. Additionally, the surface of the partially formed element may be subjected to surface cleaning or passivation in a continuous process, such as by a conveyor that continuously transports the substrate in and out of the cleaning fluid, or in a batch process.

[0048]

[0057] 4, the ICE layer 170 includes a plurality of molecules 400. Each molecule 400 has a head group 410, a body 420, and may further include a functional end group 430. The head group 410 includes a thiol or thiol derivative having a sulfur atom (SH) bonded to a hydrogen. The body 420, or R-group, includes an organic moiety covalently bonded to the head group 410. The functional end group 430, or tail, includes a functional group that may be represented as X, and the end group 430 is covalently bonded to the body 420. Thus, the structure of the thiol-based molecules for forming the ICE layer 170 may be represented as having the structure XR-SH.

[0049]

[0058] The molecules 400 may have a strong molecular dipole. The molecules may be oriented with the head groups 410 pointing towards the absorber stack 115 relative to the substrate. In some embodiments, the oriented molecules form a substantially contiguous self-assembled monolayer (SAM). The head groups 410 may be deprotonated and the sulfur of the head groups 410 may bond with Cd atoms at the absorber back surface 164. The structure, composition and steric properties of the body 420 may adjust the packing density of the molecules 400 forming the ICE layer and tune the charge transport. The structure and composition of the end groups 430 may modify the dipole moment of the molecules forming the ICE layer 170 and tune the surface work function of the absorber / ICE layer stack. In some embodiments, the thiol-based molecules may have a molecular weight in the range of 50-400 Daltons or in the range of 100-200 Daltons.

[0050]

[0059] 4 shows a simplified depiction of the formation of an exemplary ICE layer 170 on the absorber stack 115. An unbound, isolated molecule 400 in solution contacts the absorber stack 115 at the absorber back surface 164. The thiol moiety of the head group 410 orients toward the absorber back surface 164. Moving from left to right in FIG. 4, additional molecules 400 aggregate into a substantially ordered layer, forming the ICE layer 170 on the absorber stack 115.

[0051]

[0060] The thiol composition may include X groups 430 that increase the polarity of the molecule and the resulting dipole moment. These include electron-withdrawing groups, such as X groups that include fluorine atoms, creating a dipole direction from the X group to the thiol head group, from a negative charge to a positive charge. They also include electron-donating groups, such as X groups that include amines, creating a dipole direction from the thiol head group to the X group, from a negative charge to a positive charge. In some embodiments, the dipole moment obtained through the thiol molecule is greater than 0.5 Debye. In some embodiments, the thiol composition includes R groups 420 that consist of alkane chains or phenolic groups. In some embodiments, the thiol composition includes R groups that are small enough that they do not sterically restrict binding to adjacent Cd sites, promoting dense molecular packing and binding to a majority of the available Cd sites. In some embodiments, the ICE layer increases the surface work function by up to 450 meV compared to the value without the ICE layer. In some embodiments, the ICE layer decreases the surface work function by up to 150 meV compared to the value without the ICE layer. In some embodiments, this produces a surface work function as high as 5.15 eV or as low as 4.55 eV. In some embodiments, the ICE layer consists essentially of a single molecular monolayer of a thiol compound.

[0052]

[0061] The ICE layer can be formed on the passivated surface of the absorber layer stack 115. The absorber layer stack 115 can have a Cd-rich layer at the surface region 364. The ICE layer 170 can include a plurality of molecules, the molecules being dipolar and including an organosulfur compound. The ICE layer 170 can be between and directly contact both the absorber layer 160 and the p-type contact layer 180. The p-type contact layer 180 can include a polymer, a small molecule, or an inorganic compound. Without being bound by theory, applicants have discovered that providing these materials as described can produce improved electrical properties when the ICE layer is formed in contact with a II-VI semiconductor alloy containing cadmium (Cd). It is further believed that the combination of materials selected can provide a robust structure that is resistant to breakdown.

[0053]

[0062] It has been discovered that thiol-based compounds can be combined with CdTe-based absorbers and other II-VI alloys, as well as with organic and small molecule p-type contact materials, to form improved carrier extraction layers and demonstrate superior combinations of optical and electrical properties compared to conventional back contact materials. It has further been discovered that selected compositions capable of enhancing p-type carrier collection are also suitable for use in manufacturing processes.

[0054]

[0063] Figure 5 shows a simplified energy level diagram illustrating the change in surface work function produced by including AET or 4-FTP as an improved carrier extraction layer between the CdSeTe alloy absorber layer and the PTAAp contact layer. The Fermi energy (E F The energy difference between the valence band offset (VBO) and the vacuum level corresponds to the work function (Φ). As shown by the dashed line, the electron-donating X-tail of AET reduces the surface work function of CdSeTe, giving a more positive valence band offset with PTAA compared to the absence of the ICE layer. As shown by the dotted line, the electron-withdrawing X-tail of 4-FTP increases the surface work function of CdSeTe, giving a more negative valence band offset with PTAA compared to the absence of the ICE layer. As observed in this figure, the dipole of 4-FTP creates a smaller or more negative valence band offset (VBO) compared to AET, improving hole transport.

[0055]

[0064] 6A and 6B show energy band diagrams for p-type CdTe. Figures 6A and 6B show band diagrams for an absorber layer including p-type CdTe material, before FIG. 6A, and after FIG. 6B, an EDT layer is applied to the absorber, demonstrating the effect of chemical passivation. Electronic energy states (bands) in the material can bend up or down near the junction. This band bending (Ebb) can be seen in the valence band (VB) and conduction band (CB) in each band diagram, with the vacuum level (Evac) and work function (Wf) also shown. Fermi level pinning can create an energy barrier to the flow of electrons and holes, reducing efficiency. Comparing FIG. 6B with FIG. 6A shows that chemical passivation from Cd-S bonds at the surface reduces Fermi level pinning and improves band bending. This also affects the work function, which increases after the EDT layer is applied.

[0056]

[0065] 7A and 7B show energy band diagrams for p-type CdTe. FIG. 7A corresponds to a structure with an AET layer. FIG. 7B corresponds to a structure with a 4-FTP layer. FIG. 7A and FIG. 7B show that the work function shifts in opposite directions due to the difference in surface dipoles in charge. FIG. 7A and FIG. 7B show band diagrams for absorber layers with p-CdTe materials, AET material in FIG. 7A, or 4-FTP material in FIG. 7B. The work function of the surface can be directly proportional to the change in dipole caused by the absorption of the ICE layer. As observed in FIG. 7A and 7B, the dipole moment caused by the 4-FTP material in FIG. 7B increases the work function when compared to the dipole moment caused by the AET material in FIG. 7A.

[0057]

[0066] Changing the material of the ICE layer and altering the positive or negative orientation of the dipoles results in a shift in the work function, either higher or lower, resulting in a shift in the valence band offset (VBO).

[0058]

[0067] 8A-B and 9, devices having selected compounds for the ICE layer were fabricated and tested. Materials tested for the ICE layer included 2-aminoethanethiol (AET); L-cysteine ​​(L-Cys); thioglycolic acid (TGA); 1-octanethiol (OT); 4-fluorothiophenol (4-FTP); 4-fluorobenzyl mercaptan (4-FMB); 3,3,4,4,5,5,6,6,7,7,8,8,8-tridecafluoro-1-octanethiol (TDF-OT); 4-trifluoromethylbenzyl mercaptan (4-TFMBM); and 1,2-ethanedithiol (EDT).

[0059]

[0068] Figures 8A and 8B show graphs of photoluminescence (PL) intensity in counts per second (cts / s) and wavelength at different stages for the film side of the absorber layer in Figure 8A and the solar side in Figure 8B. The stages include a first stage before potassium hydroxide (KOH) treatment, a second stage after the KOH treatment is applied to the absorber layer, and a third stage where an ICE layer is applied to the absorber layer.

[0060]

[0069] Photoluminescence (PL) can indicate the quality of the active layer of a solar cell. PL measurements on the film side or back are a more direct measure of the passivation quality of the back surface. The PL on the solar or front side is a better indication of the overall minority carrier lifetime in the device, is less sensitive to the back surface treatment, and is more sensitive to the bulk quality. The improvement in PL shown in Figures 8A-8B is mostly related to chemical passivation at the absorber-back interface and does not depend on the presence or orientation of a dipole moment. The Cd-S bonds reduce the number of dangling Cd bonds at the surface and provide chemical passivation. The observed increase in PL on both the front and back sides after treatment of the Cd-rich back surface and after formation of the ICE layer indicates that this treatment significantly reduces the non-radiative recombination of photogenerated carriers, indicating its impact on the Voc of the solar cell. As can be observed in Figure 8A, the devices using AET, EDT and 4-FTP all show at least an order of magnitude increase in PL on the film side. The doubling of PL corresponds to a 20 mV increase in open circuit voltage (Voc). PL from the ICE layer and KOH surface treatment is also evident in PL measurements of the solar surface.

[0061]

[0070] The backside PL measurement is a more direct measure of the backside passivation quality. The frontside PL is a better indication of the overall minority carrier lifetime in the device and is therefore less sensitive to the backside treatment and more sensitive to the bulk and front interface quality. The observed increase in both the frontside and backside PL after the Cd-rich backside treatment and after the formation of the ICE layer indicates that this treatment significantly reduces the non-radiative recombination of photogenerated carriers diffusing from the frontside, indicating a positive impact on the Voc of the solar cell.

[0062]

[0071] FIG. 9 shows a graph comparing the surface work function (Wf) measured by oscillating Kelvin probe measurement of the contact potential difference (CPD) of the absorber layer at different stages. The stages include a first stage where the absorber layer has a liquid photoresist (NPR) and KOH treatment; a second stage where the absorber layer also includes an ICE layer; and a third stage where the absorber layer further includes a poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine (PTAA) layer. The Kelvin probe technique is used to determine the CPD, which can be related to the work function of the absorber layer at different stages. The CPD can be defined as the potential difference between a point close to the surface of the absorber layer at different stages and a point close to the surface of the Kelvin probe. The CPD can be calculated using the formula

[0063]

number

[0064] It can be further related to the work function by, where "VCPD" is the CPD, "Φsample" is the work function of the sample (the absorber layer at different stages), "Φprobe" is the work function of the probe, and "e" is the elementary charge.

[0065]

[0072] As shown in Figure 9, different materials for the ICE layer directly affect the tunability of the surface work function, which can be directly related to the work function. Notably, it can be observed that three materials, 4-FBM, TDF-OT, and 4-TFMBM, have stronger dipoles than 4-FTP. The surface work function can be directly proportional to the change in dipole brought about by the ICE layer. Experimental data shows that OT and 4-FTP have dipole polarity that shifts the band alignment with PTAA, improving the carrier selectivity of the PTAA contact. This improves the conductivity of holes while promoting the reflection of electrons.

[0066]

[0073] The comparative performance characteristics shown in Figures 6-8 and the comparative test results indicate that the tested structures were effective. Good efficiency, stabilized absorber surface passivation, improved fill factor (FF), low charge carrier recombination, low shunting, and good carrier concentration levels were observed. The metrics show that the tested structures performed as well as or better than the control in multiple parameters.

[0067]

[0074] 10A to 10E show the efficiency, open circuit voltage (V OC ), fill factor (FF), open circuit resistance (R OC ), and short circuit current density (J SC ) are shown. In this series of measurements, an example device was prepared in which an absorber layer containing cadmium and tellurium was passivated with alkali, followed by application of 4-FTP as an interfacial carrier enhancement layer and PTAA as a p-contact layer. The example and comparative devices were treated by contacting a second surface of the absorber with an alkaline passivator. In one series of comparative devices (left column), a back contact was applied directly above the absorber layer. In another series of comparative devices (middle column), a p-contact layer containing PTAA was applied directly above the absorber layer, and a back contact was applied directly above the PTAA. In an example device (right column), an ICE layer containing 4-FTP was applied directly above the absorber layer, a p-contact layer containing PTAA was applied directly above the ICE layer, and a back contact was applied directly above the PTAA. The results show superior performance of the experimental devices in efficiency, open circuit voltage, and fill factor. The experimental devices showed comparable performance in short circuit current density. The data show that the experimental devices improve hole transport and maintain or enhance absorber layer passivation.

[0068]

[0075] Without wishing to be bound by theory, the ICE layer can consist essentially of a self-assembled monolayer with sulfur atoms of a thiol-based compound that bind to cadmium on the absorber surface. Through effective passivation and / or depinning the surface Fermi level by providing additional fields through built-in dipoles, the ICE layer can tune the band alignment between layers, such as between the absorber and the p-contact. The p-contact layer can include a hole transport material (HTM), such as an organic, inorganic, or small molecule composition.

[0069]

[0076] Hole transport materials (HTM) have high hole mobility and low electron affinity. Thus, when minority carriers (electrons) reach the back contact interface, the HTM blocks their transport through the p-type contact, minimizing interfacial recombination, while allowing easy transport of majority carriers (holes). The p-type contact layer can be deposited at low temperatures to prevent damage to the ICE layer and to maintain the chemically passivated state of the absorber surface. The p-type contact layer can be deposited on the ICE layer, which can be formed on a cadmium-rich or stoichiometric CdTe-containing surface, which can be prepared by treating the as-grown CdTe polycrystalline film with one or more basic solutions, such as potassium hydroxide or tetramethylammonium hydroxide.

[0070]

[0077] The p-type contact layer, which can be formed above the ICE layer, has a large conduction band offset with CdTe to block electrons from recombining at the metal contact, and a small valence band offset to allow efficient hole transport. Since the diffusion length of the photogenerated minority carriers becomes comparable to the absorber film thickness, the value of the recombination rate at the back contact surface can contribute significantly to the overall device recombination current. Furthermore, for bifacial solar cell designs, the reduction in the recombination at the back contact surface has a strong impact on the open circuit voltage and the potential for efficiency improvement from back side illumination. The reduction in the back contact recombination rate can enable photovoltaic devices with improved minority carrier lifetimes and higher open circuit voltages (Voc).

[0071]

[0078] In an exemplary method, the device is prepared. TCO on glass can serve as the front electrode. The absorber can be deposited directly on the TCO layer, or on a buffer layer or on a transparent layer above the TCO layer to form an absorber stack. The absorber material may include sublayers of CdTe and other alloys of II-VI semiconductors, such as cadmium telluride, cadmium zinc telluride, cadmium selenide, and / or cadmium selenide telluride with zinc telluride. The absorber can be doped. A surface treatment can be performed on the absorber surface. This treatment may include doping, passivating the surface with a cadmium chloride heat treatment, cleaning the surface with an acid or base, and / or removing oxides. In an exemplary process, the absorber stack may be subjected to a chloride heat treatment followed by a potassium hydroxide (KOH) alkaline clean to form a passivated surface at the back surface region of the absorber stack and a Cd-rich back interface of the absorber. A thiol-based molecular material may then be contiguous and deposited over the treated surface of the absorber layer to form an enhanced carrier extraction (ICE) layer, and a p-type contact material may then be contiguous and deposited over the ICE layer.

[0072]

[0079] To passivate the absorber surface in preparation for forming an ICE layer, it may be desirable to reduce surface Te dangling bonds and adjust the surface stoichiometry to a desired ratio, which may involve alkaline etching or passivation with a cleaning fluid. In one example, a method for adjusting the surface stoichiometry of the II-VI semiconductor material includes adjusting the concentration of the cleaning fluid to achieve the desired stoichiometry at the surface of the semiconductor material and subjecting the semiconductor material to a passivation clean with the cleaning fluid. The pH of the cleaning fluid can be adjusted to modify the surface ratio of Cd to Te in an absorber stack that includes an absorber layer that includes an II-VI semiconductor material alloy that includes cadmium and tellurium. An alkaline clean with a pH level of about 8-14 can be used to modify, for example, a substantially stoichiometric CdTe surface to have a Cd-rich surface. In some embodiments, the pH level of the cleaning fluid is 11-13. Cleaning passivation can be used to optimize the surface chemistry and electronic properties of the back contact.

[0073]

[0080] In some embodiments, the cleaning fluid comprises a hydroxide. In some embodiments, the cleaning fluid comprises an aqueous solution of tetramethylammonium hydroxide ((CH3)4N(OH)), also known as sodium hydroxide (NaOH), potassium hydroxide (KOH), or TMAH. In some embodiments, the cleaning fluid comprises KOH. In some embodiments, the cleaning fluid comprises KOH at a concentration ranging from about 0.001M to about 11.67M, ranging from 0.500M to 4.000M, ranging from 1.500M to 2.750M, or ranging from 1.750M to 2.000M. In some embodiments, the cleaning fluid comprises 1.50 to 2.00M KOH. In some embodiments, the cleaning fluid contacts the surface for a contact time ranging from 10 seconds to 90 minutes. In some embodiments, the contact time is in the range of 30 seconds to 30 minutes, or in the range of 30 seconds to 10 minutes. In some embodiments, the contact time is 1 minute. In some embodiments, the temperature of the cleaning fluid is in the range of 0°C to 90°C. In some embodiments, the temperature of the cleaning fluid is in the range of 20° C. to 30° C. In some embodiments, the temperature of the cleaning fluid is in the range of 5° C. to 50° C., or in the range of 15° C. to 35° C. In some embodiments, after contact with the KOH, the absorbent surface is rinsed with water.

[0074]

[0081] In some embodiments, the ratio of Cd to Te in the Cd-rich surface region of the absorber layer is in the range of 1:1 to 4:1. In some embodiments, the ratio of Cd to Te in the Cd-rich surface region of the absorber layer is greater than 1:1. In some embodiments, the ratio of Cd to Te in the Cd-rich surface of the absorber layer is 1.3:1 to 2.5:1 as measured by XPS.

[0075]

[0082] An improved carrier extraction (ICE) layer is formed over the treated absorber stack, hi some embodiments, the ICE layer is formed in contact with the Cd-rich surface region of the absorber layer.

[0076]

[0083] In one example, the thiol-based molecular material is provided in a solution having a concentration of about 0.01M to 0.1M in ethanol, and the solution is contacted with the passivated back surface of the absorber stack for a time period ranging from 20 minutes to 36 hours. In some embodiments, the contact time ranges from 30 minutes to 180 minutes. In some embodiments, the sample is rinsed with ethanol to remove aggregates from the surface, placed in an ethanol ultrasonic bath for 1 to 20 minutes, and then dried with compressed air or nitrogen.

[0077]

[0084] The p-type contact material can be deposited directly on the ICE layer by a variety of methods including, for example, sputtering, spin coating, or evaporation. In one example, the p-type contact material includes PTAA. In one example, the structure of the thin film junction stack formed is TCO / CdSeTe / CdTe:As / 4-FTP / PTAA. The partially formed device stack may then be subjected to a heat treatment, for example, heating at 80-150° C. for 30-120 minutes. The post-deposition heat treatment of the p-type contact may be performed using a hot plate, a furnace, and / or a pressure-controlled heating chamber. A conductive material may then be applied above the p-type contact layer.

[0078]

[0085] In one example, nickel oxide (NiO x ) p-type contact layer is prepared. A NiO p-type absorber is prepared adjacent to an arsenic doped p-type absorber comprising a II-VI alloy containing cadmium, tellurium, and selenium. x A device is formed comprising a layer.

[0079]

[0086] Nickel oxide (NiO x NiO 2 -based layers have excellent chemical and thermal stability, facilitating fabrication by maintaining critical properties despite the high temperatures and chemical passivation steps that may be used in subsequent processing steps following their deposition. High temperatures or prolonged heating can adversely affect some layers or components of the device, but NiO 2 -based layers have excellent chemical and thermal stability, facilitating fabrication by maintaining critical properties despite the high temperatures and chemical passivation steps that may be used in subsequent processing steps following their deposition. x NiO is resistant to these same conditions. x Does not react with arsenic dopants. xNiO has excellent chemical stability, low optical absorption, and relatively high mobility compared to organic p-type charge carrier contact layers. x has a high conduction band edge and provides electron blocking. Undoped NiO x The p-type conductivity in is mostly due to nickel vacancies.

[0080]

[0087] NiO x can be deposited by many different methods. For example, NiO x Preparation of the layer can be accomplished by sputtering, pulsed laser deposition, or thermal decomposition of nickel salts such as chlorides, nitrates, or acetates. x The layers can be doped during deposition. In some embodiments, for the p-type contact layer, a NiO layer only a few nanometers thick is used. x It is beneficial to form a thin NiO film with high film quality. x Depositing layers is often difficult.

[0081]

[0088] In some embodiments, to prevent damage to the underlying layers of the layer stack or to maintain a chemically passivated state of the surface of the absorber layer, a low temperature method is used to deposit NiO x It is beneficial to form a p-type contact layer such as a NiO xAlthough nickel oxide layers can withstand high processing temperatures, they can also be formed without the use of high-temperature methods. In one example, the nickel oxide layer is formed using a sol-gel prepared from a precursor that includes a nickel compound, such as nickel bis(acetylacetonate) or nickel(acac)2. The nickel compound is dissolved in a solvent, such as 2-methoxyethanol (EGME) or methoxypropanol (PGME). A chelating base, such as triethanolamine (TEOA), is added to form a sol-gel mixture. Optionally, a dopant is added to the sol-gel mixture. The mixture is then sonicated to form a sol-gel. The sol-gel is coated onto the partially formed element. In one example, the sol-gel coating can be formed by dipping, roll coating, spraying, blade coating, or spin coating. The NiO is then removed by a heat treatment that is performed at a relatively low temperature or for a short period of time to limit heat exposure to the layer stack of the partially formed photovoltaic element. x The sol-gel coating may be cured.

[0082]

[0089] NiO x The thickness of the film can be varied in the range of about 2 to 100 nm by varying the concentration of the nickel oxide precursor. The nickel oxide precursor can be a nickel salt. In some embodiments, NiO x The precursor may be one or more of nickel chloride (NiCl2), nickel nitrate Ni(NO3)2, or nickel acetate Ni(CH3COO)2. In some embodiments, the chelating base is selected from triethanolamine, diethanolamine, ethanolamine, or Tris. In some embodiments, the dopant is selected from CuCl2, CuCl, CuI, CuSCN, LiCl, LiOAC, KCl, CsCl, CsI, MgCl2, or Mg(OAC)2. In some embodiments, the dopant may include one or more of Li, Cs, Cu, Mg, Sr, or rare earths such as Er, Tb, or Eu. In some embodiments, NiO is added to produce the desired thickness. xThe precursor sol-gel can be coated in a single or multiple coats. In some embodiments, the curing temperature can be between 40° C. and 400° C. and between 1 minute and 120 minutes. In some embodiments, the curing temperature is less than 350° C., less than 325° C., less than 250° C., or less than 200° C. In some embodiments, the curing temperature is in the range of 80° C. to 250° C. In some embodiments, the curing time is between 5 minutes and 60 minutes. In some embodiments, the curing time is between 1 minute and 30 minutes. In some embodiments, the curing time is less than 35 minutes, less than 25 minutes, or less than 15 minutes.

[0083]

[0090] In some embodiments, the absorber layer comprises an n-type material. In some embodiments, a pn junction is formed by the absorber n-type material and one or more p-type layers formed on the absorber stack. The one or more p-type layers formed on the absorber stack can include an ICE layer and a p-type contact layer. In some embodiments, the absorber n-type material consists essentially of doped or undoped cadmium selenide.

[0084]

[0091] In some embodiments, the photovoltaic device can include an enhanced carrier extraction (ICE) layer between the absorber layer and the conductive layer. The device can include a first p-type contact layer between the absorber layer and the ICE layer; alternatively or in addition, the device can include a second p-type contact layer between the ICE layer and the conductive layer. In some embodiments, the ICE layer can be provided directly adjacent to and in contact with one or both of the first p-type contact layer and the second p-type contact layer. Alternatively, one or both of the first p-type contact layer and the second p-type contact layer can be omitted, and in some embodiments, the ICE layer is directly adjacent to and in contact with one or both of the absorber layer and the conductive layer.

[0085]

[0092] In some embodiments, the p-type contact layer comprises one or more of an oxide, a nitride, or an oxynitride. In some embodiments, the p-type contact layer comprises one or more of zinc, tellurium, cadmium, or molybdenum. In one example, the composition of the p-type contact layer comprises nitrogen-doped zinc telluride, nitrogen-doped cadmium zinc telluride, nitrogen-doped zinc oxide, molybdenum nitride, or molybdenum oxynitride. In some embodiments, the p-type contact layer comprises an inorganic sublayer and an organic sublayer comprising a polymeric material or a small molecule material.

[0086]

[0093] In an exemplary device, the ICE layer is in contact between a first p-type contact layer and a p-type absorber; the absorber comprises cadmium, tellurium, and selenium; the first p-type contact layer comprises a polymeric material such as PTAA; the device includes a second p-type contact layer above the polymeric material, e.g., a layer comprising zinc telluride; and a conductive layer, e.g., molybdenum nitride, is provided above the second p-type contact layer.

[0087]

[0094] The ICE layer is provided or formed over and in contact with the underlying layer. The underlying layer may include a p-type contact layer and / or an absorber layer. In some embodiments, a non-adjacent p-type layer is formed over the absorber layer and the ICE layer is formed over the non-adjacent p-type contact layer, such that the ICE layer is in contact with at least a portion of the top surface of both the absorber layer and the p-type contact layer. In some embodiments, the ICE layer is non-adjacent. In some embodiments, the ICE layer covers a portion of the underlying layer. In some embodiments, the covered portion is in the range of 10%-95%, greater than 15%, greater than 20%, greater than 25%, less than 90%, less than 80%, less than 75%, or less than 60%.

[0088]

[0095] In some embodiments, the ICE layer is formed over and in contact with a p-type contact layer comprising zinc and tellurium. In some embodiments, the ICE layer is formed over and in contact with a p-type layer comprising one or more of cadmium, zinc, tellurium, nitrogen, oxygen, or selenium. In some embodiments, the ICE layer is formed over and in contact with an n-type absorber layer comprising cadmium and selenium.

[0089]

[0096] In some embodiments, the conductive layer may include a conductive material such as, for example, one or more layers of a metal, an oxide, an oxynitride, a nitride, or a nitrogen-containing metal. In some embodiments, the conductive layer includes one or more of oxygen, nitrogen, zinc, tellurium, cadmium, selenium, molybdenum, tungsten, vanadium, silver, nickel, copper, aluminum, titanium, palladium, chromium, molybdenum, and gold. In an exemplary embodiment, the conductive layer includes nitrogen-doped zinc telluride, nitrogen-doped cadmium zinc telluride, nitrogen-doped zinc oxide, molybdenum nitride, or molybdenum oxynitride.

[0090]

[0097] Experimental results indicate that the use of an ICE layer can create, enhance, or maintain chemical passivation at the interface with an adjacent layer and can modify the work function alignment of an adjacent metal-containing layer. In some embodiments, the adjacent layer in direct contact with the ICE layer can include one or more of an absorber layer, a p-type contact layer, or a conductive layer.

[0091]

[0098] In some embodiments of the method of fabricating the device, a surface treatment can be performed on the absorber stack surface. This treatment may include passivating the surface by cadmium chloride heat treatment, applying a dopant, cleaning the surface with acid or base, and / or removing oxides. In some embodiments, the step of chemical passivation is initiated before contacting the absorber stack with the thiol compound. In some embodiments, the chemical passivation is performed simultaneously or in parallel with the step of applying a composition comprising molecules that form an ICE layer to the surface of the layer stack. In some embodiments, the chemical passivation is produced by applying a composition comprising molecules that form an ICE layer to the surface of the layer stack.

[0092]

[0099] In an exemplary process, the absorber stack is subjected to a chloride heat treatment, which may be followed by an alkaline wash, thereby chemically passivating the surface region of the absorber stack. In some embodiments, the upper surface of the absorber stack is surface treated by contact with at least one passivation composition. In some embodiments, the passivation composition comprises a sodium salt, a lithium salt, or a potassium salt. In some embodiments, the passivation composition comprises a thiol, an organosulfur compound, a hydroxide, or an acetate. In some embodiments, the passivation composition is selected from the materials consisting of sodium acetate, betaine, potassium hydroxide, and tetramethylammonium hydroxide.

[0093]

[0100] In some embodiments of the method, following surface treatment of the absorber stack, a layer is deposited above the absorber stack using a temperature controlled technique. The step of depositing a layer above the absorber stack using a temperature controlled technique prevents excessive heating of the substrate layer stack during the deposition process by limiting the time of exposure to temperatures of 120° C. or greater to a range of 0-20 minutes, less than 15 minutes, less than 10 minutes, less than 5 minutes, or less than 2 minutes. In some embodiments, the temperature controlled deposition comprises sputtering.

[0094]

[0101] According to embodiments described herein, the photovoltaic device may include an absorber layer on a substrate stack, the absorber layer including cadmium. The photovoltaic device may include a p-type back contact layer formed above a back interface of the absorber layer. The photovoltaic device may include an interface carrier enhancement (ICE) layer between the absorber layer and the p-type back contact layer, the ICE layer may be in direct contact with the back interface of the absorber layer. The ICE layer includes sulfur in a deprotonated thiol compound.

[0095]

[0102] The surface work function of the ICE layer on the layer stack can be tuned over a range of 600 meV by selection of the thiol compound. The surface work function can be evaluated by Kelvin probe measurements of the surface work function. The use of an ICE layer results in a shift to a more favorable band alignment with the p-type contact layer, including the hole transport material (HTM) or back contact layer.

[0096]

[0103] In some embodiments, the surface work function of the ICE layer has a magnitude in the range of 4.55 eV to 5.15 eV, measured after deposition of the ICE layer, hi some embodiments, the surface work function of the ICE layer has a magnitude in the range of 4.6 eV to 5.0 eV, measured after deposition of the HTM layer.

[0097]

[0104] Use of the ICE layer can create, enhance, or maintain chemical passivation of the interface with the cadmium-containing absorber layer. In some embodiments, the absorber layer comprises cadmium and tellurium, and the ratio of Cd to Te in the surface region of the absorber layer is 1:1 or greater. In some embodiments, the absorber layer comprises tellurium, and the ratio of Cd to Te in the surface region of the absorber layer is in the range of 1:1 to 4:1.

[0098]

[0105] In some embodiments, the thiol compound comprises at least one of isothiourea, cysteamine, also known as 2-aminoethanethiol (AET); 4-fluorothiophenol (4-FTP); 4-aminothiophenol (4-ATP); 1,2-ethanedithiol, also known as ethylene mercaptan (EDT); L-cysteine, also known as (R)-2-amino-3-mercaptopropionic acid (L-Cys); thioglycolic acid, also known as mercaptoacetic acid (TGA); 1-octanethiol (OT); 4-fluorobenzyl mercaptan, also known as (4-fluorophenyl)methanethiol (4-FMB); 3,3,4,4,5,5,6,6,7,7,8,8,8-tridecafluoro-1-octanethiol (TDF-OT); or 4-trifluoromethylbenzyl mercaptan (4-TFMBM).

[0099]

[0106] In some embodiments, the thiol compound comprises at least one of TDF-OT, 4-FTP, OT, AET, or 4-FMB.

[0107] In some embodiments, the back contact is PTAA, poly-TPD, TFB, PF8-TAA, PIF8-TAA, NiO x or P3HT.

[0100]

[0108] In some embodiments, the photovoltaic device has improved p-type carrier lifetime. In some embodiments, the average p-type carrier lifetime is greater than 5.0 ns. In some embodiments, the average p-type carrier lifetime is greater than 10 ns. In some embodiments, the average p-type carrier lifetime is in the range of 10 ns to 20 ns.

[0101]

[0109] In some embodiments, the absorber layer of the photovoltaic device comprises a II-VI type semiconductor, the type II material comprises cadmium (Cd) and the type VI material comprises tellurium (Te); the absorber layer is doped with at least one dopant selected from phosphorus, arsenic, antimony, or bismuth; and the ICE layer is directly adjacent to the second surface of the absorber layer at the passivated surface region, and the ratio of Cd to Te is 1:1 or greater. In some embodiments, the p-type contact layer of the photovoltaic device is directly adjacent to the second surface of the ICE layer, and the p-type contact layer comprises at least one of PTAA, P3HT, poly-TPD, TFB, TTF-1, PF8-TAA, PIF8-TAA, SGT-407, PCDTBT, SpiroOMeTAD, anthracene-based HTM, polythiophene, semiconducting polymer, NiO, CuSCN, or CuI. In some embodiments, the device comprises a conductive layer on the p-type contact layer.

[0102]

[0110] In some embodiments, the valence band offset with the p-type contact layer is reduced by the presence of the ICE layer.

[0111] In some embodiments, the energy level barrier height at the interface with the p-type contact layer is reduced by the presence of the ICE layer. In some embodiments, the energy level barrier height at the interface with the p-type contact layer is reduced by the presence of the ICE layer by 20-150 meV compared to a comparable device without the ICE layer. In some embodiments, the energy level barrier height at the interface with the p-type contact layer is reduced by the presence of the ICE layer by 50-450 meV compared to a comparable device without the ICE layer.

[0103]

[0112] In some embodiments, the hole carrier density in the p-type contact layer is improved by the presence of the ICE layer. In some embodiments, the hole carrier density in the p-type contact layer is improved by 50% or more in the presence of the ICE layer compared to a comparable device without the ICE layer. In some embodiments, this increase in hole carrier density can result in a reduction in resistance measured at open circuit voltage of 50% or more, including a reduction in resistance of more than an order of magnitude.

[0104]

[0113] In some embodiments, the surface work function in the presence of an ICE layer is increased by up to 450 meV compared to a surface without an ICE layer, or decreased by up to 150 meV in the presence of an ICE layer compared to a surface without an ICE layer.

[0105]

[0114] According to embodiments described herein, the partially formed photovoltaic layer stack can include an interfacial carrier enhancement (ICE) layer between the absorber layer and the p-type contact layer on the substrate stack. The ICE layer includes a deprotonated thiol compound.

[0106]

[0115] In some embodiments, a partially formed device having an absorber layer stack, an ICE layer, and a p-type contact layer produces an enhancement in photoluminescence intensity at the film surface that is 2-10 times the photoluminescence intensity compared to a comparable partially formed device stack without the ICE layer.

[0107]

[0116] In some embodiments, the thin film junction stacks of the described device structures may be adapted for use with tandem photovoltaic devices or for use with bifacial modules.

[0117] In some embodiments, the ICE layer can have an average transmittance of greater than 50% for light having wavelengths between 400 nm and 700 nm. In some embodiments, ICE layer 170 can have an average transmittance of greater than about 50% for light having wavelengths between 400 nm and 1000 nm, such as, for example, greater than about 85% in one embodiment, or greater than about 90% in another embodiment, or greater than about 95% in further embodiments.

[0108]

[0118] In some embodiments, the ICE layer is provided in a tandem photovoltaic device. The ICE layer may be provided in a tandem bifacial photovoltaic device. In some embodiments, the tandem device has a top cell and a bottom cell, the top cell including the ICE layer.

[0109]

[0119] Methods for fabricating photovoltaic devices are provided. Methods for processing an absorber stack for fabricating a photovoltaic device are provided. Methods for passivating an absorber layer and maintaining passivation by forming an ICE layer in direct contact with the absorber layer are provided. Methods for aligning the band structure between an absorber and a p-type contact layer are provided. Methods for tuning the surface work function of an ICE layer over a range of 600 meV as measured by Kelvin probe measurement of the surface work function are provided, where the ICE layer is disposed between the absorber layer and the p-type contact layer, thereby resulting in a shift to a more favorable band alignment with the p-type contact layer.

[0110]

[0120] According to embodiments described herein, a method can include providing an absorber stack having an absorber layer including cadmium (Cd). The method can include passivating a surface of the absorber layer to form a passivated surface at the back interface. The method can include forming an enhanced carrier extraction (ICE) layer above the passivated surface by depositing molecules of a thiol compound on the passivated surface, the molecules having a dipole moment such that the thiol compound forms the ICE layer in direct contact with the back interface of the absorber layer. The method can include forming a p-type back contact layer above the ICE layer.

[0111]

[0121] In some embodiments, the thiol compound comprises a thiophenol or an alkanethiol compound.

[0122] In some embodiments, the passivating step comprises contacting the surface of the absorber layer with an alkaline passivating agent.

[0112]

[0123] In some embodiments, the thiol compound molecules include head groups with hydrogen-sulfur bonds, and the step of forming the ICE layer includes deprotonating at least a portion of the head groups of the molecules, whereby the sulfur of the head groups complex with Cd on the passivated surface and substantially align the molecules of the ICE layer at the back interface, whereby the sulfur in the head regions of the molecules is closer to the absorber than the body of the molecules, and the ICE layer includes deprotonated complexes of the thiol compound.

[0113]

[0124] In some embodiments, the absorber comprises tellurium, and the ratio of Cd to Te in the surface region of the absorber layer is 1:1 or greater.

[0125] In some embodiments, the absorber layer comprises a II-VI type semiconductor, the type II material comprises cadmium (Cd) and the type VI material comprises tellurium (Te); and the absorber layer is doped with at least one dopant selected from phosphorous, arsenic, antimony, or bismuth.

[0114]

[0126] In some embodiments, the ICE layer comprises sulfur, which complexes Cd with the passivated surface of the absorber layer.

[0127] In some embodiments, the passivating step comprises contacting a surface of the absorber layer with an alkaline passivating agent. In some embodiments, the alkaline passivating agent comprises at least one of sodium hydroxide (NaOH), potassium hydroxide (KOH), or tetramethylammonium hydroxide ((CH3)4N(OH))TMAH. In some embodiments, the passivating step comprises contacting a surface of the absorber layer with an alkaline passivating agent, and a surface region of the absorber layer comprises cadmium and tellurium, whereby the passivation produces a ratio of Cd to Te in the surface region of the absorber layer ranging from 1:1 to 4:1. In some embodiments, the ratio of Cd to Te in the surface region of the absorber layer is greater than 1:1. In some embodiments, the surface region of the absorber layer consists essentially of a CdTe alloy. In some embodiments, the surface region of the absorber layer comprises a region of the absorber layer at a second surface of the absorber layer and extends into the absorber layer to a depth ranging from 0.2 nm to 15 nm.

[0115]

[0128] In some embodiments, the step of providing the absorber stack includes forming an absorber layer above the substrate stack, the absorber layer comprising a II-VI type semiconductor, and forming the absorber layer further includes doping, passivating, and removing surface oxide from the II-VI type semiconductor prior to depositing the ICE layer.

[0116]

[0129] In some embodiments, forming the ICE layer comprises depositing a liquid suspension of one or more thiol compounds onto the absorber layer. In some embodiments, the one or more thiol compounds are deposited by dip coating, slot die coating, blade coating, roll coating, thermal spraying, or spin coating.

[0117]

[0130] In some embodiments, the ICE layer comprises a compound selected from the group consisting of isothiourea, AET; 4-FTP; 4-ATP; EDT; L-Cys; TGA; OT; 4-FMB; TDF-OT; 4-TFMBM, or a combination thereof. In some embodiments, the ICE layer consists essentially of one compound selected from the group consisting of isothiourea, AET; 4-FTP; 4-ATP; EDT; L-Cys; TGA; OT; 4-FMB; TDF-OT; or 4-TFMBM. In some embodiments, the ICE layer consists essentially of one compound selected from the group consisting of TDF-OT, 4-FTP, OT, or 4-FMB.

[0118]

[0131] In some embodiments, the ICE layer comprises a monolayer of thiol ligands with a dipole moment aligned with respect to the absorber surface. In some embodiments, the ICE layer consists essentially of a monolayer of thiol ligands with a dipole moment aligned with respect to the absorber surface. In some embodiments, the ICE layer molecules form bonds with the back interface of the absorber layer. In some embodiments, sulfur atoms in the molecules forming the ICE layer bond with cadmium atoms at the back interface of the absorber layer.

[0119]

[0132] In some embodiments, the ICE layer comprises a thiophenol or alkanethiol compound. In some embodiments, the ICE layer comprises a fluorinated thiophenol or fluorinated alkanethiol compound. In some embodiments, the ICE layer comprises a thiophenol or alkanethiol compound with a primary amine group.

[0120]

[0133] In some embodiments, the ICE layer comprises thiol ligands sterically configured to tightly bind adjacent Cd sites.

[0134] In some embodiments, the ICE layer is between and in direct contact with both the absorber layer and the p-contact layer.

[0121]

[0135] In some embodiments, depositing the p-type contact layer is performed at an absorber layer stack temperature of 150° C. or less. In some embodiments, the p-type contact layer is deposited by slot-die coating, blade coating, roll coating, thermal spraying, spin coating, sputtering, evaporation, or sol-gel formation. In some embodiments, the p-type contact layer comprises at least one of PTAA, P3HT, poly-TPD, TFB, TTF-1, PF8-TAA, PIF8-TAA, SGT-407, PCDTBT, SpiroOMeTAD, anthracene-based HTM, polythiophene, semiconducting polymer, NiO, CuSCN, or CuI.

[0122]

[0136] In some embodiments, the photovoltaic device has a layer comprising sulfur within 20 nm of the second surface of the absorber layer. In one example, the layer comprising sulfur is detectable by at least one of secondary ion mass spectrometry (SIMS), X-ray photoelectron spectroscopy (XPS), Fourier transform infrared spectroscopy (FTIR), Auger electron spectroscopy (AES), energy dispersive spectroscopy (EDS), Raman spectroscopy, or transmission electron microscopy (TEM). In one example, the layer comprising sulfur is detectable by XPS depth profiling.

[0123]

[0137] In some embodiments, the ICE layer is formed from a thiol composition comprising isothiourea, AET; 4-FTP; 4-ATP; EDT; L-Cys; TGA; OT; 4-FMB; TDF-OT; 4-TFMBM; or combinations thereof. In some embodiments, the thiol composition comprises an X group, e.g., containing a fluorine atom or an amine, that increases the polarity of the molecule and the resulting dipole moment. In some embodiments, the resulting overall dipole moment of the thiol molecule is greater than 0.5 Debye. In some embodiments, the thiol composition comprises an R group consisting of an alkane chain or a phenol group. In some embodiments, the thiol composition comprises an R group that is small enough not to sterically restrict binding to adjacent Cd sites, promoting dense molecular packing and binding to the majority of available Cd sites. In some embodiments, the ICE layer increases the surface work function by up to 450 meV compared to the value without the ICE layer, or decreases the surface work function by up to 150 meV compared to the value without the ICE layer. In some embodiments, the ICE layer increases the surface work function upwards, compared to the value in the absence of the ICE layer, by an increase of 50 meV to 450 meV, 75 meV to 400 meV, at least 100 meV, at least 150 meV, or 200 meV. In some embodiments, the ICE layer is selected to decrease the surface work function, compared to the value in the absence of the ICE layer, by a decrease of 25 meV to 150 meV, 50 meV to 125 meV, at least 100 meV, 75 meV, or 50 meV. In some embodiments, this produces a surface work function of up to 5.15 eV and as low as 4.55 eV. In some embodiments, the ICE layer consists essentially of a monolayer of a single molecule of a thiol compound. In some embodiments, the ICE layer consists essentially of a thiol compound selected from isothiourea, AET; 4-FTP; 4-ATP; EDT; L-Cys; TGA; OT; 4-FMB; TDF-OT; or 4-TFMBM.

[0124]

[0138] In some embodiments, the thiol compound has a molecular dipole strength greater than 0.5 Debye. In some embodiments, the thiol compound has a molecular dipole strength in the range of 0.5 to 11.0 Debye. In some embodiments, the thiol compound has a dipole moment in the range of 1.5 to 8.5 Debye. In some embodiments, the thiol compound has a molecular dipole moment in the range of about 0.5 Debye to about 6 Debye.

[0125]

[0139] According to embodiments described herein, an ICE layer for a photovoltaic device is provided. In some embodiments, the ICE layer is provided with a substantially uniform thickness over the immediately adjacent passivated absorber layer surface. In some embodiments, the ICE layer is provided with 90%-100% substantially continuous coverage at a substantially uniform thickness over the immediately adjacent absorber layer surface.

[0126]

[0140] In some embodiments, the p-type contact layer includes an HTM layer in contact with the ICE layer, the HTM layer having a continuous or discontinuous coverage with a thickness of 0.5 nm to 500 nm, hi some embodiments, the thickness of the p-type contact layer is in the range of 0.5 nm to 100 nm, 5 nm to 200 nm, 5 nm to 50 nm, 10 nm to 100 nm, or 10 nm to 50 nm.

[0127]

[0141] In one example, the p-type contact layer is a semiconducting polymer, polytriarylamine, PTAA, poly-TPD, TFB, PF8-TAA, PIF8-TAA, P3HT, PDI, CPB, TCTA, TCP, PCDTBT, anthracene-based HTM, Spiro-OMeTAD, NiO x , CuSCN, or CuI, or a combination thereof.

[0128]

[0142] In some embodiments, forming the absorber layer includes doping, passivating, and removing oxide from the II-VI semiconductor prior to depositing the ICE layer.

[0129]

[0143] According to embodiments described herein, methods of fabricating photovoltaic devices are provided and include the steps and compositions described.

[0144] It should now be appreciated that the ICE layer, alone or in conjunction with a p-type contact layer, can provide ohmic contact to the absorber layer with improved passivation while providing comparable functionality and reliability to known contact layer structures for II-VI absorber materials. Thus, the embodiments provided herein can improve the utility of photovoltaic devices.

[0130]

[0145] It should be noted that the terms "substantially" and "about" may be utilized herein to express the inherent degree of uncertainty that may result from quantitative comparisons, values, measurements, or other expressions. These terms are also utilized herein to express the extent to which a quantitative expression may vary from the stated basis without resulting in a change in the basic functionality of the subject matter at issue.

[0131]

[0146] While particular embodiments have been illustrated and described herein, it should be understood that various other changes and modifications may be made without departing from the spirit and scope of the claimed subject matter. Moreover, although various aspects of the claimed subject matter have been described herein, such aspects need not be utilized in combination. Therefore, it is intended that the appended claims cover all such changes and modifications that are within the scope of the claimed subject matter.

Claims

1. A photovoltaic element comprising: an absorber layer comprising cadmium on the substrate stack; a p-type contact layer formed above the back interface of the second surface of the absorber layer; and Improved Carrier Extraction (ICE) Layer Between the Absorber Layer and the P-Type Contact Layer where the ICE layer is in contact with the back interface of the absorber layer; The ICE layer contains sulfur in a deprotonated thiol compound, The surface work function of the ICE layer on the absorber layer is tunable by the selection of the thiol compound over a range of 600 meV as measured by Kelvin probe measurements of the surface work function. Photovoltaic element.

2. 2. The device of claim 1 wherein the absorber layer comprises tellurium, the ratio of Cd to Te in a surface region of the absorber layer being 1:1 or greater.

3. 2. The device of claim 1, wherein the absorber layer comprises tellurium, and the ratio of Cd to Te in a surface region of the absorber layer is in the range of 1:1 to 4:

1.

4. The device of claim 1 , wherein the thiol compound has a molecular dipole with a strength greater than 0.5 Debye.

5. 2. The device of claim 1, wherein the surface work function of the ICE layer has a magnitude within a range of 4.55 eV to 5.15 eV measured after ICE layer deposition, or 4.6 eV to 5.0 eV measured after HTM layer deposition.

6. 2. The device of claim 1, wherein the thiol compound comprises at least one of isothiourea, cysteamine, also known as 2-aminoethanethiol (AET); 4-fluorothiophenol (4-FTP); 4-aminothiophenol (4-ATP); 1,2-ethanedithiol, also known as ethylene mercaptan (EDT); L-cysteine, also known as (R)-2-amino-3-mercaptopropionic acid (L-Cys); thioglycolic acid, also known as mercaptoacetic acid (TGA); 1-octanethiol (OT); 4-fluorobenzyl mercaptan, also known as (4-fluorophenyl)methanethiol (4-FMB); 3,3,4,4,5,5,6,6,7,7,8,8,8-tridecafluoro-1-octanethiol (TDF-OT); or 4-trifluoromethylbenzyl mercaptan (4-TFMBM).

7. The device according to claim 1, wherein the thiol compound comprises at least one of TDF-OT, 4-FTP, OT, AET, or 4-FMB.

8. Back contact: PTAA, Poly-TPD, TFB, PF8-TAA, PIF8-TAA, NiO ｘ 2. The device of claim 1 , comprising at least one of P3HT, P4HT, or P5HT.

9. 2. The device of claim 1, wherein the surface work function in the presence of the ICE layer is increased by up to 450 meV compared to a surface without the ICE layer, or decreased by up to 150 meV in the presence of the ICE layer compared to a surface without the ICE layer.

10. the absorber layer comprises a II-VI type semiconductor, the type II material comprising cadmium (Cd) and the type VI material comprising tellurium (Te); the absorber layer is doped with at least one dopant selected from phosphorus, arsenic, antimony, or bismuth; the ICE layer is directly adjacent to the second surface of the absorber layer at a passivated surface region, the ratio of Cd to Te at the surface region being 1:1 or greater; a p-type contact layer directly adjacent the second surface of the ICE layer; the p-type contact layer comprises at least one of PTAA, P3HT, poly-TPD, TFB, TTF-1, PF8-TAA, PIF8-TAA, SGT-407, PCDTBT, SpiroOMeTAD, anthracene-based HTM, polythiophene, semiconducting polymer, NiO, CuSCN, or CuI; The device includes a conductive layer on a p-type contact layer. The device of claim 1 .

11. The device of claim 1 , wherein the valence band offset with the p-type contact layer is reduced by the presence of the ICE layer.

12. The device of claim 1 , wherein the energy level barrier height at the interface with the p-type contact layer is reduced by the presence of the ICE layer.

13. The device of claim 1 , wherein the hole carrier density in the p-type contact layer is improved by the presence of the ICE layer.

14. The device of claim 1 , wherein the ICE layer has a thickness in the range of 0.2 nm to 5.0 nm.

15. 1. A method of fabricating a photovoltaic device, comprising: providing an absorber layer stack having an absorber layer comprising cadmium (Cd); passivating a surface region of the absorber layer to form a passivated surface on a second surface of the absorber layer; forming an enhanced carrier extraction (ICE) layer over the passivated surface, the ICE layer contacts the second surface of the absorber layer; The ICE layer contains sulfur in a deprotonated thiol compound; and forming a p-type contact layer above the ICE layer; A method comprising:

16. 16. The method of claim 15, wherein the surface work function of the ICE layer on the absorber layer is tunable by selection of the thiol compound over a range of 600 meV as measured by Kelvin probe measurement of the surface work function.

17. The method of claim 15 , wherein the step of passivating comprises contacting the second surface of the absorber layer with an alkaline passivating agent.

18. 16. The method of claim 15, wherein the absorber layer comprises tellurium and the ratio of Cd to Te in a surface region of the absorber layer is 1:1 or greater.

19. 16. The method of claim 15, wherein the ICE layer comprises sulfur, which complexes with Cd on the passivated surface, such that the ICE layer produces an enhancement in photoluminescence intensity that is 2-10 times the photoluminescence intensity compared to a comparable device without the ICE layer.

20. 16. The method of claim 15, wherein the ICE layer comprises a compound selected from the group consisting of isothiourea, AET; 4-FTP; 4-ATP; EDT; L-Cys; TGA; OT; 4-FMB; TDF-OT; or 4-TFMBM.

21. The method of claim 15 , wherein the step of depositing the p-type contact layer is performed at an absorber layer stack temperature of 150° C. or less.

22. The passivating step includes contacting the surface of the absorber layer with an alkaline passivating agent, the alkaline passivating agent being selected from the group consisting of sodium hydroxide (NaOH), potassium hydroxide (KOH), and tetramethylammonium hydroxide ((CH ３ ) ４ 16. The method of claim 15, further comprising at least one of: N(OH))TMAH.

23. The method of claim 15, wherein the p-type contact layer is deposited by slot-die coating, blade coating, roll coating, thermal spraying, spin coating, sputtering, evaporation, or sol-gel formation.

24. 16. The method of claim 15, wherein providing an absorber layer stack includes forming an absorber layer over the substrate stack, the absorber layer including a II-VI type semiconductor, and wherein forming the absorber layer further includes doping, passivating, and removing oxide from the II-VI type semiconductor prior to depositing the ICE layer.

25. The method of claim 15 , wherein the ICE layer comprises a monolayer of thiol ligands with a dipole moment aligned with respect to the second surface of the absorber layer.

26. The method of claim 15 , wherein the ICE layer comprises a thiophenol or alkanethiol compound.

27. The method of claim 15 , wherein the ICE layer comprises a fluorinated thiophenol or a fluorinated alkanethiol compound.

28. The method of claim 15 , wherein the ICE layer comprises a thiophenol or alkanethiol compound with one or more primary amine groups.

29. The method of claim 15, wherein the ICE layer comprises thiol ligands sterically configured to tightly bind adjacent Cd sites.

30. The method of claim 15 , wherein the valence band offset with the p-type contact layer is reduced by the presence of the ICE layer.

31. 16. The method of claim 15, wherein the energy level barrier height at the interface with the p-type contact layer is reduced by the presence of the ICE layer.

32. The method of claim 15, wherein the hole carrier density in the p-type contact layer is improved by the presence of the ICE layer.

33. 16. The method of claim 15, wherein the surface work function in the presence of the ICE layer is increased by up to 450 meV compared to a surface without the ICE layer, or is decreased by up to 150 meV in the presence of the ICE layer compared to a surface without the ICE layer.

34. The device of claim 1 , wherein the ICE layer has a thickness in the range of 0.2 nm to 5.0 nm.

35. A photovoltaic element comprising: an absorber layer comprising cadmium on the substrate stack; a p-type contact layer formed above the back interface of the second surface of the absorber layer; and an improved carrier extraction (ICE) layer comprising a deprotonated thiol compound over the absorber layer; A photovoltaic element comprising:

36. 36. The element of claim 1 or 35, wherein the ICE layer is in contact with the back interface of the absorber layer.

37. 37. The device of claim 35 or 36, wherein the ICE layer is above and in contact with the p-type contact layer.

38. 38. The device of claim 1 or any one of claims 35-37, wherein the absorber layer comprises selenium.

39. 40. The device of claim 1 or any one of claims 35 to 38, wherein the absorber layer is n-type.

40. 40. The device of claim 1 or any one of claims 35-38, wherein the absorber layer comprises tellurium and the ratio of Cd to Te in a surface region of the absorber layer is 1:1 or greater.

41. 41. The device of claim 40, wherein the absorber layer comprises tellurium, and the ratio of Cd to Te in a surface region of the absorber layer is in the range of 1:1 to 4:

1.

42. 42. A device according to claim 1 or any of claims 35 to 41, wherein the thiol compound has a molecular dipole of strength greater than 0.5 Debye.

43. 43. The device of any of claims 1 or 35 to 42, wherein the surface work function of the ICE layer has a magnitude in the range of 4.55 eV to 5.15 eV, measured after deposition of the ICE layer, or 4.6 eV to 5.0 eV, measured after deposition of the HTM layer.

44. Thiol compounds include isothiourea, cysteamine, also known as 2-aminoethanethiol (AET); 4-fluorothiophenol (4-FTP); 4-aminothiophenol (4-ATP); 1,2-ethanedithiol, also known as ethylene mercaptan (EDT); L-cysteine, also known as (R)-2-amino-3-mercaptopropionic acid (L-Cys); thioglycolic acid, also known as mercaptoacetic acid (TGA); 1 44. The device of claim 1 or any one of claims 35 to 43, comprising at least one of the following: 1-octanethiol (OT); 4-fluorobenzyl mercaptan, also known as (4-fluorophenyl)methanethiol (4-FMB); 3,3,4,4,5,5,6,6,7,7,8,8,8-tridecafluoro-1-octanethiol (TDF-OT); and 4-trifluoromethylbenzyl mercaptan (4-TFMBM).

45. 45. The device of claim 1 or any one of claims 35 to 44, wherein the thiol compound comprises at least one of TDF-OT, 4-FTP, OT, AET, or 4-FMB.

46. 46. ​​A device according to claim 1 or any one of claims 35 to 45, wherein the surface work function in the presence of an ICE layer is increased by up to 450 meV compared to a surface without an ICE layer, or is decreased by up to 150 meV in the presence of an ICE layer compared to a surface without an ICE layer.

47. Back contact: PTAA, Poly-TPD, TFB, PF8-TAA, PIF8-TAA, NiO ｘ 47. The device of claim 1 or any of claims 35 to 46, comprising at least one of P3HT, P4HT, or P5HT.

48. the absorber layer comprises a II-VI type semiconductor, the type II material comprising cadmium (Cd) and the type VI material comprising tellurium (Te); the absorber layer is doped with at least one dopant selected from phosphorus, arsenic, antimony, or bismuth; the ICE layer is directly adjacent to the second surface of the absorber layer at a passivated surface region, the ratio of Cd to Te at the surface region being 1:1 or greater; a p-type contact layer directly adjacent the second surface of the ICE layer; the p-type contact layer comprises at least one of PTAA, P3HT, poly-TPD, TFB, TTF-1, PF8-TAA, PIF8-TAA, SGT-407, PCDTBT, SpiroOMeTAD, anthracene-based HTM, polythiophene, semiconducting polymer, NiO, CuSCN, or CuI; The device includes a conductive layer on the p-type contact layer.

46. ​​The device of any one of claims 1, 35-38, or 41-45.

49. 50. The device of claim 1 or any one of claims 35-48, wherein the valence band offset with the p-type contact layer is reduced by the presence of the ICE layer.

50. 50. The device of claim 1 or any one of claims 35-49, wherein the energy level barrier height at the interface with the p-type contact layer is reduced by the presence of the ICE layer.

51. 51. The device of claim 1 or any of claims 35 to 50, wherein the hole carrier density in the p-type contact layer is improved by the presence of the ICE layer.

52. The device of any one of claims 1 or 35-51, wherein the ICE layer has a thickness in the range of 0.2 nm to 5.0 nm.

53. 1. A method of fabricating a photovoltaic device, comprising: providing an absorber layer stack having an absorber layer comprising cadmium (Cd); passivating a surface region of the absorber layer to form a passivated surface on a second surface of the absorber layer; forming an improved carrier extraction (ICE) layer over the second surface of the absorber layer, The ICE layer comprises a thiol compound, the thiol compound comprising a thiophenol or an alkanethiol compound; and forming a p-type contact layer above the absorber layer; A method comprising:

54. 54. The method of claim 53, wherein the ICE layer is in contact with the second surface of the absorber layer.

55. 54. The method of claim 53, wherein the step of passivating a surface region of the absorber layer precedes the step of forming the ICE layer.

56. 54. The method of claim 53, wherein the step of passivating a surface region of the absorber layer occurs simultaneously with the step of forming the ICE layer.

57. 54. The method of claim 15 or 53, wherein the absorber is n-type.

58. 54. The method of claim 15 or 53, wherein the absorber is p-type.

59. 54. The method of claim 53, wherein a p-type contact layer is formed above the ICE layer.

60. 54. The method of claim 53, wherein the ICE layer is formed above the p-type contact layer.

61. 61. The method of any of claims 15, 53-55, or 57-60, wherein the passivating step comprises contacting the second surface of the absorber layer with an alkaline passivating agent.

62. 62. The method of any of claims 15, 53-56, or 58-61, wherein the absorber layer comprises tellurium and the ratio of Cd to Te in a surface region of the absorber layer is 1:1 or greater.

63. 63. The method of any of claims 15 or 53-62, wherein the ICE layer comprises sulfur, which complexes with Cd on the passivated surface, whereby the ICE layer produces an enhancement in photoluminescence intensity that is 2-10 times the photoluminescence intensity compared to a comparable device without the ICE layer.

64. 64. The method of any of claims 15 or 53-63, wherein the ICE layer comprises a compound selected from the group consisting of isothiourea, AET; 4-FTP; 4-ATP; EDT; L-Cys; TGA; OT; 4-FMB; TDF-OT; or 4-TFMBM.

65. 65. The method of any of claims 15 or 53 to 64, wherein the step of depositing the p-type contact layer is performed at a temperature of the absorber layer stack of 150°C or less.

66. The passivating step includes contacting the surface of the absorber layer with an alkaline passivating agent, the alkaline passivating agent being selected from the group consisting of sodium hydroxide (NaOH), potassium hydroxide (KOH), and tetramethylammonium hydroxide ((CH ３ ) ４ 66. The method of any of claims 15, 53-55, or 57-65, comprising at least one of:

67. The method of any of claims 15 or 53-66, wherein the p-type contact layer is deposited by slot-die coating, blade coating, roll coating, thermal spraying, spin coating, sputtering, evaporation, or sol-gel formation.

68. 65. The method of any of claims 15, 53-55, or 57-64, wherein providing an absorber layer stack includes forming an absorber layer over the substrate stack, the absorber layer including a II-VI type semiconductor, and wherein forming the absorber layer further includes doping, passivating, and removing oxide from the II-VI type semiconductor prior to depositing the ICE layer.

69. 69. The method of any of claims 15 or 53-68, wherein the ICE layer comprises a monolayer of thiol ligands with a dipole moment aligned with respect to the second surface of the absorber layer.

70. 70. The method of any of claims 15 or 53-69, wherein the ICE layer comprises a fluorinated thiophenol or a fluorinated alkanethiol compound.

71. 71. The method of any of claims 15 or 53-70, wherein the ICE layer comprises a thiophenol or alkanethiol compound with one or more primary amine groups.

72. 72. The method of any of claims 15 or 53-71, wherein the ICE layer comprises deprotonated thiol ligands configured to tightly bind adjacent Cd sites.

73. 73. The method of claim 15 or any of claims 53-72, wherein the valence band offset with the p-type contact layer is reduced by the presence of the ICE layer.

74. 74. The method of claim 15 or any of claims 53-73, wherein the energy level barrier height at the interface with the p-type contact layer is reduced by the presence of the ICE layer.

75. 75. The method of claim 15 or any of claims 53 to 74, wherein the hole carrier density in the p-type contact layer is improved by the presence of an ICE layer.

76. 80. The method of any of claims 15 or 53-75, wherein the surface work function of the ICE layer on the absorber layer is tunable by selection of the thiol compound over a range of 600 meV as measured by Kelvin probe measurement of the surface work function.

77. 77. The method of any of claims 15 or 53 to 76, wherein the surface work function in the presence of the ICE layer is increased by up to 450 meV compared to a surface without the ICE layer, or is decreased by up to 150 meV in the presence of the ICE layer compared to a surface without the ICE layer.

Images