Systems and methods for hybrid PIN PbSe mid-wave infrared (MWIR) photodetectors

Abstract

Methods and systems for photodetectors utilizing hybrid PIN or PN lead selenide (PbSe) junctions are provided. In some examples, the PbSe junctions can include one or more semiconductor layers, including, as a non-limiting list of examples, an n-type layer, an n+ type layer, a p(i) type layer, and / or a p+ type layer. Photodetectors utilizing PbSe PIN or PN junctions are fabricated. Methods for preparing photosensitive PbSe semiconductor layers for detection of electromagnetic energy (e.g., mid-wave infrared (MWIR), etc.) are also disclosed.

Description

[Technical field]

[0001] [CROSS REFERENCE TO RELATED APPLICATIONS] This application claims priority to and the benefit of U.S. Provisional Patent Application No. 63 / 333,616, filed April 22, 2023, entitled "SYSTEMS AND METHODS FOR HYBRID PIN PbSe MID-WAVELENGTH INFRARED (MWIR) PHOTODETECTORS," which is incorporated by reference in its entirety for all purposes. [Background technology]

[0002] Many applications use photosensitive materials as detectors. However, conventional techniques can be expensive and complex to manufacture and have narrow absorption ranges. Therefore, photosensitive materials with improved sensitivity that can be manufactured using lower cost, less complex processes are desirable.

[0003] By comparing such systems with the present disclosure described in the remainder of this application with reference to the drawings, further limitations and disadvantages of the conventional and traditional approaches will become apparent to one skilled in the art. Summary of the Invention

[0004] Provided are photodetector systems and / or methods that utilize a hybrid PIN or PN PbSe junction. In some examples, the junction can include one or more PbSe semiconductor layers, including, by way of a non-limiting list of examples, an n-type layer, an n+ type layer, a p(i) type layer, and / or a p+ type layer.

[0005] These and various other advantages, aspects and novel features of the present disclosure, as well as details of illustrated embodiments thereof, will become more fully understood from the following description and drawings. [Brief description of the drawings]

[0006] [Figure 1A] FIG. 2 is a partial top view of a photodiode according to an exemplary embodiment of the present disclosure.

[0007] [Figure 1B] 1 is a cross-sectional view of an exemplary lead selenide (PbSe) photodetector according to an exemplary embodiment of the present disclosure.

[0008] [Diagram 2] 1A-1C illustrate an exemplary method for forming a lead selenide (PbSe) photodetector according to an aspect of the present disclosure.

[0009] [Figure 3A] FIG. 2 illustrates an exemplary PbSe PIN junction, according to an embodiment of the present disclosure. [Figure 3B] FIG. 2 illustrates an exemplary PbSe PIN junction, according to an embodiment of the present disclosure.

[0010] [Figure 3C] FIG. 2 illustrates an exemplary PbSe PN junction, according to an embodiment of the present disclosure.

[0011] [Figure 4] 1 is a graph providing light penetration depth for various materials, according to an aspect of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] The figures are not necessarily to scale. Wherever possible, similar or identical reference numbers will be used to refer to similar or identical components.

[0013] Examples of photodetector systems and methods are disclosed that utilize a hybrid PIN or PN lead selenide (PbSe) structure. In some examples, the PbSe junction can include one or more semiconductor layers, including, by way of a non-limiting list of examples, an n-type layer, an n+ type layer, a p(i) type layer, and / or a p+ type layer.

[0014] In the present disclosure, photodetectors are fabricated that utilize PbSe PIN or PN junctions. Methods for preparing photosensitive PbSe semiconductor layers for detection of electromagnetic energy (e.g., mid-wave infrared (MWIR) and the like) are also disclosed.

[0015] In forming an exemplary PbSe junction, a first PbSe n+ type layer can be prepared on a substrate by various physical and chemical vapor deposition techniques, including pulsed laser deposition (PLD), molecular beam epitaxy (MBE), magnetron sputtering, e-beam / thermal evaporation, or metalorganic chemical vapor deposition (MOCVD) techniques. A second p(i) type layer can be formed via chemical vapor deposition (e.g., chemical bath deposition (CBD) and other techniques described above) on a surface of the first layer. A third p+ type layer can be formed via chemical vapor deposition (e.g., CBD and other techniques described above) on a surface of the second layer opposite the first layer.

[0016] The PbSe junction can be formed on a substrate (e.g., a silicon wafer) that can include an ion-implanted layer (e.g., a doped semiconductor layer). The PbSe junction can be packaged as a photodetector that is adapted and / or tuned to respond to incident light in a range of wavelengths. In some examples, the wavelength range can include the infrared (IR) band (e.g., 3 μm to 5 μm), particularly in the mid-wave infrared (MWIR).

[0017] As provided herein, junctions at interfaces between semiconductor layers are prepared with various doping levels and dopant types. Such junctions are common in a wide variety of electronic devices. For example, a PIN junction is a particular type of semiconductor junction that utilizes three layers, each with a different doping amount.

[0018] A PIN junction often includes an intrinsic (or undoped) semiconductor layer (e.g., a p(i)-type layer) disposed between two other semiconductor layers. Often, the two other semiconductor layers include a doped p-type layer and a doped n-type layer. The p-type and n-type layers can have similar doping levels or different doping levels depending on the particular application or desired result. The doping levels of one or both of the p-type and n-type layers can be relatively high (compared to the intrinsic semiconductor layer) because these layers act as ohmic contacts in the device (e.g., a photodetector).

[0019] The technique utilized to form or deposit each layer, the type of material used to prepare one or more layers, and the dopants can determine the operating characteristics of the junction, such as the bandgap energy between the p-type and n-type layers. In a disclosed example, a PIN junction is utilized in a PbSe photodetector having a relatively wide intrinsic layer (e.g., a p(i) layer) to provide favorable performance characteristics of the photodetector (e.g., in the MWIR range).

[0020] The use of PIN PbSe photodetectors and their morphological / structural engineering offers several advantages such as bandgap tunability, relatively high response speed, low noise operation, relatively high photosensitivity, relatively low temperature sensitivity, and the ability to be manufactured in small packages at low cost and with suitable performance results over extended periods of use. Advantageously, the disclosed PbSe photodetectors offer higher sensitivity and therefore detection sensitivity with a wider temperature operating window, and cost-effectiveness.

[0021] In disclosed examples, the PbSe semiconductor layers produced by the disclosed methods can be utilized in photodetectors, resulting in low cost, small package detectors for use in a wide variety of applications, particularly without the need for cooling in mid-wave IR applications. The disclosed PbSe photodetectors can be utilized, for example, in combination with other materials, in other applications, products, and / or use cases (e.g., other than detection), including solar cells, light emitting diodes, and / or lasers, as a non-limiting list of examples.

[0022] As used herein, "and / or" means any one or more of the items in the list joined by "and / or." For example, "x and / or y" means any element of the 3-element set {(x),(y),(x,y)}. Similarly, "x, y, and / or z" means any element of the 7-element set {(x),(y),(z),(x,y),(x,z),(y,z),(x,y,z)}. As used herein, the term "module" refers to a function that may be implemented in hardware, software, firmware, or any combination of one or more thereof. As used herein, the term "example" or "exemplary" means serving as a non-limiting example, instance, or illustration.

[0023] In one example of a single junction device, photons with incident energy above the band gap of the bombarded material are absorbed. However, through thermal relaxation, the excess energy of the photons is lost as heat. To reduce the energy loss due to thermal relaxation and thereby increase the conversion efficiency, multi-junction structures can be integrated by utilizing various semiconductor materials with different band gap energies. By adding additional layers for multi-junctions with other compound elements, the light absorption efficiency and therefore the spectral response can be increased. Thus, high energy photons can be absorbed more efficiently in such multi-junction structures.

[0024] However, the composition and fabrication of multi-junction semiconductors can increase the overall cost of the device due to increased material usage and fabrication complexity. On the other hand, PbSe has a narrow band gap that allows light absorption over a larger range of the electromagnetic spectrum, most notably in the low and mid-infrared regions where some semiconductor photovoltaic cells (e.g., silicon) cannot absorb. Furthermore, the disclosed fabrication of PbSe junctions and corresponding thin films is significantly cheaper than conventional semiconductor materials used in photovoltaic mode operation.

[0025] In some disclosed examples, PbSe is used in forming one or more semiconductor layers of the junctions in the photodetector. PbSe is a polar semiconductor that exhibits both ionic and covalent chemical bonds, where electrons are shared unequally by the nuclei that form these bonds. However, in the resulting PbSe crystals, covalent bonds predominate. Crystalline PbSe thin films have a face-centered cubic lattice structure and can have a lattice constant of about 6.12 Å (although it can be smaller or larger depending on the desired properties). In some examples, the lattice structure can have a direct band gap of about 0.27 eV relative to the bulk material at room temperature, which is 3×10 16 cm -3 (although smaller or larger bandgaps and / or carrier concentrations may be exhibited depending on the desired properties). Due to this narrow bandgap, the structure is highly sensitive to radiation in the infrared (IR) spectrum. For this reason, at least in part, some lead chalcogenides have been employed in a wide variety of applications, including IR sensors, photoresistors, photodiodes, IR lasers, and / or thermoelectric generation devices. For example, PbSe provides detection at longer wavelengths in the IR spectrum, ranging from about 3 μm to about 5 μm.

[0026] In addition, PbSe is a direct band gap semiconductor capable of absorbing electromagnetic radiation in materials or layers having thicknesses of only tens of nanometers, which is significantly thinner than conventional photosensitive materials, even those with narrower optical absorption ranges. Moreover, advantageously, the disclosed PbSe junctions are relatively easy to fabricate in large areas at lower temperatures (e.g., compared to conventional semiconductor materials) by low-cost fabrication techniques such as solution-phase or thermal evaporation, chemical bath deposition (CBD), etc.

[0027] FIG. 1B illustrates a cross-sectional view of an exemplary photodetector 100. In the example of FIG. 1B, the photodetector 100 is a PbSe photodetector utilizing a PIN junction 102. The PIN junction 102 includes a first layer 108 (e.g., an n+ type layer), a second layer 106 (e.g., a p(i) type layer), and a third layer 104 (e.g., a p+ type layer). Thus, the third layer 104 is configured to receive photons as a window, absorbing photons generated electron-hole pairs in the layer 106. Here, the second layer 106 serves as an intrinsic layer. The PIN junction stack can be inverted, and light can be absorbed through either the top or bottom layer (e.g., through the first layer 108 or the third layer 104 as a thin Si substrate).

[0028] The photodetector 100 utilizes a substrate 114 on which the junction 102 is formed. In some examples, the expensive quartz substrate can be replaced with less expensive materials such as silicon and / or glass. For example, the substrate 114 can be a doped n-type Si wafer. In some examples, the substrate 114 is Si with ion implantation, Si with SiO2, and / or glass (such as indium tin oxide (ITO) or other transparent conductive oxides on glass).

[0029] The layer 116 may be incorporated or otherwise formed in the substrate 114, and the layer 116 may be fully or partially exposed on a surface of the substrate. Additionally or alternatively, the layer 116 may be doped. For example, the layer 116 may be an ion-implanted layer (e.g., an n+ layer doped with phosphorus). In some examples, the layer 116 is defined by a doping level and / or carrier concentration different from (e.g., higher than) the substrate 114. The junction 102 is disposed on the layer 116 such that the layer forms a conductive path between the junction and a conductor (e.g., the electrode portion 110D).

[0030] The junction 102 is partially enclosed within one or more sidewalls 112 to ensure charge isolation between the junction and external components. The sidewalls 112 can be any number of materials suitable for isolation and / or passivation of junction sidewalls, such as dielectric materials (including but not limited to oxides, carbides, nitrides, fluorides, sulfides, and / or composites thereof) and / or polymeric materials.

[0031] The first or bottom layer 108 (formed directly on the substrate 114 and / or the ion-implanted layer 116) comprises an n-type PbSe layer deposited via PLD (or other suitable deposition technique as described above). The first layer 108 has a cm 3 Approximately 10 18 ~10 pieces 20 The resulting layer is doped to have a relatively high carrier concentration of 10 carriers.

[0032] The second layer or intermediate layer 106 comprises a p-type PbSe layer and may be formed via chemical vapor deposition (e.g., CBD) or other suitable techniques as described above. The second layer 106 may be lightly doped and act as an intrinsic zone between the p-type doped layer 104 and the n-type doped layer 108. The second layer 106 has a much lower carrier concentration compared to the first layer 108 or the third layer 104, cm 3 Up to about 10 per 16The second layer 106 has a carrier concentration of 100 . Due to the relatively small amount of mobile carriers with the external dopants, the second layer 106 acts as a wide depletion layer between the other layers. In some cases, the second layer 106 can be subjected to the formation of an oxide layer on the surface.

[0033] The third layer 104 includes a p+ type PbSe layer. The third layer 104 may be formed via chemical vapor deposition (e.g., CBD) or other suitable techniques. The third layer 104 has a cm 3 Approximately 10 17 ~10 pieces 18 The third layer 104 is doped to have a relatively high carrier concentration of .mu.m. In some cases, a thin oxide may be applied to the third layer 104.

[0034] Sidewalls 112 are formed on portions of junction 102, substrate 114, and / or layer 116. Sidewalls 112 provide a passivation and isolation layer between junction 102 and other components and may include one or more oxides, such as silicon dioxide (SiO2), aluminum oxide (Al2O3), and / or another suitable material (dielectric material (such as oxides, carbides, nitrides, fluorides, sulfides, and / or composites thereof) and / or polymeric materials). Electrode portions 110A-110D are formed on photodiode 100 and provide a conductive path between electrode portions 110C and 110D through junction 102. Electrode portions 110A-110D are formed from a conductive material (e.g., a metal including gold) and are formed by one or more deposition techniques.

[0035] 1A shows a partial top view of photodiode 100. Electrode portion 110B connects to electrode portion 110A and provides a conductive path to third layer 104.

[0036] 2 , a method 200 is provided for processing a PbSe photodetector (e.g., utilizing a PIN junction, a PN junction, etc.), such as PbSe photodetector 100. Method 200 comprises one or more of substrate preparation in block 202, formation of an ion implantation layer in block 204, deposition of a first layer in block 206, deposition of a second layer in block 208, deposition of a third layer in block 210, sidewall passivation and isolation in block 212, and metallization and packaging in block 214.

[0037] In some examples, in block 202, a substrate may be prepared from a material selected from one of several suitable candidates including sapphire, quartz, fused silica, silicon oxide, silicon (Si), etc. In some examples, the substrate is subjected to a pre-cleaning, which may include an additional or optional plasma cleaning, and / or a surface treatment to roughen one or more surfaces of the substrate in a substrate preparation step.

[0038] The substrate may include portions or layers that link the junctions with conductors, such as ion implanted layer 116, deposited, formed and / or otherwise incorporated into the substrate in block 204.

[0039] In block 206, the first layer may be an n-type PbSe semiconductor layer and may be deposited by chemical and physical vapor deposition techniques (e.g., PLD, MOCVD, or MBE). In block 208, the second layer may be a p-type PbSe semiconductor layer created by chemical vapor deposition (e.g., CBD) of lightly doped PbSe. In block 209, the carrier concentration of the second layer may be controlled via oxygen and / or iodine sensitization, and / or treatment with additional materials and / or treatments.

[0040] In block 210, the third layer may be a p+ type highly doped PbSe semiconductor layer deposited by chemical vapor deposition (e.g., CBD). In some examples, a thin oxide (e.g., oxygen sensitized, thin coating or layer) may be applied to one or more of the layers, such as the second layer and the third layer. Other deposition techniques may be applied for the formation of the second layer or the third layer.

[0041] At block 212, sidewalls are formed to passivate and / or isolate the junction. In some examples, the sidewalls are formed from SiO2 or Al2O3 material (e.g., dielectric materials (such as oxides, carbides, nitrides, fluorides, sulfides, and / or composites thereof) and / or polymeric materials). At block 214, metallization and packaging processes are performed to provide conductive contacts, thereby creating a semiconductor PbSe photodetector.

[0042] In some additional or alternative examples, one or more layers are subjected to one or more thermal treatments at ambient conditions (e.g., vacuum bake and / or post bake), oxygen sensitization, thin film iodination (e.g., iodine sensitization), and / or chemical etching (e.g., following sidewall formation) for oxide removal, etc. As provided herein, the process may proceed as enumerated, and one or more of the listed operations may be optional and / or may proceed in a different sequence.

[0043] 3A-3C provide an exemplary PbSe junction utilized in a photodetector 100 as disclosed herein. FIG 3A illustrates the exemplary junction 102 as a PIN junction having a first n+ type layer 108, a second p(i) type layer 106, and a third p+ type layer 104, where the first layer 108 is formed on a substrate 114 (as shown in FIG 1B). However, the exemplary junction 102A illustrated in FIG 3B provides swapped first layer 108 and third layer 104 (e.g., n+ type layer and p+ type layer, respectively), resulting in a junction with similar functionality to that of FIG 3A.

[0044] In operation, a PIN photodiode utilizing junction 102 or 102A is operated in reverse bias. Reverse biasing of a PIN photodiode can induce noise currents, which reduces the signal-to-noise ratio during operation. Additionally, reverse biasing (versus a PN photodiode) provides improved performance for high dynamic range applications.

[0045] The intrinsic layer also increases the depletion region width. Carriers are generated in the intrinsic region because the layer can be much thicker than the depletion region of a PN structure (without the intrinsic layer). Another effect of the thick intrinsic region is reduced capacitance, which can allow for higher detection bandwidth. The wide depletion region provided by the intrinsic layer further ensures that the PIN diode has high reverse breakdown characteristics. As the capacitance decreases with increasing separation, the depletion region (as shown in FIG. 3C) is wider than a comparable diode utilizing a PN junction. This can be either a PN+ or N+P in the stack.

[0046] The PN junction 102B is shown in FIG. 2C for use in a PN photodiode. The PN junction 102B provides a first n-type layer 108 and a second p-type layer 104, the first layer 108 being formed on a substrate. In some examples, the order of the layers can be reversed with respect to the substrate. In some examples, the PN photodiode provides a separate function from the PIN photodiode. For example, the PN photodiode does not require reverse biasing and, as a result, can demonstrate low light sensitivity applications.

[0047] FIG. 4 shows an exemplary annotated graph of optical penetration depth. The graph is an example from a submission to the Journal of Applied Physics (see, e.g., Journal of Applied Physics 93, 4355 (2003); https: / / doi.Org / 10.1063 / l.1558224). The absorption coefficients and optical penetration depths for various photodetector materials are shown in the spectral range of 1 μm to 14 μm. As shown, PbSe has an absorption coefficient of 10 per cm. 4 The optical absorption coefficient approaches 1 / a (μm) and the optical penetration depth approaches 1 / a (μm) (depth of about 1.7 μm).

[0048] Although several examples and / or embodiments are described with respect to PbSe layers, the principles and / or advantages disclosed herein can be employed without limiting the techniques to any particular type of material and / or application.

[0049] Although the present disclosure has been described with reference to certain specific embodiments, those skilled in the art will recognize that various modifications can be made and equivalents can be substituted without departing from the scope of the present disclosure. In addition, many modifications can be made to adapt a particular situation or material to the teachings of the present disclosure without departing from its scope. Therefore, the present disclosure is not limited to the particular embodiments disclosed, but rather, the present disclosure is intended to include all embodiments falling within the scope of the appended claims.

Claims

1. 1. A method for forming a photodetector having a lead selenide (PbSe) junction, comprising the steps of: Preparing a substrate; forming an ion implantation layer; depositing a first layer of heavily doped lead selenide (PbSe) on the substrate and the ion implanted layer via various deposition techniques including pulsed laser deposition (PLD), molecular beam epitaxy (MBE), or metalorganic chemical vapor deposition (MOCVD); depositing a second layer of lightly doped or undoped PbSe layer on the first layer via a chemical bath deposition (CBD) process or other deposition technique; depositing a third layer of heavily doped PbSe on the second layer opposite the first layer via a CBD process or other deposition technique; forming a sidewall around one or more of the substrate, the ion-implanted layer, the first layer, the second layer, or the third layer; forming one or more conductors in one or more of the first layer, the second layer, or the third layer; A method comprising:

2. The method of claim 1 , further comprising applying an oxide layer to one or more of the second layer or the third layer.

3. The method of claim 1 , wherein the doping level of the first layer is substantially similar to the doping level of the third layer.

4. The method of claim 1 , wherein the doping level of the first layer is higher than the doping level of the third layer.

5. The method of claim 1 , wherein the doping level of the second layer is substantially lower.

6. 1. A method for forming a photodetector having a lead selenide (PbSe) junction, comprising the steps of: Preparing a substrate; forming an ion implantation layer; depositing a first layer of doped lead selenide (PbSe) on the substrate and the ion-implanted layer via various deposition techniques of pulsed laser deposition (PLD), molecular beam epitaxy (MBE), or metalorganic chemical vapor deposition (MOCVD); depositing a second layer of doped PbSe layer onto the first layer via a chemical bath deposition (CBD) process or other deposition technique; controlling the carrier concentration of the second layer through oxygen or iodine sensitization or additional material processing or treatment; forming a sidewall around one or more of the substrate, the ion-implanted layer, the first layer, or the second layer; forming one or more conductors in one or more of the first layer or the second layer; A method comprising:

7. The method of claim 6 further comprising applying an oxide layer to one or more of the first layer or the second layer.

8. The method of claim 6 , wherein the doping level of the first layer is substantially similar to the doping level of the second layer.

9. The method of claim 6 , wherein the doping level of the first layer is higher than the doping level of the second layer.

Images