Optical devices having barrier layers that facilitate reducing hardmask diffusion and / or hardmask retention, and related methods

By incorporating barrier layers with a lower refractive index than the device functional layers in optical devices, the diffusion and residual issues of hard mask materials are mitigated, leading to reduced optical losses and improved performance in AR and VR applications.

JP2025515269APending Publication Date: 2025-05-14APPLIED MATERIALS INC
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Patent Information

Application Number
JP2024560273
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-04-15
Filing Date
2023-04-10
Publication Date
2025-05-14

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Abstract

Embodiments of the present disclosure generally relate to optical devices having a barrier layer to reduce hardmask diffusion and / or hardmask retention, and related methods of forming the optical devices. In one or more embodiments, a number of optical device structures each include a barrier layer disposed between a device functional layer and a hardmask layer prior to removal of the hardmask layer.
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Description

[Technical field]

[0001] FIELD OF THE DISCLOSURE

[0001] Embodiments of the present disclosure generally relate to optical devices having barrier layers to reduce hardmask diffusion and / or hardmask retention, and related methods of forming optical devices. [Background technology]

[0002]

[0002] Hardmask materials may be used in the formation of optical devices. As an example, hardmask materials may be used in conjunction with an etching process. However, hardmask materials may diffuse through the structures of the optical device and / or leave residual hardmask after removal of the hardmask, each of which may hinder device performance. For example, diffused hardmask material may obstruct light transmission and reduce the amount of light transmitted through the structures of the optical device, thereby causing optical losses. Optical losses may hinder device performance, such as in augmented reality (AR) and / or virtual reality (VR) applications.

[0003]

[0003] Moreover, it can be difficult to address such optical losses without reducing the amount of film in the structure of the optical device (eg, film loss), which can also impede device performance.

[0004]

[0004] Therefore, there is a need for improved optical devices and associated methods that facilitate reducing hardmask diffusion and / or hardmask residue while mitigating film loss. Summary of the Invention

[0005]

[0005] Embodiments of the present disclosure generally relate to optical devices having a barrier layer to reduce hardmask diffusion and / or hardmask retention, and related methods of forming the optical devices. In one or more embodiments, a number of optical device structures each include a barrier layer disposed between a device functional layer and a hardmask layer prior to removal of the hardmask layer.

[0006] In one or more embodiments, a device includes a transparent substrate and one or more optical device structures disposed on a surface of the substrate. Each of the one or more optical device structures includes a device functional layer formed from a metal oxide and having a first refractive index, and a barrier layer disposed over the device functional layer and having a second refractive index less than the first refractive index. An atomic percentage concentration of the hard mask material is less than 0.7% throughout each of the one or more optical device structures. The atomic percentage concentration includes a surface atomic percentage (SAP) on an outer surface of each of the one or more optical device structures. The SAP is less than 0.7%. The atomic percentage concentration includes a volume atomic percentage (VAP) along a height direction of each of the one or more optical device structures. The VAP is less than 0.7%.

[0007] In one or more embodiments, a method of forming a device having a plurality of optical device structures includes: positioning a transparent substrate; and forming one or more device functional layers on a surface of the transparent substrate. Each of the one or more device functional layers is formed from a metal oxide and has a first refractive index. The method includes forming one or more barrier layers on the one or more device functional layers. Each of the one or more barrier layers has a second refractive index less than the first refractive index. The method includes forming a plurality of hard mask layers on the one or more barrier layers. Each of the plurality of hard mask layers is formed from a hard mask material. The method includes performing a first etching step to selectively etch the device relative to the plurality of hard mask layers; and performing a second etching step to selectively etch the plurality of hard mask layers to remove the plurality of hard mask layers.

[0008] In one or more embodiments, a device includes a transparent substrate and one or more optical device structures disposed on a surface of the substrate. Each of the one or more optical device structures includes a device functional layer formed from a metal oxide and having a first refractive index, and a barrier layer disposed on the device functional layer and having a second refractive index less than the first refractive index. A surface atomic percent (SAP) on an outer surface of each of the one or more optical device structures is less than 0.7%. A volume atomic percent (VAP) along a height direction of each of the one or more optical device structures is less than 0.3%. The VAP is less than or equal to 0.1% beginning at a depth of each of the one or more optical device structures over the remaining height. The depth is in a range of 0.1 nm to 108 nm.

[0009]

[0009] In order that the above-mentioned features of the present disclosure may be understood in detail, the present disclosure summarized above will now be more particularly described with reference to embodiments, some of which are illustrated in the accompanying drawings. It should be noted, however, that the accompanying drawings depict only exemplary embodiments and therefore should not be considered limiting in scope, as the present disclosure may admit of other equally effective embodiments. [Brief description of the drawings]

[0010] [Figure 1A] 1 is a schematic top view of an optical device according to one or more embodiments. [Figure 1B] 1 is a schematic top view of an optical device according to one or more embodiments. [Diagram 2] 1 is a schematic cross-sectional view of a physical vapor deposition (PVD) chamber according to one or more embodiments. [Diagram 3] 1 is a schematic block diagram of a method of forming a device according to one or more embodiments. [Figure 4A] 1A-1D are schematic cross-sectional views of a portion of an optical device during a method of forming a device having multiple optical device structures according to one or more embodiments. [Figure 4B]1A-1D are schematic cross-sectional views of a portion of an optical device during a method of forming a device having multiple optical device structures according to one or more embodiments. [Figure 4C] 1A-1D are schematic cross-sectional views of a portion of an optical device during a method of forming a device having multiple optical device structures according to one or more embodiments. [Figure 5A] 1A-1D are schematic cross-sectional views of a portion of an optical device, or a device having multiple optical device structures, during a method of forming the device, according to one or more embodiments. [Figure 5B] 1A-1D are schematic cross-sectional views of a portion of an optical device, or a device having multiple optical device structures, during a method of forming the device, according to one or more embodiments. [Figure 5C] 1A-1D are schematic cross-sectional views of a portion of an optical device, or a device having multiple optical device structures, during a method of forming the device, according to one or more embodiments. [Figure 5D] 1A-1D are schematic cross-sectional views of a portion of an optical device, or a device having multiple optical device structures, during a method of forming the device, according to one or more embodiments. [Figure 5E] 1 is a schematic cross-sectional view of a portion of an optical device after an optional step of the method according to one or more embodiments. [Figure 6] FIG. 2 is a schematic graph illustrating hardmask retention, hardmask diffusion, and device functional layer film retention versus depth according to one or more embodiments. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011]

[0018] To facilitate understanding, wherever possible, the same reference numerals have been used to designate identical elements common to the figures. It is envisioned that elements and features of one embodiment may be beneficially incorporated in other embodiments without further detail.

[0012]

[0019] Embodiments of the present disclosure generally relate to optical devices having a barrier layer to reduce hardmask diffusion and / or hardmask retention, and related methods of forming the optical devices. In one or more embodiments, a number of optical device structures each include a barrier layer disposed between a device functional layer and a hardmask layer prior to removal of the hardmask layer.

[0013]

[0020] Unless otherwise specified, chemical entities referred to herein may have any atomic number of the elements they contain. For example, niobium oxide (NbO) may have any number of niobium atoms (e.g., stoichiometric or non-stoichiometric) and any number of oxygen atoms.

[0014]

[0021] FIG. 1A is a schematic top view of an optical device 100A according to one or more embodiments.

[0015]

[0022] 1B is a schematic top view of an optical device 100B according to one or more embodiments. It should be understood that the optical devices 100A and 100B described below are exemplary optical devices. In one or more embodiments described herein, the optical device 100A is a waveguide combiner, such as an augmented reality waveguide combiner for augmented reality (AR) and / or virtual reality (VR) applications. In one or more embodiments described herein, the optical device 100B is a planar optical device, such as a metasurface.

[0016]

[0023] The optical devices 100A and 100B include a plurality of optical device structures 102 disposed on a surface 103 of a substrate 101. The substrate 101 is an optical device substrate. The optical device structures 102 may be nanostructures having submicron dimensions, e.g., nano-sized dimensions. In one or more embodiments, the regions of the optical device structures 102 correspond to one or more gratings 104, such as a first grating 104a, a second grating 104b, and a third grating 104c. In one or more embodiments, the optical device 100A is a waveguide combiner including at least a first grating 104a corresponding to an input coupling grating and a third grating 104c corresponding to an output coupling grating. In the above embodiment, the waveguide combiner includes a second grating 104b corresponding to an intermediate grating. 1B illustrates the optical device structures 102 as having square or rectangular shaped cross sections, the cross sections of the optical device structures 102 may have other shapes, including, but not limited to, circular, triangular, elliptical, regular polygonal, irregular polygonal, and / or irregular shaped cross sections. In one or more embodiments, the cross sections of the optical device structures 102 on a single optical device 100B are different.

[0017]

[0024] The substrate 101 can be formed from any suitable material so long as the substrate 101 can adequately transmit light of the desired wavelength or range of wavelengths and can serve as a suitable support for the optical device 100A and the optical device 100B described herein. The substrate selection can include substrates of any suitable material, including, but not limited to, amorphous dielectrics, non-amorphous dielectrics, crystalline dielectrics, silicon oxides, polymers, and combinations thereof. In one or more embodiments, the substrate 101 is transparent. In one or more embodiments, the substrate 101 includes high refractive index transparent materials such as silicon (Si), silicon dioxide (SiO2), germanium (Ge), silicon germanium (SiGe), InP, GaAs, GaN, fused silica, quartz, sapphire, and / or high refractive index glass. In one or more embodiments, the substrate 101 is formed from glass and / or silicon carbide (SiC).

[0018]

[0025] 2 is a schematic cross-sectional view of a physical vapor deposition (PVD) chamber 200 according to one or more embodiments. The PVD chamber 200 may be used in the method 300 described below. It should be understood that the PVD chamber 200 is an exemplary PVD chamber and that other PVD chambers, including PVD chambers from other manufacturers, may be used or modified to accomplish aspects of the present disclosure.

[0019]

[0026] The PVD chamber 200 includes one or more cathodes 202, 203 with corresponding single target or multiple targets attached (e.g., via a chamber body adapter 208) to a chamber body 210. In the implementation shown in Figure 2, the PVD chamber 200 includes at least one first target 204 and at least one second target 206. The first target 204 includes at least one first material described herein, and the second target 206 includes at least one second material described herein. Each cathode (e.g., the first target 204 and the second target 206) can be coupled to a DC power source 212 and / or an RF power source 214 and a matching network 215.

[0020]

[0027] The PVD chamber 200 is configured to include a substrate support 232 having a support surface 234 that supports the substrate 101. The PVD chamber 200 includes an opening 250 (e.g., a slit valve) through which an end effector extends to place the substrate 101 on lift pins for lowering the substrate 101 onto the support surface 234.

[0021]

[0028] The PVD chamber 200 includes a sputter gas source 261 operable to supply a sputter gas, such as argon (Ar), krypton (Kr), and / or neon (Ne), to the process region 205. The present disclosure contemplates that other sputter gas(es) may also be used. A gas flow controller 262 is disposed between the sputter gas source 261 and the process region 205 to control the flow of sputter gas from the sputter gas source 261 to the process region 205. The PVD chamber 200 includes a reactive gas source 263 operable to supply a reactive gas, such as an oxygen-containing gas or a nitrogen-containing gas, to the process region 205. A gas flow controller 264 is disposed between the reactive gas source 263 and the process region 205 to control the flow of reactive gas from the reactive gas source 263 to the process region 205. The PVD chamber 200 may include a precursor gas source 270 operable to supply a precursor gas to the process region 205. In one or more embodiments, a gas flow controller 271 is disposed between the precursor gas source 270 and the process region 205 to control the flow of precursor gas from the precursor gas source 270 to the process region 205. The sputter gas, reactive gas, and precursor gas may each also be referred to herein as a process gas.

[0022]

[0029] During processing, the process volume 205 can be maintained at a process pressure using a vacuum system and / or gas flow controllers 262 , 264 , 271 .

[0023]

[0030] 2, the substrate support 232 includes an RF bias power supply 238 coupled to a bias electrode 240 disposed on the substrate support 232 via a matching network 242. The substrate support 232 includes a mechanism for holding the substrate 101 on a support surface 234 of the substrate support 232, such as an electrostatic chuck, a vacuum chuck, a substrate holding clamp, or the like. The substrate support 232 includes a cooling conduit 265 disposed on the substrate support 332 that controllably cools the substrate support 232 and the substrate 101 positioned thereon to a predetermined temperature, for example, from about −20° C. to about 300° C. The cooling conduit 265 is coupled to a cooling fluid source 268 that provides a cooling fluid. The substrate support 232 includes a heater 267 embedded therein. A heater 267, such as a resistive element disposed on the substrate support 232, is coupled to an optional heater power supply 266 to controllably heat the substrate support 232 and the optical device substrate 101 positioned thereon to a predetermined temperature, for example, from about -150°C to about 500°C.

[0024]

[0031] Although one first target 204 and one second target 206 are illustrated in FIG. 2, the PVD chamber 200 may include two or more first targets 204 and / or two or more second targets 206. For example, three to five targets selected from at least one of the first targets 204 and / or second targets 206 may be included in the PVD chamber 200. In one or more embodiments, each first target 204 is operable to deposit a different material. For example, three to five second targets 206 may be included in the PVD chamber 200. Each optical device material target 206 is operable to deposit a different material. In one or more embodiments having one or more first targets 204 and one or more second targets 206, each first target 204 is operable to deposit a different first material and / or each second target 206 is operable to deposit a different second material.

[0025]

[0032] The PVD chamber 200 may be used to form one or more layers of the optical device structure 102 on the substrate 101, for example, as described below. In one or more embodiments, the PVD chamber 200 is used to form (e.g., deposit) a barrier layer of the optical device structure.

[0026]

[0033] During processing in the above embodiment, while argon (Ar) sputter gas and oxygen (O) reactive gas are supplied to the process region 205, pulsed direct current (DC) power is supplied to the argon sputter gas and oxygen reactive gas using a DC power supply 212 to generate an oxygen-containing plasma 298 in the process region 205. In one or more embodiments, the first target 204 comprises silicon (Si). While the oxygen-containing plasma 298 is in the process region 205, oxygen gas reacts with the first target 204 to deposit a barrier layer on the substrate 101. The barrier layer deposited using the silicon-containing first target 204 and oxygen reactive gas is formed of silicon dioxide (SiO2). In one or more embodiments, the substrate 101 is maintained at a predetermined temperature of -150°C to 500°C.

[0027]

[0034] It is contemplated in the present disclosure that the first target 204 or the second target 206 may be omitted. It is also contemplated in the present disclosure that the first target 204 having a first material may be set at a first power level and the second target 206 having a second material may be set at a second power level that is lower or higher than the first power level.

[0028]

[0035] The PVD chamber 200 can be used to form other layers of the optical device structure on the substrate 101. For example, the PVD chamber 200 can be used to form a device functional layer and / or an encapsulation layer of the optical device structure. For example, an argon sputter gas, an oxygen reactive gas, and a titanium (Ti) first target 204 can be used to form a device functional layer formed of titanium oxide (TiO).

[0029]

[0036] FIG. 3 is a schematic block diagram of a method 300 of forming a device according to one or more embodiments.

[0030]

[0037] Step 301 includes positioning a transparent substrate. In one or more embodiments, the transparent substrate is positioned on a support surface of a substrate support.

[0031]

[0038] Step 303 includes forming one or more device function layers on a surface of the transparent substrate. The one or more device function layers are each formed from a metal oxide and have a first refractive index. In one or more embodiments, the first refractive index is 2.0 or greater, such as in the range of 2.3 to 2.5. In one or more embodiments, the one or more device function layers can be formed using nanoimprinting. In the above embodiment, a stamp having a stamp profile is used to press against the device function layers to form a plurality of device function layers having a profile corresponding to the stamp profile. In one or more embodiments, the one or more device function layers can include a plurality of device function layers formed using an initial device etch step and an initial hard mask etch step, as described below in connection with Figures 5A-5D.

[0032]

[0039] Optional step 304 includes forming one or more encapsulation layers at least partially over the one or more device functional layers prior to forming the one or more barrier layers in step 305. In the above embodiment, the one or more barrier layers in step 305 are formed over the one or more encapsulation layers and the multiple hard mask layers in step 307 are formed over the one or more barrier layers.

[0033]

[0040] Step 305 includes forming one or more barrier layers over the one or more device functional layers. The one or more barrier layers each have a second refractive index less than the first refractive index. In one or more embodiments, the second refractive index is less than 2.0. In one or more embodiments, the one or more barrier layers are formed over the one or more device functional layers using a PVD process.

[0034]

[0041] The PVD process can be performed, for example, using the PVD chamber 200 described above. The PVD process includes reacting one or more process gases with a target having silicon (Si). The one or more process gases include one or more of argon (Ar) and / or oxygen (O). The argon gas can be a sputtering gas and the oxygen gas can be a reactive gas that reacts with the silicon target. The reaction of the one or more process gases with the target occurs while maintaining the process region at a process pressure in the range of 1.0 mTorr to 50.0 mTorr. The method 300 further includes generating a process plasma to promote the reaction of the one or more process gases with the target. The generation of the process plasma includes supplying pulsed direct current (DC) power to the one or more process gases. The described parameters of the method 300 promote deposition of a barrier layer that promotes reduced diffusion of hardmask material, reduced hardmask material residue, and reduced film loss of the optical device structure.

[0035]

[0042] Step 307 includes forming a plurality of hardmask layers over the one or more barrier layers. Each of the plurality of hardmask layers is formed from a hardmask material. In one or more embodiments, the hardmask material is a metal.

[0036]

[0043] Step 309 includes performing a first etching step to selectively etch the device relative to the multiple hardmask layers.

[0037]

[0044] Step 311 includes performing a second etching step to selectively etch away the hardmask layers. In one or more embodiments, the second etching step includes a wet etch to remove the hardmask layers.

[0038]

[0045] An optional step 312 includes forming a second encapsulation layer over the barrier layer.

[0039]

[0046] The present disclosure contemplates that the formation of layers described in connection with steps 303, 304, 305, and / or 307 may be performed using one or more of epitaxial deposition, multiple beam epitaxy (MBE), ion beam deposition (IBAD), physical vapor deposition (PVD), chemical vapor deposition (such as CVD, plasma enhanced CVD, or flowable CVD), atomic layer deposition (ALD), nanoimprint lithography, photolithographic patterning, liquid material casting processes, spin-on glass processes, spin-on coating processes, liquid spray coating processes, dry powder coating processes, screen printing processes, and / or doctor blading processes.

[0040]

[0047] This disclosure contemplates that the etching described in connection with steps 303, 309, and / or 311 may be performed using one or more of ion beam etching, reactive ion etching, electron beam etching, dry etching, and / or wet etching.

[0041]

[0048] 4A-4C are schematic cross-sectional views of a portion 105 of an optical device 100A or 100B during a method 300 of forming a device having multiple optical device structures 410 according to one or more embodiments. In one or more embodiments, portion 105 may correspond to a portion or an entire surface of a substrate 101 of a waveguide combiner, as shown in FIG. 1A. In one or more embodiments, portion 105 may correspond to a portion or an entire surface of a substrate 101 of a planar optical device, as shown in FIG. 1B. Portion 105 may correspond to one or more gratings 104. In one or more embodiments, portion 105 corresponds to first grating 104a, second grating 104b, and / or third grating 104c of optical device 100A and / or 100B.

[0042]

[0049] As shown in FIG. 4A, a device functional layer 404 is formed on the surface 103 of the transparent substrate 101 (as described in connection with step 303). A barrier layer 406 is formed on the device functional layer 404 (as described in connection with step 305). A plurality of hard mask layers 402 are formed on the barrier layer 406 (as described in connection with step 307). In one or more embodiments, the hard mask layer 402 is formed from a hard mask metal. The hard mask metal includes one or more of chromium (Cr), chromium oxide (CrO), ruthenium (Ru), titanium nitride (TiN), tantalum nitride (TaN), and / or aluminum nitride (AlN). In one or more embodiments, the hard mask layer 402 is formed from carbon (C), such as amorphous carbon.

[0043]

[0050] In one or more embodiments, the hardmask layer 402 is part of a patterned hardmask formed by disposing a hardmask layer over the barrier layer 406 and then patterning the hardmask layer to form multiple hardmask layers 402.

[0044]

[0051] A first etching step is performed (as described in relation to step 309) by selectively etching the device functional layer 404 and the barrier layer 406 relative to the plurality of hard mask layers 402 to remove the device portion 405 of the device functional layer 404 and the barrier portion 407 of the barrier layer 406.

[0045]

[0052] 4B shows that the device portion 405 and the barrier portion 407 have been removed. A plurality of optical device structures 410 are formed. Each of the plurality of optical device structures 410 includes a respective device function layer 411 and a respective barrier layer 412.

[0046]

[0053] A second etching step is performed (as described in connection with step 311) to selectively etch the plurality of hardmask layers 402 relative to the substrate to remove the plurality of hardmask layers 402 from the optical device structure 410.

[0047]

[0054] FIG. 4C illustrates the optical device structure 410 after the hard mask layers 402 have been removed. In the implementation illustrated in FIGS. 4A-4C, the device functional layer 411 is made of a metal oxide and has a first refractive index. The transparent substrate 101 is made of glass. The metal oxide includes titanium oxide (TiO) or niobium oxide (NbO). The barrier layer 412 has a second refractive index less than the first refractive index. The barrier layer 412 is made of silicon oxide (SiO), silicon nitride (SiN), ruthenium oxide (RuO), and / or tantalum oxide (TaO). In one or more embodiments, the barrier layer 412 is made of silicon dioxide (SiO2), which facilitates reducing diffusion of the hard mask material, reducing residual hard mask material, and reducing film loss of the optical device structure 410.

[0048]

[0055] The device functional layer 411 has a first density and the barrier layer 412 has a second density higher than the first density. The barrier layer 412 has a thickness T1 that is at least 1 nm, such as 5 nm or more, such as 10 nm or more. In one or more embodiments, the thickness T1 is in the range of 1 nm to 50 nm, such as 5 nm to 50 nm, or 5 nm to 30 nm. In one or more embodiments, the thickness T1 is in the range of 1 nm to 30 nm. In one or more embodiments, the thickness T1 is in the range of 5 nm to 10 nm. In one or more embodiments, the thickness T1 is about 5 nm, about 10 nm, or about 30 nm. The device functional layer 411 has a thickness FT1 that is in the range of 1 nm to 3000 nm. In one or more embodiments, the thickness FT1 is in the range of 50 nm to 300 nm. In one or more embodiments, the thickness FT1 is in the range of 50 nm to 100 nm, such as about 75 nm.

[0049]

[0056] Using the atomic percentage concentrations described herein, the optical loss of the optical device structure 410 (e.g., optical loss in the device functional layer 411, such as loss in thickness FT1) is less than 0.46%, such as less than 0.1%. In one or more embodiments, the optical loss is less than 0.05%, such as 0.02% or less.

[0050]

[0057] The atomic percentage concentration of the hardmask material (forming the hardmask layer 402 removed in FIG. 4C ) is less than 0.7% throughout each of the one or more optical device structures 410 after the hardmask layer 402 is removed. The atomic percentage concentration of the hardmask material is less than 0.7% throughout the height H1 of each of the one or more optical device structures 410. The atomic percentage concentration of the hardmask material diffused into the barrier layer 412 or device functional layer 411 is less than 0.7% throughout the height H1. The atomic percentage concentration of the hardmask material remaining as residue on the top surface of the barrier layer 412 is less than 0.7%. In one or more embodiments, the atomic percentage concentration of the hardmask material is less than 0.3% throughout the height H1 of each of the one or more optical device structures 410. In one or more embodiments, the atomic percentage concentration of the hardmask material is less than 0.1% throughout the remaining height R1 of each of the one or more optical device structures 410, beginning at the depth D1. The depth D1 is in the range of 0.1 nm to 108 nm, for example 3.0 nm.

[0051]

[0058] The atomic percentage includes a surface atomic percentage (SAP) on the outer surface 417 of each of the one or more optical device structures 410. The SAP is less than 0.7%, e.g., 0.3% or less. The SAP is measured using a surface metrology such as inductively coupled plasma mass spectrometry (ICP-MS). It is contemplated in the present disclosure that other surface metrology techniques can be used to measure the SAP. The atomic percentage includes a volume atomic percentage (VAP) along a height H1 direction of each of the one or more optical device structures 410. The VAP is less than 0.7%, e.g., 0.3% or less. The VAP is measured using a volume metrology such as depth profile X-ray photoelectron spectroscopy (XPS). It is contemplated in the present disclosure that other volume metrology techniques can be used to measure the VAP, such as glow discharge mass spectrometry (GDMS). In one or more embodiments, the VAP along a height H1 direction of each of the one or more optical device structures 410 is less than 0.3%. In one or more embodiments, the VAP begins at depth D1 and is 0.1% or less over the remaining height R1 of each of the one or more optical device structures 410. In one or more embodiments, depth D1 is relative to exterior surface 417. In one or more embodiments, exterior surface 417 is a top surface of barrier layer 412.

[0052]

[0059] The substrate 101 may include other layers, such as an anti-reflective layer, on the backside 409 of the substrate 101. The optical device structure 410 may be used as an optical grating coupler (e.g., a waveguide combiner) in an optical device, such as an input coupler and / or an output coupler in an optical device.

[0053]

[0060] 5A-5D are schematic cross-sectional views of a portion 505 of an optical device 100A or 100B during a method 300 of forming a device having multiple optical device structures 510 according to one or more embodiments.

[0054]

[0061] As shown in FIG. 5A, a plurality of device function layers 504 are formed on the surface 103 of the transparent substrate 101 (as described in connection with step 303). The device function layers 504 can be formed, for example, using nanoimprinting. In the above embodiment, a stamp having a stamp profile is used to press against the initial device function layer to form the plurality of device function layers 504 having a profile corresponding to the stamp profile. Portions of the initial device function layer between the illustrated device function layers 504 can be etched following stamping. In one or more embodiments, the plurality of device function layers 504 are formed using an initial device etch step and an initial hard mask etch step performed prior to step 304 of method 300. In the above embodiment, the initial device function layer (which can be similar to the device function layer 404 of FIGS. 4A and 4B) can be etched using an initial device etch step in a manner similar to that described for the first etch step in connection with FIGS. 4A and 4B. The initial hardmask layer (which may be similar to hardmask layer 402 of FIGS. 4A and 4B) may then be removed using an initial hardmask etch step in a manner similar to that described for the second etch step in connection with FIGS. 4B and 4C.

[0055]

[0062] Following the formation of the plurality of device functional layers 504, an encapsulation layer 520 is formed on the device functional layer 504, as shown in FIG. 5A (and as described in connection with optional step 304). The encapsulation layer 520 is formed from silicon dioxide (SiO2). In one or more embodiments, the encapsulation layer 520 is deposited such that it is disposed on at least a top surface 516 and one sidewall 508 of each optical device structure 510 of the plurality of optical device structures 510. In one or more embodiments, the encapsulation layer 520 is disposed on the top surface 516 and both sidewalls 508 of each optical device structure 510 of the plurality of optical device structures 510, as well as on the surface 103 of the substrate 101.

[0056]

[0063] The plurality of optical device structures 510 are formed with a device angle θ. The device angle θ is an angle between the surface 103 of the substrate 101 and a sidewall 508 of the optical device structure 510. As shown in FIGS. 5A-5D, the plurality of optical device structures 510 are perpendicular, e.g., the device angle θ is about 90 degrees, e.g., in the range of 87 degrees to 93 degrees. The plurality of optical device structures 510 may be angled with respect to the surface 103 of the substrate 101. In one or more embodiments, the respective device angles θ of each optical device structure 510 are substantially equal. In one or more embodiments, the respective device angle θ of at least one of the plurality of optical device structures 510 is different from the device angle θ of another of the plurality of optical device structures 510.

[0057]

[0064] After the encapsulation layer 520 is formed, a plurality of barrier layers 506 (similar to the barrier layer 406 shown in FIG. 4A) are formed on the encapsulation layer 520, as shown in FIG. 5B. Next, a plurality of hard mask layers 502 are formed on a portion of the barrier layer 506 (as described in connection with step 307), as shown in FIG. 5C. In a first etching step (described in connection with step 309), the encapsulation layer 520 and a portion of the barrier layer 506 are selectively etched relative to the plurality of hard mask layers 502, removing the encapsulation portion 521 of the encapsulation layer 520 and a portion of the barrier layer 506, as shown in FIG. 5C. Removal of the encapsulation portion 521 forms a plurality of encapsulation layers 531. The encapsulation layer has a thickness T2 in the range of 10 nm to 200 nm.

[0058]

[0065] In a second etching step (described in connection with step 311), the plurality of hard mask layers 502 are selectively etched with respect to the transparent substrate 101 to remove the plurality of hard mask layers 502, as shown in FIG. 5D. The encapsulation layer 531 is formed of silicon dioxide (SiO2). The encapsulation layer 531 is disposed, at least in part, between the device functional layer 504 and the barrier layer 506. In one or more embodiments, the barrier layer 506 is formed of the same material as the encapsulation layer 520. Using the same material for the barrier layer 506 and forming the barrier layer 506 separately (after forming the encapsulation layer 521) helps reduce film loss (such as the device functional layer 504), helps reduce hard mask residue, and helps reduce hard mask diffusion.

[0059]

[0066] 5E is a schematic cross-sectional view of a portion 505 of the optical device 100A or 100B after an optional step of the method 300 according to one or more embodiments. A second encapsulation layer 550 is formed on the barrier layer 506 and the transparent substrate 101 (as described in connection with optional step 312). The second encapsulation layer 550 is formed of silicon dioxide (SiO2). The second encapsulation layer 550 fills the spaces between and outside the encapsulation layer 531. The second encapsulation layer 550 is also formed on the barrier layer 506. It is contemplated in the present disclosure that the encapsulation layer 531 can be omitted from the implementation shown in FIG. 5E (e.g., as shown in FIG. 4C), and the encapsulation layer 550 is disposed on the barrier layer 506, such that the openings between and outside the barrier layer 506 and the device function layer 504 are filled.

[0060]

[0067] FIG. 6 is a schematic graph 600 illustrating hardmask retention and hardmask diffusion versus depth according to one or more embodiments.

[0061]

[0068] The horizontal axis plots the depth (nm) of measurements taken throughout the height H1 of the optical device structure, beginning from the top surface of the optical device structure and extending downward.

[0062]

[0069] The first profile 611 is a vertical plot of the amount of hardmask remaining (at 0 nm depth) versus the amount of hardmask diffusion across depth, measured on an optical device structure that employs a barrier layer (according to one or more embodiments described herein) between the hardmask layer and the device functional layer.

[0063]

[0070] The second profile 621 is a vertical plot of the amount of hardmask remaining (at a depth of 0 nm) versus the amount of hardmask diffusion throughout the depth, measured on an optical device structure that does not use a barrier layer between the hardmask layer and the device functional layer.

[0064]

[0071] Chromium (Cr) was used as the hard mask material for each of the profiles 611 and 621 .

[0065]

[0072] A comparison of the first profile 611 and the second profile 621 shows that the use of the barrier layer described herein reduces hardmask diffusion of the hardmask material across the height H1 of the optical device structure. Further, a comparison of the first data point 601 of the first profile 611 and the second data point 602 of the second profile 621 shows that the use of the barrier layer described herein reduces hardmask residue on the top surface of the optical device structure. The first data point 601 shows 70% less remaining hardmask material than the second data point 602.

[0066]

[0073] Additionally, the use of a barrier layer reduces any film loss, and using the embodiments described herein, it has been found that the barrier layers described herein can reduce film loss in the device functional layer by 3.75 times or more (e.g., 5.2 times) compared to other configurations that do not use a barrier layer.

[0067]

[0074] Using the subject matter described herein, it has been found that the described barrier layers reduce the atomic percentage of the remaining hardmask material (after removal of the hardmask layer) on the top surface of the barrier layer to 0.3% or less, which is lower than configurations that do not use a barrier layer, where the atomic percentage of the remaining hardmask material (after removal of the hardmask layer) on the top surface of a device functional layer or encapsulation layer may be 1.0% or more.

[0068]

[0075] Advantages of the present disclosure include reduced diffusion of the hardmask material into other layers of the optical device structure, reduced residue of the hardmask material after removal of the hardmask layer, relatively maintained film thickness of the optical device structure (e.g., less film thickness loss compared to other processes), reduced optical losses, and improved optical device performance, such as for AR and / or VR applications.

[0069]

[0076] Moreover, aspects of the present disclosure achieve relatively low hardmask diffusion and hardmask residue, as well as relatively low film loss, in a cost-effective, simple, modular, and efficient manner, e.g., changing hardmask materials could otherwise increase cost and complexity, and reduce modularity of applications and equipment.

[0070]

[0077] It is contemplated that one or more aspects disclosed herein may be combined. By way of example, one or more aspects, features, components, and / or properties of optical device 100A, optical device 100B, PVD chamber 200, method 300, optical device structure 410, optical device structure 510, the processes described in connection with Figures 4A-4C, and / or the processes described in connection with Figures 5A-5D may be combined. Furthermore, it is contemplated that one or more aspects disclosed herein may include some or all of the advantages discussed above.

[0071]

[0078] While the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the present disclosure may be devised without departing from the basic scope thereof. The present disclosure also contemplates that one or more aspects of the embodiments described herein may be substituted with one or more of the other aspects described. The scope of the present disclosure is determined by the following claims.

Claims

1. A device, comprising: A transparent substrate; one or more optical device structures disposed on a surface of the substrate; each of the one or more optical device structures comprises: a device functional layer formed of a metal oxide and having a first refractive index; a barrier layer disposed on the device functional layer and having a second refractive index smaller than the first refractive index; Including, an atomic percent concentration of the hard mask material is less than 0.7% throughout each of the one or more optical device structures, the atomic percent concentration being: a surface atomic percent (SAP) on an exterior surface of each of the one or more optical device structures, the surface atomic percent being less than 0.7%; and a volume atomic percent (VAP) along a height direction of each of the one or more optical device structures that is less than 0.7%; and Including, the device.

2. 10. The device of claim 1 , wherein the one or more optical device structures are formed by wet etching a hard mask layer disposed on at least the barrier layer, the hard mask layer being formed from the hard mask material.

3. 3. The device of claim 2, wherein the atomic percentage concentration of the hard mask material is less than or equal to 0.3% throughout each of the one or more optical device structures.

4. The device of claim 1 , wherein the transparent substrate is formed from glass.

5. 10. The device of claim 1, wherein the metal oxide comprises titanium oxide (TiO) or niobium oxide (NbO).

6. 6. The device of claim 5, wherein the barrier layer is formed from silicon oxide (SiO), silicon nitride (SiN), ruthenium oxide (RuO), or tantalum oxide (TaO).

7. The barrier layer is made of silicon dioxide (SiO 2 6. The device of claim 5, wherein the device is formed from

8. 6. The device of claim 5, wherein the hard mask material comprises one or more of chromium (Cr), chromium oxide (CrO), ruthenium (Ru), carbon (C), titanium nitride (TiN), tantalum nitride (TaN), or aluminum nitride (AlN).

9. Each of the one or more optical device structures further comprises: an encapsulation layer disposed at least partially between said device functional layer and said barrier layer; The device of claim 1 , comprising:

10. The encapsulation layer is made of silicon dioxide (SiO 2 10. The device of claim 9, wherein the device is formed from

11. The device of claim 1 , wherein the device functional layer has a first density and the barrier layer has a second density greater than the first density.

12. The device of claim 1 , wherein the barrier layer has a thickness in the range of 5 nm to 50 nm.

13. 1. A method of forming a device having a plurality of optical device structures, comprising: Positioning a transparent substrate; forming one or more device function layers on a surface of the transparent substrate, the one or more device function layers each being formed from a metal oxide and having a first refractive index; forming one or more barrier layers over the one or more device function layers, the one or more barrier layers each having a second refractive index less than the first refractive index; forming a plurality of hardmask layers over the one or more barrier layers, each of the plurality of hardmask layers being formed from a hardmask material; performing a first etching step to selectively etch the device with respect to the plurality of hard mask layers; performing a second etching step to selectively etch the plurality of hard mask layers to remove the plurality of hard mask layers; A method comprising:

14. The one or more barrier layers are formed over the one or more device functional layers using a physical vapor deposition (PVD) process, the PVD process comprising:

14. The method of claim 13, comprising reacting one or more process gases with a silicon (Si) bearing target, the one or more process gases comprising one or more of argon (Ar), krypton (Kr), neon (Ne), or oxygen (O).

15. reacting the one or more process gases with the target occurs while maintaining a process pressure in a process region within a range of 1.0 mTorr to 50 mTorr; 15. The method of claim 14, further comprising generating a process plasma, wherein generating the process plasma comprises providing pulsed direct current (DC) power to the one or more process gases.

16. In the first etching step, the one or more device function layers are selectively etched with respect to the plurality of hard mask layers to remove device portions of the one or more device function layers; 14. The method of claim 13, wherein the second etching step selectively etches the plurality of hard mask layers with respect to the transparent substrate to remove the plurality of hard mask layers.

17. Prior to forming the one or more barrier layers, forming one or more encapsulation layers at least partially over the one or more device functional layers; 14. The method of claim 13, wherein the one or more barrier layers are formed over the one or more encapsulation layers, and the multiple hardmask layers are formed over the one or more barrier layers.

18. the first etching step selectively etches the one or more encapsulation layers relative to the hard mask layers to remove encapsulation portions of the one or more encapsulation layers; 20. The method of claim 17, wherein the second etching step selectively etches the hard mask layers with respect to the transparent substrate to remove the hard mask layers.

19. The method of claim 13 , wherein the second etching step comprises a wet etch.

20. A device, comprising: A transparent substrate; one or more optical device structures disposed on a surface of the substrate; each of the one or more optical device structures comprises: a device functional layer formed of a metal oxide and having a first refractive index; a barrier layer disposed on the device functional layer and having a second refractive index smaller than the first refractive index; Including, a surface atomic percent (SAP) on an exterior surface of each of the one or more optical device structures is less than 0.7%; a volume atomic percent (VAP) along a height direction of each of the one or more optical device structures is less than 0.3%; The VAP is less than or equal to 0.1% over the remaining height starting at a depth of each of the one or more optical device structures, the depth being within a range of 0.1 nm to 108 nm.