Single photon avalanche diode and sensor array

Abstract

The SPAD sensor may include an active region (102) having one or more active region contacts (102a), a deep isolation region (106a) along the outer periphery of the SPAD sensor, and a contact region (204) between the active region and the deep isolation region. The size of the contact region varies along the periphery of the SPAD device, and the contact region may include one or more contact region contacts (204a). The SPAD sensor may further include a buried well region (208) between the contact region and the active region. An array of SPAD sensors is also described herein.

Description

Technical Field

[0001] The present disclosure relates to single photon avalanche diode sensors and single photon avalanche diode sensor arrays, and more particularly, although not limited thereto, to 3D stacked back-illuminated single photon avalanche diode sensors.

Background Art

[0002] The present disclosure generally provides single photon avalanche diode (SPAD) sensors with improved photon detection efficiency (PDE) and fill factor, and / or achieves a reduction in the number of required metal layers in a 3D stacked SPAD wafer.

[0003] In particular, the present disclosure generally relates to 3D stacked SPAD sensors having back-illumination (BSI) and full deep trench isolation (DTI), and / or arrays of such SPAD sensors.

[0004] Several attempts have been made to improve the PDE of SPAD devices, including the use of microlenses, charge collection type / electrical microlenses, contact area sharing, optimization of depletion layer width, the use of metal mirrors, and inverse pyramid surface structures. However, many of these techniques require additional components and / or layers in the SPAD structure, complicating the device manufacturing process. Therefore, there is a need for improved SPAD devices with enhanced PDE.

[0005] Accordingly, an object of the present disclosure is to provide an SPAD device having improved PDE and fill factor, and further to provide an improved SPAD array having an improved metallization layer configuration.

Summary of the Invention

[0006] Generally, aspects of the present disclosure may provide an SPAD device and / or an SPAD array that addresses the above problems.

[0007] According to one aspect of the present disclosure, a single photon avalanche diode (SPAD) sensor, comprising an active region having one or more active region contacts, a deep (trench) isolation region along the outer periphery of the SPAD sensor, a contact region between the active region and the deep (trench) isolation region, the contact region comprising one or more contact region contacts, an embedded well region between the contact region and the active region, is provided, wherein the size of the contact region varies along the periphery of the SPAD device, a single photon avalanche diode (SPAD) sensor is provided.

[0008] The deep (trench) isolation region may be provided across the entire outer periphery of the SPAD device such that the isolation region surrounds the active region laterally. It will be understood that the terms lateral and vertical are used herein to refer to relative directions. In particular, the vertical direction is generally used with respect to the stack of the SPAD sensor (e.g., the z-direction in FIG. 1), while the lateral direction is used with respect to any direction perpendicular to the vertical direction (e.g., the x-direction and the y-direction in FIG. 1). Thus, the phrase "surrounded laterally" may be interpreted to mean that the feature is completely surrounded by another feature in at least the x-direction and the y-direction. The active region may generally comprise a doped layer of the SPAD sensor that promotes avalanche multiplication and may also be referred to as an avalanche multiplication region. The active area may generally refer to the area of the active region where avalanche multiplication occurs as viewed from a top view of the SPAD sensor.

[0009] The variable size of the contact region (also referred to as the anode ring and / or cathode ring) in a SPAD device facilitates an increase in the size of the active area as compared to a device having a contact region with a uniform dimension across the periphery of the device. The improved fill factor results in an improvement in the PDE. For example, a SPAD having a 12.5 μm pitch can have a PDE increase of about 20% or more. For SPADs with smaller pitches, even greater relative improvements can be achieved. It will be appreciated that the fill factor represents the ratio of the active area of the SPAD device (e.g., indicated by the dashed line across the edge of the active region 102 in FIG. 1) to the total area of the SPAD device. In other words, for a square SPAD device (e.g., where the length of each side of the outer periphery is equal to the pitch), the fill factor can be calculated by the following equation.

Equation

[0010] Providing a deep trench isolation region surrounding the SPAD device (e.g., forming the outer periphery of the SPAD structure) can facilitate the isolation of the SPAD device. Thus, when a plurality of SPAD sensors are formed in an array, the deep trench isolation region can further reduce crosstalk between adjacent devices. In such an array, adjacent devices may share a single deep trench isolation region. The deep trench isolation region can be filled or partially filled with a dielectric or a metal.

[0011] Accordingly, the SPAD sensors according to the present disclosure may be combined with other SPAD sensors to form an array. It will be appreciated that some or all of the other SPAD sensors in such an array may be SPAD sensors according to the present disclosure. However, this is not a requirement, and in such an array, the SPAD sensors of the present disclosure may be combined with one or more other SPAD sensors that do not form part of the scope of the present disclosure. Accordingly, in an implementation, an array of SPAD sensors comprising one or more SPAD sensors according to the present disclosure is provided.

[0012] In some implementations, the SPAD device may further comprise a shallow trench isolation region along the outer periphery of the SPAD sensor. Similar to the deep trench isolation region, the shallow trench isolation region may laterally surround the active region. The shallow trench isolation region may be located vertically above at least a part of the deep trench isolation region, and for example, may be in contact with the deep trench isolation region.

[0013] In an implementation, the SPAD sensor is a back-illuminated SPAD sensor and / or may form part of a stacked 3D CMOS wafer.

[0014] Generally, the SPAD device may be provided in any shape. However, in an implementation, the SPAD device may comprise a plurality of corner regions and a plurality of edge regions extending between the corner regions. For example, a square SPAD device may comprise four corner regions and four edge regions extending between the corner regions. In such an implementation, the lateral size or width of the contact region may be larger than the lateral size of the contact region along the edge region in one or more of the corner regions.

[0015] Due to the differentiated sizes of the contact regions within the corner region(s) and edge region(s) of the SPAD device, a further proportional increase in the size of the active area becomes easier, thereby improving the PDE of the device. Various structures are included within the scope of this implementation form. For example, the contact region can be provided only within one or more of the corner regions, only within some or all of the corner regions, or only within one of the corner regions. The contact region contacts can likewise be provided only within one or more of the corner regions.

[0016] In a further example, the contact region may include a doped region (for contacting the contact region contact) and a well region, and the doped region is located above the well region. The well region may be provided only within one or more of the corner regions, while the doped region may extend along one or more of the edge regions.

[0017] In some implementation forms, the active region may include a cathode region or an electrode, and the contact region may include an anode region or an electrode (e.g., an anode ring). In other implementation forms, the active region includes an anode region or an electrode, and the contact region includes a cathode region or an electrode (e.g., a cathode ring). Thus, the active region contact and the contact region contact may each be provided as an anode contact or a cathode contact.

[0018] Therefore, the metal contact layer connected to the active region contact and the contact region contact may be used as an anode metal connector or a cathode metal connector depending on the implementation form.

[0019] According to a further aspect of the present disclosure, a SPAD array is provided, the SPAD array comprising a plurality of SPAD sensors, each SPAD sensor comprising one or more anode contacts and one or more cathode contacts, each anode contact being connected to one or more anode metal connectors and each cathode contact being connected to one or more cathode metal connectors. The one or more anode metal connectors and the one or more cathode metal connectors are each formed within the same metal layer.

[0020] Optionally, the SPAD array according to the present disclosure may comprise a central hybrid junction region. The hybrid junction region may include at least a portion of each of the anode metal connectors or at least a portion of each of the cathode metal connectors, and each of the anode metal connectors or cathode metal connectors within the hybrid junction region provides a hybrid junction location.

[0021] At least one of the SPAD sensors within the SPAD array may be a SPAD sensor according to the present disclosure.

[0022] Advantageously, in such an array, it is sufficient to use a single metal layer level for both the anode metal connectors and the cathode metal connectors while still allowing routing of the metal layer to the central hybrid junction connection area. Thus, the present disclosure provides a SPAD array with improved utilization of the metal layer.

[0023] To facilitate this, the SPAD array may comprise one or more N×M SPAD sub-arrays, and the contact region contacts may be provided only along the outer periphery of the N×M SPAD sub-array. Here, N and M represent the number of SPAD sensors positioned in the vertical direction of the sub-array. For example, from the top view, a 2×3 SPAD sub-array has two SPAD sensors along the first side of the outer periphery of the sub-array and three SPAD sensors along the second side of the outer periphery of the sub-array, resulting in a rectangular sub-array with a total of six SPAD sensors. As described above, in an implementation form, the contact region contacts may form anode contacts or cathode contacts.

[0024] For example, the contact region contacts may be provided only within the corner regions along the outer periphery of the N×M SPAD sub-array, or only within one of the corner regions along the outer periphery of the N×M SPAD sub-array. Additionally or alternatively, in an implementation form, the contact region contacts may be provided on one or more edge regions along the outer periphery of the N×M SPAD sub-array. For example, in an array of square SPAD sensors, the sensors of the N×M sub-array may have contact region contacts in any combination of one, two, and three corner regions and zero, one, and two edge regions of the SPAD device, provided that the corner regions and edge regions are along the outer periphery of the N×M array.

[0025] In an implementation form, at least one of n and m may be equal to 2, for example, such that the SPAD sub-array is a 2×M sub-array. In the case of an array of square SPAD sensors, the use of such a 2×M sub-array may assist in the arrangement of the sub-arrays such that all SPAD sensors have at least one edge or corner region along the outer periphery of the sub-array. Preferably, both N and M may be equal to 2 such that the N×M sub-array is a 2×2 sub-array.

[0026] Here, some embodiments of the present disclosure will be described by way of example only with reference to the accompanying drawings.

Brief Description of the Drawings

[0027]

Figure 1A

Figure 1B

Figure 2A

Figure 2B

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Figure 4A

Figure 4B

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Figure 9

Modes for Carrying Out the Invention

[0028] Next, aspects of the present invention will be described with reference to exemplary embodiments. All of the following exemplary embodiments share a similar SPAD structure, which is merely an exemplary structure, and it should be understood that the present invention is not intended to be limited only to the structures shown in the exemplary embodiments. For example, the doping shown in the examples may be reversed (e.g., an n-type region exchanged with a p-type region, and vice versa), and / or the SPAD junction configuration may vary based on the intended purpose of the device. The following examples generally describe enhanced or fortified SPAD devices, but other known SPAD configurations, including but not limited to diffused guard rings and merged implant guard ring configurations, may also be implemented within the scope of the present invention.

[0029] Similarly, the SPAD structures shown below are symmetric (e.g., having the same pitch in each of the lateral (x and y) directions), but it is also within the scope of the present disclosure for the SPAD structure to be asymmetric (e.g., having different pitches in the lateral (x and y) directions). This also applies equally to the active region of the SPAD device, which may also be formed in a shape other than that shown, such as an octagon or a circle.

[0030] The layers forming the anode region and the cathode region (e.g., part of the active region and the contact region) can be different from the examples shown, and it will be further understood that the number of contacts within the anode region and the cathode region may also be different from that shown. For example, the active region and the contact region may be provided with any number of contact points, such as one, two, three, four, five, or more contacts, such as nine, sixteen, twenty-five, etc., as desired. However, in some implementations, fewer contacts within the active region may be preferred because a larger number of active region contacts may potentially reduce the efficiency of the backside illumination design.

[0031] An exemplary BSI-type SPAD device 100 is shown in FIG. 1. FIG. 1 includes FIG. 1A schematically showing a top view and FIG. 1B schematically showing a cross section along line 1-1 of FIG. 1A. The dashed arrows in both FIG. 1B and subsequent figures represent the path of incident light. It will be understood that the incident light can be incident on the SPAD device 100 from any angle. The SPAD device 100 includes an active region 102, a contact region 104, which is also commonly referred to as an anode or cathode ring, and an isolation region 106 including a deep trench isolation region 106a and a shallow trench isolation region 106b. The buried well layer or region 108, also called a deep well, is formed within the contact region 104 and may include a depletion region, for example, under and around the active region 102. In some implementations, the buried well layer may be doped only with the background doping of the wafer, and the depletion region may extend to a lower doped layer or substrate layer such as the p-well region 110. The isolation region 106 is provided across the outer periphery of the SPAD device 100, thereby separating the SPAD device 100 from, for example, other SPAD devices forming an array of SPAD devices. This separation can reduce crosstalk between adjacent devices and / or the dark count rate of the SPAD device 100. The SPAD device 100 may share the isolation region 106 with adjacent SPAD devices. The pitch of the SPAD device represents the repeat distance of the array of SPAD devices. For example, in an array of SPAD devices, the pitch may be the distance from the center of one SPAD device to the center of an adjacent SPAD device. Alternatively, the pitch of the SPAD devices in such an array may be, for example, the distance between the centers of the isolation regions 106 on both sides of the device.

[0032] In this example, the active region 102 includes an n+-doped cathode region 102b and a cathode contact 102a. A doped p-well region 102c is provided below the cathode region 102b, and avalanche breakdown occurs near the boundary of these regions. The contact region 104 forms an anode ring by means of an anode contact 104a. The contact region 104 includes a p+-doped region 104b and a doped p-well region 104c. A further doped p-well region 110 forms the bottommost layer or substrate of the device within the isolation region 106.

[0033] It will be appreciated that this exemplary implementation includes an anode ring, but alternatively the contact region 104 may form a cathode ring. Similarly, the active region 102 may include a cathode region or an anode region. Thus, the contacts 102a and 104a may more generally be referred to as active region contacts 102a and contact region contacts 104a, and the cathode region 102b may be referred to as the active region contact region or the second contact region. This applies equally to all further implementations disclosed herein.

[0034] In the SPAD device 100, the contact region 104 has uniform dimensions over the entire circumference of the device. In other words, the widths of the p+-doped region 104b and the p-well region 104c do not substantially vary over the entire device so that the anode contact 104a can be provided around the entire contact region 104.

[0035] As briefly described above, FIG. 1 shows a known BSI-type SPAD 100 having a deep trench isolation region 106a surrounding the active region 102 from the lateral direction. In the SPAD device 100 of FIG. 1, the width of the contact region 104 is substantially uniform over the entire circumference of the device 100. This is because the width of the contact region 104 is limited by the need to be sufficient to smooth the low-ohmic contact region contact 104a over the entire outer periphery of the device 100, and also because the minimum distance between the active region 102 and the contact region 104 is determined by the required lateral breakdown voltage value. This lateral breakdown voltage needs to be higher than the vertical breakdown voltage for a good SPAD with a low dark count rate and depends on the distance between the n+ region and the p+ regions 102b and 104b.

[0036] FIG. 2 shows an exemplary BSI-type SPAD 200. FIG. 2 includes FIG. 2A schematically showing a top view and FIG. 2B schematically showing a cross-section along line 2-2 of FIG. 2A. The SPAD device 200 shares a similar structure with the SPAD device 100, and corresponding features are labeled with the same reference numerals.

[0037] In contrast to the SPAD device 100, the contact region 204 of the SPAD device 200 has non-uniform dimensions across the periphery of the device 200. In particular, the widths of the p+-doped region 204b and the p-well region 204c are substantially larger at the corners of the device 200 than along the edges of the device 200. In this exemplary implementation, it will be appreciated that the contact region 204 is an anode ring. However, in an alternative implementation, the contact region 204 may be a cathode ring comprising n+-doped regions and n-well regions instead of the p+-doped region 204b and the p-well region 204c, respectively. This applies equally to all of the following exemplary implementations. Thus, as shown in FIG. 2, since the width of the contact region 204 along the edge region may not be sufficient to smooth the low-ohmic contacts along the edge of the device, the contact region 204 may comprise contact region (e.g., anode) contacts 204a only in the corner regions. However, it will be appreciated that the SPAD device 200 need not be symmetric and one, two, or three edge regions may include a contact region 204 sufficient to smooth such contacts along those edges.

[0038] Reducing the size of the contact region 204 in the edge region of the SPAD device 200 facilitates an increase in the relative size of the active area of the device 200 compared to the device 100. As a result, the improved fill factor of the SPAD device 200 results in an improvement in the PDE.

[0039] Advantageously, since the contact region 204 surrounds the active region laterally, it is not essential for the isolation region 106 to be provided within the device 200, but it is still preferably provided to help separate the SPAD device 200 from any adjacent SPAD devices. For example, in some implementations, including the deep trench isolation region 106a can reduce crosstalk between adjacent devices from about 10% of the measurement signal to about 2.5% or less of the measurement signal. The deep trench isolation region 106a may be filled or partially filled with a dielectric material and / or metal. Optionally, and as described above, the isolation region 106 may further comprise a shallow trench isolation region 106b above the deep trench isolation region 106a.

[0040] FIG. 3 shows a further example of a BSI-type SPAD 300. FIG. 3 includes FIG. 3A schematically showing a top view and FIG. 3B schematically showing a cross-section along line 3-3 of FIG. 3A. The SPAD device 300 also shares the same structure as the SPAD device 100, and corresponding features are labeled with the same reference numerals.

[0041] In the SPAD device 300, the contact region 304 including the p+-doped region 304b and the p-well region 304c is formed only in the corner regions of the device 300 such that the contact region 304 does not completely laterally surround the active region 102. Thus, the contact region 304 may include a contact region (e.g., an anode) contact 304a only within the corner regions. However, the SPAD device 300 does not need to be symmetric, and it will be understood that one or more corners of the SPAD device 300 may not include the contact region 304 such that the contact region (and thus the contact region contact 304a) is provided only at one, two, or three corners of the device. Similarly, some of the edge regions, such as one, two, or three of the edge regions, may include the contact region 304. The contact region 304 in these edge regions may be sufficient to smooth the contacts along these edges or may be provided to assist in separating the device without smoothing the use of additional contacts.

[0042] Removal of the contact region 304 in some or all of the edge regions of the SPAD device 300 facilitates a further increase in the size of the active area of the device 300 compared to the devices 100 and / or 200. As a result, the improved fill factor of the SPAD device 300 results in a further improvement in the PDE. However, in this implementation, it is particularly preferred to provide an isolation region 106 (such as at least a deep trench isolation region 106a and optionally a shallow trench isolation region 106b, etc.) across the outer periphery of the device 300 to reduce crosstalk with any adjacent devices and facilitate electrical isolation therebetween.

[0043] Figure 4 shows a further example of the BSI-type SPAD 400. Figure 4 includes Figure 4A which schematically shows a top view, and Figure 4B which schematically shows a cross-section along line 4-4 of Figure 4A. The SPAD device 400 also shares the same structure as the SPAD device 100, and corresponding features are labeled with the same reference numbers.

[0044] In the SPAD device 400, the contact region 404 includes a p+-doped region 404b and a p-well region 404c. The p+-doped region 404b forms a complete ring that laterally surrounds the active region 102, while the p-well region 404c is provided only within the corner regions of the device 400. It should also be understood that the SPAD device 400 does not need to be symmetric, and one, two, or three of the edge regions may include the contact region 404 that includes both the p+-doped region 404b and the p-well region 404c.

[0045] Advantageously, the structure of the contact region 404 in the SPAD device 400 facilitates an increase in the size of the active area of the device 400 compared to, for example, the devices 100 and 200, and also improves the isolation of the SPAD device 400 compared to the device 300. As a result, the structure shown in Figure 4 can provide a balance between an improved fill factor (and thus an improvement in PDE) and a reduced dark count rate and / or crosstalk between adjacent devices.

[0046] As described above, the examples described in this specification are not intended to limit the scope of the present invention, and alternative devices not shown are considered to be within the scope of the present invention. For example, the doping shown in the examples may be reversed such that the contact regions 204, 304, 404 form cathode rings instead of anode rings (e.g., an n-type region exchanged with a p-type region, and vice versa). Similarly, the devices 200, 300, 400 may be formed in other shapes such as, for example, octagons or circles. Further, it will be understood that features from the exemplary SPAD sensors may be combined as needed. For example, a single device may include a first edge region having a contact region as shown in FIG. 2, a second edge region having a contact region as shown in FIG. 3, and a third edge region having a contact region as shown in FIG. 4. Any other combination is also contemplated within the scope of the present disclosure.

[0047] In particular, each exemplary device may have contact regions 204a, 304a, 404a provided in some, but not all, of the corner regions, such as one, two, or three of the corner regions. Similarly, each exemplary device may have contact regions 204a, 304a, 404a provided in some, but not all, of the edge regions, such as one, two, or three of the edge regions.

[0048] An exemplary SPAD array 500 is shown in FIG. 5. The SPAD array 500 may comprise, for example, a 4×4 array of SPAD devices such as the SPAD device 100 of FIG. 1. Each SPAD device of the array 500 comprises a contact region contact 502 electrically connected to a shared first metal layer 506 (shown with cross diagonal hatching), while a second metal layer 508 (shown with vertical / horizontal hatching) is electrically connected to the first metal layer via vias 512 (here shown as dashed squares surrounding each of the active region contacts 504). Each metal connection or connector part of the second metal layer 508 comprises a hybrid contact junction site 510 (shown with left diagonal hatching). The contact region contact 502 and the active region contact 504 are both shown with right diagonal hatching. The contact region contact 502 is shown at the corners of each SPAD device, but more generally may be provided across the entire outer perimeter of each device, as shown in FIG. 1. On the other hand, the active region contact 504 is provided within the active area (i.e., approximately in the center) within each SPAD device.

[0049] Such a 4×4 array may form a subset of a larger array (e.g., 320×240). The 4×4 array may be replicated to achieve the required total array size. In such an array, it is necessary to connect all SPAD cathodes to a quenching circuit that forms part of a complementary metal oxide semiconductor (CMOS) circuit on a 3d stacked CMOS wafer. The CMOS core voltage of advanced CMOS nodes is typically small (e.g., about 0.9V), and thus, in the quenching circuit, IO transistors that can withstand a higher voltage (e.g., about 3.3V) are used to enable a high excess bias voltage (e.g., about 3.0V). As a result, typically, a large gap is required between the CMOS core and the quenching circuit IO transistors due to different voltage domains.

[0050] Therefore, it is beneficial for the quenching circuits for some of the SPADs in the SPAD array to be located in close proximity or adjacent to each other. These clusters of SPADs may also share CMOS circuits such as a time - digital converter (TDC) and histogram memory. Thus, the SPAD array 500 of FIG. 5 provides hybrid bonding sites for all 16 SPADs of a 4×4 array within a local area. To achieve this, the first metal layer 506 and the second metal layer 508 overlap and thus must be provided as separate layers within the 3D stacked - type SPAD wafer of the SPAD array 500.

[0051] In contrast, when the hybrid bonding sites are arranged within the SPAD pitch of each SPAD device, the use of one or more metallization layers of the CMOS wafer can be restricted. This can thus significantly constrain the CMOS wafer.

[0052] In some cases, it is desirable to combine SPAD devices into an array comprising a plurality of SPAD devices. One such exemplary 4×4 SPAD array 500 is shown in FIG. 5. As described above, the SPAD array 500 comprises the first metal layer 506 and the second metal layer 508 which are overlapped and thus are provided as separate layers within the 3D stacked - type SPAD wafer of the SPAD array 500.

[0053] FIG. 6 shows a top view of a 4×4 SPAD array 600. The SPAD array 600 may comprise one or more SPAD devices, such as those shown in FIGS. 2, 3, and 4, or any other suitable SPAD device. Similar to the array 500, the 4×4 array 600 may form a subset of a larger array (e.g., 320×240), and the 4×4 array 600 may be replicated to achieve the required total array size. The color coding in FIG. 6 is the same as the color coding in FIG. 5, and the right diagonal hatching, cross diagonal hatching, and left diagonal hatching represent the anode / cathode contact 602, the first metal layer 604, and the hybrid junction site 606, respectively.

[0054] In the SPAD array 600, each SPAD device includes an active region contact 602a connected to an active region metal connector (also referred to as a hybrid junction metal connector) 604a and a contact region contact 602b connected to a contact region metal connector 604b. The active region metal connector 604a and the contact region metal connector 604b may also be referred to as an anode metal connector and a cathode metal connector, respectively. It will be appreciated that either region 604a and 604b may form an anode connector or a cathode connector depending on the configuration (e.g., layer doping) of the SPAD device.

[0055] In the array 600, each SPAD device includes a contact region contact 602b in only a single corner region. In this way, the contact region metal connector 604b need not be provided across the outer periphery of all SPAD devices in the array 600, and it is sufficient to use a single metal layer level for both the hybrid junction metal connector 604a and the contact region metal connector 604b while still allowing routing of the hybrid junction metal connector 604a to a central hybrid junction connection area with the hybrid junction site 606. Thus, the array 600 provides a 3D stacked SPAD wafer structure with improved metal layer utilization.

[0056] The structure of the array 600 is not limited to use with SPAD devices having contact region contacts only within a single corner region, and it will be understood that SPAD devices having contact region contacts within two, three, or four corner regions of the SPAD device may also be utilized. Similarly, such an array structure may also be implemented using SPAD devices having contact region contacts along one, two, or three edge regions of the SPAD device, or any combination of one, two, three, and four corner regions and zero, one, two, and three edge regions.

[0057] In an implementation, the SPAD array may comprise a plurality of N×M sub-arrays, where N and M are integers. For example, the 4×4 array 600 shown in FIG. 6 comprises a plurality of exemplary 2×2 sub-arrays 608, where N represents the number of SPAD sensors in a first (e.g., y) direction and M represents the number of SPAD sensors in a second (e.g., x) direction. N and M may be other integer values and / or may each be different integer values, and it will be understood that sub-arrays such as the 2×2 sub-array 608 may be utilized as independent 2×2 arrays. Similarly, larger arrays that may themselves comprise sub-arrays (such as the 4×4 array 600) may form sub-arrays of a larger array. For example, as described above, the 4×4 array 600 may form a subset of a larger, e.g., 320×240 array, and the 4×4 array 600 may be replicated to achieve the required total array size or combined with other suitable (sub)arrays. Thus, the sub-array(s) may generally represent the smallest repeatable pattern(s) of SPAD sensors used to form a particular implementation of the SPAD array.

[0058] Further exemplary arrays are shown in FIGS. 7 and 8. FIG. 7 shows a top view of an exemplary 3×3 SPAD array 700, and FIG. 8 shows an exemplary 3×2 SPAD array 800. In both cases, features corresponding to features of the array 600 are given like reference numerals.

[0059] In both the array 700 and the array 800, the array structure enables the use of a single metal layer 604 level for both the hybrid junction metal connector 604a and the contact region metal connector 604b, while still enabling the routing of the hybrid junction metal connector 604a to the central hybrid junction connection area with the hybrid junction site 606. Thus, similar to the array 600, the arrays 700 and 800 provide a 3D stacked SPAD wafer structure with improved metal layer utilization.

[0060] In some implementations, the contact region contacts 602b may be provided only along the outer periphery of the array and / or along the outer periphery of the N×M sub-arrays. For example, in FIG. 6, the contact region contacts 602b are provided only along the outer periphery of the 2×2 sub-array 608. Thus, the array and / or sub-array may comprise any number of SPAD devices, but preferably, the array (or the sub-array forming a larger array) is an N×M array, and at least one of N and M is equal to 1 or 2 such that all SPAD sensors within the array include at least one corner or edge region along the outer periphery of the sub-array.

[0061] More generally, it will be understood that the SPAD sub-array or array may take any shape formed by SPAD sensors, including an asymmetric shape that cannot be described using the format of an N×M grid.

[0062] FIG. 9 shows an exemplary 3D stacked CMOS wafer 900. The 3D stacked wafer 900 includes a SPAD sensor 902 and a CMOS wafer layer 904 that forms part of a CMOS circuit. The SPAD sensor 902 and the CMOS circuit are connected by a hybrid junction 906 including a hybrid junction region such as the hybrid junction region 606 shown in FIGS. 6 to 8 or a contact 906a. The 3D stacked CMOS wafer 900 further includes an active region metal connector 910a and a contact region metal connector 910b formed from a single metal layer, which are respectively connected to the SPAD sensor 902 by active region contacts and contact region contacts 908a, b.

[0063] Those skilled in the art will understand that in the foregoing description and the appended claims, positional terms such as "above", "along", "side", etc. are described with reference to conceptual diagrams such as those shown in the accompanying drawings. These terms are used for ease of reference and are not intended to be of a limiting nature. Therefore, these terms should be understood to refer to an object when it is in the orientation shown in the accompanying drawings.

[0064] As described above, the present disclosure has been described from the perspective of preferred embodiments, but it should be understood that these embodiments are merely illustrative and the claims are not limited to these embodiments. Those skilled in the art will be able to create amendments and alternatives that are considered to be within the scope of the appended claims in view of the present disclosure. Each feature disclosed or exemplified in this specification may be incorporated into any embodiment, alone or in any suitable combination with any other feature disclosed or exemplified in this specification.

Description of Reference Numerals

[0065] 100 SPAD sensor 102 Active region 102a Active region contact 102b Cathode region 102c Well region 104 Contact Region 104a Contact Region Contact 104b Doped Region 104c Well Region 106 Isolation Region 106a Deep Trench Isolation Region 106b Shallow Trench Isolation Region 108 Buried Well Layer 110 Well Region 200 SPAD Sensor 204 Contact Region 204a Contact Region Contact 204b Doped Region 204c Well Region 300 SPAD Sensor 304 Contact Region 304a Contact Region Contact 304b Doped Region 304c Well Region 400 SPAD Sensor 404 Contact Region 404a Contact Region Contact 404b Doped Region 404c Well Region 500 SPAD Array 502 Contact Region Contact 504 Active Region Contact 506 First Metal Layer 508 Second Metal Layer 510 Hybrid Junction Site 600 SPAD Array 602 Anode / Cathode Contact 602a Active Region Contact 602b Contact Region Contact 604 Metal Layer 604a Active Region Metal Connector 604b Contact Region Metal Connector 606 Hybrid Junction Site 608 SPAD Sub-array 700 SPAD Array 800 SPAD Array 900 3D Stacked Wafer 902 SPAD Sensor 904 CMOS Wafer Layer 906 Hybrid Bonding 906a Hybrid Bonding Contact 908a Active Region Contact 908b Contact Region Contact 910a Active Region Metal Connector 910b Contact Region Metal Connector

Claims

1. A single photon avalanche diode (SPAD) sensor (200, 300, 400), comprising: An active region (102) having one or more active region contacts (102a); A deep isolation region (106a) along the outer periphery of the SPAD sensor; A contact region (204, 304, 404) between the active region and the deep isolation region, the contact region comprising one or more contact region contacts (204a); An embedded well region (208, 308, 408) between the contact region and the active region; And comprising The size of the contact region varies along the periphery of the SPAD device. A single photon avalanche diode (SPAD) sensor (200, 300, 400).

2. The SPAD sensor according to claim 1, wherein the SPAD sensor is a back-illuminated SPAD sensor.

3. The SPAD sensor according to claim 1 or 2, further comprising a shallow isolation region (106b) along the outer periphery of the SPAD sensor, and optionally, the shallow isolation region is located above the deep isolation region.

4. The SPAD device comprises a plurality of corner regions and a plurality of edge regions extending between the corner regions. The size of the contact region is larger in one or more of the corner regions than the size of the contact region along the edge region. The SPAD sensor according to any one of claims 1 to 3.

5. The contact region comprises a well region (204c, 304c, 404c) and a doped region (204b, 304b, 404b) above the well region, and the one or more contact region contacts are in electrical contact with the doped region. The well region is located only within one or more of the corner regions, and the doped region extends along the edge region. The SPAD sensor according to claim 4.

6. The contact region is located only within one or more of the corner regions, optionally, the contact region is located only within some but not all of the corner regions, and further optionally, the contact region is provided within only one of the corner regions. The SPAD sensor according to claim 4.

7. The contact of the contact region is located only within one or more of the corner regions. The SPAD sensor according to any one of claims 4 to 6.

8. The active region includes a cathode region, and the contact region includes an anode region. The SPAD sensor according to any one of claims 1 to 7.

9. The active region includes an anode region, and the contact region includes a cathode region. The SPAD sensor according to any one of claims 1 to 12.

10. A plurality of SPAD sensors, each SPAD sensor includes one or more anode contacts (602a) and one or more cathode contacts (602b), each of the anode contacts is connected to one or more anode metal connectors (604a), and each of the cathode contacts is connected to one or more cathode metal connectors (604b). A plurality of SPAD sensors, A hybrid junction region, the hybrid junction region includes at least a part of each of the anode metal connectors or at least a part of each of the cathode metal connectors. A hybrid junction region, Comprising, Each of the one or more anode metal connectors and the one or more cathode metal connectors is formed within the same metal layer (604). SPAD array (600, 700, 800).

11. At least one of the SPAD sensors is the SPAD sensor (200, 300, 400) according to any one of claims 1 to 9. The SPAD array according to claim 10.

12. The SPAD array includes one or more N×M SPAD sub-arrays (608), where N and M are integers representing the number of SPAD sensors along the horizontal and vertical axes of the SPAD sub-array, The one or more anode contacts or the one or more cathode contacts are located only along the outer periphery of the N×M SPAD sub-array, Optionally, one or both of N and M are 2 or less. The SPAD array according to claim 10 or 11.

13. The SPAD array according to any one of claims 10 to 12, wherein the one or more anode contacts or the one or more cathode contacts are located only within the corner regions of each SPAD sensor, and optionally, the one or more anode contacts or the one or more cathode contacts are provided only within one corner region of each SPAD sensor.

14. The SPAD array according to any one of claims 11 to 13, wherein the deep isolation region (106a) is shared between adjacent SPAD sensors.

15. A three-dimensional (3D) stacked wafer comprising one or more SPAD sensors (200, 300, 400) according to any one of claims 1 to 9 or a SPAD array according to any one of claims 10 to 14, and optionally, the 3D stacked wafer is a 3D stacked complementary metal oxide semiconductor (CMOS) wafer.

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