Ultra-fast current probe

Abstract

A radio / microwave frequency current probe comprising one or more resistive elements electrically connected between a current input region and a current output region, and a stack of layers each comprising a dielectric material. For each of the resistive elements, the current probe further comprises a plurality of conductive paths each separated by one or more layers. A first set of conductive paths is configured to provide a current path between the current input region and the resistive elements, and a second set of conductive paths is configured to provide a current path between the resistive elements and the current output region. The plurality of conductive paths are arranged such that the first and second sets of conductive paths are alternately arranged within the stack of layers. The current probe may also be incorporated into a current measurement system.

Description

[Technical field]

[0001] The present disclosure relates to an ultrafast current probe suitable for use in a current measurement system, and to a current probe and measurement system including the ultrafast current probe. [Background technology]

[0002] The present disclosure generally provides current probes, and in particular, ultra-high speed current probes suitable for use in systems measuring currents with fast switching speeds, such as probes having microwave and / or radio frequency (RF) bandwidths.

[0003] There are currently many measurement systems available on the market, each with different advantages and disadvantages, while further systems have been proposed which attempt to address the shortcomings of existing commercially available solutions.

[0004] For example, many existing systems utilize Rogowski coils to perform magnetic measurements using the principles of magnetic induction. These systems typically include measurement circuitry that can simultaneously measure both the high and low sides of the power loop. However, due to their reliance on induction, Rogowski coil-based systems cannot measure DC current and require a separate, low-bandwidth measurement system to monitor DC parameters such as transistor on-state losses. Additionally, Rogowski coils require an output integrator to convert the induced voltage in the coil into a current measurement. Therefore, the high-frequency performance of Rogowski coils is typically limited by the performance of the integrator and the turn-to-turn capacitance of the coil itself.

[0005] Other existing systems utilize coaxial current shunts to measure the voltage drop across a resistor of known value. Such systems typically offer bandpass bandwidth in the GHz range and provide reasonable measurement shielding due to the low mutual inductance between the power and measurement loops due to their enclosed construction. However, these systems typically have a large insertion inductance that can generate voltages large enough to damage semiconductor devices and can also promote ringing in the power loop. Furthermore, some of this inductance often appears across the measurement terminals of the device, thereby introducing an inductive zero into the frequency response transfer function. This inductive zero (also called a parasitic zero) results in a scaled derivative of the real current being present in the output signal and can degrade the accuracy of the measurement if the frequency of the parasitic zero is within the frequencies of interest (i.e., the frequencies being measured in a particular test).

[0006] Thus, current measurement systems for testing wide bandgap devices have significant limiting factors in wide bandgap device measurements. These factors include, for example, bandwidth, signal distortion, insertion inductance, and device footprint. These limiting factors become increasingly problematic as switching edges move to times of 10 ns or less, and commercially available current probes are not suitable for such purposes. For example, Figure 9 shows the frequency response of a known coaxial current probe with an insertion inductance of about 6.5 nH. With a differentiator-type response, the “flat” ±3 dB probe bandwidth is limited to only 79.3 MHz, with resonant peaks at 235 MHz and 2 GHz due to the large inductance of the system. This large inductance can resonate with the capacitance of the circuit or device being tested, further distorting the measurement results and reducing accuracy. To extend the “flat” portion of the bandwidth, high bandwidth current probes often require large resistances of tens to hundreds of milliohms.

[0007] Nanosecond and sub-nanosecond switching times offer several advantages, such as lower switching losses, higher switching frequencies, and smaller passive components. However, such fast switching times require high current change rates, making power devices more susceptible to overvoltages due to parasitic inductances in the power loop. This makes it challenging to accurately measure the switching current of the device, which in turn makes it difficult to accurately measure the switching energy and stored charge of the device.

[0008] As a result, conventional current measurement systems and methods such as those described above do not have the frequency response required to accurately see switching edges at high frequencies and / or have high parasitic inductances that can significantly alter switching performance and potentially damage power devices.

[0009] Therefore, applicants have recognized a need for current measurement systems and components suitable for high switching frequencies. Summary of the Invention [Means for solving the problem]

[0010] In general, aspects of the present disclosure may provide a measurement system that addresses the problems discussed above. Broadly speaking, aspects of the present disclosure provide an ultra-fast current probe that utilizes mutual inductance cancellation to reduce its inductance and / or extend its bandwidth to radio (e.g., MHz) and / or microwave (e.g., GHz) frequencies and beyond, thereby facilitating its use in making accurate measurements of currents having higher switching speeds (e.g., greater than 10 or 100 A / nS) and / or shorter switching transients (e.g., nanosecond or sub-nanosecond switching periods).

[0011] According to a first aspect of the disclosure, a radio / microwave frequency current probe is provided that includes a stack of layers, each layer including a dielectric material, and one or more resistive elements electrically connected between a current input region and a current output region. For each of the one or more resistive elements, the current probe includes a plurality of conductive paths, each separated by one or more layers, a first set of conductive paths configured to provide a current path between the current input region and the resistive element, and a second set of conductive paths configured to provide a current path between the resistive element and the current output region. The plurality of conductive paths are arranged or interleaved such that the first and second sets of conductive paths alternate within the stack of layers.

[0012] In general, the mutual inductance cancellation between the input and output currents of a current probe helps to reduce the total inductance of the current loop. In addition, the stack of dielectric layers improves the mechanical strength of the probe, reducing the risk of failure due to mechanical stress.

[0013] An ideal current probe would generally facilitate the creation of a low inductance, low capacitance, high bandwidth measurement system, but the capacitance and inductance of a circuit are generally not completely independent, and a design that achieves both low inductance and low capacitance is often not possible.

[0014] Current measurement systems generally tolerate current probes with high capacitance better than current probes with high inductance because many devices being measured using the measurement systems themselves have relatively high capacitance. As a result, the current probes described herein aim to provide low inductance and high bandwidth, but at the cost of a potentially higher current probe capacitance.

[0015] The current probe is formed from a stack of layers, such as dielectric layers. The current input region and the current output region can be provided on opposite sides of the stack of layers. For example, the current input region can be provided on the "upper" surface of the stack and the current output region can be provided on the "lower" surface of the stack, such that the input region and the output region are separated in the stacking direction. As used herein, stacking direction or dimension refers to the direction of separation between the upper and lower layers of the stack of layers. By providing the input region and the output region on opposite sides of the stack, the current probe can be conveniently inserted and / or connected to an external system, for example, by a soldered connection or a clamp connection, such as a busbar connection, thereby improving the versatility of the device. The input region and the output region can be aligned on opposite sides of the stack, i.e., such that the input / output regions are separated only in the stacking direction, which can further improve the ease of connection of the current probe to an external system.

[0016] In implementations, the interconnect region between the current probe and the external system can include a multi-layer structure similar to that described with respect to the current probe, e.g., multiple current paths separated by dielectric layers. The multi-layer structure in the interconnect region can facilitate mutual induction cancellation of insertion inductance, thereby reducing the overall system inductance.

[0017] The resistive element may be attached to the surface of the stack of layers, preferably located on the surface of the stack so as to be spatially separated from the input and / or output regions. For example, the current input region and the resistive element may both be located on the "upper" surface of the stack of layers and separated laterally and / or longitudinally perpendicular to the stacking direction. Thus, the currents flowing between the resistive element and the input / output region may flow in opposite directions, respectively, and in both cases perpendicular to the stacking direction. Thus, the resistive element may comprise any suitable surface mounted device (SMD) that can be deposited or directly attached on the stack of layers, such as an SMD resistor or resistive film. In further implementations, the resistive element may be combined with or replaced by one or more other suitable passive sensing elements. For example, the resistive element may be replaced by a (PCB-based) Rogowski coil or a current transformer.

[0018] Thus, conductive paths are provided between the resistive elements and the input / output regions. The conductive paths may be provided on the upper and / or lower surfaces of the stack of layers, or on some or all of the stack of layers. The set of conductive paths providing a current path between the input regions and the resistive elements may be collectively referred to as input conductive paths or input current paths, and the set of conductive paths providing a current path between the output regions and the resistive elements may be collectively referred to as output conductive paths or output current paths. The sets of input conductive paths and output conductive paths may be connected by input path vias and output path vias, respectively.

[0019] The input and output current paths are alternated in the stack of layers such that the input and output current paths are interleaved in the stacking direction. For example, in a stack comprising a first layer, a third layer, and a second layer between the first and third layers, the "upper" surface of the stack (e.g., corresponding to the "upper" surface of the first layer) may constitute a first input current path between the current input region and the resistive element. A first output current path may be provided between the first and second layers. A second input current path may be provided between the second and third layers and may be connected to the first input current path by a via such that the first input path and the second input path form an input current loop between the current input region and the resistive element. A second output current path may be provided on the "lower" surface of the third layer and may be similarly connected to the first output current path by a via such that the first and second output paths form an output current loop between the resistive element and the current output region. In this manner, the stack of layers comprises a series of interleaved input and output current paths, with the input and output current paths alternating in the stacking direction (i.e., a given layer of the stack of layers has an input current path along one surface and an output current path along the opposite surface).

[0020] It will be appreciated that the above structure can be generalized to a current probe having a stack of any number of layers, however, in an implementation, the stack has an odd number of layers such that the current probe has the same number of input and output conductive paths.

[0021] Since the input and output current paths are provided along the surfaces of the laminated layers, they generally carry parallel currents that flow in opposite directions (i.e., between the (current) input region and the resistive element for the input current path, and between the (current) output region and the resistive element for the output current path). The opposite flow directions of the input and output currents create a mutual inductance between the input and output current paths, which facilitates mutual inductance cancellation and reduces the total inductance over the current paths or loops between the input and output regions. Advantageously, by providing input and output current loops each with multiple input and output current paths (as described in the examples above), the total mutual inductance between the current input and output paths can be increased, facilitating further reduction in the total inductance of the current probe.

[0022] Each layer of the stack of layers may be formed from a dielectric material suitable for radio and / or microwave frequencies, such as FR-4, a ceramic material, a polymer (such as polyimide), and / or any other suitable material. In an implementation, some or all of the layers may be formed from different materials. The materials forming the layers may be selected based on material properties to achieve, for example, a desired environmental / temperature resistance, better material consistency, etc. As an example, the current probe may be formed on a multi-layer PCB, such as a PCB formed from FR-4. Alternatively, the current probe may be formed on a single layer substrate (such as a single layer PCB) with additional dielectric layers deposited on the substrate. The reduced thickness of the multiple dielectric layers may result in higher capacitance and greater mutual inductance cancellation between the input and output current paths when compared to, for example, a single layer PCB of comparable thickness that provides only single input and output current paths along the top and bottom surfaces of the PCB, respectively.

[0023] Each layer of the stack of layers can have a thickness of less than about 200 μm, for example, between about 50 μm and about 200 μm. The thickness of the layers can be as small as possible, within the mechanical and manufacturing constraints of a particular implementation of the probe. In some implementations, one or more layers may be provided with an increased thickness (e.g., between about 200 μm and about 1000 μm) to facilitate a reduction in the thickness of other layers of the stack while retaining adequate mechanical strength of the current probe as a whole. The thicker layer or layers can constitute an intermediate layer or substrate layer, which may also be referred to as a core.

[0024] Thus, the stack of layers in the current probe advantageously provides lower probe inductance while maintaining the mechanical strength of a single layer design of comparable thickness. The multi-layer structure of the current probe of the present disclosure is therefore particularly suitable for use in insertion current probes, due to the generally higher inductance of this connection method (e.g., compared to buried current probes) and the need to handle insertion current probes while inserted into an external system (and thus subject to higher mechanical stress) or while connected to other parts of a measurement system (e.g., an oscilloscope).

[0025] It will be appreciated that for a given number of layers, generally speaking, using layers of greater thickness can improve the mechanical strength of the current probe, while using layers of lesser thickness can improve mutual inductance cancellation between the input and output currents along the interleaved conductive paths.

[0026] In implementations, the current probe may include multiple resistive elements. Using multiple resistive elements, each with a higher impedance, to provide the desired impedance rather than a single low impedance element may reduce the skin effect experienced by the current probe, which may otherwise increase significantly in element resistance at high switching frequencies. The multiple resistive elements may be arranged in any manner. In one implementation, the resistive elements may be arranged in a semicircle, for example, by spacing the resistive elements at equal angles to form curved edges of the semicircle. This proper arrangement of angles and spacing of adjacent resistive elements may reduce the proximity effect and reduce the impact of high switching frequencies on the overall impedance of the current probe. Additionally or alternatively, the resistive elements may be arranged to reduce or minimize the overall size of the current probe, making the current probe more compact.

[0027] More generally, placing a resistive element in parallel reduces the insertion inductance of the current probe and places the inductive or parasitic zero at a higher frequency, thereby increasing the bandwidth of the unfiltered probe and making this term less likely to interfere with voltage measurements at frequencies of interest. It will be appreciated that any resistive shunt will introduce a parasitic zero term into the voltage measurement, as described below.

[0028] Additionally, the use of multiple resistive elements connected in parallel can raise the resonant frequency of the current probe, thereby moving it away from the frequency of interest. It will be appreciated that the resonant frequency of the current probe depends on several factors, including the inductance of the probe.

[0029] The resistive element may be mounted to the stack of layers such that the conductive path provided by the element is adjacent to the stack of layers. For example, it will be appreciated that some SMD resistors include projections (also referred to as "feet" or "legs") that are connected perpendicularly or nearly perpendicularly to a flat conductive surface (also referred to as a "face") that is connected to a ceramic substrate. Such SMD resistors may be mounted such that their faces (rather than their legs) are adjacent to the stack of layers. Configuring the resistive element in this manner reduces the distance between the current path through the resistive element and the conductive path, allowing for increased mutual inductance cancellation between the resistive element and the conductive path.

[0030] A current probe according to the present disclosure can be incorporated into a current measurement system. Thus, according to a second aspect, a current measurement system is provided, including one or more current probes according to the present disclosure. The system may facilitate measurement of high switching speed currents with high accuracy and low distortion (due to a current probe having a high bandwidth) while reducing the electrical load (inductive, resistive, capacitive load) on the device under test (due to reduced inductance of the current probe). It will be appreciated that high inductive loads may be particularly problematic in some systems, as they may cause voltage spikes and damage the device being measured / tested. Similarly, many systems using resistive current shunts have high inductance and no filters, making the bandwidth highly dependent on the size of the resistor. The current probes described herein allow for the use of smaller resistors, reducing the resistive load of the system while minimizing the impact on the bandwidth (e.g., due to low inductance and / or the addition of filters).

[0031] In an implementation, the system may include a compensation filter arranged to receive an output signal from the one or more current probes, the compensation filter configured to reduce or eliminate an inductive or parasitic zero from the output of the one or more current probes. Providing a compensation filter that reduces or eliminates the inductive zero of the current probe may increase the accuracy of measurements provided by the current probe at high switching frequencies, especially when the parasitic zero of the current probe is otherwise present within the frequency of interest. In an implementation, the filter may be a low pass filter, such as an inductive low pass filter. The use of an inductive filter advantageously facilitates tuning the inductance and resistance of the filter for the intended purpose. Thus, inductive filters may be preferred over capacitive feedback low pass filters, since some high bandwidth differential amplifiers require a specific feedback resistor to achieve maximum bandwidth, but these filters only vary the size of the capacitor.

[0032] In further implementations, the filter may comprise one or more resistive elements connected to a reference voltage. Utilizing multiple resistive elements connected in parallel may reduce the total inductance, and therefore the total reactance, of the filter system due to the reduced parasitic inductive reactance of the resistive elements. Advantageously, lower filter inductance may move additional unwanted filter poles or zeros away from the frequencies of interest, reducing or preventing distortion of the frequency response within the measurement frequency range. In other implementations, the filter may be a passive filter, and the passive components of the filter may constitute some or all of the input impedance of an oscilloscope or other measurement device.

[0033] Also, having multiple resistive elements connected in parallel can reduce the overall resistance of the filter system compared to a system having a single resistive element. Thus, the multiple resistive elements may each have a higher resistance than a comparable single resistive element to reduce the effects of skin effect while maintaining the overall resistance of the system. It will be appreciated that the multiple resistive elements of the compensation filter can also be arranged to reduce the proximity effect, as discussed above with respect to the multiple resistive elements of the current probe.

[0034] The system may further include one or more differential amplifier stages for amplifying the signal output from the compensation filter and providing common mode noise rejection. The output of the differential amplifier stages may be provided to an external system or component, such as an oscilloscope. In this manner, the output of the differential amplifier stages may be configured based on the requirements of the external system input. For example, the system may provide an output suitable for the input of an oscilloscope. In an implementation, the system may be a passive system without a differential amplifier stage.

[0035] The current probe and / or system of the present invention may be provided in the form of a single product or device. For example, the current probe and / or system may be formed by depositing or positioning components on a printed circuit board.

[0036] According to a third aspect, there is provided a method of reducing inductance of a current probe. The method includes providing a first set of conductive paths and a second set of conductive paths in a stack of layers, each layer comprising a dielectric material, and arranging the first set of conductive paths and the second set of conductive paths in an alternating or interleaved manner within the stack of layers. The method further includes providing an input current through the first set of conductive paths and providing an output current through the second set of conductive paths, thereby reducing the inductance of the current probe due to mutual inductance cancellation between the first set of conductive paths and the second set of conductive paths.

[0037] According to a fourth aspect there is provided a method of measuring current at microwave / radio frequencies comprising providing an input current to a current probe, reducing the inductance of the current probe according to the third aspect, receiving an output signal from the current probe, the output signal being representative of a current through the current probe, and providing the output signal to a measurement system.

[0038] The output signal provides a representation of the current in the probe that can be interpreted and / or displayed by an external measurement device or system, such as an oscilloscope. The output signal may be an output voltage or may be proportional to the current flowing through the current probe (and thus, generally, the input current).

[0039] It will be appreciated that additional features and steps described in connection with the devices, systems and devices of the present disclosure may be incorporated into the methods.

[0040] Some embodiments of the present disclosure will now be described, by way of example only, and with reference to the accompanying drawings, in which: [Brief description of the drawings]

[0041] [Figure 1] FIG. 1 is a schematic diagram illustrating a cross-sectional view of a current probe according to the present disclosure. [Diagram 2] FIG. 2 is a schematic diagram illustrating a cross-sectional view of a current probe according to the present disclosure. [Figure 3a] FIG. 3 is a schematic diagram illustrating top (FIGS. 3a, d), bottom (FIG. 3c) and side (FIG. 3b) views of an example current probe according to the present disclosure. [Figure 3b] FIG. 3 is a schematic diagram illustrating top (FIGS. 3a, d), bottom (FIG. 3c) and side (FIG. 3b) views of an example current probe according to the present disclosure. [Figure 3c] FIG. 3 is a schematic diagram illustrating top (FIGS. 3a, d), bottom (FIG. 3c) and side (FIG. 3b) views of an example current probe according to the present disclosure. [Figure 3d] FIG. 3 is a schematic diagram illustrating top (FIGS. 3a, d), bottom (FIG. 3c) and side (FIG. 3b) views of an example current probe according to the present disclosure. [Figure 4] FIG. 4 is a schematic diagram of an example current measurement system according to the present disclosure. [Figure 5a] FIG. 5 is a schematic diagram illustrating a top view (FIG. 5a) and a circuit diagram (FIG. 5b) of an example current measurement loop for use with a current probe according to the present disclosure. [Figure 5b] FIG. 5 is a schematic diagram illustrating a top view (FIG. 5a) and a circuit diagram (FIG. 5b) of an example current measurement loop for use with a current probe according to the present disclosure. [Figure 6] FIG. 6 is a circuit diagram of an example compensation filter according to the present disclosure. [Figure 7] FIG. 7 illustrates a frequency response of a current probe according to the present disclosure. [Figure 8] FIG. 8 is a diagram showing the results of simulating the effect of compensation errors in the time domain and the frequency domain. [Figure 9] FIG. 9 illustrates a frequency response of an example of a known coaxial current probe. [Figure 10a] 10a, b and c are schematic diagrams illustrating further examples of current measurement systems according to the present disclosure. [Figure 10b] 10a, b and c are schematic diagrams illustrating further examples of current measurement systems according to the present disclosure. [Figure 10c] 10a, b and c are schematic diagrams illustrating further examples of current measurement systems according to the present disclosure. [Figure 11] FIG. 11 is a schematic diagram illustrating a cross-sectional view of a current probe according to the present disclosure. [Figure 12] FIG. 12 is a schematic diagram illustrating a top view of an example current probe according to the present disclosure. [Figure 13] FIG. 13 is a schematic diagram illustrating a further perspective view of an example current probe according to the present disclosure. [Figure 14]FIG. 14 illustrates a frequency response of a current probe according to the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0042] Detailed Description of the Embodiments Aspects of the present invention will now be described with reference to exemplary embodiments, it being understood that the structures depicted and described herein are provided by way of example and are not intended to limit the scope of the present invention to only the depicted embodiments.

[0043] 1 is a cross-sectional schematic diagram of an example of a current probe 100 for use in a current measurement system. The current probe 100 comprises a resistive element, such as a surface mounted device (SMD) shunt resistor 102, mounted on an upper surface of a dielectric layer 104. The current probe 100 may include an upper conductive layer 106 and a lower conductive layer 108 that electrically connect the resistor 102 to an input and an output of the current probe, respectively. The upper and lower conductive layers may be connected by a via 110. References to location terms such as "upper" and "lower" are made with reference to conceptual diagrams, and it will be understood that these terms are used for ease of reference but are not limiting in nature. Thus, these terms should be understood to refer to objects when in a particular orientation as shown in the accompanying drawings.

[0044] Due to the opposing current directions of the current paths 106 and 108, mutual inductance is cancelled between the current path 106 flowing into the current probe 100 and the current path 108 flowing out of the current probe 100, thereby helping to reduce the total inductance of the current loop. The shunt resistor 102 may be positioned with the conductive layer of the resistor 102 facing down adjacent to the dielectric layer 104, as shown in the current probe 100. By positioning the resistor 102 in this manner, the distance between the conductive layer of the resistor 102 and the current paths may be reduced, resulting in greater mutual inductance cancellation between the resistor 102 and the current return path 108, further reducing the total inductance of the loop.

[0045] The dielectric layer 104 may be formed, for example, from a printed circuit board (PCB). However, in low inductance applications (such as high frequency switching), it is generally desirable for the current paths to be separated by as small a distance as possible, since the smaller the distance between the conductive paths, the greater the likelihood of mutual inductance cancellation. As briefly discussed above, the benefits of reduced inductance generally outweigh the drawbacks of increased capacitance of the current paths. Thus, in an implementation, the dielectric layer 104 may be an additional dielectric layer formed on a substrate layer. The substrate may be, for example, a PCB, and is not shown in FIG. 1. Preferably, the thickness of the dielectric layer 104 is less than the thickness of the substrate (e.g., PCB) layer. For example, the dielectric layer 104 may have a thickness as small as possible within the given mechanical and / or manufacturing constraints of the current probe. This dielectric layer 104 further aids in reducing the total loop inductance by facilitating an increase in the mutual inductance between the lower current path 108 and the upper current path 106 / resistor 102. In an alternative implementation, the dielectric layer may form the substrate layer. For example, the dielectric layer may consist of a fiberglass layer within a PCB structure.

[0046] In current measurement systems and the like, it is often considered desirable to incorporate a current probe into the power loop to minimize the interconnect parasitics (e.g., parasitic impedance) of the current probe. However, this means that the current measurement must be incorporated at the design stage of the power module, and the current probe may therefore not fit into the PCB layer stackup of the power module and / or may not be suitable for system layouts with high component density.

[0047] Known non-implantable (e.g., insertional) current probes are typically less suitable for low inductance applications than implantable current shunts, for example, due to increased system inductance caused by the insertion inductance between the current probe and the rest of the measurement system, however, insertional current probes generally offer greater convenience and versatility of use due to their insertion connection system.

[0048] FIG. 2 is a cross-sectional schematic diagram of an insertion type current probe 200. The low inductance provided by the current probe 200 makes it particularly suitable for use as an insertion type current probe, even in low inductance applications. However, it will be appreciated that the current probe 200 can also be configured as a recessed type current probe. The current probe 200 has a current input region 204 and an output region 206 on opposite sides of the current probe, and can be connected to an external system using, for example, a solder connection, as shown in FIG. 2. For example, as shown in FIG. 2, the current input region 204 is provided on the "top" of the current probe 200, and the current output region 206 is provided on the opposing "bottom" of the probe 200. The direction of separation between the "top" and "bottom" surfaces of the stack of layers is sometimes referred to herein as the stacking direction or dimension. It will be appreciated that the current probe 200 is not limited to the use of solder connections, and alternative connection methods can be used, such as bus bar connections. For example, the current input region 204 and the current output region 206 may be configured for bus bar connection, for example, using spring contacts, without requiring other changes to the design of the current probe 200. By providing the current input region 204 and the current output region 206 on opposite sides of the stack of layers 208 that form the current probe 200, the current probe 200 may be easily inserted into an existing system.

[0049] The current probe 200 comprises a resistive element, such as an SMD resistor 202, which may be disposed on top of a dielectric material 208 in a manner similar to the resistive element 102 of the current probe 100. In contrast to the current probe 100, however, the current probe 200 comprises a stack 208 of multiple dielectric layers 208a-c. Although three dielectric layers are shown in FIG. 2, it will be understood that the current probe 200 may instead generally comprise a stack 208 of two or more layers, such as two, three, four, five, etc., layers, each layer being comprised of a dielectric material. Each of the dielectric layers 208a-c may be formed of the same or different materials and may have the same or different thicknesses. For example, each of the dielectric layers 208a-c may be comprised of and / or formed from FR-4 or other material suitable for radio / microwave frequencies. In an implementation, the middle dielectric layer 208b may comprise a substrate layer of the current probe 200, such as a PCB. Thus, the middle dielectric layer 208b may have a greater thickness and / or be formed from a different material than the outer dielectric layers.

[0050] Conductive layers 210a-d are provided above and below each of the dielectric layers 208a-c. In the current probe 200, the first conductive layer 210a on the above of the first dielectric layer 208a provides an input current path between the current input region 204 and the resistor 202. The second conductive layer 210b on the below of the first dielectric layer 208a similarly provides an output current path between the resistor 202 and the current output region 206. The first and second conductive layers are electrically connected by vias 212 to form a current loop through the current probe 200.

[0051] To further enhance mutual inductance cancellation between the current paths, the third and fourth conductive layers 201c,d can be connected to the first and second conductive layers, respectively. Thus, the current probe 200 comprises a set of input conductive layers 210a,c forming input current paths and a set of output conductive layers 210b,d forming output current paths, such that the input and output conductive layers alternate or are interleaved within the stack of layers 208.

[0052] 2, an example of an input current loop formed by the input conductive layers is shown in blue, and an example of an output current loop formed by the output conductive layers is shown in red. Thus, the structure of current probe 200 provides multiple current loops within stack of layers 208. Thus, this structure may be referred to as a "multi-loop structure." The multi-loop structure further facilitates mutual inductance cancellation (thus reducing total loop inductance) compared to the structure of current probe 100.

[0053] The interconnection region between the insertable current probe and an external system may also be configured with a multi-loop structure, facilitating a reduction in the insertion inductance of the current probe 200 through the same mechanisms described above.

[0054] Thus, the current probe 200 may comprise input vias that electrically connect a set of input conductive layers and output vias that electrically connect a set of output conductive layers. Although individual vias are depicted for clarity, it will be understood that each via shown in FIG. 2 may represent multiple vias. For example, in FIG. 2, the first (or "upper") conductive layer 210a is connected to the third conductive layer 210c by a first via 214 and a second via 216 to form an input current loop, while the second conductive layer 210b is connected to the fourth (or "lower") conductive layer 210d by a third via 220 and a fourth via 218 to form an output current loop, with the third via 220 forming part of the via 212. It will be understood that this alternating connection pattern may be replicated with any additional conductive layers. For example, first conductive layer 210a can be connected with vias to any "third," "fifth," etc. conductive layer, and second conductive layer 210b can be connected to any "fourth," "sixth," etc. conductive layer. Thus, although current probe 200 is depicted with only a single input current loop and a single output current loop, it will be understood that by increasing the number of dielectric layers in stack 208, the current probe may include multiple input current loops and / or multiple output current loops.

[0055] Thus, generally speaking, within current probe 200, vias 214 connect the input paths in parallel to an external circuit (DUT), and vias 218 connect the output paths in parallel to an external circuit (DUT). Vias 216 direct the input currents from the various paths to the sensing elements (resistors), and vias 212 / 220 connect the outputs from the sensing elements to the parallel output paths. The interleaving of the input and output paths creates multiple flux canceling loops, also referred to as multi-loop interconnections.

[0056] In addition to further reducing the inductance of the current probe, the provision of multiple dielectric layers 208a-c in a multi-loop structure increases the mechanical strength of the current probe 200, reducing the risk that the current probe will break, fracture, or otherwise fail due to mechanical stress. Such increased mechanical strength is particularly advantageous for insertable current probes, such as the current probe shown in FIG. 2, due to the need to handle the current probe when it is inserted into a system. For example, the current probe 100 may typically require layer thicknesses of about 200 μm to about 1000 μm to ensure adequate mechanical strength, whereas the individual layers 208a-c of the current probe 200 may each be less than about 200 μm thick, such as about 50 μm, or less. However, one or some of the layers, such as a substrate layer, such as the middle dielectric layer 208b, may be provided with an increased thickness, such as between about 200 μm to about 1000 μm, to further increase the mechanical strength of the current probe 200 while retaining the benefits provided by the thinner outer dielectric layers 208a, c. As such, it will be appreciated that some layers of the stack may not include a corresponding conductive layer, but may instead be provided, for example, to further enhance the mechanical strength of the current probe. An example of such a current probe is depicted in Figure 11, with only a single input current path and a single output current path separated by a first dielectric layer. In this implementation, mutual inductance cancellation is provided only in the upper layers of the probe.

[0057] The input conductive layers forming the input current path may all be connected by two vias, and / or additional vias may be provided connecting some of the input conductive layers. For example, in an implementation with three input conductive layers (e.g., "first", "third" and "fifth" conductive layers), first and second vias may be provided connecting all three input conductive layers. Alternatively, the first and second conductive vias may connect only the "first" and "third" conductive layers, and third and fourth vias may be provided to connect the "fifth" conductive layer with either the "first" or "third" conductive layers. Other arrangements of vias that suitably connect the input conductive layers may also be provided. It will be appreciated that the above discussion applies equally to the output conductive layers forming the output current path (e.g., the "second", "fourth" conductive layers, etc.).

[0058] It will be appreciated that implantable current probes may also benefit from improved mechanical strength and greater mutual inductance cancellation, particularly in connection with low inductance applications. Thus, implantable current probes comprising the multi-loop structure of current probe 200 are contemplated within the scope of the present disclosure.

[0059] Although the current probes 100, 200 are shown with a single resistor 102, 202 for simplicity, it will be further understood that the current probes 100, 200 may each comprise one or multiple resistors. The use of multiple discrete resistors in the current probes 100, 200 may reduce the skin effect at high switching frequencies compared to a single low impedance resistor. The resistors may be arranged in any suitable pattern, such as a semicircular shape, as shown in Figures 3a and 3b, which show top and side views of an example of an insertable current probe 300. The current probe 300 includes multiple resistive elements, such as SMD resistors 302, and an optional coaxial connector 304 for connecting the resistors 302 to a single input / output. The structure of the current probe 300 is the same as that described above with respect to the current probe 200, except that it includes a current input region 306 and a current output region 308. Figures 3c and 3d show bottom and top views, respectively, of an alternative current probe 300a. Current probe 300a is structurally similar to current probe 300, but comprises a resistive element 302 at the output face of the stack of layers (i.e., the face that constitutes current output area 308), while the input face (i.e., the face that constitutes current output area 306) is provided with a measurement loop structure 310. It will be appreciated that current probe 300 may also comprise a current measurement loop structure, for example at its output face (not shown).

[0060] By using a semicircular arrangement for the resistors 302, the spacing and angle between adjacent resistors 302 can help reduce or avoid proximity effects, thereby helping to maintain desired impedance levels for the current probe at high switching frequencies. However, other arrangements of resistors can also be used, such as a linear or "flat" arrangement 1302 as shown in current probe 1300 of FIG.

[0061] A close-up view of the current probe 300a is depicted in FIG. 12, showing the coaxial output connector 1202, the filter resistor (R comp ) 1204a-d, filter inductors (L comp ) 1206a, b are shown.

[0062] FIG. 7 shows the frequency response of an example current probe according to the present disclosure for MHz frequencies. As can be seen, for example, by comparison with FIG. 9, the bandwidth of the "flat" ±3 dB portion of the frequency response is significantly increased compared to existing designs. Furthermore, due to the much lower parasitic inductance, the resonance peak of the current probe is also at a much higher frequency than known current probes, making it less likely that the resonance will fall within the frequency of interest. Thus, the current probe according to the present disclosure provides a much wider bandwidth for performing measurements of currents, especially currents with short switching times (e.g., nanoseconds). FIG. 14 shows a further frequency response of an example current probe according to the present disclosure for GHz frequencies.

[0063] FIG. 4 is a schematic diagram of a current measurement system 400. The system 400 is comprised of a power electronics stage 1, a compensation filter stage 2, a first differential amplifier stage 3, a second differential amplifier stage 4, and an output stage 5 for providing an output to a current measurement device such as an oscilloscope. The second differential amplifier stage 4 is sometimes referred to as an input stage. It will be understood that the first amplifier stage 3 and the second amplifier stage 4 are optional and may each be omitted from the system 100 or may be otherwise combined into a single amplifier stage. Additionally, the power electronics stage 1 may optionally (e.g., when an insertable current probe is utilized) include a multi-layer interconnect structure 406 in the interconnection region between the current probe and an external system. This multi-layer interconnect structure 406 may be configured in a manner similar to the multi-layer or multi-loop structure shown in the current probe 200. This structure 406 may facilitate mutual inductance cancellation of the insertion inductance of the insertion type probe, further reducing the overall inductance of the system.

[0064] The power electronics stage 1 comprises one or more shunt resistors 402, e.g. resistors 102, 202, 302 of the current probes 100, 200, 300. Thus, the power electronics stage 1 of the system may comprise one or more current probes. Thus, a current probe such as the current probes 100, 200, 300 may constitute a current measurement loop. Figure 5a shows an example of a current measurement loop 500 provided on the underside of the current probe 300 (i.e. the side that constitutes the current output area 308). It will be understood that the structure and arrangement of the current loop 500 is merely exemplary and is not intended to be of a limiting nature.

[0065] FIG. 5b shows an equivalent model circuit 502 of the current probe 300 with a measurement loop, L shunt is the inductance of the probe circuit between the current measurement points, L m is the mutual inductance between the power loop and the measurement loop, R shunt is the resistance of the measurement circuit between the measurement points, L conn is the additional inductance introduced into the outer power loop by the interconnection with the current probe. If the current probe is directly integrated into the power loop, L conn can be zero. R shunt is dominated by the shunt resistance, while L m can be minimized in the probe design by keeping the power and measurement loops perpendicular, as shown in Figure 5a. parasitic is the equivalent parasitic capacitance that bypasses and appears across the shunt resistor. C parasitic is made up of components from both the probe circuitry and the system under test.

[0066] From the circuit 502, the natural frequency ω of the current probe 0 teeth,

number

number

[0067] Thus, the shunt inductance L shunt Reducing or minimizing θJA not only protects the device from voltage spikes, but also increases the damping ratio of the current probe, moving its natural frequency away from the frequency of interest.

[0068] As can be further seen from circuit 502, the resistive shunt introduces an inductive or parasitic zero into the voltage measurement. In particular, the inductive zero of circuit 502 results in the measured output signal having a differential component:

number

[0069] Under fast switching edges, this differential output can become very large and reduce the accuracy of the measurement signal.

[0070] Therefore, the system 400 may include a compensation filter stage 2 to remove this inductive zero. The compensation filter stage 2 may include a low pass filter 404, such as a differential low pass filter. The voltage across the current probe may be passed through a filter to reduce the dependency of the system bandwidth on the shunt resistance. Without a low pass filter, a low shunt resistance generally results in a low bandwidth, so a large resistor is required for a high bandwidth device. A large resistor may cause power consumption issues, especially when making continuous measurements of high current signals. Furthermore, the large resistor required severely limits the range of many high bandwidth oscilloscopes. Therefore, a high precision, high bandwidth attenuator is required to make measurements of high currents. Although this high resistor attenuates the inductive zero (as seen in Equation 3 above), the inductive zero is still present in the frequency response and causes differential distortion of the output signal.

[0071] An example of a compensation filter 600 for the system 400 is shown in Figure 6. The filter 600 is configured to receive the output from the power stage 1 and provide an output to the first amplifier stage 3. The filter preferably has a R shunt ≫R 3 ≫R 1 so that the filter does not conduct significant power loop current and does not interfere with the operation of subsequent differential amplifiers, such as differential amplifier stages 3 and 4. In an embodiment, compensation filter 600 may include an amplifier that converts the signal to a balanced differential signal.

[0072] The exemplary filter 600 can be constructed from an inductive filter utilizing high bandwidth SMD chip inductors and the input impedance of the amplifier stage. Advantageously, the filter 600 offers two degrees of freedom for changing the pole location of the filter. The resistor R 3 and inductance L comp can each be adjusted to fine-tune the filter frequency response.

[0073] Some high bandwidth differential amplifiers, such as those suitable for amplifier stages 3 and 4 of system 400, require a certain feedback resistor to achieve maximum bandwidth. For this reason, a capacitor feedback low pass filter is less suitable, since only the capacitor size is variable. Therefore, in some example implementations of system 400, an inductive filter (i.e., L comp It is advantageous to use a filter stage 2) which comprises

[0074] In general, it is beneficial to adjust the compensation filter stage 2 as accurately as possible. For example, FIG. 8 simulates the effect of compensation errors. In particular, FIG. 8(a) shows the frequency response of an example of an under-compensated and over-compensated ultrafast current probe, and FIG. 8(b) shows the corresponding switching current measurement. As shown in the example implementation of FIG. 8, 1.5 dB of overcompensation generates a false tail current of magnitude 4.5 A. It should be understood that different implementations and / or test conditions (such as different switching speeds or currents) may result in different false tail current magnitudes.

[0075] To avoid distortion of the frequency response of filter 600, R 3 The parasitic inductive reactance of should preferably be much smaller than its resistance. To facilitate this, R 3 can be made up of several separate resistors. For example, R 3 can be formed from three separate resistive elements. R 3 It will be appreciated that other numbers and / or types of resistors may be used to configure R .

[0076] By feeding the output of the filter 600 to a differential amplifier stage 3, the unbalanced differential signal at the output of the inductor can be converted to a balanced differential signal, with subsequent filtering of common mode noise. shunt and C. parasitic If is kept small enough so that resonant effects do not occur within the frequencies of interest, the frequency response of the current probe is dominated by the response of the differential amplifier.

[0077] Compensation filter stage 2 may be an active filter with an amplifier. However, current measurement systems with passive filter stage 2 may also be implemented within the scope of the present disclosure. Such passive system implementations may not include amplification stages 3 and 4 or any amplifiers in filter stage 2. As such an example, system 1000a is shown in FIG. 10A.

[0078] 10a is a schematic diagram of a passive current measurement system 1000a. The system 1000a comprises a power electronics stage 1 and a compensation filter stage 2 that provides an output directly to an output stage for use in a current measurement device such as an oscilloscope. As mentioned above, in contrast to the active system 400, the passive system 1000a does not comprise either the first or second amplifier stages 3 and 4.

[0079] As shown in system 1000b of FIG. 10b, power electronics stage 1 may optionally (e.g., when utilizing an insertable current probe) include a multi-layer interconnect structure 1006 in the interconnect area of ​​the current probe and the external system. As with system 400, this multi-layer interconnect structure may be configured in a manner similar to the multi-layer or multi-loop structure shown in current probe 200. This structure may facilitate mutual inductance cancellation of the insertion inductance of the insertable probe, further reducing the overall inductance of the system. In some designs, common mode chokes may be added to the passive system to facilitate common mode noise rejection.

[0080] 10c shows an example circuit diagram of one implementation of the power electronics stage 1 and the filter stage 2 of the passive measurement system 1000a,b. The power electronics stage 1 comprises one or more shunt resistors 1002, e.g. resistors 102, 202, 302 of the current probes 100, 200, 300. Thus, the power electronics stage 1 of the system may comprise one or more current probes. Thus, the current probes, such as the current probes 100, 200, 300, may constitute a current measurement loop.

[0081] Filter stage 2 comprises multiple inductors L1, L2 arranged in series and resistors R1, R2, R3 and R4 arranged in parallel to form a low pass filter 1004. Filter stage 2 of systems 1000a,b may differ from that of system 400 due to the lack of buffering from "active" op-amp stages 3, 4. As a result, loading by, for example, a measurement oscilloscope may need to be considered and / or reflected in the design and components of some implementations of passive filter stage 2 of systems 1000a,b.

[0082] It will be appreciated that the structure shown in FIG. 10c is merely exemplary and is not intended to limit the scope of the present disclosure.

[0083] Returning now to Figure 4, the balanced differential signal output from the first amplifier stage 3 may be transmitted across a split between analog and digital ground. As shown in Figure 4, the analog and digital grounds may be separated by, for example, a 10 Ω resistor. Additionally or alternatively, the analog and digital grounds may be separated by other passive components, such as inductors, and / or may be completely decoupled.

[0084] Splitting the ground plane prevents power ground currents from flowing into sensitive measurement circuits and equipment. Power ground currents can be very large and contain significant high frequency content. These currents can therefore significantly corrupt the measurement signal.

[0085] Furthermore, star grounding techniques can be employed to eliminate the need for isolated power supplies. Optionally, the star grounding techniques can employ, for example, common mode chokes placed between the different ground references.

[0086] The differential signal may be further amplified in a second differential amplifier stage 4 before being converted to a signal suitable for use with an oscilloscope or other suitable equipment. For example, if the differential signal is converted to a single-ended signal with a differential amplifier, only one output line may be utilized and the other line may be loaded with an equivalent 50 Ω impedance so that the two differential lines remain symmetrical. This may increase or maximize the common mode rejection ratio (CMRR) of the amplifier. It will be appreciated that the use of a 50 Ω impedance is provided merely as an example and any suitable impedance may be selected based on the input requirements of the equipment (e.g., oscilloscope).

[0087] The addition of amplification stages 3 and 4 has the further advantage that the resistors in the amplifier feedback loop break the direct connection and buffer the current probe from the oscilloscope input. This protects the oscilloscope input from failure of the current probe. For example, an open circuit failure of the current probe may result in high voltage being applied across the current probe resistor. Those skilled in the art will appreciate that in the foregoing description and in the appended claims, location terms such as "upper", "lower", "on", "along", "side" and the like are made with reference to conceptual illustrations such as those shown in the accompanying drawings. These terms are used for ease of reference but are not intended to be limiting in nature. These terms should therefore be understood to refer to objects when oriented as shown in the accompanying drawings.

[0088] Although the present disclosure has been described in terms of preferred embodiments as above, it should be understood that these embodiments are merely illustrative and the claims are not limited to these embodiments. In view of the present disclosure, those skilled in the art will be able to make modifications and substitutions that are contemplated as falling within the scope of the appended claims. Each feature disclosed or illustrated in this specification can be incorporated into any embodiment alone or in appropriate combination with other features disclosed or illustrated in this specification.

Claims

1. A current probe for wireless / microwave frequencies, One or more resistive elements electrically connected between the current input region and the current output region; Each layer comprises a stack of layers, each layer being made of a dielectric material. For each of the one or more resistive elements, the current probe is: Each comprises a plurality of conductive paths separated by one or more of the aforementioned layers, A first set of one or more conductive paths is configured to provide a current path between the current input region and the resistive element, a second set of one or more conductive paths is configured to provide a current path between the resistive element and the current output region, and the plurality of conductive paths are arranged alternately in a stack of the layers, the first set and the second set of conductive paths Current probe.

2. The current probe according to claim 1, wherein the conductive paths of the first set of conductive paths are connected via one or more vias.

3. The current probe according to claim 1 or 2, wherein the conductive paths of the second set of conductive paths are connected via one or more vias.

4. The current probe according to claim 1 or 2, wherein one or more layers of the stack of layers each have a thickness in the stacking direction between approximately 50 μm and approximately 200 μm.

5. The current probe according to claim 1 or 2, wherein each layer of the stack of the aforementioned layers comprises the same dielectric material.

6. The current probe according to claim 1 or 2, wherein at least two layers of the stack of the layers comprise different dielectric materials.

7. The current probe according to claim 1 or 2, wherein the current probe comprises a plurality of resistive elements, and optionally the plurality of resistive elements are arranged in a semicircular shape.

8. The current probe according to claim 1 or 2, wherein the one or more resistive elements are mounted on the surface of the stack of layers.

9. The current probe according to claim 8, wherein the one or more resistive elements are arranged such that the conductive surfaces of the one or more resistive elements are adjacent to the stack of the layer.

10. The current input region and the current output region are provided on opposite sides of the stack of the layers, as described in claim 1 or 2.

11. The current probe according to claim 10, wherein the current input region and the current output region are configured to be soldered or clamped to an external power loop or busbar.

12. The aforementioned stack comprises at least three layers, with the second layer positioned between the first and third layers. The first set of conductive paths comprises a first conductive path on the outer surface of the first layer and a third conductive path between the second layer and the third layer. The current probe according to claim 1 or 2, wherein the second set of conductive paths comprises a second conductive path between the first layer and the second layer, and a fourth conductive path on the outer surface of the third conductive layer.

13. The current probe according to claim 1 or 2, wherein the layer in the stack of the layers is a layer of a multilayer printed circuit board.

14. A current measuring system comprising one or more current probes according to claim 1 or 2.

15. The system according to claim 14, further comprising a compensation filter arranged to receive output signals from the one or more current probes, wherein the compensation filter is configured to reduce induced zeros from the outputs of the one or more current probes.

16. The compensation filter comprises a low-pass filter, according to claim 15.

17. The system according to claim 15, wherein the compensation filter comprises one or more further resistive elements electrically connected to the input for the reference voltage.

18. The system according to claim 17, wherein the one or more further resistive elements comprises a plurality of resistive elements.

19. The system according to claim 16, wherein the compensation filter comprises an inductive low-pass filter.

20. The system according to claim 14, further comprising a first differential amplifier configured to receive the output signal from the compensation filter.

21. The system according to claim 20, further comprising a second differential amplifier configured to receive an output signal from the first differential amplifier and provide an output for use in an external system.

22. The system according to claim 21, wherein the second differential amplifier comprises an output load connected to the first output leg, and the second output leg is configured to supply a single-ended signal used by an external system.

23. The system according to claim 14, wherein the system is formed on a printed circuit board.

24. A method for reducing the inductance of a current probe, To provide a stack of layers, each layer comprising a dielectric material, with a first set of one or more conductive paths and a second set of one or more conductive paths. The first set of conductive paths and the second set of conductive paths are arranged alternately within the stack of the layers, The inductance of the current probe is reduced by mutual inductance cancellation between the first set of conductive paths and the second set of conductive paths, by supplying input current through the first set of conductive paths and output current through the second set of conductive paths. Methods that include...

25. A method for measuring electric current using microwave / radio frequencies, Supplying input current to the current probe, The method according to claim 24 reduces the inductance of the current probe, Receiving an output signal from the current probe, wherein the output signal represents the current flowing through the current probe. The output signal is supplied to the measurement system. Methods that include...

Images