Embedded cooling system and method for manufacturing an embedded cooling system

Abstract

Embodiments of this specification provide a fluid cooling assembly embedded within a device package and related manufacturing methods. In one embodiment, the cooling assembly includes a cold plate body attached to a monolithic device and a manifold lid attached to the cold plate body. The cold plate body has a first side adjacent to the monolithic device and an opposite second side, and the manifold lid is attached to the second side. In some embodiments, each of the first side of the cold plate body and the back side of the monolithic device includes a dielectric surface, and the cold plate body is attached to the monolithic device by a direct dielectric bond formed between the dielectric surfaces. The cold plate body and the manifold lid define one or more cavities, and the one or more cavities form at least a portion of a fluid flow path from an inlet to an outlet of the manifold lid.

Description

Technical Field

[0001] The disclosure of the present invention relates to advanced packaging for microelectronic devices, and more particularly, to an embedded cooling system for semiconductor device packages and a method of manufacturing the same.

Background Art

[0002] Regarding the future of large-scale computing, energy consumption presents a significant challenge as the world's computing energy requirements are increasing at a rate that most would consider unsustainable. Some models predict that the information and communication and technology (ICT) ecosystem could exceed 20% of the world's electricity use by 2030, with direct electricity consumption by large-scale computing centers accounting for more than one-third of their energy use. Cooling costs constitute a significant portion of the computing center energy requirements as even a slight increase in operating temperature can negatively impact the performance of microprocessors, memory devices, and other electronic components.

[0003] For example, improvements in chip performance through increases in gate density and multi-core microprocessors result in a corresponding increase in power density and heat flux contributing to chip temperature rise, so heat dissipation within high power density chips is also a significant challenge. This temperature rise is undesirable as it can degrade the operating performance, efficiency, and reliability of the chips. Cooling systems used to maintain the chips at a desired operating temperature typically use one or more heat dissipating devices, such as heat spreaders, heat pipes, cryogenic pipes, and heat sinks, thermally coupled to the chips using a compliant thermal conductive material (TIM), such as thermal paste, thermal adhesive, thermal gap filler, etc. The thermal interface material maintains thermal contact with the surfaces of the chip and the heat dissipating device to facilitate heat transfer between them. Unfortunately, the combination of the thermal resistance of the thermal interface material and the thermal resistance at the interface boundary region suppresses heat transfer from the chip to the heat dissipating device and unnecessarily reduces the cooling efficiency of the cooling system.

Summary of the Invention

Problems to be Solved by the Invention

[0004] Accordingly, there is a need in the art for an improved energy efficient cooling system and a method of manufacturing the same.

Means for Solving the Problems

[0005] One general aspect includes an embedded cooling assembly for a microelectronic device package. In one embodiment, the cooling assembly is directly attached to the monolithic device. The monolithic device generally includes a back side opposite the active side. The cooling assembly can include (i) a cold plate body including a stack of one or more cold plates having one of the bottom plates directly attached to the back side of the monolithic device without an intervening adhesive, and (ii) a manifold cover attached to the cold plate body. In some embodiments, the cold plate body and the manifold cover define one or more cavities that form a flow path between an inlet opening and an outlet opening disposed through the manifold cover. In some embodiments, the cooling assembly is attached to the monolithic device by a direct dielectric bond formed therebetween. In some embodiments, the cooling assembly is attached to the monolithic device by a hybrid of a direct dielectric bond and a direct metal bond.

[0006] The implementation of the cooling assembly can include one or more of the following features. In the cooling assembly, the cryoplate body is coextensive with the integrated device, and for this reason, the side walls of the cryoplate body are substantially flush with the side walls of the integrated device. In the cooling assembly, the side surface of the cryoplate body is substantially perpendicular to the back side of the integrated device. In the cooling assembly, the side surface of the manifold cover is substantially coplanar with the side surface of the cryoplate body around the perimeter of the cooling assembly. In the cooling assembly, the cryoplate body includes an upper bottom plate and a lower bottom plate, and the manifold cover and the upper bottom plate define a first cavity and a second cavity, the first cavity being separated from the second cavity, and the lower bottom plate and the upper bottom plate define a third cavity. In the cooling assembly, the third cavity is arranged in fluid communication with the first cavity and the second cavity through first and second openings formed in the upper bottom plate respectively.

[0007] The implementation of the cooling assembly can also include one or more of the following features. In the cooling assembly, the cryogenic plate body includes an upper bottom plate, a lower bottom plate, and one or more intervening bottom plates disposed between the upper and lower bottom plates. The manifold cover and the upper bottom plate define first and second cavities, the upper bottom plate and one or more intervening bottom plates define a third cavity, one or more intervening bottom plates and the lower bottom plate define a fourth cavity, and the first, second, third, and fourth cavities are in fluid communication through openings in the bottom plates to form a flow path, which includes the first cavity, the third cavity, the fourth cavity, and the second cavity in sequence. In the cooling assembly, the cryogenic plate body is formed from a single-crystalline or polycrystalline substrate that can include silicon, and the manifold cover is formed from a metal, polymer, or epoxy material. In the cooling assembly, the manifold cover is formed from a material having a different coefficient of thermal expansion than the material used to form one or more of the bottom plates, and the manifold cover is attached to one or more of the bottom plates by a flexible adhesive layer disposed therebetween. In the cooling assembly, the cryogenic plate body includes a concave surface or an opening on the bottom surface of the bottom plate directly attached to the integrated device, and the back side of the integrated device and the bottom plate directly attached to the integrated device define one of the one or more cavities.

[0008] One general aspect includes a device package. In one embodiment, the device package includes a package substrate having a support surface, a cooling assembly mounted on the support surface, and a package cover disposed over the cooling assembly. The cooling assembly can include any one or combination of the features of the cooling assembly described above. In some embodiments, the edge of the heat spreader is supported by the peripheral region of the support surface, and the heat spreader is spaced from the upper surface of the manifold cover by a gap region.

[0009] The implementation of the device package can include one or more of the following features. In the device package, the heat spreader is formed from a rigid or semi-rigid material, and thus the force acting on the upper surface of the heat spreader is transmitted to the surrounding area of the support surface. A flexible material layer is disposed between the heat spreader and the manifold lid. A molding material is disposed between the heat spreader and the manifold lid, and the molding material at least partially encloses the cooling assembly. In the device package, two or more cooling assemblies are mounted on the support surface of the package substrate, and the heat spreader is disposed across two or more cooling assemblies. In the device package, a second device or device stack is in thermal communication with the manifold lid through one or more thermal interface materials that form a thermal path between the second device or device stack, the heat spreader, and the manifold lid.

[0010] One general aspect includes a method of mass production. In one embodiment, the method includes aligning a plurality of semiconductor devices formed on an active side of a first substrate with a plurality of cryoplate bodies formed in a substrate stack. The substrate stack can include one or more second substrates patterned to each define a bottom plate. The method can also include bonding the back side of the first substrate to a bonding surface of the substrate stack, and singulating a plurality of cooling assemblies from the bonded first substrate and substrate stack. In one embodiment, each of the cooling assemblies can include a cryoplate body directly bonded to the semiconductor device and a manifold lid attached to the cryoplate body. Other embodiments of this aspect include corresponding computer assemblies, devices, and computer programs each configured to execute the actions of the method as recorded on one or more computer storage devices.

[0011] The implementation of this method can include one or more of the following features. In this method, the cold plate body and the manifold cover of each cooling assembly define one or more cavities that are in fluid communication with the inlet and outlet of the manifold cover. In this method, the manifold cover is formed on a third substrate, and the third substrate is attached to the second substrate stack using an intervening adhesive layer. Consolidating a plurality of integrated devices can include consolidating the third substrate attached to the second substrate stack. In this method, a plurality of separate manifold covers are each attached to the second layer stack prior to consolidation. In this method, one or more of the second substrates can include single-crystalline or polycrystalline silicon. In this method, a plurality of cold plate bodies within at least one of the one or more second substrates can include a concave surface and a plurality of features protruding upward from the concave surface. In this method, the bonding surface of the second substrate stack is patterned to define a plurality of concave surfaces, each of which, together with the back side of the substrate, defines a cavity that is in fluid communication with the inlet and outlet of the manifold cover. In this method, the sides of the semiconductor device and the cold plate body within each consolidated device cooling assembly are substantially coplanar with each other around the perimeter of the cooling system, and these sides are substantially perpendicular to the plane of the bonding interface between the first substrate and the second substrate stack. In this method, the sides of the manifold cover are substantially coplanar with the sides of the bottom plate or bottom plate stack around the perimeter of the cooling assembly. The implementation of the above-described technology can include hardware, a method or process, or computer software on a computer-accessible medium.

[0012] One general aspect includes a method of manufacturing a device. In one embodiment, the method includes aligning a plurality of singulated devices with a plurality of bottom plates or a stack of bottom plates defined within a first substrate stack. The first substrate stack can include one or more first substrates each patterned to define a bottom plate. The method also includes bonding the back side of each of the singulated devices to a bonding surface of the first substrate stack. The method can also include singulating a plurality of cooling assemblies from the first substrate stack. Each cooling assembly can include one of a plurality of semiconductor devices, a cold plate body directly bonded to the semiconductor device, and a manifold cover attached to the cold plate body.

[0013] The implementation can include one or more of the following features. The method can include bonding a plurality of support features to a bonding surface of the first substrate stack within a gap between adjacent singulated devices. The support features can be formed of the same material as the singulated devices, for example, single crystal silicon. Other embodiments of this aspect include a corresponding computer assembly, an apparatus, each configured to perform an action of the method, and a computer program recorded on one or more computer storage devices.

[0014] The above and other objects and advantages of the disclosure of the present invention will be apparent upon consideration of the following detailed description in conjunction with the accompanying drawings.

Brief Description of the Drawings

[0015]

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[0016] The figures in this specification are merely illustrative of various embodiments of the present invention for illustrative purposes. It will be recognized that additional or alternative structures, assemblies, systems, and methods can be implemented within the scope of the principles enumerated by the disclosure of the present invention.

Embodiments for Carrying Out the Invention

[0017] As used herein, the term "substrate" means any workpiece, wafer, or article that provides a base material or support surface from which or on which the components, elements, devices, assemblies, modules, systems, or features of the heat-generating devices, packaging components, and cooling assembly components described herein can be formed or to which they can be formed, and includes these. The term "substrate" also includes a "semiconductor substrate" that provides a support material on which the elements of a semiconductor device are fabricated or attached, and further includes any material layer, feature, and / or electronic device formed within or through it.

[0018] As described below, the semiconductor substrate in this specification generally has a "device side" on which semiconductor device elements such as transistors, resistors, and capacitors are manufactured, and a "back side" on the opposite side of the device side. The term "active side" must be understood to include the surface of the device side of the substrate, and any material layer, device element, or feature surface formed on or extending outward from the device side surface of the semiconductor substrate, and any opening formed therein. Therefore, it must be understood that the material forming the active side may change according to the stage of device fabrication and assembly. Similarly, the term "non-active side" (the opposite side of the active side) includes the non-active side of the substrate at any stage of device fabrication, including any material layer formed on or extending outward from the non-active side of the substrate, the surface of any feature, and any opening formed therein. Therefore, the terms "active side" or "non-active side" can include each surface of the semiconductor substrate at the start of device fabrication and any surface formed during material removal such as after substrate thinning operations. Depending on the stage of device fabrication or assembly, the terms "active side" and "non-active side" are also used to describe the surface of a material layer or feature formed on, within, or through the semiconductor substrate, regardless of whether the material layer or feature is present in the fabricated or assembled device.

[0019] In this specification, spatial relative terms are used to describe relationships between elements such as the relationships between a substrate, a heat generating device, a cooling assembly component, a device packaging component, and other features described below. Unless otherwise defined, terms such as "above", "on", "upper", "upward", "outward", "upon", "below", "under", "downward", "lower" are generally used with reference to the X, Y, and Z directions specified in the drawings. Accordingly, it should be understood that the spatial relative terms used in this specification are intended to encompass different orientations of the substrate and are not limited to the direction of gravity unless otherwise specified. Unless otherwise defined, terms describing relationships between elements such as "disposed on", "embedded in", "coupled to", "connected by", "attached to", "joined to" include both relationships with intervening elements and direct relationships without intervening elements, either alone or in combination with spatially related terms.

[0020] Unless otherwise specified, the term "cooling assembly" generally refers to a cold plate body and a manifold cover attached to the cold plate body. Typically, a concave surface defining a fluid cavity therebetween is formed on one or both of the cold plate body and the manifold cover. The term "cold plate body" generally refers to a bottom plate that can be joined to a semiconductor device or a stack of bottom plates directly joined to each other. The cold plate body can include a material layer and / or metal features formed on the surface of the bottom plate or the stack of bottom plates, which facilitate direct dielectric or direct hybrid bonding with the semiconductor device. By this direct bonding method, heat from the semiconductor device can be transferred to the fluid flowing through the cooling assembly through the cold plate body without using a thermal interface material. Unless otherwise specified, the cooling assemblies described in this specification can be used with any desired fluid such as liquid, gas, and / or vapor coolant, and the term "cold plate body" should not be construed as being limited to any one fluid phase.

[0021] FIG. 1 is a schematic side view of a device package 10 cooled in a conventional manner using an external heat sink 22. The device package 10 typically includes a package substrate 12, a first device 14, a device stack 15, and a heat spreader 18, and one or more first TIM layers 16 that thermally couple the device 14 and the device stack 15 to the heat spreader 18. The device package 10 is thermally coupled to the external heat sink 22 through a second TIM layer 20. The TIM layers 16 and 20 are typically formed by a flexible material such as a thermal conductive paste, grease, an adhesive material, or another thermal conductive material such as a fusible metal alloy, e.g., solder, or a combination thereof. The TIM layers 16, 20 facilitate thermal contact between components within the device package and between the device package 10 and the heat sink 22.

[0022] Unfortunately, as the size of the device decreases, the heat flux density increases, so the cumulative thermal resistance of the system shown in FIG. 1 becomes an increasingly problematic issue because the device cannot dissipate heat quickly enough to operate at optimal power, and thus the energy efficiency of the device decreases. Similarly, a problem is that heat is transferred between devices within the package, as in the illustrated heat transfer path 24, where, undesirably, heat may be transferred from a high heat flux device 14 such as a CPU or GPU through the heat spreader 18 to a low heat flux device stack 14 such as memory.

[0023] For example, as shown in FIG. 1, each package component and each interface boundary therebetween has a corresponding thermal resistance (R1 to R5). Here, R1 is the thermal resistance of the bulk semiconductor material of device 14, R3 and R5 are the thermal resistances of TIM layers 16, 20 respectively, R4 is the thermal resistance of heat spreader 18, and R2 represents the thermal resistance at the interface region of the components. In a typical cooling system, R3 and R5 account for more than 80% of the cumulative thermal resistance of heat transfer path 26, and R4 may account for more than 5%, while the rest is occupied by R1 of device 14 and R2 of the interface. Accordingly, the embodiments herein provide an embedded cooling assembly that shortens the thermal resistance path between the device and the heat sink and, in some embodiments, reduces the heat transfer between devices disposed within the same package, as will be described below in connection with the figures.

[0024] FIG. 2 shows a plan view of an exemplary system panel 200. FIG. 3A is a schematic cross-sectional view of a portion of the system panel 200 along line A-A showing an exemplary device package 300a having an embedded cooling assembly 400 according to an exemplary embodiment of the disclosure herein. Here, the cooling assembly 400 is attached to the back side 320 of the semiconductor device 304 by a direct dielectric-to-dielectric bond formed therebetween.

[0025] In some embodiments, the cooling assembly 400 is attached to the back side 320 by a hybrid of direct dielectric-to-dielectric bond and metal-to-metal bond, as will be described below in connection with FIG. 4. The cooling assembly 400 is typically disposed between the device 304 and the package cover 308 and is thus "embedded" within the device package 300a. In some embodiments, the package cover 308 is formed of a thermally conductive material, such as a metal, and functions as a heat spreader.

[0026] Returning to FIG. 2, the system panel 200 generally includes a printed circuit board (PCB) 202, a plurality of device packages 300a mounted on the PCB 202, and a coolant delivery system 218 fluidly coupled to each device package 300a. The coolant delivery system 218 can include a coolant fluid source 210 and a plurality of coolant lines 208 that fluidly couple the coolant fluid source 210 to each inlet 314 and outlet 316 of the device packages 300a. In some embodiments, the cooling assembly 400 is configured to transfer heat from the device 304 to a liquid coolant that is delivered from a coolant fluid source 210, such as water or refrigerant, to the cooling assembly. In some embodiments, the cooling assembly 400 moves heat from the device by vaporizing the refrigerant. In those embodiments, the coolant delivery system 218 can include a compressor (not shown) external to the device package 300a to condense the gas back into a liquid form.

[0027] As shown, each of the device packages 300a can be inserted into a socket 220 (FIG. 3A) of the PCB 202 and secured to the PCB 202 using a frame-shaped cover 206, which is secured to the PCB 202 using a plurality of fasteners 212. In some embodiments, the cover 206 can apply a downward force sufficient to ensure a relatively uniform force load on the device package 300a and thus proper pin contact between the device package 300a and the socket 220. In another embodiment, the device package 300a can be installed using other suitable connection methods, such as ball grid array connections or direct bond interconnect (DBI).

[0028] Returning again to FIG. 3A, the device package 300a includes a package substrate 302, a semiconductor device 304 disposed on the package substrate, a cooling assembly 400, and a package cover 308 disposed on the embedded cooling assembly 400. The package substrate 302 is typically formed of a rigid material such as an epoxy or resin-based laminate and can include a plurality of conductive elements formed therein or thereon for electrically connecting the device 304 to the PCB 202. In some embodiments, an interposer 303 can be used in place of the package substrate 302. In those embodiments, the interposer 303 can be configured to electrically connect a plurality of devices to each other in a high-level packaging manner, as shown in FIG. 3D.

[0029] In some embodiments, the device 304 includes an active side 318 that includes device components formed thereon or therein, such as transistors, resistors, capacitors, and a non-active side or "back" surface disposed on the opposite side of the active side 318, herein the back side 320. As shown, the active side 318 is electrically connected to the package substrate 302 using conductive bumps 319, which are encapsulated by an underfill layer 321 disposed between the device 304 and the package substrate 302. The underfill layer 321 typically includes a cured polymer resin or epoxy that provides mechanical support to the conductive bumps 319 and prevents potential thermal fatigue caused by CTE mismatch between the device 304 and the package substrate 302.

[0030] As shown, the cooling assembly 400 is disposed between the device 304 and the package cover 308 and is thus "embedded" in the device package 300a. Here, the package cover 308 extends upwardly from the surface of the package substrate 302 and surrounds the device 304 and the cooling assembly 400. In some embodiments, the package cover 308 can be formed of a semi-rigid or rigid material and spaced from the manifold cover 326, so that the downward force exerted by the cover 206 on the package cover 308 is transmitted to the package substrate 302 and not to the manifold cover 326.

[0031] The cooling assembly 400 generally includes a cold plate body 324 directly joined to the device 304 and a manifold cover 326 coupled to the cold plate body 324 using an adhesive layer 330. Here, the cold plate body 324 and the manifold cover 326 coupled to the cold plate body 324 define a cavity 310 (shown as an imaginary line). The coolant circulates through line 208 into the cavity 310, and line 208 can be coupled to the cooling assembly 400 by accessories disposed in openings forming an inlet 314 and an outlet 316 of the manifold cover 326. In some embodiments, the cooling assembly 400 can be thermally coupled to the back side 320 of the device 304 using a method that forms a direct bond between the surfaces without using an intervening adhesive, as described in connection with the manufacturing method below. The direct bonding method obviates the need for an intervening adhesive layer or thermal interface material (TIM) layer between the device 304 and the cooling assembly 400. Accordingly, the device package described herein provides a reduced thermal path resistance 322 as compared to the path 26 of the device package 10 shown in FIG. 1. In some embodiments, the cumulative thermal resistance of the path 322 is reduced by a factor of 50 or less as compared to the path 26 of the device package 10.

[0032] Figures 3B - 3D show respective device packages 300b - 300d that can be used in place of any one of the device packages 300a described above with respect to FIGS. 2 and 3A according to an exemplary embodiment of the disclosure of the present invention. In FIG. 3B, device package 300b is substantially similar to device package 300a and further includes a thermally conductive flexible material 332 disposed between a manifold lid 326, such as a paste, pate, or non - rigid polymer material, and a package cover 308. In some embodiments, flexible material 332 is a thermal interface material. In the embodiment of FIG. 3C, device package 300c is substantially similar to device package 300a and further includes a molded material 334 disposed between manifold lid 326 and package cover 308. Molded material 334 can include a polymer or epoxy material that extends upward from the package substrate and at least partially encapsulates and / or surrounds device 304 and cooling assembly 400. In some embodiments, molded material 334 can be a thermally conductive material, such as a polymer or epoxy having one or more thermally conductive additives that are silver and / or graphite. The use of flexible material 332 and / or molded material 334 provides mechanical support that improves the reliability of the system and extends the service life of device packages 300b - c. For example, flexible material 332 and / or encapsulated molded material 334 can reduce potential mechanical stresses that weaken the interface junctions and / or electrical connections between components of device package 300a, such as stresses caused by vibration, mechanical and thermal shock, and / or fatigue due to repeated thermal cycles.

[0033] In some embodiments, package cover 308 is formed of a thermally conductive material, such as a metal like aluminum or copper. In some embodiments, package cover 308 is a heat spreader that redistributes heat from one or more electronic components within a multi - component device package as shown in FIG. 3D.

[0034] Figure 3D shows an exemplary multi-component device package 300d that includes a plurality of devices mounted on a common package substrate, such as an interposer 303 that facilitates shortening of connections between devices 304 and / or device stacks 305. As shown, the plurality of devices include a device 304 directly bonded to a cooling assembly 400 and a device stack 305, such as a stack of interconnected memory devices not directly bonded to the embedded cooling assembly 400. Here, the package cover 308 is formed of a thermally conductive material and can function as a heat spreader that transfers heat from the device stack. The flexible material 332 can be disposed in thermal contact with both the package cover 308 and each cooling assembly 400 and between the package cover 308 and the device stack 305. Accordingly, heat generated by each device 304 is dissipated through the cooling assembly 400 directly bonded thereto, and heat generated by the device stack 305 is transmitted to the cooling assembly 400 of the adjacent device 304 through the flexible material 332, such as a TIM layer, and the package cover 308, as shown by the heat path 307.

[0035] In some embodiments, the device package 300d includes a heat sink 338 (shown in phantom) disposed above the package cover 308 and a TIM layer 340 that thermally couples the package cover 308 to the heat sink 338. In some embodiments, the device package 300d can include an external cooling assembly, such as a fluid cooling pipe (not shown), disposed on the package cover 308 and thermally coupled to the package cover 308 by the TIM layer 340. In those embodiments, the fluid cooling pipe can be coupled to the same coolant source used to deliver coolant to the cooling assembly 400 or to a different coolant source.

[0036] Advantageously, the cooling assembly 400 of the device package 300d blocks the heat path between each device 304 and the device stack 305, preventing heat from transferring therebetween. Accordingly, the device package 300d can be advantageously used to facilitate proximity-spaced devices on an interposer such as high-power devices and memory stacks and eliminate unwanted heat transfer therebetween while shortening the delay time.

[0037] FIG. 4 is a schematic cross-sectional view of a cooling assembly 400 used with the device packages 300a-d described above. As shown, the cooling assembly 400 includes a cold plate body 324 and a manifold cover 326 attached to the cold plate body 324. The cold plate body 324 may include one or more bottom plates as will be described in connection with FIGS. 5-7 below, or may include a single bottom plate 424 as shown in FIG. 4. In some embodiments, the cold plate body 324 is attached directly to the device 304 using, for example, a direct bonding method without using an adhesive or TIM material. For example, in some embodiments, the device 304 can include a dielectric layer 430 formed on the back side 320, and the cold plate body 324 can include a dielectric layer 432 formed on the bottom surface of the bottom plate 424. In those embodiments, the cold plate body 324 can be attached to the back side 320 by a direct dielectric bond formed between the material layers 430 and 432. Suitable dielectrics that can be used as the dielectric layers 430, 432 include silicon oxide, silicon nitride, silicon oxynitride, silicon carbonitride, metal oxides (e.g., alumina), metal nitrides, silicon carbide, silicon oxycarbide, silicon oxycarbonitride, silicon carbonitride, diamond-like carbon (DLC), or combinations thereof. In some embodiments, one or both of the dielectric layers 430, 432 are formed from an inorganic dielectric, i.e., a dielectric that does not substantially contain an organic polymer.

[0038] Typically, one or both of layers 430 and 432 are deposited to a thickness greater than that of a native oxide film, such as about 1 nm or more, 5 nm or more, 10 nm or more, 50 nm or more, 100 nm or more, or 200 nm or more. In some embodiments, one or both of layers 430, 432 are deposited to a thickness of 3000 nm or less, such as 200 nm or less, 100 nm or less, or 500 nm or less. In some embodiments, a direct dielectric bond is formed using only one of layers 430, 432. For example, the dielectric bond is formed by depositing a dielectric layer on only one of the cryogenic plate body 324 or the integrated device 304.

[0039] In some embodiments, each of the lower surface of the cryogenic plate body 324 and the back side 320 of the device 304 further includes a plurality of metal features 434, 436, such as copper damascene pads, formed within their respective dielectric layers 430, 432. In those embodiments, the cryogenic plate body 324 and the device 304 can be attached using a hybrid of a direct dielectric bond formed between the dielectric layers 430 and 432 and a direct metal bond formed between the metal features 434 and 436. A method of forming the hybrid bond will be described below. In some embodiments, the bottom plate 424 can be formed of a material having a coefficient of thermal expansion (CTE) substantially similar to that of the bulk semiconductor substrate of the device 304. For example, the device 304 can be formed on a single crystal silicon substrate, and the bottom plate 424 can be formed from a single crystal silicon or polycrystalline silicon substrate.

[0040] Since the silicon substrate is typically too brittle to securely connect the cooling assembly 400 to the coolant delivery line, the manifold lid 326 can be formed of a material different from that of the cold plate body 324. In some embodiments, the manifold lid 326 can be formed using a relatively ductile material that is less brittle than the material used to form the cold plate body 324, such as, for example, a metal, a polymer, or a laminate. Here, the manifold lid 326 can be attached to the cold plate body 324 using an adhesive layer 330 disposed therebetween. In some embodiments, the adhesive layer 330 is relatively flexible to absorb movement between the manifold lid 326 and the cold plate body 324 caused by differences in the CTE of the different materials throughout repeated thermal cycles.

[0041] As shown in FIG. 4, the bottom plate 424 includes a first concave surface 404, and the manifold cover 326 includes one or more second concave surfaces 402 that are aligned with the first concave surface 404. For this purpose, the bottom plate 424 and the manifold cover 326 jointly define a fluid cavity 310 therebetween. Here, the cavity 310 is fluidly connected to an inlet opening 406a and an outlet opening 406b disposed through the manifold cover 326, forming a coolant flow path 438. As shown, the manifold cover 326 further includes a dividing wall 312 that extends downwardly within the cavity 310. The dividing wall 312 separates the inlet region of the cavity 310 from the outlet region and directs fluid into the recessed region of the cold plate body 324. Thus, the dividing wall 312 prevents the fluid from passing directly through a low-resistance flow path from the inlet 406a to the outlet 406b. In some embodiments, the manifold cover 326 includes connector features 414 that extend upwardly from its surface and / or threads (not shown) formed on the sidewalls of the openings 406a - b. The connector features 414 and / or the threads facilitate the attachment of the coolant supply line or accessories used to couple the manifold cover 326 to a coolant delivery line, such as line 208 (FIG. 2). In some embodiments, the cooling assembly 400 includes a plurality of protruding features 408, such as fins, columns, or pillars, that extend upwardly from the concave surface 404 of the bottom plate 424. The protruding features 408 can be used to disrupt the laminar fluid flow at the interface between the coolant and the bottom plate 424 and enhance the heat transfer therebetween.

[0042] Figures 5-7 illustrate exemplary assemblies 500, 600, and 700 that can be used in place of the cooling assembly 400 described above. In the example shown in FIG. 5, the cooling assembly 500 includes a cold plate body 501 and a manifold lid 526 attached to the cold plate body 501 using an adhesive layer 330. As shown, the manifold lid 526 is formed to include at least two concave surfaces 502a-b separated from each other by a dividing wall 512. The cold plate body 501 and the manifold lid 526 jointly define a plurality of fluid-connected cavities 510a-c that form a serpentine flow path 538 between an inlet opening 506a and an outlet opening 506b.

[0043] As shown, the cold plate body 501 includes a first bottom plate 524a that is substantially similar to the bottom plate 424, and a second bottom plate 524b disposed between the first bottom plate 524a and the manifold lid 526. The second bottom plate 524b separates at least two concave surfaces 502a-b from the concave surface 504 of the first bottom plate 524a. Here, each of the concave surfaces 502a-b and 504 and the second bottom plate 524b jointly define at least three cavities 510a-c, and these cavities are fluid-connected through openings 514a-b disposed through the second bottom plate 524b. In one embodiment, the cooling assembly 500 defines a flow path 538 that, in order (in the direction of flow), includes an inlet opening 506a, a first cavity 510a, two or more openings 514a that fluid-connect the first cavity 510a to a second cavity 510b, the second cavity 510b, two or more openings 514b that fluid-connect the second cavity 510b to a third cavity 510c, the third cavity 510c, and an outlet opening 506b.

[0044] In some embodiments, the plurality of protruding features 508 are formed to extend upward from the concave surface 504. The protruding features 508 disrupt the laminar flow at the interface between the coolant fluid and the concave surface 504 to enhance heat transfer therebetween. In some embodiments, the protruding features 508 define flow paths within the second cavity 510b, and these flow paths can be used to increase the flow rate of the coolant passing therethrough. In some embodiments, the ratio of the height of the protruding features 508 to the height of the second cavity 510b (measured in the Z direction) is about 1:3 or greater, for example, about 1:2 or greater, or 2:3 or greater, or for example about 3:4 or greater.

[0045] In the exemplary embodiment shown in FIG. 6, the cooling assembly 600 includes a cold plate body 601 and a manifold cover 626 attached to the cold plate body 601 using an adhesive layer 330. Here, the cold plate body 601 and the manifold cover 626 jointly define a plurality of fluid-connected cavities 610a - d. The cold plate body 601 includes a lower bottom plate 624a, an upper bottom plate 624d, and one or more intervening bottom plates 624b - c (two are shown) disposed between the lower bottom plate 624a and the upper bottom plate 624d. The manifold cover 626 includes a first concave surface 602a and a second concave surface 602b, which are separated from each other by a dividing wall 612, so that the manifold cover 626 and the upper bottom plate 624d define at least two cavities 610a and 610d. The one or more intervening bottom plates 624b - c have a concave surface 604 formed on the side facing the upper bottom plate 624d, and for this reason, the one or more intervening bottom plates 624b - c and the upper bottom plate 624d define the cavity 610b. Here, the lower bottom plate 624a is substantially similar to the lower bottom plate 524a of FIG. 5 and is formed to have a concave surface 504 and a plurality of protruding features 508 extending upward from the concave surface 504. The one or more intervening bottom plates 624b - c and the lower bottom plate 624a define the cavity 610c.

[0046] As shown in the figure, the cavities 610a - d are in fluid communication with each other through the openings 614a - d formed through the bottom plates 624a - d. The openings 614a - d and the cavities 610a - d together define a coolant flow path 638. In one embodiment, the flow path 638, in order (in the direction of flow), includes an inlet opening 606a, a first cavity 610a, a first opening 614a disposed through the upper bottom plate 624d, a second cavity 610b, one or more second openings 614b disposed through one or more intervening bottom plates 624b - c, a third cavity 610c, one or more third openings 614c disposed through one or more intervening bottom plates 624b - c and the upper bottom plate 624d, a fourth cavity 610d, and an outlet opening 606b.

[0047] In the example shown in FIG. 7, the cooling assembly 700 includes a cold plate body 701 and a manifold cover 526 that jointly define fluidly connected cavities 710a, 710b, and 710c. Here, the cold plate body 701 includes a lower bottom plate 724a having a plurality of sidewalls directly joined to the peripheral region of the back side 320 of the device 304, a second bottom plate 724b disposed on the lower bottom plate 724a, and a manifold cover 526 disposed and attached on the second bottom plate 524b using an adhesive layer 330. The lower bottom plate 724a, the second bottom plate 724b, and the back side 320 of the device 304 define the cavity 710b, and the back side 320 is directly exposed to the flow path 738 without an intervening portion of the cold plate body 701 being disposed therebetween.

[0048] In FIG. 7, the manifold cover 526 and the second bottom plate 724b are substantially the same as those described above in connection with FIG. 5, and for that reason its flow path includes, in order, the inlet opening 506a, the first cavity 710a, one or more first openings 514a, the second cavity 710b, one or more second openings 514b, the third cavity 710c, and the outlet opening 506b. However, the lower bottom plate 724a is intended to be usable as the first bottom plate or the lower bottom plate for any of the exemplary cooling assemblies described herein. In such embodiments, at least one cavity is partially defined by the device 304, and the back side 320 is directly exposed to the coolant flowing therethrough. The smaller area of the lower bottom plate 724a (compared to the area of the back side of the device 304) is thought to allow for a greater CTE mismatch between the respective substrate materials without sacrificing the reliability of the joints throughout the repeated thermal cycles. In some embodiments, the area of the lower bottom plate 724a at the bonding interface is about 60% or less of the area of the device 304, for example, about 50% or less, 40% or less, 30% or less, or for example about 20% or less.

[0049] In some embodiments, the device 304 includes a plurality of raised or protruding features 708 formed within or on the back side 320. These protruding features 708 increase the fluid turbulence (disturb the laminar flow) at the boundary between the coolant fluid and the back side 320, thereby increasing the heat transfer rate from the device 304 to the coolant fluid. To further enhance the heat dissipation from the device, the features 708 can be formed of a thermally conductive metal such as copper and can be formed using any suitable processes such as lithography and etching processes.

[0050] It should be noted that the substrate used to form the above-described cryogenic plate body is not limited to crystalline silicon, since it is considered possible to form one or both of the cryogenic plate body and the manifold lid from a bulk substrate material including a metal, metal alloy, ceramic, composite material, or other low CTE material suitable for joining using the method described below. For example, the cryogenic plate body can be made of copper, aluminum, copper alloys (e.g., copper molybdenum alloy and copper tungsten alloy), iron cobalt nickel alloys (e.g., Kovar® manufactured by Magellan Industrial Trading Co., Inc., South Norwalk, Connecticut, USA), iron cobalt nickel silver alloys, iron nickel alloys (e.g., Invar® superalloy manufactured by Magellan), iron nickel silicon alloys, aluminum silicon carbide, aluminum silicon alloys, beryllium, beryllium oxide, a composite material of beryllium and beryllium oxide, aluminum graphite fibers, copper graphite fibers, metal diamond composite materials (e.g., aluminum diamond composite material and silver diamond composite material), metal oxides, metal nitrides, and combinations thereof. An amorphous silicon substrate material can be prepared for the joining described below, which may or may not include a dielectric layer deposited on the lower joining surface. In some embodiments, both the manifold lid and the cryogenic plate body can be formed from a bulk substrate material of amorphous silicon. In such embodiments, the manifold lid can be attached to the cryogenic plate body, with or without an intervening adhesive layer.

[0051] FIG. 8 is a flowchart of a method of manufacturing the cooling assembly described above. Generally, the method includes joining a substrate including a plurality of pre-singulated semiconductor devices to a substrate including a plurality of pre-singulated cooling assemblies to form a joined substrate stack, and singulating individual cooling assemblies from this substrate stack, e.g., by die cutting. FIGS. 9A-9D and FIGS. 10A-10B are schematic side cross-sectional views of substrates showing aspects of the manufacturing method specified in FIG. 8.

[0052] In block 802, method 800 includes aligning a first substrate 902 with a second substrate 904, where the first substrate 902 includes a plurality of pre - singulated dies, such as semiconductor devices 304, and the second substrate 904 includes a plurality of pre - singulated cryoplate bodies 901. The cryoplate body 901 can be formed from one or more bottom plates 924a - b (two are shown) according to any of the embodiments described above with reference to FIGS. 4 - 7. As shown, the first substrate 902 includes an active side 318 and a back side 320 opposite the active side 318, where the active side 318 includes a plurality of semiconductor devices 304. Generally, the plurality of semiconductor devices 304 are arranged in a rectangular array and are spaced apart from each other by a plurality of scribe lines 906 that extend in the X - direction and the Y - direction to form a grid pattern. The plurality of scribe lines 906 can be defined by the boundaries of the semiconductor devices 304 formed on the active side and typically do not penetrate the thickness of the substrate 902 before singulation.

[0053] The first substrate 902 can include a bulk material and a plurality of material layers disposed on the bulk material. The bulk material can include any semiconductor material suitable for fabricating semiconductor devices, such as silicon, silicon germanium, germanium, III - V semiconductor materials, II - VI semiconductor materials, or combinations thereof. For example, in some embodiments, the first substrate 902 can include a single - crystal wafer, such as a silicon wafer, a plurality of device components formed within or on the silicon wafer, and a plurality of interconnect layers formed on the plurality of device components. In other embodiments, the substrate can include a reconfigured substrate, such as a substrate formed from a plurality of singulated devices embedded in a support material.

[0054] The bulk material of the first substrate 902 can be thinned using one or more backside grinding, etching, and polishing operations that remove material from the backside 320 after the device 304 is formed. Thinning the first substrate 902 can include using a combination of grinding and etching processes to reduce the thickness (Z-direction) to about 450 um or less, for example, about 300 um or less, or about 150 um or less. After thinning, a chemical mechanical polishing (CMP) process can be used to polish the backside 320 to a desired smoothness, and a dielectric layer 430 can be deposited thereon. In some embodiments, the dielectric layer can be polished to a desired smoothness to prepare the substrate 902 for the bonding process. In some embodiments, the method 800 can include forming a plurality of metal features 434 (FIG. 4) in the dielectric layer 430 in preparation for the hybrid bonding process, such as by using a damascene process.

[0055] In some embodiments, the active side 318 is temporarily bonded to a carrier substrate (not shown) before or after the thinning process. Using a carrier substrate provides support for the thinning operation and / or the thinning material and facilitates handling of the substrate during one or more of the subsequent manufacturing operations described herein.

[0056] Here, the second substrate 904 is formed by a plurality of substrates 904a-b (two are shown), each including a single bulk material patterned to define a plurality of bottom plates 924a-b. Each of the plurality of substrates 904a-b can have substantially the same size and shape as the first substrate 902 when viewed from top to bottom (Z-direction), so the interfaces are substantially coextensive with each other. In some embodiments, each of the substrates 904a-b has a thickness (Z-direction) between about 0.5 mm and about 10 mm, or between about 1 mm and about 8 mm, or between about 1 mm and 6 mm, for example, about 0.5 mm or more, for example, about 1 mm or more, or about 2 mm or more, or about 10 mm or less, for example, about 8 mm or less, or about 6 mm or less.

[0057] In some embodiments, each of substrates 904a - b is patterned using a combination of a lithography process and an etching process. For example, in some embodiments, patterning the surface of substrates 904a - b includes patterning a mask layer using a lithography process and removing material from the surface of substrates 904a - b by exposing the surface to a chemically reactive etchant through the openings of the mask layer. In some embodiments, each of substrates 904a - b is patterned using a micro - grinding process, in which case micro - grinding particles are directed towards the substrate surface through openings formed in a mask template or a mask layer disposed on or above the substrate. It should be noted that in each of the above - described example embodiments, the side walls of the cavities extending from the respective concave surfaces 404, 504, 604 and the side surfaces of the protruding features 408 and 508 are shown as having a substantially vertical orientation such as obtained from a typical isotropic etching process. However, the openings can be formed using an anisotropic etching process, and likewise, the side walls of the cavities or the side surfaces of the features can be inclined with respect to the concave surfaces. For example, in other embodiments where the cryoplate body includes an amorphous silicon material such as the above - described metals, metal alloys, ceramics, or composite materials, patterns can be formed using any suitable method such as machining, casting, forging, or molding.

[0058] As shown in the illustration, one or more substrates 904a - b are aligned with each other and directly bonded to form a second substrate 904. In some embodiments, each of the substrates 904a - b is formed of a bulk material that includes silicon such as single crystal silicon or polysilicon or consists substantially of only silicon, and the surfaces of the substrates 904a - b are directly bonded to each other using a direct silicon bonding method or a silicon fusion bonding method. For example, a plasma or a fluoride - containing etchant can be used to treat the silicon surfaces of the substrates 904a - b, align and bring them into contact with each other, and then heated to a temperature exceeding about 700 °C, for example, a temperature between 800 °C and 1000 °C to generate a bond between the silicons. In some embodiments, the substrates 904a - b can be bonded by direct bonding formed between dielectric layers formed on a bulk substrate material such as the direct bonding method described in relation to block 804.

[0059] In some embodiments, each of substrates 904a - b is formed of the same bulk material or different bulk materials having substantially similar coefficients of thermal expansion (CTEs), where the CTE is the rate of change of material length (in the X - Y plane) per degree of temperature change. In some embodiments, substrates 904a - b are formed of a material having a CTE that is substantially similar or "matched" to the CTE of the bulk material used to form the first substrate 902. In some embodiments, the CTEs of each of substrates 902 and 904a - b are matched such that when measured over a desired temperature range, the CTE of substrates 904a - b is within about ±20% or less, for example, within ±15% or less, within ±10% or less, or within about ±5% or less of the CTE of the first substrate 902. In some embodiments, the CTEs of each of substrates 902 and 904a - b are matched over a temperature range from about - 60°C to about 200°C or from about 60°C to about 175°C. In one example embodiment, the CTE - matching materials for the first substrate 902 and substrates 904a - b each contain silicon. For example, the bulk material of the first substrate 902 can contain single - crystal silicon, and the bulk materials of substrates 904a - b can contain single - crystal silicon or poly - crystal silicon. In some embodiments, method 800 includes forming a dielectric layer 432 and optionally a plurality of metal features 434 (FIG. 4) on the lower surface 920 of the second substrate 904.

[0060] In block 804, method 800 includes directly bonding a plurality of cryoplate bodies 901 formed in the second substrate 904 to a plurality of semiconductor devices 304 within the first substrate 902. As described above, the bonding surfaces each include dielectric layers 430, 432, and directly bonding the first substrate 902 and the second substrate 904 includes forming a dielectric bond between the dielectric layers 430, 432. Optionally, the first substrate 902 and the second substrate 904 can be directly bonded using a hybrid of dielectric and metal bonds formed between metal features 434, 436 (FIG. 4).

[0061] Generally, directly bonding surfaces (of dielectric layers 430, 432) involves preparing, aligning, and bringing the surfaces into contact. Preparing the surfaces can include smoothing each surface to a desired surface roughness such as between 0.1 and 3.0 nm RMS, activating the surfaces to weaken or cleave chemical bonds within the dielectric, and terminating the surfaces with desired chemical species. Smoothing the surfaces can include polishing substrates 902, 904 using a chemical mechanical polishing (CMP) process. Activating and terminating the surfaces (of dielectric layers 430, 432) with desired chemical species can include exposing the surfaces to radical species formed within a plasma.

[0062] In some embodiments, the plasma is formed using a nitrogen-containing gas, such as N2, and the terminating chemical species include nitrogen and hydrogen. In some embodiments, the surfaces (430, 432) can be activated using a wet cleaning process, such as by exposing the surfaces to an aqueous ammonia solution. In some embodiments, the dielectric bond can be formed using a dielectric layer deposited on only one of substrates 902, 904, i.e., dielectric layer 430 or 432 can be deposited on cryoplate body 324 or on integrated device 304, but not on both. In those embodiments, the direct dielectric bond can be formed by bringing the deposited dielectric layer of one substrate into direct contact with the bulk material surface of the other substrate, such as a bulk semiconductor or polysilicon material surface. In such embodiments, the bulk material surface can include a thin layer of native oxide or can be cleaned prior to contact such that there is substantially no native oxide present.

[0063] Forming a direct dielectric bond directly between substrates at block 804 involves bringing the prepared and aligned surfaces into direct contact at a temperature of less than 150°C, such as less than 100°C, such as less than 30°C, or around room temperature, such as between 20°C and 30°C. Without being bound by theory, it is believed that during the direct bonding process, hydrogen-terminated species diffuse from the interface bonding surface and chemical bonds are formed between the remaining nitrogen species. In some embodiments, the direct bond is strengthened using an annealing process, in which case the substrate is heated to a temperature higher than about 30°C and lower than about 450°C, such as higher than about 50°C and lower than about 250°C, or up to about 150°C, and maintained at that temperature for more than about 5 minutes, such as for about 15 minutes. Usually, the bond is strengthened over time without applying heat. Thus, in some embodiments, the method does not include heating the substrate.

[0064] In embodiments where the substrates are bonded using hybrid dielectric and metal bonding, the method can further include planarizing or recessing the metal features 434, 436 below the field plane before bringing the dielectric layers 430, 432 into contact and bonding them. After the dielectric bond is formed, the substrates 902, 904 can be heated to a temperature of 150°C or higher for a period of about 1 hour or more, such as between 8 and 24 hours, to form a direct metallurgical bond between the metal features 434, 436. Suitable direct dielectric and hybrid bonding techniques that can be used to implement the aspects of the methods described herein include ZiBond® and DBI®, respectively commercially available from Adeia Holding Corp. of San Jose, California, USA.

[0065] At block 806, method 800 includes attaching a plurality of manifold covers 926 (FIG. 9B) to the upward facing 922 of a second substrate 904 to form a bonded substrate stack 912. In some embodiments, as shown in FIG. 9B, the manifold covers 926 are defined by a repeating pattern formed in a third substrate 910. In those embodiments, the third substrate 910 can include a single body of one or more relatively ductile materials such as metal, polymer, epoxy, or laminate. In those embodiments, attaching the plurality of manifold covers 926 can include aligning the third substrate 910 with the second substrates 904a - b in the Z direction and bonding the third substrate 910 to the substrates 904a - b using an adhesive layer 908. Here, the adhesive layer 908 can be formed of a flexible material to absorb relative movement caused by CTE mismatch between the substrates 904a - b and the third substrate 910. In some embodiments, before directly bonding the first substrate 902 and the second substrate 904, the third substrate 910 is attached to the second substrate 904 to form a substrate stack 912 including a plurality of pre - unitized cooling assemblies 900 (FIG. 9C).

[0066] At activity 808, method 800 includes unitizing a plurality of cooling assemblies 900 (FIG. 9D) and a device 304 bonded thereto. As shown, each cooling assembly 900 includes a cold plate body 901 and a manifold cover 926 attached to the cold plate body 901, each of which can have any one or a combination of the features of the cooling assemblies shown in FIGS. 4 - 7.

[0067] As shown in FIG. 9D, the method 800 imparts to the cooling assembly 900 unique structural characteristics such that the mating surface of each cooling assembly 900 has the same perimeter as the back side of each device 304 joined thereto. Thus, the side walls of the cooling assembly 900 are typically flush with the edges of the device 304 with respect to their common perimeter. In some embodiments, the cooling assembly 900 is singulated from a second substrate stack 912 using a process of cutting or slicing the substrate stack 912 in a vertical plane, i.e., parallel to the Z direction. In those embodiments, the side surfaces of the cooling assembly 900 are substantially perpendicular to the horizontal (X-Y) plane of the back side of the device, i.e., the attachment interface between the device 304 and the cooling assembly 900. In some embodiments, the cooling assembly 900 is singulated using a saw or laser die cut process.

[0068] In FIGS. 9A-9D, each of the substrates 902 and 904 includes a corresponding number of devices 304 and cold plate bodies 901 that are aligned and joined to each other. However, in a typical manufacturing process, it must be recognized that prior to the method 800, at least some of the devices fabricated on the substrate may not function or may otherwise fail to meet quality control criteria. In such cases, it may be desirable to replace non-functional devices with singulated alternative devices formed on other substrates prior to bonding at block 804. In such an implementation, the alternative device can be singulated from another substrate either before or after depositing and polishing the back dielectric layer and before or after activating the back side. For example, a non-functional device can be singulated from the substrate 902, removed from the carrier substrate to form an opening. Thereafter, but before activating the mating surfaces 430, 432, the alternative device can be placed on the carrier substrate. Alternatively, the substrates 902, 904 can be bonded and then the alternative devices can be separately activated, aligned, and bonded to the opening surface of the second substrate 904.

[0069] In other embodiments, such as those shown in FIGS. 10A - 10B, a plurality of separate manifold covers 1026 are individually attached to the surface 922 to form the cooling assembly 1000. In those embodiments, the cooling assembly 1000 is directly joined to the device 304, and the outer sidewall of the cold plate body 901 is flush with the edge of the device 304. As shown, the sides of the manifold covers 1026 may be recessed (in the X and Y directions) from the sidewalls of the cold plate body 901.

[0070] FIG. 11 is a flow diagram of a method 1100 for manufacturing an embedded cooling assembly using a die - substrate bonding process, where individual dies are singulated prior to the method. FIGS. 12A - 12B and FIGS. 13A - 13B illustrate aspects of the method 1100.

[0071] In blocks 1102 and 1104, the method 1100 includes aligning a plurality of singulated devices 1204 with a first substrate stack 904 using, for example, a pick - and - place process and directly bonding the devices 1204 to the substrate stack using, for example, the direct bonding method described above. Here, the singulated devices 1204 can be bonded to the first substrate stack 904 before or after attaching the third substrate 910 or separate manifold covers 1026 (shown in FIG. 10A). The singulated devices 1204, the first substrate stack 904, and the third substrate 910 form a second substrate stack 1212.

[0072] In block 1106, the method 1100 includes singulating a plurality of cooling assemblies 1200 from the second substrate stack to form a plurality of cooling assemblies 1200, where in this case, the perimeter of each device 1204 is recessed from the perimeter of the cold plate body 901 when viewed from the Z - direction.

[0073] In some embodiments, the method 1100 includes directly bonding a plurality of support features 1304 to the bonding surface 920 of the first substrate stack 904 (as shown in FIG. 13A) and integrating a plurality of cooling assemblies 1300 (FIG. 13B). The plurality of support features 1304 can be formed of the same material, such as silicon, and can have the same thickness as the device 1204. In those embodiments, the support features 1304

[0074] After integration at block 1104, can have a perimeter that is substantially coextensive with the perimeter of the cold plate body 901.

[0075] The method described above advantageously provides an embedded fluidic cooling assembly that eliminates and / or substantially reduces the thermal resistance path typically associated with a cooling system attached external to the device package. The cooling assembly can be attached to the semiconductor device using a direct dielectric bonding method or a direct hybrid dielectric and metal bonding method. Such bonding methods can substantially improve the bonding strength with a relatively low amount of heat compared to conventional silicon-to-silicon bonding methods such as the thermocompression method.

[0076] The cooling assembly generally includes a cold plate body and a manifold lid attached to the cold plate body, each formed of a different material having different thermal properties. The cold plate body and the semiconductor device are typically formed of CTE-matched materials, which obviates the need for an intervening TIM layer. The manifold lid is typically formed of a material that is less brittle than the cold plate body, enabling a connection to a less vulnerable / more robust cooling fluid delivery source. Typically, the cold plate body and the manifold lid are formed of CTE-mismatched materials and are attached to each other using a flexible adhesive layer. The adhesive layer absorbs the difference in linear expansion between the manifold lid and the cold plate body during repeated thermal cycles, extending the useful life of the cooling assembly.

[0077] The embodiments discussed above are intended as examples and not limitations. Those skilled in the art will recognize that individual aspects of the cooling assemblies, device packages, and methods discussed herein may be omitted, modified, combined, and / or rearranged without departing from the scope of the invention. Only the following claims are meant to set limits with respect to what the invention encompasses.

Description of the Reference Numerals

[0078] 304 semiconductor device 318 active side 320 back side 324 cryoplate body 326 manifold lid 400 embedded cooling assembly

Claims

1. A cooling assembly attached to a standalone device, A low-temperature plate body including a first side adjacent to the standalone device and a second side opposite to it, The manifold cover is attached to the second side, One or both of the bonding surface on the first side of the low-temperature plate body and the bonding surface on the back side of the standalone device contain a dielectric, The low-temperature plate body is attached to the standalone device by a direct dielectric bond formed between the bonding surfaces. The low-temperature plate body and the manifold lid define one or more cavities. A cooling assembly in which the one or more cavities form at least a portion of a fluid flow path from the inlet to the outlet of the manifold cover.

2. The cooling assembly according to claim 1, further comprising a coolant fluid disposed in one or more of the cavities.

3. Each of the low-temperature plate body and the individual device includes a copper feature portion disposed on the respective bonding surface. The cooling assembly according to claim 1, wherein the cooling assembly is attached to the standalone device by a direct dielectric bond formed between the bonding surfaces and a direct metallic bond formed between the copper feature portions.

4. The cooling assembly according to claim 1, wherein the surfaces of the low-temperature plate body and the side wall of the standalone device are substantially flush with each other.

5. The cooling assembly according to claim 4, wherein the side wall surface of the cryogenic plate body is substantially perpendicular to the back side of the standalone device.

6. The cooling assembly according to claim 1, wherein the side surface of the manifold lid is substantially coplane with the side surface of the low-temperature plate body.

7. The cooling assembly according to claim 1, wherein the low-temperature plate body includes a plurality of stacked bottom plates.

8. The plurality of bottom plates include a lower bottom plate directly bonded to the individualized device and an upper bottom plate directly bonded to the lower bottom plate. The cooling assembly according to claim 7, wherein the fluid passage includes, in order, a first cavity located between the upper bottom plate and the manifold cover, a second cavity located between the upper bottom plate and the lower bottom plate, and a third cavity located between the manifold cover and the upper bottom plate.

9. The plurality of base plates include a lower base plate, an upper base plate, and one or more interposing base plates positioned between the lower base plate and the upper base plate. The cooling assembly according to claim 7, wherein the fluid passage includes, in order, a first cavity located between the upper bottom plate and the manifold cover, a second cavity located between the upper bottom plate and the one or more interposing bottom plates, a third cavity located between the one or more interposing bottom plates and the lower bottom plate, and a fourth cavity located between the upper bottom plate and the manifold cover.

10. The low-temperature plate body includes one or more single-crystal or polycrystalline silicon substrates. The cooling assembly according to claim 1, wherein the manifold cover comprises a metal, polymer, or epoxy material.

11. The manifold cover and the low-temperature plate body have different coefficients of thermal expansion. The cooling assembly according to claim 1, wherein the manifold cover is attached to the low-temperature plate body by an adhesive material layer.

12. The cooling assembly according to claim 1, wherein at least a portion of the back side of the standalone device is directly exposed to the fluid flow path.

13. A cooling assembly attached to a standalone device, A low-temperature plate body including a first side adjacent to the standalone device and a second side opposite to it, The manifold cover is attached to the second side, The low-temperature plate body is directly bonded to the standalone device. The bonding surfaces of the low-temperature plate body and the standalone device are substantially flush with each other. A cooling assembly in which the low-temperature plate body and the manifold cover define one or more cavities that form at least a portion of the fluid flow path from the inlet to the outlet of the manifold cover.

14. The cooling assembly according to claim 13, further comprising a coolant fluid disposed in one or more of the cavities.

15. One or both of the bonding surface on the first side of the low-temperature plate body and the bonding surface on the back side of the standalone device contain a dielectric, Each of the low-temperature plate body and the individual device includes a copper feature portion disposed on the respective bonding surface. The cooling assembly according to claim 13, wherein the cooling assembly is attached to the standalone device by a direct dielectric bond formed between the bonding surfaces and a direct metallic bond formed between the copper feature portions.

16. The cooling assembly according to claim 13, wherein the surfaces of the low-temperature plate body and the side wall of the standalone device are substantially flush with each other.

17. The cooling assembly according to claim 16, wherein the side wall surface of the cryogenic plate body is substantially perpendicular to the back side of the standalone device.

18. The cooling assembly according to claim 13, wherein the side surface of the manifold cover is substantially co-plane with the side surface of the cryogenic plate body.

19. The cooling assembly according to claim 13, wherein the low-temperature plate body includes a plurality of stacked bottom plates.

20. The plurality of bottom plates include a lower bottom plate directly bonded to the individualized device and an upper bottom plate directly bonded to the lower bottom plate. The cooling assembly according to claim 19, wherein the fluid passage includes, in order, a first cavity located between the upper bottom plate and the manifold cover, a second cavity located between the upper bottom plate and the lower bottom plate, and a third cavity located between the manifold cover and the upper bottom plate.

21. The plurality of base plates include a lower base plate, an upper base plate, and one or more interposing base plates positioned between the lower base plate and the upper base plate. The cooling assembly according to claim 19, wherein the fluid passage includes, in order, a first cavity located between the upper bottom plate and the manifold cover, a second cavity located between the upper bottom plate and the one or more interposing bottom plates, a third cavity located between the one or more interposing bottom plates and the lower bottom plate, and a fourth cavity located between the upper bottom plate and the manifold cover.

22. The low-temperature plate body includes one or more single-crystal or polycrystalline silicon substrates. The cooling assembly according to claim 13, wherein the manifold cover comprises a metal, polymer, or epoxy material.

23. The manifold cover and the low-temperature plate body have different coefficients of thermal expansion. The cooling assembly according to claim 13, wherein the manifold cover is attached to the low-temperature plate body by an adhesive material layer.

24. The cooling assembly according to claim 13, wherein at least a portion of the back side of the standalone device is directly exposed to the fluid flow path.

25. The cooling assembly according to claim 1, wherein the low-temperature plate has inclined side walls formed by wet etching.

26. The cooling assembly according to claim 1, wherein the low-temperature plate has substantially vertical side walls formed by dry etching.

27. ​​The cooling assembly according to claim 13, wherein the low-temperature plate has inclined side walls formed by wet etching.

28. The cooling assembly according to claim 13, wherein the low-temperature plate has substantially vertical side walls formed by dry etching.

29. The cooling assembly according to claim 1, wherein the first cavity of the one or more cavities forms a first portion of the fluid flow path, and the cooling assembly further includes a plurality of feature portions protruding into the first cavity, the plurality of feature portions defining a plurality of flow paths within the first portion of the fluid flow path.

30. The cooling assembly according to claim 13, wherein the first cavity of the one or more cavities forms a first portion of the fluid flow path, and the cooling assembly further includes a plurality of feature portions protruding into the first cavity, the plurality of feature portions defining a plurality of flow paths within the first portion of the fluid flow path.

31. The cooling assembly according to claim 8, wherein the fluid passage has a third cavity, different from the first cavity, located between the manifold cover and the upper bottom plate.

32. The cooling assembly according to claim 9, wherein the fluid passage has a fourth cavity, different from the first cavity, located between the upper bottom plate and the manifold cover.

33. The cooling assembly according to claim 20, wherein the fluid passage has a third cavity, different from the first cavity, located between the manifold cover and the upper bottom plate.

34. The cooling assembly according to claim 21, wherein the fluid passage has a fourth cavity, different from the first cavity, located between the upper bottom plate and the manifold cover.

Images