Precise Feedback Control of a Bias Voltage Adjusted Waveform for a Plasma Etching Process

Abstract

A bias electrode and an intermediate electrode are disposed within a substrate support. The lower part of the substrate support exists between the bias electrode and the intermediate electrode. The upper part of the substrate support exists between the intermediate electrode and the upper surface of the substrate support. A voltage supply system supplies a bias voltage-adjusted radio frequency waveform to the bias electrode. A voltage measurement system measures a first voltage on the bias electrode and a second voltage on the intermediate electrode. A controller uses the first voltage, the second voltage, the capacitance of the lower part of the substrate support, and the capacitance of the upper part of the substrate support to determine the voltage of the upper surface of the substrate existing on the upper surface of the substrate support. The controller transmits the voltage on the upper surface of the substrate to the voltage supply system.

Description

Background Art

[0001] Plasma processing systems are used to fabricate semiconductor devices (e.g., chips / dies) on semiconductor wafers. In a plasma processing system, a semiconductor wafer is exposed to various types of plasmas to cause a predetermined change in the state of the semiconductor wafer, for example, through material deposition and / or material removal and / or material implantation and / or material modification, etc. During plasma processing of a semiconductor wafer, radio frequency (RF) power is transmitted through a process gas in a chamber to convert the process gas into a plasma when the process gas is exposed to the semiconductor wafer. The reactive components of the plasma, such as radicals and ions, interact with the materials on the semiconductor wafer to bring about a predetermined effect on the semiconductor wafer. In some plasma processing systems, a bias voltage is applied at the level of the semiconductor wafer to attract the charged components in the plasma to the semiconductor wafer.

[0002] As the semiconductor industry continues to drive the reduction of chip size and the improvement of chip performance, it is necessary to use more highly dense and high aspect ratio features to define transistors on a chip, whereby the transistors become more sensitive to variations in the manufacturing process. With the reduction of the feature size on the chip, it may be necessary to improve the etching uniformity control due to variations of just a few atoms in some manufacturing processes. The uniformity of the ion flux, ion energy, and ion angular distribution across the entire semiconductor wafer is a requirement for plasma etching and deposition for microelectronics manufacturing. Also, achieving substantially uniform ion flux, ion energy, and ion angular distribution at the edge of the semiconductor wafer is a significant challenge. This is because approximately 10% of the dies on the substrate are affected by the results of the manufacturing process within a distance of approximately 5 mm radially from the outer peripheral edge of the semiconductor wafer. The various embodiments described herein arise from such a background.

Summary of the Invention

[0003] In an exemplary embodiment, the system includes a bias electrode disposed within a substrate support. The substrate support has an upper surface configured to support a substrate. The system also includes an intermediate electrode disposed within the substrate support, such that a lower portion of the substrate support is present between the bias electrode and the intermediate electrode, and an upper portion of the substrate support is present between the intermediate electrode and the upper surface of the substrate support. The system also includes a voltage supply system connected to supply a bias voltage-adjusted radio frequency waveform to the bias electrode. The system also includes a voltage measurement system connected to measure a first voltage on the bias electrode and a second voltage on the intermediate electrode. The system also includes a controller configured to determine a voltage on the upper surface of the substrate when the substrate is present on the upper surface of the substrate support using the measured first voltage, the measured second voltage, the capacitance of the lower portion of the substrate support, and the capacitance of the upper portion of the substrate support. The controller is configured to communicate information related to the voltage on the upper surface of the substrate to the voltage supply system.

[0004] In an exemplary embodiment, a substrate support system for a plasma processing system is disclosed. The substrate support system includes a substrate support having an upper surface configured to support a substrate. The substrate support system also includes a bias electrode disposed within the substrate support. The bias electrode is configured to control a voltage on the upper surface of the substrate. The bias electrode is connected to receive a bias voltage-adjusted radio frequency waveform from a voltage supply system. The bias electrode is configured to electrically receive a first connector to measure a first voltage on the bias electrode. The substrate support system also includes an intermediate electrode disposed within the substrate support, such that a lower portion of the substrate support is present between the bias electrode and the intermediate electrode, and an upper portion of the substrate support is present between the intermediate electrode and the upper surface of the substrate support. The intermediate electrode is configured to electrically receive a second connector to measure a second voltage of the intermediate electrode.

[0005] In an exemplary embodiment, an edge ring system for a plasma processing system is disclosed. The edge ring system includes an edge ring configured to circumscribe a substrate support. The edge ring system also includes an edge ring electrode disposed within the edge ring. The edge ring electrode is configured to control a voltage on an upper surface of the edge ring. The edge ring electrode is connected to receive a bias voltage adjusted radio frequency waveform from a voltage supply system. The edge ring electrode is configured to electrically receive a first connector to measure a first voltage on the edge ring electrode. The edge ring system also includes an edge ring middle electrode disposed within the edge ring such that a lower portion of the edge ring exists between the edge ring electrode and the edge ring middle electrode and an upper portion of the edge ring exists between the edge ring middle electrode and an upper surface of the edge ring. The edge ring middle electrode is configured to electrically receive a second connector to measure a second voltage on the edge ring middle electrode.

[0006] In an exemplary embodiment, a method for controlling a voltage on a substrate is disclosed. The method includes operating a voltage supply system to supply a bias voltage adjusted radio frequency waveform to a bias electrode within a substrate support. The method also includes measuring a first voltage on the bias electrode at a given time. The method also includes measuring a second voltage on a middle electrode at a given time. The middle electrode is disposed within the substrate support such that a lower portion of the substrate support exists between the bias electrode and the middle electrode and an upper portion of the substrate support exists between the middle electrode and an upper surface of the substrate support. The method also includes using the measured first voltage, the measured second voltage, a capacitance of a lower portion of the substrate support, and a capacitance of an upper portion of the substrate support to determine a voltage on an upper surface of the substrate when present on the upper surface of the substrate support at a given time.

[0007] Other aspects and advantages of the embodiments disclosed herein will become more apparent from the following detailed description and the accompanying drawings.

Brief Description of the Drawings

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[0028] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. However, it will be apparent to one of ordinary skill in the art that some or all of these specific details may be omitted and the embodiments of the present disclosure may still be practiced. In other instances, well-known process operations have not been described in detail so as not to unnecessarily obscure the present disclosure.

[0029] Figure 1A is a vertical cross-sectional view of a plasma processing system 100 according to some embodiments. The plasma processing system 100 includes a chamber 101. A coil 109 is disposed above a window 107 of the chamber 101. In various embodiments, the window 107 is a dielectric material such as quartz or other similar materials, and is formed of a dielectric material that can transmit RF power from the coil 109 through the window 107 to a plasma processing region 102 within the chamber 101. The chamber 101 is electrically connected to a reference ground potential 104. The plasma processing system 100 includes a TCP (transformer coupled plasma) RF generator 113 connected to send RF power to the coil 109 through an impedance matching network 111, as shown by connection 115.

[0030] The plasma processing system 100 is also mounted to provide a controlled flow of process gas or process gas mixture to the plasma processing region 102, as indicated by arrow 117. When RF power is transmitted into and through the plasma processing region 102, the RF power converts the process gas / mixture into a plasma 119 within the plasma processing region 102 upon exposure to a substrate 105 supported on a substrate support 103 within the chamber 101. The substrate support 103 has an upper surface 103T configured to support the substrate 105 while the upper surface 105T of the substrate 105 is processed by the plasma 119 generated above the substrate support 103. In some embodiments, the substrate support 103 is an electrostatic chuck configured to generate an electrostatic force that holds the substrate 105 against the upper surface 103T of the substrate support 103.

[0031] In various embodiments, the generation of plasma 119 causes a change to substrate 105 in a controlled manner. In various manufacturing processes, the change to substrate 105 can be a change in the material or surface condition on substrate 105. For example, in various manufacturing processes, the change to substrate 105 can include one or more of etching of material from substrate 105, deposition of material onto substrate 105, implantation of material into substrate 105, and / or modification of material present on substrate 105. Also, in some embodiments, plasma 119 is generated in plasma processing region 102 where substrate 105 is absent in order to provide cleaning of chamber 101. Plasma processing system 100 can be understood to be any type of plasma processing system in which RF power is transmitted to a process gas / mixture within plasma processing region 102 to generate plasma 119 over substrate 105 supported on upper surface 103T of substrate support 103. Plasma processing system 100 is also mounted to remove gas and process by-products from plasma processing region 102 through an exhaust system as indicated by arrow 121.

[0032] FIG. 1B is a top view of a substrate 105 disposed on a substrate support 103 according to some embodiments, and is referenced as the A-A viewing point of FIG. 1A. In some embodiments, the substrate 105 is a semiconductor wafer undergoing a manufacturing process. However, it should be understood that in various embodiments, the substrate 105 can be essentially any type of substrate subjected to a plasma-based manufacturing process. For example, in some embodiments, the substrate 105 is formed from silicon, sapphire, GaN, GaAs, or SiC, and / or other substrate materials, and can include glass panels / substrates, metal foils, metal sheets, polymer materials, etc. Further, in various mounting embodiments, the substrate 105 may differ in form, shape, and / or size. For example, in some embodiments, the substrate 105 is a semiconductor wafer with an outer diameter of 200 mm, 300 mm, 450 mm, or other sizes. Also, in some embodiments, the substrate 105 is a non-circular substrate, such as a rectangular substrate for a flat panel display, among other shapes.

[0033] As shown in FIG. 1A, in some embodiments, a bias electrode 123 is disposed within the substrate support 103 below the top surface 103T of the substrate support 103. In some embodiments, the substrate support 103 is formed from a dielectric material such as a ceramic material or other types of dielectric materials, and the bias electrode 123 is formed from a conductive material. In some embodiments, the plasma processing system 100 includes a bias RF generator 125 connected to send bias RF power to the bias electrode 123 through an impedance matching network 127, as shown by connection 129. The bias electrode 123 is configured to apply a bias voltage to the top surface 105T of the substrate 105 to attract or repel the charged components of the plasma 119 towards or away from the substrate 105.

[0034] In various embodiments, the operation of plasma processing system 100 can include many other additional operations, such as, among other additional operations, controlling the temperature of substrate 105 and / or applying additional RF power to one or more electrodes disposed within substrate support 103 to generate additional plasma. Also, in various embodiments, plasma processing system 100 operates according to a predetermined recipe that defines a timing schedule for controlling one or more of, among all other process parameters that are essentially related to the operation of plasma processing system 100, the supply of process gas(es) to plasma processing region 102, the pressure and temperature within plasma processing region 102, the supply of RF power to coil 109, and the supply of bias RF power to bias electrode 123.

[0035] Bias RF generator 125 is used to bias the processing of substrate 105 with a sinusoidal voltage. When an RF signal is supplied to bias electrode 123, the voltage on top surface 105T of substrate 105 vibrates periodically at the frequency of the RF signal. In this method of supplying an RF bias voltage to substrate 105, the distribution of the collision ion energy for etching features on top surface 105T of substrate 105 is not controlled. In some embodiments, since bias RF generator 125 has a one-dimensional control knob for RF voltage amplitude, bias RF generator 125 cannot independently control the ion flux incident on substrate 105. In these embodiments, the ion flux incident on substrate 105 is determined by the RF power supplied from TCP RF generator 113 to coil 109 and the amplitude of the RF bias voltage on top surface 105T of substrate 105 that directly affects the energy of the ions incident on top surface 105T of substrate 105. In some embodiments, bias RF generator 125 can regulate the output RF power in either a power regulation mode or a voltage regulation mode.

[0036] FIG. 2 shows, according to some embodiments, the voltage on the top surface 105T of the substrate 105 in response to the supply of a constant amplitude RF voltage to the bias electrode 123 by the bias RF generator 125, along with two different ion flux conditions present at the top surface 105T of the substrate 105. Curve V(output)201 represents the constant amplitude RF voltage supplied from the bias RF generator 125 to the bias electrode 123. Curve V(top surface of substrate 1 ampere)203 represents the voltage on the top surface 105T of the substrate 105 in response to the supplied RF bias voltage V(output)201 with a 1 ampere ion current present on the top surface 105T of the substrate 105. Curve V(top surface of substrate 0.5 ampere)205 represents the voltage on the top surface 105T of the substrate 105 in response to the supplied RF bias voltage V(output)201 with a 0.5 ampere ion current present on the top surface 105T of the substrate 105. FIG. 2 illustrates that even with a constant amplitude RF bias voltage supplied to the bias electrode 123 by the bias RF generator 125, the voltage on the top surface 105T of the substrate 105 can vary depending on the density of the plasma 119 and the ion flux incident on the substrate 105. Further, the variations induced by the plasma in the voltage behavior on the top surface 105T of the substrate 105 pose challenges related to the transfer of the manufacturing recipe of the substrate 105 from one processing chamber to another and the modification of the manufacturing recipe of the substrate 105.

[0037] FIG. 3A is a vertical cross-sectional view of a plasma processing system 300 according to some embodiments. The plasma processing system 300 is a modified form of the plasma processing system 100 of FIG. 1A. The plasma processing system 300 includes a chamber 101, a window 107, and a plasma processing region 102 within the chamber 101. The plasma processing system 300 also includes a TCPRF generator 113, an impedance matching network 111, a connection 115, and a coil 109 disposed above the window 107. The plasma processing chamber 300 also provides for the supply of process gas into the plasma processing region 102, as indicated by arrow 117, and the removal of process gas and by-products from the plasma processing region 102, as indicated by arrow 121. The RF power supplied from the TCPRF generator 113 to the plasma processing region 102 via the coil 109 and the RF transmissive window 107 converts the process gas into a plasma 119 within the plasma processing region 102 upon exposure to the substrate 105.

[0038] The plasma processing system 300 includes a substrate support 301 that is a modified form of the substrate support 103 described with respect to FIG. 1A. The substrate support 301 has an upper surface 301T configured to support the substrate 105 during processing. In some embodiments, the substrate support 301 is an electrostatic chuck configured to generate an electrostatic force that holds the substrate 105 against the upper surface 301T of the substrate support 301. The substrate support 301 also includes a bias electrode 123 disposed within the substrate support 301 below the upper surface 301T of the substrate support 301. In some embodiments, the substrate support 301 is formed from a dielectric material such as a ceramic material or other types of dielectric materials, and the bias electrode 123 is formed from a conductive material. In the substrate support 301, the bias electrode 123 is configured to apply a bias voltage to the upper surface 105T of the substrate 105 to attract or repel the charged components of the plasma 119 towards or away from the substrate 105.

[0039] In the plasma processing system 300, an edge ring 315 surrounds the substrate support 301 such that the upper surface 301T of the substrate support 301 is circumscribed by the edge ring 315. FIG. 3B is a top view of the substrate 105 disposed on the substrate support 301 with the edge ring 315 surrounding the substrate support 301 according to some embodiments, and is referenced as the A-A viewing point of FIG. 3A. The edge ring electrode 323 is disposed within the edge ring 315. In some embodiments, the edge ring 315 is formed of a dielectric material and the edge ring electrode 323 is formed of a conductive material. In some embodiments, the outer diameter portion of the substrate support 301 provides a support structure by extending radially outward below the edge ring 315, and the edge ring 315 is disposed thereon. However, regardless of how the edge ring 315 is vertically supported, it should be understood that the edge ring 315 circumscribes the upper surface 301T of the substrate support 301.

[0040] The bias electrode 123 is electrically connected to a bias voltage supply system 333 as shown by the connection 335. The edge ring electrode 323 is also electrically connected to the bias voltage supply system 333 as shown by the connection 337. The bias voltage supply system 333 is configured to control the voltage on the bias electrode 123 and the voltage on the edge ring electrode 323. The bias electrode 123 is configured to control the voltage on the upper surface 105T of the substrate 105 when the substrate 105 is present on the upper surface 301T of the substrate support 301. The voltage applied to the bias electrode 123 may be different from the corresponding voltage on the upper surface 105T of the substrate 105 due to various materials present between the bias electrode 123 and the upper surface 105T of the substrate 105, such as the dielectric material and other materials present within the substrate support 301 above the bias electrode 123 and the combination of the material of the substrate 105 itself. In some embodiments, the materials present between the bias electrode 123 and the upper surface 105T of the substrate 105 can be electrically represented as having a substantially fixed capacitance. A voltage measuring device 311 is connected to measure the voltage on the bias electrode 123 as shown by the connection 313.

[0041] In addition to the bias electrode 123, the substrate support 301 also includes a middle electrode 302. The middle electrode 302 is disposed within the substrate support 301 such that the lower portion 303 of the substrate support 301 is present between the bias electrode 123 and the middle electrode 302, and the upper portion 305 of the substrate support 301 is present between the middle electrode 302 and the upper surface 301T of the substrate support 301. In some embodiments, the middle electrode 302 is disposed near where a clamp voltage is applied to hold the substrate 105 on the substrate support 301. In various embodiments, the middle electrode 302 can be configured in various ways. For example, in some embodiments, the middle electrode 302 is substantially disk-shaped. In some embodiments, the middle electrode 302 has a grid shape. In some embodiments, the middle electrode 302 has a spoked shape. In some embodiments, the middle electrode 302 is configured as a set of concentrically spaced annular rings. The middle electrode 302 can be configured in essentially any way, but it should be understood that the voltage measured on the middle electrode 302 must represent the voltage that exists across / through the substrate support 301 at the vertical position of the middle electrode 302 within the substrate support 301. In some embodiments, one or more clamp electrodes disposed within the substrate support 301 are used as the middle electrode 302, and a well-known clamp voltage is applied to the one or more clamp electrodes to generate an electrostatic attraction force that holds the substrate 105 on the substrate support 301. A voltage measuring device 307 is connected to measure the voltage of the middle electrode 302, as indicated by the connection 309.

[0042] The edge ring electrode 323 is configured to control the voltage on the upper surface 315T of the edge ring 315. The voltage applied to the edge ring electrode 323 may be different from the corresponding voltage on the upper surface 315T of the edge ring 315 due to the dielectric material and other materials present within the edge ring 315 above the edge ring electrode 323. In some embodiments, the material present between the edge ring electrode 323 and the upper surface 315T of the edge ring 315 can be electrically represented as a substantially fixed capacitance. A voltage measurement device 325 is connected to measure the voltage of the edge ring electrode 323, as indicated by connection 327.

[0043] In addition to the edge ring electrode 323, the edge ring 315 also includes an edge ring middle electrode 317. The edge ring middle electrode 317 is disposed within the edge ring 315 such that the lower portion 319 of the edge ring 315 is present between the edge ring electrode 323 and the edge ring middle electrode 317, and the upper portion 321 of the edge ring 315 is present between the edge ring middle electrode 317 and the upper surface 315T of the edge ring 315. A voltage measurement device 329 is connected to measure the voltage of the edge ring middle electrode 317, as indicated by connection 331. In various embodiments, the edge ring middle electrode 317 can be configured in various ways. For example, in some embodiments, the edge ring middle electrode 317 is formed as an annular ring. In some embodiments, the edge ring middle electrode 317 has a lattice / spoke shape in which one or more annular rings are electrically connected to a set of spaced-apart radially-oriented lattice / spoke structures. In some embodiments, the edge ring middle electrode 317 is configured as a set of concentrically-spaced annular rings. The edge ring middle electrode 317 can be configured in essentially any way, but it should be understood that the voltage measured on the edge ring middle electrode 317 must represent the voltage that exists across / through the edge ring 315 at the vertical position of the edge ring middle electrode 317 within the edge ring 315.

[0044] FIG. 3C is a top view of the middle electrode 302 in the substrate support 301 and the edge ring middle electrode 317 in the edge ring 315 according to some embodiments, and is referenced as the B-B viewing point of FIG. 3A. In some embodiments, the voltage measurement devices 311, 325, 307, and 329 and the connections 313, 327, 309, and 331 associated therewith are part of the voltage measurement system of the bias voltage supply system 333. In some embodiments, the middle electrode 302 in the substrate support 301 and the edge ring middle electrode 317 in the edge ring 315 are at substantially the same vertical height within the plasma processing system 300, as depicted in FIG. 3A. However, in some embodiments, the middle electrode 302 in the substrate support 301 and the edge ring middle electrode 317 in the edge ring 315 are at different vertical heights within the plasma processing system 300.

[0045] FIG. 3D shows a bias voltage supply system 333A, which is an example of the bias voltage supply system 333 of FIG. 3A according to some embodiments. The bias electrode 123 and the edge ring electrode 323 can be considered as components of the bias voltage supply system 333A, together with the electrical connections 335 and 337 associated with them respectively. The bias voltage supply system 333A includes a voltage supply system 341 having an output electrically connected to a bias voltage supply node 345 through a filter 343, as shown by connections 347 and 349. The voltage supply system 341 is configured to generate a predetermined bias voltage adjusted waveform 342 as a function of time on the bias voltage supply node 345. In some embodiments, the predetermined bias voltage adjusted waveform 342 includes a bias voltage step portion (Vstep) 342A and a time-varying bias voltage portion (dV / dT) 342B. In some embodiments, the predetermined bias voltage adjusted waveform 342 is defined as an ongoing series of pulse cycles, and each pulse cycle includes an ON period and an OFF period. The voltage supply system 341 is communicatively connected to a controller 351 in a bidirectional data / signal manner, and this controller 351 is programmable to instruct the operation of the voltage supply system 341 to generate a predetermined bias voltage adjusted waveform 342 of essentially any form required for a particular plasma processing operation on the substrate 105.

[0046] Figure 3E shows an example of a voltage supply system 341 according to some embodiments. The voltage supply system 341 includes a first voltage source 344A and a second voltage source 344B, which are electrically connected in series with each other such that their output voltages are summed. In some embodiments, each of the first voltage source 344A and the second voltage source 344B is a DC voltage source. The first voltage source 344A is configured to generate a voltage magnitude that is constant over time according to a predetermined pulse schedule corresponding to a predetermined bias voltage adjusted waveform 342. For example, Figure 3E shows an example of a pulse voltage waveform 385 generated and output by the first voltage source 344A, and this pulse voltage waveform 385 ultimately becomes the bias voltage step portion (Vstep) 342A of the predetermined bias voltage adjusted waveform 342. The output of the first voltage source 344A is electrically connected to the input of the second voltage source 344B as shown by the electrical connection 383. The output of the second voltage source 344B is electrically connected to the output of the voltage supply system 341 as shown by the electrical connection 347. The second voltage source 344B is configured to generate a pulse voltage waveform 387 that varies over time, and this pulse voltage waveform 387 ultimately becomes the time-varying bias voltage portion (dV / dT) 342B of the predetermined bias voltage adjusted waveform 342. In some embodiments, the pulse voltage waveform 387 that varies over time changes substantially linearly as a function of time during the ON period of each pulse cycle. Also, in some embodiments, the pulse voltage waveform 387 that varies over time increases substantially linearly in magnitude as a function of time during the ON period of each pulse cycle. At the output of the second voltage source 344B, the pulse voltage waveform 385 is combined with the pulse voltage waveform 387 that varies over time to generate a predetermined bias voltage adjusted waveform 342. Thus, the output voltage supplied to the bias voltage supply node 345 by the voltage supply system 341 is a combination of the pulse voltage waveform 385 generated by the first voltage source 3,44A and the pulse voltage waveform 387 generated by the second voltage source 344B.The first voltage source 344A and the second voltage source 344B are each connected to communicate bidirectionally with the controller 351. The controller 351 instructs the operations of the first voltage source 344A and the second voltage source 344B to synchronize the phases and duty cycles of the pulse voltage waveforms 385 and 387 in order to generate a predetermined bias voltage adjusted waveform 342.

[0047] Referring again to FIG. 3D, the bias voltage supply system 333A includes a split circuit 353 configured to apply the voltage present on the bias voltage supply node 345 to each of the bias electrode 123 and the edge ring electrode 323 in a controlled manner. The split circuit 353 includes a first branch circuit 355 and a second branch circuit 357. The first branch circuit 355 is electrically connected between the bias voltage supply node 345 and the bias electrode 123. The first branch circuit 355 includes a series capacitor 359 and a shunt capacitor 361. In some embodiments, each of the series capacitor 359 and the shunt capacitor 361 is a respective variable capacitor whose capacitance setting can be remotely controlled by a controller 351 that communicates bidirectional data / signals with the split circuit 353. In some embodiments, the first branch circuit 355 includes a switching device 360 implemented such that the series capacitor 359 can be bypassed, whereby the bias voltage supply node 345 can be switchably electrically connected, via the electrical connection 335, to the input terminal of the series capacitor 359 or directly to the bias electrode 123. In this way, by controlling the switching device 360, the series capacitor 359 can be electrically connected in series between the bias voltage supply node 345 and the bias electrode 123, or effectively electrically removed such that the series capacitor 359 is not disposed between the bias voltage supply node 345 and the bias electrode 123. Also, in some embodiments, the first branch circuit 355 includes a switching device 362 implemented such that the shunt capacitor 361 can be electrically connected to the electrical connection 335 extending from the output of the first branch circuit 355 to the bias electrode 123, or disconnected therefrom. In this way, by controlling the switching device 362, the shunt capacitor 361 can be electrically connected between the bias electrode 123 and the reference ground potential 367, or effectively electrically removed from the first branch circuit 355.

[0048] The second branch circuit 357 is electrically connected between the bias voltage supply node 345 and the edge ring electrode 323. The second branch circuit 357 includes a series capacitor 363 and a shunt capacitor 365. In some embodiments, each of the series capacitor 363 and the shunt capacitor 365 is a respective variable capacitor whose capacitance setting can be remotely controlled by a controller 351 that bidirectionally data / signals communicate with the split circuit 353. In some embodiments, by including a switching device 369 implemented such that the second branch circuit 357 can bypass the series capacitor 363, the bias voltage supply node 345 can be switchably electrically connected to the input terminal of the series capacitor 363 or directly to the bias electrode 323 via the electrical connection 337. In this way, by controlling the switching device 369, the series capacitor 363 can be electrically connected in series between the bias voltage supply node 345 and the edge ring electrode 323, or effectively electrically removed such that the series capacitor 363 is not disposed between the bias voltage supply node 345 and the edge ring electrode 323. Also, in some embodiments, the second branch circuit 357 includes a switching device 371 implemented such that the shunt capacitor 365 can be electrically connected to or disconnected from the electrical connection 337 that extends from the output of the second branch circuit 357 to the edge ring electrode 323. In this way, by controlling the switching device 371, the shunt capacitor 365 can be electrically connected between the edge ring electrode 323 and the reference ground potential 367, or effectively electrically removed from the second branch circuit 357.

[0049] In some embodiments, the first branch circuit 355 is configured such that the series capacitor 359 and the shunt capacitor 361 are disconnected, and the second branch circuit 357 is configured such that the series capacitor 363 and the shunt capacitor 365 are connected. More specifically, in these embodiments, the switching devices 360 and 362 are set such that the bias voltage transmitted from the bias voltage supply node 345 to the bias electrode 123 is controlled by the series capacitor 359 and the shunt capacitor 361, and the switching devices 369 and 371 are set such that the bias voltage transmitted from the bias voltage supply node 345 to the edge ring electrode 323 is controlled by the series capacitor 363 and the shunt capacitor 365. Therefore, in these embodiments, the bias voltage adjusted waveform 342 output by the voltage supply system 341 is supplied to the bias electrode 123, and a modified version of the bias voltage adjusted waveform 342 output by the voltage supply system 341 is supplied to the edge ring electrode 323.

[0050] In some embodiments, the first branch circuit 355 is configured such that the series capacitor 359 and the shunt capacitor 361 are connected, and the second branch circuit 357 is configured such that the series capacitor 363 and the shunt capacitor 365 are connected. More specifically, in these embodiments, the switching devices 360 and 362 are set such that the bias voltage transmitted from the bias voltage supply node 345 to the bias electrode 123 is controlled by the series capacitor 359 and the shunt capacitor 361, and the switching devices 369 and 371 are set such that the bias voltage transmitted from the bias voltage supply node 345 to the edge ring electrode 323 is controlled by the series capacitor 363 and the shunt capacitor 365. Therefore, in these embodiments, the first modified version of the bias voltage adjusted waveform 342 output by the voltage supply system 341 is supplied to the bias electrode 123, and the second modified version of the bias voltage adjusted waveform 342 output by the voltage supply system 341 is supplied to the edge ring electrode 323.

[0051] Furthermore, in some embodiments, the series capacitor 359 can be connected to the first branch circuit 355 with the shunt capacitor 361 disconnected. In some embodiments, the shunt capacitor 361 can be connected to the first branch circuit 355 with the series capacitor 359 disconnected. Also, in some embodiments, the series capacitor 363 can be connected to the second branch circuit 357 with the shunt capacitor 365 disconnected. In some embodiments, the shunt capacitor 365 can be connected to the second branch circuit 357 with the series capacitor 363 disconnected.

[0052] In some embodiments, a voltage sensor 373, such as a voltage / current sensor (VI sensor), is connected to measure the real-time voltage on the bias voltage supply node 345 and transmit information related to the measured voltage to the controller 351. In some embodiments, a voltage sensor 375, such as a voltage / current sensor (VI sensor), is connected to measure the real-time voltage at the output of the first branch circuit 355 and transmit information related to the measured voltage to the controller 351. In some embodiments, a voltage sensor 377, such as a voltage / current sensor (VI sensor), is connected to measure the real-time voltage at the output of the second branch circuit 357 and transmit information related to the measured voltage to the controller 351. In various embodiments, the controller 351 is configured to use the voltage measured by one or more of the voltage sensors 373, 375, and 377 as a feedback signal (s) for controlling the operation of the voltage supply system 341 and one or more of the series capacitor 359, shunt capacitor 361, series capacitor 363, and shunt capacitor 365.

[0053] Also, in some embodiments, the bias voltage supply system 333A includes a number (N) (where N is 1 or more) of RF generators 379-1 to 379-N, which are connected to supply an RF bias voltage to the bias voltage supply node 345 by respective impedance matching networks 381-1 to 381-N. Each of the RF generators 379-1 to 379-N is communicatively connected to the controller 351 in a bidirectional data / signal manner. At the bias voltage supply node 345, the RF voltage signal(s) output by the RF generators 379-1 to 379-N is combined with the bias voltage adjusted waveform 342 output by the voltage supply system 341. The RF generators 379-1 to 379-N and the corresponding impedance matching networks 381-1 to 381-N are implemented in some embodiments of the bias voltage supply system 333A. However, in other embodiments of the bias voltage supply system 333A, the RF generators 379-1 to 379-N and the corresponding impedance matching networks 381-1 to 381-N are not implemented.

[0054] FIG. 3F shows an exemplary bias voltage adjusted waveform 342 generated by the voltage supply system 341, a corresponding bias voltage waveform 372 on the upper surface 105T of the substrate 105, and a corresponding bias voltage waveform 374 on the upper surface 315T of the edge ring 315, according to some embodiments. The bias voltage adjusted waveform 342 includes a bias voltage step portion (Vstep) 342A and a temporally varying bias voltage portion (dV / dT) 342B. The bias voltage adjusted waveform 342 is generated at the bias voltage supply node 345. Therefore, the bias voltage waveform 372 on the upper surface 105T of the substrate 105 is based on the bias voltage adjusted waveform 342 modified by the first branch circuit 355. Similarly, the bias voltage waveform 374 on the upper surface 315T of the edge ring 315 is based on the bias voltage adjusted waveform 342 modified by the second branch circuit 357. The bias voltage waveform 372 includes a step portion 372A and a slope portion 372B. The bias voltage waveform 374 includes a step portion 374A and a slope portion 374B.

[0055] The shunt capacitor 361 of the first branch circuit 355 controls the magnitude of the step portion 372A of the bias voltage waveform 372 on the upper surface 105T of the substrate 105. Specifically, by controlling the capacitance setting of the shunt capacitor 361, the magnitude of the step portion 372A can be set to a ratio (0 to 100%) of the magnitude of the bias voltage step portion (Vstep) 342A. When the shunt capacitor 361 is disconnected (or does not exist) in the first branch circuit 355, the magnitude of the step portion 372A becomes a fixed ratio of the magnitude of the bias voltage step portion (Vstep) 342A according to the inherent capacitance effect of the substrate support 301 and the material of the substrate 105 existing between the bias electrode 123 and the upper surface 105T of the substrate 105. The above fixed ratio of the magnitude of the bias voltage step portion (Vstep) 342A depends on the structure between the output of the voltage supply system 341 and the upper surface 105T of the substrate 105. For example, in structures such as the filter 343, the impedance matching networks 381-1 to 381-N, and the electrical connections 347, 349, 345, and 335, there may be parasitic shunt capacitance. Also, when the rise time of the bias voltage step portion (Vstep) 342A is relatively long compared to the ion migration time through the plasma sheath, the series capacitance between the output of the voltage supply system 341 and the upper surface 105T of the substrate 105 can reduce the above fixed ratio of the magnitude of Vstep 342A due to the ion flux during the rise time of Vstep 342A. For example, in some embodiments, various series capacitances may be inserted for some purpose in the filter 343, the substrate support 301, the substrate 105, and / or the electrical connections 347, 349, 345, and 335. By making the rise time of Vstep 342A relatively short, for example, Vstep << 1 microsecond, the decrease in the above fixed ratio of the magnitude of Vstep 342A due to the series capacitance can be mostly eliminated.

[0056] The series capacitor 359 of the first branch circuit 355 controls the slope (change in voltage with respect to time) of the slope portion 372B of the bias voltage waveform 372 on the upper surface 105T of the substrate 105. When a voltage is applied to the bias electrode 123, there is an ion current from the plasma 119 toward the upper surface 105T of the substrate 105, whereby the negative charges on the upper surface 105T of the substrate 105 are discharged, and accordingly, the magnitude of the negative voltage on the upper surface 105T of the substrate 105 decreases with time. To compensate for the decrease in the magnitude of the negative voltage on the upper surface 105T of the substrate 105 induced by these ions, the time-varying bias voltage portion (dV / dT) 342B of the bias voltage adjusted waveform 342 increases the bias voltage with time. By controlling the capacitance setting of the series capacitor 359 to adjust the change in the bias voltage as a function of time on the upper surface 105T of the substrate 105, the discharge of the negative charges on the upper surface 105T of the substrate 105 induced by ions is compensated. In some embodiments, the capacitance setting of the series capacitor 359 is controlled to maintain a substantially constant voltage on the upper surface 105T of the substrate 105 during the ON period of the bias voltage adjusted waveform 342. However, in other embodiments, the capacitance setting of the series capacitor 359 is controlled to achieve a desired change in voltage (positive dV / dT and / or negative dV / dT) as a function of time on the upper surface 105T of the substrate 105 during the ON period of the bias voltage adjusted waveform 342. When the series capacitor 359 is disconnected / bypassed (or does not exist) in the first branch circuit 355, the change in voltage as a function of time (dV / dT) on the upper surface 105T of the substrate 105 during the ON period of the bias voltage adjusted waveform 342 follows the time-varying bias voltage portion (dV / dT) 342B of the bias voltage adjusted waveform 342, and the magnitude of the fixed voltage based on the inherent capacitance effect of the substrate support 301 and the material of the substrate 105 existing between the bias electrode 123 and the upper surface 105T of the substrate 105 is canceled out. In some embodiments, the cancellation of the magnitude of the above-fixed voltage may also be based on the inherent series capacitance between the output of the voltage supply system 341 and the upper surface 105T of the substrate 105.In some embodiments, the inherent series capacitance corresponds to various series capacitances inserted for some purpose in filter 343, substrate support 301, substrate 105, and / or electrical connections 347, 349, 345, and 335.

[0057] The shunt capacitor 365 of the second branch circuit 357 controls the magnitude of the step portion 374A of the bias voltage waveform 374 on the upper surface 315T of the edge ring 315. Specifically, by controlling the capacitance setting of the shunt capacitor 365, the magnitude of the step portion 374A can be set to a ratio (0 to 100%) of the magnitude of the bias voltage step portion (Vstep) 342A. When the shunt capacitor 365 is disconnected (or does not exist) in the second branch circuit 357, the magnitude of the step portion 374A becomes a fixed ratio of the magnitude of the bias voltage step portion (Vstep) 342A according to the inherent capacitance effect of the material of the edge ring 315 existing between the edge ring electrode 323 and the upper surface 315T of the edge ring 315. In some embodiments, the magnitude of the step portion 374A can also be based on the inherent series capacitance between the output of the voltage supply system 341 and the upper surface 315T of the edge ring 315. In some embodiments, the inherent series capacitance corresponds to various series capacitances inserted for some purpose in filter 343, edge ring 315, and / or electrical connections 347, 349, 345, and 337.

[0058] The series capacitor 363 of the second branch circuit 357 controls the slope (change in voltage with respect to time) of the slope portion 374B of the bias voltage waveform 374 on the upper surface 315T of the edge ring 315. When a voltage is applied to the edge ring electrode 323, there is an ion current from the plasma 119 toward the upper surface 315T of the edge ring 315, which discharges negative charges on the upper surface 315T of the edge ring 315, and accordingly, the magnitude of the negative voltage on the upper surface 315T of the edge ring 315 decreases with time. To compensate for the decrease in the magnitude of the negative voltage on the upper surface 315T of the edge ring 315 induced by this ion, the time-varying bias voltage portion (dV / dT) 342B of the bias voltage adjusted waveform 342 increases the bias voltage with time. By controlling the capacitance setting of the series capacitor 363 to adjust the change in the bias voltage as a function of time on the upper surface 315T of the edge ring 315, the discharge of negative charges on the upper surface 315T of the edge ring 315 induced by ions is compensated. In some embodiments, the capacitance setting of the series capacitor 363 is controlled to maintain a substantially constant voltage on the upper surface 315T of the edge ring 315 during the ON period of the bias voltage adjusted waveform 342. However, in other embodiments, the capacitance setting of the series capacitor 363 is controlled to achieve a desired change in voltage (positive dV / dT and / or negative dV / dT) as a function of time on the upper surface 315T of the edge ring 315 during the ON period of the bias voltage adjusted waveform 342. When the series capacitor 363 is disconnected / bypassed (or does not exist) in the second branch circuit 357, the change in voltage as a function of time (dV / dT) on the upper surface 315T of the edge ring 315 during the ON period of the bias voltage adjusted waveform 342 will follow the time-varying bias voltage portion (dV / dT) 342B of the bias voltage adjusted waveform 342, and the magnitude of the fixed voltage based on the inherent capacitance effect of the material of the edge ring 315 existing between the edge ring electrode 323 and the upper surface 315T of the edge ring 315 is offset. In some embodiments, the offset of the magnitude of the above-fixed voltage may also be based on the inherent series capacitance between the output of the voltage supply system 341 and the upper surface 315T of the edge ring 315.In some embodiments, the above-described intrinsic series capacitance corresponds to various series capacitances inserted for some purpose in filter 343, edge ring 315, and / or electrical connections 347, 349, 345, and 337.

[0059] FIG. 3G shows a bias voltage supply system 333B, which is an example of the bias voltage supply system 333 of FIG. 3A according to some embodiments. The bias voltage supply system 333B includes a first voltage supply system 390 and a second voltage supply system 395. The first voltage supply system 390 includes a voltage supply system 391 having an output connected to the bias electrode 123 via a filter 392 and an electrical connection 335. The voltage supply system 391 is configured in the same manner as the voltage supply system 341. Therefore, the voltage supply system 391 generates a predetermined bias voltage adjusted waveform 342-1 and supplies it to the bias electrode 123. The predetermined bias voltage adjusted waveform 342-1 includes a step portion 342A1 and a slope portion 342B1. The filter 392 is configured to prevent RF signals from entering the voltage supply system 391. In various embodiments, the filter 392 is a low-pass filter or a notch filter.

[0060] The first voltage supply system 390 also optionally includes a number (N) (where N is 1 or greater) of RF generators 393-1 to 393-N, which are connected to supply an RF bias voltage to the bias electrode 123 by respective impedance matching networks 394-1 to 394-N. Each of the RF generators 393-1 to 393-N is connected in two-way data / signal communication with the controller 351. The controller 351 operates to synchronize the bias voltage waveforms output by the voltage supply system 391 and each of the RF generators 393-1 to 393-N. The RF voltage signal(s) output by the RF generators 393-1 to 393-N are combined on the electrical connection 335 with the bias voltage adjusted waveform 342-1 output by the voltage supply system 391. The RF generators 393-1 to 393-N and the corresponding impedance matching networks 394-1 to 394-N are implemented in some embodiments of the first voltage supply system 390. However, in some embodiments, the RF generators 393-1 to 393-N and the corresponding impedance matching networks 394-1 to 394-N are not implemented in the first voltage supply system 390.

[0061] The second voltage supply system 395 includes a voltage supply system 396 having an output connected to the edge ring electrode 323 via a filter 397 and an electrical connection 337. The voltage supply system 396 is configured in the same manner as the voltage supply system 341. Therefore, the voltage supply system 396 generates a predetermined bias voltage adjusted waveform 342-2 and supplies it to the edge ring electrode 323. The predetermined bias voltage adjusted waveform 342-2 includes a step portion 342A2 and a slope portion 342B2. The filter 397 is configured to prevent RF signals from entering the voltage supply system 396. In various embodiments, the filter 397 is a low-pass filter or a notch filter.

[0062] The second voltage supply system 395 also optionally includes a number (N) (where N is 1 or more) of RF generators 398-1 to 398-N, which are connected to supply an RF bias voltage to the edge ring electrode 323 by respective impedance matching networks 399-1 to 399-N. Each of the RF generators 398-1 to 398-N is connected in bidirectional data / signal communication with the controller 351. The controller 351 operates to synchronize the bias voltage waveforms output by the voltage supply system 396 and each of the RF generators 398-1 to 398-N. The RF voltage signal(s) output by the RF generators 398-1 to 398-N are combined on the electrical connection 337 with the bias voltage adjusted waveform 342-2 output by the voltage supply system 396. The RF generators 398-1 to 398-N and the corresponding impedance matching networks 399-1 to 399-N are implemented in some embodiments of the second voltage supply system 395. However, in some embodiments, the RF generators 398-1 to 398-N and the corresponding impedance matching networks 399-1 to 399-N are not implemented in the second voltage supply system 395.

[0063] In some embodiments, the bias voltage adjusted waveform 342-1 is generated to maintain a substantially constant voltage on the upper surface 105T of the substrate 105 during the ON period of each pulse cycle in the bias voltage adjusted waveform 342-1, and the bias voltage adjusted waveform 342-2 is generated to maintain a substantially constant voltage on the upper surface 315T of the edge ring 315 during the ON period of each pulse cycle in the bias voltage adjusted waveform 342-2, whereby a substantially constant voltage difference is maintained during the ON periods of the pulse cycles of the bias voltage adjusted waveforms 342-1 and 342-2. In this case, a substantially constant voltage difference is determined so as to maintain a substantially flat plasma sheath boundary across the transition portion between the substrate 105 and the edge ring 315. In some embodiments, the step portions 342A1 of the bias voltage adjusted waveform 342-1 and the step portions 342A2 of the bias voltage adjusted waveform 342-2 are synchronously controlled to achieve a predetermined voltage difference between the upper surface 105T of the substrate 105 and the upper surface 315T of the edge ring 315. Also, in some embodiments, the slope portion 342B1 of the bias voltage adjusted waveform 342-1 is controlled to compensate for the ion-induced discharge of the negative charge on the upper surface 105T of the substrate 105 over the ON period of each pulse cycle of the bias voltage adjusted waveform 342-1, whereby the voltage on the upper surface 105T of the substrate 105 remains substantially constant over the ON period of each pulse cycle of the bias voltage adjusted waveform 342-1. Also, in some embodiments, the slope portion 342B2 of the bias voltage adjusted waveform 342-2 is controlled to compensate for the ion-induced discharge of the negative charge on the upper surface 315T of the edge ring 315 over the ON period of each pulse cycle of the bias voltage adjusted waveform 342-2, whereby the voltage on the upper surface 315T of the edge ring 315 remains substantially constant over the ON period of each pulse cycle of the bias voltage adjusted waveform 342-2.

[0064] In some embodiments, the controller 351 operates to synchronize the phases of the bias voltage adjusted waveforms 342-1 and 342-2. In some embodiments, the controller 351 operates to synchronize both the phases and the duty cycles of the bias voltage adjusted waveforms 342-1 and 342-2. In some embodiments, the controller 351 operates to implement a predetermined phase shift between the bias voltage adjusted waveforms 342-1 and 342-2. In some embodiments, the bias voltage adjusted waveforms 342-1 and 342-2 are defined to have different phases and / or different duty cycles relative to each other. Also, in some embodiments, one or both of the bias voltage adjusted waveforms 342-1 and 342-2 are defined to implement a pulsing scheme for each predetermined level. It should be understood that the bias voltage adjusted waveforms 342-1 and 342-2 are controllable separately and independently of each other.

[0065] Further, in various embodiments, any number of voltage sensors, e.g., voltage / current sensors (VI sensors), can be connected within the bias voltage supply system 333B to measure the real-time voltage at a particular location and transmit information related to this measured real-time voltage to the controller 351. In some embodiments, the controller 351 is configured to use the real-time voltage measurements within the first voltage supply system 390 and / or the second voltage supply system 395 to control the operation of any one or more of the voltage supply system 391, the RF generators 393-1 to 393-N, the voltage supply system 396, and the RF generators 398-1 to 398-N.

[0066] FIG. 4 is an exemplary diagram of controller 351 according to some embodiments. In some embodiments, controller 351 includes a processor 409, a storage hardware unit (HU) 411 (e.g., memory), an input HU 401, an output HU 405, an input / output (I / O) interface 403, an I / O interface 407, a network interface controller (NIC) 415, and a data communication bus 413. The processor 409, the storage HU 411, the input HU 401, the output HU 405, the I / O interface 403, the I / O interface 407, and the NIC 415 communicate data with each other via the data communication bus 413. Examples of the input HU 401 include a mouse, a keyboard, a touch pen, a data acquisition system, a data acquisition card, etc. Examples of the output HU 405 include a display, a speaker, a device controller, etc. Examples of the NIC 415 include a network interface card, a network adapter, etc. In various embodiments, the NIC 415 is configured to operate according to one or more communication protocols and associated physical layers, such as Ethernet and / or EtherCAT, among others. The I / O interfaces 403 and 407 are each defined to provide compatibility between separate hardware units coupled to the I / O interface. For example, the I / O interface 403 can be defined to convert a signal received from the input HU 401 into a format, amplitude, and / or speed compatible with the data communication bus 413. Also, the I / O interface 407 can be defined to convert a signal received from the data communication bus 413 into a format, amplitude, and / or speed compatible with the output HU 405. Although the various operations described herein are performed by the processor 409 of the controller 351, it should be understood that in some embodiments, the various operations can be performed by a plurality of processors of the controller 351 and / or by a plurality of processors of a plurality of computing systems connected to the controller 351.

[0067] In various embodiments, the plasma processing system 300 is integrated with electronics for controlling the operation of the substrate 105 before, during, and after processing, and the electronics are implemented within a controller 351 configured and connected to control various components and / or subcomponents of the plasma processing system 300, including a bias voltage supply system 333. Depending on the processing requirements of the substrate 105 and / or the particular configuration of the plasma processing system 300, the controller 351 is programmed to control any of the processes and / or components disclosed herein. For example, delivery of process gas(es), temperature setting (e.g., heating and / or cooling), pressure setting, vacuum setting, power setting, RF power supply system setting, electrical signal frequency setting, gas flow rate setting, fluid delivery setting, position setting and motion setting, bias voltage supply system 333 setting, loading and unloading of the substrate 105 to and from the plasma processing system 300 and / or loading and unloading to a load lock connected or interfaced to the plasma processing system 300 are particularly included.

[0068] In various embodiments, the controller 351 is defined as an electronic device having various integrated circuits, logic, memory, and / or software that direct and control various tasks / operations such as, for example, receiving commands, issuing commands, controlling device operation, enabling cleaning operations, enabling endpoint measurements, enabling measurement measurements (e.g., optical, thermal, electrical), etc. In some embodiments, the integrated circuits within the controller 351 include, among other computing devices, one or more firmware that stores program instructions, a digital signal processor (DSP), an application specific integrated circuit (ASIC) chip, a programmable logic device (PLD), one or more microprocessors, and / or one or more microcontrollers that execute program instructions (e.g., software). In some embodiments, the program instructions are communicated to the controller 351 in the form of various individual settings (or program files) that define the operating parameters for performing a particular process on the substrate 105 within the plasma processing system 300. In some embodiments, the operating parameters are included in a recipe defined by a process engineer to achieve one or more processing steps during the manufacture of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies on the substrate 105.

[0069] In some embodiments, the controller 351 is integrated with, connected to, otherwise part of, or connected to a network-connected computer, or a combination thereof, of the plasma processing system 300. For example, in some embodiments, the controller 351 is implemented within the "cloud" or as all or part of a host computer system of a manufacturing facility that enables remote access for controlling the processing of the substrate 105 by the plasma processing system 300. By enabling remote access to the plasma processing system 300, the controller 351 monitors the current progress of manufacturing operations, verifies the history of past manufacturing operations, verifies trends or performance criteria from multiple manufacturing operations, changes processing parameters, sets subsequent processing steps, specifies operating parameters of the RF power supply system, specifies operating parameters of the bias voltage supply system 333, and / or initiates a new substrate manufacturing process.

[0070] In some embodiments, a remote computer, such as a server computer system, provides a process recipe to the controller 351 through a computer network that includes a local network and / or the Internet. The remote computer includes a user interface that enables the input or programming of parameters and / or settings, and the parameters and / or settings are then communicated from the remote computer to the controller 351. In some examples, the controller 351 receives instructions in the form of settings for processing the substrate 105 within the plasma processing system 300. It should be understood that the settings are specific to the type of process to be performed on the substrate 105 and the type of tool / device / component that the controller 351 interfaces with or controls. In some embodiments, the controller 351 is distributed, such as by including one or more individual controllers (s) 351 that are network-connected to each other and synchronized to work towards a common purpose, such as operating the plasma processing system 300 to perform a predetermined process on the substrate 105. Examples of controllers 351 distributed for such a purpose include one or more integrated circuits on the chamber that are combined to control the process within the chamber and communicate with one or more integrated circuits remotely located (e.g., at the platform level or as part of a remote computer).

[0071] FIG. 5 shows an example of a bias voltage adjusted waveform 501 supplied to the bias electrode 123 by a bias voltage supply system 333 (e.g., 333A or 333B) and a corresponding voltage waveform 503 generated on the upper surface 105T of the substrate 105, according to some embodiments. The bias voltage adjusted waveform 501 is similar to the predetermined bias voltage adjusted waveform 342 described with respect to FIG. 3F. Also, the voltage waveform 503 obtained on the upper surface 105T of the substrate 105 is similar to the bias voltage waveform 372 described with respect to FIG. 3F. The bias voltage adjusted waveform 501 has a pulse shape with a periodic frequency within the RF regime. It should be understood that the bias voltage adjusted waveform 501 is a non-sinusoidal RF waveform. In various embodiments, the bias voltage adjusted waveform 501 is configured to control the ion energy distribution function (IEDF) of the ions in the plasma 119 within the range of the electrical influence extending upward from the upper surface 105T of the substrate 105. For example, in FIG. 5, the bias voltage adjusted waveform 501 is configured to control the IEDF of the ions in the plasma 119 to achieve a substantially single-energy ion energy distribution at the upper surface 105T of the substrate 105. The bias voltage adjusted waveform 501 generates a substantially constant negative voltage on the upper surface 105T of the substrate 105, as shown by the voltage waveform 503, such that the ions in the plasma 119 are accelerated to substantially the same energy level as they are attracted toward the upper surface 105T of the substrate 105.

[0072] By operating the bias voltage supply system 333 to generate a bias voltage adjusted waveform 501 and supplying the bias voltage adjusted waveform 501 to the bias electrode 123, a narrow IEDF can be achieved, and furthermore, the ion energy and ion flux on the upper surface 105T of the substrate 105 can be independently controlled. However, there remains a problem in controlling the IEDF and ion flux on the upper surface 105T of the substrate 105 because the in-situ real-time measurement of the IEDF and ion flux on the upper surface 105T of the substrate 105 is not performed. To achieve and maintain the desired IEDF, it is necessary to detect either the IEDF or the voltage on the upper surface 105T of the substrate 105. Since the IEDF depends on the voltage on the upper surface 105T of the substrate 105, the real-time IEDF on the upper surface 105T of the substrate 105 can be determined by knowing the real-time voltage on the upper surface 105T of the substrate 105. However, to directly measure the IEDF or voltage on the upper surface 105T of the substrate 105, it is necessary to deploy a physical sensor or probe on the substrate 105, which interferes with the processing of the substrate 105. For example, among other problems, it deteriorates the uniformity of the plasma 119 across the entire substrate 105 and accordingly reduces the manufacturing yield of semiconductor chips. Controlling the voltage and current on the substrate 105 using the non-sinusoidal bias voltage adjusted waveform 501 depends on knowing the real-time voltage on the upper surface 105T of the substrate 105.

[0073] This specification discloses various embodiments for enabling real-time closed-loop feedback control of non-sinusoidal bias voltage adjusted waveforms 342, 342-1, 501 by indirectly measuring in real time the voltage on the top surface 105T of substrate 105 to achieve and maintain a predetermined voltage thereon and accordingly control the IEDF at the top surface 105T of substrate 105. Efficiently and accurately detecting the voltage on the top surface 105T of substrate 105 is particularly important for plasma-based substrate 105 manufacturing processes, including a pulsing operation where the density of plasma 119 changes dynamically over a short period of time (e.g., much shorter than 1 millisecond). Also, this specification discloses various embodiments for enabling real-time closed-loop feedback control of non-sinusoidal bias voltage adjusted waveforms 342, 342-2 by indirectly measuring in real time the voltage on the top surface 315T of edge ring 315 to achieve and maintain a predetermined voltage thereon and accordingly control the IEDF at the top surface 315T of edge ring 315.

[0074] FIG. 6 shows a voltage waveform 601 on the intermediate electrode 302 in the substrate support 301 corresponding to the adjusted bias voltage waveform 501 supplied to the bias electrode 123 by the bias voltage supply system 333 as shown in FIG. 5 according to some embodiments. FIG. 6 also shows a voltage waveform 503 generated on the upper surface 105T of the substrate 105 by the supply of the adjusted bias voltage waveform 501 to the bias electrode 123 by the bias voltage supply system 333 as shown in FIG. 5. The voltage of the bias electrode 123 is controlled by the adjusted bias voltage waveforms 342, 342-1, 501 supplied to the bias electrode 123 by the bias voltage supply system 333. The voltage on the upper surface 105T of the substrate 105 is controlled by both the adjusted bias voltage waveforms 342, 342-1, 501 supplied to the bias electrode 123 by the bias voltage supply system 333 and the electrons and ions from the plasma 119 incident on the upper surface 105T of the substrate 105. The electrically isolated intermediate electrode 302 disposed within the substrate support 301 between the bias electrode 123 and the upper surface 301T of the substrate support 301 captures the voltage waveform 601 between the adjusted bias voltage waveforms 342, 342-1, 501 and the voltage waveform 503 on the upper surface 105T of the substrate 105.

[0075] The voltage difference between the bias electrode 123 and the intermediate electrode 302 is proportional to the impedance between the bias electrode 123 and the intermediate electrode 302. Similarly, the voltage difference between the intermediate electrode 302 and the upper surface 105T of the substrate 105 is proportional to the impedance between the intermediate electrode 302 and the upper surface 105T of the substrate 105. The impedance between the bias electrode 123 and the intermediate electrode 302 is obtained by (1 / jωC midlevel-to-biaselectrode ), where C midlevel-to-biaselectrode is the capacitance of the lower portion 303 of the substrate support 301 between the bias electrode 123 and the intermediate electrode 302. The impedance between the intermediate electrode 302 and the upper surface 105T of the substrate 105 is obtained by (1 / jωC substrate-to-midlevel ), where C substrate-to-midlevelis the capacitance of the upper portion 305 of the substrate support 301 between the middle electrode 302 and the upper surface 301T of the substrate support 301. It is assumed that the influence of the substrate 105 on the impedance between the middle electrode 302 and the upper surface 105T of the substrate 105 can be ignored. Therefore, the electrically isolated middle electrode 302 forms a capacitive voltage divider that picks up the voltage shown in Equation 1. In the equation, V midlevel is the voltage on the middle electrode 302, V biaselectrode is the voltage on the bias electrode 123, and V substrate is the voltage on the upper surface 105T of the substrate 105. From Equation 1, the voltage on the middle electrode 302 can be expressed as shown in Equation 2. Also, from Equation 1, the voltage on the upper surface 105T of the substrate 105 can be expressed as shown in Equation 3. Therefore, the real-time voltage (V substrate ) on the upper surface 105T of the substrate 105 is indirectly determined using the well-known capacitance (C midlevel-to-biaselectrode ) of the lower portion 303 of the substrate support 301 between the bias electrode 123 and the middle electrode 302, the well-known capacitance (C substrate-to-midlevel ) of the upper portion 305 of the substrate support 301 between the middle electrode 302 and the upper surface 301T of the substrate support 301, the direct real-time measurement values of the voltage (V midlevel ) on the middle electrode 302, and the voltage (V biaselectrode ) on the bias electrode 123.

[0076]

Number

[0077]

Number

[0078]

Number

[0079] The same relationships shown in Equations 1 to 3 are applicable to the edge ring 315 in order to indirectly determine the voltage on the upper surface 315T of the edge ring 315 by using the respective direct real-time voltage measurement values of the edge ring electrode 323 and the edge ring intermediate electrode 317.

[0080] The voltage of the edge ring electrode 323 is controlled by the bias voltage adjusted waveforms 342, 342-2 supplied to the edge ring electrode 323 by the bias voltage supply system 333. The voltage on the upper surface 315T of the edge ring 315 is not only controlled by the bias voltage adjusted waveforms 342, 342-2 supplied to the edge ring electrode 323 by the bias voltage supply system 333, but also by electrons and ions from the plasma 119 incident on the upper surface 315T of the edge ring 315. The edge ring intermediate electrode 317, which is electrically isolated between the edge ring electrode 323 and the upper surface 315T of the edge ring 315 and is disposed within the edge ring 315, captures the voltage waveform between the bias voltage adjusted waveforms 342, 342-2 and the voltage waveform on the upper surface 315T of the edge ring 315.

[0081] The voltage difference between the edge ring electrode 323 and the edge ring intermediate electrode 317 is proportional to the impedance between the edge ring electrode 323 and the edge ring intermediate electrode 317. Similarly, the voltage difference between the edge ring intermediate electrode 317 and the upper surface 315T of the edge ring 315 is proportional to the impedance between the edge ring intermediate electrode 317 and the upper surface 315T of the edge ring 315. The impedance between the edge ring electrode 323 and the edge ring intermediate electrode 317 is obtained by (1 / jωC ERmidlevel-to-ERelectrode )), where C ERmidlevel-to-ERelectrode is the capacitance of the lower portion 319 of the edge ring 315 between the edge ring electrode 323 and the edge ring intermediate electrode 317. The impedance between the edge ring intermediate electrode 317 and the upper surface 315T of the edge ring 315 is obtained by (1 / jωC ERtop-to-ERmidlevel ), where C ERtop-to-ERmidlevelis the capacitance of the upper part 321 of the edge ring 315 between the edge ring middle electrode 317 and the upper surface 315T of the edge ring 315. Therefore, the electrically isolated edge ring middle electrode 317 forms a capacitive voltage divider that picks up the voltage shown in Equation 4. In the equation, V ERmidlevel is the voltage on the edge ring middle electrode 317, and V ERelectrode is the voltage on the edge ring electrode 323, and V ERtop is the voltage on the upper surface 315T of the edge ring 315. From Equation 4, the voltage on the edge ring middle electrode 317 can be expressed as shown in Equation 5. Also, from Equation 4, the voltage on the upper surface 315T of the edge ring 315 can be expressed as shown in Equation 6. Therefore, the real-time voltage (V ERtop ) on the upper surface 315T of the edge ring 315 is indirectly determined using the known capacitance (C ERmidlevel-to-ERelectrode ) of the lower part 319 of the edge ring 315 between the edge ring electrode 323 and the edge ring middle electrode 317, the known capacitance (C ERtop-to-ERmidlevel ) of the upper part 321 of the edge ring 315 between the edge ring middle electrode 317 and the upper surface 315T of the edge ring 315, and the direct real-time measurement values of the voltage (V ERmidlevel ) on the edge ring middle electrode 317 and the voltage (V ERelectrode ) on the edge ring electrode 323.

[0082]

Number

[0083]

Number

[0084]

Number

[0085] FIG. 7 shows an example of a bias voltage adjusted waveform 701 supplied to the bias electrode 123 by a bias voltage supply system 333 and a corresponding voltage waveform 703 generated on the upper surface 105T of the substrate 105, according to some embodiments. FIG. 7 also shows a TCP voltage waveform 705, which represents the voltage on the coil 109 resulting from the supply of TCPRF power to the coil 109 by the TCPRF generator 113. In the example of FIG. 7, the RF power is supplied to the TCP coil 109 in pulses, such that successive ON pulses of TCPRF power are separated by OFF pulses of TCPRF power. The duty cycle of the ON and OFF pulses of TCPRF power, i.e., the period of the ON pulse relative to the period of the OFF pulse, is defined in the plasma processing recipe. The supply of the bias voltage adjusted waveform 701 to the bias electrode 123 is synchronized to coincide with each ON pulse of the TCPRF power supplied to the TCP coil 109.

[0086] With a single-level TCPRF power pulsing as shown in FIG. 7, the plasma 119 experiences dynamic changes in each pulsing state, such as changes in density. Therefore, even if the adjusted bias voltage waveform 701 supplied to the bias electrode 123 has a consistent pulse pattern that should generate a consistent pulse pattern on the voltage waveform 703 on the upper surface 105T of the substrate 105 over the period of the ON pulse of the TCPRF power, the dynamic changes in the plasma 119 cause the voltage waveform 703 on the upper surface 105T of the substrate 105 to have an initial settling time when the adjusted bias voltage waveform 701 is supplied to the bias electrode 1, as indicated by region 707. Specifically, to generate the voltage waveform 703 on the upper surface 105T of the substrate 105, when the adjusted bias voltage waveform 701 is first supplied to the bias electrode 123 at the start of the ON pulse of the TCPRF power, the plasma 119 density is relatively low, and the ion flux incident on the substrate 105 is correspondingly low. Therefore, at the start of the ON pulse of the TCPRF power, the incident ion flux on the substrate 105 is not yet sufficient to electrically neutralize the negative voltage on the upper surface 105T of the substrate 105 to achieve a constant setpoint voltage 711 on the upper surface 105T of the substrate 105. As the ON pulse of the TCPRF power progresses, the plasma 119 density increases to reach a steady state, and the ion flux incident on the substrate 105 also increases to reach a steady state accordingly, whereby the negative voltage on the upper surface 105T of the substrate 105 is more electrically neutralized until a constant setpoint voltage 711 is achieved on the upper surface 105T of the substrate 105, as indicated by region 709 of the voltage waveform 703.

[0087] What is important is to control the adjusted bias voltage waveform 701 supplied to the bias electrode 123 so as to generate the voltage waveform 703 on the upper surface 105T of the substrate 105 in a manner that minimizes the initial setting time of the voltage waveform 103, as shown in region 707. In other words, what is important is to control the adjusted bias voltage waveform 701 supplied to the bias electrode 123 so that a constant setpoint voltage 711 on the upper surface 105T of the substrate 105 is achieved and maintained as the plasma 119 density increases to a steady state during the ON pulse of the TCPRF power. To control the adjusted bias voltage waveform 701 supplied to the bias electrode 123 in the above-described manner, it is necessary to determine in real time the voltage on the upper surface 105T of the substrate 105 as a feedback control signal to the bias voltage supply system 333. Using the methods described above with respect to Equations 1 to 3, the voltage (V biaselectrode ) of the bias electrode 123 and the voltage (V midlevel ) of the intermediate electrode 302 are directly measured in real time to determine the voltage (V substrate ) of the upper surface 105T of the substrate 105 in real time. The determined voltage (V substrate ) of the upper surface 105T of the substrate 105 in real time is used as a closed-loop feedback control signal for controlling the generation of the adjusted bias voltage waveform 701 so as to generate the voltage waveform 703 on the upper surface 105T of the substrate 105 in a manner that minimizes the initial setting time of the voltage waveform 103 and achieves and maintains a constant setpoint voltage 711 on the upper surface 105T of the substrate 105 as quickly as possible after the start of each ON pulse of the TCPRF power.

[0088] In some embodiments, the voltage (V substrate ) of the upper surface 105T of the substrate 105 in real time is provided by the controller 351 to the bias voltage supply system 333 for use in determining the adjustment of a predetermined adjusted bias voltage waveform 342 to be performed in the next pulse of the predetermined adjusted bias voltage waveform 342. The feedback signal, i.e., the voltage (V substrate) and it should be understood that essentially any aspect of the predetermined biased voltage adjusted waveform 342 can be adjusted as necessary to minimize the difference from a certain setpoint voltage 711. For example, parameters of the predetermined biased voltage adjusted waveform 342 such as the initial negative voltage (Vstep), the negative voltage slope (dV / dT), and the duty cycle (the period of the negative voltage within a given pulse) are controlled to determine the voltage (V substrate ) of the upper surface 105T of the substrate 105 in real time and minimize the difference from the certain setpoint voltage 711.

[0089] It should be understood that the closed-loop feedback control method of the voltage generated on the upper surface 105T of the substrate 105 described with respect to FIG. 7 can be similarly applied to the control of the voltage generated on the upper surface 315T of the edge ring 315. Specifically, using the method described above with respect to Equations 4 to 6, the voltage (V ERelectrode ) of the real-time edge ring electrode 323 is directly measured and the voltage (V ERmidlevel ) of the real-time edge ring middle layer electrode 317 is directly measured to determine the voltage (V ERtop ) of the upper surface 315T of the real-time edge ring 315. The determined voltage (V ERtop ) of the upper surface 315T of the real-time edge ring 315 is used as a closed-loop feedback control signal to control the generation of the biased voltage adjusted waveform applied to the edge ring electrode 323 so as to generate the voltage waveform on the upper surface 315T of the edge ring 315 in a manner that minimizes the initial setting time of the voltage waveform to achieve and maintain a certain setpoint voltage on the upper surface 315T of the edge ring 315 as quickly as possible after the start of each ON pulse of the TCPRF power.

[0090] In some embodiments, the voltage (V ERtop) is provided to the bias voltage supply system 333 by the controller 351 for use in determining the adjustment of the predetermined bias voltage adjusted waveforms 342, 342-2 in the next pulse of the predetermined bias voltage adjusted waveforms 342, 342-2. The feedback signal, i.e., the voltage (V ERtop ) of the upper surface 315T of the real-time edge ring 315 and a constant setpoint voltage, it should be understood that essentially any aspect of the predetermined bias voltage adjusted waveforms 342, 342-2 can be adjusted as needed to minimize the difference. For example, control the parameters of the predetermined bias voltage adjusted waveforms 342, 342-2 such as the initial negative voltage (Vstep), the negative voltage slope (dV / dT), and the duty cycle (the period of the negative voltage within a given pulse) to minimize the difference between the determined voltage (V ERtop ) of the upper surface 315T of the real-time edge ring 315 and a constant setpoint voltage.

[0091] In some embodiments, the voltage (V ERtop ) on the upper surface 315T of the edge ring 315 is used to form a uniform plasma 119 sheath near the edge of the substrate 105 and minimize the ion arrival distribution function (IADF). In some embodiments, the smaller the IADF, the lower the tilting effect on the etching profile near the edge of the substrate 105, thus increasing the manufacturing yield. In some embodiments, a feedback control signal is generated for use in reducing the voltage difference between the upper surface 105T of the substrate 105 and the upper surface 315T of the edge ring 315 by comparing the voltage (V ERtop ) on the upper surface 315T of the edge ring 315 with the voltage (V substrate ) on the upper surface 105T of the substrate 105 when the voltage difference unfavorably increases in the IADF.

[0092] FIG. 8 shows a feedback-controlled bias voltage adjusted waveform 801 supplied to bias electrode 123 by bias voltage supply system 333 and a corresponding voltage waveform 803 generated on top surface 105T of substrate 105, according to some embodiments. FIG. 8 also shows TCP voltage waveform 805, which represents the voltage on coil 109 resulting from the supply of TCPRF power from TCPRF generator 113 to coil 109. Also for comparison, FIG. 8 shows an un-feedback-controlled bias voltage adjusted waveform 701 supplied to bias electrode 123 and a corresponding voltage waveform 703 generated on top surface 105T of substrate 105, according to FIG. 7. FIG. 8 shows that the determined real-time voltage (V substrate ) on top surface 105T of substrate 105 is used as a feedback signal to achieve a constant setpoint voltage 811 on top surface 105T of substrate 105, and the slope (dV / dT) of the feedback-controlled bias voltage adjusted waveform 801 is gradually increased between successive pulses of the feedback-controlled bias voltage adjusted waveform 801 until the plasma 119 density reaches a steady state during the ON pulse of the TCPRF power.

[0093] It should be understood that the closed-loop feedback control method of the voltage generated on top surface 105T of substrate 105 described with respect to FIG. 8 can be similarly applied to the control of the voltage generated on top surface 315T of edge ring 315. Specifically, the determined real-time voltage (V ERtop ) on top surface 315T of edge ring 315 is used as a feedback signal to achieve a constant setpoint voltage on top surface 315T of edge ring 315, and the slope (dV / dT) of the feedback-controlled bias voltage adjusted waveform supplied to edge ring electrode 323 is gradually increased between successive pulses of the feedback-controlled bias voltage adjusted waveform supplied to edge ring electrode 323 until the plasma 119 density reaches a steady state during the ON pulse of the TCPRF power.

[0094] FIG. 9 shows a feedback-controlled bias voltage adjusted waveform 901 supplied to bias electrode 123 by a bias voltage supply system 333, and a corresponding voltage waveform 903 generated on the upper surface 105T of substrate 105, according to some embodiments. FIG. 9 also shows a TCP voltage waveform 905, which represents the voltage on coil 109 resulting from the supply of TCPRF power to coil 109 by TCPRF generator 113. Also for comparison, FIG. 9 shows a non-feedback-controlled bias voltage adjusted waveform 701 supplied to bias electrode 123, and a corresponding voltage waveform 703 generated on the upper surface 105T of substrate 105 according to FIG. 7. FIG. 9 shows the determined real-time voltage (V substrate ) on the upper surface 105T of substrate 105 as a feedback signal, and by achieving a constant setpoint voltage 911 on the upper surface 105T of substrate 105, the duty cycle of the feedback-controlled bias voltage adjusted waveform 801 is gradually increased between consecutive pulses of the feedback-controlled bias voltage adjusted waveform 901 until the plasma 119 density reaches a steady state during the ON pulse of the TCPRF power. The duty cycle of the feedback-controlled bias voltage adjusted waveform 901 is defined as the ratio of the pulses to which a negative voltage is applied out of a given pulse of the feedback-controlled bias voltage adjusted waveform 901. The duty cycle of the feedback-controlled bias voltage adjusted waveform 901 can be varied from pulse to pulse of the feedback-controlled bias voltage adjusted waveform 901. In some embodiments as shown in FIG. 9, the slope (dV / dT) of the feedback-controlled bias voltage adjusted waveform 901 is substantially constant between the negative voltage portions of each pulse of the feedback-controlled bias voltage adjusted waveform 901, regardless of the duty cycle applied during the pulse. However, in some embodiments, the slope (dV / dT) between the negative voltage portions of each pulse of the feedback-controlled bias voltage adjusted waveform 901 is adjusted from pulse to pulse of the feedback-controlled bias voltage adjusted waveform 901.

[0095] In some embodiments, the voltage (V substrate ) of the upper surface 105T of the real-time substrate 105 is determined at a sufficiently high sampling / measurement rate such that it can be detected in real time when the difference between the voltage (V substrate ) of the upper surface 105T of the real-time substrate 105 and the setpoint voltage 911 exceeds a predetermined threshold. In these embodiments, each time the difference between the voltage (V substrate ) of the upper surface 105T of the real-time substrate 105 and the setpoint voltage 911 exceeds the predetermined threshold, the negative voltage portion of the current pulse of the bias voltage adjusted waveform 901 automatically ends, which corresponds to an automatic closed-loop feedback control of the duty cycle of the bias voltage adjusted waveform 901.

[0096] In some embodiments, by controlling the duty cycle of the bias voltage adjusted waveform 901, the bias voltage adjusted waveform 901 is restricted within a range extending between an upper voltage boundary and a lower voltage boundary. Also, in some embodiments, by controlling the duty cycle of the bias voltage adjusted waveform 901, protection is provided from voltage surges according to a control algorithm. Further, by controlling the duty cycle of the bias voltage adjusted waveform 901, an immediate effect is given to the in-situ ion energy. In various embodiments, one or more parameters of the bias voltage adjusted waveform 901 are feedback controlled to minimize the difference between the determined voltage (V substrate ) of the upper surface 105T of the real-time substrate 105 and a constant setpoint voltage 911 achieved and maintained on the upper surface 105T of the substrate 105. For example, in some embodiments, one or more of the positive period of the bias voltage adjusted waveform 901, the negative period of the bias voltage adjusted waveform 901, and the frequency of the bias voltage adjusted waveform 901 are feedback controlled using the determined voltage (V substrate ) of the upper surface 105T of the real-time substrate 105 as a feedback control signal to achieve and maintain a constant setpoint voltage 911 on the upper surface 105T of the substrate 105.

[0097] The closed-loop feedback control method for the voltage generated on the upper surface 105T of the substrate 105 described with reference to FIG. 9 should be understood to be similarly applicable to the control of the voltage generated on the upper surface 315T of the edge ring 315, particularly when the bias voltage supply system 333B of FIG. 3G is implemented. Specifically, the determined voltage (V ERtop ) on the upper surface 315T of the real-time edge ring 315 is used as a feedback signal to achieve a constant setpoint voltage on the upper surface 315T of the edge ring 315, and the duty cycle of the feedback-controlled bias voltage adjusted waveform supplied to the edge ring electrode 323 is gradually increased between consecutive pulses of the feedback-controlled bias voltage adjusted waveform supplied to the edge ring electrode 323 until the plasma 119 density reaches a steady state during the ON pulse of the TCPRF power.

[0098] Maintaining a small IADF while pulsing the TCPRF power can be difficult due to the capacitance difference between the substrate support 301 and the edge ring 315. Since the surface area of the edge ring 315 is typically smaller than that of the substrate support 301, the capacitance of the edge ring 315 is smaller than that of the substrate support 301. The smaller the capacitance of the edge ring 315, the greater the voltage fluctuation on the upper surface 315T of the edge ring 315. Feedback control of the voltage amplitude typically requires more time for adjustment as the error from the target voltage is greater. Therefore, since the capacitance of the edge ring 315 is smaller than that of the substrate support 301, the edge ring 315 requires faster feedback control than the substrate support 301. If either the voltage on the upper surface 105T of the substrate 105 or the voltage on the upper surface 315T of the edge ring 315 is not feedback controlled, a large voltage difference can occur between the upper surface 105T of the substrate 105 and the upper surface 315T of the edge ring 315, which can result in a large IADF and an adverse etching slope accordingly. In some embodiments, when the bias voltage supply system 333A of FIG. 3D is implemented, the voltage difference between the upper surface 105T of the substrate 105 and the upper surface 315T of the edge ring 315 is limited by closed-loop feedback control of the duty cycle of the bias voltage adjusted waveform 342 to maintain a small IADF near the edge of the substrate 105. In some embodiments, when the bias voltage supply system 333B of FIG. 3G is implemented, the voltage difference between the upper surface 105T of the substrate 105 and the upper surface 315T of the edge ring 315 is limited by independent closed-loop feedback control of each of the bias voltage adjusted waveforms 342-1 and 342-2 to maintain a small IADF near the edge of the substrate 105.

[0099] In some embodiments, the bias voltage supply system 333 includes a bias electrode 123 disposed within the substrate support 301 and an intermediate electrode 302 disposed within the substrate support 301, such that the lower portion 303 of the substrate support 301 is present between the bias electrode 123 and the intermediate electrode 302, and the upper portion 305 of the substrate support 301 is present between the intermediate electrode 302 and the upper surface 301T of the substrate support 301. The bias voltage supply system 333 also includes voltage supply systems 341, 391 connected to supply a bias voltage adjusted radio frequency waveform to the bias electrode 123. In some embodiments, the bias voltage adjusted radio frequency waveform is defined as an ongoing series of pulse cycles, each pulse cycle including an ON period in which the bias voltage adjusted radio frequency waveform has a negative voltage and an OFF period in which the bias voltage adjusted radio frequency waveform has a positive voltage. The bias voltage supply system 333 also includes a voltage measurement system connected to measure a first voltage on the bias electrode 123 and a second voltage on the intermediate electrode 302. The bias voltage supply system 333 also includes a controller 351 (or a part thereof) configured to determine a voltage on the upper surface 105T of the substrate 105 present on the upper surface 301T of the substrate support 301 using the measured first voltage, the measured second voltage, the capacitance of the lower portion 303 of the substrate support 301, and the capacitance of the upper portion 305 of the substrate support 301. The controller 315 is configured to communicate the voltage on the upper surface 105T of the substrate 105 to the voltage supply systems 341, 391.

[0100] In some embodiments, the voltage supply systems 341, 391 are configured to adjust a bias voltage adjusted radio frequency waveform to minimize the difference between a set point voltage and the voltage on the top surface 105T of the substrate 105. In some embodiments, the voltage supply systems 341, 391 are configured to adjust the bias voltage adjusted radio frequency waveform within one pulse cycle of the bias voltage adjusted radio frequency waveform. In some embodiments, the controller 351 is configured to determine the voltage on the top surface 105T of the substrate 105 by calculating the sum of a first term and a second term, where the first term is equal to a second voltage on the middle electrode 302, the second term is equal to the product of a constant and a differential voltage, the constant is equal to the ratio of the capacitance of the lower portion 303 of the substrate support 301 to the capacitance of the upper portion 305 of the substrate support 301, and the differential voltage is equal to the second voltage on the middle electrode 302 minus the first voltage on the bias electrode 123.

[0101] In some embodiments, the bias voltage supply system 333 also includes an edge ring electrode 323 disposed within an edge ring 315 configured to circumscribe the substrate support 301. The edge ring electrode 323 is configured to control the voltage on the upper surface 315T of the edge ring 315. The bias voltage adjusted radio frequency waveform supplied to the bias electrode 123 within the substrate support 301 is a first bias voltage adjusted radio frequency waveform. The edge ring electrode 323 is connected to receive a second bias voltage adjusted radio frequency waveform from the voltage supply systems 341, 396. In some embodiments, the second bias voltage adjusted radio frequency waveform is defined as an ongoing series of pulse cycles, each pulse cycle including an ON period in which the second bias voltage adjusted radio frequency waveform has a negative voltage and an OFF period in which the second bias voltage adjusted radio frequency waveform has a positive voltage. The bias voltage supply system 333 also includes an edge ring middle layer electrode 317 disposed within the edge ring 315, such that a lower portion 319 of the edge ring 315 is present between the edge ring electrode 323 and the edge ring middle layer electrode 317, and an upper portion 321 of the edge ring 315 is present between the edge ring middle layer electrode 317 and the upper surface 315T of the edge ring 315.

[0102] The voltage measurement system is connected to measure the third voltage on the edge ring electrode 323 and the fourth voltage on the edge ring middle electrode 317. The controller 315 is configured to determine the voltage on the upper surface 315T of the edge ring 315 using the measured third voltage on the edge ring electrode 323, the measured fourth voltage on the edge ring middle electrode 317, the capacitance of the lower part 319 of the edge ring 315, and the capacitance of the upper part 321 of the edge ring 315. In some embodiments, the controller 351 is configured to determine the voltage on the upper surface 315T of the edge ring 315 by calculating the sum of a first term and a second term, where the first term is equal to the fourth voltage on the edge ring middle electrode 317, the second term is equal to the product of a constant and a differential voltage, the constant is equal to the ratio of the capacitance of the lower part 319 of the edge ring 315 to the capacitance of the upper part 321 of the edge ring 315, and the differential voltage is equal to the fourth voltage on the edge ring middle electrode 317 minus the third voltage on the edge ring electrode 323. The controller 315 is configured to communicate the voltage on the upper surface 315T of the edge ring 315 to the voltage supply system.

[0103] In some embodiments, the bias voltage supply system 333 includes variable capacitors 359, 361, 363, 365, which are arranged to individually control the second bias voltage adjusted radio frequency waveform supplied to the edge ring electrode 323 with respect to the first bias voltage adjusted radio frequency waveform supplied to the bias electrode 123. In some embodiments, the voltage supply systems 341, 396 are configured to adjust the second bias voltage adjusted radio frequency waveform supplied to the edge ring electrode 323 to minimize the difference between the set point voltage and the voltage on the upper surface 315T of the edge ring 315. In some embodiments, the voltage supply systems 341, 396 are configured to adjust the second bias voltage adjusted radio frequency waveform within one pulse cycle of the second bias voltage adjusted radio frequency waveform.

[0104] In some embodiments, a substrate support system is disclosed for a plasma processing system 300. The substrate support system includes a substrate support 301 having an upper surface 301T configured to support a substrate 105. The substrate support system includes a bias electrode 123 disposed within the substrate support 301. The bias electrode 123 is configured to control a voltage on an upper surface 105T of the substrate 105. The bias electrode 123 is connected to receive a bias voltage conditioned radio frequency waveform from voltage supply systems 341, 391. The substrate support system also includes an intermediate electrode 302 disposed within the substrate support 301 such that a lower portion 303 of the substrate support 301 is present between the bias electrode 123 and the intermediate electrode 302 and an upper portion 305 of the substrate support 301 is present between the intermediate electrode 302 and the upper surface 301T of the substrate support 301. The substrate support system also includes a first connector 313 electrically connected to the bias electrode 123 for measuring a first real-time voltage on the bias electrode 123. The bias electrode 123 is configured to electrically receive the first connector 313 for measuring the first real-time voltage on the bias electrode 123. The substrate support system also includes a second connector 309 electrically connected to the intermediate electrode 302 for measuring a second real-time voltage on the intermediate electrode 302. The intermediate electrode 302 is configured to electrically receive the second connector 309 for measuring the second real-time voltage on the intermediate electrode 302. The substrate support system also includes a controller 315 that is configured to determine a real-time voltage on the upper surface 105T of the substrate 105 using the measured first real-time voltage on the bias electrode 123, the measured second real-time voltage on the intermediate electrode 302, the capacitance of the lower portion 303 of the substrate support 301, and the capacitance of the upper portion 305 of the substrate support 301.

[0105] In some embodiments, an edge ring system is disclosed for a plasma processing system 300. The edge ring system includes an edge ring 315 configured to circumscribe a substrate support 301. The edge ring system also includes an edge ring electrode 323 disposed within the edge ring 315. The edge ring electrode 323 is configured to control a voltage on an upper surface 315T of the edge ring 315. The edge ring electrode 323 is connected to receive a bias voltage conditioned radio frequency waveform from voltage supply systems 341, 396. The edge ring system also includes an edge ring middle electrode 317 disposed within the edge ring 315 such that a lower portion 319 of the edge ring 315 is present between the edge ring electrode 323 and the edge ring middle electrode 317 and an upper portion 321 of the edge ring 315 is present between the edge ring middle electrode 317 and the upper surface 315T of the edge ring 315. The edge ring system also includes a first connector 327 electrically connected to the edge ring electrode 323 to measure a first real-time voltage on the edge ring electrode 323. The edge ring electrode 323 is configured to electrically receive the first connector 327 to measure the first real-time voltage on the edge ring electrode 323. The edge ring system also includes a second connector 331 electrically connected to the edge ring middle electrode 317 to measure a second real-time voltage on the edge ring middle electrode 317. The edge ring middle electrode 317 is configured to electrically receive the second connector 331 to measure the second real-time voltage on the edge ring middle electrode 317. The controller 315 is configured to determine a real-time voltage on the upper surface 315T of the edge ring 315 using the measured first real-time voltage on the edge ring electrode 323, the measured second real-time voltage on the edge ring middle electrode 317, the capacitance of the lower portion 319 of the edge ring 315, and the capacitance of the upper portion 321 of the edge ring 315.

[0106] FIG. 10A shows a flowchart of a method for controlling the voltage on substrate 105 according to some embodiments. The method includes operation 1001 of operating voltage supply systems 341, 391 to supply a bias voltage adjusted radio frequency waveform to bias electrode 123 within substrate support 301. The method also includes operation 1003 of measuring a first voltage on bias electrode 123 at a given time. It should be understood that various electrical parameters such as voltage can be determined / calculated using other related parameters, e.g., V = IR (where V is voltage, I is current, and R is resistance). Therefore, the various voltage measurements referred to herein can be performed by either direct voltage measurement or indirect voltage measurement, and indirect voltage measurement is understood to include determining / measuring one or more parameters related to the voltage to be measured and subsequently determining / calculating the voltage to be measured using one or more parameters related to the voltage to be measured. The method also includes operation 1005 of measuring a second voltage on intermediate electrode 302 at a given time. The method also includes operation 1007 of using the measured first voltage on bias electrode 123 at a given time, the measured second voltage on intermediate electrode 302 at a given time, the capacitance of the lower portion 303 of substrate support 301, and the capacitance of the upper portion 305 of substrate support 301 to determine the voltage on the upper surface 105T of substrate 105 present on the upper surface 301T of substrate support 301 at a given time.

[0107] FIG. 10B shows a flowchart of an optional extension of the method of FIG. 10A for controlling the voltage on substrate 105 according to some embodiments. The method includes operation 1009 of determining the difference between the voltage on the upper surface 105T of substrate 105 at a given time and a setpoint voltage. The method also includes operation 1011 of determining an adjustment of the bias voltage adjusted radio frequency waveform to reduce the difference between the voltage on the upper surface 105T of substrate 105 at a given time and the setpoint voltage. The method also includes operation 1013 of operating voltage supply systems 341, 391 to implement the adjustment of the bias voltage adjusted radio frequency waveform.

[0108] In some embodiments, the given time occurs during the negative portion of a cycle of the bias voltage adjusted radio frequency waveform, and operation 1013 is performed to effect an adjustment to the bias voltage adjusted radio frequency waveform during the negative portion of the next cycle of the bias voltage adjusted radio frequency waveform. In some embodiments, the adjustment to the bias voltage adjusted radio frequency waveform is a change in voltage as a function of time during the negative portion of the next cycle of the bias voltage adjusted radio frequency waveform. In some embodiments, the adjustment to the bias voltage adjusted radio frequency waveform is a change in the duration of the negative portion of the next cycle of the bias voltage adjusted radio frequency waveform.

[0109] FIG. 10C shows a flowchart of an optional extension of either method of FIGS. 10A or 10B, according to some embodiments. The method includes operation 1015 of operating voltage supply systems 341, 396 to supply a second bias voltage adjusted radio frequency waveform to edge ring electrode 323 within edge ring 315 that circumscribes substrate support 301. In this embodiment, the bias voltage adjusted radio frequency waveform supplied to bias electrode 123 within substrate support 301 is referred to as a first bias voltage adjusted radio frequency waveform. The method also includes operation 1017 of measuring a third voltage on edge ring electrode 323 at a given time. The method also includes operation 1019 of measuring a fourth voltage of edge ring middle layer electrode 317 at a given time. The method also includes operation 1021 of determining a voltage on top surface 315T of edge ring 315 at a given time using the measured third voltage on edge ring electrode 323 at the given time, the measured fourth voltage on edge ring middle layer electrode 317 at the given time, the capacitance of lower portion 319 of edge ring 315, and the capacitance of upper portion 321 of edge ring 315.

[0110] FIG. 10D shows a flowchart of an optional extension of the method of FIG. 10C for controlling the voltage on edge ring 315, according to some embodiments. The method includes operation 1023 for determining the difference between the voltage on the upper surface 315T of edge ring 315 at a given time and a setpoint voltage. The method also includes operation 1025 for determining an adjustment of a second bias voltage adjusted radio frequency waveform that reduces the difference between the voltage on the upper surface 315T of edge ring 315 at a given time and the setpoint voltage. The method also includes operation 1027 for operating voltage supply systems 341, 396 to effect the adjustment to the second bias voltage adjusted radio frequency waveform. In some embodiments, the given time occurs during the negative portion of the cycle of the second bias voltage adjusted radio frequency waveform, and operation 1027 is performed to effect the adjustment to the second bias voltage adjusted radio frequency waveform during the negative portion of the next cycle of the second bias voltage adjusted radio frequency waveform. In some embodiments, the adjustment to the second bias voltage adjusted radio frequency waveform is a change in voltage as a function of time during the negative portion of the next cycle of the second bias voltage adjusted radio frequency waveform. In some embodiments, the adjustment to the second bias voltage adjusted radio frequency waveform is a change in the duration of the negative portion of the next cycle of the second bias voltage adjusted radio frequency waveform.

[0111] The various embodiments described herein may be implemented in conjunction with various computer system configurations including, but not limited to, a hand-held hardware unit, a microprocessor system, a microprocessor-based or programmable consumer electronics, a minicomputer, a mainframe computer, and the like. The various embodiments described herein may also be implemented in conjunction with a distributed computing environment where tasks are performed by remote processing hardware units linked through a computer network. It should also be understood that the various embodiments disclosed herein include the performance of various computer-implemented operations including the manipulation of data stored on a computer system. These computer-implemented operations manipulate physical quantities. In various embodiments, the computer-implemented operations are performed by either a general purpose computer or a special purpose computer. In some embodiments, the computer-implemented operations are performed by a selectively activated computer and / or are instructed by one or more computer programs stored in a computer memory or retrieved through a computer network. When a computer program and / or digital data are retrieved through a computer network, the digital data may be processed by another computer on the computer network, such as a cloud of computing resources. The computer programs and digital data are stored as computer-readable code on a non-transitory computer-readable medium. A non-transitory computer-readable medium is a data storage hardware unit (e.g., a memory device) that stores data and is thereafter readable by a computer system. Examples of non-transitory computer-readable media include hard drives, network attached storage (NAS), ROM, RAM, compact disk-ROM (CD-ROMs), writeable CDs (CD-Rs), rewritable CDs (CD-RWs), digital video / multipurpose disks (DVDs), magnetic tape, and other optical and non-optical data storage hardware units.In some embodiments, a computer program and / or digital data are distributed among a plurality of computer-readable media disposed in different computer systems within a network of coupled computer systems such that the computer program and / or digital data are executed and / or stored in a distributed manner.

[0112] The foregoing embodiments include some details for clarity of understanding, but it will be apparent that certain changes and modifications can be made within the scope of the appended claims. For example, it should be understood that one or more features from any of the embodiments disclosed herein may be combined with one or more features of any other embodiment disclosed herein. Accordingly, these embodiments are considered to be illustrative and not restrictive, and the claims are not limited to the details shown herein and may be modified within the scope of the appended embodiments and their equivalents.

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