Bidirectional Insulated AC-DC Converter

Abstract

The bidirectional high-voltage AC-DC converter includes a primary three-phase three-level T-type power factor correction circuit, a full-bridge switching circuit connected to the output side of the primary three-phase three-level T-type power factor correction circuit, an isolated capacitor-inductor-inductor-capacitor (CLLC) resonant tank connected to the full-bridge switching circuit, a T-type full-bridge output topology circuit connected to the CLLC resonant circuit, and a controller for controlling one or more components of the bidirectional isolated high-voltage AC-DC converter. The primary three-phase three-level T-type power factor correction circuit and the secondary three-level circuit include a split DC link bus having respective voltages actively controlled by the controller. The CLLC resonant converter circuit includes an isolation transformer that electrically isolates the primary side of the bidirectional isolated high-voltage AC-DC converter from the secondary side. The method of control includes synthesizing one or more output voltages of the front-end three-phase three-level T-type PFC circuit via a modified space vector pulse width modulation (SVPWM) scheme or variable amplitude dual-carrier sinusoidal triangular PWM with capacitor bank midpoint voltage control, and the modified SVPWM scheme is at least partially based on the nearest neighbor four-vector technique.

Description

Technical Field

[0001] The present application generally relates to bidirectional AC-DC converters, and more specifically to bidirectional isolated high-voltage AC-DC converters and methods for controlling bidirectional AC-DC converters.

Background Art

[0002] As many vehicles, including aircraft or ships, are transitioning to the application of electric motors for propulsion or other power requirements, DC voltage buses or AC voltage buses operating from typically today's voltage levels to significantly higher voltage levels have emerged to accommodate the increasing power levels. For example, conventional vehicle AC power distribution networks typically use a transformer rectifier unit (TRU) for AC-DC conversion, but such transformer rectifier units are bulky, heavy, and inefficient. Some conventional vehicle AC power distribution networks use an automatic transformer rectifier unit (ATRU) in place of the TRU, which has a higher power density and higher efficiency compared to conventional TRUs. However, a significant drawback associated with the ATRU is the loss of important electrical insulation.

[0003] With recent advancements in power electronics technology, particularly the adoption of wide bandgap power devices (SiC and GaN), the ATRU solution is only classified as "make-do" or "use for convenience" because of the high sacrifice of electrical insulation and low gains in power density and efficiency. In the latest power electronics technology, it is required to bring innovation to such classical functions with the necessary power density, efficiency, and intelligent fault handling capabilities without sacrificing the benefits of insulation.

[0004] Conventional flight motion control devices usually dissipate regenerative energy internally through braking resistors. As a result, unfortunately, the system efficiency decreases and the operating temperature rises. With the emergence of the next-generation MEA microgrid power system, in cases where at least a low-duty-cycle energy return flow occurs as in the operation of a vehicle's motor drive, the constraint that prohibits the regenerative energy flowing in the direction back to the AC system can be lifted. The design of the bidirectional power flow capability has become a new design paradigm to meet the goals of higher energy efficiency and reduced environmental impact.

Summary of the Invention

[0005] This application describes a bidirectional high-voltage AC-DC converter. The bidirectional high-voltage AC-DC converter utilizes the latest power electronics technology to provide a high-density bidirectional insulated power processing unit, which enables the use of standard vehicle operation products in a vehicle equipped with a power system including an AC power bus, and additional features bring benefits to the system-level design of the operating system.

[0006] In an embodiment of the present application, by using an innovative AC-DC conversion topology realized by a wide-bandgap GaN device and providing essential electrical insulation, bidirectional power conversion is performed between an AC power source and the output side of a split DC bus that can be used as a reference for the vehicle chassis. The bidirectional power flow enables the flight actuator to flow regenerative energy back to the AC power source, enhancing the overall system efficiency. Advantageous features for managing partial discharge faults by the split DC bus are provided to achieve the optimization of the electric drive operating system and other power demands of vehicle applications where high-altitude operation causes significant problems due to the high-voltage power bus.

[0007] In an exemplary embodiment, the bidirectional high-voltage AC-DC converter of the present application includes a primary three-phase three-level T-type power factor correction circuit, a switching circuit connected to the primary three-phase three-level T-type power factor correction circuit, a capacitor-inductor-inductor-capacitor (CLLC) resonant converter circuit connected to the switching circuit, a T-type full-bridge output topology circuit connected to the CLLC resonant converter circuit, and a controller for controlling one or more components of the bidirectional isolated high-voltage AC-DC converter. The primary three-phase three-level T-type power factor correction circuit and the secondary three-level circuit include a split DC link bus whose respective voltages are actively controlled by the controller. The CLLC resonant converter circuit includes an isolation transformer that electrically isolates the primary side of the bidirectional isolated high-voltage AC-DC converter from the secondary side.

[0008] The primary three-phase three-level T-type power factor correction circuit forms an interface to the high-voltage AC power bus, and the secondary three-level circuit forms an interface to a split DC link bus having a controlled symmetric internal DC bus connected to the chassis as a common reference. For example, the controlled symmetric internal DC bus can be configured as ±135 VDC or ±270 VDC. With this AC-DC converter, an advanced motor controller design with soft start and optimal inrush control as well as an excellent shutdown function during the failure of the motor drive inverter is achieved.

[0009] The bidirectional isolated high-voltage AC-DC converter of the present disclosure provides an optimized solution for the management of partial discharge faults at the system level with an optimized actuator design. Also, the bidirectional isolated high-voltage AC-DC converter of the present disclosure can form an interface to the high-voltage AC bus for standard operating products, such as a flight control operating system of ±135 VDC or ±270 VDC.

[0010] Accordingly, one aspect of the present invention is a bidirectional AC-DC converter circuit. In an exemplary embodiment, the bidirectional AC-DC converter includes a three-phase three-level T-type power factor correction (PFC) circuit including a primary split DC link bus, a switching circuit connected to the three-phase three-level T-type power factor correction circuit, a capacitor-inductor-inductor-capacitor (CLLC) resonant converter circuit connected to the switching circuit and including an isolation transformer, and a three-level T-type full-bridge output circuit connected to the CLLC resonant converter circuit and including a secondary split DC link bus, wherein the isolation transformer electrically isolates the switching circuit from the three-level T-type full-bridge output circuit.

[0011] In an exemplary embodiment, the bidirectional AC-DC converter further includes a controller for controlling the front-end three-phase three-level T-type power factor correction (PFC) circuit. In an exemplary embodiment, the method of control includes synthesizing a rectified voltage of the front-end three-phase three-level T-type PFC circuit by a modified space vector pulse width modulation (SVPWM) scheme, wherein the modified SVPWM scheme is based on the nearest four-vector technique.

[0012] In an exemplary embodiment, the method of controlling the front-end three-phase three-level T-type power factor correction (PFC) circuit further includes determining a first nearest neighbor vector, a second nearest neighbor vector, a third nearest neighbor vector, and a fourth nearest neighbor vector, wherein two of the first nearest neighbor vector, the second nearest neighbor vector, the third nearest neighbor vector, or the fourth nearest neighbor vector have opposite signs of the output current i o to produce, and the two nearest neighbor vectors that produce currents with opposite signs are used to calculate a combined nearest neighbor vector, and based on the combined nearest neighbor vector and the other two nearest neighbor vectors, a synthesis of the nearest three vectors is performed.

[0013] The above and further features of the present invention will become apparent by reference to the following description and the accompanying drawings. In the description and drawings, specific embodiments of the present invention are disclosed in detail as examples of methods that can use the basic method of the present invention, but it should be understood that the present invention is not correspondingly limited in its scope. Rather, the present invention includes all modifications, corrections, and equivalent forms included in the spirit and terms of the appended claims. The features described and / or illustrated with respect to one embodiment can be used in the same or similar manner in one or more other embodiments and / or in combination with or in place of the features of other embodiments.

Brief Description of the Drawings

[0014]

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Embodiments for Carrying Out the Invention

[0015] Hereinafter, embodiments of the present application will be described with reference to the drawings. Throughout, like reference numerals are used to refer to like elements. It should be understood that the figures are not necessarily drawn to scale.

[0016] FIG. 1 shows a schematic block diagram of an exemplary bidirectional isolated AC-DC converter 100. FIG. 2 is a detailed circuit diagram showing the components of the bidirectional isolated AC-DC converter 100 of FIG. 1. In the examples of FIGS. 1 and 2, the bidirectional isolated AC-DC converter 100 includes a front-end three-phase three-level T-type power factor correction (PFC) circuit 110 including a primary split DC link bus 160, a switching circuit 120 connected to the primary split DC link bus, a capacitor-inductor-inductor-capacitor (CLLC) resonant converter circuit 130 connected to the switching circuit 120, and a three-level T-type full-bridge output circuit 140 connected to the CLLC resonant converter circuit 130.

[0017] Referring particularly to the circuit diagram of FIG. 2, the primary split DC link bus 160 includes a positive primary DC bus 201, a primary midpoint bus 202, and a negative primary bus 203. The CLLC resonant converter circuit 130 includes an isolation transformer 215 that electrically isolates the switching circuit from the three-level T-type full-bridge output circuit. The three-level T-type full-bridge output circuit includes a secondary split DC bus 170. The secondary split DC bus 170 includes a positive secondary DC bus 212, a secondary midpoint bus 213, and a negative secondary DC bus 214. In the illustrated example, the positive secondary DC bus 212 is +135 VDC, the secondary midpoint bus 213 is connected to ground, and the negative secondary DC bus 214 is -135 VDC. The positive secondary DC bus 212 and the negative secondary DC bus 214 are controlled and symmetric. Ground can be a reference with respect to an electronic circuit chassis, such as a vehicle chassis.

[0018] One or more controllers 150 are used for controlling the front-end three-phase three-level T-type PFC circuit 110, the switching circuit 120, and / or the three-level T-type full-bridge output circuit 140. For example, one or more controllers can be used to actively split the secondary split DC bus 170 and use the positive secondary DC bus 212 and the negative secondary DC bus 214 to achieve optimization of high-voltage management for partial discharge faults and optimization of actuator design. By providing the AC-DC converter 100, it is possible to improve the inrush current control and the cutoff function during the failure of the motor drive inverter, starting from an advanced motor controller design with soft start technology. Further, a modified space vector pulse width modulation (SVPWM) scheme is used to operate the front-end three-phase three-level T-type PFC circuit. The bidirectional isolated AC-DC converter is described as using a three-level three-phase topology, but the bidirectional isolated AC-DC converter can also be used as a single-phase AC-DC power converter.

[0019] The primary three-phase three-level T-type power factor correction circuit 110 includes a primary AC bus 204, three inductors L1, L2, L3, a first primary phase leg 205, a second primary phase leg 206, a third primary phase leg 207, and a primary split DC link bus 160. The primary AC bus 204 includes three AC voltage sources V1a, V1b, and V1c.

[0020] The first primary-phase leg 205 includes switching devices Q1R, Q2R, Q1RN, and Q2RN. The second primary-phase leg 206 includes switching devices Q3R, Q4R, Q3RN, and Q4RN. The third primary-phase leg 207 includes switching devices Q5R, Q6R, Q5RN, and Q6RN. The first primary-phase leg 205, the second primary-phase leg 206, and the third primary-phase leg 207 are connected to the primary-capacitor midpoint of the primary-split DC link bus 160 via Q1RN / Q2RN, Q3RN / Q4RN, and Q5RN / Q6RN, respectively. The switching devices Q1R, Q2R, Q1RN, Q2RN of the first primary-phase leg 205, the switching devices Q3R, Q4R, Q3RN, Q4RN of the second primary-phase leg 206, and the switching devices Q5R, Q6R, Q5RN, Q6RN of the third primary-phase leg 207 can be controlled to implement various switching stages, which will be described in more detail below.

[0021] The primary-split DC link bus 160 includes capacitors C1P, C2P, the primary-capacitor midpoint 202, and the negative primary DC reference voltage 203. The primary-capacitor midpoint voltage 202 is actively controlled via a controller, for example, by applying a PWM control signal.

[0022] The switching circuit 120 includes a first switching leg 208 and a second switching leg 209. The first switching leg 208 includes switching devices Q3P, Q4P. The second switching leg 209 includes switching devices Q1P, Q2P.

[0023] The CLLC resonant converter circuit 130 includes resonant capacitors Crp, Crs, resonant inductors Lrp, Lrs, and an isolation transformer T2 / 215. The resonant capacitor Crp and the resonant inductor Lrp are connected in series with each other, and the resonant capacitor Crs and the resonant inductor Lrs are connected in series with each other. The isolation transformer T2 / 215 includes a primary winding and a secondary winding. The primary winding has terminals 1, 2, and the secondary winding has terminals 3, 4. The resonant inductor Lrp is connected to terminal 1 of the primary winding, and the resonant inductor Lrs is connected to terminal 3 of the secondary winding. The resonant capacitor Crp is connected to the second switching leg 209 of the switching circuit at a predetermined point between the switching devices Q1P and Q2P. Terminal 2 of the primary winding is connected to the first switching leg 208 at a predetermined point between the switching devices Q3P and Q4P. The resonant inductor Lrp, the resonant inductor Lrs, and the isolation transformer T2 / 215 can be incorporated into a single physical device. The CLLC resonant converter circuit operates to provide electrical isolation, voltage gain or voltage reduction, and energy transfer. By using the correct parameters, the CLLC resonant converter circuit also enables zero-voltage switching of the power switches within the primary phase leg under forward power flow conditions and within the secondary phase leg under reverse power flow conditions.

[0024] The secondary T-type three-level circuit 140 includes a secondary split DC link bus 170, a first secondary phase leg 210, and a second secondary phase leg 211. The secondary split DC link bus 170 includes capacitors C1S, C2S, a positive secondary DC bus 212, a secondary capacitor midpoint 213, and a negative secondary DC bus 214. In the example of FIG. 2, the positive secondary DC bus 212 is associated with a positive low-voltage DC power, such as +135 VDC, the voltage of the secondary capacitor midpoint 213 is a reference on the secondary side and is associated with the secondary capacitor midpoint 213, and the negative secondary DC bus 214 is associated with a negative low-voltage DC power, such as -135 VDC. The voltage of the secondary capacitor midpoint 213 is actively controlled via the controller 150, for example, by the application of a PWM control signal.

[0025] The first secondary phase leg 210 includes switching devices Q1S, Q2S, Q1SN, and Q2SN. The second secondary phase leg 211 includes switching devices Q3S, Q4S, Q3SN, and Q4SN. The first secondary phase leg 210 and the second secondary phase leg 211 are connected to the secondary capacitor midpoint 213 of the secondary split DC link bus 170 via Q1SN / Q2SN and Q3S / Q4SN, respectively. The switching devices Q1S, Q2S, Q1SN, Q2SN of the first secondary phase leg 210 and the switching devices Q3S, Q4S, Q3SN, Q4SN of the second secondary phase leg 211 can be controlled to implement various switching stages, which will be described in more detail below.

[0026] When operating in the forward direction, the primary three-phase three-level T-type power factor correction circuit 110 receives the input voltage from the AC power bus 204, for example, 115 Vrms from the vehicle's power bus. The controller 150 applies control signals, for example, PWM control signals, to the switching devices Q1R~Q6R and Q1RN~Q6RN to apply power factor correction and generate a high-quality controlled DC voltage. A primary capacitor midpoint voltage control function, for example, active control of the midpoint primary voltage, can be incorporated into the PWM control signals that determine the pulse duration and sequence of the phase terminals at each possible voltage level. The controller 150 applies a control signal, for example, a PWM control signal, to the switching devices Q1P~Q4P to modulate the DC voltage into a high-frequency AC rectangular wave. The isolation transformer 215 of the CLLC resonant converter circuit 130 steps down the high-frequency AC voltage. The controller 150 applies control signals, for example, PWM control signals, to the switching devices Q1S~Q4S and Q1SN~Q4SN of the secondary T-type three-level output circuit 140 to rectify the high-frequency AC voltage into a relatively low VDC output voltage, such as ±135 VDC voltage or ±270 VDC voltage, for power supply to a low-voltage load. The switching devices Q1P~Q4P are at zero voltage switched via the CLLC resonant converter circuit under forward power flow conditions. Similarly, the switching devices Q1S~Q4S are zero-voltage switched under reverse power flow conditions.

[0027] The voltage control function of the secondary capacitor midpoint 213, for example, the active control of the midpoint secondary voltage, can be incorporated into the PWM control signal. Since the isolation transformer 215 is in the resonant conversion process, the secondary capacitor midpoint 213 can be connected to the ground, which is a reference with respect to the electronic circuit chassis. What is obtained in this example is a ±135 VDC internal power bus having the secondary capacitor midpoint 213 as a reference with respect to the electronic circuit chassis.

[0028] When operating in the reverse direction, the output side of the secondary T-type three-level circuit 140 receives the input VDC voltage, for example, a ±135 VDC voltage, from a low-voltage source. The controller 150 applies a control signal, for example, a PWM control signal, to the switching devices Q1S~Q4S and Q1SN~Q4SN to modulate the ±135 VDC voltage into a high-frequency AC rectangular wave. The isolation transformer 215 of the CLLC resonant converter circuit boosts the high-frequency AC voltage. The controller applies a control signal, for example, a PWM control signal, to the switching devices Q1P~Q4P of the switching circuit 120 to rectify the high-frequency AC voltage into a relatively high VDC output voltage. The controller 150 applies a control signal, for example, a PWM control signal, to the switching devices Q1R~Q6R and Q1RN~Q6RN to invert the DC voltage into an AC output voltage in order to supply power to the AC power bus 204.

[0029] FIG. 3 shows an exemplary analysis model of a front-end three-phase three-level T-type PFC circuit having definitions of circuit variables. The switching variables S a , S b , S c are defined as

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[0030] One or more controllers utilize SVPWM switching of active power devices in the front-end three-phase three-level T-type PFC circuit, such as gallium nitride high electron mobility transistors (GaN HEMTs), to synthesize v ra , v rb , v rc in accordance with the current control requirements. The synthesis process can be mathematically expressed by the space vector format. That is, the rectified voltage space vector

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[0031] In contrast to the conventional space vector representation, in the embodiments of the present application, the deviation variable v or v of the capacitor midpoint pu, that is, a modified space vector representation that takes into account the DC voltage distribution between the capacitors is used. The resulting switching space vector graph is shown in Fig. 4, where it is assumed that v≧0 and all vectors are identified by the triplet [S a , S b , S c . The relevant information regarding the current flowing through the midpoint of the capacitor is also marked on the switching space vector graph of Fig. 4.

[0032] In contrast to the conventional space vector graph, the middle vectors of the switching space vector graph in Fig. 4 are dispersed due to the unbalanced capacitor voltage distribution. Therefore, in general, the Nearest Four Vector (NFV) technique is used to synthesize the required voltage vectors. Thus, in the configuration being described, a modified SVPWM scheme as a simplified NFV technique and NTV technique is realized. For example, an exemplary modified SVPWM scheme can be realized as described below.

[0033] Assume that the two capacitors C1 and C2 in Fig. 3 have equal capacitance, i.e., C1 = C2 = C. In this case,

Equation

[0034] Fig. 5 shows an exemplary synthesis of voltage space vectors using a modified SVPWM scheme based on the high-fidelity switching space vector graph of Fig. 4. The voltage vector

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[0035] In the front-end three-phase three-level T-type PFC circuit, the AC phase current is usually aligned with the voltage vector, that is, at a displacement angle of 0° for positive power flow or at a displacement angle of 180° for negative power flow. Therefore, the role of the intermediate space vector in the capacitor midpoint voltage control process is not ambiguous.

[0036] FIG. 6 summarizes the control loop structure of the AC-DC front-end PFC stage using the illustrated NFV SVPWM. By utilizing a dual-carrier-based PWM with a variable carrier amplitude that reflects the true voltage distribution conditions in the output capacitor, an SVPWM algorithm in an equivalent sinusoidal triangular PWM scheme can be realized. FIG. 7 shows the details of the variable amplitude dual-carrier sinusoidal triangular PWM, and the influence of the capacitor bank midpoint voltage deviation (v pu ≤ 0, illustrated by) on the pulse width timing parameters is visualized. The PWM control of the DC-DC converter stage is described in the applicant's international patent application PCT / US2023 / 64008, which is hereby incorporated by reference into this specification.

[0037] Therefore, the bidirectional isolated AC-DC converter uses a three-level output topology with active midpoint voltage control and an isolation transformer to split the output into a symmetric dual power supply with a common reference connected to the chassis. Such an arrangement provides a solution optimized for system-level partial discharge fault management and enables an interface to standard ±135VDC or ±270VDC flight control operating systems for aircraft and other vehicle applications. The modified SVPWM scheme is used to operate the front-end three-phase three-level T-type PFC circuit based on the high-fidelity switching space vector graph of FIG. 4 so that the distortion of the input phase current due to the capacitor midpoint voltage deviation is removed. The isolation topology of the CLLC resonant converter circuit can soft-start the output while performing the inrush current control required during a steep application of the input voltage. In some embodiments, the bidirectional isolated AC-DC converter is implemented using advanced health monitoring functions. Optionally, the bidirectional isolated AC-DC converter can safely disconnect the motor drive inverter from the associated power bus if the motor drive inverter fails. Further, if one of the phases is lost, the bidirectional isolated AC-DC converter can operate based on a single-phase AC-DC algorithm. Further, the bidirectional isolated AC-DC converter can operate standard flight control actuators without dissipating regenerative energy in the box, i.e., the regenerative energy can be fed back to the source. Exemplary transistors that can be used by the bidirectional isolated AC-DC converter include GaN HEMTs that provide relatively high power density and high efficiency.

[0038] FIG. 8 shows an exemplary flowchart of a method 800 for synthesizing one or more rectified voltages of a front-end three-phase three-level T-type PFC circuit by a modified space vector pulse width modulation (SVPWM) scheme. In steps 801 and 802, the voltage values at each of the three branches a, b, c

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[0039] Although the present invention has been illustrated and described in connection with specific embodiments, it will be apparent to those of ordinary skill in the art who have read and understood this specification and the accompanying drawings that equivalent changes and modifications can be readily envisioned. In particular, with respect to the various functions performed by the above-described elements (components, assemblies, devices, compositions, etc.), the terms used in the description of these elements (including references to "means") are intended to correspond to any element that performs the specified function of the recited element, even if not structurally equivalent to the disclosed structure that performs the function in the exemplary embodiments illustrated herein or in embodiments of the present invention, unless expressly stated otherwise. Further, although specific features of the present invention have been described above with respect to one or more of several exemplary embodiments, these features can be combined with one or more other features of other embodiments as may be desired and advantageous for any given or particular application.

Claims

1. A bidirectional AC-DC converter, A three-phase power factor correction (PFC) circuit including a primary divided DC link bus, A switching circuit connected to the primary divided DC link bus, wherein the PFC circuit and the switching circuit constitute the primary side of the bidirectional AC-DC converter, A capacitor-inductor-inductor-capacitor (CLLC) resonant converter circuit, which is connected to the aforementioned switching circuit and includes an isolation transformer, A 3-level T-type full-bridge output circuit, which is connected to the CLLC resonant converter circuit on the secondary side of the bidirectional AC-DC converter and includes a secondary divided DC link bus, and Includes, The isolation transformer electrically isolates the primary side of the bidirectional AC-DC converter from the secondary side of the bidirectional AC-DC converter, specifically the three-level T-type full-bridge output circuit. Bidirectional AC-DC converter.

2. The primary divided DC link bus includes a primary intermediate bus associated with an intermediate voltage, The bidirectional AC-DC converter further includes a controller configured to actively control the intermediate voltage associated with the primary intermediate bus. The bidirectional AC-DC converter according to claim 1.

3. The bidirectional AC-DC converter according to claim 1 or 2, wherein the primary divided DC link bus includes a positive primary DC bus and a negative primary DC bus that are symmetrical to each other.

4. The aforementioned secondary divided DC link bus includes a secondary intermediate bus associated with the secondary intermediate voltage, The controller is further configured to actively control the secondary intermediate voltage associated with the secondary intermediate bus. The bidirectional AC-DC converter according to claim 2.

5. The bidirectional AC-DC converter according to claim 3, wherein the secondary divided DC link bus includes a positive secondary DC bus and a negative secondary DC bus that are symmetrical to each other.

6. The bidirectional AC-DC converter according to claim 3, wherein the switching circuit includes a plurality of transistors arranged in a full-bridge configuration.

7. The three-phase power factor correction (PFC) circuit comprises three inductors and a three-level T-type phase leg topology that enables bidirectional power flow, as described in claim 3, for the bidirectional AC-DC converter.

8. The bidirectional AC-DC converter further includes a controller configured to execute a modified space vector pulse width modulation (SVPWM) scheme in order to control the three-phase PFC circuit. The aforementioned modified SVPWM schema is at least partially based on the nearest-neighbor four-vector technique. The bidirectional AC-DC converter according to claim 3.

9. A method for controlling a front-end three-phase three-level T-type power factor correction (PFC) circuit, The method includes synthesizing the rectified voltages of a front-end three-phase three-level T-type PFC circuit using a modified space vector pulse width modulation (SVPWM) scheme. The aforementioned modified SVPWM schema is at least partially based on the nearest-neighbor four-vector technique. method.

10. A method for controlling a front-end three-phase three-level T-type power factor correction (PFC) circuit according to claim 9, further comprising a PWM switching function for controlling the phase legs in a first state, a second state, and a third state.

11. A method for controlling a front-end three-phase three-level T-type power factor correction (PFC) circuit according to claim 10, wherein in the second state, the phase leg portion is connected to the intermediate bus.

12. A method for controlling a front-end three-phase three-level T-type power factor correction (PFC) circuit according to any one of claims 9 to 11, wherein the front-end three-phase three-level T-type power factor correction (PFC) circuit has three branches, and each of the three branches has a different branch voltage.

13. Using the three switching functions associated with the three branches, the DC bus voltage, and the capacitor midpoint deviation voltage, the rectified voltage space vector is calculated. The rectified voltage space vector is collectively formed from all combinations of switching functions in the switching space vector graph of the front-end PFC. A method for controlling a front-end three-phase three-level T-type power factor correction (PFC) circuit according to claim 12.

14. A method for controlling a front-end three-phase three-level T-type power factor correction (PFC) circuit according to claim 13, wherein the rectified voltage space vector is synthesized by a switching space vector graph with primary capacitor bank midpoint voltage control using a modified SVPWM.

15. The method further includes determining a first nearest neighbor vector, a second nearest neighbor vector, a third nearest neighbor vector, and a fourth nearest neighbor vector. In the switching space vector graph, the primary capacitor bank midpoint charging current i has opposite signs depending on two of the first, second, third, or fourth nearest neighbor vectors, which have an intermediate length. o This occurs A method for controlling a front-end three-phase three-level T-type power factor correction (PFC) circuit according to claim 13.

16. A method for controlling a front-end three-phase three-level T-type power factor correction (PFC) circuit according to claim 15, wherein two nearest neighbor vectors having opposite signs are used to calculate a combined nearest neighbor vector.

17. A method for controlling a front-end three-phase three-level T-type power factor correction (PFC) circuit according to claim 16, wherein a standard nearest-neighbor three-vector PWM synthesis is performed on the combined nearest-neighbor vector and two other nearest-neighbor vectors.

18. A method for controlling a front-end three-phase three-level T-type power factor correction (PFC) circuit according to claim 13, wherein the rectified voltage space vector is synthesized by a variable amplitude double-carrier sinusoidal triangular wave PWM using primary capacitor bank midpoint voltage control.

19. The above method further modifies the carrier amplitude to address mismatch in the primary capacitor bank voltage distribution. [Math 1] This includes forming multiple variable amplitude dual carrier waveforms by modulating them, The positive and negative carrier waves have amplitudes that reflect the ongoing DC bus voltage distribution between the primary high-side capacitor and the primary low-side capacitor. A method for controlling a front-end three-phase three-level T-type power factor correction (PFC) circuit according to claim 18.

20. A method for controlling a front-end three-phase three-level T-type power factor correction (PFC) circuit according to claim 13, further comprising a modified SVPWM and an associated variable amplitude double-carrier sinusoidal triangular wave PWM to operate the front-end three-phase three-level T-type PFC circuit so that distortion of the input phase current due to capacitor midpoint voltage deviation is removed.

21. The above method further uses an inverse Clarke transform to further control the primary capacitor bank midpoint voltage parameter [Math 2] By incorporating a common-mode voltage that realizes the rectified voltage space vector [Math 3] via the phase leg rectification voltage command [Math 4] A method for controlling a front-end three-phase three-level T-type power factor correction (PFC) circuit according to claim 13, comprising forming a [specific component].

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