Integrated dipole regions for transistors.

Abstract

Methods for fabricating and processing semiconductor devices (i.e., electronic devices) are described. Embodiments of the present disclosure advantageously provide electronic devices that include a dipole region and meet requirements for thinning and low thermal budget. The electronic devices described herein include a source region, a drain region, and a channel separating the source and drain regions, an interface layer on top of the channel, a high-k dielectric layer on the interface layer, a dipole layer on the high-k dielectric layer, and optionally, a cap layer on the dipole layer. In some embodiments, the methods include annealing the substrate to transfer atoms from the dipole layer to one or more of the interface layer or the high-k dielectric layer.

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