Electronic devices with reduced ohmic-to-ohmic dimensions

JP2025527676APending Publication Date: 2025-08-22WOLFSPEED INC
View PDF 10 Cites 0 Cited by

Patent Information

Application Number
JP2025511537
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-08-23
Filing Date
2023-08-22
Publication Date
2025-08-22

Smart Images

  • Figure 2025527676000001_ABST
    Figure 2025527676000001_ABST
Patent Text Reader

Abstract

A method for forming an ohmic contact on a semiconductor layer includes forming a silicon ohmic contact precursor on the semiconductor layer, depositing a layer of metal on the semiconductor layer including the silicon ohmic contact precursor, reacting the silicon ohmic contact precursor with the layer of metal to form a metal silicide ohmic contact on the semiconductor layer, and selectively removing the layer of metal from the semiconductor layer without removing the metal silicide contact from the semiconductor layer.
Need to check novelty before this filing date? Find Prior Art

Citation Information

Patent Citations

  • Electrode forming method

    JP1994061180A

  • Semiconductor device and manufacturing method therefor

    JP2003332259A

  • Semiconductor device

    JP2008085218A

  • Scalable quantum well device and method of manufacturing the same

    JP2010010663A

  • Semiconductor device and method of manufacturing the same

    JP2011165763A