MOSFET termination structure

Abstract

Shielded gate semiconductor devices for use in high-power applications such as electric vehicles and industrial applications are disclosed. The devices are formed as mesa (106) / trench (400) structures with shield gate electrodes formed within the trenches. Various trench structures (400, 500, 600, 700) are presented, including tapered sections (401) and end tabs (502, 602, 702, 802) that can be useful for managing the distribution of charge and associated electric fields. The tapered trench (400) can be used to increase and stabilize the breakdown voltage in the termination region (104) of the semiconductor die (100).

Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This patent application claims the benefit of U.S. Provisional Patent Application No. 63 / 375,072, filed September 9, 2022, entitled "Termination Structures for MOSFETs," and U.S. Provisional Patent Application No. 63 / 579,448, filed August 29, 2023, entitled "Tapered Trench Termination Structure for Gate Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET)," both of which are incorporated herein by reference in their entireties.

[0002] This specification relates to power semiconductor devices, and more particularly to termination structures for shielded gate metal oxide semiconductor field effect transistors (MOSFETs). [Background technology]

[0003] Semiconductor device assemblies, e.g., chip assemblies, including high-power semiconductor devices can be used in a variety of applications, such as electric vehicles (EVs), hybrid electric vehicles (HEVs), and industrial applications. High-power modules can operate at voltages exceeding 100 V, for example, and can carry large currents, e.g., 200 A, as opposed to computer applications, which operate at voltages ranging from about 1 V to about 15 V. Power transistors can include, for example, insulated-gate bipolar transistors (IGBTs), shielded-gate metal-oxide-semiconductor field-effect transistors (shielded-gate MOSFETs), and double-diffused metal-oxide-semiconductor (DMOS) devices. Some shielded-gate MOSFETs can be formed in silicon carbide (SiC) substrates. Summary of the Invention

[0004] In some aspects, the techniques described herein relate to an apparatus that includes a trench having a first portion in an active region and a second portion in a termination region, the trench having a vertical depth in a semiconductor substrate and having a longitudinal axis extending from within the active region into the termination region; a dielectric lining disposed in the trench; and a conductive electrode disposed in the trench above the dielectric lining, the conductive electrode having a uniform shape in the first portion and a tapered shape in the second portion along the longitudinal axis.

[0005] In some aspects, the techniques described herein relate to a device further including a tab intersecting an end of the second portion, the tab extending in a direction transverse to the longitudinal axis.

[0006] In some aspects, the techniques described herein relate to a device wherein the tabs are substantially symmetrical about the longitudinal axis.

[0007] In some aspects, the techniques described herein relate to an apparatus, wherein the conductive electrode comprises polysilicon.

[0008] In some aspects, the techniques described herein relate to an apparatus, wherein the semiconductor substrate comprises silicon carbide.

[0009] In some aspects, the techniques described herein relate to devices that are shielded structures for shielded metal oxide semiconductor field effect transistors.

[0010] In some aspects, the techniques described herein relate to a device that includes a substrate having a diffusion region formed therein, a source in the diffusion region, a drain in the diffusion region, and a shield structure formed in a trench in the substrate, the trench having a dielectric liner, the shield structure extending from within the diffusion region and tapering to a termination.

[0011] In some aspects, the techniques described herein relate to a device, where the termination is a point.

[0012] In some aspects, the techniques described herein relate to a device, wherein the termination includes at least one of a tab, an extension, and a reverse taper.

[0013] In some aspects, the techniques described herein relate to a device where the termination includes a tab extending in a direction perpendicular to the trench.

[0014] In some aspects, the techniques described herein relate to a device where the aspect ratio characterizing the maximum width of the shield structure at the diffusion region and the minimum width of the shield structure at the termination is about 3:1.

[0015] In some aspects, the techniques described herein relate to a device, wherein a first side of the shielding structure is tapered and a second side opposite the first side is straight.

[0016] In some aspects, the techniques described herein relate to a structure in a substrate, the structure including a central shield structure, a first shield structure adjacent to one side of the central shield structure, and a second shield structure adjacent to an opposite side of the central shield structure, wherein the central shield structure is not tapered, the first shield structure has a tapered first side, and the second shield structure has a tapered second side.

[0017] In some aspects, the techniques described herein relate to a structure, where a first shield structure includes a first end tab extending laterally outward from a tapered first side, and a second shield structure includes a second end tab extending laterally outward from a tapered second side.

[0018] In some aspects, the techniques described herein relate to a structure wherein the first end tab and the second end tab have rounded corners.

[0019] In some aspects, the techniques described herein relate to a structure, wherein each of the central shield structure, the first shield structure, and the second shield structure extends into the substrate to a predetermined depth.

[0020] In some aspects, the techniques described herein relate to a structure where the predetermined depth varies along the length of the shield structure.

[0021] In some embodiments, the techniques described herein relate to structures where the predetermined depth ranges from about 1.0 μm to about 15.0 μm.

[0022] In some aspects, the techniques described herein relate to a structure, wherein the first shield structure and the second shield structure each have a minimum depth that coincides with the maximum taper.

[0023] In some embodiments, the techniques described herein relate to structures, wherein each of the shielding structures has a width ranging from about 0.1 μm to about 1.0 μm. [Brief explanation of the drawings]

[0024] [Figure 1A] FIG. 1B is a top view of an array of shielded gate MOSFET electrodes formed in tapered trenches according to an implementation of the present disclosure. [Figure 1B] FIG. 10 is a perspective view of a mesa structure formed between two adjacent tapered trenches according to an implementation of the present disclosure. [Figure 2A] 1A and 1B are diagrams of a surface gate electrode formed in a tapered trench according to an implementation of the present disclosure. [Figure 2B] 1A and 1B are diagrams of a surface gate electrode formed in a tapered trench according to an implementation of the present disclosure. [Figure 2C] 1A and 1B are diagrams of a surface gate electrode formed in a tapered trench according to an implementation of the present disclosure. [Figure 2D] 1A and 1B are diagrams of a surface gate electrode formed in a tapered trench according to an implementation of the present disclosure. [Figure 3A] 1A and 1B are diagrams of a buried gate electrode formed in a tapered trench according to an implementation of the present disclosure. [Figure 3B] 1A and 1B are diagrams of a buried gate electrode formed in a tapered trench according to an implementation of the present disclosure. [Figure 3C] 1A and 1B are diagrams of a buried gate electrode formed in a tapered trench according to an implementation of the present disclosure. [Figure 4A] 10 illustrates a shield electrode formed in a trench that tapers to a point, according to an implementation of the present disclosure. [Figure 4B] 10 illustrates a shield electrode formed in a trench that tapers to a point, according to an implementation of the present disclosure. [Figure 4C] 10 illustrates a shield electrode formed in a trench that tapers to a point, according to an implementation of the present disclosure. [Figure 4D] 10 illustrates a shield electrode formed in a trench that tapers to a point, according to an implementation of the present disclosure. [Figure 4E] 10 illustrates a shield electrode formed in a trench that tapers to a point, according to an implementation of the present disclosure. [Figure 4F] 10 illustrates a shield electrode formed in a trench that tapers to a point, according to an implementation of the present disclosure. [Figure 5A] 10 illustrates a shield electrode formed in a trench that tapers toward a tab, according to an implementation of the present disclosure. [Figure 5B] 10 illustrates a shield electrode formed in a trench that tapers toward a tab, according to an implementation of the present disclosure. [Figure 5C] 10 illustrates a shield electrode formed in a trench that tapers toward a tab, according to an implementation of the present disclosure. [Figure 5D] 10 illustrates a shield electrode formed in a trench that tapers toward a tab, according to an implementation of the present disclosure. [Figure 5E] 10 illustrates a shield electrode formed in a trench that tapers toward a tab, according to an implementation of the present disclosure. [Figure 5F] 10 illustrates a shield electrode formed in a trench that tapers toward a tab, according to an implementation of the present disclosure. [Figure 6A] 10 illustrates a shield electrode formed in a trench that tapers toward a narrow region and a tab, according to an implementation of the present disclosure. [Figure 6B] 10 illustrates a shield electrode formed in a trench that tapers toward a narrow region and a tab, according to an implementation of the present disclosure. [Figure 6C] 10 illustrates a shield electrode formed in a trench that tapers toward a narrow region and a tab, according to an implementation of the present disclosure. [Figure 6D] 10 illustrates a shield electrode formed in a trench that tapers toward a narrow region and a tab, according to an implementation of the present disclosure. [Figure 6E] 10 illustrates a shield electrode formed in a trench that tapers toward a narrow region and a tab, according to an implementation of the present disclosure. [Figure 6F] 10 illustrates a shield electrode formed in a trench that tapers toward a narrow region and a tab, according to an implementation of the present disclosure. [Figure 7A] 10 illustrates a shield electrode formed in a trench with a double taper according to an implementation of the present disclosure. [Figure 7B] 10 illustrates a shield electrode formed in a trench with a double taper according to an implementation of the present disclosure. [Figure 7C] 10 illustrates a shield electrode formed in a trench with a double taper according to an implementation of the present disclosure. [Figure 7D] 10 illustrates a shield electrode formed in a trench with a double taper according to an implementation of the present disclosure. [Figure 7E] 10 illustrates a shield electrode formed in a trench with a double taper according to an implementation of the present disclosure. [Figure 7F] 10 illustrates a shield electrode formed in a trench with a double taper according to an implementation of the present disclosure. [Figure 8A] 10 illustrates a shield electrode formed in a trench that tapers toward the tub and oxide trench, according to an implementation of the present disclosure. [Figure 8B] 10 illustrates a shield electrode formed in a trench that tapers toward the tub and oxide trench, according to an implementation of the present disclosure. [Figure 8C] 10 illustrates a shield electrode formed in a trench that tapers toward the tub and oxide trench, according to an implementation of the present disclosure. [Figure 8D] 10 illustrates a shield electrode formed in a trench that tapers toward the tub and oxide trench, according to an implementation of the present disclosure. [Figure 8E] 10 illustrates a shield electrode formed in a trench that tapers toward the tub and oxide trench, according to an implementation of the present disclosure. [Figure 8F] 10 illustrates a shield electrode formed in a trench that tapers toward the tub and oxide trench, according to an implementation of the present disclosure. [Figure 8G]10 illustrates a shield electrode formed in a trench that tapers toward the tub and oxide trench, according to an implementation of the present disclosure. [Figure 9A] 10 illustrates a shield electrode formed in a trench having a single-sided taper with a single-sided tab according to an implementation of the present disclosure. [Figure 9B] 10 illustrates a shield electrode formed in a trench having a single-sided taper with a single-sided tab according to an implementation of the present disclosure. [Figure 9C] 10 illustrates a shield electrode formed in a trench having a single-sided taper with a single-sided tab according to an implementation of the present disclosure. [Figure 9D] 10 illustrates a shield electrode formed in a trench having a single-sided taper with a single-sided tab according to an implementation of the present disclosure. [Figure 9E] 10 illustrates a shield electrode formed in a trench having a single-sided taper with a single-sided tab according to an implementation of the present disclosure. [Figure 9F] 10 illustrates a shield electrode formed in a trench having a single-sided taper with a single-sided tab according to an implementation of the present disclosure. [Figure 9G] 10 illustrates a shield electrode formed in a trench having a single-sided taper with a single-sided tab according to an implementation of the present disclosure. [Figure 10] 1 is a plot of breakdown voltage as a function of trench design according to implementations of the present disclosure. [Figure 11] FIG. 2 illustrates a cross-sectional view of a shielded gate MOSFET in an active area of ​​a semiconductor die according to an implementation of the present disclosure.

[0025] Aspects of the present disclosure are best understood from the following detailed description when read in conjunction with the accompanying drawings. It should be noted that, according to common practice in the industry, various features have not necessarily been drawn to scale. Dimensions of various features may be arbitrarily increased or decreased for clarity of illustration. In the drawings, the same reference numbers in different views may indicate the same and / or similar components (elements, structures, etc.). The drawings generally illustrate various implementations discussed in the present disclosure, by way of example, and not by way of limitation. Reference numbers shown in one drawing may not be repeated for the same and / or similar elements in associated figures. Reference numbers repeated in multiple drawings may not be specifically discussed with respect to each of those drawings, but are provided for context between the associated figures. Also, when multiple examples of an element are shown, not all of the same elements in the drawings are specifically referred to with a single reference number. DETAILED DESCRIPTION OF THE INVENTION

[0026] Power semiconductor devices, such as shielded gate MOSFETs and IGBTs, are realized by a semiconductor die having an active region in which an array of semiconductor mesa structures (e.g., mesas) alternates with trench structures (e.g., trenches). Such mesa / trench structures may be formed on the top surface of the semiconductor die. The active region may be a diffusion region containing dopants. An array of parallel shield gate electrodes may be formed in the trenches by lining the trenches with an insulator, e.g., a dielectric material, and then filling the trenches with a conductive material (e.g., polysilicon or metal). Meanwhile, other elements of the power device, such as body regions, source regions, drain regions, heavy body regions, collector regions, emitter regions, and base regions, may be located between the trenches and formed within the mesas defined by the trenches. The shield gate electrodes may be electrically coupled to an energy source of the power device, e.g., a source potential of a power IGBT or power MOSFET.

[0027] An array of such devices may include hundreds or thousands of elongated mesas and shield gate electrodes (e.g., filled trenches) supporting high voltages, for example, up to about 250 V. The devices may have an on-state, in which a desired current flows through the device, an off-state, in which current flow is substantially blocked within the device, and a breakdown state, in which excessive off-state voltage is applied between the electrodes of the device, causing undesired current to flow. The voltage at which breakdown is initiated is called the breakdown voltage. The configuration of the mesas and trenches may result in various trade-offs between achieving desired on-state characteristics, a relatively high breakdown voltage, and desired switching characteristics.

[0028] The semiconductor die may also include a termination region or field termination region disposed around or adjacent to the active region. In some implementations, the termination region is adjacent to the active region. In some implementations, the termination region partially or completely surrounds the active region. An electrode (e.g., a shield electrode from the active region) may extend into the termination region to form a termination structure (e.g., a shield structure). In some implementations, the shield electrode may be coupled to a source terminal. In some implementations, the shield electrode may be coupled to a gate terminal. In some implementations, a higher breakdown voltage is desirable in the termination region than in the active region.

[0029] One problem that arises in the termination region is that charge can accumulate at the edge of the shield gate electrode, creating a large electric field. The termination structure may be designed to reduce or minimize the electric field around the active region and may not be configured to conduct current during operation of a power semiconductor device implemented in the active region. The electric field in the termination region can be modified or controlled by changing the material and / or the shape and dimensions of the termination structure. By controlling the electric field strength in the termination region, voltage breakdown can be avoided. Therefore, a high breakdown voltage, i.e., voltage rating, of the device can be achieved, or at least supported, by the effectiveness of such termination structures.

[0030] In the termination region, various breakdown processes can occur that can significantly reduce the breakdown voltage (holding voltage, voltage rating) and thus impair the associated power device. For example, a charge balance difference (e.g., a large imbalance between the charge available at the surface of the mesa in the termination region and the charge available at the bottom of the mesa in the termination region) can affect such breakdown voltage. For example, if the amount of charge available at the surface of the mesa is significantly less (e.g., by an order of magnitude or more) than the amount of charge available at the bottom of the mesa, the resulting charge imbalance can cause rapid depletion of the termination region at the semiconductor mesa surface when the associated power device is in the off state. This rapid depletion can cause the depletion field from the active region to extend to, nearly to, or beyond the edge of the termination structure (e.g., beyond the edge of the shield electrode-filled trench in the termination region) at voltages lower than the desired breakdown voltage of the power semiconductor device. Such rapid depletion can result in breakdown processes (e.g., due to impact ionization) occurring in the termination region, resulting in a reduction in the breakdown voltage (holding voltage, voltage rating, etc.) of the associated power device below a desired level.

[0031] Several factors can affect charge balance in such power devices. For example, certain design features and processing characteristics can be implemented to improve device performance by affecting charge balance in the termination region. For example, as discussed above, trench spacing (resulting in a reduction in mesa width) and the use of retrograde doping within semiconductor regions, e.g., by the epitaxial semiconductor layer in which the trenches and mesas are defined, can increase such charge imbalance, e.g., by causing a greater imbalance between the top and bottom of a given semiconductor mesa. The use of retrogradely doped semiconductor material (e.g., an epitaxial silicon layer) can result in an associated mesa having a lower doping at its top (e.g., at and / or near its top surface) than at its base (e.g., at and / or near the bottom of the trench defining the mesa). Furthermore, the formation of trenches with sloping sidewalls (e.g., with a vertical taper) creates mesas that are narrower at their tops than at their bases. This variation in width between the top of the mesa and the base of the mesa can further increase the charge imbalance from the top of the mesa to the bottom of the mesa.

[0032] Modifying the mask design of the gate electrodes / trench in the termination region can prevent the breakdown process from occurring below the desired breakdown voltage of the associated power semiconductor device. For example, increasing the spacing between adjacent gate electrodes can reduce the likelihood of breakdown. One advantage of this approach over modifying the mesa doping profile is that modifications to the dopant implantation process are avoided. One way to increase the spacing between gate electrodes in the termination region is to taper the electrode width by horizontally tapering the trench structure that defines the electrode width. However, when the trench tapers to a point, the electric field concentrates at the tip of the electrode. Introducing a tub structure at the end of the gate electrode can mitigate this effect.

[0033] 1A is a top view of a semiconductor die 100 with a shielded gate MOSFET device formed in a substrate in accordance with some implementations of the present disclosure. The semiconductor die 100 includes an active region 102 and a termination region 104, and a boundary 103 separating the active region 102 from the termination region 104.

[0034] An array of mesa / trench structures extends from the active region 102 into the termination region 104. The array of mesa / trench structures includes multiple mesas 106 interleaved with shield electrodes 108. In some implementations, the array is characterized by a pitch, e.g., center-to-center electrode distance, of about 2 microns within a die having a length ranging from several thousand microns to about 10,000 microns. The active region 102 can be a doped region, e.g., a p-well or n-well region, and the mesas 106 within the doped region function as source / drain regions for shielded gate MOSFET devices. Examples of such devices disposed within the active region 102 are shown and described with reference to FIG. 11 . The doping profiles within the mesas 106 in the active region 102 and termination region 104 can be designed to optimize charge distribution to achieve various device operating specifications. In some implementations, the dopant concentration within the mesas 106 is about 1.0×10 in the active region. 15 cm -3 ~Approx. 1.0×10 18 cm -3 in the terminal region, and is approximately 1.0 × 10 15 cm -3 ~Approx. 1.0×10 18 cm -3 The boundary 103 may be referred to as a body junction. If the active region 102 is, for example, p-doped, the boundary 103 is called a p-body junction.

[0035] The shield electrode 108 may be formed by removing a portion of the doped material in the active region 102 and a portion of the substrate in the termination region 104 to form a trench. The trench may then be lined with an insulating material 110, e.g., a dielectric such as an oxide, and then filled with a conductive material 112, e.g., polysilicon or a metal, to form the shield electrode 108. Thus, the shape and dimensions of the shield electrode 108 are determined by the shape and dimensions of the trench. The shield electrode 108 as shown in FIG. 1A is tapered, i.e., the width of the shield electrode 108 gradually narrows along the y-direction by forming a tapered trench. Tapering the shield electrode 108 tends to concentrate more charge at the tapered end, thus increasing the charge laterally away from the p-body junction at the boundary 103 and creating a more uniform electric field. In some implementations, the width of the shield electrode 108 at the boundary 103 of the active region 102 may range from about 0.1 μm to about 1.0 μm, tapering to a narrow width at the end of the shield electrode 108 in the range from about xxx.0.05 μm to about xxx.0.3 μm. In some implementations, the aspect ratio of the maximum width to the minimum width of the tapered shield electrode 108 may be about 3:1.

[0036] FIG. 1B is a perspective view of a mesa 106 (e.g., one of the mesas shown in FIG. 1A ) according to some implementations of the present disclosure. The mesa 106 extends upward in the z-direction between adjacent parallel trenches. In some implementations, the mesa 106 may be vertically tapered along its height in the z-direction such that the top 114 of the mesa is narrower than the base 116 of the mesa, as shown in FIG. 1B . In some implementations, the height of the mesa 106 ranges from about 1.0 microns to about 20.0 microns. In some implementations, the width of the mesa 106 tapers vertically from about 1.0 μm at the base to about 0.4 μm at the top.

[0037] FIG. 2A reproduces the top view of FIG. 1A to show cross-sectional cuts at different locations along the tapered length (e.g., along the x-axis) of the shield electrode 108 at the surface of the semiconductor die in accordance with some implementations of the present disclosure.

[0038] FIG. 2B is a cross-sectional view along section line B-B′ through a pair of parallel shield electrodes 108 shown in FIG. 2A , according to some implementations of the present disclosure. The cross-sectional view shown in FIG. 2B is at the wide end of a tapered trench in the active region 102 near the body junction at the boundary 103. FIG. 2B shows a substrate 200 and a doped region 202 near a top surface 203 of the substrate 200. In some implementations, the substrate 200 is a silicon substrate. In some implementations, the substrate 200 includes silicon carbide (SiC). In some implementations, the substrate 200 may include an epitaxial layer, such as a layer of episilicon. FIG. 2B also shows insulating material 110 and conductive material 112 within the parallel trenches that form the shield electrodes 108. FIG. 2B shows that in the active region 102, the insulating material 110 lining the trenches has a substantially uniform thickness at the widest portion of the trench. In some implementations, the substantially uniform lining thickness can range from about 0.05 μm to about 1.5 μm, thus maximizing the volume of conductive material 112 within the trench, forming a complete shield electrode 210 that extends nearly to the bottom of the trench at the point along the y-axis closest to the body junction.

[0039] FIG. 2C is a cross-sectional view of a pair of parallel shield electrodes 108 shown in FIG. 2A along section line CC′, in accordance with some implementations of the present disclosure. The cross-sectional view shown in FIG. 2C is taken at a location along the length of a tapered trench in the termination region 104 where the trench has an intermediate width. FIG. 2C shows that at this location in the termination region 104, the thickness of insulating material 110 lining the trench is substantially uniform on the sides, but there is more insulating material 110 at the bottom of the trench, which limits the amount of conductive material 112 that can be deposited in the trench. Thus, the volume of conductive material 112 inside the trench is smaller than the volume of conductive material 112 in the wider trench shown in FIG. 2B, forming a partial shield electrode 220. In some implementations, the thickness of insulating material 110 at the bottom of the trench can range from about 0.05 μm to about 1.5 μm.

[0040] FIG. 2D is a cross-sectional view along section line D-D′ near the tips of a pair of parallel shield electrodes 108 shown in FIG. 2A , according to some implementations of the present disclosure. The cross-sectional view shown in FIG. 2D is a view within the termination region 104 at the narrow end of the tapered trench. FIG. 2D shows that because the trench is so narrow, the insulating material 110 intended to line the trench actually fills the entire trench. As a result, the trench fill is pinched off so that there is no conductive material 112 inside the trench near the tips of the shield electrodes 108, forming an oxide-filled trench 230. In some implementations, the oxide-filled trench 230 can have a width ranging from about 0.1 μm to about 3.0 μm and a depth ranging from about 0.5 μm to about 15 μm.

[0041] FIG. 3A shows a top view with cross-sectional cuts at different positions along the tapered length (e.g., along the x-axis) of a shield electrode 108 that is recessed below the top surface of a semiconductor die in accordance with some implementations of the present disclosure.

[0042] FIG. 3B is a cross-sectional view of a pair of parallel shield electrodes 108 shown in FIG. 3A along section line B-B', in accordance with some implementations of the present disclosure. The cross-section shown in FIG. 3B is at a location along the length of a tapered trench in termination region 104 where the trench has an intermediate width. Similar to section C-C' shown in FIG. 2C, FIG. 3B shows that at this location in termination region 104, the thickness of insulating material 110 lining the trench is substantially uniform on the sides, but there is more insulating material 110 at the bottom of the trench, which limits the amount of conductive material 112 that can be deposited in the trench. However, in the implementation shown in FIG. 3B, the conductive material 112 is recessed away from top surface 203, and the top of the trench is filled with insulating material 110. Thus, the volume of conductive material 112 within the trench is smaller than the volume of conductive material 112 in the wider trench shown in FIG. 2B, forming a recessed partial shield electrode 310. In some implementations, the length of the embedded conductive material 112 can range from about 0.2 μm to about 2.0 μm.

[0043] FIG. 3C is a cross-sectional view of a pair of parallel shield electrodes 108 shown in FIG. 3A along section line C-C', according to some implementations of the present disclosure. The cross-section shown in FIG. 3C is taken at a location along the length of the tapered trench in the termination region 104 that is more tapered than the location along line B-B', but where the trench still has an intermediate width. FIG. 3C shows that the trench width is so narrow that the insulating material 110 intended to line the trench actually fills the entire trench. As a result, the trench fill is pinched off so that no conductive material 112 is present inside the trench near the tip of the shield electrode 108, forming an oxide-filled trench 320. In some implementations, the oxide-filled trench 320 can have a width ranging from about 0.1 μm to about 3.0 μm and a depth ranging from about 0.5 μm to about 17 μm.

[0044] 4A-9G illustrate implementations of different tapered trench designs with various features for shaping the charge distribution and associated electric fields in the termination region. It is apparent in FIGS. 4A-9G that in some implementations, a predetermined trench depth, as seen in the corresponding cross-sectional view, is defined by modifying the trench pattern, as seen in the top view of the shield electrode 108. For example, tapering the trench width can result in a shallower trench depth. This effect can result from one or more constraints or interactions within the manufacturing process, for example, within the patterning (e.g., etching) process or within the deposition process used to fill the trench.

[0045] 4A-4F are diagrams of tapered trenches 400 according to some implementations of the present disclosure. Tapered trenches 400 (e.g., filled tapered trenches that function as shield electrodes 108) may represent a larger array of multiple tapered trench structures. In the implementations shown in FIGS. 4A-4F, each tapered trench 400 has a tapered section 401 that tapers toward a point 402, thus increasing trench spacing and reducing the probability of breakdown due to rapid depletion at the mesa surface from the active region, resulting in high electric fields at the edges of the shield electrodes 108. However, one drawback of the tapered section 401 shown in FIGS. 4A-4F is that the point 402 tends to concentrate charge, creating high electric fields near the trench bottom and potentially presenting injection points, e.g., charge injection points, at the edges of the trench. Alternative implementations shown in Figures 5A-9G and described below can mitigate this effect while retaining the benefits of tapered trenches.

[0046] FIG. 4A is a top view of a group of three tapered trenches 400 according to some implementations of the present disclosure. FIG. 4A shows the active region 102 and the termination region 104. The central tapered trench in FIG. 4A shows cross-sectional cuts at different locations along the tapered length of the central shield electrode 108 (e.g., along the x-axis). The cut lines correspond to the cross-sectional views shown in FIGS. 4B, 4C, 4D, and 4E. For example, cut line B-B' corresponds to the cross-sectional view shown in FIG. 4B, cut line C-C' corresponds to the cross-sectional view shown in FIG. 4C, and so on. Cut line F-F' corresponds to the longitudinal cross-sectional view shown in FIG. 4F, where cut line F-F' is aligned with the longitudinal axis of the tapered trench and other cut lines, e.g., transverse cut lines, are aligned perpendicular to the longitudinal axis.

[0047] FIG. 4B is a cross-sectional view of the central tapered trench shown in FIG. 4A along section line B-B', according to some implementations of the present disclosure. The cross-sectional view shown in FIG. 4B is a view within the active region 102 at the wide end of the tapered trench. FIG. 4B shows the substrate 200 and the doped region 202 near the top surface 203 of the substrate 200. In some implementations, the doped region 202 within the active region 102 can be a p-well. In some implementations, the substrate 200 can include an epitaxial layer, for example, a layer of n-type epi silicon. FIG. 4B also shows the insulating material 110 and the conductive material 112 within the parallel trenches that form the shield electrode 108. FIG. 4B shows that at the widest portion of the tapered trench within the active region 102, the insulating material 110 lining the trench has a substantially uniform thickness. In some implementations, the substantially uniform lining thickness can range from about 0.05 μm to about 1.5 μm. Therefore, the volume of conductive material 112 inside the trench is maximized, forming a complete shield electrode that extends almost to the bottom of the trench. Thus, the internal structure of the tapered trench at the wide end as shown in Figure 4B is similar to the example shown in Figure 2B.

[0048] 4C is a cross-sectional view of the central tapered trench shown in FIG. 4A along section line CC', in accordance with some implementations of the present disclosure. Section line CC' is located outside active region 102, in termination region 104, but still coincides with the widest portion of the tapered trench. Thus, the cross-section shown in FIG. 4C shows a complete shield electrode 410 similar to the cross-section shown in FIG. 4B, except that doped region 202 is not present in FIG. 4C.

[0049] FIG. 4D is a cross-sectional view of the central tapered trench shown in FIG. 4A along section line D-D′, according to some implementations of the present disclosure. Section line D-D′ coincides with the tip of the tapered trench. FIG. 4D shows that at this location in the termination region 104, the insulating material 110 lining the trench has a substantially uniform thickness on the sides, but there is more insulating material 110 at the bottom of the trench, which limits the amount of conductive material 112 that can be deposited in the trench. Thus, the volume of conductive material 112 inside the trench is smaller than the volume of conductive material 112 in the wider trench portion shown in FIGS. 4B and 4C , forming a partial shield electrode 420. In some implementations, the thickness of the insulating material 110, e.g., shield oxide, at the bottom of the trench can vary based on the trench critical dimension (CD) and / or oxide thickness variations that occur in the oxide liner growth or deposition process. The oxide thickness variations can cause instability in the breakdown voltage.

[0050] FIG. 4E is a cross-sectional view of the central tapered trench shown in FIG. 4A along section line E-E', in accordance with some implementations of the present disclosure. Section line E-E' coincides with the oxide beyond the tip of the tapered trench in pinch-off region 404, which extends from point 402 to the end of the trench. FIG. 4E shows that the insulating material 110 intended to line the trench actually fills the entire trench within pinch-off region 404. As a result, no conductive material 112 is present inside the trench beyond the tip of shield electrode 108, forming oxide-filled trench 430. In some implementations, oxide-filled trench 430 can have a width ranging from about 0.1 μm to about 3.0 μm and a depth ranging from about 0.5 μm to about 17.0 μm. In some implementations, pinch-off region 404 can vary significantly between parallel trenches.

[0051] 4F is a cross-sectional view along section line F-F' according to some implementations of the present disclosure. Section line F-F' is aligned along the x-axis with the length of the central tapered trench shown in FIG. 4A. FIG. 4F shows the trench depth gradually decreasing along the taper until the shield electrode 108 is pinched off on the right side of FIG. 4F at point 402. The remainder of the trench structure in the pinch-off region 404 is filled with insulating material 110.

[0052] 5A-5F are diagrams of a tapered trench 500 according to some implementations of the present disclosure. The tapered trench 500 (e.g., a filled tapered trench that functions as a shield electrode 108) may represent a larger array of multiple tapered trench structures. In the implementations shown in FIGS. 5A-5F, each trench tapers toward a tab 502. The tab 502 intersects the trench end, providing wider trench ends that reduce the electric field strength at the trench end, thereby increasing the breakdown voltage. In some implementations, the tab 502 reduces the likelihood of an injection point at the end of the tapered trench. The tab 502 may also be more easily reproduced than a point, and the tab 502 may reduce the variability in the length of the tapered trench.

[0053] FIG. 5A is a top view of a group of three tapered trenches 500 according to some implementations of the present disclosure. FIG. 5A shows the active region 102 and the termination region 104. The central tapered trench in FIG. 5A shows cross-sectional cuts at different locations along the tapered length of the central shield electrode 108 (e.g., along the x-axis). The cut lines correspond to the cross-sectional views shown in FIGS. 5B, 5C, 5D, and 5E. For example, cut line B-B' corresponds to the cross-sectional view shown in FIG. 5B, cut line C-C' corresponds to the cross-sectional view shown in FIG. 5C, and so on. Cut line F-F' corresponds to the longitudinal cross-sectional view shown in FIG. 5F, where cut line F-F' is aligned with the longitudinal axis of the tapered trench and other cut lines, e.g., transverse cut lines, are aligned perpendicular to the longitudinal axis.

[0054] FIG. 5B is a cross-sectional view of the central tapered trench shown in FIG. 5A along section line B-B', according to some implementations of the present disclosure. The cross-sectional view shown in FIG. 5B is a view within the active region 102 at the wide end of the tapered trench. FIG. 5B shows the substrate 200 and the doped region 202 near the top surface 203 of the substrate 200. In some implementations, the doped region 202 within the active region 102 can be a p-well. In some implementations, the substrate 200 can include an epitaxial layer, for example, a layer of n-type epi silicon. FIG. 5B also shows the insulating material 110 and the conductive material 112 within the parallel trenches that form the shield electrode 108. FIG. 5B shows that at the widest portion of the tapered trench within the active region 102, the insulating material 110 lining the trench has a substantially uniform thickness. In some implementations, the substantially uniform lining thickness can range from 0.05 μm to about 1.5 μm. Therefore, the volume of conductive material 112 inside the trench is maximized, forming a complete shield electrode that extends almost to the bottom of the trench. Thus, the internal structure of the tapered trench at the wide end as shown in Figure 5B is similar to the example shown in Figure 2B.

[0055] 5C is a cross-sectional view of the central tapered trench shown in FIG. 5A along section line CC', in accordance with some implementations of the present disclosure. Section line CC' is located outside active region 102, in termination region 104, but still coincides with the widest portion of the tapered trench. Thus, the cross-sectional view shown in FIG. 5C shows a complete shield electrode 410 similar to the cross-sectional view shown in FIG. 5B, except that doped region 202 is absent from FIG. 5C.

[0056] FIG. 5D is a cross-sectional view of the central tapered trench shown in FIG. 5A along section line D-D′, according to some implementations of the present disclosure. Section line D-D′ coincides with the narrow end of the tapered trench. FIG. 5D shows that at this location in the termination region 104, the trench is not as deep as the trench in the tapered region. Thus, the volume of conductive material 112 inside the trench is smaller than the volume of conductive material 112 in the deeper trench portions shown in FIGS. 5B and 5C, forming a partial shield electrode 520. In some implementations, the thickness of the insulating material 110, e.g., the shield oxide, at the bottom of the trench exhibits less variation than in some other implementations. Less variation in oxide thickness can result in a more stable breakdown voltage.

[0057] 5E is a cross-sectional view of the central tapered trench shown in FIG. 5A along section line E-E', according to some implementations of the present disclosure. Section line E-E' coincides with tab 502, restoring the width of the tapered trench and forming complete shield electrode 530. Tab 502 is substantially symmetrical about the longitudinal axis of the tapered trench. In some implementations, complete shield electrode 530 can have a width ranging from about 0.10 μm to about 1.0 μm and a depth ranging from about 1.0 μm to about 15.0 μm.

[0058] 5F is a cross-sectional view along section line F-F' in accordance with some implementations of the present disclosure. Section line F-F' is aligned with the length of the central tapered trench shown in FIG. 5A. FIG. 5F shows the depth of the trench gradually decreasing along the taper until tab 502 increases the corresponding depth of the shield electrode 108.

[0059] 6A-6F are diagrams of a tapered trench 600 according to some implementations of the present disclosure. Tapered trench 600 (e.g., a filled tapered trench that functions as shield electrode 108) may represent a larger array of multiple tapered trench structures. In the implementation shown in FIGS. 6A-6F, each trench tapers toward extension 601 and tab 602. Extension 601 maintains a uniform narrow width at the tapered end of the trench, which may assist in distributing charge and maintaining a high breakdown voltage.

[0060] FIG. 6A is a top view of a group of three tapered trenches 600 according to some implementations of the present disclosure. FIG. 6A shows the active region 102 and the termination region 104. The central tapered trench in FIG. 6A shows cross-sectional cuts at different locations along the tapered length of the central shield electrode 108 (e.g., along the x-axis). The cut lines correspond to the cross-sectional views shown in FIGS. 6B, 6C, 6D, and 6E. For example, cut line B-B' corresponds to the cross-sectional view shown in FIG. 6B, cut line C-C' corresponds to the cross-sectional view shown in FIG. 6C, and so on. Cut line F-F' corresponds to the longitudinal cross-sectional view shown in FIG. 6F, where cut line F-F' is aligned with the longitudinal axis of the tapered trench and other cut lines, e.g., transverse cut lines, are aligned perpendicular to the longitudinal axis.

[0061] FIG. 6B is a cross-sectional view of the central tapered trench shown in FIG. 6A along section line B-B', according to some implementations of the present disclosure. The cross-sectional view shown in FIG. 6B is a view within the active region 102 at the wide end of the tapered trench. FIG. 6B shows the substrate 200 and the doped region 202 near the top surface 203 of the substrate 200. In some implementations, the doped region 202 within the active region 102 can be a p-well. In some implementations, the substrate 200 can include an epitaxial layer, for example, a layer of n-type epi silicon. FIG. 6B also shows the insulating material 110 and the conductive material 112 within the parallel trenches that form the shield electrode 108. FIG. 6B shows that at the widest portion of the tapered trench within the active region 102, the insulating material 110 lining the trench has a substantially uniform thickness. In some implementations, the substantially uniform lining thickness can range from about 0.05 μm to about 1.5 μm. Therefore, the volume of conductive material 112 inside the trench is maximized, forming a complete shield electrode that extends almost to the bottom of the trench. Thus, the internal structure of the tapered trench at the wide end as shown in Figure 6B is similar to the example shown in Figure 2B.

[0062] 6C is a cross-sectional view of the central tapered trench shown in FIG. 6A along section line CC', in accordance with some implementations of the present disclosure. Section line CC' is located outside active region 102, in termination region 104, but still coincides with the widest portion of the tapered trench. Thus, the cross-sectional view shown in FIG. 6C shows a complete shield electrode 610 similar to the cross-sectional view shown in FIG. 6B, except that doped region 202 is absent from FIG. 6C.

[0063] FIG. 6D is a cross-sectional view of the central tapered trench shown in FIG. 6A along section line D-D′, according to some implementations of the present disclosure. Section line D-D′ coincides with the narrow end of the tapered trench. FIG. 6D shows that at this location in the termination region 104, the trench is not as deep as the trench in the tapered region. Thus, the volume of conductive material 112 inside the trench is smaller than the volume of conductive material 112 in the deeper trench portions shown in FIGS. 6B and 6C, forming a partial shield electrode 620. In some implementations, the thickness of the insulating material 110, e.g., the shield oxide, at the bottom of the trench exhibits less variation than in some other implementations. Less variation in oxide thickness can result in a more stable breakdown voltage.

[0064] 6E is a cross-sectional view of the central tapered trench shown in FIG. 6A along section line E-E', according to some implementations of the present disclosure. Section line E-E' coincides with tab 602, restoring the width of the tapered trench to form complete shield electrode 630. In some implementations, complete shield electrode 630 can have a width ranging from about 0.1 μm to about 1.0 μm and a depth ranging from about 1.0 μm to about 15.0 μm.

[0065] Figure 6F is a cross-sectional view along section line F-F' according to some implementations of the present disclosure. Section line F-F' is aligned with the length of the central tapered trench shown in Figure 6A. Figure 6F shows that the depth of conductive material 112 gradually decreases along the tapered trench and then flattens out in a region where the trench width is uniformly narrow. Figure 6F further shows that tab 602 increases the corresponding depth of shield electrode 108.

[0066] 7A-7F are diagrams of a tapered trench 700 according to some implementations of the present disclosure. Tapered trench 700 (e.g., a filled tapered trench that functions as shield electrode 108) may represent a larger array of multiple tapered trench structures. In the implementation shown in Figures 7A-7F, each trench tapers toward extension 601 and then widens toward tab 702 with a reverse taper 701, forming a double-ended taper.

[0067] FIG. 7A is a top view of a group of three tapered trenches 700 according to some implementations of the present disclosure. FIG. 7A shows the active region 102 and the termination region 104. The central tapered trench in FIG. 7A shows cross-sectional cuts at different locations along the tapered length of the central shield electrode 108 (e.g., along the x-axis). The cut lines correspond to the cross-sectional views shown in FIGS. 7B, 7C, 7D, and 7E. For example, cut line B-B' corresponds to the cross-sectional view shown in FIG. 7B, cut line C-C' corresponds to the cross-sectional view shown in FIG. 7C, and so on. Cut line F-F' corresponds to the longitudinal cross-sectional view shown in FIG. 7F, where cut line F-F' is aligned with the longitudinal axis of the tapered trench and other cut lines, e.g., transverse cut lines, are aligned perpendicular to the longitudinal axis.

[0068] FIG. 7B is a cross-sectional view of the central tapered trench shown in FIG. 7A along section line B-B', according to some implementations of the present disclosure. The cross-sectional view shown in FIG. 7B is a view within the active region 102 at the wide end of the tapered trench. FIG. 7B shows the substrate 200 and the doped region 202 near the top surface 203 of the substrate 200. In some implementations, the doped region 202 within the active region 102 can be a p-well. In some implementations, the substrate 200 can include an epitaxial layer, for example, a layer of n-type epi silicon. FIG. 7B also shows the insulating material 110 and the conductive material 112 within the parallel trenches that form the shield electrode 108. FIG. 7B shows that at the widest portion of the tapered trench within the active region 102, the insulating material 110 lining the trench has a substantially uniform thickness. In some implementations, the substantially uniform lining thickness can range from about 0.05 μm to about 1.5 μm. Therefore, the volume of conductive material 112 inside the trench is maximized, forming a complete shield electrode that extends almost to the bottom of the trench. Thus, the internal structure of the tapered trench at the wide end as shown in Figure 7B is similar to the example shown in Figure 2B.

[0069] 7C is a cross-sectional view of the central tapered trench shown in FIG. 7A along section line CC', in accordance with some implementations of the present disclosure. Section line CC' is located outside active region 102, in termination region 104, but still coincides with the widest portion of the tapered trench. Thus, the cross-sectional view shown in FIG. 7C shows a complete shield electrode 710 similar to the cross-sectional view shown in FIG. 7B, except that doped region 202 is not present in FIG. 7C.

[0070] FIG. 7D is a cross-sectional view of the central tapered trench shown in FIG. 7A along section line D-D′, according to some implementations of the present disclosure. Section line D-D′ corresponds to the uniformly narrow region of the tapered trench. FIG. 7D shows that at this location in the termination region 104, the trench is not as deep as the trench in the tapered region. Thus, the volume of conductive material 112 inside the trench is smaller than the volume of conductive material 112 in the deeper trench portions shown in FIGS. 7B and 7C, forming a partial shield electrode 720. In some implementations, the thickness of the insulating material 110, e.g., the shield oxide, at the bottom of the trench exhibits less variation than in some other implementations. Less variation in oxide thickness can result in a more consistent breakdown voltage.

[0071] 7E is a cross-sectional view of the central tapered trench shown in FIG. 7A along section line E-E', according to some implementations of the present disclosure. Section line E-E' coincides with tab 702, restoring the width of the tapered trench and forming a complete shield electrode 730. In some implementations, tab 702 has square corners. In some implementations, complete shield electrode 730 can have a width ranging from about 0.1 μm to about 1.0 μm and a depth ranging from about 1.0 μm to about 15.0 μm.

[0072] 7F is a cross-sectional view along section line F-F' according to some implementations of the present disclosure. Section line F-F' is aligned with the length of the central tapered trench shown in FIG. 7A. FIG. 7F shows that the depth of conductive material 112 gradually decreases along the tapered trench and then discontinues at a narrow trench region. The depth then increases again as the trench width expands toward tab 702.

[0073] 8A-8G are diagrams of tapered trenches 800 according to some implementations of the present disclosure. Tapered trenches 800 (e.g., filled tapered trenches that function as shield electrodes 108) may represent a larger array of multiple tapered trench structures. In the implementation shown in FIGS. 8A-8G, each trench tapers to a tab 802, which is connected by an oxide-filled trench 804. The oxide-filled trenches help to further distribute the electrical potential at the ends of the tapered trenches 800.

[0074] FIG. 8A is a top view of a group of three tapered trenches 800 according to some implementations of the present disclosure. FIG. 8A shows the active region 102 and the termination region 104. The central tapered trench in FIG. 8A shows cross-sectional cuts at different locations along the tapered length of the central shield electrode 108 (e.g., along the x-axis). The cut lines correspond to the cross-sectional views shown in FIGS. 8B, 8C, 8D, and 8E. For example, cut line B-B' corresponds to the cross-sectional view shown in FIG. 8B, cut line C-C' corresponds to the cross-sectional view shown in FIG. 8C, and so on. Cut line F-F' corresponds to the longitudinal cross-sectional view shown in FIG. 8F, where cut line F-F' is aligned with the longitudinal axis of the tapered trench and other cut lines, e.g., transverse cut lines, are aligned perpendicular to the longitudinal axis.

[0075] FIG. 8B is a cross-sectional view of the central tapered trench shown in FIG. 8A along section line B-B', according to some implementations of the present disclosure. The cross-sectional view shown in FIG. 8B is a view within the active region 102 at the wide end of the tapered trench. FIG. 8B shows the substrate 200 and the doped region 202 near the top surface 203 of the substrate 200. In some implementations, the doped region 202 within the active region 102 can be a p-well. In some implementations, the substrate 200 can include an epitaxial layer, for example, a layer of n-type epi silicon. FIG. 8B also shows the insulating material 110 and the conductive material 112 within the parallel trenches that form the shield electrode 108. FIG. 8B shows that at the widest portion of the tapered trench within the active region 102, the insulating material 110 lining the trench has a substantially uniform thickness. In some implementations, the substantially uniform lining thickness can range from about 0.05 μm to about 1.5 μm. Therefore, the volume of conductive material 112 inside the trench is maximized, forming a complete shield electrode that extends almost to the bottom of the trench. Thus, the internal structure of the tapered trench at the wide end as shown in Figure 8B is similar to the example shown in Figure 2B.

[0076] 8C is a cross-sectional view of the central tapered trench shown in FIG. 8A along section line CC', in accordance with some implementations of the present disclosure. Section line CC' is located outside active region 102, in termination region 104, but still coincides with the widest portion of the tapered trench. Thus, the cross-sectional view shown in FIG. 8C shows a complete shield electrode 810 similar to the cross-sectional view shown in FIG. 8B, except that doped region 202 is absent from FIG. 8C.

[0077] FIG. 8D is a cross-sectional view of the central tapered trench shown in FIG. 8A along section line D-D′, according to some implementations of the present disclosure. Section line D-D′ coincides with the narrow end of the tapered trench. FIG. 8D shows that at this location in the termination region 104, the trench is not as deep as the trench in the tapered region. Thus, the volume of conductive material 112 inside the trench is smaller than the volume of conductive material 112 in the deeper trench portions shown in FIGS. 8B and 8C, forming a partial shield electrode 820. In some implementations, the thickness of the insulating material 110, e.g., the shield oxide, at the bottom of the trench exhibits less variation than in some other implementations. Less variation in oxide thickness can result in a more stable breakdown voltage.

[0078] 8E is a cross-sectional view of the central tapered trench shown in FIG. 8A along section line E-E', according to some implementations of the present disclosure. Section line E-E' coincides with tab 802, restoring the width of the tapered trench and forming a complete shield electrode 830. In some implementations, tab 802 has rounded corners. In some implementations, complete shield electrode 830 can have a width ranging from about 0.1 μm to about 1.0 μm and a depth ranging from about 1.0 μm to about 15.0 μm.

[0079] 8F is a cross-sectional view along section line F-F' in accordance with some implementations of the present disclosure. Section line F-F' is aligned with the length of the central tapered trench shown in FIG. 8A. FIG. 8F shows the depth of the trench gradually decreasing along the taper until tab 802 increases the corresponding depth of the shield electrode 108.

[0080] 8G is a cross-sectional view along section line G-G' adjacent to the central tapered trench shown in FIG. 8A, which coincides with oxide-filled trench 804, according to some implementations of the present disclosure.

[0081] 9A-9G are diagrams of a tapered trench structure 900 according to some implementations of the present disclosure. The tapered trench structure 900 (e.g., a filled tapered trench that functions as a shield electrode 108) may represent a larger array of multiple tapered trench structures. In the implementations shown in FIGS. 9A-9G, the array of trenches (three shown) includes a straight, untapered central trench 901, a first trench adjacent to one side of the central trench 901 and having a single-sided taper 902A to a single-sided tab 903A, and a second trench adjacent to the other side of the central trench 901 and having a single-sided taper 902B to a single-sided tab 903B. In some implementations, the single-sided tapers 902A and 902B are inside the first and second trenches and face the central trench 901. In some implementations, single-sided tabs 903A and 903B extend laterally outward in one direction from the ends of each of the first and second trenches, facing the central trench 901. In the larger array represented by tapered trench structure 900, only the central trench 901 has straight sides. All other trenches are single-sided tapered trenches flanking the central trench 901, with single-sided tabs at the ends of the single-sided tapered trenches.

[0082] FIG. 9A is a top view of a tapered trench structure 900 according to some implementations of the present disclosure. FIG. 9A shows the active region 102 and the termination region 104. A second trench adjacent to the central trench 901 in FIG. 9A shows cross-sectional cuts at different locations along the taper length (e.g., along the x-axis). The cut lines correspond to the cross-sectional views shown in FIGS. 9B, 9C, 9D, 9E, 9F, and 9G. For example, cut line B-B' corresponds to the cross-sectional view shown in FIG. 9B, cut line C-C' corresponds to the cross-sectional view shown in FIG. 9C, and so on. Cut line F-F' corresponds to the longitudinal cross-sectional view of the second trench shown in FIG. 9F, with cut line F-F' aligned with the longitudinal axis of the second tapered trench. Section line G-G' corresponds to the longitudinal cross-section of central trench 901 shown in Figure 9G, with section line G-G' aligned with the longitudinal axis of central trench 901. Other section lines, e.g., transverse section lines, are aligned perpendicular to the longitudinal axis.

[0083] FIG. 9B is a cross-sectional view along section line B-B′ through one of the tapered trenches shown in FIG. 9A according to some implementations of the present disclosure. The cross-sectional view shown in FIG. 9B is a view within the active region 102 at the wide end of the tapered trench. FIG. 9B shows the substrate 200 and the doped region 202 near the top surface 203 of the substrate 200. In some implementations, the doped region 202 within the active region 102 can be a p-well. In some implementations, the substrate 200 can include an epitaxial layer, for example, a layer of n-type episilicon. FIG. 9B also shows the insulating material 110 and conductive material 112 within the parallel trenches that form the shield electrode 108. FIG. 9B shows that at the widest portion of the single-sided tapered trench within the active region 102, the thickness of the insulating material 110 lining the trench is substantially uniform. In some implementations, the substantially uniform lining thickness can range from about 0.05 μm to about 1.5 μm. Thus, the volume of conductive material 112 inside the trench is maximized, forming a complete shield electrode that extends almost to the bottom of the trench. Thus, the internal structure of the tapered trench at the wide end, as shown in FIG. 9B, is similar to previous examples, such as the example shown in FIG. 2B.

[0084] 9C is a cross-sectional view along section line CC' through one of the tapered trenches shown in FIG. 9A in accordance with some implementations of the present disclosure. Section line CC' is located outside active region 102 in termination region 104, but still coincides with the widest portion of the single-sided tapered trench. Thus, the cross-sectional view shown in FIG. 9C shows a complete shield electrode 910 similar to the cross-sectional view shown in FIG. 9B, except that doped region 202 is absent from FIG. 9C.

[0085] FIG. 9D is a cross-sectional view along section line D-D′ through one of the tapered trenches shown in FIG. 9A in accordance with some implementations of the present disclosure. Section line D-D′ coincides with the narrow end of the single-sided tapered trench. FIG. 9D shows that at this location in the termination region 104, the insulating material 110 lining the trench is thinner but substantially uniform on the sides and bottom of the trench. However, the trench is not as deep as the trench in the tapered region. Thus, the volume of conductive material 112 inside the trench is smaller than the volume of conductive material 112 in the deeper trench portion shown in FIGS. 9B and 9C , forming a partial shield electrode 920. In some implementations, the thickness of the insulating material 110, e.g., the shield oxide, at the bottom of the trench exhibits less variation than in some other implementations. Less variation in oxide thickness can result in a more stable breakdown voltage.

[0086] 9E is a cross-sectional view along section line E-E' through one of the single-sided tapered trenches shown in FIG. 9A according to some implementations of the present disclosure. Section line E-E' coincides with single-sided tab 903B, restoring the width of the tapered trench to form a complete shield electrode 9830. In some implementations, the complete shield electrode 930 can have a width ranging from about 0.1 μm to about 1.0 μm and a depth ranging from about 1.0 μm to about 15.0 μm.

[0087] 9F is a cross-sectional view taken along section line F-F' in accordance with some implementations of the present disclosure. Section line F-F' is aligned along the X-axis with the length of one of the first or second tapered trenches shown in FIG. 9A. FIG. 9F shows the depth of the trench gradually decreasing along the taper until the single-sided tab 903B increases the corresponding depth of the shield electrode 108.

[0088] 9G is a cross-sectional view along section line G-G' according to some implementations of the present disclosure. Section line G-G' is aligned with the length of the central trench 901 shown in FIG. 9A. In some implementations, the central trench 901 is straight and not tapered. FIG. 9G shows a substantially uniform depth of the conductive material 112 of the shield electrode 108 along the length of the central trench, consistent with a trench of uniform width.

[0089] FIG. 10 is a plot 1000 of electrical test data obtained from various types of tapered trench structures according to some implementations of the present disclosure. The use of a tapered trench termination shows an increase in breakdown voltage of approximately 3V to 5V compared to a straight trench without a taper. In some implementations, the improvement in breakdown voltage may vary somewhat depending on the mask design, e.g., the critical dimension (CD) and type of taper used, the presence of an epitaxial layer, and other charge balance parameters. Improvements in breakdown voltage are demonstrated for both a buried polysilicon shield electrode 108 with a trench structure such as that shown in FIGS. 3A-3C and a surface polysilicon shield electrode 108 with a trench structure such as that shown in FIGS. 2A-2D.

[0090] FIG. 11 is a cross-sectional view illustrating a pair of adjacent MOSFET devices 1100 disposed within the active region 102 according to one implementation of the present disclosure. The pair of MOSFET devices 1100 includes a MOSFET device MOS1 and a MOSFET device MOS2. Because the MOSFET devices MOS1 and MOS2 have similar characteristics, the MOSFET devices MOS1 and MOS2 are generally described with reference to a single MOSFET device MOS2 (which is mirrored in the other MOSFET device MOS1 and / or in the MOSFET device MOS2). The pair of MOSFET devices 1100 may be, for example, relatively high-voltage devices (e.g., greater than 30 V, 60 V devices, 100 V devices, 300 V devices). In some implementations, the MOSFET devices MOS1 and MOS2 are spaced apart according to a pitch PH. As shown in FIG. 11 , the pair of MOSFET devices 1100 is formed within an epitaxial layer 1130 (e.g., an N-type doped epitaxial layer 1130). Each MOSFET device MOS1, MOS2 includes a trench 1105, a gate dielectric 1118, a gate electrode 1120, and a source region 1133. A mesa region 1150 extends between MOS1 and MOS2. The source region 1133 (e.g., an N+ source region) is disposed above a body region 1134 (e.g., a P-type body region 1134), which may be formed in an epitaxial layer 1130. The epitaxial layer may be formed on or in a substrate 200 (e.g., an N+ substrate 200), not shown. The trench 1105 may extend through the body region 1134 and terminate at a drift region 1137 in the epitaxial layer 1130 (which may also be referred to as an epitaxial region). The trench 1105 includes a dielectric 1110 (which may include one or more dielectric layers, such as a gate dielectric 1118) disposed within the trench 1105. A gate electrode 1120 and a shield electrode 1121 are disposed within the trench 1105 .

[0091] The pair of MOSFET devices 1100 can be configured to be operated, for example, by applying a voltage (e.g., a gate voltage) to the gate electrode 1120 of MOSFET device MOS2 to turn MOS2 on by forming a channel adjacent the gate dielectric 1118, e.g., a gate oxide, such that current can flow between the source region 1133 and the drain contact (not shown). Termination implementations described herein can improve the performance characteristics and dimensions of the pair of MOSFET devices 1100. For example, the on-resistance of the pair of MOSFET devices 1100 can be reduced by approximately 50% or more. This is achieved by reducing the pitch P between MOSFET device MOS1 and MOSFET device MOS2 by approximately 20% or more, thereby reducing the width of the mesa region 1150, and the breakdown voltage while the pair of MOSFET devices 1100 is off is not substantially reduced. The reduction in the on-resistance of the MOSFET device 1100 can be achieved by increasing the dopant concentration in the epitaxial layer 1130, for example, by 30%, which is enabled by termination implementations described herein.

[0092] As described above, various implementations of semiconductor devices including shield gate electrodes featuring tapered trench structures can increase and stabilize breakdown voltages to improve reliability in high-power applications. Tapered trenches can include double-ended tapers, single-sided tapers, end tabs, or simple taper to a point configuration. Such trench configurations can result in an increase in breakdown voltage of about 3 V to about 5 V.

[0093] In the foregoing description, when an element, such as a layer, region, or substrate, is referred to as being on, connected to, electrically connected to, coupled to, or electrically coupled with another element, it will be understood that it can be directly disposed on, connected to, or coupled with the other element, or that one or more intervening elements may be present. Conversely, when an element is referred to as being directly on, directly connected to, or directly coupled with another element or layer, no intervening elements or layers are present. Throughout the detailed description of the present invention, the terms directly, directly connected, or directly coupled may not be used, but elements shown as being directly on, directly connected, or directly coupled may be referred to as such. The claims of this application may be amended to describe the example relationships described herein or shown in the figures.

[0094] As used herein, the singular can include the plural unless the context clearly dictates otherwise. Spatially relative terms (e.g., throughout, above, above, below, lower, underneath, lower, top, bottom, etc.) are intended to encompass different orientations of the device during use or operation in addition to the orientation depicted in the drawings. In some implementations, the relative terms above and below can include vertically above and vertically below, respectively. In some implementations, the term adjacent can include laterally adjacent or horizontally adjacent.

[0095] Some implementations may be implemented using various semiconductor processing and / or packaging technologies, such as, but not limited to, silicon (Si), silicon carbide (SiC), gallium arsenide (GaAs), gallium nitride (GaN), and / or other types of semiconductor processing technologies associated with semiconductor substrates.

[0096] While certain features of the described implementations have been illustrated as described herein, those skilled in the art will now recognize numerous modifications, substitutions, changes, and equivalents. For example, features illustrated with respect to one implementation may, where appropriate, be included in other implementations. It will therefore be understood that the appended claims are intended to cover all such modifications and changes as fall within the scope of the implementations. These have been presented by way of example only, and not limitation, and it will be understood that various changes in form and detail may be made. Any portions of the apparatus and / or methods described herein may be combined in any combination except mutually exclusive combinations. The implementations described herein may include various combinations and / or subcombinations of functions, components, and / or features of the different implementations described.

Claims

1. 1. An apparatus comprising: a trench (400) having a first portion in an active region (102) and a second portion in a termination region (104), the trench (400) having a vertical depth in the semiconductor substrate (200) and a longitudinal axis F-F' extending from within the active region (102) into the termination region (104); a dielectric lining (110) disposed within the trench (400); a conductive electrode (112) disposed in the trench (400) above the dielectric lining (110), the conductive electrode (112) having a uniform shape within the first portion and a tapered shape within the second portion along the longitudinal axis (F-F').

2. 2. The device of claim 1, further comprising a tab (502) intersecting an end of the second portion, the tab (502) extending in a direction (EE') transverse to the longitudinal axis (FF').

3. The apparatus of claim 2, wherein the tabs (502) are substantially symmetrical about the longitudinal axis (FF').

4. The device of claim 1 , wherein the conductive electrode (112) comprises polysilicon.

5. The device of claim 1 , wherein the semiconductor substrate (200) comprises silicon carbide.

6. 10. The device of claim 1, wherein the device is a shield structure (108) of a shielded gate metal oxide semiconductor field effect transistor.

7. A device, a substrate (200) having a diffusion region (202) formed therein; a source in the diffusion region (202); a drain in the diffusion region (202); a shield structure (108) formed in a trench (400, 500, 600, 700) in the substrate (200), the trench having a dielectric liner (110), the shield structure (108) extending from within the diffusion region (202) and tapering towards a termination.

8. The device of claim 7, wherein the termination is a point (402).

9. The device of claim 7, wherein the termination includes at least one of a tab (702), an extension (601), and a reverse taper (701).

10. The device of claim 9, wherein the termination includes a tab (702) extending perpendicular to the trench (700).

11. 8. The device of claim 7, wherein an aspect ratio characterizing a maximum width of the shielding structure (108) at the diffusion region (202) and a minimum width of the shielding structure (108) at the termination is approximately 3:

1.

12. 8. The device of claim 7, wherein a first side of the shielding structure (902A, 903A) is tapered and a second side opposite the first side is straight.

13. A structure in a substrate, said structure comprising: a central shield structure (901); a first shield structure adjacent to one side of the central shield structure; a second shield structure adjacent to the opposite side of the central shield structure (901); A structure wherein the central shielding structure (901) is not tapered, the first shielding structure has a tapered first side (902A), and the second shielding structure has a tapered second side (902B).

14. 14. The structure of claim 13, wherein the first shield structure includes a first end tab (903A) extending laterally outward from the tapered first side (902A) and the second shield structure includes a second end tab (903B) extending laterally outward from the tapered second side (902B).

15. 15. The structure of claim 14, wherein the first end tab (903A) and the second end tab (903B) have rounded corners.

16. 14. The structure of claim 13, wherein each of the central shield structure (901), the first shield structure, and the second shield structure extends into the substrate (200) to a predetermined depth.

17. 17. The structure of claim 16, wherein the predetermined depth varies along a length of the shield structure (108).

18. 17. The structure of claim 16, wherein the predetermined depth ranges from about 1.0 μm to about 15.0 μm.

19. 17. The structure of claim 16, wherein the first shield structure and the second shield structure each have a minimum depth that coincides with a maximum taper.

20. 17. The structure of claim 16, wherein each of the shielding structures has a width ranging from about 0.1 μm to about 1.0 μm.

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