Nanosynapse integrated device and its manufacturing method

JP2025534855AActive Publication Date: 2025-10-20SUZHOU INST OF NANO TECH & NANO BIONICS CHINESE ACEDEMY OF SCI
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Patent Information

Application Number
JP2025504413
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-07-25
Filing Date
2023-08-14
Publication Date
2025-10-20
Estimated Expiration
2043-08-14

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Abstract

The present invention discloses a nanosynapse integrated device and a method for manufacturing the same. The nanosynapse integrated device includes a substrate, an insulating layer disposed on the substrate, and a plurality of nanosynapse units disposed on the insulating layer. Each nanosynapse unit includes a first microelectrode and a second microelectrode disposed opposite each other, and a GaN-based nanowire disposed between the first and second microelectrodes. The GaN-based nanowire has a first end connected to the first microelectrode and a second end connected to the second microelectrode. The present invention uses GaN-based nanowires as synaptic elements in the device, and the GaN-based nanowires have controllable direct transitions and stable physicochemical properties. In the nanosynapse integrated device, the plurality of nanosynapse units are integrated on the same substrate, allowing for large-scale fabrication, a small volume, and high integration. The plurality of nanosynapse units can be controlled independently or can be subject to overall array control according to an array pattern.
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Citation Information

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