Semiconductor device
The semiconductor device design with enhanced contact areas between bit lines and semiconductor patterns addresses the challenges of electrical characteristics and reliability in vertical channel transistors, achieving improved performance.
JP2026015192APending Publication Date: 2026-01-29SAMSUNG ELECTRONICS CO LTD
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Patent Information
- Application Number
- JP2025078244
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-07-19
- Filing Date
- 2025-05-08
- Publication Date
- 2026-01-29
AI Technical Summary
Technical Problem
Conventional transistors with vertical channels face challenges in improving electrical characteristics and reliability.
Method used
A semiconductor device design featuring a bit line with semiconductor patterns including vertical and horizontal portions, back gate electrodes, and word lines that increase contact area and enhance electrical connectivity.
Benefits of technology
The increased contact area between the bit line and semiconductor pattern reduces resistance, leading to improved electrical characteristics and reliability of the semiconductor device.
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Smart Images
Figure 2026015192000001_ABST
Abstract
To provide a semiconductor device having improved electrical characteristics and reliability.SOLUTION: A bit line extending in a first direction, a semiconductor pattern on the bit line, the semiconductor pattern including a first vertical portion and a second vertical portion spaced apart from each other in the first direction, and a horizontal portion disposed between the first and second vertical portions and connecting the first and second vertical portions to each other, the semiconductor pattern being spaced apart from each other in the first direction between the first and second vertical portions; The first and second word lines may extend in a second direction, the first and second directions may be parallel to an uppermost surface of the bit line and may cross each other, the back gate electrodes may be spaced apart from each other in the first direction with the first and second vertical portions interposed therebetween and may extend in the second direction, and the back gate electrodes may be disposed on an outer surface of the first vertical portion and an outer surface of the second vertical portion, respectively.SELECTED DRAWING: Figure 5A
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Citation Information
Patent Citations
US11,696,434