Semiconductor Devices

Abstract

In a transistor including an oxide semiconductor film, the field-effect mobility is improved. Together we improve reliability. A semiconductor device having an oxide semiconductor film, the semiconductor device comprising a gate electrode and an insulating film on a gate electrode, an oxide semiconductor film on the insulating film, and a pair of electrodes on the oxide semiconductor film; and a second oxide semiconductor film. and a second oxide semiconductor film, wherein the first oxide semiconductor film and the second oxide semiconductor film are The first oxide semiconductor film contains the same elements, and the second oxide semiconductor film is more crystalline than the first oxide semiconductor film. It has areas of low activity.

Description

[Technical Field]

[0001] One embodiment of the present invention relates to a semiconductor device including an oxide semiconductor film. The embodiment relates to a display device having the semiconductor device.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. The technical field of one aspect of the present invention relates to an article, a method, or a manufacturing method. is a process, machine, manufacture, or composition of matter. In particular, one embodiment of the present invention relates to a semiconductor device, a display device, a light-emitting device, a power storage device, , a storage device, a driving method thereof, or a manufacturing method thereof.

[0003] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Refers to devices in general, including semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory The device is one aspect of a semiconductor device. Optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.), and electronic devices The device may include a semiconductor device. [Background technology]

[0004] Oxide semiconductors have been attracting attention as semiconductor materials that can be used in transistors. In Patent Document 1, a plurality of oxide semiconductor layers are stacked, and among the plurality of oxide semiconductor layers, The oxide semiconductor layer serving as a channel contains indium and gallium, and the ratio of indium By making μ larger than the gallium fraction, the field effect mobility (simply called μFE) A semiconductor device is disclosed in which the resistance (sometimes referred to as "resistance") is improved.

[0005] In addition, Non-Patent Document 1 states that an oxide semiconductor containing indium, gallium, and zinc is , In 1-x Ga 1+x O3(ZnO) m (x is a number that satisfies -1≦x≦1, and m is a natural number) Furthermore, Non-Patent Document 1 discloses that the compound has a homologous phase represented by the formula: The solid solution range of the homologous phase is disclosed. For example, when m = 1, the solid solution region of the homologous phase is from -0.33 to 0.0 8, and the solid solution region of the homologous phase when m = 2 is in the range of x from -0.68 to 0.32. The range is. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2014-7399 [Non-patent literature]

[0007] [Non-Patent Document 1] M. Nakamura, N. Kimizuka, and T. Mohri, "The Phase Relations in the In2O3-Ga2ZnO4-ZnO System at 1350℃", J. Solid State Chem., 1991, Vol.93, pp.298-315 Summary of the Invention [Problem to be solved by the invention]

[0008] As a transistor using an oxide semiconductor film for the channel region, it has high field-effect mobility. However, increasing the field effect mobility of a transistor However, there is a problem that the characteristics of the transistor tend to become normally-on. This means that a channel exists and current flows through the transistor even when no voltage is applied to the gate electrode. It is a state in which one becomes disoriented.

[0009] In addition, in a transistor using an oxide semiconductor film for a channel region, The oxygen vacancies formed in the semiconductor layer are problematic because they affect transistor characteristics. When oxygen vacancies are formed in the oxide semiconductor film, hydrogen bonds to the oxygen vacancies to supply carriers. When a carrier supply source is generated in the oxide semiconductor film, This causes a change in the electrical characteristics of the transistor, typically a shift in the threshold voltage.

[0010] For example, if there are too many oxygen vacancies in the oxide semiconductor film, the threshold voltage of the transistor may be increased. Therefore, the oxide semiconductor film is shifted to the negative side, resulting in a normally-on characteristic. In particular, in the channel region, there is little oxygen vacancy or the device has normally-on characteristics. It is preferable that the amount of oxygen deficiency is such that it does not cause any damage.

[0011] In view of the above problems, one embodiment of the present invention provides a transistor including an oxide semiconductor film, One of the objectives is to improve the field effect mobility and the reliability. One embodiment of the present invention is to prevent fluctuations in electrical characteristics of a transistor including an oxide semiconductor film. Another object of the present invention is to suppress the occurrence of such a problem and to improve reliability. Another object of the present invention is to provide a semiconductor device with reduced power consumption. An object of one embodiment of the present invention is to provide a novel semiconductor device. An object of one embodiment is to provide a novel display device.

[0012] The above description of the problem does not preclude the existence of other problems. The embodiment does not necessarily have to solve all of these problems. Problems other than those mentioned above can be solved by the specification. It is clear from the description of the specification, etc. that the problems other than those mentioned above cannot be extracted from the description of the specification, etc. It is possible to issue it. [Means for solving the problem]

[0013] A first aspect of the present invention is a semiconductor device having an oxide semiconductor film, the semiconductor device comprising: a gate electrode, an insulating film on the gate electrode, an oxide semiconductor film on the insulating film, and an oxide semiconductor film and a pair of electrodes on the first oxide semiconductor film. a second oxide semiconductor film on the first oxide semiconductor film, The semiconductor films each contain the same element, and the first oxide semiconductor film contains the same element as the second oxide semiconductor film. The semiconductor device has a region with lower crystallinity than the film.

[0014] In the first aspect, the first oxide semiconductor film and the second oxide semiconductor film are each It is preferable that the metal oxide layer independently contains In, M (wherein M is Al, Ga, Y, or Sn), and Zn. It's nice.

[0015] In the first aspect, the ratio of the number of In atoms to the total number of In, M, and Zn atoms is When the atomic ratio is 4, the atomic ratio of M is 1.5 or more and 2.5 or less, and the atomic ratio of Zn is is preferably 2 or more and 4 or less. In the above embodiment, the atoms of In, M, and Zn The numerical ratio is preferably in the vicinity of In:M:Zn=4:2:3.

[0016] In the first aspect, the ratio of the number of In atoms to the total number of In, M, and Zn atoms is When the atomic ratio is 5, the atomic ratio of M is 0.5 or more and 1.5 or less, and the atomic ratio of Zn is is preferably 5 or more and 7 or less. In the above embodiment, the atoms of In, M, and Zn The numerical ratio is preferably in the vicinity of In:M:Zn=5:1:6.

[0017] Alternatively, a second aspect of the present invention is a semiconductor device having an oxide semiconductor film, The device includes a gate electrode, an insulating film on the gate electrode, an oxide semiconductor film on the insulating film, and an oxide a pair of electrodes on the oxide semiconductor film, and the oxide semiconductor film includes a first oxide semiconductor film and a first a second oxide semiconductor film over the first oxide semiconductor film, The first oxide semiconductor film and the second oxide semiconductor film each contain the same element. The electron affinity of the first oxide semiconductor film is larger than that of the second oxide semiconductor film. The difference between the electron affinity of the first oxide and the electron affinity of the second oxide semiconductor film is 0.15 eV or more and 2.0 eV or less. The semiconductor film has a region with lower crystallinity than the second oxide semiconductor film. .

[0018] Alternatively, a third aspect of the present invention is a semiconductor device having an oxide semiconductor film, The device includes a gate electrode, an insulating film on the gate electrode, an oxide semiconductor film on the insulating film, and an oxide a pair of electrodes on the oxide semiconductor film, and the oxide semiconductor film includes a first oxide semiconductor film and a first a second oxide semiconductor film over the first oxide semiconductor film, The oxide semiconductor films each independently contain In and M (M is Al, Ga, Y, or Sn). and Zn, and the atomic ratio of In to Zn in the first oxide semiconductor film is The ratio of the number of In atoms to the number of Zn atoms in the second oxide semiconductor film is larger than that in the first oxide semiconductor film. The semiconductor film has a region with lower crystallinity than the second oxide semiconductor film. .

[0019] In the second and third aspects, the first oxide semiconductor film and the second oxide semiconductor film The body films each independently comprise In, M (wherein M is Al, Ga, Y, or Sn), Zn, It is preferable that the

[0020] In the second and third aspects, the In, M, and Zn of the first oxide semiconductor film When the atomic ratio of In to the total number of atoms is 4, the atomic ratio of M is 1.5 or more and 2.5 and the atomic ratio of Zn is preferably 2 or more and 4 or less. In the formula, the atomic ratio of In, M, and Zn is In:M:Zn=4:2:3. In addition, the total number of In, M, and Zn atoms in the second oxide semiconductor film is preferably about 1000 to 10000. When the atomic ratio of In to the sum is 1, the atomic ratio of M is 0.5 or more and 1.5 or less, In addition, it is preferable that the atomic ratio of Zn is 0.1 or more and 2 or less. The atomic ratio of n, M, and Zn is preferably in the vicinity of In:M:Zn=1:1:1.

[0021] In the second and third aspects, the In, M, and When the atomic ratio of In to the total number of Zn atoms is 4, the atomic ratio of M is 1.5 or more. It is preferable that the atomic ratio of Zn is 2 or more and 4 or less. In this case, the atomic ratio of In, M, and Zn is approximately In:M:Zn=4:2:3. In addition, it is preferable that the total number of In, M, and Zn atoms in the second oxide semiconductor film is less than 100%. When the atomic ratio of In is 5, the atomic ratio of M is 0.5 or more and 1.5 or less, and The atomic ratio is preferably 5 or more and 7 or less. The atomic ratio of n is preferably in the vicinity of In:M:Zn=5:1:6.

[0022] In each of the first to third aspects, the first oxide semiconductor film is The first region is made of an indium-based compound oxide semiconductor. A plurality of compounds each having one or more selected from the group consisting of aluminum, zinc, and oxygen as the main component. 1 cluster, and the second region has indium, an element M (where M is Al, Ga, Y, or Sn), zinc, and oxygen as the main components. The plurality of first clusters each have a portion connected to each other, and the plurality of first clusters each have a portion connected to each other. Preferably, the second clusters of numbers each have interconnected parts.

[0023] In each of the first to third aspects, the second oxide semiconductor film is It is preferable that the crystal part has a c-axis orientation.

[0024] Another aspect of the present invention is a semiconductor device comprising: a display; Another embodiment of the present invention is a display device including the display device and a touch sensor. Another aspect of the present invention is a display module having any of the above aspects. a semiconductor device, the display device, or the display module according to any one of the preceding claims, and an operation key or is an electronic device having a battery. [Effects of the Invention]

[0025] According to one embodiment of the present invention, a field-effect transfer The accuracy and reliability can be improved. In a transistor including an oxide semiconductor film, fluctuation in electrical characteristics can be suppressed and signal quality can be improved. Further, according to one embodiment of the present invention, power consumption can be reduced. According to one embodiment of the present invention, a novel semiconductor device can be provided. According to one embodiment of the present invention, a novel display device can be provided. This can be done.

[0026] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have to have all of these effects. The above will be made clear from the description, drawings, claims, etc. It is possible to extract other effects from the descriptions in the aspects and claims. [Brief explanation of the drawings]

[0027] [Figure 1] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 2] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 3] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 4] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 5] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 6] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 7] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 8] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 9] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 10] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device. [Figure 11] 1 is a conceptual diagram showing a diffusion path of oxygen or excess oxygen diffusing into an oxide semiconductor film. [Figure 12] 1A and 1B are a top view and a cross-sectional view illustrating a complex oxide semiconductor. [Figure 13] 1A and 1B are a top view and a cross-sectional view illustrating a complex oxide semiconductor. [Figure 14] 1A and 1B are a top view and a cross-sectional view illustrating a complex oxide semiconductor. [Figure 15] 1A and 1B are diagrams illustrating the atomic ratio of a complex oxide semiconductor; [Figure 16] FIG. 1 is a diagram illustrating a sputtering apparatus. [Figure 17] 1 is a process flow diagram illustrating a method for manufacturing a complex oxide semiconductor. [Figure 18] FIG. 2 is a diagram illustrating a cross section near a target. [Figure 19] FIG. 1 is a top view illustrating one embodiment of a display device. [Figure 20] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Figure 21] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Figure 22] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Figure 23] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Figure 24] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Figure 25] FIG. 1 is a cross-sectional view illustrating one embodiment of a display device. [Figure 26] 1A and 1B are diagrams illustrating a top view and a cross section of a semiconductor device. [Figure 27] 1A and 1B are cross-sectional views of a semiconductor device; [Figure 28] 1A and 1B are diagrams illustrating an example of the configuration of a display panel. [Figure 29] 1A and 1B are diagrams illustrating an example of the configuration of a display panel. [Figure 30] 1A and 1B are a block diagram and a circuit diagram illustrating a display device. [Figure 31] FIG. 2 is a diagram illustrating a display module. [Figure 32] 1A to 1C illustrate electronic devices. [Figure 33] 1A to 1C illustrate electronic devices. [Figure 34] FIG. 1 is a perspective view illustrating a display device. [Figure 35] FIG. 10 is a graph showing Id-Vg characteristics of a transistor. [Figure 36] 10A and 10B are diagrams illustrating GBT test results of transistors. [Figure 37] FIG. 10 is a graph showing Id-Vg characteristics of a transistor. [Figure 38] 10A and 10B are diagrams illustrating GBT test results of transistors. DETAILED DESCRIPTION OF THE INVENTION

[0028] Hereinafter, embodiments will be described with reference to the drawings. It is understood that the present invention may be embodied in various different forms without departing from its spirit and scope. It will be readily apparent to those skilled in the art that various modifications may be made to the embodiments and details of the present invention. However, the present invention should not be construed as being limited to the description of the following embodiments.

[0029] Also, in the drawings, the size, thickness of layers, or areas are exaggerated for clarity. Therefore, the scale is not necessarily limited to that shown. The drawings are merely schematic illustrations and are not limited to the shapes or values ​​shown in the drawings.

[0030] In addition, the ordinal numbers "first," "second," and "third" used in this specification refer to the number of components. It should be noted that this is added to avoid confusion and is not intended to limit the number.

[0031] In addition, in this specification, the terms "above" and "below" that indicate the position of components are used to indicate the position of components. The positional relationship is used for convenience in describing the structure with reference to the drawings. The relationship between the two components changes depending on the direction in which each component is depicted. The terms are not limited to those used above, but can be rephrased appropriately depending on the situation.

[0032] In this specification, a transistor includes a gate, a drain, and a source. It is an element having at least three terminals including a drain (drain terminal, drain Between the drain electrode and the source terminal A current flows between the source and the drain through the channel region. In this specification, the channel region is a region through which a current can flow. This refers to the area where the flow occurs as follows.

[0033] The functions of the source and drain may differ depending on whether transistors with different polarities are used or whether the circuit This may happen when the direction of the current changes during operation. In the specification, the terms source and drain may be used interchangeably. do.

[0034] In addition, in this specification, "electrically connected" means "something that has some kind of electrical effect." This includes cases where the device is connected via a "of" is not subject to any particular restrictions as long as it allows the transmission and reception of electrical signals between connected objects. For example, "things that have some kind of electrical action" include electrodes, wiring, and transistors. It has various functions such as switching elements, resistors, inductors, capacitors, etc. This includes elements such as:

[0035] In this specification, "parallel" means that two straight lines are at an angle of -10° or more and 10° or less. Therefore, it includes cases where the angle is between -5° and 5°. "Perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, this also includes cases where the angle is between 85° and 95°.

[0036] In addition, in this specification and the like, the terms "film" and "layer" are interchangeable. For example, the term "conductive layer" can be changed to the term "conductive film." Alternatively, for example, the term "insulating film" may be changed to "insulating layer" It may be possible to change the term to

[0037] Unless otherwise specified, in this specification and the like, the off-state current refers to the current that flows when a transistor is off. This refers to the drain current when the device is in a non-conducting state (also known as a cut-off state). Unless otherwise specified, for an n-channel transistor, the voltage V between the gate and source When gs is lower than the threshold voltage Vth, the gate and This refers to the state in which the voltage Vgs between the n-channel and n-channel transistors is higher than the threshold voltage Vth. The off-state current of a transistor is the voltage between the gate and source, Vgs, that is, the threshold voltage, Vt It may refer to the drain current when it is lower than h.

[0038] The off-state current of a transistor may depend on Vgs. The off-state current is I or less if there is a Vgs value at which the off-state current of the transistor is I or less. The off-state current of a transistor is the current that flows through it in the off state at a given Vgs. , an off-state at Vgs within a predetermined range or a sufficiently reduced off-current is obtained. It may refer to the off-state current at Vgs.

[0039] As an example, when the threshold voltage Vth is 0.5V and Vgs is 0.5V, The on-current is 1×10 -9 A, and the drain current at Vgs of 0.1 V is 1×10 -1 3 A, and the drain current at Vgs = -0.5 V is 1 × 10 -19 A and Vg The drain current at s = -0.8V is 1×10 -22 A n-channel transistor The drain current of the transistor is as follows when Vgs is -0.5V: , or 1×10 when Vgs is in the range of -0.5V to -0.8V -19 A or below Therefore, the off-state current of the transistor is 1×10 -19 It may be said that it is below A. The drain current of the transistor is 1×10 -22 A or less Vgs exists. Therefore, the off-state current of the transistor is 1×10 -22 It may be said that it is below A.

[0040] In this specification and the like, the off-state current of a transistor having a channel width W is calculated based on the It is sometimes expressed as the current value that flows per watt. In the latter case, the unit of the off-state current is current / length. It may be expressed in units with an element (e.g., A / μm).

[0041] The off-state current of a transistor may depend on temperature. Unless otherwise specified, the values ​​are measured at room temperature, 60°C, 85°C, 95°C, or 125°C. It may also represent the current that is generated when the reliability of a semiconductor device that includes the transistor is guaranteed. or the temperature at which a semiconductor device containing the transistor is used (e.g. For example, the off-state current at any temperature between 5°C and 35°C. The off-state current of the transistor is I or less at room temperature, 60°C, 85°C, 95°C, 125°C, The temperature at which the reliability of the semiconductor device including the transistor is guaranteed, or The temperature at which the semiconductor device containing the transistor is used (for example, any one of 5°C to 35°C) (temperature), there exists a value of Vgs at which the off-state current of the transistor is less than I. It may point to.

[0042] The off-state current of a transistor can depend on the voltage Vds between the drain and source In this specification, unless otherwise specified, the off-state current is measured when Vds is 0.1 V, 0.8 V, 1V, 1.2V, 1.8V, 2.5V, 3V, 3.3V, 10V, 12V, 16V, or In some cases, the value represents the off-state current at 20 V. Alternatively, the value represents the off-state current of the semiconductor containing the transistor. Vds that guarantees the reliability of semiconductor devices, or semiconductor devices that include the transistor The off-state current of a transistor at Vds is sometimes used in The current is I or less when Vds is 0.1V, 0.8V, 1V, 1.2V, 1.8V, 2.5V, 3V, 3.3V, 10V, 12V, 16V, 20V, transistors included Vds that guarantees the reliability of the semiconductor device in which the transistor is used, or the semiconductor Vds used in semiconductor devices, etc., where the off-state current of the transistor is I or less It may refer to the existence of a gs value.

[0043] In the above description of the off-state current, the drain may be read as the source. Current may also refer to the current through the source when the transistor is in the off state.

[0044] In this specification and the like, the term "leak current" may be used to mean the same thing as "off-state current." In this specification, the off-state current is, for example, the current when a transistor is in an off state. , may refer to the current flowing between the source and drain.

[0045] In this specification, the threshold voltage of a transistor is the voltage at which a channel is formed in the transistor. This refers to the gate voltage (Vg) when a gate electrode is formed. Specifically, it refers to the threshold voltage of a transistor. The voltage is plotted by plotting the gate voltage (Vg) on ​​the horizontal axis and the square root of the drain current (Id) on the vertical axis. In the simulated curve (Vg-√Id characteristics), the tangent line with the maximum slope is extrapolated to form a straight line. , the gate voltage (Vg Alternatively, the threshold voltage of a transistor can be expressed as the channel length L and the The channel width is W, and the value of Id[A]×L[μm] / W[μm] is 1×10 -9 [A] and It may also refer to the gate voltage (Vg) applied to the device.

[0046] In addition, even when the term "semiconductor" is used in this specification, for example, If the dielectric constant is low enough, it may have the properties of an "insulator." The boundary between "insulator" and "insulator" is vague and it may not be possible to strictly distinguish them. The term "semiconductor" in the above may be replaced with "insulator." The term "insulator" in the specification etc. may be replaced with "semiconductor." In some cases, the term "insulator" used in this specification can be rephrased as "semi-insulator." .

[0047] In addition, even when the term "semiconductor" is used in this specification, for example, If the electrical conductivity is high enough, it may have the properties of a "conductor." The boundary between "conductor" and "electroconductor" is vague and it may not be possible to strictly distinguish them. The term "semiconductor" in the above may be replaced with "conductor." The term "conductor" in the specification etc. may be replaced with "semiconductor" in some cases.

[0048] In this specification, impurities in a semiconductor refer to substances other than the main components that constitute the semiconductor film. For example, elements with a concentration of less than 0.1 atomic percent are impurities. This can cause the formation of DOS (Density of States) in semiconductors and The rear mobility and crystallinity may decrease. In the case of an oxide semiconductor, impurities that change the properties of the semiconductor include, for example, Group 1 impurities. Elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, transition metals other than the main component In particular, hydrogen (also found in water), lithium, sodium, silicon, and boron In the case of oxide semiconductors, impurities such as hydrogen can cause Therefore, oxygen vacancies may be formed. Impurities that change the properties include, for example, oxygen, group 1 elements excluding hydrogen, group 2 elements, These include Group 13 elements and Group 15 elements.

[0049] (Embodiment 1) In this embodiment, a semiconductor device and a manufacturing method of the semiconductor device according to one embodiment of the present invention will be described. The description will be made with reference to FIGS.

[0050] <1-1. Configuration example 1 of semiconductor device> FIG. 1A is a top view of a transistor 100 which is a semiconductor device of one embodiment of the present invention. 1(B) corresponds to a cross-sectional view of the cut surface taken along the dashed line X1-X2 shown in FIG. 1(A). 1(C) is a cross-sectional view taken along the dashed line Y1-Y2 in FIG. 1(A). In FIG. 1A, in order to avoid complication, the transistor 100 Some of the components (such as the insulating film that functions as the gate insulating film) are omitted in the illustration. The dashed line X1-X2 direction is the channel length direction, and the dashed line Y1-Y2 direction is the channel width direction. In the top view of the transistor, 1(A), some of the components may be omitted.

[0051] The transistor 100 includes a conductive film 104 on a substrate 102 and a conductive film 104. the insulating film 106 on the oxide semiconductor film 108; The conductive film 112a is formed over the oxide semiconductor film 108, and the conductive film 112b is formed over the oxide semiconductor film 108. Specifically, the oxide semiconductor film 108, the conductive film 112a, and the conductive film 112b are formed over the transistor 100. On the film 112b, an insulating film 114, an insulating film 116 on the insulating film 114, and a The insulating film 118 is formed.

[0052] The transistor 100 is a so-called channel-etched transistor.

[0053] The oxide semiconductor film 108 is formed by stacking an oxide semiconductor film 108_1 on the insulating film 106 and an oxide semiconductor film 108_2 on the insulating film 106. and an oxide semiconductor film 108_2 on the oxide semiconductor film 108_1. The film 108_1 and the oxide semiconductor film 108_2 contain the same elements. For example, The oxide semiconductor film 108_1 and the oxide semiconductor film 108_2 each independently contain In and , M (M is Al, Ga, Y, or Sn), and Zn.

[0054] The oxide semiconductor film 108_1 and the oxide semiconductor film 108_2 are each independently It is preferable that the atomic ratio of In is greater than the atomic ratio of M. The atomic ratio of In, M, and Zn in the compound semiconductor film 108_1 is In:M:Zn=4:2: In addition, the In, M, and Zn atoms in the oxide semiconductor film 108_2 are preferably in the vicinity of 3. It is preferable that the ratio of the number of In:M:Zn is approximately 4:2:3. When M is 4, M is 1.5 or more and 2.5 or less, and Zn is 2 or more and 4 or less. As shown in FIG. 1, the oxide semiconductor film 108_1 and the oxide semiconductor film 108_2 have approximately the same composition. This allows the same sputtering target to be used for formation, reducing manufacturing costs. In addition, when using the same sputtering target, The oxide semiconductor film 108_1 and the oxide semiconductor film 108_2 are successively formed in vacuum. Therefore, the interface between the oxide semiconductor film 108_1 and the oxide semiconductor film 108_2 can be This can prevent impurities from being taken in.

[0055] The oxide semiconductor film 108_1 and the oxide semiconductor film 108_2 are each independently formed of In The atomic ratio of M is greater than the atomic ratio of M, so that the field effect of the transistor 100 Specifically, the field effect mobility of the transistor 100 can be increased to 5 0cm 2 / Vs, and more preferably the field effect mobility of the transistor 100 is greater than 10 0cm 2 / Vs can be exceeded.

[0056] For example, the above-mentioned high field effect mobility transistor is used as a gate driver for generating a gate signal. By using this as a driver, it is possible to provide a display device with a narrow frame width (also called a narrow frame). In addition, the transistor having high field effect mobility is used for a signal line of a display device. The source driver that supplies the signal (especially the output of the shift register that the source driver has) By using it in a multi-output terminal (demultiplexer connected to the output terminal), the number of wires connected to the display device can be reduced. Therefore, a display device with fewer pixels can be provided.

[0057] On the other hand, the oxide semiconductor film 108_1 and the oxide semiconductor film 108_2 are independently formed. Even if the oxide semiconductor film 108 has a region in which the atomic ratio of In is larger than the atomic ratio of M, When the crystallinity of each of the oxide semiconductor film 108_1 and the oxide semiconductor film 108_2 is high, the field-effect mobility is low. This may be the case.

[0058] However, in the semiconductor device of one embodiment of the present invention, the oxide semiconductor film 108_1 The oxide semiconductor film 108_1 has a region with lower crystallinity than the oxide semiconductor film 108_2. The crystallinity of 08 can be measured by, for example, X-ray diffraction (XRD). or by transmission electron microscopy (TEM). This can be analyzed using a 300 n Electron Microscope.

[0059] When the oxide semiconductor film 108_1 has a region with low crystallinity, the following excellent effects are obtained. do.

[0060] First, oxygen vacancies that can be formed in the oxide semiconductor film 108 will be described.

[0061] The oxygen vacancies formed in the oxide semiconductor film 108 affect the transistor characteristics. For example, when oxygen vacancies are formed in the oxide semiconductor film 108, Hydrogen bonds to the oxide semiconductor film 108, forming a carrier supply source. As a result, the electrical characteristics of the transistor 100 including the oxide semiconductor film 108 change, typically Therefore, in the oxide semiconductor film 108, the threshold voltage shifts. The fewer the element defects, the better.

[0062] Therefore, in one embodiment of the present invention, an insulating film in the vicinity of the oxide semiconductor film 108, specifically, The insulating films 114 and 116 formed above the oxide semiconductor film 108 contain excess oxygen. Oxygen or excess oxygen is transferred from the insulating films 114 and 116 to the oxide semiconductor film 108. By moving the oxide semiconductor film, oxygen vacancies in the oxide semiconductor film can be reduced.

[0063] Here, oxygen or oxygen diffusing into the oxide semiconductor film 108 will be described with reference to FIGS. 11A and 11B show the path of excess oxygen that diffuses into the oxide semiconductor film 108. 11(A) is a conceptual diagram showing the diffusion path of oxygen that diffuses or excess oxygen. 11(A) is a conceptual diagram of the channel width direction, and FIG. 11(B) is a conceptual diagram of the channel width direction.

[0064] The oxygen or excess oxygen contained in the insulating films 114 and 116 is introduced from above, i.e., from the oxide semiconductor. The ions pass through the conductive film 108_2 and diffuse into the oxide semiconductor film 108_1 (FIG. 11(A)(B) ) shown in Route 1).

[0065] Alternatively, the oxygen or excess oxygen contained in the insulating films 114 and 116 may be added to the oxide semiconductor film 10. The oxide semiconductor film 108_1 and the oxide semiconductor film 108_2 are diffused into the oxide semiconductor film 108 from their respective side surfaces. (Route 2 shown in Figure 11(B)).

[0066] For example, in the case of Route 1 shown in FIGS. 11A and 11B, the oxide semiconductor film 108_2 If the crystallinity of is high, it may hinder the diffusion of oxygen or excess oxygen. In the case of Route 2 shown in (B), the oxide semiconductor film 108_1 and the oxide semiconductor film 1 108_1 and 108_2 are respectively a plan view and a plan view of the oxide semiconductor film 108_1 and the oxide semiconductor film 108_2. 2, allowing oxygen or excess oxygen to diffuse into the

[0067] In the case of Route 2 shown in FIG. 11B, the crystallinity of the oxide semiconductor film 108_1 is However, since the oxide semiconductor film 108_1 has a region with lower crystallinity than the oxide semiconductor film 108_2, the region The oxide semiconductor film 108_1 has a higher crystallinity than the oxide semiconductor film 108_1. Excess oxygen can also be diffused into 8_2. However, if the insulating film 106 contains oxygen or excess oxygen, the oxide is also removed from the insulating film 106. Oxygen or excess oxygen may diffuse into the semiconductor film 108 .

[0068] As described above, in the semiconductor device of one embodiment of the present invention, oxide semiconductors with different crystal structures High reliability is achieved by using a laminated film structure and using areas with low crystallinity as a diffusion path for excess oxygen. A semiconductor device can be provided.

[0069] Note that when the oxide semiconductor film 108 is formed using only an oxide semiconductor film with low crystallinity, The impurity (for example, water) is introduced into the channel side, that is, into the region corresponding to the oxide semiconductor film 108_2. When reliability is reduced due to adhesion of substances such as silicon or moisture or the inclusion of impurities. There is.

[0070] Impurities such as hydrogen or moisture mixed into the oxide semiconductor film 108 affect transistor characteristics. Therefore, in the oxide semiconductor film 108, hydrogen or The less impurities such as water there are, the more preferable.

[0071] In view of this, in one embodiment of the present invention, the crystallinity of an oxide semiconductor film that is an upper layer of the oxide semiconductor film is improved. By increasing the concentration, impurities that may be mixed into the oxide semiconductor film 108 can be suppressed. The conductive films 112a and 112b are processed by increasing the crystallinity of the oxide semiconductor film 108_2. The surface of the oxide semiconductor film 108, that is, the surface of the oxide semiconductor film 108, can be prevented from being damaged during the oxidation. The surface of the compound semiconductor film 108_2 is exposed to the etchant used in processing the conductive films 112a and 112b. However, the oxide semiconductor film 108_2 has poor crystallinity. Since the oxide semiconductor film 108_1 has a high crystallinity, it has a high etching resistance compared to the oxide semiconductor film 108_1 having low crystallinity. Therefore, the oxide semiconductor film 108_2 functions as an etching stopper. do.

[0072] Note that the oxide semiconductor film 108 is formed of an oxide semiconductor having a low impurity concentration and a low density of defect states. By using a semiconductor film, a transistor with excellent electrical characteristics can be manufactured. Here, it is preferable that the impurity concentration is low and the defect level density is low (there is little oxygen vacancy). The term "high-purity intrinsic" or "substantially high-purity intrinsic" refers to impurities in the oxide semiconductor film. In this specification and the like, water is removed from the oxide semiconductor film. The reduction or removal of hydrogen is sometimes referred to as dehydration or dehydrogenation. The addition of oxygen to a semiconductor film or an oxide insulating film is sometimes referred to as oxygen addition. The state in which oxygen is added and has an excess of oxygen compared to the stoichiometric composition is referred to as a hyperoxygenated state. There are cases where this happens.

[0073] A highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a small number of carrier generation sources. Therefore, the carrier density can be reduced. The transistor in which the region is formed has electrical characteristics in which the threshold voltage is negative (normally negative). It is also rare for the product to be pure or substantially pure. Since the oxide semiconductor film has a low density of defect states, the oxide semiconductor film may also have a low density of trap states. Furthermore, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a significantly low off-state current. Small, with a channel width of 1×10 6 Even if the device has a channel length L of 10 μm, When the voltage between the source electrode and the drain electrode (drain voltage) is in the range of 1V to 10V, The current is below the measurement limit of the semiconductor parameter analyzer, i.e., 1×10 -13 A and below The following characteristics can be obtained.

[0074] The oxide semiconductor film 108_1 has a region with lower crystallinity than the oxide semiconductor film 108_2. By having such a region, the carrier density may be increased.

[0075] In addition, when the carrier density of the oxide semiconductor film 108_1 increases, the oxide semiconductor film 108 The Fermi level may be relatively high relative to the conduction band of the oxide. The bottom of the conduction band of the oxide semiconductor film 108_1 is lowered. and the energy of a trap level that can be formed in the gate insulating film (the insulating film 106 in this example). The energy difference may become large. This reduces the amount of charge trapped in the transistor, thereby reducing the fluctuation in the threshold voltage of the transistor. Furthermore, when the carrier density of the oxide semiconductor film 108_1 is increased, the oxide semiconductor The field effect mobility of the conductive film 108 can be increased.

[0076] The oxide semiconductor film 108_1 is preferably a composite oxide semiconductor. The oxide semiconductor will be described in detail in Embodiment 2.

[0077] Note that in the transistor 100 illustrated in FIGS. 1A, 1B, and 1C, the insulating film 106 The insulating films 114, 116, and 118 function as gate insulating films of the transistor 100. The insulating film functions as a protective insulating film for the transistor 100. In this example, the conductive film 104 functions as a gate electrode, and the conductive film 112a functions as a source electrode. The conductive film 112b functions as a drain electrode. In this specification and the like, the insulating film 106 is referred to as a first insulating film, and the insulating films 114 and 116 are referred to as a second insulating film. The insulating film and the insulating film 118 may be referred to as a third insulating film.

[0078] <1-2. Components of semiconductor device> Next, the components included in the semiconductor device of this embodiment will be described in detail.

[0079] [substrate] There is no particular restriction on the material of the substrate 102, but it should be strong enough to withstand the subsequent heat treatment. For example, glass substrates, ceramic substrates, quartz substrates, and A fire substrate or the like may be used as the substrate 102. Also, silicon or silicon carbide may be used as the material. Single crystal semiconductor substrates, polycrystalline semiconductor substrates, compound semiconductors such as silicon germanium, etc. It is also possible to apply a substrate, an SOI substrate, etc., and a semiconductor element is provided on these substrates. The substrate 102 may be a glass substrate. If you are using 6th generation (1500mm x 1850mm), 7th generation (1870mm x 220 0mm), 8th generation (2200mm x 2400mm), 9th generation (2400mm x 280 By using large area substrates such as 10th generation (2950mm x 3400mm), Larger display devices can be fabricated.

[0080] In addition, a flexible substrate is used as the substrate 102, and the transistor 10 is directly formed on the flexible substrate. Alternatively, a peeling layer may be provided between the substrate 102 and the transistor 100. The release layer is preferably removed from the substrate 102 after a semiconductor device is partially or completely completed thereon. The transistor 100 can be separated and transferred to another substrate. It can also be transferred to substrates with poor thermal properties or flexible substrates.

[0081] [Conductive film] A conductive film 104 functions as a gate electrode, a conductive film 112a functions as a source electrode, The conductive film 112b functioning as the drain electrode may be made of chromium (Cr), copper (Cu), or aluminum. Aluminum (Al), gold (Au), silver (Ag), zinc (Zn), molybdenum (Mo), Ta (Ta), Titanium (Ti), Tungsten (W), Manganese (Mn), Nickel ( a metal element selected from Ni, iron (Fe), and cobalt (Co), or the metal elements mentioned above The alloys are formed using alloys containing the above metal elements or alloys combining the above metal elements. It is possible.

[0082] The conductive films 104, 112a, and 112b are made of an oxide containing indium and tin (I n-Sn oxide), oxide containing indium and tungsten (In-W oxide), Indium, tungsten, and zinc oxide (In-W-Zn oxide), indium and titanium oxide (In-Ti oxide), and oxide containing indium, titanium, and tin. oxides (In-Ti-Sn oxides), oxides containing indium and zinc (In-Zn oxides) oxides containing indium, tin and silicon (In-Sn-Si oxides); Oxide conductors such as oxides containing indium, gallium, and zinc (In-Ga-Zn oxide) Alternatively, an oxide semiconductor can be used.

[0083] Here, the oxide conductor will be described. In this specification and the like, the oxide conductor is referred to as OC (Oxide Conductor). Examples of oxide conductors include When oxygen vacancies are formed in an oxide semiconductor and hydrogen is added to the oxygen vacancies, donors are formed in the vicinity of the conduction band. As a result, the oxide semiconductor becomes electrically conductive. The oxide semiconductor thus obtained can be called an oxide conductor. , and has a large energy gap, so it is transparent to visible light. The oxide conductor is an oxide semiconductor having a donor level near the conduction band. The effect of absorption due to donor levels is small, and the transparency to visible light is comparable to that of oxide semiconductors. It has sexuality.

[0084] The conductive films 104, 112a, and 112b are made of a Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) may be applied. This allows for processing using a wet etching process, which reduces manufacturing costs. It becomes possible.

[0085] The conductive films 112a and 112b contain, among the above-mentioned metal elements, copper, titanium, tantalum, and the like. tungsten, tantalum, and molybdenum. In particular, it is preferable to use a tantalum nitride film as the conductive films 112a and 112b. The tantalum nitride film has electrical conductivity and has high resistance to copper or hydrogen. In addition, tantalum nitride film has low hydrogen release, a conductive film in contact with the oxide semiconductor film 108 or a conductive film in the vicinity of the oxide semiconductor film 108 In addition, a copper film can be used as the conductive films 112a and 112b. The use of such a material is preferable because it can reduce the resistance of the conductive films 112a and 112b.

[0086] The conductive films 112a and 112b can also be formed by electroless plating. Materials that can be formed by the electroless plating method include, for example, Cu, Ni, Al, Au, S One or more of n, Co, Ag, and Pd can be used. In particular, when Cu or Ag is used, the resistance of the conductive film can be reduced, It is suitable.

[0087] [Insulating film that functions as a gate insulating film] The insulating film 106 functioning as a gate insulating film of the transistor 100 is a plasma-treated PECVD:(Plasma Enhanced Chemical Va Silicon oxide film, acid film, etc. are deposited by the porosity deposition method, sputtering method, etc. Silicon nitride film, silicon oxynitride film, silicon nitride film, aluminum oxide film, aluminum oxide film fluorine film, yttrium oxide film, zirconium oxide film, gallium oxide film, tantalum oxide film, magnesium oxide film, lanthanum oxide film, cerium oxide film and neodymium oxide film The insulating film 106 can have a stacked structure or an insulating layer having three or more layers. The above laminated structure may also be used.

[0088] In addition, the oxide semiconductor film 108, which functions as a channel region of the transistor 100, The insulating film 106 is preferably an oxide insulating film, and has an oxide content in excess of the stoichiometric composition. It is more preferable that the insulating film 1 has a region containing oxygen (excess oxygen region). The insulating film 106 is an insulating film capable of releasing oxygen. To provide this, for example, the insulating film 106 is formed in an oxygen atmosphere, or the insulating film 106 after the film formation is The insulating film 106 may be heat-treated in an oxygen atmosphere.

[0089] Furthermore, when hafnium oxide is used as the insulating film 106, the following effects are achieved. Hafnium has a higher dielectric constant than silicon oxide and silicon oxynitride. Compared to when silicon oxide is used, the thickness of the insulating film 106 can be increased, so that the tunnel This reduces the leakage current due to the current flowing through the transistor. Furthermore, hafnium oxide, which has a crystalline structure, can be used to form amorphous structures. Therefore, the off-state current is small. To form a transistor, it is preferable to use hafnium oxide having a crystalline structure. Examples of the crystal structure include monoclinic and cubic crystals. The types are not limited to these.

[0090] In this embodiment, the insulating film 106 is a film made of a silicon nitride film and a silicon oxide film. A silicon nitride film has a higher dielectric constant than a silicon oxide film, and Since the film thickness required to obtain the same capacitance as a silicon film is large, the transistor 100 By including a silicon nitride film as the gate insulating film, the insulating film can be made thicker. This prevents the breakdown voltage of the transistor 100 from decreasing, and further improves the breakdown voltage, thereby Electrostatic breakdown of the transistor 100 can be suppressed.

[0091] [Oxide semiconductor film] The oxide semiconductor film 108 can be formed using the above-described materials.

[0092] When the oxide semiconductor film 108 is an In-M-Zn oxide, the In-M-Zn oxide is deposited. The atomic ratio of the metal elements in the sputtering target used for this purpose must satisfy the condition In>M. The atomic ratio of the metal elements in such a sputtering target is preferably In :M:Zn=2:1:3, In:M:Zn=3:1:2, In:M:Zn=4:2:4. 1, In:M:Zn=5:1:6, In:M:Zn=5:1:7, In:M:Zn=5: Examples include In:M:Zn=1:8, In:M:Zn=6:1:6, and In:M:Zn=5:2:5.

[0093] In addition, in the above-described <1-1-2. Configuration example 2 of the semiconductor device>, the oxide semiconductor film 1 If 08_2 is In-M-Zn oxide, it is used to form an In-M-Zn oxide film. The atomic ratio of the metal elements in the sputtering target must satisfy In≦M or Zn≦M. The atomic ratio of the metal elements in such a sputtering target is preferably In :M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=1:3: 2, In:M:Zn=1:3:4, In:M:Zn=1:3:6, etc.

[0094] In addition, when the oxide semiconductor film 108 is an In-M-Zn oxide, the sputtering target It is preferable to use a target containing polycrystalline In-M-Zn oxide. By using a target containing crystalline In-M-Zn oxide, it is possible to obtain a crystalline oxide semiconductor. The conductor film 108 can be easily formed. The atomic ratio of the oxide semiconductor film 108 to be formed is , the atomic ratio of the metal elements contained in the sputtering target is plus or minus 40 For example, the composition of the sputtering target used for the oxide semiconductor film 108 may vary. When the composition is In:Ga:Zn=4:2:4.1 [atomic ratio], the oxide semiconductor film formed is The composition of 108 may be close to In:Ga:Zn=4:2:3 [atomic ratio].

[0095] The oxide semiconductor film 108 has an energy gap of 2 eV or more, preferably 2.5 eV or more. eV or more. By using an oxide semiconductor with a wide energy gap, The off-state current of the transistor 100 can be reduced.

[0096] The oxide semiconductor film 108 preferably has a non-single-crystal structure. For example, CAAC-OS (C Axis Aligned Crystallinity) e Oxide Semiconductor), polycrystalline, microcrystalline, or amorphous Among non-single crystal structures, the amorphous structure has the highest defect level density, -OS has the lowest defect level density.

[0097] [Insulating film 1 that functions as a protective insulating film] The insulating films 114 and 116 function as protective insulating films for the transistor 100. In addition, the insulating films 114 and 116 have a function of supplying oxygen to the oxide semiconductor film 108. That is, the insulating films 114 and 116 contain oxygen. The insulating film 114 is an insulating film that can be formed as an insulating film 116 to be formed later. The oxide semiconductor film 108 also functions as a film for reducing damage to the oxide semiconductor film 108 during the etching.

[0098] The insulating film 114 has a thickness of 5 nm to 150 nm, preferably 5 nm to 50 Silicon oxide, silicon oxynitride, etc., having a thickness of 1 nm or less can be used.

[0099] Furthermore, it is preferable that the insulating film 114 has a small number of defects. The spin density of the signal at g=2.001 originating from the silicon dangling bond is 3 x 10 17 spins / cm 3 This is because the insulating film 114 is preferably If the density of defects contained is high, oxygen will be bonded to the defects, and the oxygen in the insulating film 114 will The permeability of

[0100] In the insulating film 114, all the oxygen that has entered the insulating film 114 from the outside is Some oxygen does not move to the outside of the insulating film 114 and remains in the insulating film 114. At the same time, oxygen contained in the insulating film 114 moves to the outside of the insulating film 114, Oxygen may move in the film 114. When the oxide insulating film capable of forming the insulating film 114 is formed, the insulating film 116 and the insulating film 116 are formed on the insulating film 114. The desorbed oxygen can be transferred to the oxide semiconductor film 108 through the insulating film 114. .

[0101] The insulating film 114 is formed using an oxide insulating film with a low density of states due to nitrogen oxides. Note that the density of states due to the nitrogen oxide can be determined by the valence Energy of the top of the electronic band (Ev_os) and energy of the bottom of the conduction band of the oxide semiconductor film The oxide insulating film may be formed between the gate electrode and the gate electrode of the nitride semiconductor layer. Silicon oxynitride film with low emission or aluminum oxynitride film with low nitrogen oxide emission For example, a silicon film or the like can be used.

[0102] The silicon oxynitride film, which emits a small amount of nitrogen oxides, was analyzed by thermal desorption spectroscopy (TD). In Thermal Desorption Spectroscopy (S), nitrogen This is a membrane that releases more ammonia than elemental oxides, and typically releases ammonia. The amount is 1 x 10 18 / cm 3 5x10 or more 19 / cm 3 The following is the ammonia release rate. The amount of leakage is determined when the surface temperature of the film is 50°C or higher and 650°C or lower, preferably 50°C or higher and 550°C or lower. This is the amount released by heat treatment.

[0103] Nitrogen oxides (NO x , x is greater than 0 and less than or equal to 2, preferably greater than or equal to 1 and less than or equal to 2), In this case, NO2 or NO forms a level in the insulating film 114, etc. The oxides of nitrogen are located within the energy gap of the insulating film 114. When the oxide semiconductor film 108 diffuses to the interface thereof, the level is changed to an electron level on the insulating film 114 side. As a result, the trapped electrons may be trapped in the insulating film 114 and the oxide film. Since the electrons remain near the interface of the semiconductor film 108, the threshold voltage of the transistor is shifted in the positive direction. It causes the

[0104] Nitrogen oxide reacts with ammonia and oxygen during heat treatment. The nitrogen oxide contained in the insulating film 116 reacts with the ammonia contained in the insulating film 116 during the heat treatment. Therefore, the nitrogen oxide contained in the insulating film 114 is reduced. Electrons are less likely to be trapped at the interface between the oxide semiconductor film 106 and the oxide semiconductor film 108.

[0105] By using the oxide insulating film as the insulating film 114, the threshold voltage of the transistor can be reduced. It is possible to reduce the shift in the electrical characteristics of the transistor. can.

[0106] Note that the heat treatment in the manufacturing process of a transistor is typically performed at a temperature of 300° C. or higher and lower than 350° C. By the heat treatment, the insulating film 114 shows the following characteristics in the spectrum obtained by ESR measurement at 100K or less. The first signal has a g value of 2.037 or more and 2.039 or less, and the second signal has a g value of 2.001 or more. A second signal less than .003 and a third signal with a g value between 1.964 and 1.966. The split width of the first signal and the second signal, and the The split width of the second signal and the third signal is about 5 in the X-band ESR measurement. mT. The first signal has a g value of 2.037 or more and 2.039 or less, and the g value is 2. A second signal between 0.001 and 2.003, and a g value between 1.964 and 1.966 The total spin density of the third signal is 1×10 18 spins / cm 3 Less than Typically, it is 1×10 17 spins / cm 3 More than 1×10 18 spins / cm 3 Not yet It is full.

[0107] In the ESR spectrum below 100K, the g value is between 2.037 and 2.039. The first signal below, the second signal with a g-value between 2.001 and 2.003, and the g-value The sum of the spin densities of the third signal, where is between 1.964 and 1.966, is the nitrogen oxide Monster (NO x x is greater than 0 and less than or equal to 2, preferably greater than or equal to 1 and less than or equal to 2) It corresponds to the total density of pins. Typical examples of nitrogen oxides include nitrogen monoxide and nitrogen dioxide. That is, the first signal has a g value of 2.037 or more and 2.039 or less, and the second signal has a g value of 2.001 or more. A second signal greater than or equal to 2.003 and less than or equal to 2.003, and a g-value greater than or equal to 1.964 and less than or equal to 1.966 The smaller the total spin density of the third signal, the more nitrogen oxides are contained in the oxide insulating film. It can be said that the content is low.

[0108] The oxide insulating film has a nitrogen concentration of 6×10 as measured by SIMS. 20 atoms / cm 3 The following is the result.

[0109] The substrate temperature is between 220℃ and 350℃, and PEC using silane and nitrous oxide is used. By forming the oxide insulating film using a VD method, a dense and hard film can be obtained. It can be formed.

[0110] The insulating film 116 is an oxide insulating film containing more oxygen than the oxygen required for the stoichiometric composition. When the oxide insulating film is heated, some of the oxygen is released. The oxide insulating film has an oxygen release rate of 1.0×10 19 atoms / cm 3 That's all good Preferably 3.0 x 10 20 atoms / cm 3 The above region is also The amount of release is determined when the temperature of the heat treatment in TDS is between 50°C and 650°C, or between 50°C and 650°C. The total amount of oxygen released is in the range of 550℃ or less. This is the total amount converted into atoms.

[0111] The insulating film 116 has a thickness of 30 nm to 500 nm, preferably 50 nm or more. Silicon oxide, silicon oxynitride, etc., of 400 nm or less can be used.

[0112] Furthermore, it is preferable that the insulating film 116 has a small number of defects. The spin density of the signal at g=2.001 originating from the silicon dangling bond is 1.5 x 10 18 spins / cm 3 Less than, or even 1×10 18 spins / cm 3 It is preferable that the insulating film 116 has a higher oxide semiconductor content than the insulating film 114. Since it is separated from the insulating film 108, it may have a higher defect density than the insulating film 114.

[0113] In addition, the insulating films 114 and 116 can be made of the same material, so that the insulating film In some cases, the interface between the film 114 and the insulating film 116 cannot be clearly seen. In this embodiment, the interface between the insulating film 114 and the insulating film 116 is shown by a broken line. In the embodiment, the two-layer structure of the insulating film 114 and the insulating film 116 has been described. However, the present invention is not limited to this, and may be applied to, for example, a single layer structure of the insulating film 114 or a laminated structure of three or more layers. Good too.

[0114] [Insulating film 2 that functions as a protective insulating film] The insulating film 118 functions as a protective insulating film for the transistor 100.

[0115] The insulating film 118 contains either hydrogen or nitrogen, or both. The insulating film 118 contains nitrogen and silicon. The insulating film 118 contains oxygen, hydrogen, water, and alkali. The insulating film 118 has a function of blocking metals, alkaline earth metals, etc. As a result, oxygen diffuses from the oxide semiconductor film 108 to the outside, and oxygen contained in the insulating films 114 and 116 is The diffusion of oxygen from the oxide semiconductor film 108 to the outside and the penetration of hydrogen, water, and the like from the outside into the oxide semiconductor film 108 are prevented. It can be prevented.

[0116] The insulating film 118 may be, for example, a nitride insulating film. Examples include silicon nitride, silicon nitride oxide, aluminum nitride, and aluminum nitride oxide. etc.

[0117] The various films such as the conductive film, insulating film, oxide semiconductor film, and metal film described above include The film can be formed by sputtering or PECVD, but other methods, such as Even if it is formed by thermal CVD (Chemical Vapor Deposition) method, An example of a thermal CVD method is MOCVD (Metal Organic Chemical Vapor Deposition). Vapor Deposition (Vapor Deposition) method or Atomic Layer Deposition (ALD) method Deposition method.

[0118] The thermal CVD method is a film formation method that does not use plasma, so defects can occur due to plasma damage. In addition, the thermal CVD method has the advantage that the source gas is not generated in a chamber. The pressure in the chamber is then atmospheric or reduced, and a film is deposited on the substrate. .

[0119] In the ALD method, raw material gas is sent into a chamber, and the chamber is heated to atmospheric pressure or The pressure is reduced and a film is deposited on the substrate.

[0120] <1-3. Configuration example 2 of semiconductor device> Next, modifications of the transistor 100 shown in FIGS. 1A, 1B, and 1C will be described with reference to FIGS. This will be explained using Figure 6.

[0121] FIG. 2A is a top view of a transistor 100A which is a semiconductor device of one embodiment of the present invention. 2(B) corresponds to a cross-sectional view of the cut surface between the dashed line X1-X2 shown in FIG. 2(A). 2(C) is a cross-sectional view taken along the dashed line Y1-Y2 in FIG. 2(A). Equivalent.

[0122] The transistor 100A shown in FIGS. 2A and 2B is a so-called channel protection transistor. As described above, the semiconductor device of one embodiment of the present invention has a channel-etched structure and a channel-etched structure. The transistor structure can be either a channel-protected or channel-protected type.

[0123] In the transistor 100A, the insulating films 114 and 116 have openings 141a, The oxide semiconductor film 108 is electrically connected to the insulating film 106 through the openings 141a and 141b. The conductive films 112a and 112b are connected to each other. The insulating films 114 and 116 are used as so-called channel protection films. The other components of the transistor 100A are the same as those of the transistor 100A shown above. It is the same as 100 and has the same effect.

[0124] FIG. 3A is a top view of a transistor 100B, which is a semiconductor device of one embodiment of the present invention. 3(B) is a cross section taken along the dashed line X1-X2 shown in FIG. 3(A). 3(C) is a cross-sectional view taken along the dashed line Y1-Y2 in FIG. 3(A). This corresponds to a plan view.

[0125] The transistor 100B includes a conductive film 104 on a substrate 102 and a conductive film 105 on the substrate 102. The insulating film 106 on the oxide semiconductor film 104, the oxide semiconductor film 108 on the insulating film 106, and the oxide semiconductor film 10 8, the conductive film 112b on the oxide semiconductor film 108, and the oxide semiconductor film 108, the insulating film 114 on the conductive film 112a and the conductive film 112b, and the insulating film 114 an insulating film 116, a conductive film 120a on the insulating film 116, and a conductive film 120b on the insulating film 116; , an insulating film 116, a conductive film 120a, and an insulating film 118 over the conductive film 120b.

[0126] The insulating films 114 and 116 have openings 142a. 4 and 116 have openings 142b. The conductive film 120a is The conductive film 120b is electrically connected to the conductive film 104. The conductive film 120b is also electrically connected to the conductive film 104 through the opening 142a. , and is electrically connected to the conductive film 112b.

[0127] In the transistor 100B, the insulating film 106 is The insulating films 114 and 116 function as gate insulating films for the transistor 100B. The insulating film 118 functions as a second gate insulating film and serves to protect the transistor 100B. The conductive film 104 in the transistor 100B functions as an insulating film. The conductive film 112a functions as a first gate electrode, and the conductive film 112b functions as a source electrode. The conductive film 112b functions as a drain electrode. In B, the conductive film 120a functions as a second gate electrode, and the conductive film 120b has a function as a pixel electrode of the display device.

[0128] As shown in FIG. 3C, the conductive film 120a is exposed to the conductive film 1 through the opening 142b. Therefore, the conductive film 104 and the conductive film 120a have the same potential. Given.

[0129] As shown in FIG. 3C, the oxide semiconductor film 108 is formed by the conductive film 104 and the conductive film 120a and is sandwiched between two conductive films that function as gate electrodes. The length of the conductive film 120a in the channel length direction and the length of the conductive film 120a in the channel width direction are The length of the oxide semiconductor film 108 in the channel length direction and the thickness of the oxide semiconductor film 108 in the channel length direction are The oxide semiconductor film 108 is entirely covered with the insulating film 114, 116 and is covered with a conductive film 120a.

[0130] In other words, the conductive film 104 and the conductive film 120a are provided on the insulating films 106, 114, and 116. The oxide semiconductor film 108 is connected to the opening formed in the opening and positioned outside the side edge of the oxide semiconductor film 108. It has an area where

[0131] With this configuration, the oxide semiconductor film 10 included in the transistor 100B The transistor 8 can be electrically surrounded by the electric field of the conductive film 104 and the conductive film 120a. As in the transistor 100B, the electric field of the first gate electrode and the second gate electrode The device structure of the transistor electrically surrounds the oxide semiconductor film in which the channel region is formed. This can be called a Surrounded Channel (S-Channel) structure. .

[0132] The transistor 100B has an S-channel structure, and therefore has a first gate electrode and The conductive film 104 functions as a gate electrode, and the electric field for inducing the channel is effectively applied to the oxide semiconductor. Since the voltage can be applied to the conductive film 108, the current driving capability of the transistor 100B is improved. This makes it possible to obtain high on-state current characteristics. Therefore, it is possible to miniaturize the transistor 100B. 00B, the oxide semiconductor film 108 is formed on the conductive film 104 which functions as a first gate electrode and the conductive film 104 which functions as a second gate electrode. Since the gate electrode is surrounded by the conductive film 120a which functions as the second gate electrode, This increases the mechanical strength of the transistor 100B.

[0133] The conductive films 120a and 120b are the conductive films 104, 112a, and 112b shown above. In particular, the conductive films 120a and 120b may be made of the same materials as those listed in the above. An oxide conductive film (OC) is preferable. By using this, oxygen can be added to the insulating films 114 and 116.

[0134] The other configurations of the transistor 100B are the same as those of the transistor 100 shown above. and has the same effect.

[0135] FIG. 4A is a top view of a transistor 100C, which is a semiconductor device of one embodiment of the present invention. 4(B) is a cross section taken along the dashed line X1-X2 shown in FIG. 4(A). 4(C) is a cross-sectional view taken along the dashed line Y1-Y2 in FIG. 4(A). This corresponds to a plan view.

[0136] The transistor 100C has the same structure as the transistor 100B except for the conductive films 112a and 112b. 12b is a three-layer laminated structure.

[0137] The conductive film 112a of the transistor 100C includes a conductive film 112a_1 and a conductive film 11 The conductive film 112a_2 on the conductive film 112a_1 and the conductive film 112a_3 on the conductive film 112a_2 are The conductive film 112b included in the transistor 100C is a conductive film 112b_1. , the conductive film 112b_2 on the conductive film 112b_1, and the conductive film 112b_2 on the conductive film 112b_2. b_3 and

[0138] For example, the conductive film 112a_1, the conductive film 112b_1, the conductive film 112a_3, and the conductive film 112b_3 includes titanium, tungsten, tantalum, molybdenum, indium, and gallium. It is preferable that the metal oxide contains one or more selected from the group consisting of sodium, tin, and zinc. The conductive films 112a_2 and 112b_2 are made of copper, aluminum, and silver. It is preferable to have one or more selected from the following:

[0139] More specifically, the conductive film 112a_1, the conductive film 112b_1, the conductive film 112a_3, and and the conductive film 112b_3 is made of In—Sn oxide or In—Zn oxide, and the conductive film 112 Copper can be used for the conductive film 112a_2 and the conductive film 112b_2.

[0140] With the above structure, the wiring resistance of the conductive films 112a and 112b is reduced, and the oxide semiconductor This is preferable because it can suppress the diffusion of copper into the conductive film 108. This is preferable because it can reduce the connection resistance between the conductive film 112b and the conductive film 120b. The other configurations of the transistor 100C are the same as those of the transistor 100 shown above. and has the same effect.

[0141] FIG. 5A is a top view of a transistor 100D, which is a semiconductor device of one embodiment of the present invention. 5(B) is a cross section taken along the dashed line X1-X2 shown in FIG. 5(A). 5(C) is a cross-sectional view taken along the dashed line Y1-Y2 in FIG. 5(A). This corresponds to a plan view.

[0142] The transistor 100D has the same structure as the transistor 100B except for the conductive films 112a and 112b. The transistor 100D has a three-layer structure. The conductive films 112a and 112b of the transistor 100C and the shapes of the conductive films 112a and 112b The shapes are different.

[0143] The conductive film 112a included in the transistor 100D is a conductive film 112a_1 and a conductive film 11 The conductive film 112a_2 on the conductive film 112a_1 and the conductive film 112a_3 on the conductive film 112a_2 are The conductive film 112b included in the transistor 100C is a conductive film 112b_1. , the conductive film 112b_2 on the conductive film 112b_1, and the conductive film 112b_2 on the conductive film 112b_2. b_3. _3, the conductive film 112b_1, the conductive film 112b_2, and the conductive film 112b_3 are The materials shown in the following can be used.

[0144] In addition, the end of the conductive film 112a_1 is positioned outside the end of the conductive film 112a_2. The conductive film 112a_3 covers the upper surface and side surfaces of the conductive film 112a_2 and has a conductive The conductive film 112b_1 has an area in contact with the conductive film 112a_1. The conductive film 112b_3 has an area located outside the end of the conductive film 112b_2. The conductive film 112b_1 covers the upper and side surfaces of the conductive film 2b_2 and has a region in contact with the conductive film 112b_1.

[0145] With the above structure, the wiring resistance of the conductive films 112a and 112b is reduced, and the oxide semiconductor This is preferable because it can suppress the diffusion of copper into the conductive film 108. The structure shown in transistor 100D is more effective in suppressing copper diffusion than that of transistor 100C. Moreover, by adopting the above-described configuration, the connection between the conductive film 112b and the conductive film 120b can be improved. This is preferable because the resistance can be reduced. The structure is the same as that of the transistor 100 shown above, and the same effects are achieved.

[0146] FIG. 6A is a top view of a transistor 100E, which is a semiconductor device of one embodiment of the present invention. 6(B) is a cross section taken along the dashed line X1-X2 shown in FIG. 6(A). 6(C) is a cross-sectional view taken along the dashed line Y1-Y2 in FIG. 6(A). This corresponds to a plan view.

[0147] The transistor 100E is a transistor 100D shown above, and a conductive film 120a, 120b, and a conductive film 120c. Specifically, the conductive films 120a and 120b of the transistor 100E are located at the positions The transistor 100E is located on the insulating film 118. The other components of the transistor 100E are the same as those of the transistor 100A shown above. It is similar to the transistor 100D and has the same effect.

[0148] Moreover, the transistor according to this embodiment is a transistor having the above structure, which is independently They can be freely combined.

[0149] <1-4. Configuration example 3 of semiconductor device> The transistors 100, 100A, 100B, 100C, and 100D shown in FIGS. and another form of 100E will be described.

[0150] The transistors 100, 100A, 100B, 100C, 100D, and 100 In E, the ratio of the number of In atoms to the number of Zn atoms in the oxide semiconductor film 108_1 is The ratio of the number of In atoms to the number of Zn atoms in the compound semiconductor film 108_2 may be larger than that in the compound semiconductor film 108_3. The metal elements of the oxide semiconductor films 108_1 and 108_2 that satisfy the above conditions are The atomic ratio of the above is explained below.

[0151] For example, the ratio of the number of In atoms to the number of M atoms and the number of Zn atoms in the oxide semiconductor film 108_1 is set to In The ratio of In, M, and Zn in the oxide semiconductor film 108_2 is preferably about 4:2:3. It is preferable that the ratio of the number of In and Zn atoms is approximately In:M:Zn=1:1:1. Near the center is when In is 1, M is 0.5 or more and 1.5 or less, and Zn is 0.1 or more and 2. Alternatively, the ratio of the number of In atoms to the number of M atoms to the number of Zn atoms in the oxide semiconductor film 108_2 may be set to: It is preferable that In:M:Zn=5:1:6 or so. Here, "nearly" means that when In is 5, , M is 0.5 or more and 1.5 or less, and Zn is 5 or more and 7 or less.

[0152] In addition, the oxide semiconductor film 108_1 has a higher electron affinity than the oxide semiconductor film 108_2. The electron affinity of the oxide semiconductor film 108_1 and the electron affinity of the oxide semiconductor film 108_2 are The difference is 0.15 eV or more, or 0.5 eV or more and 2 eV or less, or 1 eV or less That is, the oxide semiconductor film 108_2 is preferably The energy level of the conduction band minimum is closer to the vacuum level than that of _1, and is typically an oxide semiconductor film. The energy level of the conduction band minimum of the oxide semiconductor film 108_1 and the energy level of the conduction band minimum of the oxide semiconductor film 108_2 are The difference between the energy levels is 0.15 eV or more, or 0.5 eV or more and 2 eV or less, Alternatively, it is preferably 1 eV or less.

[0153] With such a structure, the oxide semiconductor film 108 That is, the oxide semiconductor film 108_1 serves as a channel region. The oxide semiconductor film 108_2 has a function of forming a channel region. An oxide semiconductor film composed of the same metal element as that constituting the semiconductor film 108_1. With this structure, the oxide semiconductor film 108_1 and the oxide semiconductor film At the interface with 108_2, the interface scattering is unlikely to occur. Since the movement of electrons is not hindered, the field-effect mobility of the transistor is increased.

[0154] Furthermore, by having such a configuration, the transistor 100 can be prevented from increasing the drain voltage. It is possible to suppress the fluctuation of threshold voltage depending on the size of the transistor, and the reliability of the transistor is improved. can be increased.

[0155] The oxide semiconductor film 108_1 and the oxide semiconductor film 108_2 are each independently formed of In The atomic ratio of M is greater than the atomic ratio of M, so that the field effect of the transistor 100 Specifically, the field effect mobility of the transistor 100 can be increased to 5 0cm 2 / Vs, and more preferably the field effect mobility of the transistor 100 is greater than 10 0cm 2 / Vs. The oxide semiconductor film 108 is made of an oxide semiconductor having a large ratio of In atoms to Zn atoms. By using the oxide semiconductor film 108_1 as the first insulating film, the oxide semiconductor film 108_1 functions as a channel and serves as a main current path. Since the current path can be separated from the back channel, It is possible to reduce electron traps, which results in a reduction in the fluctuation of the electrical characteristics of the transistor. can be reduced.

[0156] By increasing the atomic ratio of Zn to the total of In, M, and Zn, the oxide semiconductor film can be formed. The crystallinity can be improved. An oxide semiconductor film with high crystallinity can be formed by removing impurities such as hydrogen or In this case, water or constituent elements used in the conductive films 112a and 112b are less likely to diffuse into the film. The CAAC-OS film has such excellent properties. When the atomic ratio of the metal elements is in the above range, the oxide semiconductor film 108_1 and the oxide semiconductor film 108_2 can be The amount of impurities in the conductive film 108_2 can be reduced. can function as an etching stopper, allowing for different transistors In this case, the thickness of the oxide semiconductor film 108 is varied due to etching of the conductive films 122a and 112b. In this manner, adhesion can be reduced. The atomic ratio of metal elements, at least In and Zn, contained in each film 108_2 is changed. This improves the field effect mobility of the transistor 100 and Reliability can be improved.

[0157] <1-5-1. Manufacturing method 1 of semiconductor device> Next, a method for manufacturing the transistor 100B, which is a semiconductor device of one embodiment of the present invention, will be described. This will be explained with reference to FIGS.

[0158] 7(A) to 7(C), 8(A) to 8(C), 9(A) to 9(C), 10(C) and 10(A) to 10(C) are cross-sectional views illustrating a method for manufacturing a semiconductor device. 7(A) to 7(C), 8(A) to 8(C), and 9(A) to 9(C). 9(C) and 10(A) to 10(C), the left side is a cross-sectional view in the channel length direction. The right side is a cross-sectional view in the channel width direction.

[0159] First, a conductive film is formed on the substrate 102, and the conductive film is then subjected to a lithography process and an etching process. Then, a conductive film 104 is formed, which functions as a first gate electrode. An insulating film 106 that functions as a first gate insulating film is formed on the conductive film 104 (FIG. 7(A)). reference).

[0160] In this embodiment, a glass substrate is used as the substrate 102, and a gate electrode is formed on the substrate 102. The conductive film 104 is made of a titanium film having a thickness of 50 nm and a copper film having a thickness of 200 nm. The insulating film 106 is formed by a nitride film having a thickness of 400 nm. A silicon film and a silicon oxynitride film having a thickness of 50 nm are formed by PECVD.

[0161] The silicon nitride film includes a first silicon nitride film, a second silicon nitride film, and a third silicon nitride film. The silicon nitride film is a three-layer laminated structure. An example of the three-layer laminated structure is as follows: It can be formed as follows:

[0162] The first silicon nitride film is formed by, for example, silane at a flow rate of 200 sccm, PE-CV was performed using nitrogen at a flow rate of 100 sccm and ammonia gas at a flow rate of 100 sccm as source gases. The pressure in the reaction chamber was controlled to 100 Pa, and a 27.12 MHz high frequency was generated. If a power of 2000 W is supplied using a frequency power supply and the thickness is formed to be 50 nm, good.

[0163] For the second silicon nitride film, silane at a flow rate of 200 sccm and 2000 sccm The PECVD equipment was operated using nitrogen at a flow rate of 2000 sccm and ammonia gas at a flow rate of 2000 sccm as raw material gases. The pressure in the reaction chamber was controlled to 100 Pa, and a 27.12 MHz high frequency power supply A power of 2000 W may be supplied using a heater to form the film to a thickness of 300 nm.

[0164] The third silicon nitride film was formed using silane at a flow rate of 200 sccm and silane at a flow rate of 5000 sccm. The pressure in the reaction chamber was adjusted to 100 The thickness was measured by controlling the temperature to 50 Pa and supplying 2000 W of power using a 27.12 MHz high frequency power supply. It is sufficient to form it so that the thickness is 50 nm.

[0165] The first silicon nitride film, the second silicon nitride film, and the third silicon nitride film The substrate temperature during the formation can be 350° C. or less.

[0166] By forming the silicon nitride film into the above-mentioned three-layer laminated structure, for example, the conductive film 104 can be formed by containing copper. When a conductive film containing the conductive material is used, the following effects are achieved.

[0167] The first silicon nitride film can suppress the diffusion of copper elements from the conductive film 104. The second silicon nitride film has a function of releasing hydrogen and acts as an insulating film that functions as a gate insulating film. The third silicon nitride film can improve the breakdown voltage of the film. The hydrogen released from the second silicon nitride film is small, and the diffusion of the hydrogen released from the second silicon nitride film is suppressed. It is possible.

[0168] Next, an oxide semiconductor film 108_1_0 and an oxide semiconductor film 108_1_1 are formed over the insulating film 106. 2_0 is formed (see Figures 7(B) and (C)).

[0169] Note that in FIG. 7B, the oxide semiconductor film 108_1_0 and the oxide semiconductor film 108_1_1 are formed over the insulating film 106. 7B is a cross-sectional view of the inside of a film forming apparatus when forming a conductive film 108_2_0. A sputtering device was used as the film forming device, and a A target 191 and a plasma 192 formed below the target 191 are shown in schematic form. is represented in.

[0170] In FIG. 7B, oxygen or excess oxygen added to the insulating film 106 is schematically shown. For example, when the oxide semiconductor film 108_1_0 is formed, oxygen gas is used. When used, oxygen can be suitably added to the insulating film 106 .

[0171] First, an oxide semiconductor film 108_1_0 is formed over the insulating film 106. The thickness of 08_1_0 is 1 nm or more and 25 nm or less, preferably 5 nm or more and 20 nm or less. The oxide semiconductor film 108_1_0 may be formed by ionizing an inert gas (typically, A It is formed using either or both of oxide semiconductors. The ratio of oxygen gas to the total deposition gas when forming the thin film 108_1_0 (hereinafter referred to as oxygen flow) The content (also referred to as the amount ratio) is 0% or more and less than 30%, preferably 5% or more and 15% or less.

[0172] By forming the oxide semiconductor film 108_1_0 with the oxygen flow rate ratio in the above range, The crystallinity of the oxide semiconductor film 108_1_0 can be made lower than that of the oxide semiconductor film 108_2_0. do.

[0173] Subsequently, the oxide semiconductor film 108_2_0 is formed on the oxide semiconductor film 108_1_0. Note that when the oxide semiconductor film 108_2_0 is formed, the plating is performed in an atmosphere containing oxygen gas. At this time, the oxide semiconductor film 108_2_0 is formed on the surface of the oxide semiconductor film 108_2_0. Oxygen is added to the conductive film 108_1_0. The oxygen flow rate during the synthesis is 30% or more and 100% or less, preferably 50% or more and 100% or less. % or less, and more preferably 70% or more and 100% or less.

[0174] The thickness of the oxide semiconductor film 108_2_0 is 20 nm or more and 100 nm or less. Preferably, the thickness is set to 20 nm or more and 50 nm or less.

[0175] As described above, the oxide semiconductor film 108_2_0 is formed under the following conditions: In other words, it is preferable that the oxygen flow rate ratio of the oxide semiconductor film 108_1_0 is higher than that of the oxide semiconductor film 108_1_0. The oxide semiconductor film 108_1_0 is formed at a lower oxygen partial pressure than the oxide semiconductor film 108_2_0. preferable.

[0176] In addition, when the oxide semiconductor films 108_1_0 and 108_2_0 are formed, The substrate temperature is from room temperature (25°C) to 200°C, preferably from room temperature to 130°C. By setting the substrate temperature in the above range, it is possible to form a large-area glass substrate (for example, This is particularly suitable when using an oxide semiconductor substrate (such as the 8th to 10th generation glass substrates). The substrate temperature during the deposition of the conductive film 108_1_0 and the oxide semiconductor film 108_2_0 is By setting the temperature at room temperature, bending or distortion of the substrate can be suppressed. When it is desired to improve the crystallinity of the oxide semiconductor film 108_2_0, It is preferable to increase the substrate temperature during the formation.

[0177] Note that the oxide semiconductor films 108_1_0 and 108_2_0 were grown in vacuum. By forming them successively, impurities are not introduced into the interfaces, which is more preferable.

[0178] In addition, the sputtering gas must be highly purified. The oxygen gas and argon gas used in this process have a dew point of -40°C or less, preferably -80°C or less, and Preferably, the gas is purified to a temperature of -100°C or lower, more preferably -120°C or lower. By using the oxide semiconductor film, it is possible to prevent moisture and the like from being taken into the oxide semiconductor film as much as possible. .

[0179] In addition, when the oxide semiconductor film is formed by sputtering, The chamber is cladded to remove as much water as possible, which is an impurity for the oxide semiconductor film. A high vacuum (5×10) was created using an adsorption type vacuum pump such as an ion pump. -7 Pa to 1 x10 -4 It is preferable to evacuate the air to a pressure of about 100 Pa. At this time, the gas molecules equivalent to H2O in the chamber (gas molecules equivalent to m / z = 18) The partial pressure of the -4 Pa or less, preferably 5 x 10 -5 It is preferable that the temperature is 1000 Pa or less. stomach.

[0180] In this embodiment, the oxide semiconductor film 108_1_0 is formed under the conditions of In—Ga— Using a Zn metal oxide target (In:Ga:Zn=4:2:4.1 [atomic ratio]) The oxide semiconductor film 108_1_0 is formed by a sputtering method. The substrate temperature was set to room temperature, and the deposition gases were argon gas with a flow rate of 180 sccm and argon gas with a flow rate of 20 sccm. cm of oxygen gas (oxygen flow rate 10%).

[0181] The oxide semiconductor film 108_2_0 was formed under the conditions of In-Ga-Zn metal oxide. Using a metal target (In:Ga:Zn=4:2:4.1 [atomic ratio]), sputtering was performed. The oxide semiconductor film 108_2_0 is formed by a coating method. As the film forming gas, oxygen gas with a flow rate of 200 sccm is used (oxygen flow rate ratio 100%).

[0182] The oxygen flow during the formation of the oxide semiconductor film 108_1_0 and the oxide semiconductor film 108_2_0 By changing the ratio of the amounts, it is possible to form laminated films with different crystallinity.

[0183] Next, the oxide semiconductor films 108_1_0 and 108_2_0 are formed into desired shapes. By processing the oxide semiconductor film 108_1 into an island-shaped oxide semiconductor film 108_2, the oxide semiconductor film 10 In this embodiment, the oxide semiconductor film 108_1 and the oxide semiconductor film 8_2 are formed. The oxide semiconductor film 108_2 forms an island-shaped oxide semiconductor film 108 (FIG. 8(A)). reference).

[0184] After the oxide semiconductor film 108 is formed, heat treatment (hereinafter referred to as first heat treatment) is performed. The first heat treatment is preferably performed to remove hydrogen contained in the oxide semiconductor film 108. It is possible to reduce the amount of water and the like. Note that the heat treatment for the purpose of reducing hydrogen, water, and the like is The first heat treatment may be performed before processing the semiconductor film 108 into an island shape. This is one of the processes for purifying conductive films.

[0185] The first heat treatment is carried out at a temperature of, for example, 150° C. or higher and lower than the distortion point of the substrate, preferably 200° C. °C or higher and 450 °C or lower, and more preferably 250 °C or higher and 350 °C or lower.

[0186] The first heat treatment can be performed using an electric furnace, an RTA device, or the like. By using this, it is possible to perform heat treatment at a temperature above the strain point of the substrate for a short period of time. Therefore, the heating time can be shortened. Dry air (water content less than 20 ppm, preferably less than 1 ppm, preferably less than 10 ppm) The reaction can be carried out under an atmosphere of air (air below 100°C) or a rare gas (argon, helium, etc.). It is preferable that the nitrogen, oxygen, ultra-dry air, or rare gas does not contain hydrogen, water, etc. In addition, after heat treatment in a nitrogen or rare gas atmosphere, heating in an oxygen or ultra-dry air atmosphere As a result, hydrogen, water, and the like contained in the oxide semiconductor film are released, and the oxide semiconductor film is desorbed. As a result, oxygen contained in the oxide semiconductor film can be supplied to the oxide semiconductor film. Oxygen deficiency can be reduced.

[0187] Next, a conductive film 112 is formed over the insulating film 106 and the oxide semiconductor film 108 (FIG. 8( See B).

[0188] In this embodiment, the conductive film 112 is a titanium film having a thickness of 30 nm and a SiO 2 film having a thickness of 200 nm. A copper film having a thickness of 10 nm and a titanium film having a thickness of 10 nm are formed in this order by sputtering. do.

[0189] Next, the conductive film 112 is processed into a desired shape to form an island-shaped conductive film 112a and an island-shaped conductive film 112b. A conductive film 112b is formed (see FIG. 8C).

[0190] In this embodiment, the conductive film 112 is processed using a wet etching apparatus. However, the method for processing the conductive film 112 is not limited to this. For example, a dry air An etching device may also be used.

[0191] After the conductive films 112a and 112b are formed, the oxide semiconductor film 108 (more specifically, The surface (back channel side) of the oxide semiconductor film 108_2 may be cleaned. For example, cleaning using a chemical solution such as phosphoric acid can be used. By performing the cleaning, impurities (for example, conductive impurities) attached to the surface of the oxide semiconductor film 108_2 can be removed. The cleaning can remove elements contained in the films 112a and 112b. It is not necessarily necessary to perform this step, and in some cases, cleaning may not be necessary.

[0192] In addition, either one of the steps of forming the conductive films 112a and 112b and the cleaning step may be performed. In either case, the region of the oxide semiconductor film 108 exposed from the conductive films 112a and 112b is However, it may become thinner.

[0193] In the semiconductor device of one embodiment of the present invention, the conductive films 112a and 112b are not exposed. The oxide semiconductor film 108_2 is an oxide semiconductor film with improved crystallinity. The oxide semiconductor film with high crystallinity is a film containing impurities, particularly, a film containing impurities in the conductive films 112a and 112b. This structure makes it difficult for the constituent elements to diffuse into the film, thereby providing a highly reliable semiconductor device. It is possible.

[0194] 8C, the oxide semiconductor film 112 is exposed from the conductive films 112a and 112b. When a recess is formed on the surface of the oxide semiconductor film 108_2, that is, on the surface of the oxide semiconductor film 108_2, However, the present invention is not limited to this example. The surface of 108 may not have any recesses.

[0195] Next, the insulating film 114 and the conductive films 112a and 112b are formed over the oxide semiconductor film 108 and the conductive films 112a and 112b. An insulating film 116 is formed (see FIG. 9(A)).

[0196] After the insulating film 114 is formed, the insulating film 116 is successively formed without exposure to the air. After the insulating film 114 is formed, it is preferable to control the flow rate, pressure, and temperature of the source gas without exposing the insulating film 114 to the atmosphere. By adjusting one or more of the frequency power and the substrate temperature, the insulating film 116 is continuously formed. The concentration of impurities derived from atmospheric components can be reduced at the interface between the insulating film 114 and the insulating film 116. can.

[0197] For example, a silicon oxynitride film is formed as the insulating film 114 by using a PECVD method. In this case, the source gas may be a deposition gas containing silicon and an oxidizing gas. It is preferable to use the following gases. Typical examples of deposition gases containing silicon include silane, disilane, and the like. Examples of oxidizing gases include nitrous oxide, nitrous dioxide, etc. In addition, the flow rate of the oxidizing gas is set to 20 times or more than 50 times the flow rate of the deposition gas. 0 times or less, preferably 40 times or more and 100 times or less.

[0198] In this embodiment, the insulating film 114 is formed by heating the substrate 102 at a temperature of 220°C. Silane at a flow rate of 50 sccm and dinitrogen monoxide at a flow rate of 2000 sccm were used as source gases. The pressure in the processing chamber was set to 20 Pa, and the high frequency power supplied to the parallel plate electrodes was set to 13.56 M. Hz, 100W (power density is 1.6 x 10 -2 W / cm 2 ) PECVD method A silicon oxynitride film is formed using the silicon oxynitride film.

[0199] The insulating film 116 is formed by depositing a substrate placed in a vacuum-evacuated processing chamber of a PECVD device. The temperature is kept at 180°C or higher and 350°C or lower, and the raw material gas is introduced into the processing chamber to increase the pressure in the processing chamber. is set to 100 Pa or more and 250 Pa or less, more preferably 100 Pa or more and 200 Pa or less. , 0.17 W / cm to the electrode installed in the processing chamber 2 More than 0.5W / cm 2 Below are some more good ones: Preferably 0.25W / cm 2 More than 0.35W / cm 2 The following high frequency power supply conditions are met: In this way, a silicon oxide film or a silicon oxynitride film is formed.

[0200] The conditions for forming the insulating film 116 are as follows: a high frequency voltage of the above power density in a reaction chamber of the above pressure; By supplying power, the decomposition efficiency of the source gas in the plasma increases, and oxygen radicals increase. As the oxidation of the source gas progresses, the oxygen content in the insulating film 116 becomes higher than the stoichiometric composition. On the other hand, in the film formed at the above substrate temperature, the bonding strength between silicon and oxygen is As a result, the stoichiometric amount of oxygen in the film is reduced by the heat treatment in the subsequent process. Oxides that contain more oxygen than the stoichiometric composition and lose some of the oxygen when heated An insulating film can be formed.

[0201] In the step of forming the insulating film 116, the insulating film 114 serves as a protection film for the oxide semiconductor film 108. Therefore, the power density can be reduced while reducing damage to the oxide semiconductor film 108. The insulating film 116 can be formed using high radio frequency power.

[0202] In the film formation conditions for the insulating film 116, a deposition gas containing silicon is mixed with an oxidizing gas. By increasing the flow rate of the gas, it is possible to reduce the number of defects in the insulating film 116. In the ESR measurement, the g value of 2.001, which is due to the dangling bond of silicon, The spin density of the signal is 6×10 17 spins / cm 3 Less than 3 x 10 17 spins / cm 3 Less than or equal to 1.5 × 10 17 spins / cm 3 The following is a missing An oxide insulating film with few defects can be formed. As a result, the signal quality of the transistor 100 can be improved. It can increase reliability.

[0203] After the insulating films 114 and 116 are formed, heat treatment (hereinafter referred to as second heat treatment) is performed. The second heat treatment is preferably performed to remove nitrogen oxides contained in the insulating films 114 and 116. Alternatively, the second heat treatment can reduce the amount of oxides in the insulating films 114 and 116. Part of the oxygen contained in the oxide semiconductor film 108 is transferred to the oxide semiconductor film 108. This can reduce oxygen deficiency.

[0204] The temperature of the second heat treatment is typically less than 400°C, preferably less than 375°C, and The second heat treatment is preferably performed at a temperature of 150° C. or higher and 350° C. or lower. Dry air (water content is 20 ppm or less, preferably 1 ppm or less, preferably 10 ppb The reaction may be carried out under an atmosphere of air (see below) or a rare gas (argon, helium, etc.). It is preferable that the nitrogen, oxygen, ultra-dry air, or rare gas does not contain hydrogen, water, etc. The heat treatment can be performed using an electric furnace, RTA, or the like.

[0205] Next, openings 142a and 142b are formed in desired regions of the insulating films 114 and 116 (see FIG. 9(B)).

[0206] In this embodiment, the openings 142a and 142b are formed using a dry etching device. The opening 142a reaches the conductive film 112b, and the opening 142b reaches the conductive film 112b. It reaches the membrane 104 .

[0207] Next, a conductive film 120 is formed over the insulating film 116 (see FIG. 9C and FIG. 10A). .

[0208] 9C is a cross-sectional view of the inside of a film forming apparatus when a conductive film 120 is formed on the insulating film 116. In FIG. 9(C), a sputtering device is used as the film forming device. The target 193 is installed inside the targeting device, and the target 193 is formed below the target 193. The plasma 194 is shown schematically.

[0209] First, when forming the conductive film 120, plasma is discharged in an atmosphere containing oxygen gas. At this time, oxygen is added to the insulating film 116, which is the surface on which the conductive film 120 is to be formed. When forming the conductive film 120, in addition to oxygen gas, an inert gas (for example, helium gas, Argon gas, xenon gas, etc.) may be mixed.

[0210] The oxygen gas may be contained at least when the conductive film 120 is formed. The ratio of oxygen gas in the entire deposition gas when forming the film 120 is greater than 0%. 100% or less, preferably 10% or more and 100% or less, and more preferably 30% or more and 100% or less. % or less.

[0211] In FIG. 9C, oxygen or excess oxygen added to the insulating film 116 is schematically shown. It is indicated by a dashed arrow.

[0212] In this embodiment, an In-Ga-Zn metal oxide target (In:Ga:Zn=4: 2:4.1 [atomic ratio]) by sputtering to form the conductive film 120.

[0213] In this embodiment, oxygen is added to the insulating film 116 when the conductive film 120 is formed. However, the present invention is not limited to this example. For example, after forming the conductive film 120, Oxygen may be added to the insulating film 116 .

[0214] The method of adding oxygen to the insulating film 116 is, for example, to add indium, tin, and silicon. and an oxide (In-Sn-Si oxide, also called ITSO) target (InO 3: SnO2: SiO2 = 85: 10: 5 [wt %]) to form a 5 nm thick ITSO film. In this case, the thickness of the ITSO film is 1 nm or more and 20 nm or less. Alternatively, if the thickness is 2 nm or more and 10 nm or less, oxygen can be suitably transmitted and oxygen release can be suppressed. Then, oxygen is added to the insulating film 116 by passing it through an ITSO film. The method of adding the element includes ion doping, ion implantation, plasma treatment, etc. In addition, when adding oxygen, applying a bias voltage to the substrate side can effectively can be added to the insulating film 116. As the bias voltage, for example, The power density of the bias voltage applied to the substrate side of the ashing device was set to 1 W / cm m 2 More than 5W / cm 2 The substrate temperature when adding oxygen is set to the following: The temperature is set to room temperature or higher and 300° C. or lower, preferably 100° C. or higher and 250° C. or lower, thereby forming the insulating film 1 Oxygen can be added to 16 efficiently.

[0215] Next, the conductive film 120 is processed into a desired shape to form island-shaped conductive films 120a and island-shaped conductive films 120b. A conductive film 120b is formed (see FIG. 10B).

[0216] In this embodiment mode, the conductive film 120 is processed using a wet etching apparatus.

[0217] Next, an insulating film 118 is formed on the insulating film 116 and the conductive films 120a and 120b (FIG. 10(C)).

[0218] The insulating film 118 contains either hydrogen or nitrogen, or both. For example, a silicon nitride film is preferably used as the insulating film 118. For example, it can be formed by using a sputtering method or a PECVD method. When the insulating film 118 is formed by the PECVD method, the substrate temperature is set to be less than 400° C., preferably 375° C. The temperature is preferably less than 180° C., and more preferably 180° C. or more and 350° C. or less. In this case, it is preferable to set the substrate temperature within the above range, since a dense film can be formed. By setting the substrate temperature in the above range when forming the insulating film 118, the insulating films 114 and 1 Oxygen or excess oxygen in the oxide semiconductor film 106 can be transferred to the oxide semiconductor film 108.

[0219] In addition, when a silicon nitride film is formed as the insulating film 118 by the PECVD method, silicon It is preferable to use a deposition gas containing ammonium, nitrogen, and ammonia as source gases. By using a small amount of ammonia compared to the amount of oxygen, the ammonia dissociates in the plasma and becomes active. The activated species are formed by bonding silicon and hydrogen contained in the silicon-containing deposition gas. This breaks the triple bond between silicon and nitrogen, promoting the bonding of silicon and nitrogen. It is possible to form a dense silicon nitride film with few silicon and hydrogen bonds and few defects. On the other hand, if the amount of ammonia relative to nitrogen is high, the deposition gas containing silicon and nitrogen The decomposition of the silicon does not proceed, and silicon and hydrogen bonds remain, resulting in increased defects and roughness. For these reasons, the source gas is not suitable for ammonia. It is preferable that the flow rate ratio of nitrogen to oxygen is 5 times or more and 50 times or less, or 10 times or more and 50 times or less.

[0220] In this embodiment, the insulating film 118 is formed by depositing silane, nitrogen, and the like using a PECVD apparatus. A silicon nitride film with a thickness of 50 nm is formed using nitrogen and ammonia as source gases. The flow rates were 50 sccm for silane, 5000 sccm for nitrogen, and 1000 sccm for ammonia. The pressure in the processing chamber was 100 Pa, the substrate temperature was 350°C, and the flow rate was 27.12 Mpa. A high-frequency power supply of 1000 W was used to supply high-frequency power to the parallel plate electrodes. The device has an electrode area of ​​6000 cm 2 It is a parallel plate type PECVD device, and the supplied voltage The force can be converted to power per unit area (power density) as 1.7 x 10 -1 W / cm 2 is .

[0221] The conductive films 120a and 120b were formed using an In-Ga-Zn metal oxide target (I When a conductive film is formed using n:Ga:Zn=4:2:4.1 (atomic ratio), the insulating film By forming the insulating film 118, one or both of hydrogen and nitrogen contained in the insulating film 118 can be removed. In this case, the conductive film 120a, The oxygen vacancy in 120b is bonded to either hydrogen or nitrogen, or both, to form a conductive film. The resistance of the conductive films 120a and 120b may decrease.

[0222] After the insulating film 118 is formed, the insulating film 118 is subjected to the same heat treatment as the first and second heat treatments described above. A heat treatment (hereinafter referred to as a third heat treatment) may be performed.

[0223] By performing the third heat treatment, oxygen contained in the insulating film 116 is transferred to the oxide semiconductor film 108. The oxygen vacancies in the oxide semiconductor film 108 are filled by the oxygen vacancies.

[0224] Through the above steps, the transistor 100B shown in FIGS. 3A, 3B, and 3C can be manufactured. Cut.

[0225] Note that the transistor 100 shown in FIGS. 1A, 1B, and 1C may be a transistor having a structure similar to that shown in FIG. After the steps are performed, the insulating film 118 is formed. The transistor 100A shown in (A), (B), and (C) is made of conductive films 112a and 112b. , the order of forming the insulating films 114 and 116 is changed, and the insulating films 114 and 116 are provided with the openings 141a , 141b can be fabricated by adding a step of forming the insulating film 141c.

[0226] <1-5-2. Manufacturing method of semiconductor device 2> Another method for manufacturing the transistor 100B, which is a semiconductor device of one embodiment of the present invention, will be described. Here, the structure and the manufacturing method of the oxide semiconductor film are different. -4. The number of Zn atoms in the oxide semiconductor film 108_1 as shown in Structural Example 3 of the semiconductor device The ratio of the number of In atoms to the number of Zn atoms in the oxide semiconductor film 108_2 is The manufacturing process of the transistor 100B having a larger element ratio will be described.

[0227] The oxide semiconductor film 108_1_0 was formed under the conditions of an In-Ga-Zn metal oxide substrate. Sputtering method using a get (In:Ga:Zn=4:2:4.1 [atomic ratio]) The oxide semiconductor film 108_1_0 is formed at a substrate temperature of room temperature. The deposition gas used was argon gas with a flow rate of 180 sccm and oxygen gas with a flow rate of 20 sccm. (oxygen flow rate 10%).

[0228] The oxide semiconductor film 108_2_0 was formed under the conditions of In-Ga-Zn metal oxide. Sputtering was performed using a target (In:Ga:Zn=1:1:1 [atomic ratio]) The oxide semiconductor film 108_2_0 is formed by a method. The deposition gases were argon gas with a flow rate of 100 sccm and oxygen gas with a flow rate of 100 sccm. Gas is used (oxygen flow rate ratio 50%).

[0229] The oxygen flow during the formation of the oxide semiconductor film 108_1_0 and the oxide semiconductor film 108_2_0 By changing the ratio of the amounts, it is possible to form a laminated film with different crystallinity. By changing the temperature during the deposition of the oxide semiconductor film 108_1_0 and the oxide semiconductor film 108_2_0, It is possible to form a laminated film having different crystallinity.

[0230] In addition, the crystallinity of the oxide semiconductor film 108_2_0 is higher than that of the oxide semiconductor film 108_1_0. In this case, the oxide semiconductor film 108_1_0 is replaced by the oxide semiconductor film 108_2_ It is preferable to increase the substrate temperature during the formation of O.

[0231] Other steps may be performed using the above-described <1-5-1. Method 1 for manufacturing a semiconductor device> as appropriate.

[0232] Through the above steps, a transistor shown in <1-4. Structural example 3 of semiconductor device> is manufactured. It is possible.

[0233] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0234] (Embodiment 2) In this embodiment, an oxide semiconductor film of one embodiment of the present invention will be described with reference to FIGS. 8 will be used for explanation.

[0235] <2-1. Oxide semiconductor film> The oxide semiconductor film preferably contains at least indium. In addition to these, aluminum, gallium, yttrium, and zinc are preferably contained. It is preferable that the material contains boron, silicon, titanium, or the like. , iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium One selected from zinc, hafnium, tantalum, tungsten, or magnesium Or, multiple types may be included.

[0236] Here, the case where the oxide semiconductor film contains indium, the element M, and zinc is considered. The element M is aluminum, gallium, yttrium, tin, etc. Applicable elements for element M include boron, silicon, titanium, iron, nickel, and germanium. Smoke, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum However, the element M can be any of the above elements. In the following description, the indium oxide contained in the oxide semiconductor film The atomic ratios of elements M and zinc are defined as [In], [M], and [Zn], respectively. This may occur.

[0237] <2-2. Structure of oxide semiconductor film> Oxide semiconductors are divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. As a non-single-crystal oxide semiconductor, for example, CAAC-OS (c-axis oriented crystal-coated oxide semiconductor) igned crystalline oxide semiconductor), Crystalline oxide semiconductor, nc-OS (nanocrystalline oxide semiconductor) semiconductor), pseudo-amorphous oxide semiconductor (a-like OS) amorphous-like oxide semiconductors and amorphous oxide semiconductors There is the body.

[0238] CAAC-OS has a c-axis orientation and multiple nanocrystals are connected in the ab-plane direction. The CAAC-OS has a distorted crystal structure. The area where the orientation of the lattice arrangement changes between a region with one lattice arrangement and a region with a different lattice arrangement. Point to a place.

[0239] Nanocrystals are basically hexagonal, but are not limited to regular hexagonal shapes. They may also have non-regular hexagonal shapes. In addition, in the case of nanocrystals with polygonal shapes such as pentagons and heptagons, In addition, clear grain boundaries were observed in the vicinity of the strain in CAAC-OS. In other words, the formation of grain boundaries cannot be suppressed by distorting the lattice arrangement. This is because the arrangement of oxygen atoms in the ab-plane direction of CAAC-OS is The lack of density and the change in bond distance between atoms due to the substitution of metal elements This is thought to be because distortion can be tolerated.

[0240] In addition, the CAAC-OS has a layer containing indium and oxygen (hereinafter referred to as an In layer) and an elemental A layered crystal consisting of layers containing element M, zinc, and oxygen (hereinafter referred to as the (M,Zn) layer). It is noted that indium and element M tend to have a structure (also called a layered structure). The element M in the (M,Zn) layer is substituted for indium, forming the (In,M,Zn) layer. In addition, indium in the In layer is replaced with element M, and it can be expressed as an (In,M) layer. It is also possible.

[0241] nc-OS is a material that can be used in microscopic areas (e.g., areas between 1 nm and 10 nm, especially areas between 1 nm and 10 nm). The atomic arrangement is periodic in the region of 3 nm or less. There is no regularity in the crystal orientation between the crystals. Therefore, no orientation is observed throughout the film. Therefore, depending on the analytical method, nc-OS may be classified as a-like OS or amorphous oxide semiconductor. It may be indistinguishable from the body.

[0242] The a-like OS is an oxide semiconductor with a structure between the nc-OS and amorphous oxide semiconductor. It is a semiconductor. A-like OS has pores or low density areas. e OS has an unstable structure compared to nc-OS and CAAC-OS.

[0243] Oxide semiconductors have a variety of structures, each of which has different characteristics. The oxide semiconductors in The compound may have two or more of the c-OS and CAAC-OS.

[0244] The oxide semiconductor film according to one embodiment of the present invention includes a composite oxide semiconductor. Therefore, in the following description, the oxide semiconductor film may be referred to as a composite oxide semiconductor. By using an oxide semiconductor, a transistor with high field-effect mobility can be obtained. 12 to 14 show conceptual diagrams of an oxide semiconductor film containing a composite oxide semiconductor.

[0245] FIG. 12A is a conceptual diagram of the top surface of an oxide semiconductor film (referred to here as the ab-plane direction). FIG. 12B is a cross-sectional view of an oxide semiconductor film formed on a substrate Sub. c-axis direction).

[0246] Note that FIG. 12 illustrates a case where an oxide semiconductor film is formed over a substrate. However, the present invention is not limited to this, and an insulating film such as an underlayer film or an interlayer film may be provided between the substrate and the oxide semiconductor film. Alternatively, other semiconductor films such as an oxide semiconductor film may be formed.

[0247] As shown in FIGS. 12A and 12B, an oxide semiconductor film of one embodiment of the present invention has the following characteristics: The composite oxide semiconductor has a structure in which the region A1 and the region B1 are mixed.

[0248] The region A1 shown in FIG. 12(A)(B) is [In]:[M]:[Zn]=x:y:z(x >0, y≧0, z≧0). On the other hand, region B1 is a region with a lot of In, where [In]:[ [M]:[Zn]=a:b:c (a>0, b>0, c>0) is a region with little In. .

[0249] In this specification, the atomic ratio of In to element M in region A1 is The atomic ratio of In to M in region A1 is larger than that in region B1. Therefore, in this specification, the region A1 is referred to as an in-rich region. The area B1 is also called an in-poor area.

[0250] For example, the concentration of In in the region A1 is 1.1 times or more, preferably 2 times or more, than that in the region B1. The region A1 is preferably an oxide containing at least In. However, the elements M and Zn do not necessarily have to be included.

[0251] In the oxide semiconductor film of one embodiment of the present invention, the region A1 and the region B1 form a complex. In other words, in region A1, carrier movement is likely to occur, and in region B1, carrier Therefore, the oxide semiconductor of one embodiment of the present invention has high carrier mobility. Moreover, it can be used as a material with high switching characteristics and excellent semiconductor characteristics.

[0252] In other words, the region A1 is a region that is less semiconductive and more conductive than the region B1. On the other hand, the region B1 has a higher semiconductivity than the region A1 and is also conductive. Here, the high semiconductivity means that the band gap This can be rephrased as having a wide band, good switching characteristics, and being similar to an i-type semiconductor.

[0253] As an example, as shown in FIGS. 12A and 12B, the region A1 is oriented in the ab plane direction, In the c-axis direction, multiple grains (also called clusters) exist. The clusters may be irregularly distributed. In addition, multiple clusters may be overlapping or connected. For example, one cluster may overlap with another cluster, and the overlapping shapes may be connected. As a result, the area A1 may be observed to spread out like a cloud.

[0254] In other words, the cluster included in the area A1 (also called the first cluster) is included in the area B1. Less semiconductive and more conductive than the cluster it contains (also called the second cluster) On the other hand, the clusters included in area B1 are smaller than the clusters included in area A1. It can also be said that this region has higher semiconductivity and lower conductivity than the GaN. In this case, the region B1 has a plurality of second clusters, and the plurality of second clusters are mutually In other words, the first clusters in the area A1 are The second clusters in the region B1 each have a portion connected to each other in a woody shape, Each has a part that connects to the other.

[0255] In this way, the complex oxide semiconductor of one embodiment of the present invention has a first region (region A1) and a second region (region B1) having a low concentration of In, and the first region and the second region In the complex oxide semiconductor of one embodiment of the present invention, A first region where In is distributed at a high concentration and a second region where In is not distributed at a high concentration. The first area and the second area are connected in a cloud-like fashion.

[0256] As shown in FIGS. 12(A) and 12(B), the regions A1 are connected to each other in the ab-plane direction, The region A1 can be a current path, which can increase the conductivity of the oxide semiconductor film. This makes it possible to increase the field effect mobility of a transistor using this.

[0257] In addition, the regions B1 shown in FIGS. 12(A) and 12(B) can be said to be scattered within the region A1. Therefore, the region B1 can exist in a state where it is sandwiched between the regions A1. In other words, the region B1 can exist in a state where it is surrounded by the region A1. This is the structure contained within A1.

[0258] The proportion of the scattered regions A1 varies depending on the manufacturing conditions or composition of the composite oxide semiconductor. For example, a composite oxide semiconductor having a small proportion of the region A1, or A complex oxide semiconductor having a high proportion of the region A1 can be formed. In a composite oxide semiconductor, the ratio of region A1 to region B1 is not necessarily small. In the case of a complex oxide semiconductor in which the ratio of In addition, for example, the size of the granular area formed by the area A1 may be can be appropriately adjusted by the preparation conditions or composition of the composite oxide semiconductor.

[0259] In Figures 13(A) and 13(B), the proportion of area A1 is smaller than in Figures 12(A) and 12(B), and the proportion of area A2 is smaller than in Figures 12(A) and 12(B). This shows a complex oxide semiconductor with a high proportion of region B1.

[0260] Depending on the manufacturing conditions or composition of the composite oxide semiconductor, the region may be larger than that shown in FIG. 12(A)(B). It is also possible to form a composite oxide semiconductor in which the proportion of A1 is high and the proportion of B1 is low.

[0261] Here, when all the regions A1 are connected in the ab plane direction, the switching of the transistor For example, the off-state current of the transistor may increase. Therefore, as shown in FIGS. 13(A) and 13(B), it is preferable that the regions A1 are scattered within the region B1. Therefore, the region A1 can exist in a state where it is sandwiched between the regions B1. In other words, the region A1 can exist in a state where it is surrounded by the region B1. , which is contained in the region B1. This allows the switching characteristics of the transistor to be In particular, the off-current can be reduced.

[0262] In addition, there are cases where a clear boundary between area A1 and area B1 cannot be observed. The sizes of A1 and B1 were measured by energy dispersive X-ray spectroscopy (EDX). EDX mapping using dispersive X-ray spectroscopy For example, the cluster in area A1 can be evaluated by cross-sectional photography or planar photography. In the EDX mapping of the photograph, cluster diameters of 0.1 nm to 2.5 nm were observed. Preferably, the diameter of the cluster is 0.5 nm or more and 1.5 nm or less. Let's say.

[0263] In this manner, the oxide semiconductor of one embodiment of the present invention has a mixed structure of the region A1 and the region B1. a composite oxide semiconductor, and the functions of the region A1 and the region B1 are different from each other; The region A1 and the region B1 function complementary to each other. For example, in the In-Ga In the case of IGZO, the oxide semiconductor of one embodiment of the present invention is It can be called complementary IGZO (abbreviated as C / IGZO).

[0264] On the other hand, for example, in the case where the region A1 and the region B1 are laminated in layers, Since there is no interaction or interaction is unlikely to occur between A1 and B1, the function of A1 is The functions of the layered region A1 and the layered region B1 may function independently. Therefore, even if the carrier mobility can be increased, the off-state current of the transistor is high. Therefore, the above-mentioned composite oxide semiconductor or C / IGZO is used. This allows the device to simultaneously achieve high carrier mobility and excellent switching characteristics. This is one of the excellent properties obtained by the complex oxide semiconductor of one embodiment of the present invention. This is the effect.

[0265] The region B1 may be a crystalline region. For example, the region B1 may be a CAA C-OS, or having multiple nanocrystals.

[0266] In FIG. 14(A), the nanocrystals contained in the region B1 are shown schematically by dashed lines. Nanocrystals are basically hexagonal, but they are not necessarily regular hexagons, and may have non-regular hexagonal shapes. In addition, distortion occurs in the hexagonal crystals, resulting in the formation of polygonal nanocrystals such as pentagons and heptagons. It may contain crystals.

[0267] In addition, FIG. 14(B) shows that the nanocrystals have a c-axis orientation, and the c-axis forms a CAAC-OS film. The direction of the surface on which the film is formed (also called the surface on which the film is formed) or the upper surface is generally perpendicular to the surface. The CAAC-OS has a layered crystal structure (also known as a layered structure) with a c-axis orientation. A layer containing indium and oxygen (hereinafter referred to as the In layer) and an element M, zinc, and a layer containing oxygen (hereinafter referred to as an (M, Zn) layer) are stacked.

[0268] Indium and element M may be substituted for each other. Therefore, the (M, Zn) layer The element M is substituted for indium, and the layer can be expressed as an (In, M, Zn) layer. The layered structure is formed by stacking an In layer and an (In, M, Zn) layer.

[0269] <2-3. Atomic ratio of composite oxide semiconductors> Next, the atomic ratio of elements contained in the complex oxide semiconductor of one embodiment of the present invention will be described.

[0270] In the composite oxide semiconductor, for example, the region A1 has In, the element M, and Zn. In this case, the atomic ratio of each element can be shown using the phase diagram shown in Figure 15. The atomic ratio of Zn and Zn is expressed as x:y:z, where x, y, and z are the atomic ratios. The numerical ratio can be expressed in the diagram as coordinates (x:y:z). The ratio of the number of children is not stated.

[0271] In FIG. 15, the dashed line indicates [In]:[M]:[Zn]=(1+α):(1−α):1 The line where the atomic ratio (-1≦α≦1) is [In]:[M]:[Zn]=(1+α): The line where the atomic ratio is (1-α):2, [In]:[M]:[Zn]=(1+α):( The line where the atomic ratio is 1-α):3, [In]:[M]:[Zn]=(1+α):(1 -α):4, and the line where the atomic ratio is [In]:[M]:[Zn]=(1+α): This represents the line where the atomic ratio is (1-α):5.

[0272] The dashed line indicates the atomic ratio of [In]:[M]:[Zn]=1:1:β (β≧0). The line where the atomic ratio of [In]:[M]:[Zn]=1:2:β, the line where [In ]:[M]:[Zn]=1:3:β, the atomic ratio is [In]:[M]:[Zn ]=1:4:β, and the atomic ratio of [In]:[M]:[Zn]=1:7:β. The line where the atomic ratio is [In]:[M]:[Zn]=2:1:β , and the line where the atomic ratio is [In]:[M]:[Zn]=5:1:β.

[0273] In addition, the atomic ratio of [In]:[M]:[Zn]=0:2:1 shown in FIG. 15 or Oxide semiconductors with values ​​in this range tend to have a spinel-type crystal structure.

[0274] The region A2 shown in FIG. 15 has the atomic ratio of indium, element M, and zinc contained in the region A1. The region A2 is an example of a preferable range of [In]:[M]:[Z n]=(1+γ):0:(1-γ) (-1≦γ≦1) Let's say.

[0275] The region B2 shown in FIG. 15 has the atomic ratio of indium, element M, and zinc contained in the region B1. The region B2 is an example of a preferable range of [In]:[M]:[Z n] = 4:2:3 to 4.1 and its neighboring values. The neighboring values ​​include, for example, the atomic ratio Region B1 contains [In]:[M]:[Zn]=5:3:4. Region B2 contains [In]: [M]:[Zn]=5:1:6 and its neighboring values.

[0276] Since the concentration of In is high in region A2, the conductivity is higher than that in region B2, and the carrier migration Therefore, the oxide semiconductor having the region A1 has a function of increasing the field effect mobility. The on-state current and carrier mobility of a transistor using a conductive film can be increased.

[0277] On the other hand, the region B2 has a lower In concentration and is therefore less conductive than the region A2, resulting in a lower leakage current. Therefore, the transistor using the oxide semiconductor film having the region B1 The off-state current of the transistor can be reduced.

[0278] For example, the region A1 is preferably non-single crystalline. In this case, the region A1 tends to be tetragonal in the case of indium. Indium oxide ([In]:[M]:[Zn]=x:0:0(x>0)), The region A1 tends to have a byte-type crystal structure. :[M]:[Zn]=x:0:z (x>0, z>0) tends to form a layered crystal structure There is.

[0279] For example, the region B1 is preferably non-single crystal. However, the region B1 does not necessarily have to consist of only the CAAC-OS. In addition, the insulating film may have regions of a polycrystalline oxide semiconductor, an nc-OS, or the like.

[0280] CAAC-OS is an oxide semiconductor with high crystallinity. Since it is not possible to confirm the grain boundaries, the decrease in electron mobility caused by the grain boundaries occurs. In addition, the crystallinity of oxide semiconductors can be affected by impurities and defects. Therefore, CAAC-OS is an oxidized material with few impurities and defects (such as oxygen vacancies). Therefore, the presence of CAAC-OS allows it to function as a composite oxide semiconductor. To provide a composite oxide semiconductor that is heat-resistant and highly reliable because the physical properties of can be done.

[0281] When an oxide semiconductor is deposited using a sputtering device, the atomic ratio of the target In particular, depending on the substrate temperature during film formation, the ratio of the number of atoms in [Zn] may be different. In some cases, the atomic ratio of the film may be smaller than the atomic ratio of the target.

[0282] Furthermore, the characteristics of the complex oxide semiconductor of one embodiment of the present invention are uniquely defined by the atomic ratio. Therefore, the illustrated region is a region A1 and a region B This is a region showing a preferable atomic ratio of 1, and the boundaries are not strict.

[0283] <2-4. Method for producing composite oxide semiconductor> Here, an example of a method for manufacturing a complex oxide semiconductor shown in FIGS. 12A and 12B will be described. The complex oxide semiconductor of one embodiment of the present invention can be formed using a sputtering apparatus. can be done.

[0284] [Sputtering equipment] FIG. 16(A) is a cross-sectional view illustrating a film formation chamber 2501 of the sputtering apparatus. 16(B) shows the magnet unit 2530a and the magnet FIG. 25 is a plan view of the magnet unit 2530b.

[0285] The film forming chamber 2501 shown in FIG. 16(A) includes a target holder 2520a and a target holder Backing plate 2520b, backing plate 2510a, backing plate 2510b , target 2502a, target 2502b, member 2542, and substrate holder 25 70. The target 2502a is mounted on a backing plate 2510a. The backing plate 2510a is also placed on the target holder 2520a. The magnet unit 2530a is arranged so that the backing plate 2510a is The target 2502b is placed under the target 2502a through a backing. The backing plate 2510b is disposed on the target The magnet unit 2530b is placed on the backing holder 2520b. The target 2502b is disposed below the target 2502b via a covering plate 2510b.

[0286] As shown in FIG. 16(A) and FIG. 16(B), the magnet unit 2530a is Magnet 2530N1, Magnet 2530N2, Magnet 2530S, Mag The magnet unit 2530a has a net holder 2532. Magnet 2530N1, Magnet 2530N2 and Magnet 2530S are The magnet 2530N1 and the magnet 2530N2 are disposed on the magnet holder 2532. 0N2 is placed at a distance from the magnet 2530S. The magnet unit 2530b has the same structure as the magnet unit 2530a. When the substrate 2560 is loaded into the substrate holder 2570, the substrate 2560 is placed in contact with the substrate holder 2570. can be.

[0287] Target 2502a, backing plate 2510a, and target holder 2520 a, a target 2502b, a backing plate 2510b, and a target holder 25 20b are separated by a member 2542. The member 2542 is an insulator. However, the member 2542 may be a conductor or a semiconductor. The member 2542 may be a conductor or semiconductor whose surface is covered with an insulator. .

[0288] The target holder 2520a and the backing plate 2510a are connected by screws (bolts, etc. ) and are fixed to the same potential. It has a function of supporting the target 2502a via the king plate 2510a. The target holder 2520b and the backing plate 2510b are connected by screws (bolts, etc.) ) and are fixed to the same potential. It has the function of supporting the target 2502b via the king plate 2510b.

[0289] The backing plate 2510a has a function of fixing the target 2502a. Additionally, the backing plate 2510b has the function of fixing the target 2502b.

[0290] In addition, in FIG. 16(A), the magnetic field lines 2 formed by the magnet unit 2530a are 580a and 2580b are clearly indicated.

[0291] As shown in FIG. 16(B), the magnet unit 2530a has a rectangular or approximately rectangular shape. A rectangular magnet 2530N1, a rectangular or nearly rectangular magnet 2530N2, and A rectangular or approximately rectangular magnet 2530S is fixed to a magnet holder 2532. The magnet unit 2530a has a configuration as shown in FIG. For example, the magnet unit 2530a is oscillated at a beat of 0.1 Hz to 1 kHz.

[0292] The magnetic field on the target 2502a changes with the oscillation of the magnet unit 2530a. The area with a strong magnetic field becomes a high-density plasma area, and the target 2 Sputtering phenomenon of 502a is likely to occur. This is because the magnet unit 2530b The same is true for .

[0293] <2-5. Fabrication flow of composite oxide semiconductor> Next, a method for manufacturing a complex oxide semiconductor will be described. FIG. 1 is a process flow diagram illustrating a manufacturing method.

[0294] The composite oxide semiconductor shown in FIGS. 12A and 12B is composed of at least the first to second oxide semiconductors shown in FIG. It is made through four steps.

[0295] [First step: placing the substrate in the film formation chamber] The first step includes placing a substrate in a film formation chamber (see step S101 in FIG. 17). .

[0296] In the first step, for example, a substrate holder included in the film formation chamber 2501 shown in FIG. The substrate 2560 is placed on the substrate 2570 .

[0297] The temperature of the substrate 2560 during film formation affects the electrical properties of the composite oxide semiconductor. The higher the concentration, the higher the crystallinity of the complex oxide semiconductor and the higher the reliability. The lower the substrate temperature, the lower the crystallinity of the composite oxide semiconductor and the higher the carrier mobility. In particular, the lower the substrate temperature during film formation, the easier it is to form a transistor having a complex oxide semiconductor. In this case, the field-effect mobility at low gate voltages (e.g., greater than 0 V and less than 2 V) The improvement is noticeable.

[0298] The temperature of the substrate 2560 is from room temperature (25° C.) to 200° C., preferably from room temperature to The substrate temperature may be set to 170° C. or less, more preferably, room temperature or more and 130° C. or less. By doing so, it is possible to manufacture a large-area glass substrate (for example, the 8th to 10th generation glass substrates described above) In particular, it is suitable for the case where the substrate temperature during the film formation of the composite oxide semiconductor is By keeping the temperature at room temperature, in other words, in a state where it is not intentionally heated, bending or distortion of the substrate is suppressed. This is preferable because it can control the

[0299] In addition, a cooling mechanism or the like may be provided in the substrate holder 2570 to cool the substrate 2560. good.

[0300] In addition, by setting the temperature of the substrate 2560 to 100°C or higher and 130°C or lower, the composite oxide By removing the water impurity in this way, the electric The reliability can be improved while improving the field effect mobility.

[0301] In addition, by removing water by setting the temperature of the substrate 2560 at 100°C or higher and 130°C or lower, This prevents distortion of the sputtering device due to excessive heat. This allows for improved productivity of semiconductor devices. It is easy to introduce large-scale production equipment, so it is easy to manufacture large display devices using large-area substrates. It is possible.

[0302] In addition, by increasing the temperature of the substrate 2560, the water in the composite oxide semiconductor can be more effectively Not only can it be removed, but it can also improve the crystallinity of the composite oxide semiconductor. For example, the temperature of the substrate 2560 is set to 80° C. or higher and 200° C. or lower, preferably 100° C. or higher and 170° C. or lower. By using the lower temperature, a complex oxide semiconductor film with high crystallinity can be formed.

[0303] [Second step: Step of introducing gas into the film formation chamber] The second step includes introducing gas into the deposition chamber (see step S201 in FIG. 17). .

[0304] In the second step, for example, a gas is introduced into the film formation chamber 2501 shown in FIG. 16(A). As the gas, either argon gas or oxygen gas or both may be introduced. In addition, inert gases such as helium, xenon, and krypton may be used instead of argon gas. That's fine.

[0305] The oxygen flow rate ratio when forming a composite oxide semiconductor film using oxygen gas shows the following tendency: The higher the oxygen flow rate ratio, the higher the crystallinity of the composite oxide semiconductor and the higher its reliability. On the other hand, the smaller the oxygen flow ratio, the lower the crystallinity of the composite oxide semiconductor, and the In particular, the smaller the oxygen flow rate ratio, the more effective the composite oxide semiconductor becomes. In transistors that operate at low gate voltages (for example, in the range greater than 0 V and less than 2 V), The improvement in field effect mobility is remarkable.

[0306] The oxygen flow rate ratio is set to 0% or more in order to obtain the desired characteristics for the composite oxide semiconductor depending on its application. It can be set appropriately within the range of 100% or less.

[0307] For example, when used in the semiconductor layer of a transistor with high field effect mobility, a composite oxide The oxygen flow rate during semiconductor film formation is 0% or more and 30% or less, preferably 5% or more and 30% or less. It is set to 0% or less, and more preferably 7% or more and 15% or less.

[0308] In addition, in order to obtain a transistor that has both high field-effect mobility and high reliability, The oxygen flow rate ratio during film formation of the composite oxide semiconductor is set to be greater than 30% and less than 70%, preferably The oxygen flow rate during film formation of the composite oxide semiconductor is set to be greater than 30% and less than 50%. The amount ratio is set to 10% or more and 50% or less, preferably 30% or more and 50% or less.

[0309] In addition, in order to obtain a highly reliable transistor, it is necessary to The oxygen flow rate ratio is set to 70% or more and 100% or less.

[0310] In this way, by controlling the substrate temperature and oxygen flow rate during film formation, it is possible to obtain the desired electrical properties. For example, lowering the substrate temperature (raising it) ) and decreasing (increasing) the oxygen flow rate contribute to the field-effect mobility, respectively. Therefore, for example, due to equipment restrictions, the substrate temperature may not be raised sufficiently. Even if it is not possible to achieve the same field-effect mobility, increasing the oxygen flow ratio can be achieved. It is also possible to realize a transistor having

[0311] Further, by the method described in Embodiment 1, oxygen vacancies in the oxide semiconductor film or By reducing impurities in the semiconductor film, highly reliable transistors can be realized. Cut.

[0312] In addition, high purity of gases is also required during film formation. The dew point of the argon gas is -40°C or less, preferably -80°C or less, more preferably -100°C or less. By using gases that have been highly purified to temperatures below -120°C, or more preferably below -120°C, complex oxidation can be achieved. This makes it possible to prevent moisture and the like from being taken into the semiconductor as much as possible.

[0313] In addition, the film-forming chamber 2501 is designed to remove as much water as possible, which is an impurity for the composite oxide semiconductor. To remove the gas, a high vacuum (5×10) was created using an adsorption type vacuum pump such as a cryopump. - 7 Pa to 1 x 10 -4 It is preferable to exhaust the gas to a pressure of about 100 Pa. When the deposition device is in standby, gas molecules (m / z=1 8) is the partial pressure of 1 x 10 -4 Pa or less, preferably 5 x 10 -5 Pa or less It is preferable to set the following.

[0314] [Third step: Step of applying voltage to the target] The third step includes applying a voltage to the target (see step S301 in FIG. 17). see).

[0315] In the third step, for example, the target holder 2520a and the target shown in FIG. A voltage is applied to the target holder 2520b. The potential applied to terminal V1 connected to a is applied to terminal V2 connected to substrate holder 2570. The potential is set to be lower than the potential applied to the target holder 2520b. The potential applied to V4 is set to be lower than the potential of terminal V2 connected to the substrate holder 2570. The potential applied to terminal V2 connected to substrate holder 2570 is set to the ground potential. The potential applied to the terminal V3 connected to the magnet holder 2532 is set to the ground potential. do.

[0316] The potentials applied to terminals V1, V2, V3, and V4 are the same as those mentioned above. Also, the target holder 2520, the substrate holder 2570, the magnet holder It is not necessary to apply a potential to all of the substrates 2532. For example, if the substrate holder 2570 is The voltage applied to terminal V1 can be controlled. A power source capable of being electrically connected is assumed. The power source may be a DC power source, an AC power source, or An RF power source can be used.

[0317] The target 2502a and the target 2502b are made of indium, an element When a target having M (where M is Al, Ga, Y, or Sn), zinc, and oxygen is used, An example of the target 2502a and the target 2502b is In-G a-Zn metal oxide target (In:Ga:Zn=4:2:4.1 [atomic ratio]), I n-Ga-Zn metal oxide target (In:Ga:Zn=5:1:7 [atomic ratio]) In the following, an In-Ga-Zn metal oxide target (In:G The case where a Zn atom ratio of 4:2:4.1 is used will be described.

[0318] [Fourth step: Depositing a composite oxide semiconductor on a substrate] The fourth step involves depositing a composite oxide semiconductor from a target onto a substrate (Fig. 17 See step S401).

[0319] In the fourth step, for example, argon gas is introduced into the film-forming chamber 2501 shown in FIG. 16(A). Alternatively, oxygen gas is ionized and split into positive ions and electrons to form plasma. The positive ions in the plasma are converted into positive ions by the potential applied to the target holders 2520a and 2520b. The positive ions are accelerated toward the targets 2502a and 2502b. By colliding with the Zn metal oxide target, sputter particles are generated and deposited on the substrate 2560. The sputtered particles are deposited.

[0320] The targets 2502a and 2502b were made of In:Ga:Zn with an atomic ratio of 4: 2:4.1 or In-Ga-Zn metal oxide with an atomic ratio of In:Ga:Zn=5:1:7 When using a solid target, there are cases where the target contains multiple crystal grains with different compositions. For example, the diameter of the plurality of crystal grains is often 10 μm or less. When the In-Ga-Zn metal oxide target contains crystal grains with a high In content, There are cases where the proportion of the region A1 described above that is formed increases.

[0321] <2-6. Film formation model> Next, in the fourth step, the film formation model shown in Figures 18(A), (B), and (C) can be considered. can.

[0322] 18(A), (B), and (C) are cross-sectional views of the vicinity of the target 2502a shown in FIG. 16(A). 18(A) shows the state of the target before use, and FIG. 18(B) shows the state after use. 18(A) shows the state of the target before film formation, and FIG. 18(B) shows the state of the target during film formation. 18(A), (B), and (C) show the target 2502a, the plasma 2190, and the positive ions. The electron 2192, sputtered particles 2504a, 2506a, etc. are clearly shown.

[0323] In FIG. 18(A), the surface of the target 2502a is relatively flat and has a composition (For example, the composition of In, Ga, and Zn) is uniform. On the other hand, in FIG. 18(B), The surface of the target 2502a is roughened by a sputtering process or the like performed in advance. The unevenness and segregation are caused by the sputtering process performed beforehand. This can be caused by plasma (e.g., Ar plasma) in ring processing. In Fig. 2B, a segregation region 2504 and a segregation region 2506 are shown. 2504 is the region containing a large amount of Ga and Zn (Ga, Zn-Rich region), and segregation region 2 The region 506 is an In-rich region. The reason why the segregation region 2504 is formed is that Ga has a lower melting point than In. Therefore, the target 2502a is partially melted and agglomerated due to the heat it receives during plasma processing. This is thought to be because the segregation region 2504 is formed by the above.

[0324] [First Step] In Figure 18(C), argon gas or oxygen gas is ionized to produce positive ions 2192 and electrons ( (not shown) to form plasma 2190. The positive ions 2192 are directed to the target 2502a (here, an In-Ga-Zn oxide target). The positive ions 2192 collide with the In-Ga-Zn oxide target. By this, sputtered particles 2504a and 2506a are generated, and the In-Ga-Zn oxide Sputter particles 2504a and 2506a are ejected from the target. The atoms 2504a are repelled from the segregation region 2504, and the Ga, Zn-rich cluster In addition, sputtered particles 2506a may form segregation regions 2506. As a result, in-rich clusters may be formed.

[0325] In the case of the In-Ga-Zn oxide target, the segregation region 2504 is first separated into two regions. It is believed that the sputter particles 2504a are preferentially sputtered. When 2192 is bombarded with an In-Ga-Zn oxide target, the relative atomic mass is Since Ga and Zn are lighter than In-Ga-Zn oxide, they are preferentially ejected from the target. The ejected sputtered particles 2504a are deposited on the substrate. 12(A)(B) and the like is formed.

[0326] [Second step] Subsequently, as shown in FIG. 18(C), sputtered particles 2506a are ejected from the segregation region 2506. The sputtered particles 2506a are deposited on the region B1 on the substrate. The collision results in the formation of the region A1 shown in FIGS. 12(A) and 12(B).

[0327] As shown in FIG. 18(C), the target 2502a is not sputtered during film formation. Therefore, the generation and disappearance of the segregation region 2504 occur intermittently. do.

[0328] By repeating the film formation model of the first step and the second step, ) (B) and the like can be obtained.

[0329] That is, the in-rich segregation region 2506 and the Ga, Zn-rich segregation region 2507 are Sputtered particles (2504a and 2506a) are ejected individually from 504. On the substrate, the In-Rich regions are connected to each other in a cloud-like formation. As shown in FIGS. 12A and 12B, a complex oxide semiconductor according to one embodiment of the present invention can be formed. In the composite oxide semiconductor film, the in-rich regions are connected to each other in a cloud-like manner, The transistor using the complex oxide semiconductor has a high on-state current (Ion) and a high field effect. It has a high molecular weight (μFE).

[0330] In this way, transistors that satisfy high on-current (Ion) and high field-effect mobility (μFE) are In transistors, In is important, and other metals (e.g., Ga) are not necessarily Not necessary.

[0331] In the above description, the complex oxide semiconductor of one embodiment of the present invention is grown using argon gas. In this case, there are many oxygen vacancies in the composite oxide semiconductor. When a complex oxide semiconductor contains many oxygen vacancies, In complex oxide semiconductors, shallow defect states (also called sDOS) may be formed. When DOS is formed, the sDOS becomes a carrier trap, and the on-current and the field effect The mobility decreases.

[0332] Therefore, when a composite oxide semiconductor is formed using argon gas, After the oxide semiconductor is formed, oxygen is supplied to the composite oxide semiconductor, and the composite oxide It is preferable to compensate for oxygen vacancies in the semiconductor to reduce sDOS.

[0333] As a method for supplying oxygen, for example, after the complex oxide semiconductor is grown, the oxygen is supplied to the complex oxide semiconductor in an atmosphere containing oxygen. Examples of the method include a method of performing heat treatment, and a method of performing plasma treatment in an atmosphere containing oxygen. Alternatively, an insulating film in contact with the complex oxide semiconductor of one embodiment of the present invention or a film formed on the complex oxide semiconductor The insulating film near the conductor may have excess oxygen. For the configuration, refer to the first embodiment.

[0334] Although the sputtering method has been described here, the present invention is not limited to this. Pulsed laser deposition (PLD), plasma enhanced chemical vapor deposition (PECVD), and thermal CV D (Chemical Vapor Deposition) method, ALD (Atomic Alternatively, a thermal CVD method, a vacuum deposition method, or the like may be used. Examples of this include MOCVD (Metal Organic Chemical Vapor Deposition) r Deposition) method.

[0335] <2-7. Transistors Having Oxide Semiconductor Films> Next, the case where an oxide semiconductor film is used for a transistor will be described.

[0336] By using the above complex oxide semiconductor in a transistor, the carrier mobility is high, Furthermore, a transistor with high switching characteristics can be realized. Therefore, a low-power transistor can be realized.

[0337] In addition, an oxide semiconductor film with low carrier density is preferably used for the transistor. For example, an oxide semiconductor film has a carrier density of 8×10 11 / cm 3 Less than 1 x10 11 / cm 3 less than 1×10 10 / cm 3 Less than 1 x 10 -9 / cm 3 That's all there is to it.

[0338] In the case of reducing the carrier density of the oxide semiconductor film, impurities in the oxide semiconductor film In this specification and the like, the impurity concentration is low, and the defect level density is low. A low density of defect states is called high purity intrinsic or substantially high purity intrinsic. Since a highly purified or substantially intrinsic oxide semiconductor film has few carrier generation sources, In addition, the oxide can be made of high-purity intrinsic or substantially high-purity intrinsic material. Since the defect state density of a compound semiconductor film is low, the trap state density may also be low.

[0339] In addition, the time required for the charges trapped in the trap states of the oxide semiconductor film to disappear is Therefore, the trap level density Transistors in which the channel region is formed in a high-temperature oxide semiconductor have unstable electrical characteristics. There are cases where this happens.

[0340] Therefore, in order to stabilize the electrical characteristics of a transistor, the impurity concentration in the oxide semiconductor film is In addition, in order to reduce the impurity concentration in the oxide semiconductor film, It is preferable that the impurity concentration in the adjacent film is also reduced. , alkali metals, alkaline earth metals, iron, nickel, silicon, etc.

[0341] Here, the influence of each impurity in the oxide semiconductor film will be described.

[0342] When silicon or carbon, which is one of the group 14 elements, is contained in an oxide semiconductor film, Defect levels are formed in the oxide semiconductor. The carbon concentration and the silicon and carbon concentrations near the interface with the oxide semiconductor (Secondary Ion Mass Spectroscopy) Secondary Ion Mass Spectrometry (SIMS) The concentration obtained by 18 atoms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 The following applies.

[0343] Furthermore, when an alkali metal or an alkaline earth metal is contained in the oxide semiconductor film, a defect level Therefore, alkali metal or alkaline earth metal A transistor using an oxide semiconductor film containing metals tends to be normally on. Therefore, it is necessary to reduce the concentration of alkali metal or alkaline earth metal in the oxide semiconductor film. Specifically, it is preferable to use an alkali metal in the oxide semiconductor film obtained by SIMS. The concentration of alkaline earth metals is 1×10 18 atoms / cm 3 Below, preferably 2×10 16 atoms / cm 3 The following applies.

[0344] Furthermore, when nitrogen is contained in the oxide semiconductor film, electrons that serve as carriers are generated, and As a result, oxide semiconductors containing nitrogen are easily converted into n-type semiconductors. Therefore, the transistors used in the oxide semiconductor are likely to be normally on. In the present invention, it is preferable that the nitrogen content is reduced as much as possible. For example, the nitrogen content in the oxide semiconductor is The element concentration is 5×10 19 atoms / cm 3 Less than 5x1 0 18 atoms / cm 3 Less than 1×10, more preferably 18 atoms / cm 3 below, More preferably, 5 × 10 17 atoms / cm 3 The following applies.

[0345] In addition, hydrogen contained in the oxide semiconductor film reacts with oxygen that bonds to metal atoms to form water. Therefore, oxygen deficiency (V o ) may be formed. o ) by adding hydrogen In some cases, electrons, which act as carriers, are generated. In addition, some of the hydrogen atoms bond with metal atoms. It can combine with oxygen to generate electrons, which are carriers. A transistor using an oxide semiconductor having such a structure tends to be normally on. It is preferable that the amount of hydrogen in the oxide semiconductor is reduced as much as possible. The hydrogen concentration obtained by SIMS in the conductor is 1×10 20 atoms / cm 3 Not yet less than 1×10 19 atoms / cm 3 less than 5 × 10 18 at oms / cm 3 less than 1×10 18 atoms / cm 3 Less than.

[0346] In addition, oxygen vacancies (V o ) is a method for introducing oxygen into an oxide semiconductor film. In other words, oxygen vacancies (V o ) is supplemented with oxygen By filling, oxygen vacancies (V o ) disappears. Therefore, oxygen is diffused into the oxide semiconductor film. By dispersing the oxygen vacancies (V o ) and improve reliability. can.

[0347] Note that oxygen can be introduced into the oxide semiconductor film by, for example, It is possible to provide an oxide containing more oxygen than the oxygen required for the stoichiometric composition. In oxides, there is a region where oxygen exists in excess of the stoichiometric composition (hereinafter referred to as the excess oxygen region). In particular, when an oxide semiconductor film is used for a transistor, In this case, oxides with excess oxygen regions are used in the underlayer film near the transistor or in the interlayer film. By providing the insulating film, oxygen vacancies in the transistor can be reduced, and the reliability can be improved.

[0348] An oxide semiconductor film in which impurities are sufficiently reduced is used for a channel formation region of a transistor. This allows stable electrical properties to be imparted.

[0349] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0350] (Embodiment 3) In this embodiment, a display device including the transistor described in the previous embodiment will be described. An example will be described below with reference to FIGS.

[0351] 19 is a top view showing an example of a display device. The display device 700 shown in FIG. A pixel portion 702 is provided on the first substrate 701, and a source driver 703 is provided on the second substrate 701. The pixel section 702, the source driver circuit section 704, the gate driver circuit section 706, a sealant 712 disposed to surround the path portion 704 and the gate driver circuit portion 706; and a second substrate 705 provided so as to face the first substrate 701. The first substrate 701 and the second substrate 705 are sealed with a sealant 712. That is, the pixel section 702, the source driver circuit section 704, and the gate driver circuit section 706 are The first substrate 701, the sealant 712, and the second substrate 705 seal the entire structure. Although not shown in FIG. 19, a display element is provided between the first substrate 701 and the second substrate 705. It can be done.

[0352] The display device 700 is surrounded by a sealant 712 on the first substrate 701. In a region different from the region, a pixel section 702, a source driver circuit section 704, a gate driver circuit section FPC terminals electrically connected to the wiring portion 706 and the gate driver circuit portion 706, respectively. A sub-unit 708 (FPC: Flexible printed circuit) is provided. In addition, an FPC 716 is connected to the FPC terminal portion 708, and the FPC 716 Various signals are sent to the source driver circuit section 702, the source driver circuit section 704, and the gate driver circuit section 706. Also, a pixel section 702, a source driver circuit section 704, a gate driver circuit section A signal line 710 is connected to each of the path portion 706 and the FPC terminal portion 708. Various signals supplied by 716 are transmitted to the pixel section 702, the source driver 716, and the like via signal lines 710. 704, the gate driver circuit section 706, and the FPC terminal section 708. do.

[0353] Furthermore, the display device 700 may be provided with a plurality of gate driver circuits 706. The device 700 includes a source driver circuit section 704 and a gate driver circuit section 706. Although an example in which the pixel portion 702 is formed on the same first substrate 701 is shown, the present invention is not limited to this configuration. For example, only the gate driver circuit section 706 may be formed on the first substrate 701. Alternatively, only the source driver circuit portion 704 may be formed on the first substrate 701. In this case, the substrate on which the source driver circuit or the gate driver circuit etc. is formed (for example, A driving circuit board formed of a monocrystalline semiconductor film or a polycrystalline semiconductor film is formed on a first substrate 701. The method of connecting the separately formed drive circuit board is not particularly limited. Instead of COG (Chip On Glass) method, wire bonding method, etc. can be used.

[0354] The display device 700 also includes a pixel section 702, a source driver circuit section 704, and a gate The driver circuit portion 706 includes a plurality of transistors. A transistor having a specific position can be applied.

[0355] The display device 700 can also include various elements, such as: For example, electroluminescence (EL) elements (EL elements including organic and inorganic materials, organic EL elements, inorganic EL elements, LEDs, etc.), light-emitting transistor elements (which emit light according to the current) transistors), electron emission elements, liquid crystal elements, electronic ink elements, electrophoretic elements, Low-wetting element, plasma display panel (PDP), MEMS (micro- Electro-mechanical systems) displays (e.g., grating light bulbs) GLV (Glass Laser Diode), Digital Micromirror Device (DMD), Digital Microshaft Distributed Membrane Switching (DMS) element, Interferometric Modulation (IMOD) element ), piezoelectric ceramic displays, etc.

[0356] An example of a display device using an EL element is an EL display. An example of a display device using emission elements is a field emission display (FE D) or SED type flat panel display (SED: Surface-conductive n Electron-emitter Display) etc. An example of such a display device is a liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display, etc.). Displays, reflective LCD displays, direct-view LCD displays, projection LCD displays Examples of display devices using electronic ink elements or electrophoretic elements include: There are also semi-transmissive LCD displays and reflective LCD displays. In this case, a part or all of the pixel electrode should function as a reflective electrode. For example, a part or the whole of the pixel electrode may be made of aluminum, silver, etc. In this case, a memory circuit such as an SRAM may be provided under the reflective electrode. This can further reduce power consumption.

[0357] The display method of the display device 700 may be a progressive method or an interlace method. In addition, the color elements controlled by pixels when displaying colors include R It is not limited to the three colors GB (R stands for red, G stands for green, B stands for blue). For example, It may be composed of four pixels: a pixel, a B pixel, and a W (white) pixel. As in the column, two colors of RGB make up one color element, and different two You can also select a color and configure it by adding one or more colors such as yellow, cyan, magenta, etc. to RGB. The size of the display area may be different for each dot of the color element. However, the disclosed invention is not limited to color display devices, but also to monochrome display devices. It can also be applied to a display device.

[0358] Also, white light is emitted from the backlight (organic EL element, inorganic EL element, LED, fluorescent lamp, etc.) In order to display full color using (W), a colored layer (also called a color filter) is used. The colored layer may be, for example, red (R), green (G), blue (B), or the like. ), yellow (Y), etc. can be used in combination as appropriate. In this case, the color reproducibility can be improved compared to when no color layer is used. By disposing a region having a colored layer and a region not having a colored layer, The white light in the region may be directly used for display. By placing the color layer in the display, the decrease in brightness caused by the color layer can be reduced during bright display, and power consumption can be reduced by 2. However, it may be possible to reduce the emission by approximately 100% to 30%. When using optical elements to display full color, R, G, B, Y, and W are emitted by each color. By using a self-luminous element, it is possible to make the light emitted from a colored layer. In some cases, power consumption can be further reduced.

[0359] In addition, as a colorization method, a part of the light emitted from the above-mentioned white light is passed through a color filter. In addition to the color filter method, which converts red, green, and blue by filtering, A method that uses each color of light (three-color method), or a method that uses part of the light emitted from the blue light to emit red or A method of converting to green (color conversion method, quantum dot method) may also be applied.

[0360] In this embodiment, a liquid crystal element and an EL element are used as display elements. 20 and 22. Note that FIG. 20 shows the area indicated by the dashed line QR in FIG. 22 is a cross-sectional view of the display device, which uses a liquid crystal element as the display element. 19 is a cross-sectional view taken along the dashed line QR, and shows a configuration in which an EL element is used as a display element. is.

[0361] First, the common parts shown in Figures 20 and 22 will be explained, and then the different parts will be explained. This will be explained below.

[0362] <3-1. Explanation of common parts of display devices> The display device 700 shown in FIGS. 20 and 22 includes a wiring portion 711, a pixel portion 702, and a , a source driver circuit section 704, and an FPC terminal section 708. The line portion 711 includes a signal line 710. The pixel portion 702 includes a transistor 750 and The source driver circuit portion 704 includes a transistor 752. Has.

[0363] Transistor 750 and transistor 752 are similar to transistor 100D shown above. The transistors 750 and 752 have the following configurations. Other transistors shown in the embodiment may also be used.

[0364] The transistor used in this embodiment is made of a highly purified oxide in which the formation of oxygen vacancies is suppressed. The transistor has a semiconductor film. The off-state current of the transistor can be reduced. This allows for longer retention times for electrical signals such as signals, and the write interval can also be extended when the power is on. Therefore, the frequency of refresh operations can be reduced, resulting in reduced power consumption. It has the effect of suppressing force.

[0365] In addition, the transistor used in this embodiment has a relatively high field-effect mobility. For example, a transistor capable of such high speed driving can be used in a liquid crystal display. By using this in a display device, the switching transistor in the pixel section and the driver circuit section can be In other words, the driver transistor can be formed on the same substrate as a separate driver circuit. Therefore, it is not necessary to use a semiconductor device formed from a silicon wafer or the like. The number of components can be reduced. By using a register, high quality images can be provided.

[0366] The capacitor 790 includes a conductive film which functions as a first gate electrode of the transistor 750. The lower electrode formed through a process of processing the same conductive film and the A conductive film that functions as a source electrode and a drain electrode, or a second gate electrode and an upper electrode formed through a process of processing the same conductive film as the conductive film that is to be formed on the substrate. The transistor 750 has a first gate insulating film between the lower electrode and the upper electrode. an insulating film formed through a process of forming the same insulating film as the insulating film that functions as a transistor; This is formed through a process of forming the same insulating film as the insulating film that functions as the protective insulating film on the surface of the sta- 750. That is, the capacitor element 790 has a dielectric film between a pair of electrodes. It has a laminated structure in which an insulating film that functions as a gate electrode is sandwiched.

[0367] 20 and 22, the transistor 750, the transistor 752, and the capacitor A planarization insulating film 770 is provided on the capacitor 790 .

[0368] The planarization insulating film 770 may be made of a polyimide resin, an acrylic resin, or a polyimide amide resin. Heat-resistant organic materials such as benzocyclobutene resin, polyamide resin, and epoxy resin It should be noted that by stacking multiple insulating films made of these materials, Alternatively, the planarization insulating film 770 may be formed. That's fine.

[0369] 20 and 22, the transistor 750 and the The transistor 752 in the source driver circuit portion 704 has the same structure as the transistor 752 in the source driver circuit portion 704. However, the present invention is not limited to this. For example, the pixel section 702 and the source A transistor different from that of the driver circuit section 704 may be used. 02 is a staggered transistor, and the source driver circuit portion 704 is In the pixel portion 702, an inverted staggered transistor is used. Inverted staggered transistors are used, and the source driver circuit section 704 is provided with staggered transistors. The source driver circuit section 704 may be configured as a gate driver. It may also be read as a driver circuit section.

[0370] The signal line 710 is connected to the source and drain electrodes of the transistors 750 and 752. The signal line 710 is formed through the same process as the conductive film that functions as the signal line 710. When materials containing ZnO are used, signal delays caused by wiring resistance are minimal, making it possible to display on a large screen. It becomes Noh.

[0371] The FPC terminal portion 708 includes a connection electrode 760, an anisotropic conductive film 780, and an FPC 71. 6. The connection electrode 760 is connected to the source and drain electrodes of the transistors 750 and 752. The connection electrode 760 is formed through the same process as the conductive film that functions as the drain electrode. , and is electrically connected to a terminal of the FPC 716 via an anisotropic conductive film 780 .

[0372] The first substrate 701 and the second substrate 705 may be made of, for example, glass. In addition, the first substrate 701 and the second substrate 705 may be flexible substrates. The flexible substrate may be, for example, a plastic substrate. do.

[0373] In addition, a structure 778 is provided between the first substrate 701 and the second substrate 705. The structure 778 is a columnar spacer obtained by selectively etching an insulating film. The distance (cell gap) between the first substrate 701 and the second substrate 705 is controlled. It should be noted that the structures 778 may be spherical spacers.

[0374] On the second substrate 705 side, there is a light-shielding film 738 that functions as a black matrix, A colored film 736 that functions as a color filter, a light-shielding film 738, and a film that contacts the colored film 736 An insulating film 734 is provided.

[0375] <3-2. Configuration example of a display device using a liquid crystal element> The display device 700 shown in FIG. 20 includes a liquid crystal element 775. The liquid crystal element 775 includes a conductive film The conductive film 774 is formed on the second substrate 705. The display device 700 shown in FIG. The alignment state of the liquid crystal layer 776 changes depending on the voltage applied to the conductive film 772 and the conductive film 774. This controls whether light is transmitted or not, allowing images to be displayed.

[0376] The conductive film 772 serves as a source electrode and a drain electrode of the transistor 750. The conductive film 772 is formed over the planarization insulating film 770. The conductive film 772 functions as a pixel electrode, that is, one electrode of a display element. The display device 700 shown in FIG. 72 reflects light and displays it through the colored film 736, so-called reflective color liquid crystal display device. be.

[0377] The conductive film 772 may be a conductive film that transmits visible light or a conductive film that reflects visible light. A conductive film having a light-transmitting property in visible light can be used. For example, a material containing one of the elements selected from indium (In), zinc (Zn), and tin (Sn) As a conductive film that is reflective in visible light, for example, aluminum In this embodiment, the conductive film 772 may be formed using a material containing silver or silver. A conductive film that is reflective in visible light is used.

[0378] 20, the conductive film 772 functions as a drain electrode of the transistor 750. However, the present invention is not limited to this. For example, the structure shown in FIG. As shown in FIG. 1, a conductive film 772 is sandwiched between conductive films 777 serving as connection electrodes. The conductive film may be electrically connected to the drain electrode of the transistor 750. Note that the conductive film 777 functions as a second gate electrode of the transistor 750. Since it is formed through the same process as the conductive film used, there is no need to add any additional manufacturing steps. It can be formed.

[0379] The display device 700 shown in FIG. 20 is a reflective color liquid crystal display device. However, the conductive film 772 is not limited to this. For example, the conductive film 772 may be a conductive film that transmits visible light. Alternatively, a reflective color liquid crystal display device may be used. A so-called semi-transmissive color liquid crystal display is a combination of a transmissive color liquid crystal display and a transmissive color liquid crystal display. It may also be a liquid crystal display device.

[0380] An example of a transmissive color liquid crystal display device is shown in FIG. 23. This is a cross-sectional view taken along the dashed line QR, and shows a configuration in which a liquid crystal element is used as the display element. In addition, the display device 700 shown in FIG. 23 uses a horizontal electric field method (for example, F In the configuration shown in FIG. 23, the pixel electrode functions as a An insulating film 773 is provided over a conductive film 772, and a conductive film 774 is provided over the insulating film 773. In this case, the conductive film 774 functions as a common electrode. An electric field generated between the conductive film 772 and the conductive film 774 through the insulating film 773 causes the liquid The orientation of the crystal layer 776 can be controlled.

[0381] Although not shown in FIGS. 20 and 23, either the conductive film 772 or the conductive film 774 An alignment film is provided on either one or both of the surfaces of the substrate 771 and the liquid crystal layer 776. 20 and 23, a polarizing member, a phase difference member, a reflecting member, etc. may be used. Optical members (optical substrates) such as a polarizing substrate and a positioning member may be provided as appropriate. Circularly polarized light produced by a retardation substrate may also be used. Either may be used.

[0382] When liquid crystal elements are used as display elements, thermotropic liquid crystals, low molecular weight liquid crystals, polymer liquid crystals, The liquid crystals that can be used include polymer dispersed liquid crystals, ferroelectric liquid crystals, and antiferroelectric liquid crystals. Depending on the conditions, the liquid crystal material can be in a cholesteric phase, a smectic phase, a cubic phase, or a chiral phase. It shows nematic phase, isotropic phase, etc.

[0383] In addition, when the in-plane switching method is adopted, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases, and when the temperature of cholesteric liquid crystal is increased, the cholesteric The blue phase appears just before the transition from the black phase to the isotropic phase. Therefore, in order to improve the temperature range, a liquid crystal composition containing a chiral agent of several weight percent or more is used. The liquid crystal composition containing the liquid crystal exhibiting the blue phase and the chiral agent is used in the liquid crystal layer. Since the liquid crystal display has a short rotational speed and is optically isotropic, no alignment treatment is required. Since the rubbing process is unnecessary, electrostatic damage caused by the rubbing process is prevented. This can prevent defects and damage to the liquid crystal display device during the manufacturing process. Furthermore, liquid crystal materials exhibiting a blue phase have little viewing angle dependency.

[0384] When a liquid crystal element is used as a display element, a TN (Twisted Nematic) ) mode, IPS (In-Plane-Switching) mode, FFS (Frin ge Field Switching) mode, ASM (Axially Symme tric aligned Micro-cell) mode, OCB(Optical Compensated Birefringence mode, FLC (Ferrero) lectric Liquid Crystal) mode, AFLC (AntiFerr It can be used in dielectric liquid crystal mode. .

[0385] Furthermore, normally black type liquid crystal display devices, such as those employing vertical alignment (VA) mode, The vertical alignment mode may be a transmission type liquid crystal display device. For example, MVA (Multi-Domain Vertical Alignment) ) mode, PVA (Patterned Vertical Alignment) mode Mode, ASV mode, etc. can be used.

[0386] <3-3. Display devices using light-emitting elements> The display device 700 shown in FIG. 22 includes a light-emitting element 782. The light-emitting element 782 is made of a conductive film The display device 700 shown in FIG. The EL layer 786 of the light element 782 emits light, thereby displaying an image. The EL layer 786 includes an organic compound or an inorganic compound such as quantum dots.

[0387] Materials that can be used for the organic compound include fluorescent materials and phosphorescent materials. In addition, materials that can be used for quantum dots include colloidal quantum dots. materials, alloy-type quantum dot materials, core-shell-type quantum dot materials, core-type quantum dot materials, Also, the elements of the 12th and 16th families, the 13th and 15th families, or the 14th and 16th families Materials containing the element group may also be used. Alternatively, cadmium (Cd), selenium (Se), Zinc (Zn), sulfur (S), phosphorus (P), indium (In), tellurium (Te), lead (P b) Quantum atoms with elements such as gallium (Ga), arsenic (As), and aluminum (Al). Dot material may also be used.

[0388] 22, an insulating film is formed on the planarization insulating film 770 and the conductive film 772. An insulating film 730 is provided. The insulating film 730 covers part of the conductive film 772. 782 has a top emission structure. Therefore, the conductive film 788 has a light transmitting property, and It transmits light emitted by the L layer 786. In this embodiment, the top emission The structure is exemplified, but is not limited to, for example, a bottom emission structure in which light is emitted to both the conductive film 772 and the conductive film 788; It can also be applied to al-emission structures.

[0389] A colored film 736 is provided at a position overlapping the light-emitting element 782, and a colored film 736 is provided at a position overlapping the insulating film 730. A light-shielding film 738 is provided in the position where the light-shielding film 738 is to be drawn, the wiring portion 711, and the source driver circuit portion 704. The colored film 736 and the light-shielding film 738 are covered with an insulating film 734. In addition, the space between the light emitting element 782 and the insulating film 734 is filled with a sealing film 732. In the display device 700 shown in FIG. 1, a configuration in which a colored film 736 is provided is exemplified. For example, when the EL layer 786 is formed by coloring, The film 736 may not be provided.

[0390] <3-4. Example of a configuration in which an input / output device is provided in a display device> Furthermore, the display device 700 shown in FIGS. 22 and 23 may be provided with an input / output device. An example of the force device is a touch panel.

[0391] FIG. 24 shows a configuration in which a touch panel 791 is provided on the display device 700 shown in FIG. FIG. 25 shows a configuration in which a touch panel 791 is provided on the display device 700 shown in FIG.

[0392] FIG. 24 is a cross-sectional view of a configuration in which a touch panel 791 is provided on the display device 700 shown in FIG. 25 is a cross-sectional view of a configuration in which a touch panel 791 is provided on the display device 700 shown in FIG. be.

[0393] First, the touch panel 791 shown in FIGS. 24 and 25 will be described below.

[0394] The touch panel 791 shown in FIGS. 24 and 25 is made of a second substrate 705 and a colored film 736. The touch panel 791 is a so-called in-cell type touch panel that is provided between the colored film. It may be formed on the second substrate 705 side before forming 736 .

[0395] The touch panel 791 includes a light-shielding film 738, an insulating film 792, an electrode 793, and an electrode 794, an insulating film 795, an electrode 796, and an insulating film 797. When a detection object such as a stylus approaches, a change in capacitance between electrode 793 and electrode 794 occurs. It is possible to detect the change.

[0396] 24 and 25, an electrode 793 and The electrode 796 is formed through an opening in the insulating film 795. 24. The electrode 794 is electrically connected to the two electrodes 793 sandwiching the electrode 794 via the electrodes 793. 25 illustrates a configuration in which the region where the electrode 796 is provided is provided in the pixel portion 702. However, the present invention is not limited to this, and may be formed in the source driver circuit section 704, for example.

[0397] The electrodes 793 and 794 are provided in a region overlapping with the light-shielding film 738. As shown in FIG. 1, the electrode 793 is preferably provided so as not to overlap with the light-emitting element 782. 25, the electrode 793 is provided so as not to overlap with the liquid crystal element 775. In other words, the electrode 793 overlaps with the light-emitting element 782 and the liquid crystal element 775. In other words, the electrode 793 has a mesh shape. By configuring the electrode 793 in this manner, the electrode 793 does not block the light emitted from the light emitting element 782. Alternatively, the electrode 793 may have a structure that does not block light that passes through the liquid crystal element 775. Therefore, the reduction in brightness due to the placement of the touch panel 791 is extremely small. Since the number of pixels is small, a display device with high visibility and reduced power consumption can be realized. The pole 794 may have a similar configuration.

[0398] In addition, since the electrodes 793 and 794 do not overlap with the light-emitting element 782, The electrode 794 can be made of a metal material with low transmittance for visible light. Since the electrodes 793 and 794 do not overlap with the liquid crystal element 775, For example, a metal material having low transmittance of visible light can be used.

[0399] Therefore, compared with electrodes using oxide materials with high visible light transmittance, The resistance of the electrode 794 can be reduced, improving the sensor sensitivity of the touch panel. It is possible.

[0400] For example, the electrodes 793, 794, and 796 may be made of conductive nanowires. The nanowires have an average diameter of 1 nm to 100 nm, preferably 5 nm to 50 nm. The size of the nanoparticles may be 5 nm or less, more preferably 5 nm or more and 25 nm or less. The wires may be metal nanowires such as Ag nanowires, Cu nanowires, or Al nanowires. For example, the electrodes 793 and 794 may be made of wires or carbon nanotubes. When Ag nanowires are used for either 94 or 796, or both, the The light transmittance is 89% or more, and the sheet resistance is 40Ω / □ or more and 100Ω / □ or less. can.

[0401] 24 and 25 show examples of the configuration of an in-cell type touch panel. For example, a so-called on-cell type transistor formed on the display device 700 may be used. a touch panel or a so-called out-cell type touch panel that is attached to the display device 700 It may also be possible to use the following.

[0402] In this way, the display device of one embodiment of the present invention can be used in combination with various types of touch panels. It can be used.

[0403] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0404] (Fourth embodiment) In this embodiment, a semiconductor device of one embodiment of the present invention will be described with reference to FIGS. 26 and 27. I will explain.

[0405] <4-1. Configuration examples of semiconductor devices> FIG. 26A is a top view of a semiconductor device 190 of one embodiment of the present invention, and FIG. 26(A) corresponds to a cross-sectional view taken along the dashed line A1-A2 in FIG. FIG. 26B shows a cross section of the transistor Tr1 in the channel length (L) direction and 27 includes a cross section of Tr2 in the channel length (L) direction. 27 corresponds to a cross-sectional view taken along the dashed line B1-B2. It includes a cross section of r1 in the channel width (W) direction.

[0406] In addition, in FIG. 26(A), in order to avoid complication, the configuration of the semiconductor device 190 is Some elements (such as the insulating film that functions as a gate insulating film) and some of the reference numerals of the components are omitted. In the top view of the semiconductor device, the same as in FIG. As in (A), some of the components and some of the reference numerals of the components may be omitted. do.

[0407] The semiconductor device 190 shown in FIGS. 26(A) and 26(B) includes a transistor Tr1 and a transistor The transistor Tr1 and the transistor Tr2 are at least partially overlapped with each other. Both the transistor Tr1 and the transistor Tr2 are bottom gate transistors. do.

[0408] The transistor Tr1 and the transistor Tr2 are at least partially overlapped with each other. By providing the transistor, the layout area of ​​the transistor can be reduced.

[0409] The transistor Tr1 is formed by a conductive film 104 on a substrate 102 and a semiconductor layer formed by the substrate 102 and the conductive film 104. the insulating film 106 on the oxide semiconductor film 108; the conductive film 112a on the oxide semiconductor film 108, the conductive film 112b on the oxide semiconductor film 108, and the oxide semiconductor film 1 08, the insulating film 114 on the conductive film 112a and the conductive film 112b, and the insulating film 114 The insulating film 116 includes a conductive film 122c on the insulating film 116.

[0410] The transistor Tr2 includes a conductive film 112b and an insulating film 114 on the conductive film 112b. , the insulating film 116 on the insulating film 114, the oxide semiconductor film 128 on the insulating film 116, and the oxide The conductive film 122a over the semiconductor film 128, the conductive film 122b over the oxide semiconductor film 128, and the oxide semiconductor film 122b are the insulating film 124 on the nitride semiconductor film 128, the conductive film 122a, and the conductive film 122b; The insulating film 126 is formed on the insulating film 124, and the conductive film 130 is formed on the insulating film 126. The insulating film 124 and the conductive film 122a are connected to the insulating film 124 through an opening 182 formed in the insulating film 126. To be continued.

[0411] As shown in FIGS. 26(A) and 26(B), the oxide semiconductor film 108 and the oxide semiconductor film 1 28 have an overlapping area. The channel region formed in the oxide semiconductor film 108 of the transistor Tr1 and the It is preferable that the channel region formed in the oxide semiconductor film 128 does not overlap with the channel region formed in the oxide semiconductor film 128. .

[0412] The channel region of the transistor Tr1 and the channel region of the transistor Tr2 are mutually In the case of overlap, when one transistor is operating, it affects the other. To avoid this effect, a resistor between transistors Tr1 and Tr2 is A structure that increases the distance between transistors Tr1 and Tr2, or a conductive film However, in the former case, the semiconductor device becomes thicker. Therefore, for example, when the semiconductor device 190 is formed on a flexible substrate, bending property is an issue. In the latter case, the number of steps for forming the conductive film increases, and in the former case, As in the case of the configuration of (1), the semiconductor device becomes thicker, which can cause problems.

[0413] On the other hand, in the semiconductor device 190 according to one embodiment of the present invention, the transistor Tr1 and the transistor The transistors Tr1 and Tr2 are arranged so as to overlap each other, and the channel regions of the transistors are arranged so as not to overlap each other. In addition, by arranging a part of the oxide semiconductor film in which the channel region is formed to overlap, This allows the layout area of ​​the resistor to be suitably reduced.

[0414] The oxide semiconductor film 108 and the oxide semiconductor film 128 contain In and M (M The oxide semiconductor film 108 includes Al, Ga, Y, or Sn) and Zn. and the oxide semiconductor film 128, the atomic ratio of In is larger than the atomic ratio of M. However, the semiconductor device of one embodiment of the present invention is not limited thereto. A structure having a region in which the atomic ratio of In is smaller than the atomic ratio of M, or a region in which the atomic ratio of In is smaller than the atomic ratio of M may have a region where the atomic ratio of M is the same as that of M.

[0415] The oxide semiconductor film 108 and the oxide semiconductor film 128 have the same composition or different compositions. The oxide semiconductor film 108 and the oxide semiconductor film 128 preferably have substantially the same composition. By making the same, it is possible to reduce the manufacturing cost. The semiconductor device is not limited to this. The oxide semiconductor film 108 and the oxide semiconductor film 128 may be formed by The composition of the two materials may be different.

[0416] The oxide semiconductor film 108 and the oxide semiconductor film 128 have an atomic ratio of In that is higher than the atomic ratio of M. By having a larger area, the field effect transfer of the transistor Tr1 and the transistor Tr2 The degree can be increased.

[0417] The semiconductor device 190 shown in FIGS. 26(A) and 26(B) is suitable for use in a pixel circuit of a display device. By using the arrangement shown in FIGS. 26(A) and 26(B), the pixel density of the display device can be increased. For example, if the pixel density of a display device is 1000 ppi (pixel 1 per inch), or the pixel density of the display device exceeds 2000 ppi Even in this case, the pixel aperture ratio can be increased by using the arrangement shown in FIGS. 26(A) and 26(B). Note that ppi is a unit that represents the number of pixels per inch.

[0418] Furthermore, when the semiconductor device 190 shown in FIG. 26(A)(B) is applied to a pixel of a display device, For example, the channel length (L) and channel width (W) of a transistor For example, the width of the wiring and electrodes connected to the transistor can be made relatively large. Compared with the case where transistor Tr1 and transistor Tr2 are arranged on the same plane, As shown in (B), at least a part of the transistor Tr1 and the transistor Tr2 is By stacking the parts, it is possible to increase the line width, etc., thereby reducing the variation in processing dimensions. It is possible to reduce the

[0419] In addition, the transistor Tr1 and the transistor Tr2 are formed of either a conductive film or an insulating film. One or both can be used in common, reducing the number of masks or processes. It is possible.

[0420] For example, in the transistor Tr1, the conductive film 104 functions as a first gate electrode. The conductive film 112a functions as a source electrode, and the conductive film 112b functions as a drain electrode. The conductive film 122c functions as a second gate electrode. In this case, the insulating film 106 functions as a first gate insulating film, and the insulating films 114 and 116 function as a second gate insulating film. In the transistor Tr2, the conductive film 112b functions as a gate insulating film. The conductive film 122a functions as the gate electrode of the first gate electrode, the conductive film 122b functions as the source electrode, and the conductive film 122 b functions as a drain electrode, and the conductive film 130 functions as a second gate electrode. In the transistor Tr2, the insulating films 114 and 116 function as a first gate insulating film. The insulating films 124 and 126 function as a second gate insulating film.

[0421] In this specification and the like, the insulating film 106 is referred to as a first insulating film, and the insulating films 114 and 116 are referred to as a second insulating film. The second insulating film and the insulating films 124 and 126 may be referred to as a third insulating film. .

[0422] An insulating film 134 and an insulating film 136 are provided on the conductive film 130. In addition, an opening 184 reaching the conductive film 130 is provided in the insulating films 134 and 136. A conductive film 138 is provided over the insulating film 136. Note that the conductive film 138 It is connected to the conductive film 130 through the opening 184 .

[0423] Moreover, an insulating film 140, an EL layer 150, and a conductive film 144 are provided on the conductive film 138. The insulating film 140 covers a part of the side edge of the conductive film 138 and prevents the conductive film 138 from being broken between adjacent pixels. The EL layer 150 has a function of emitting light. The conductive film 138, the EL layer 150, and the conductive film 144 constitute a light-emitting element 160. The conductive film 138 functions as one electrode of the light-emitting element 160, and the conductive film 144 , which functions as the other electrode of the light emitting element 160 .

[0424] As described above, a semiconductor device according to one embodiment of the present invention has a stacked structure including a plurality of transistors. The area required for installing the transistor is reduced. By using either one or both of the conductive films in common, the number of masks or processes can be reduced. can be reduced.

[0425] As shown in FIGS. 26(A) and 26(B), the transistors Tr1 and Tr2 Each of the structures has two gate electrodes.

[0426] Here, the effect of the structure having two gate electrodes will be explained with reference to FIGS. 26(A) and 26(B) and FIG. 7 will be used for explanation.

[0427] As shown in FIG. 27, the conductive film 122c functioning as the second gate electrode is formed in the opening 18. 1, the gate electrode is electrically connected to the conductive film 104 which functions as the first gate electrode. The conductive film 104 and the conductive film 122c are applied with the same potential. The oxide semiconductor film 108 is positioned to face the conductive film 104 and the conductive film 122c. The conductive film 104 and the conductive film 105 are sandwiched between two conductive films that function as gate electrodes. The length of 22c in the channel width direction is the same as the length of the oxide semiconductor film 108 in the channel width direction. The entire oxide semiconductor film 108 is longer than the insulating film 106, 114, and 116. It is covered with the conductive film 104 and the conductive film 122c.

[0428] In other words, the conductive film 104 and the conductive film 122c are provided on the insulating films 106, 114, and 116. The oxide semiconductor film 108 is connected to the opening 181 formed in the opening 181 and is located outside the side edge of the oxide semiconductor film 108. By adopting such a configuration, the transistor Tr1 has a region located at The oxide semiconductor film 108 is electrically surrounded by the electric fields of the conductive film 104 and the conductive film 122c. That is, the transistor Tr1 has an S-Channel structure.

[0429] In the above description, the first gate electrode and the second gate electrode are connected. The structure is an example, but is not limited to this. For example, the transistor shown in FIG. The conductive film 130 functioning as the second gate electrode of the transistor Tr2 is The conductive film 122a functions as a source electrode or a drain electrode. You may do so.

[0430] <4-2. Components of Semiconductor Devices> Next, the components included in the semiconductor device of this embodiment will be described in detail. The same components as those shown in the first embodiment are designated by the same reference numerals, and detailed descriptions thereof will be omitted. will be omitted.

[0431] [Conductive film] Conductive film 122a, conductive film 122b, conductive film 122c, conductive film 130, conductive film 138, and The conductive film 144 includes the conductive film 104, the conductive films 112a and 112b, and the conductive film 120. The same materials as those in a and 120b can be used.

[0432] In addition, the conductive film 122a, the conductive film 122b, the conductive film 122c, the conductive film 130, and the conductive film 13 8, and the conductive film 144 is made of an oxide containing indium and tin, or a tungsten and indium oxides containing tungsten, indium and zinc; oxides containing titanium and indium; oxides containing titanium, indium, and tin; oxides containing indium and zinc an oxide having silicon, indium, and tin; an oxide having indium and gallium An oxide conductor (OC) such as an oxide having copper and zinc can also be applied.

[0433] In particular, the conductive film 130 can be suitably made of the oxide conductor (OC) described above.

[0434] [Insulating film] The insulating film 124, the insulating film 126, and the insulating film 134 may be the insulating film 106, the insulating film 11, or the like. 4 and the insulating film 116 can be used.

[0435] Note that when the oxide semiconductor film 108 or the oxide semiconductor film 128 is in contact with the The insulating film to be used is preferably an oxide insulating film, and the composition of the insulating film is preferably in excess of the stoichiometric composition. It is more preferable to have a region containing oxygen (excess oxygen region). The oxide insulating film having an oxygen region is an insulating film that can release oxygen.

[0436] Note that the oxide insulating film having the above-described excess oxygen region can be formed by, for example, Forming an insulating film, heat-treating the formed insulating film in an oxygen atmosphere, or The method of adding oxygen to the insulating film after the film formation is also Plasma treatment is preferred.

[0437] Also, an insulating film that functions as a gate insulating film for the transistor Tr1 and the transistor Tr2 The insulating film that functions as a gate insulating film may be made of silicon nitride. When silicon nitride is used, the following effects are achieved: Silicon nitride has a low dielectric constant compared to silicon oxide. The required thickness to obtain the same capacitance as silicon oxide is large, so an insulating film is Therefore, the dielectric strength of the transistors Tr1 and Tr2 can be increased. By suppressing the voltage drop and improving the dielectric strength, the transistor Tr1 and the transistor This can suppress electrostatic breakdown of Tr2.

[0438] The insulating films 114, 116, 124, and 126 are formed of the oxide semiconductor film 108 or the oxide It has a function of supplying oxygen to one or both of the semiconductor films 128. The insulating films 114, 116, 124, and 126 contain oxygen. The insulating film 114 is an insulating film that can transmit oxygen. The insulating layer 116 also functions as a layer for reducing damage to the oxide semiconductor layer 108 when the insulating layer 116 is formed. The insulating film 124 prevents damage to the oxide semiconductor film 128 when the insulating film 126 is formed later. It also functions as an image-reducing membrane.

[0439] The insulating films 114 and 124 have a thickness of 5 nm to 150 nm, preferably 5 nm. Silicon oxide, silicon oxynitride, etc. having a thickness of 50 nm or more can be used.

[0440] Furthermore, it is preferable that the insulating films 114 and 124 have a small number of defects. The measurement revealed that the signal at g = 2.001 originated from the silicon dangling bond. Pin density is 3x10 17spins / cm 3 This is because the insulating film If the density of defects in the insulating film 114 and 124 is high, oxygen will bond to the defects, and the insulating film 11 The amount of oxygen that can pass through 4 decreases.

[0441] The insulating films 114 and 124 are oxide insulating films with low density of states caused by nitrogen oxides. The density of states caused by the nitrogen oxide can be reduced by using an oxide semiconductor. The energy of the upper edge of the valence band of the oxide semiconductor film (Ev_os) and the energy of the lower edge of the conduction band of the oxide semiconductor film The oxide insulating film may be formed between the gate electrode and the gate electrode. Silicon oxynitride film that releases less oxide or nitroxide For example, an aluminum oxide film can be used.

[0442] The silicon oxynitride film, which emits a small amount of nitrogen oxides, was analyzed by thermal desorption spectroscopy (TD). S), it is a membrane that releases more ammonia than nitrogen oxides, and is typically The amount of ammonia released is 1 x 10 18 / cm 3 5x10 or more 19 / cm 3 The following is the case. The amount of ammonia released is as follows: The total amount of ammonia in the range of 50°C to 550°C. The amount of discharged ammonia is the total amount converted into ammonia molecules in TDS.

[0443] The insulating film 134 functions as a protective insulating film for the transistors Tr1 and Tr2. Possess the ability.

[0444] The insulating film 134 contains either hydrogen or nitrogen, or both. The insulating film 134 contains nitrogen and silicon. The insulating film 134 contains oxygen, hydrogen, water, and alkali. The insulating film 134 has a function of blocking metals, alkaline earth metals, etc. As a result, oxygen is diffused from the oxide semiconductor film 108 and the oxide semiconductor film 128 to the outside, and the insulating film 128 is The oxygen contained in the insulating films 114, 116, 124, and 126 diffuses to the outside, and the oxide This can prevent hydrogen, water, and the like from entering the semiconductor films 108 and 128.

[0445] The insulating film 134 may be, for example, a nitride insulating film. Examples include silicon nitride, silicon nitride oxide, aluminum nitride, and aluminum nitride oxide. etc.

[0446] The insulating film 136 and the insulating film 140 have the function of flattening unevenness caused by transistors and the like. The insulating film 136 and the insulating film 140 may be made of any material as long as they are insulating, including inorganic materials. The insulating film is formed using an inorganic material such as a silicon oxide film or a silicon oxynitride film. Silicon oxide film, silicon nitride film, aluminum oxide film, aluminum nitride film Examples of the organic material include an acrylic resin and a polyimide resin. Examples of photosensitive resin materials include the above.

[0447] [Oxide semiconductor film] The oxide semiconductor film 128 can be formed using a material similar to that of the oxide semiconductor film 108. Cut.

[0448] [EL layer] The EL layer 150 has a function of emitting light and includes at least a light-emitting layer. In addition to the light-emitting layer, the layer 0 may also have other layers with functions such as a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer. The EL layer 150 can be made of a low molecular weight compound or a high molecular weight compound. do.

[0449] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0450] (Embodiment 5) In this embodiment, a semiconductor device according to one embodiment of the present invention is used in a display portion or the like of a display device. An example of a display panel that can be used will be described with reference to FIGS. 28 and 29. The display panel shown in FIG. 1 has both a reflective liquid crystal element and a light emitting element, and is operable in both a transmissive mode and a reflective mode. This is a display panel that can display both modes.

[0451] <5-1. Display panel configuration example> 28 is a perspective schematic diagram of a display panel 600 according to one embodiment of the present invention. 28 has a structure in which a substrate 651 and a substrate 661 are bonded together. is indicated by a dashed line.

[0452] The display panel 600 includes a display portion 662, a circuit 659, wiring 666, and the like. In the pixel 650, for example, a circuit 659, a wiring 666, a conductive film 663 functioning as a pixel electrode, and the like are provided. In addition, Figure 28 shows an example where IC 673 and FPC 672 are mounted on board 651. Therefore, the configuration shown in FIG. 28 is a display panel 600, an FPC 672, and an I It can also be called a display module with C673.

[0453] The circuit 659 can be, for example, a circuit that functions as a scanning line driver circuit.

[0454] The wiring 666 has a function of supplying signals and power to the display portion and the circuit 659. Power is input to wiring 666 from the outside via FPC 672 or from IC 673.

[0455] In addition, in FIG. 28, a substrate 665 is formed by a COG (Chip On Glass) method or the like. 1 is provided with an IC 673. The IC 673 is, for example, a scanning line driving circuit Alternatively, an IC having a function as a signal line driver circuit or the like can be applied. 00 may have a circuit that functions as a scanning line driver circuit and a signal line driver circuit, or The circuit that functions as the driving circuit and the signal line driving circuit is provided externally, and the display panel is connected to the When inputting a signal to drive the panel 600, the IC673 is not provided. In addition, IC673 may be mounted by a COF (Chip On Film) method or the like. It may also be mounted on FPC672.

[0456] 28 shows an enlarged view of a part of the display unit 662. The display unit 662 has a plurality of displays. The conductive film 663 included in the display element is arranged in a matrix. and functions as a reflective electrode for the liquid crystal element 640, which will be described later.

[0457] 28, the conductive film 663 has an opening. A light emitting element 660 is provided on the substrate 651 side. Light from the light emitting element 660 is radiated through a conductive film 663. The light is emitted to the substrate 661 side through the opening.

[0458] <5-2. Example of cross-sectional configuration> FIG. 29 shows a part of the area including the FPC 672 and the circuit 65 of the display panel shown in FIG. 9 and a section of a region including the display unit 662. An example is shown below.

[0459] The display panel has an insulating film 620 between a substrate 651 and a substrate 661. Between the insulating film 620 and the light-emitting element 660, the transistor 601, the transistor 605, The transistor 606, the coloring layer 634, etc. are included. In addition, between the insulating film 620 and the substrate 661, The substrate 661 and the insulating film 620 are connected by an adhesive layer 64 1, and the substrate 651 and the insulating film 620 are bonded together via an adhesive layer 642. .

[0460] The transistor 606 is electrically connected to the liquid crystal element 640, and the transistor 605 is The transistor 605 and the transistor 606 are electrically connected to the optical element 660. Since the insulating film 620 is also formed on the surface of the substrate 651 side, these can be formed using the same process. It can be made by

[0461] The substrate 661 is provided with a colored layer 631, a light-shielding film 632, an insulating film 621, and a liquid crystal element 640. A conductive film 613 functioning as a common electrode, an alignment film 633b, an insulating film 617, etc. are provided. The insulating film 617 functions as a spacer to maintain the cell gap of the liquid crystal element 640. It works.

[0462] The insulating film 620 is provided on the substrate 651 side with an insulating film 681, an insulating film 682, an insulating film 683, and an insulating film 684. The insulating film 681 is provided with insulating layers such as a film 684 and an insulating film 685. The insulating film 682, the insulating film 683, and the insulating film 684 function as a gate insulating layer of the transistor. The insulating film 684 is provided to cover each transistor. The insulating film 684 and the insulating film 685 function as planarization layers. Here, insulating films 682, 683, and Although the example shows a case where the membrane 684 has three layers, the present invention is not limited to this and may have four or more layers. The insulating film 684 may be a single layer or a two-layer. may not be provided if not required.

[0463] In addition, the transistors 601, 605, and 606 are partially A conductive film 654 functions as a gate, and a conductive film 655 functions as a source or a drain. 52 and a semiconductor film 653. Here, the same conductive film is processed into multiple layers. , are marked with the same hatching pattern.

[0464] The liquid crystal element 640 is a reflective liquid crystal element. The liquid crystal element 640 includes a conductive film 635, a liquid crystal layer The conductive film 635 has a laminated structure in which the conductive film 635 is laminated on the substrate 651 side. A conductive film 663 that reflects visible light is provided in contact with the opening 655. The conductive film 635 and the conductive film 613 contain a material that transmits visible light. An alignment film 633a is provided between the liquid crystal layer 612 and the conductive film 635. An alignment film 633b is provided between the substrate 661 and the polarizer 65. It has 6.

[0465] In the liquid crystal element 640, the conductive film 663 has a function of reflecting visible light, and the conductive film 613 The light incident from the substrate 661 side is polarized by the polarizing plate 656. The light is polarized, passes through the conductive film 613 and the liquid crystal layer 612, and is reflected by the conductive film 663. The light passes through the layer 612 and the conductive film 613 again and reaches the polarizer 656. The orientation of the liquid crystal is controlled by the voltage applied between 63 and the conductive film 613, and the optical modulation of light is controlled. That is, the intensity of the light emitted through the polarizing plate 656 can be controlled. In addition, the colored layer 631 absorbs light outside of a specific wavelength range. The extracted light is, for example, red light.

[0466] The light emitting element 660 is a bottom emission type light emitting element. A laminated layer in which a conductive film 643, an EL layer 644, and a conductive film 645b are laminated in this order from the film 620 side. In addition, the conductive film 645a is provided to cover the conductive film 645b. The conductive film 45b contains a material that reflects visible light, and the conductive film 643 and the conductive film 645a transmit visible light. The light emitted from the light emitting element 660 is guided through the colored layer 634, the insulating film 620, the opening 65, and the insulating film 620. 5. The light is emitted to the substrate 661 side through the conductive film 613 and the like.

[0467] Here, as shown in FIG. 29, a conductive film 635 that transmits visible light is provided in the opening 655. This allows the area overlapping with the opening 655 to be Since the liquid crystal is oriented in the same way as in the other regions, poor alignment of the liquid crystal occurs at the boundary between these regions, resulting in unintended This can prevent unwanted light from leaking.

[0468] Here, a linear polarizer may be used as the polarizer 656 disposed on the outer surface of the substrate 661. However, a circular polarizer can also be used. A laminate of long retardation plates can be used. This can suppress external light reflection. In addition, depending on the type of polarizer, the cell gap of the liquid crystal element used in the liquid crystal element 640 can be adjusted. By adjusting the polarity, orientation, driving voltage, etc., the desired contrast can be achieved. good.

[0469] In addition, an insulating film 647 is provided over the insulating film 646 that covers the end portion of the conductive film 643 . The insulating film 647 is a spacer that prevents the insulating film 620 and the substrate 651 from getting closer than necessary. The EL layer 644 and the conductive film 645a are also shielded by a metal mask. When forming the mask using a masking mask, it is necessary to prevent the mask from coming into contact with the surface on which the mask is to be formed. Note that the insulating film 647 does not have to be provided if it is not necessary.

[0470] One of the source and drain of the transistor 605 is connected to the light-emitting element 6 through a conductive film 648. It is electrically connected to the conductive film 643 of 60.

[0471] One of the source and drain of the transistor 606 is connected to the conductive film 66 through a connection portion 607. The conductive film 663 and the conductive film 635 are provided in contact with each other. Here, the connection portion 607 is electrically connected through an opening provided in the insulating film 620. The insulating film 620 is a portion that connects the conductive films provided on both sides of the insulating film 620 together.

[0472] A connection portion 604 is provided in the area where the substrate 651 and the substrate 661 do not overlap. The connection portion 604 is electrically connected to the FPC 672 via the connection layer 649. The upper surface of the connecting portion 604 is the same as the conductive film 635. The conductive film obtained by processing the first conductive film is exposed. C672 can be electrically connected via a connection layer 649.

[0473] A connecting portion 687 is provided in a portion of the area where the adhesive layer 641 is provided. In 87, a conductive film obtained by processing the same conductive film as the conductive film 635 and a conductive film 613 A part of the wiring is electrically connected by a connector 686. A signal input from an FPC 672 connected to the substrate 651 side is input to the formed conductive film 613. or potential can be supplied via connection 687.

[0474] The connector 686 may be, for example, a conductive particle. For this purpose, particles of organic resin or silica coated with a metal material may be used. It is preferable to use nickel or gold as the metal material, as this reduces the contact resistance. Particles coated with layers of two or more metal materials, such as nickel coated with gold, are used. It is preferable to use a material that can be elastically or plastically deformed as the connector 686. In this case, the connectors 686, which are conductive particles, are preferably used as shown in FIG. In this way, the connecting body 686 and the connecting body 686 may be crushed in the vertical direction. The contact area with the electrically conductive film increases, reducing contact resistance and preventing connection failures. The occurrence of the above defects can be suppressed.

[0475] The connector 686 is preferably disposed so as to be covered with the adhesive layer 641. For example, The connectors 686 may be dispersed in the adhesive layer 641 before curing.

[0476] FIG. 29 shows an example of a circuit 659 in which a transistor 601 is provided. do.

[0477] In FIG. 29, as an example of a transistor 601 and a transistor 605, a channel is formed. The semiconductor film 653 is sandwiched between two gates. The other gate is a conductive film overlapping the semiconductor film 653 via the insulating film 682. The film 623 is configured as follows. By using such a configuration, the threshold voltage of the transistor The voltage can be controlled by connecting two gates and applying the same signal to them. Such a transistor may be driven by supplying a It is possible to increase the field effect mobility compared to conventional transistors, and increase the on-current. As a result, a circuit capable of high-speed operation can be fabricated. By using a transistor with a large on-current, Therefore, even if the number of wires increases when the display panel is made larger or higher resolution, each wire It is possible to reduce signal delay in the lines, and to suppress display unevenness.

[0478] Note that the transistors included in the circuit 659 and the transistors included in the display portion 662 are the same. The plurality of transistors included in the circuit 659 may all have the same structure. Alternatively, transistors of different structures may be used in combination. The plurality of transistors in 662 may all have the same structure, or may have different structures. Transistors may also be used in combination.

[0479] At least one of the insulating film 682 and the insulating film 683 covering each transistor is resistant to water and hydrogen. It is preferable to use a material in which impurities are not easily diffused, such as the insulating film 682. In this case, the insulating film 683 can function as a barrier film. It is possible to effectively suppress the diffusion of impurities into the transistor from the outside. This makes it possible to realize a highly reliable display panel.

[0480] On the substrate 661 side, an insulating film 621 is provided to cover the colored layer 631 and the light-shielding film 632. The insulating film 621 may also function as a planarizing layer. This allows the surface of the conductive film 613 to be roughly flat, making it possible to make the alignment state of the liquid crystal layer 612 uniform. do.

[0481] An example of a method for manufacturing the display panel 600 will be described. A conductive film 635, a conductive film 663, and an insulating film 620 are formed in this order on a substrate. After forming the stator 605, the transistor 606, the light emitting element 660, etc., Then, the substrate 651 and the support substrate are bonded together. The support substrate and the release layer are removed by peeling off the conductive film 635 at their respective interfaces. In addition, a colored layer 631, a light-shielding film 632, a conductive film 613, etc. are formed on a substrate in advance. A plate 661 is prepared. Then, liquid crystal is dropped onto the substrate 651 or the substrate 661, and an adhesive layer 641 is formed. By bonding the substrate 651 and the substrate 661 together, the display panel 600 can be manufactured. can.

[0482] For the peeling layer, a material that causes peeling at the interface with the insulating film 620 and the conductive film 635 is appropriately selected. In particular, a layer containing a high melting point metal material such as tungsten can be used as the release layer. A layer containing an oxide of the metal material is stacked, and a nitride film is used as an insulating film 620 on the peeling layer. It is preferable to use a multi-layer structure of silicon, silicon oxynitride, silicon nitride oxide, etc. When a high melting point metal material is used for the release layer, the temperature for forming the subsequent layers is increased. This allows the concentration of impurities to be reduced, thereby realizing a highly reliable display panel.

[0483] The conductive film 635 may be made of an oxide or nitride such as a metal oxide or a metal nitride. When metal oxides are used, hydrogen, boron, phosphorus, nitrogen, and other impurities are preferably used. At least one of the concentration of impurities and the amount of oxygen vacancies is higher than that of a semiconductor layer used in a transistor. The conductive film 635 may be made of a material that has been improved.

[0484] <5-3. About each component> The following describes each of the components shown above. A description of the configuration having the same function will be omitted.

[0485] [Adhesive layer] The adhesive layer can be a photo-curable adhesive such as an ultraviolet curable adhesive, a reaction-curable adhesive, or a heat-curable adhesive. Various curing adhesives such as adhesives and anaerobic adhesives can be used. Epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, E VA (ethylene vinyl acetate) resin, etc. In particular, the moisture permeability of epoxy resin, etc. A material with low viscosity is preferable. Two-component resin may also be used. It may be used.

[0486] The resin may also contain a desiccant. For example, an oxide of an alkaline earth metal (an acid The material used is one that absorbs moisture by chemical adsorption, such as calcium oxide or barium oxide. Alternatively, materials such as zeolite and silica gel can absorb water by physical adsorption. If a desiccant is included, impurities such as moisture will not penetrate into the element. This is preferable because it can suppress the occurrence of light leakage and improve the reliability of the display panel.

[0487] In addition, by mixing a filler with a high refractive index or a light scattering material into the resin, it is possible to improve the light extraction efficiency. For example, titanium oxide, barium oxide, zeolite, Ruthenium and the like can be used.

[0488] [Connection layer] Anisotropic Conductive Film (ACF) is used as the connection layer. conductive film) and anisotropic conductive paste (ACP) Conductive Paste) can be used.

[0489] [Colored layer] Materials that can be used for the coloring layer include metal materials, resin materials, pigments, and dyes. Examples include resin materials.

[0490] [Light blocking layer] Materials that can be used for the light-shielding layer include carbon black, titanium black, Examples of the light-shielding layer include metals, metal oxides, and composite oxides including solid solutions of multiple metal oxides. The film may be a film containing a resin material, or may be a thin film made of an inorganic material such as a metal. In addition, the light-shielding layer may be a laminated film of films containing the material of the colored layer. A film containing a material used for a colored layer that transmits light and a material used for a colored layer that transmits light of another color. By using the same material for the colored layer and the light-shielding layer, a laminated structure with a film containing This is preferable because it allows the use of common equipment and simplifies the process.

[0491] This concludes the explanation of each component.

[0492] <5-4. Example of manufacturing method> Here, an example of a method for manufacturing a display panel using a flexible substrate will be described.

[0493] Here, the display elements, circuits, wiring, electrodes, optical members such as colored layers and light-shielding layers, and insulating layers For example, the element layer includes a display element. In addition to display elements, wiring electrically connecting to display elements, transistors used in pixels and circuits, etc. The device may include the following elements:

[0494] In addition, in this case, at the stage where the display element is completed (the manufacturing process is completed), the element layer is The supporting and flexible member is called a substrate. For example, the substrate may have a thickness of This also includes extremely thin films with a thickness of 10 nm or more and 300 μm or less.

[0495] A typical method for forming an element layer on a flexible substrate having an insulating surface is to There are two methods as follows: One is to form the element layer directly on the substrate. The other method is to form an element layer on a support substrate different from the substrate, and then peel the element layer from the support substrate. The method is to transfer the device layer to the substrate. In addition to the above method, an element layer is formed on a non-flexible substrate, and the substrate is thinned by polishing or the like. There is also a method for making the material flexible by using a

[0496] If the material constituting the substrate is heat resistant to the heat applied in the process of forming the element layer, It is preferable to form the element layer directly on the substrate, since this simplifies the process. When the element layer is formed while the plate is fixed to the support substrate, it is difficult to transport the plate within and between devices. This is preferable because it is easier.

[0497] In addition, when a method is used in which an element layer is formed on a support base material and then transferred to a substrate, the support material is first A release layer and an insulating layer are laminated on the support substrate, and an element layer is formed on the insulating layer. The element layer is then transferred to the substrate. A material may be selected that allows peeling to occur at the interface between the peeling layer and the insulating layer or within the peeling layer. In this method, a material with high heat resistance is used for the support substrate and the peeling layer, and the element layer is formed. This allows for an increase in the upper limit of the temperature during the formation of a device layer, resulting in a device with higher reliability. This is preferable because it is possible.

[0498] For example, a layer containing a high melting point metal material such as tungsten as a peeling layer and a layer containing the metal material Layers containing oxide are stacked, and silicon oxide and silicon nitride are used as insulating layers on the peeling layer. It is preferable to use a stack of a plurality of layers of silicon oxynitride, silicon nitride oxide, or the like.

[0499] The element layer and the support substrate can be separated by applying a mechanical force or by peeling the separation layer. Examples include etching or infiltrating the peeled interface with a liquid. Alternatively, the difference in thermal expansion between the two layers that form the peel interface can be used to heat or cool the material. The peeling may be carried out by

[0500] Furthermore, if peeling is possible at the interface between the support substrate and the insulating layer, it is not necessary to provide a peel layer.

[0501] For example, glass is used as the support substrate, and an organic resin such as polyimide is used as the insulating layer. At this time, a part of the organic resin is locally heated using a laser beam or the like. Or, peeling by physically cutting or penetrating part of the organic resin with a sharp object. The starting point of the organic resin may be formed, and the separation may be performed at the interface between the glass and the organic resin. As a material for the opening, a photosensitive material is preferable because it is easy to create shapes such as openings. The laser light is, for example, light in the wavelength range from visible light to ultraviolet light. For example, light having a wavelength of 200 nm or more and 400 nm or less, preferably light having a wavelength of Light with a wavelength of 250 nm or more and 350 nm or less can be used. In particular, an excitation light with a wavelength of 308 nm can be used. The use of a simmer laser is preferable because it has excellent productivity. Solid-state UV lasers (also known as semiconductor UV lasers) such as UV lasers with a wavelength of 355 nm, which are harmonic (referred to as "the term" or "the term ") may also be used.

[0502] Alternatively, a heat generating layer is provided between the support substrate and an insulating layer made of organic resin, and the heat generating layer is heated. By doing so, the heat generating layer may be peeled off at the interface between the heat generating layer and the insulating layer. Materials that generate heat by passing current through them, materials that generate heat by absorbing light, and materials that generate heat by applying a magnetic field. For example, the heat generating layer can be made of various materials, such as a material that generates heat by heating. The material can be selected from semiconductors, metals, and insulators.

[0503] In the above-described method, the insulating layer made of organic resin is used as a substrate after peeling. It is possible.

[0504] The above is a description of the method for manufacturing a flexible display panel.

[0505] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0506] (Embodiment 6) In this embodiment, a display device including a semiconductor device of one embodiment of the present invention will be described with reference to FIG. This will be used to explain.

[0507] 6. Circuit configuration of display device The display device shown in FIG. 30(A) has a region having pixels of a display element (hereinafter referred to as a pixel portion 502). ) and a circuit section ( hereinafter referred to as a drive circuit section 504), and a circuit having a function of protecting the element (hereinafter referred to as a protection circuit 50 6) and a terminal portion 507. Note that the protection circuit 506 is not provided in the configuration. That's fine.

[0508] A part or the whole of the driver circuit portion 504 is formed on the same substrate as the pixel portion 502. This makes it possible to reduce the number of parts and terminals. When a part or all of the pixel portion 502 is not formed on the same substrate, the driving circuit A part or the whole of the path portion 504 is COG or TAB (Tape Automated Bearing). It can be implemented by

[0509] The pixel section 502 is arranged in X rows (X is a natural number of 2 or more) and Y columns (Y is a natural number of 2 or more). The display device has a circuit for driving a plurality of display elements (hereinafter referred to as pixel circuit 501), The path section 504 is a circuit (hereinafter referred to as a gate driver) that outputs a signal (scanning signal) for selecting a pixel. 504a), for supplying signals (data signals) for driving the display elements of the pixels. The source driver 504b includes a driving circuit such as the circuit (hereinafter referred to as a source driver 504b).

[0510] The gate driver 504a includes a shift register and the like. A signal for driving the shift register is inputted through the terminal section 507, and a signal for outputting the shift register is outputted. For example, the gate driver 504a receives a start pulse signal, a clock signal, etc. The gate driver 504a receives a scanning signal and outputs a pulse signal. The gate has a function of controlling the potential of the scanning lines GL_1 to GL_X. A plurality of drivers 504a are provided, and the plurality of gate drivers 504a drive the scanning lines GL_1 to Alternatively, the gate driver 504a may control the GL_X by dividing it into the initialization signal However, the gate driver 50 has a function of supplying 4a may also provide other signals.

[0511] The source driver 504b includes a shift register and the like. Through the terminal section 507, signals for driving the shift register as well as the source of the data signal are transmitted. The source driver 504b receives a signal (image signal) that is to be output from the pixel circuit The source driver 504b has a function of generating a data signal to be written to the source driver 501. A data signal is generated in accordance with a pulse signal obtained by inputting a start pulse, a clock signal, etc. The source driver 504b has a function of controlling the output of a data signal. The data lines DL_1 to DL_Y are connected to the data lines DL_2 through DL_Y. Alternatively, the source driver 504b may have a function of supplying an initialization signal. However, the present invention is not limited to this, and the source driver 504b may also supply other signals. It is possible.

[0512] The source driver 504b is configured using, for example, a plurality of analog switches. The source driver 504b sequentially turns on a plurality of analog switches, The image signal can be time-divided and output as a data signal. The source driver 504b may be configured using the same.

[0513] Each of the plurality of pixel circuits 501 is connected to one of the plurality of scanning lines GL to which a scanning signal is applied. A pulse signal is input via the data line DL, and a data signal is given via one of the data lines DL. Each of the pixel circuits 501 is connected to a gate driver 504a controls writing and holding of data of the data signal. The second pixel circuit 501 is connected to a gate driver GL_m (where m is a natural number equal to or less than X) via a scanning line GL_m. A pulse signal is input from 504a, and the data line DL_n ( A data signal is input from the source driver 504b via the input terminal 504a (n is a natural number equal to or less than Y).

[0514] The protection circuit 506 shown in FIG. 30(A) is, for example, a gate driver 504a and a pixel circuit 5 01. Alternatively, the protection circuit 506 is connected to the scanning line GL, which is the wiring between the source driver The data line DL is connected between the driver 504b and the pixel circuit 501. The protection circuit 506 can be connected to the wiring between the gate driver 504a and the terminal section 507. Alternatively, the protection circuit 506 may be formed by wiring between the source driver 504b and the terminal section 507. The terminal section 507 can be connected to a power supply and a line from an external circuit to the display device. This refers to the part where terminals for inputting control signals and image signals are provided.

[0515] When a potential outside a certain range is applied to the wiring to which the protection circuit 506 is connected, the protection circuit 506 This is a circuit that brings one wire into electrical continuity with another wire.

[0516] As shown in FIG. 30A, a pixel section 502 and a driver circuit section 504 are provided with a protection circuit 50. 6, ESD (Electro Static Discharge: This can improve the resistance of the display device to overcurrents caused by electrostatic discharges and the like. However, the configuration of the protection circuit 506 is not limited to this. For example, A configuration in which a protection circuit 506 is connected, or a configuration in which the protection circuit 506 is connected to the source driver 504b Alternatively, a configuration in which a protection circuit 506 is connected to the terminal portion 507 may be used. It can also be done as follows.

[0517] In FIG. 30(A), the gate driver 504a and the source driver 504b Therefore, although an example in which the driver circuit portion 504 is formed is shown, the present invention is not limited to this configuration. For example, only the gate driver 504a is formed, and a separately prepared source driver circuit is formed. A substrate (for example, a drive circuit substrate formed of a single crystal semiconductor film or a polycrystalline semiconductor film) is implemented. It may also be configured to be equipped with

[0518] Furthermore, the plurality of pixel circuits 501 shown in FIG. 30(A) may be, for example, a configuration shown in FIG. 30(B). It can be said that:

[0519] The pixel circuit 501 shown in FIG. 30B includes a liquid crystal element 570, a transistor 550, and a capacitor. The transistor 550 may be any of the transistors described in the previous embodiments. can be applied.

[0520] The potential of one of the pair of electrodes of the liquid crystal element 570 is set appropriately according to the specifications of the pixel circuit 501. The orientation state of the liquid crystal element 570 is set by the written data. A common potential is applied to one of a pair of electrodes of the liquid crystal element 570 included in each of the pixel circuits 501. A common potential may be applied to the pair of liquid crystal elements 570 of the pixel circuits 501 in each row. One of the electrodes may be given a different potential.

[0521] For example, the display device including the liquid crystal element 570 can be driven in a TN mode, an STN mode, or the like. Mode, VA mode, ASM (Axially Symmetric Aligned Mode) Micro-cell mode, OCB (Optically Compensated Birefringence mode, FLC (Ferroelectric Liquid Crystal id Crystal) mode, AFLC (AntiFerroelectric Li Quid Crystal) mode, MVA mode, PVA (Patterned Ve Vertical Alignment mode, IPS mode, FFS mode, or TBA (Transverse Bend Alignment) mode may also be used. In addition to the above-mentioned driving method, the display device can also be driven by an ECB (Electric Carrier Board) or the like. Ally Controlled Birefringence mode, PDLC (P Polymer Dispersed Liquid Crystal (PNLC) mode (Polymer Network Liquid Crystal) mode, guest However, there are various types of liquid crystal elements and their driving methods, and they are not limited to these. A variety of materials can be used.

[0522] In the pixel circuit 501 in the mth row and the nth column, the source electrode or the drain electrode of the transistor 550 One of the electrodes is electrically connected to the data line DL_n, and the other is connected to a pair of electrodes of the liquid crystal element 570. The gate electrode of the transistor 550 is electrically connected to the other of the electrodes of the scan line G. L_m. The transistor 550 is electrically connected to the data signal It has the function of controlling.

[0523] One of the pair of electrodes of the capacitor 560 is connected to a wiring to which a potential is supplied (hereinafter, a potential supply line VL ) and the other is electrically connected to the other of the pair of electrodes of the liquid crystal element 570. The value of the potential of the potential supply line VL is set appropriately according to the specifications of the pixel circuit 501. The capacitor 560 functions as a storage capacitor for storing written data.

[0524] For example, in a display device having the pixel circuit 501 of FIG. 30(B), The pixel circuits 501 in each row are sequentially selected by the gate driver 504a shown in FIG. 550 is turned on and data of the data signal is written.

[0525] The pixel circuit 501 in which data has been written is turned off by turning off the transistor 550. By repeating this process for each row, an image can be displayed.

[0526] Furthermore, the plurality of pixel circuits 501 shown in FIG. 30(A) may be, for example, a configuration shown in FIG. 30(C). It can be said that:

[0527] The pixel circuit 501 shown in FIG. 30C includes transistors 552 and 554 and a capacitor. The transistor 552 and the transistor 554 The transistor described in the above embodiment can be used for either one or both of the above. .

[0528] One of the source and drain electrodes of the transistor 552 is supplied with a data signal. The transistor 55 is electrically connected to a wiring (hereinafter referred to as a signal line DL_n). The gate electrode 2 is electrically connected to the wiring to which the gate signal is given (hereinafter referred to as the scanning line GL_m). are connected to the network.

[0529] The transistor 552 has a function of controlling writing of data signals.

[0530] One of the pair of electrodes of the capacitor 562 is connected to a wiring to which a potential is applied (hereinafter, a potential supply line VL _a), and the other is electrically connected to the source electrode and drain electrode of the transistor 552. The second electrode is electrically connected to the other of the first and second electrodes.

[0531] The capacitor 562 functions as a storage capacitor for holding written data.

[0532] One of the source electrode and the drain electrode of the transistor 554 is connected to the potential supply line VL_a. Furthermore, the gate electrode of transistor 554 is electrically connected to the It is electrically connected to the other of the source electrode and the drain electrode.

[0533] One of the anode and cathode of the light emitting element 572 is electrically connected to the potential supply line VL_b. The other is electrically connected to the other of the source electrode and drain electrode of the transistor 554. will be done.

[0534] The light emitting element 572 may be, for example, an organic electroluminescence element (also known as an organic EL element). However, the light emitting element 572 is not limited to this. Alternatively, an inorganic EL element made of an inorganic material may be used.

[0535] A high power supply potential VDD is applied to one of the potential supply lines VL_a and VL_b. and the other is supplied with a low power supply potential VSS.

[0536] In a display device having the pixel circuit 501 of FIG. 30(C), for example, The pixel circuits 501 in each row are sequentially selected by the gate driver 504a, and the transistors 552 are turned on. The data signal is written by turning it on.

[0537] The pixel circuit 501 to which the data has been written is turned off by turning off the transistor 552. Furthermore, the transistor 554 is held in a holding state in response to the potential of the written data signal. The amount of current flowing between the source electrode and the drain electrode is controlled, and the light emitting element 572 The light is emitted at a brightness that corresponds to the flow rate. By repeating this process row by row, an image can be displayed.

[0538] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0539] (Embodiment 7) In this embodiment, a display module and an electronic device including a semiconductor device according to one embodiment of the present invention will be described. This will be explained with reference to FIGS. 31 to 34.

[0540] <7-1. Display module> The display module 7000 shown in FIG. 31 includes an upper cover 7001 and a lower cover 7002. Between them, touch panel 7004 connected to FPC7003 and A display panel 7006, a backlight 7007, a frame 7009, a printed circuit board 701 0, has battery 7011.

[0541] The semiconductor device of one embodiment of the present invention can be used for the display panel 7006, for example.

[0542] The upper cover 7001 and the lower cover 7002 are connected to the touch panel 7004 and the display panel The shape and dimensions can be changed as needed to fit the size of the 7006.

[0543] The touch panel 7004 is a resistive or capacitive touch panel. The display panel 7006 can be used by overlapping it with the opposing substrate (sealing substrate) of the display panel 7006. It is also possible to provide the display panel 7 with a touch panel function. It is also possible to provide an optical sensor in each pixel of 006 to make it an optical touch panel.

[0544] The backlight 7007 has a light source 7008. In FIG. Although the configuration in which the light source 7008 is disposed on the base 7007 has been described as an example, the present invention is not limited to this. For example, a light source 7008 is arranged at the end of a backlight 7007, and a light diffusion plate is further used. In addition, when a self-luminous light emitting element such as an organic EL element is used, or when a reflective In the case of a flat panel or the like, the backlight 7007 may not be provided.

[0545] The frame 7009 not only protects the display panel 7006 but also prevents the movement of the printed circuit board 7010. It also functions as an electromagnetic shield to block electromagnetic waves generated by the operation of the The frame 7009 may also function as a heat sink.

[0546] The printed circuit board 7010 includes a power supply circuit, a signal circuit for outputting a video signal and a clock signal. The power supply circuit is provided with a signal processing circuit. Alternatively, the power source may be a battery 7011 provided separately. This can be omitted if a commercial power source is used.

[0547] The display module 7000 also includes components such as a polarizing plate, a retardation plate, and a prism sheet. It may also be provided in addition.

[0548] <7-2.Electronic equipment 1> Next, examples of electronic devices are shown in FIGS. 32(A) to 32(E).

[0549] FIG. 32(A) shows the appearance of the camera 8000 with the viewfinder 8100 attached. This is a diagram.

[0550] The camera 8000 includes a housing 8001, a display unit 8002, operation buttons 8003, and a shutter. The camera 8000 has a button 8004 and the like. The camera 8000 also has a detachable lens 8006. It is attached.

[0551] Here, the camera 8000 is assumed to have a lens 8006 that is detached from the housing 8001 and replaced. However, the lens 8006 and the housing may be integrated.

[0552] The camera 8000 can capture an image by pressing the shutter button 8004. The display unit 8002 also functions as a touch panel. It is also possible to take an image by

[0553] The housing 8001 of the camera 8000 has a mount with electrodes, and a finder 810 In addition to the 0, strobe devices etc. can also be connected.

[0554] The finder 8100 includes a housing 8101, a display unit 8102, buttons 8103, etc. .

[0555] The housing 8101 has a mount that engages with the mount of the camera 8000, The mount can be attached to the camera 8000. The image received from the camera 8000 through the electrode is displayed on the display unit 8102. It can be done.

[0556] The button 8103 functions as a power button. The 8102 display can be switched on and off.

[0557] The display unit 8002 of the camera 8000 and the display unit 8102 of the viewfinder 8100 are The display device according to one embodiment of the present invention can be applied.

[0558] In FIG. 32(A), the camera 8000 and the finder 8100 are separate electronic devices. These are configured to be detachable, but the housing 8001 of the camera 8000 is equipped with a display device. The camera may have a built-in viewfinder.

[0559] FIG. 32(B) is a diagram showing the appearance of the head mounted display 8200.

[0560] The head-mounted display 8200 includes a mounting part 8201, a lens 8202, and a main body 82 8203, a display unit 8204, a cable 8205, etc. It has a built-in 8206 battery.

[0561] A cable 8205 supplies power from a battery 8206 to the main body 8203. 03 is equipped with a wireless receiver and the like, and image information such as received image data is displayed on a display unit 8204. In addition, the camera installed in the main body 8203 can record the movements of the user's eyeballs and eyelids. By capturing the user's viewpoint and calculating the coordinates of the user's viewpoint based on that information, It can be used as an input means.

[0562] Furthermore, the wearing unit 8201 may be provided with a plurality of electrodes at positions that come into contact with the user. The main body 8203 detects the current flowing through the electrodes in accordance with the movement of the user's eyeballs, The device may have a function to recognize the user's point of view. By doing so, the attachment unit 820 may have a function of monitoring the pulse of the user. The sensor 1 may have various sensors such as a temperature sensor, a pressure sensor, an acceleration sensor, etc. The device may have a function to display the user's biological information on the display unit 8204. The image displayed on the display unit 8204 is changed according to the movement of the part. Good too.

[0563] The display device of one embodiment of the present invention can be applied to the display portion 8204.

[0564] 32(C), (D), and (E) are diagrams showing the appearance of the head-mounted display 8300. The head mounted display 8300 includes a housing 8301, a display portion 8302, and a backlight. The lens 8302 has a braided fixture 8304 and a pair of lenses 8305 .

[0565] A user can view the display on the display unit 8302 through the lens 8305 . It is preferable to arrange the display portion 8302 in a curved state. By doing so, the user can feel a high sense of realism. Although the configuration in which one display unit 8302 is provided has been illustrated, the present invention is not limited to this. For example, In this case, one display is provided for each eye of the user. If the configuration is such that the display section is arranged, it will be possible to perform 3D display using parallax. .

[0566] Note that the display device of one embodiment of the present invention can be applied to the display portion 8302. A display device including the semiconductor device of one embodiment of this invention has extremely high definition. Even if the image is enlarged using the lens 8305, the pixels are not visible to the user, and the image is displayed more clearly. This makes it possible to display images with a higher sense of reality.

[0567] <7-3.Electronic equipment 2> Next, an example of an electronic device different from the electronic devices shown in FIGS. 32(A) to 32(E) will be described with reference to FIG. 3(A) to 33(G).

[0568] The electronic devices shown in FIGS. 33A to 33G include a housing 9000, a display portion 9001, a screen Speaker 9003, operation keys 9005 (including a power switch or an operation switch), connection terminal Child 9006, sensor 9007 (force, displacement, position, velocity, acceleration, angular velocity, number of rotations, distance, Light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electric field, current, voltage, power, radiation, (including functions to measure flow rate, humidity, gradient, vibration, odor or infrared rays), It has 9008, etc.

[0569] The electronic devices shown in FIGS. 33A to 33G have various functions. Function to display various information (still images, videos, text images, etc.) on the display, touch panel function , calendar, date or time display functions, various software (programs) a function for controlling processing by wireless communication, a function for controlling various computers by wireless communication, Functions for connecting to a network and transmitting or receiving various data using wireless communication functions The function of reading out the program or data recorded on the recording medium and displaying it on the display unit. The electronic devices shown in FIGS. The functions that can be possessed by the device are not limited to these, and the device can have a variety of functions. Although not shown in FIGS. 33A to 33G, the electronic device may have a plurality of display units. The electronic device may be provided with a camera or the like to take still images. , the function to shoot videos, and save the captured images to a recording medium (external or built-in to the camera) The image capturing device may have a function of capturing an image, a function of displaying a captured image on a display unit, and the like.

[0570] The electronic devices shown in FIGS. 33A to 33G will be described in detail below.

[0571] FIG. 33(A) is a perspective view showing a television device 9100. 100 is a display unit 9001 having a large screen, for example, 50 inches or more, or 100 inches or more. It is possible to incorporate a display unit 9001 such as the one shown in FIG.

[0572] 33(B) is a perspective view showing a portable information terminal 9101. For example, the device has one or more functions selected from a telephone, a notebook, an information viewing device, etc. Specifically, it can be used as a smartphone. A speaker, a connection terminal, a sensor, and the like may be provided. Image information can be displayed on multiple sides of the screen. For example, three operation buttons 9050 ( Operation icons (also referred to as "icons") can be displayed on one side of the display unit 9001. Also, information 9051 shown in a dashed rectangle can be displayed on the other side of the display unit 9001. Examples of information 9051 include emails and social networking sites (SNS). Display to notify you of incoming calls, e-mails, SNS, etc. Subject, sender name of email or SNS, date and time, time, remaining battery level, antenna reception Or, instead of the information 9051, Alternatively, operation buttons 9050 and the like may be displayed.

[0573] 33(C) is a perspective view showing a portable information terminal 9102. The portable information terminal 9102 is , and has the function of displaying information on three or more surfaces of the display unit 9001. An example is shown in which information 9053 and information 9054 are displayed on different sides. The user of the portable information terminal 9102 stores the portable information terminal 9102 in the breast pocket of his / her clothes. In this state, the display (information 9053 in this case) can be confirmed. The telephone number or name of the caller is displayed in a position that can be observed from above the mobile information terminal 9102. The user can view the display without taking the mobile information terminal 9102 out of his pocket. You can check the call and decide whether to accept it or not.

[0574] 33(D) is a perspective view showing a wristwatch-type portable information terminal 9200. The 9200 is suitable for mobile phone calls, e-mail, document browsing and writing, music playback, and internet communications. It is possible to run various applications such as computer games. The display surface of the display unit 9001 is curved, and the display is performed along the curved display surface. In addition, the portable information terminal 9200 can perform short-distance wireless communication according to a communication standard. For example, by communicating with a wireless headset, handset The mobile information terminal 9200 also has a connection terminal 9006. It has a connector and can directly exchange data with other information terminals. Charging can also be performed via the connection terminal 9006. It may also be possible to supply power wirelessly without going through 6.

[0575] 33(E), (F), and (G) are perspective views showing a foldable portable information terminal 9201. FIG. 33(E) is a perspective view of the portable information terminal 9201 in an unfolded state, and FIG. (F) shows the mobile information terminal 9201 being changed from one of the unfolded state and the folded state to the other. 33(G) is a perspective view of the portable information terminal 9201 in a folded state. The portable information terminal 9201 is highly portable when folded, and is easily portable when unfolded. When the display is turned on, the seamless, wide display area provides excellent visibility of the display. The display unit 9001 of the display device 01 is made up of three housings 9000 connected by hinges 9055. The two housings 9000 are supported by the hinge 9055. This allows the portable information terminal 9201 to be reversibly transformed from an unfolded state to a folded state. For example, the portable information terminal 9201 can be bent with a radius of curvature of 1 mm or more and 150 mm or less. It can be done.

[0576] Next, the electronic devices shown in FIGS. 32(A) to 32(E) and the electronic devices shown in FIGS. 33(A) to 33(E) An example of an electronic device different from the electronic device shown in (G) is shown in Figures 34(A) and (B). (B) is a perspective view of a display device having a plurality of display panels. 34(A) is a perspective view of a state in which a plurality of display panels are rolled up, and FIG. 34(B) is a perspective view of a state in which a plurality of display panels are rolled up. FIG. 1 is a perspective view of the roll in an unfolded state.

[0577] The display device 9500 shown in FIGS. 34(A) and 34(B) includes a plurality of display panels 9501 and a shaft portion 9 511 and a bearing portion 9512. The plurality of display panels 9501 have a display area 9502 and a light-transmitting region 9503.

[0578] The display panels 9501 are flexible. The filters 9501 are arranged so that they partially overlap each other. The light-transmitting region 9503 of the display panel 9501 can be overlapped. By using the display panel 9501, a large screen display device can be provided. The display panel 9501 can be rolled up depending on the situation, making it a versatile display. It can be a display device.

[0579] 34(A) and 34(B), the display area 9502 is located on the adjacent display panel 950. 1 is shown, but is not limited to this. For example, the adjacent display panel 9 By overlapping the display areas 9502 of the 501 without any gaps, a continuous display area 9502 is created. You may do so.

[0580] The electronic device described in this embodiment has a display unit for displaying some information. However, the semiconductor device of one embodiment of the present invention is an electronic device that does not have a display portion. It can also be applied to vessels.

[0581] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination. [Example]

[0582] In this example, a transistor according to one embodiment of the present invention was manufactured. The -Vg characteristics were measured and a GBT test was performed.

[0583] [Transistor fabrication] A transistor corresponding to the transistor 100E described above is fabricated, and the transistor In this example, the following samples A1 and A2 were prepared. .

[0584] The samples A1 and A2 are samples in which transistors are formed. The channel lengths L are 3 μm and 6 μm, respectively, and the channel widths W are all 50 μm. is.

[0585] [Method for preparing samples A1 and A2] First, a tungsten film with a thickness of 100 nm was deposited on a glass substrate using a sputtering device. Subsequently, the conductive film was processed by photolithography to form a first gate electrode. A conductive film 104 that functions as an electrode was formed.

[0586] Next, four insulating layers are stacked on the substrate and the conductive film to form a first gate insulating film. A functional insulating film 106 was formed (see FIG. 7(A)). The insulating film 106 was formed by plasma chemical vapor deposition. The insulating film 106 was formed in a vacuum using a phase-effect chemical vapor deposition (PECVD) apparatus. Then, a silicon nitride film with a thickness of 50 nm, a silicon nitride film with a thickness of 300 nm, and a silicon nitride film with a thickness of 50 nm were prepared. A silicon nitride film having a thickness of 50 nm and a silicon oxynitride film having a thickness of 50 nm were used.

[0587] Next, an oxide semiconductor film 108_1_0 and an oxide semiconductor film 108_2 Next, the stacked oxide semiconductor films were formed into island-like layers. The oxide semiconductor film 108 was formed by processing the oxide semiconductor into the oxide semiconductor film 108 (see FIG. 8A). The film 108_1_0 is an In-Ga-Zn film having a thickness of 20 nm, and the oxide semiconductor film 108 _2_0 used a 25 nm thick In-Ga-Zn film.

[0588] The oxide semiconductor film 108_1_0 was formed by heating at a substrate temperature of 130° C. and a flow rate of 180 sccm. Argon gas and oxygen gas at a flow rate of 20 sccm were introduced into the chamber of the sputtering device. The pressure was set to 0.6 Pa, and a metal oxide having indium, gallium, and zinc was introduced. The target (In:Ga:Zn=4:2:4.1 [atomic ratio]) was subjected to an AC current of 2.5 kW. The oxygen flow rate was determined based on the percentage of oxygen in the entire deposition gas. The oxygen flow rate ratio during the formation of the oxide semiconductor film 108_1_0 may be referred to as "oxygen flow rate ratio." is 10%.

[0589] The oxide semiconductor film 108_2_0 was formed under the deposition conditions of the oxide semiconductor film 108_1_0. The film was formed by changing the flow rate of the sputtering gas. The introduction of oxygen gas was stopped, and a flow rate of 200 sccm was introduced into the chamber of the sputtering device. The oxide semiconductor film 108_2_0 was formed by the following procedure. is 100%.

[0590] Next, a heat treatment was carried out. The heat treatment was carried out at a heating temperature of 350°C in a nitrogen atmosphere for 1 After the heat treatment, the substrate was subjected to a heat treatment for 1 hour in a mixed gas atmosphere of nitrogen and oxygen.

[0591] Next, a conductive film is formed over the insulating film 106 and the oxide semiconductor film 108, and the conductive film is processed. The conductive films 112a and 112b were formed by this method. A first titanium film with a thickness of 0 nm and a copper film with a thickness of 200 nm were deposited in this order using a sputtering device. (See FIG. 8(C)). Next, the copper film was etched by photolithography. After that, a second titanium film with a thickness of 50 nm was formed using a sputtering device. The first titanium film and the second titanium film are etched by photolithography to form the titanium film shown in FIG. Conductive films 112a and 112b having the shape shown in (C) were formed.

[0592] Next, the surface (back channel side) of the oxide semiconductor film 108 was washed with phosphoric acid.

[0593] Next, an insulating film 106, an oxide semiconductor film 108, and the conductive films 112a and 112b are formed over the insulating film 106, the oxide semiconductor film 108, and the conductive films 112a and 112b. An insulating film 114 was formed, and an insulating film 116 was formed on the insulating film 114 (see FIG. 9(A)). The insulating film 114 and the insulating film 116 are formed by a plasma enhanced chemical vapor deposition (PECVD) apparatus. The insulating film 114 is a silicon oxynitride film having a thickness of 30 nm, an insulating film The film 116 is a silicon oxynitride film having a thickness of 400 nm.

[0594] Next, a heat treatment was performed. The heat treatment was performed at a heating temperature of 350°C in a nitrogen atmosphere for 1 A long-term heat treatment was carried out.

[0595] Next, a conductive film (not shown) was formed on the insulating film 116. The conductive film was formed by sputtering. A 6 nm thick ITSO film was formed using a lithography system.

[0596] Next, oxygen is passed through the conductive film by plasma treatment to add oxygen to the insulating film 116. As a plasma treatment method, plasma was discharged in an atmosphere containing oxygen gas.

[0597] Next, the conductive film was etched.

[0598] Next, an insulating film was formed on the insulating film 116. The insulating film was formed by plasma enhanced chemical vapor deposition (PEC) A silicon nitride film with a thickness of 100 nm was formed using a VD system.

[0599] Next, openings were formed in desired areas of the insulating film. The etching method was used.

[0600] Next, a conductive film is formed so as to fill the opening, and the conductive film is processed into an island shape. A conductive film having a thickness of 100 mm was formed to function as a second gate electrode. An ITSO film with a thickness of 100 nm was formed using a sputtering system.

[0601] Next, an insulating film was formed on the insulating film and the conductive film. An acrylic photosensitive resin was used.

[0602] In this manner, samples A1 and A2 were prepared.

[0603] [Transistor Id-Vg characteristics] Next, the Id-Vg characteristics of the transistors of Sample A1 and Sample A2 fabricated as described above were measured. The Id-Vg characteristics of the transistor were measured under the following conditions: The voltage applied to the conductive film (hereinafter also referred to as gate voltage (Vg)) and the second gate The voltage (also called Vbg) applied to the conductive film acting as an electrode is set to -10V to +10 V in 0.25 V steps. The voltage applied to the drain electrode (hereinafter referred to as the source voltage (Vs)) is set to 0V (comm). The voltage applied to the conductive film that functions as a drain voltage (Vd) is set to 0. The voltages were set to 1V and 20V.

[0604] 35(A) and (B) show the Id-Vg characteristics of the sample A1 and the sample A2, respectively. In Figures 35(A) and 35(B), the first vertical axis represents Id(A) and the second vertical axis represents the field effect mobility. degree(μFE(cm 2 / Vs)) and the horizontal axis represents Vg (V). The mobility is a value measured at Vd of 20V.

[0605] As shown in Figures 35(A) and 35(B), the field-effect mobility is high and the switching characteristics are excellent. It can be seen that a transistor having the above structure was successfully fabricated.

[0606] [Gate bias-thermal stress test (GBT test)] Next, the reliability of the sample A2 was evaluated. It was decided.

[0607] The GBT test conditions in this example were as follows: The voltage applied to the conductive film that functions as the gate electrode of 2 (hereinafter referred to as gate voltage (Vg)) The voltage applied to the conductive film functioning as the source electrode and the drain electrode is set to ±30V. The voltages applied to the drain and source terminals (hereinafter referred to as drain voltage (Vd) and source voltage (Vs) respectively) are set to 0V. (COMMON), stress temperature is 60℃, stress application time is 1 hour, and measurement The test environment was set to two: a dark environment and a light irradiation environment (irradiated with approximately 10,000 lx of light from a white LED). The experiments were carried out in two different environments. The first gate electrode and the second gate electrode are connected to a potential of 0.05V, and the source electrode and the drain electrode are connected to a potential of 0.05V. Different potentials were applied for a certain time (here, 1 hour).

[0608] In addition, the potentials applied to the first gate electrode and the second gate electrode are When the potential of the first gate electrode and the second gate electrode is higher than the potential of the first gate electrode, the positive stress is applied. When the potential applied to the electrode is lower than the potential of the source electrode and drain electrode, it is called negative stress. Therefore, in accordance with the measurement environment, plus GBT (dark), minus GBT ( The signal was measured under four conditions: dark, plus GBT (light irradiation), and minus GBT (light irradiation). The reliability evaluation was carried out. ias Temperature Stress) and minus GBT (Dark), NBTS (Negative Bias Temperature Stress) , plus GBT (light irradiation) and PBITS (Positive Bias Illumination) ation Temperature Stress) and minus GBT (light irradiation) NBITS (Negative Bias Illumination Temperature The following is a description of the physical stress.

[0609] The GBT test results for sample A2 are shown in Figure 36. In Figure 36, the left column shows the transistor The change in the threshold voltage of the capacitor (ΔVth) is shown in the right column, and the change in the Shift value (ΔShi ft).

[0610] The shift value is the drain current (Id) of the transistor minus the gate voltage (Vg). In the characteristics, the tangent of the maximum slope of the logarithmic drain current (Id) and 1×10 -1 2 The gate voltage (Vg) at the intersection with the axis A. Also, ΔShift is the shift value. is the amount of change.

[0611] From the results shown in FIG. 36, it can be seen that the transistor of sample A2 has a threshold value in the GBT test. The change in the threshold voltage (ΔVth) and the change in the shift value (ΔShift) are within ±2V. Therefore, it was found that the transistor of sample A2 had high reliability. do. [Example]

[0612] In this example, a transistor was manufactured using one embodiment of the present invention. The Id-Vg characteristics of the device were measured and a GBT test was carried out.

[0613] [Transistor fabrication] A transistor corresponding to the transistor 100E described above is fabricated, and the transistor In this example, the following samples B1 and B2 were prepared. Note that Samples B1 and B2 have oxide semiconductor films 1 and 2 that are smaller than Samples A1 and A2. The atomic ratio of In to Zn in the oxide semiconductor film 108_1 is The difference is that the ratio of the number of In atoms to the number of atoms is larger.

[0614] Note that Sample B1 and Sample B2 are samples in which transistors are formed. The channel lengths L are 3 μm and 6 μm, respectively, and the channel widths W are all 50 μm. is.

[0615] [Method for preparing samples B1 and B2] Sample B1 and Sample B2 are the same as Sample A1 and Sample A2, respectively, and are fabricated by the same method as Sample A1 and Sample A2. Specifically, the oxide semiconductor film 108_1_0 and the oxide semiconductor film 108_2_ The atomic ratio of the target used to form 0 is different.

[0616] The oxide semiconductor film 108_1_0 was formed by heating at a substrate temperature of 130° C. and a flow rate of 180 sccm. Argon gas and oxygen gas at a flow rate of 20 sccm were introduced into the chamber of the sputtering device. The pressure was set to 0.6 Pa, and a metal oxide having indium, gallium, and zinc was introduced. The target (In:Ga:Zn=4:2:4.1 [atomic ratio]) was subjected to an AC current of 2.5 kW. The oxygen flow rate was determined based on the percentage of oxygen in the entire deposition gas. The oxygen flow rate ratio during the formation of the oxide semiconductor film 108_1_0 may be referred to as "oxygen flow rate ratio." The atomic ratio of the target was In:Ga:Zn=4:2:4.1. The energy gap of the In-Ga-Zn oxide film formed by this method was approximately 3.0 eV, and the electron affinity was The force is about 4.4 eV.

[0617] The oxide semiconductor film 108_2_0 was formed by heating at a substrate temperature of 170° C. and a flow rate of 100 sccm. Argon gas and oxygen gas at a flow rate of 100 sccm were introduced into the chamber of the sputtering device. The pressure was set to 0.6 Pa, and a metal oxide having indium, gallium, and zinc was introduced into the reactor. The target (In:Ga:Zn=1:1:1 [atomic ratio]) was supplied with 0.5 kW of AC power. The oxygen flow rate was determined based on the ratio of oxygen in the entire deposition gas. The oxygen flow rate during the formation of the oxide semiconductor film 108_2_0 is The atomic ratio of In:Ga:Zn=1:1:1 was used as the target. The energy gap of the synthesized In-Ga-Zn oxide film is about 3.2 eV, and the electron affinity is about It is 4.7 eV.

[0618] [Transistor Id-Vg characteristics] Next, the Id-Vg characteristics of the transistors of Samples B1 and B2 fabricated above were measured. The measurement conditions for the Id-Vg characteristics of the transistor were the same as those for samples A1 and A2. The measurement conditions were as follows:

[0619] 37(A) and (B) show the Id-Vg characteristics of Sample B1 and Sample B2, respectively. In Figures 37(A) and 37(B), the first vertical axis represents Id(A) and the second vertical axis represents the field effect mobility. degree(μFE(cm 2 / Vs)) and the horizontal axis represents Vg (V). The mobility is a value measured at Vd of 20V.

[0620] As shown in Figures 37(A) and 37(B), the field-effect mobility is high and the switching characteristics are excellent. It can be seen that a transistor having the above structure was successfully fabricated.

[0621] [Gate bias-thermal stress test (GBT test)] Next, the reliability of the sample B2 was evaluated. The GBT test conditions were the same as those for samples A1 and A2. .

[0622] The GBT test results for sample B2 are shown in Figure 38. In Figure 38, the left column shows the transistor The change in the threshold voltage of the capacitor (ΔVth) is shown in the right column, and the change in the Shift value (ΔShi ft).

[0623] The shift value is the drain current (Id) of the transistor minus the gate voltage (Vg). In the characteristics, the tangent of the maximum slope of the logarithmic drain current (Id) and 1×10 -1 2The gate voltage (Vg) at the intersection with the axis A. Also, ΔShift is the shift value. is the amount of change.

[0624] From the results shown in FIG. 38, it can be seen that the transistor of sample B2 has a threshold value in the GBT test. The change in the threshold voltage (ΔVth) and the change in the shift value (ΔShift) are within ±3V. Therefore, it can be seen that the transistor of sample B2 has high reliability. .

[0625] At least a part of this embodiment may be appropriately combined with other embodiments described in this specification. It can be implemented in combination. [Explanation of symbols]

[0626] 100 transistors 100A transistor 100B transistor 100C transistor 100D transistor 100E transistor 102 Circuit Board 104 Conductive film 106 insulating film 108 Oxide semiconductor film 108_1 Oxide semiconductor film 108_1_0 Oxide semiconductor film 108_2 Oxide semiconductor film 108_2_0 Oxide semiconductor film 112 Conductive film 112a Conductive film 112a_1 Conductive film 112a_2 Conductive film 112a_3 Conductive film 112b Conductive film 112b_1 Conductive film 112b_2 Conductive film 112b_3 Conductive film 114 insulating film 116 Insulating film 118 insulating film 120 Conductive film 120a Conductive film 120b Conductive film 122a Conductive film 122b Conductive film 122c conductive film 124 insulating film 126 insulating film 128 Oxide semiconductor film 130 Conductive film 134 insulating film 136 Insulating Film 138 Conductive Film 140 insulating film 141a opening 141b opening 142a opening 142b opening 144 Conductive Film 150 EL layer 160 Light-emitting element 181 Opening 182 Opening 184 Opening 190 Semiconductor devices 191 Target 192 Plasma 193 Target 194 Plasma 501 pixel circuit 502 pixel section 504 Drive circuit section 504a Gate Driver 504b source driver 506 Protection circuit 507 Terminal section 550 transistors 552 transistor 554 Transistor 560 Capacitor 562 Capacitor 570 Liquid Crystal Devices 572 Light-emitting element 600 display panel 601 Transistor 604 Connection 605 Transistor 606 Transistor 607 Connection 612 Liquid crystal layer 613 Conductive film 617 Insulating Film 620 insulating film 621 Insulating film 623 Conductive Film 631 Colored layer 632 Light-shielding film 633a Alignment film 633b Alignment film 634 Colored layer 640 Liquid Crystal Devices 641 Adhesive layer 642 Adhesive layer 643 Conductive Film 644 EL layer 645a Conductive film 645b Conductive film 646 Insulating Film 647 Insulating Film 648 Conductive Film 649 Connection Layer 651 Circuit Board 652 Conductive film 653 Semiconductor Film 654 Conductive film 655 Aperture 656 Polarizing Plate 659 circuits 660 Light-emitting element 661 Circuit Board 662 Display section 663 Conductive Film 666 Wiring 672 FPC 673 IC 681 Insulating Film 682 insulating film 683 Insulating Film 684 insulating film 685 insulating film 686 Connector 687 Connection 700 Display device 701 PCB 702 pixel section 704 Source driver circuit section 705 PCB 706 Gate driver circuit section 708 FPC terminal section 710 Signal Line 711 Wiring section 712 Sealing material 716 FPC 730 insulating film 732 Sealing film 734 Insulating Film 736 Colored film 738 Light-shielding film 750 transistors 752 transistors 760 connecting electrode 770 Planarization insulating film 772 Conductive film 773 insulating film 774 Conductive film 775 Liquid Crystal Elements 776 Liquid Crystal Layer 777 Conductive Film 778 Structure 780 Anisotropic Conductive Film 782 Light-emitting element 786 EL layer 788 Conductive Film 790 Capacitor 791 Touch Panel 792 insulating film 793 Electrode 794 Electrode 795 insulating film 796 Electrode 797 Insulating Film 2190 Plasma 2192 cations 2501 Deposition chamber 2502a Target 2502b Target 2504 Segregation region 2504a Sputtered particles 2506 Segregation area 2506a Sputtered particles 2510a Backing Plate 2510b Backing Plate 2520 Target Holder 2520a Target Holder 2520b target holder 2530a Magnet Unit 2530b Magnet Unit 2530N1 Magnet 2530N2 Magnet 2530S Magnet 2532 Magnet holder 2542 parts 2560 board 2570 PCB holder 2580a magnetic field lines 2580b Magnetic field lines 6651 Circuit Board 7000 Display Module 7001 Top cover 7002 Lower cover 7003 FPC 7004 Touch Panel 7005 FPC 7006 Display Panel 7007 Backlight 7008 Light source 7009 Frame 7010 Printed Circuit Board 7011 Battery 8000 Camera 8001 Case 8002 Display section 8003 Operation button 8004 Shutter button 8006 Lens 8100 Finder 8101 Housing 8102 Display section 8103 Button 8200 Head Mounted Display 8201 Mounting part 8202 Lens 8203 Main unit 8204 Display section 8205 Cable 8206 Battery 8300 Head Mounted Display 8301 Housing 8302 Display section 8304 Fixtures 8305 Lens 9000 chassis 9001 Display section 9003 Speaker 9005 Operation key 9006 Connection terminal 9007 Sensor 9008 Microphone 9050 Operation button 9051 Information 9052 Information 9053 Information 9054 Information 9055 Hinge 9100 Television equipment 9101 Mobile Information Terminal 9102 Mobile Information Terminal 9200 Mobile Information Terminal 9201 Mobile Information Terminal 9500 display device 9501 Display Panel 9502 Display area 9503 area 9511 Shaft 9512 Bearing section

Claims

1. A semiconductor device comprising a pixel having a first transistor and a second transistor, A first semiconductor layer having a first channel formation region of the first transistor, A first conductive layer provided above the first semiconductor layer and functioning as the first gate electrode of the first transistor, A second conductive layer provided below the first semiconductor layer and functioning as the second gate electrode of the first transistor, A third conductive layer having a region in contact with the upper surface of the first semiconductor layer and functioning as one of the first source electrode and the first drain electrode of the first transistor, A second semiconductor layer having a second channel formation region of the second transistor, A fourth conductive layer provided above the second semiconductor layer and functioning as the first gate electrode of the second transistor, A fifth conductive layer provided below the second semiconductor layer and functioning as the second gate electrode of the second transistor, A sixth conductive layer having a region in contact with the upper surface of the second semiconductor layer and functioning as one of the second source electrode and the second drain electrode of the second transistor, A first insulating layer having a region located below the fifth conductive layer and a region located below the first semiconductor layer and above the second conductive layer, A second insulating layer having a region located above the fourth conductive layer and a region located above the first conductive layer, The sixth conductive layer has a region that contacts the upper surface of the second semiconductor layer through an opening provided in the second insulating layer. The second semiconductor layer has a region that overlaps with the third conductive layer. The first channel formation region and the second channel formation region do not overlap with each other. The composition of the first semiconductor layer and the composition of the second semiconductor layer are different from each other. The semiconductor device comprises a first oxide semiconductor layer containing In, Ga, and Zn, and a second oxide semiconductor layer containing In, Ga, and Zn.

2. A semiconductor device comprising a pixel having a first transistor and a second transistor, A first semiconductor layer having a first channel formation region of the first transistor, A first conductive layer provided above the first semiconductor layer and functioning as the first gate electrode of the first transistor, A second conductive layer provided below the first semiconductor layer and functioning as the second gate electrode of the first transistor, A third conductive layer having a region in contact with the upper surface of the first semiconductor layer and functioning as one of the first source electrode and the first drain electrode of the first transistor, A second semiconductor layer having a second channel formation region of the second transistor, A fourth conductive layer provided above the second semiconductor layer and functioning as the first gate electrode of the second transistor, A fifth conductive layer provided below the second semiconductor layer and functioning as the second gate electrode of the second transistor, A sixth conductive layer having a region in contact with the upper surface of the second semiconductor layer and functioning as one of the second source electrode and the second drain electrode of the second transistor, A first insulating layer having a region located below the fifth conductive layer and a region located below the first semiconductor layer and above the second conductive layer, A second insulating layer having a region located above the fourth conductive layer and a region located above the first conductive layer, The sixth conductive layer has a region that contacts the upper surface of the second semiconductor layer through an opening provided in the second insulating layer. The second semiconductor layer has a region that overlaps with the third conductive layer. The first channel formation region and the second channel formation region do not overlap with each other. In a cross-sectional view of the second transistor in the channel length direction, the fifth conductive layer has a region that overlaps with the fourth conductive layer and a region that does not overlap with the fourth conductive layer. The composition of the first semiconductor layer and the composition of the second semiconductor layer are different from each other. The semiconductor device comprises a first oxide semiconductor layer containing In, Ga, and Zn, and a second oxide semiconductor layer containing In, Ga, and Zn.

3. A semiconductor device comprising a pixel having a first transistor and a second transistor, A first semiconductor layer having a first channel formation region of the first transistor, A first conductive layer provided above the first semiconductor layer and functioning as the first gate electrode of the first transistor, A second conductive layer provided below the first semiconductor layer and functioning as the second gate electrode of the first transistor, A third conductive layer having a region in contact with the upper surface of the first semiconductor layer and functioning as one of the first source electrode and the first drain electrode of the first transistor, A second semiconductor layer having a second channel formation region of the second transistor, A fourth conductive layer provided above the second semiconductor layer and functioning as the first gate electrode of the second transistor, A fifth conductive layer provided below the second semiconductor layer and functioning as the second gate electrode of the second transistor, A sixth conductive layer having a region in contact with the upper surface of the second semiconductor layer and functioning as one of the second source electrode and the second drain electrode of the second transistor, A first insulating layer having a region located below the fifth conductive layer and a region located below the first semiconductor layer and above the second conductive layer, A second insulating layer having a region located above the fourth conductive layer and a region located above the first conductive layer, A third insulating layer having a region located below the second semiconductor layer and above the fifth conductive layer, The present invention comprises a fourth insulating layer having a region located below the third insulating layer and above the fifth conductive layer, The sixth conductive layer has a region that contacts the upper surface of the second semiconductor layer through an opening provided in the second insulating layer. The second semiconductor layer has a region that overlaps with the third conductive layer. The first channel formation region and the second channel formation region do not overlap with each other. The second semiconductor layer has a region that is in contact with the upper surface of the third insulating layer. The third insulating layer has a region that is in contact with the upper surface of the fourth insulating layer. The third insulating layer comprises a silicon oxide film or silicon oxidnitride, The fourth insulating layer comprises silicon nitride or silicon nitride oxide. The composition of the first semiconductor layer and the composition of the second semiconductor layer are different from each other. The semiconductor device comprises a first oxide semiconductor layer containing In, Ga, and Zn, and a second oxide semiconductor layer containing In, Ga, and Zn.

4. A semiconductor device comprising a pixel having a first transistor and a second transistor, A first semiconductor layer having a first channel formation region of the first transistor, A first conductive layer provided above the first semiconductor layer and functioning as the first gate electrode of the first transistor, A second conductive layer provided below the first semiconductor layer and functioning as the second gate electrode of the first transistor, A third conductive layer having a region in contact with the upper surface of the first semiconductor layer and functioning as one of the first source electrode and the first drain electrode of the first transistor, A second semiconductor layer having a second channel formation region of the second transistor, A fourth conductive layer provided above the second semiconductor layer and functioning as the first gate electrode of the second transistor, A fifth conductive layer provided below the second semiconductor layer and functioning as the second gate electrode of the second transistor, A sixth conductive layer having a region in contact with the upper surface of the second semiconductor layer and functioning as one of the second source electrode and the second drain electrode of the second transistor, A first insulating layer having a region located below the fifth conductive layer and a region located below the first semiconductor layer and above the second conductive layer, A second insulating layer having a region located above the fourth conductive layer and a region located above the first conductive layer, A third insulating layer having a region located below the second semiconductor layer and above the fifth conductive layer, The present invention comprises a fourth insulating layer having a region located below the third insulating layer and above the fifth conductive layer, The sixth conductive layer has a region that contacts the upper surface of the second semiconductor layer through an opening provided in the second insulating layer. The second semiconductor layer has a region that overlaps with the third conductive layer. The first channel formation region and the second channel formation region do not overlap with each other. In a cross-sectional view of the second transistor in the channel length direction, the fifth conductive layer has a region that overlaps with the fourth conductive layer and a region that does not overlap with the fourth conductive layer. The second semiconductor layer has a region that is in contact with the upper surface of the third insulating layer. The third insulating layer has a region that is in contact with the upper surface of the fourth insulating layer. The third insulating layer comprises a silicon oxide film or silicon oxidnitride, The fourth insulating layer comprises silicon nitride or silicon nitride oxide. The composition of the first semiconductor layer and the composition of the second semiconductor layer are different from each other. The semiconductor device comprises a first oxide semiconductor layer containing In, Ga, and Zn, and a second oxide semiconductor layer containing In, Ga, and Zn.

5. In any one of Claims 1 to 4, A semiconductor device wherein the crystal structure of the first oxide semiconductor layer is different from the crystal structure of the second oxide semiconductor layer.

6. In any one of claims 1 to 4, A semiconductor device wherein the composition of the first oxide semiconductor layer is different from the composition of the second oxide semiconductor layer.

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