Image pickup device

Abstract

SOLUTION: An image sensor includes a control block including an exposure control unit configured to control exposure of a pixel and a conversion unit configured to convert a pixel signal from the pixel from analog to digital, a signal output unit connected to the control block and configured to output a signal related to control of the exposure control unit, and a readout unit connected to the control block and configured to read out the pixel signal from the conversion unit, wherein the readout unit is arranged closer to the control block than the signal output unit. The solid-state imaging device may further include an image processing unit connected to the readout unit and configured to process the pixel signal as an image, wherein the control block and the readout unit may be arranged on a first substrate, and the image processing unit may be arranged on a second substrate stacked on the first substrate.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to an imaging element and an imaging device. [Background technology]

[0002] It is known that in an imaging device having a plurality of pixels, the exposure time for each pixel is changed (for example, Patent Document 1). Patent Document 1 Special Publication No. 2015-532797 Summary of the Invention

[0003] In a first aspect of the present invention, an imaging element is provided with a control block including an exposure control unit that controls the exposure of pixels and a conversion unit that converts pixel signals from the pixels from analog to digital, a signal output unit connected to the control block that outputs signals related to the control of the exposure control unit, and a readout unit connected to the control block that reads out pixel signals from the conversion unit, and the readout unit is arranged closer to the control block than the signal output unit.

[0004] A second aspect of the present invention is an imaging device comprising the imaging element described above.

[0005] The above summary of the invention does not list all of the features of the present invention, and subcombinations of these features may also be inventions. [Brief explanation of the drawings]

[0006] [Figure 1] FIG. 4 is a diagram showing an overview of an image sensor 400. [Figure 2] An example of a specific configuration of the pixel section 110 will be shown. [Figure 3] 1 shows an example of a circuit configuration of a pixel 112. [Figure 4] An example of a more specific configuration of the control circuit section 210 will be shown. [Figure 5] 10 is a schematic cross-sectional view for explaining an example of a wiring method for the imaging element 400. FIG. [Figure 6] 10 is a schematic diagram showing the connection relationship between read control units 270a and 270b and read units 230a and 230b. FIG. [Figure 7] 10 is a schematic diagram showing another connection relationship between the read control units 270h to 270k and the read units 230h to 230k. FIG. [Figure 8] FIG. 10 is a diagram showing an overview of another image sensor 900. [Figure 9] 2 is a schematic cross-sectional view showing the connection relationship of the imaging element 900. FIG. [Figure 10] FIG. 1 is a block diagram showing an example of the configuration of an imaging device 500 according to an embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0007] The present invention will be described below through embodiments of the invention, but the following embodiments do not limit the scope of the invention according to the claims. Furthermore, not all of the combinations of features described in the embodiments are necessarily essential to the solution of the invention.

[0008] In this specification, the X-axis and Y-axis are perpendicular to each other, and the Z-axis is perpendicular to the XY plane. The XYZ-axes form a right-handed system. The direction parallel to the Z-axis may be referred to as the stacking direction of the imaging element. In this specification, the terms "up" and "down" are not limited to the up and down directions in the direction of gravity. These terms merely refer to relative directions in the Z-axis direction. Note that in this specification, the arrangement in the X-axis direction will be described as a "row" and the arrangement in the Y-axis direction as a "column," but the matrix direction is not limited to this.

[0009] FIG. 1 is a diagram showing an overview of an image sensor 400. The image sensor 400 captures an image of a subject. The image sensor 400 generates image data of the captured subject. The image sensor 400 includes a first substrate 100, a second substrate 200, and a third substrate 300. As shown in FIG. 1, the first substrate 100 is stacked on the second substrate 200. The second substrate 200 is stacked on the third substrate 300. The structure of the image sensor 400 may be a back-illuminated type or a front-illuminated type.

[0010] The first substrate 100 has a pixel unit 110, a connection unit 150, and an I / O unit 160. The pixel unit 110 is arranged toward the center of the first substrate 100. A pair of connection units 150 are arranged on the outer side of the pixel unit 110 in the X direction, extending along opposing sides of the first substrate 100. An I / O unit 160 is arranged on the outer side of each of the pair of connection units 150 in the X direction, extending along that side.

[0011] Light is incident on the pixel section 110. The pixel section 110 outputs a pixel signal based on the incident light. The first substrate 100 may be referred to as a pixel chip.

[0012] The second substrate 200 has a control circuit section 210, a readout section 230, an exposure control section 240, a pixel driving section 250, a connection section 260, and a readout control section 270. The second substrate 200 may be referred to as a processing circuit chip.

[0013] The control circuit section 210 in this example is disposed at a position on the second substrate 200 facing the pixel section 110. That is, the control circuit section 210 is disposed closer to the center of the second substrate 200. The control circuit section 210 outputs a control signal to the pixel section 110 for controlling the driving of the pixel section 110. The control circuit section 210 also receives as input a pixel signal output from the pixel section 110.

[0014] The control circuit unit 210 performs signal processing on pixel signals. For example, the control circuit unit 210 performs processing to convert analog signals into digital signals. Specifically, the control circuit unit 210 performs processing to convert input pixel signals into digital signals. The control circuit unit 210 may also perform other signal processing. Examples of other signal processing include noise removal processing such as analog or digital CDS (Correlated Double Sampling).

[0015] The readout control unit 270 controls the reading of pixel signals from the control circuit unit 210, and the readout unit 230 reads out the pixel signals from the control circuit unit 210 based on this control. On the second substrate 200, the readout control unit 270 and the readout unit 230 are arranged adjacent to the control circuit unit 210. In this example, the readout control unit 270 extends in the X direction and is arranged as a pair on the outer side of the control circuit unit 210 in the Y direction. On the other hand, the readout unit 230 extends in the Y direction and is arranged as a pair on the outer side of the control circuit unit 210 in the X direction.

[0016] The exposure control unit 240 constitutes a signal output unit that outputs signals related to the control of exposure of the pixel unit 110 to the control circuit unit 210. On the second substrate 200, the exposure control units 240 extend in the Y direction and are disposed on the outer sides of the pair of readout units 230 in the X direction.

[0017] The pixel driving unit 250 is electrically connected to the connection unit 150 of the first substrate 100 and controls the driving of the pixel unit 110. The pixel driving unit 250 extends in the Y direction and is disposed on the outer sides of the pair of exposure control units 240 in the X direction.

[0018] The connection unit 260 is electrically connected to the first substrate 100 and the third substrate 300, and transfers pixel signals from the third substrate 300 to the first substrate 100. The connection unit 260 extends in the Y direction, and is disposed on the outer sides of each of the pair of pixel driving units 250 in the X direction.

[0019] The third substrate 300 has an image processing section 310, a connection section 330, and readout sections 340 and 360. The third substrate 300 may be referred to as an image processing chip.

[0020] The image processing unit 310 in this example is disposed at a position facing the control circuit unit 210 on the third substrate 300. In other words, the image processing unit 310 is disposed closer to the center of the third substrate 300. The image processing unit 310 performs image processing on the pixel signals output by the control circuit unit 210.

[0021] The connection units 330 are electrically connected to the image processing unit 310 and the readout unit 230 of the second substrate 200. As a result, the connection units 330 transfer pixel signals read out from the control circuit unit 210 by the readout unit 230 to the image processing unit 310. The connection units 330 extend in the Y direction, and a pair of connection units 330 are arranged on the outer sides of the image processing units 310 in the X direction.

[0022] The readout unit 340 is electrically connected to the image processing unit 310 and the exposure control unit 240 of the second substrate 200. As a result, the readout unit 340 transfers pixel signals read out from the image processing unit 310 to the exposure control unit 240. The readout unit 340 extends in the Y direction and is disposed outside each of the connection units 330 in the X direction.

[0023] The readout unit 360 is electrically connected to the image processing unit 310 and the connection unit 260 of the second substrate 200. As a result, the readout unit 360 transfers pixel signals read out from the image processing unit 310 to the connection unit 260. The readout unit 360 extends in the Y direction and is disposed outside each of the readout units 340 in the X direction.

[0024] 2 shows an example of a specific configuration of the pixel section 110. In this example, an enlarged view of the pixel section 110 and a pixel block 120 provided in the pixel section 110 is shown.

[0025] The pixel section 110 has a plurality of pixel blocks 120 arranged side by side in the row and column directions. In this example, the pixel section 110 has M×N (M and N are natural numbers) pixel blocks 120. In this example, the case where M is equal to N is illustrated, but M and N may be different.

[0026] Each pixel block 120 has at least one pixel 112. In this example, the pixel block 120 has m×n pixels 112 (m and n are natural numbers). For example, the pixel block 120 has 16×16 pixels 112. The number of pixels 112 corresponding to the pixel block 120 is not limited to this. In this example, the case where m is equal to n is illustrated, but m may be different from n. The pixel block 120 has multiple pixels 112 connected to a common control line in the row direction. For example, each pixel 112 in the pixel block 120 is connected to a common control line so that the pixels 112 are set to the same exposure time. In one example, n pixels 112 arranged in the row direction are connected by a common control line.

[0027] On the other hand, different exposure times may be set for each of the multiple pixel blocks 120. That is, the pixels 112 of each pixel block 120 may have the same exposure time, but may be set to different exposure times for the other pixel blocks 120. For example, when the pixels 112 of a pixel block 120 are connected in the row direction by a common control line, the pixels 112 of the other pixel blocks 120 may be connected in common by a different control line.

[0028] The pixel blocks 120 are arranged corresponding to the control blocks 220 described later. In this embodiment, one pixel block 120 is arranged for one control block 220.

[0029] The pixels 112 have a photoelectric conversion function that converts light into electric charges. The pixels 112 accumulate the electric charges generated by the photoelectric conversion. m pixels 112 are arranged side by side in the column direction and connected to a common signal line 122. The m pixels 112 are arranged side by side in n columns in the row direction in the pixel block 120.

[0030] In other words, the pixel block 120 is a group of pixels 112 connected by a common control line. The pixel block 120 can also be said to be the smallest unit of a circuit for multiple pixels 112 for which the same exposure time is set.

[0031] 3 shows an example of the circuit configuration of the pixel 112. The pixel 112 includes a photoelectric conversion unit 104, a transfer unit 123, a discharge unit 124, a reset unit 126, and a pixel output unit 127. The pixel output unit 127 includes an amplifier unit 128 and a selection unit 129. In this example, the transfer unit 123, the discharge unit 124, the reset unit 126, the amplifier unit 128, and the selection unit 129 are described as N-channel FETs, but the type of transistor is not limited to this.

[0032] The photoelectric conversion unit 104 has a photoelectric conversion function of converting light into electric charges. The photoelectric conversion unit 104 accumulates the electric charges generated by photoelectric conversion. The photoelectric conversion unit 104 is, for example, a photodiode.

[0033] The transfer unit 123 transfers the charges accumulated in the photoelectric conversion unit 104 to the storage unit 125. The transfer unit 123 is an example of a transfer gate that transfers the charges of the photoelectric conversion unit 104. In other words, the transfer unit 123 serves as the gate, the photoelectric conversion unit 104 serves as the source, and the storage unit 125 serves as the drain, forming a so-called transfer transistor. The gate terminal of the transfer unit 123 is connected to a local transfer control line for each pixel block 120 for inputting a control signal φTX1.

[0034] The discharge unit 124 discharges the charges accumulated in the photoelectric conversion unit 104 to a power supply wiring to which a power supply voltage VDD is supplied. A gate terminal of the discharge unit 124 is connected to a local discharge control line for each pixel block 120 for inputting a discharge control signal φTX2. Note that, in this example, the discharge unit 124 has been described as discharging the charges of the photoelectric conversion unit 104 to a power supply wiring to which a power supply voltage VDD is supplied, but the discharge unit 124 may also be discharged to a power supply wiring to which a power supply voltage different from the power supply voltage VDD is supplied.

[0035] The charge from the photoelectric conversion unit 104 is transferred to the accumulation unit 125 by the transfer unit 123. The accumulation unit 125 is an example of a floating diffusion (FD).

[0036] The reset unit 126 discharges the charge in the storage unit 125 to a power supply line to which a predetermined power supply voltage VDD is supplied. A gate terminal of the reset unit 126 is connected to a global reset control line across multiple pixel blocks 120 for inputting a reset control signal φRST.

[0037] The pixel output unit 127 outputs a signal based on the potential of the storage unit 125 to the signal line 122. The pixel output unit 127 has an amplifier unit 128 and a selection unit 129. The amplifier unit 128 has a gate terminal connected to the storage unit 125, a drain terminal connected to a power supply line to which a power supply voltage VDD is supplied, and a source terminal connected to the drain terminal of the selection unit 129.

[0038] The selection unit 129 controls the electrical connection between the pixel 112 and the signal line 122. When the selection unit 129 electrically connects the pixel 112 and the signal line 122, a pixel signal is output from the pixel 112 to the signal line 122. A gate terminal of the selection unit 129 is connected to a global selection control line that spans multiple pixel blocks 120 and inputs a selection control signal φSEL. A source terminal of the selection unit 129 is connected to the load current source 121.

[0039] The load current source 121 supplies a current to the signal line 122. The load current source 121 may be provided on the first substrate 100 or on the second substrate 200.

[0040] Hereinafter, any one of the charges accumulated in the photoelectric conversion unit 104, the charges transferred to the accumulation unit 125, and the signal based on the potential of the accumulation unit 125, or all of these may be collectively referred to as a pixel signal.

[0041] In other words, the pixel 112 includes at least one photoelectric conversion unit 104 and a pixel output unit 127 as a readout unit that reads out an image signal from the at least one photoelectric conversion unit 104 to a signal line 122. The pixel 112 can also be said to be the smallest unit of a circuit that outputs pixel signals that constitute an image to the signal line 122.

[0042] 4 shows an example of a more specific configuration of the control circuit section 210. In this example, an enlarged view of the control circuit section 210 and a control block 220 provided in the control circuit section 210 is shown.

[0043] The control circuit section 210 has control blocks 220 arranged side by side in the row and column directions. The control circuit section 210 of this example has M×N control blocks 220.

[0044] The control blocks 220 are disposed at positions corresponding to the pixel blocks 120. For example, the control blocks 220 and the pixel blocks 120 are disposed at positions where they overlap when viewed from the stacking direction of the first substrate 100 and the second substrate 200. In this case, the areas of the control blocks 220 and the pixel blocks 120 may be substantially the same, including the margin between adjacent blocks.

[0045] The control block 220 controls the driving of the corresponding pixel block 120. For example, the control block 220 controls the exposure time of the pixel block 120. The control block 220 also has a processing circuit such as an AD converter, and processes the signal output by the pixel block 120. In one example, the control block 220 converts the analog pixel signal output from the corresponding pixel block 120 into a digital signal. The control block 220 in this example includes an exposure control unit 10, a pixel driving unit 20, a joining unit 30, a conversion unit 40, and a signal output unit 50.

[0046] The exposure control unit 10 controls exposure of the multiple pixels 112. The exposure control unit 10 generates a signal for controlling the exposure time of the pixels 112. In one example, the exposure control unit 10 controls the exposure time for each pixel block 120 by adjusting at least one of the start timing and end timing of the exposure.

[0047] The pixel driving unit 20 is electrically connected to the plurality of pixels 112 to which the signals are output. The pixel driving unit 20 selects and drives an arbitrary pixel 112 from the plurality of pixels 112 based on a signal from the exposure control unit 10. The pixel driving unit 20 is disposed at a position corresponding to the m pixels 112 arranged in the column direction. The image sensor 400 can set the exposure time for each pixel block 120 according to the intensity of incident light, thereby expanding the dynamic range.

[0048] The junction unit 30 is electrically connected to a plurality of pixels 112 that are signal input sources. The junction unit 30 inputs the pixel signals input from the pixels 112 to the conversion unit 40. The junction units 30 are provided corresponding to n pixels 112 arranged in the row direction, and input pixel signals to the conversion unit 40 for each column.

[0049] The conversion unit 40 converts the analog signal output by the pixel unit 110 into a digital signal. In this example, the conversion unit 40 converts the analog pixel signal into a digital signal. The conversion unit 40 sequentially converts the analog signals from m pixels 112 arranged in the column direction into digital signals. The conversion unit 40 converts the analog signals from n columns of pixels 112 in the row direction into digital signals in parallel. This can also be said to be a so-called column ADC method for one pixel block 120.

[0050] The signal output section 50 receives the digital signal from the conversion section 40. In one example, the signal output section 50 temporarily stores the digital signal. The signal output section 50 may include a latch circuit for storing the digital signal.

[0051] Note that instead of providing one control block 220 for one pixel block 120, one control block 220 may be provided for N pixel blocks 120 (N is a natural number greater than or equal to 2). The N pixel blocks 120 corresponding to one pixel block are sometimes referred to as a pixel block group. For example, two pixel blocks 120 arranged side by side in the column direction may be treated as one pixel block group, and one control block 220 may be provided for each pixel block group. In this case, the control block 220 may control the exposure time for each pixel block 120.

[0052] In other words, the control block 220 is electrically connected to at least one pixel block 120 and can be said to be the smallest unit of a circuit that controls the pixels 112 in that at least one pixel block 120. The control circuit unit 210 can also be said to be composed of a group of control blocks 220.

[0053] 5 is a schematic cross-sectional view illustrating an example of a wiring method for the image sensor 400. In FIG. 5, a plurality of signal lines (for example, parallel signal lines corresponding to the number of bits) may be represented by a single signal line.

[0054] The pixel driving unit 250 is connected via the connection unit 150 to reset control lines 143 and selection control lines 145 that output signals to each pixel block 120. The pixel driving unit 250 supplies a reset control signal φRST to the plurality of pixel blocks 120 via the reset control lines 143 and a selection control signal φSEL via the selection control lines 145.

[0055] The exposure control unit 240 supplies a transfer selection control signal φTXSEL and a signal TXDATA corresponding to the exposure time to a plurality of control blocks 220 via a transfer selection control line 242. The transfer selection control signal φTXSEL and the signal TXDATA are supplied to the exposure control unit 10 of the control block 220 to control the exposure time for each pixel block 120. The control block 220 to which the transfer selection control signal φTXSEL is supplied outputs the transfer selection control signal φTXSEL from the pixel driving unit 20 to the corresponding pixel block 120. The pixel block 120 determines whether to input the transfer control signal φTX1 or the discharge control signal φTX2 to the pixel 112 based on the transfer selection control signal φTXSEL and the signal TXDATA. As a result, the transfer control signal φTX1 or the discharge control signal φTX2 to the pixel 112 is input or skipped.

[0056] For example, when the transfer control signal φTX1 determines the end time of exposure, the control block 220 extends the exposure time by skipping the transfer control signal φTX1. When the transfer control signal φTX1 determines the start time of exposure, the control block 220 shortens the exposure time by skipping the transfer control signal φTX1. In this way, the exposure time of the pixel block 120 can be adjusted by the transfer selection control signal φTXSEL. The same applies when the discharge control signal φTX2 determines the start or end time of exposure.

[0057] The reset control line 143, the selection control line 145, and the transfer selection control line 242 are wired globally, i.e., are provided in common to multiple pixel blocks 120. In this example, the reset control line 143, the selection control line 145, and the transfer selection control line 242 are wired so as to cross the pixel unit 110 in the row direction. The reset control line 143, the selection control line 145, and the transfer selection control line 242 may also be wired so as to cross the pixel unit 110 in the column direction.

[0058] For example, the reset control line 143 is connected to the gate terminal of the reset unit 126 of the pixel block 120 and supplies the reset control signal φRST. The selection control line 145 is connected to the gate terminal of the selection unit 129 of the pixel block 120 and supplies the selection control signal φSEL. In addition, the transfer selection control line 242 is connected to each of the multiple control blocks 220 and supplies the transfer selection control signal φTXSEL and the signal TXDATA to the exposure control unit 10.

[0059] Meanwhile, a transfer control line 141 and a discharge control line 142, which are local control lines from the pixel driving unit 20 of the control block 220, are connected to the pixel block 120. In this example, the transfer control line 141 is connected to the gate terminal of a transfer unit 123 provided in the pixel block 120. The transfer control line 141 supplies a transfer control signal φTX1 output from the pixel driving unit 20 to the pixel block 120. In this example, the discharge control line 142 is connected to the gate terminal of a discharge unit 124 provided in the pixel block 120. The discharge control line 142 supplies a discharge control signal φTX2 output from the pixel driving unit 20 to the pixel block 120.

[0060] The junction units 30 are connected to the signal lines 122 and the power supply lines 130. The junction units 30 are connected to the ground lines 132 set to the reference potential VGND. The junction units 30 output pixel signals to the corresponding converters 40. For example, n converters 40 are provided in the row direction.

[0061] The ground lines 132 are set to a predetermined reference potential VGND. In this example, the ground lines 132 are wired so as to cross the first substrate 100 in the row direction.

[0062] The plurality of bumps 152 are provided on the bonding surfaces where the first substrate 100 and the second substrate 200 are bonded to each other. The bumps 152 of the first substrate 100 are aligned with the bumps 152 of the second substrate 200. The plurality of opposing bumps 152 are bonded and electrically connected by applying pressure to the first substrate 100 and the second substrate 200 or the like.

[0063] The image sensor 400 of this example controls the exposure time for each pixel block 120 by changing the timing of at least one of the transfer unit 123 and the discharge unit 124 using local control lines. By combining local control lines and global control lines, the image sensor 400 can control the exposure time with fewer control lines.

[0064] The signal output unit 50 of the control block 220 is connected to the readout control unit 270 and the readout unit 230 by a signal line 232. Under the control of the readout control unit 270, pixel signals stored in the signal output unit 50 are read out to the readout unit 230. In addition, the exposure control unit 240 and pixel drive unit 250 are arranged on the opposite side of the readout unit 230 from the control circuit unit 210. For convenience of illustrating the cross-sectional view, the readout control unit 270 and the readout unit 230 are depicted in the same position in FIG.

[0065] Fig. 6 is a schematic diagram showing the connection relationship between the read control units 270a and 270b and the read units 230a and 230b. As explained in Fig. 1, in this example, a pair of read control units 270a and 270b are provided with the control circuit unit 210 sandwiched between them, and the read units 230a and 230b are provided with the control circuit unit 210 sandwiched between them.

[0066] The read control units 270a and 270b are provided adjacent to a side of the control circuit unit 210 along the X direction. The read control unit 270a is connected to a part of the control circuit unit 210, for example, a control block 220 included in the upper half of the control circuit unit 210, via a signal line 232a. On the other hand, the read control unit 270a is connected to another part of the control circuit unit 210, for example, a control block 220 in the lower half, via a signal line 232b. In this case, the signal lines 232a and 232b are each connected in common to the control blocks 220 in the column direction.

[0067] Readout units 230a and 230b are provided adjacent to a side of control circuit unit 210 along the Y direction. Readout unit 230a is connected to a part of control circuit unit 210, for example, a control block 220 included in the upper half of control circuit unit 210, via signal line 232c. Meanwhile, readout unit 230b is connected to another part of control circuit unit 210, for example, a control block 220 in the lower half, via signal line 232d. In this case, signal lines 232c and 232d are each connected in common to control blocks 220 in the row direction.

[0068] As a result, control block 220 included in the upper half of control circuit 210 is controlled by readout control unit 270a to output pixel signals to readout unit 230a, while control block 220 included in the lower half of control circuit 210 is controlled by readout control unit 270b to output pixel signals to readout unit 230b.

[0069] FIG. 6 shows an example of a readout circuit 234, which is part of the readout unit 230a. The readout circuit 234 includes a circuit known as a sense amplifier. The readout circuit 234 in this example has a comparator 235 to which a pixel signal from the signal output unit 50 is input, and transistors 236, 237, and 238 that are arranged before the input and are precharged. When determining whether a signal stored in the signal output unit 50 is H (high) or L (low), the readout circuit 234 can quickly determine and output a result with a potential difference to each determination threshold that is only a fraction of that of a typical CMOS logic circuit. However, since the potential difference related to the determination is small, it is preferable to avoid noise being introduced.

[0070] In addition, other control signals, for example, the transfer selection control signal φTXSEL output from the exposure control unit 240 via the transfer selection control line 242, are digital signals, and the voltage thereof is larger than the potential difference determined by the readout circuit 234. Therefore, even if the transfer selection control line 242 is arranged to cross the readout unit 230, it is less susceptible to noise.

[0071] In this embodiment, the readout units 230a and 230b are provided adjacent to the control circuit unit 210. In addition, no other circuits, for example, the exposure control unit 240, are provided between the readout units 230a and 230b and the control circuit unit 210. In other words, the readout units 230a and 230b are provided closer to the control circuit unit 210 than other circuits, for example, the exposure control unit 240. Therefore, noise is less likely to be carried on the signal lines 232c and 232d from the control circuit unit 210 to the readout circuit 234, and malfunctions can be prevented.

[0072] 5, the readout unit 230 is connected to a connection unit 330 of the third substrate 300 by through electrodes 62, 362. The connection unit 330 is connected to the image processing unit 310 by a signal line 332. Therefore, the pixel signals read out from the control block 220 by the readout unit 230 are input to the image processing unit 310 via the connection unit 330.

[0073] The readout unit 340 is connected to the image processing unit 310 by a signal line 342, and is also connected to the exposure control unit 240 of the second substrate 200 by through electrodes 62, 362. The readout unit 340 reads out the pixel signals that have been image-processed from the image processing unit 310. The readout unit 340 then outputs the read-out pixel signals to the exposure control unit 240 via through electrodes 364, 64. The exposure control unit 240 supplies a transfer selection control signal φTXSEL to each of the control blocks 220 based on the input pixel signals, for example, on the contrast calculated as part of the image processing of the image processing unit 310.

[0074] The readout unit 360 is connected to the image processing unit 310 by a signal line 361, and is also connected to the connection unit 260 of the second substrate 200 by through electrodes 62, 362. The connection unit 260 is connected to the I / O unit 160 by a bump 152. This allows the readout unit 340 to read out, for example, pixel signals that have been image-processed from the image processing unit 310, and output them from the I / O unit 160 to the outside of the image sensor 400.

[0075] In addition, the first substrate 100 and the second substrate 200 are joined at their wiring sides, and are therefore electrically connected by bumps 152. On the other hand, the second substrate 200 and the third substrate 300 are joined at their substrate sides, and are therefore electrically connected by through electrodes 62, 362. Alternatively, the first substrate 100 and the second substrate 200 may be electrically connected on the substrate side using through electrodes, and the second substrate 200 and the third substrate 300 may be electrically connected on the wiring side using bumps.

[0076] As described above, according to this embodiment, the readout units 230a and 230b are provided adjacent to the control circuit unit 210, so noise is less likely to be carried on the signal lines 232c and 232d from the control circuit unit 210 to the readout circuit 234, and malfunctions can be prevented.

[0077] In this embodiment, a pair of read control units 270 and a pair of read units 230 are provided. Alternatively, one read control unit 270 and one read unit 230 may be provided and connected to all of the control blocks 220. Furthermore, in this embodiment, the read control unit 270 is arranged on the Y-direction side of the control circuit unit 210, and the read unit 230 is arranged on the X-direction side of the control circuit unit 210. Alternatively, the read control unit 270 may be arranged on the X-direction side of the control circuit unit 210, and the read unit 230 may be arranged on the Y-direction side of the control circuit unit 210.

[0078] 7 is a schematic diagram showing another connection relationship between the read control units 270h to 270k and the read units 230h to 230k. In this example, the control circuit unit 210 is divided into four control block groups, top, bottom, left and right, and controlled accordingly.

[0079] The control block 220 in the upper right, i.e., first quadrant, is connected to a readout control unit 270h arranged adjacently in the X direction by a signal line 232p, and is also connected to a readout unit 230h arranged adjacently in the Y direction by a signal line 232q. As a result, the control block 220 included in the first quadrant of the control circuit unit 210 is controlled by the readout control unit 270h and outputs pixel signals to the readout unit 230h.

[0080] The control block 220 in the upper left, i.e., second quadrant, is connected to the readout control unit 270i arranged adjacently in the Y direction by a signal line 232r, and is also connected to the readout unit 230i arranged adjacently in the X direction by a signal line 232s. As a result, the control block 220 included in the second quadrant of the control circuit unit 210 is controlled by the readout control unit 270i and outputs pixel signals to the readout unit 230i.

[0081] The control block 220 in the lower left, i.e., third quadrant, is connected to a readout control unit 270j arranged adjacently in the X direction by a signal line 232t, and is also connected to a readout unit 230j arranged adjacently in the Y direction by a signal line 232u. As a result, the control block 220 included in the third quadrant of the control circuit unit 210 is controlled by the readout control unit 270j and outputs pixel signals to the readout unit 230j.

[0082] The control block 220 in the lower right, i.e., the fourth quadrant, is connected to the readout control unit 270k arranged adjacently in the Y direction by a signal line 232v, and is also connected to the readout unit 230k arranged adjacently in the X direction by a signal line 232w. As a result, the control block 220 included in the fourth quadrant of the control circuit unit 210 is controlled by the readout control unit 270k and outputs pixel signals to the readout unit 230k.

[0083] Fig. 8 is a diagram showing an overview of another image sensor 900, and Fig. 9 is a schematic cross-sectional view showing the connections of the image sensor 900. In the image sensor 900 of Figs. 8 and 9, the same components as those of the image sensor 400 of Figs. 1 to 7 are designated by the same reference numerals and descriptions thereof will be omitted.

[0084] In the image sensor 900, a pixel driving section 650 corresponding to the pixel driving section 250 of the image sensor 400 is provided on the first substrate 600. Accordingly, the first substrate 600 does not have a configuration corresponding to the connection section 150 of the image sensor 400. Furthermore, the second substrate 700 does not have a configuration corresponding to the pixel driving section 250 of the image sensor 400.

[0085] In the image sensor 900, the readout control unit 270, the control circuit unit 210, and the readout unit 230 are also disposed adjacent to the control circuit unit 210. In addition, no other circuits, such as the exposure control unit 240, are provided between the readout unit 230 and the control circuit unit 210. In other words, the readout unit 230 is provided closer to the control circuit unit 210 than other circuits, such as the exposure control unit 240. This makes it difficult for noise to be carried on the signal line 232 from the control circuit unit 210 to the readout unit 230, thereby preventing malfunction.

[0086] In any of the above embodiments, the second transfer unit 124 of the pixel 112 may be omitted. Furthermore, the first transfer unit 123 may also be omitted, in which case the storage unit 125 will no longer function as a floating diffusion. The storage unit 125 and pixel output unit 127 may be shared with other pixels. Furthermore, the pixel 112 may be configured with multiple photoelectric conversion units 104 and first transfer units 123.

[0087] The first substrate 100, 600 and the second substrate 200, 700 are mechanically bonded by the bumps 152. In addition, the mechanical bond strength between the substrates may be increased by providing multiple dummy bumps that are not involved in electrical connection or by using an adhesive. Alternatively or in addition, the bumps 152 may primarily provide electrical connection, and mechanical strength may be maintained by separately activating the bonding surfaces of the substrates to bond them together. Similarly, the second substrate 200, 700 and the third substrate 300, 800 may maintain mechanical strength by using dummy bumps, adhesive, activation bonding, or the like, in addition to or in addition to electrical connection.

[0088] 10 is a block diagram showing an example of the configuration of an image capturing device 500 according to an embodiment. The image capturing device 500 includes an image capturing element 400, a system control unit 501, a drive unit 502, a photometry unit 503, a work memory 504, a recording unit 505, a display unit 506, a drive unit 514, and a photographing lens 520. While an example including the image capturing element 400 will be described, an image capturing element 900 may be included instead.

[0089] The photographing lens 520 guides the subject light beam incident along the optical axis OA to the image sensor 400. The photographing lens 520 is composed of a group of multiple optical lenses, and focuses the subject light beam from the scene near its focal plane. The photographing lens 520 may be an interchangeable lens that can be attached to and detached from the image capture device 500. Note that in FIG. 10, the photographing lens 520 is represented by a virtual single lens placed near the pupil.

[0090] The driver 514 drives the photographing lens 520. In one example, the driver 514 changes the focus position by moving the optical lens group of the photographing lens 520. The driver 514 may also drive an iris diaphragm in the photographing lens 520 to control the amount of subject light entering the image sensor 400.

[0091] The drive unit 502 has a control circuit that executes charge accumulation control such as timing control and area control of the image sensor 400 in accordance with instructions from the system control unit 501. Furthermore, the operation unit 508 receives instructions from the photographer using a release button or the like.

[0092] The image sensor 400 passes pixel signals to an image processing unit 511 in the system control unit 501. The image processing unit 511 generates image data by performing various image processes using the work memory 504 as a workspace. For example, when generating image data in JPEG file format, a color video signal is generated from a signal obtained using the Bayer array, and then compression processing is performed. The generated image data is recorded in a recording unit 505 and converted into a display signal, which is then displayed on a display unit 506 for a preset time.

[0093] The photometry unit 503 detects the luminance distribution of a scene prior to a series of shooting sequences for generating image data. The photometry unit 503 includes, for example, an AE sensor with approximately one million pixels. The calculation unit 512 of the system control unit 501 receives the output of the photometry unit 503 and calculates the luminance of each region of the scene.

[0094] The calculation unit 512 determines the shutter speed, aperture value, and ISO sensitivity in accordance with the calculated luminance distribution. The image sensor 400 may also serve as the photometry unit 503. The calculation unit 512 also executes various calculations for operating the imaging device 500. A part or all of the drive unit 502 may be mounted on the image sensor 400. A part of the system control unit 501 may be mounted on the image sensor 400. Furthermore, the image sensor 900 may be used instead of the image sensor 400.

[0095] Although the present invention has been described above using embodiments, the technical scope of the present invention is not limited to the scope described in the above embodiments. It will be apparent to those skilled in the art that various modifications and improvements can be made to the above embodiments. It is clear from the claims that such modifications and improvements can also be included within the technical scope of the present invention.

[0096] It should be noted that the execution order of each process, such as operations, procedures, steps, and stages, in the devices, systems, programs, and methods shown in the claims, specifications, and drawings is not specifically stated as "before," "prior to," etc., and that the processes can be performed in any order unless the output of a previous process is used in a subsequent process. Even if the operational flow in the claims, specifications, and drawings is described using "first," "next," etc. for convenience, this does not mean that the processes must be performed in this order. [Explanation of symbols]

[0097] 10 exposure control unit, 20 pixel driving unit, 30 joining unit, 40 conversion unit, 50 signal output unit, 62, 64, 362, 364 through electrode, 100, 600 first substrate, 104 photoelectric conversion unit, 110 pixel unit, 112 pixel, 120 pixel block, 121 load current source, 122, 232, 332, 342, 361 signal line, 123 transfer unit, 124 discharge unit, 125 storage unit, 126 reset unit, 127 pixel output unit, 128 amplifier unit, 129 selection unit, 130 power line, 132 ground line, 141 transfer control line, 142 discharge control line, 143 reset control line, 145 selection control line, 150 connection unit, 152 bump, 160 I / O unit, 200, 700 Second substrate, 210 control circuit section, 220 control block, 230 readout section, 236, 237, 238 transistor, 240 exposure control section, 242 transfer selection control line, 250, 650 pixel drive section, 260 connection section, 270 readout control section, 300, 800 third substrate, 310 image processing section, 330 connection section, 340, 360 readout section, 400, 900 image sensor, 500 imaging device, 501 system control section, 502 drive section, 503 photometry section, 504 work memory, 505 recording section, 506 display section, 508 operation section, 511 image processing section, 512 calculation section, 514 drive section, 520 photographic lens

Claims

[Claim 1] a first substrate having a pixel unit including a first photoelectric conversion unit that converts light into an electric charge; a second substrate laminated on the first substrate, the second substrate having a control circuit that converts a first signal based on the charge converted by the first photoelectric conversion unit into a digital signal, a readout unit that outputs a first digital signal converted from the first signal by the control circuit, and a control unit that outputs a control signal to the control circuit unit to control accumulation of the charge converted by the first photoelectric conversion unit; a third substrate that is laminated on the first substrate and electrically connected to the readout unit; Equipped with the readout unit is disposed at a position on the second substrate such that the distance to the control circuit unit is shorter than the distance from the control unit to the control circuit unit; Image sensor.

Images