Semiconductor package and method for manufacturing semiconductor package
By varying die thickness based on pillar density and using a backgrinding process with tailored tape properties, the semiconductor package addresses underfill penetration and air leakage issues, ensuring reliable sealing and manufacturing quality.
Patent Information
- Application Number
- JP2024124281
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-07-31
- Publication Date
- 2026-02-13
AI Technical Summary
As semiconductor packages become thinner and gaps between the die and substrate narrower, underfill agents struggle to penetrate, leading to sealing defects and air leakage, despite improvements in underfill composition.
The die thickness varies based on pillar density, forming larger gaps where pillars are present, and a backgrinding process with specific tape properties ensures uneven surfaces for easier underfill penetration and reduced air leakage.
Wider gaps facilitate underfill material entry, preventing sealing defects and air leakage, enhancing manufacturing reliability.
Smart Images

Figure 2026022762000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a semiconductor package and a method for manufacturing the semiconductor package. [Background technology]
[0002] As electronic devices become more sophisticated, semiconductor packages that house integrated circuits, processors, image sensors, and other components are becoming smaller and thinner. A semiconductor package contains a die that performs a given circuit function. The die has multiple pillars on one side, which form a bridge connection with the substrate.
[0003] However, in recent years, as semiconductor packages have become smaller and thinner, the gap between the die and the substrate has become narrower. Furthermore, the area of the die has also become larger. As the gap narrows and the die area increases, it becomes more difficult for the underfill material that seals the die to penetrate into the gap. This can lead to defects in the die sealing.
[0004] In this regard, Patent Document 1 below discloses an underfill composition that aims to provide sufficient reliability to electronic components by improving properties such as viscosity by modifying the composition and content of the materials in the underfill agent. [Prior art documents] [Patent documents]
[0005] [Patent Document 1] Japanese Patent Application Publication No. 2023-109410 Summary of the Invention [Problem to be solved by the invention]
[0006] However, as semiconductor packages become thinner, gaps are also becoming narrower at a rapid pace, and even if the properties of underfill agents are improved, there remains the problem that it is difficult for the underfill agent to penetrate into the gaps.
[0007] The present invention has been made in view of the above circumstances, and its main object is to provide a semiconductor package having a die with a structure that allows an underfill agent to easily enter gaps therein, and a method for manufacturing the semiconductor package.
[0008] Another object of the present invention is to provide a semiconductor package and a method for manufacturing the semiconductor package that can prevent or suppress air leakage between the collet and the die when the die having pillars is picked up by the collet. [Means for solving the problem]
[0009] The above object can be achieved by the following means.
[0010] (1) A semiconductor package comprising a die and a plurality of pillars provided on one surface of the die, wherein the thickness of the die corresponding to an area on the surface where the pillars are present is thinner than the thickness of the die corresponding to an area on the surface where the pillars are not present.
[0011] (2) The semiconductor package according to (1) above, wherein the thickness of the die is thinner in an area where the number of pillars on one surface of the die is denser.
[0012] (3) The semiconductor package according to (2) above, wherein the thickness of the die varies continuously along the surface depending on the density of the number of pillars on the surface.
[0013] (4) The semiconductor package according to (1) or (2) above, wherein the difference between the maximum and minimum thicknesses of the die is 15 μm or more.
[0014] (5) The semiconductor package according to (1) or (2) above, wherein the die is a bridge die that connects two dies together.
[0015] (6) The semiconductor package according to (1) or (2) above, further comprising: a substrate connected to the die by the plurality of pillars; and a sealing member sealing the die on the substrate.
[0016] (7) A method for manufacturing a semiconductor package, comprising the steps of: (a) applying a backgrinding tape to one surface of a wafer or die having a plurality of pillars on the surface; (b) vacuum-adsorbing the one surface of the wafer or die to fix it to a vacuum chuck; and (c) thinning the wafer or die by backgrinding the other surface of the wafer or die.
[0017] (8) The method for manufacturing a semiconductor package described in (7) above, wherein the backgrinding tape has a base material and an adhesive formed on the base material, and the thickness of the base material is 25 μm or more and 300 μm or less.
[0018] (9) A method for manufacturing a semiconductor package described in (7) above, wherein the backgrinding tape has a substrate and an adhesive formed on the substrate, and the elastic modulus of the substrate is 0.1 GPa or more and 10 GPa or less.
[0019] (10) A method for manufacturing a semiconductor package according to (7) above, wherein the backgrinding tape has a substrate and an adhesive formed on the substrate, and the softening point of the substrate is 90°C or higher and 250°C or lower.
[0020] (11) The method for manufacturing a semiconductor package described in (7) above, wherein the backgrinding tape has a base material and an adhesive formed on the base material, and the thickness of the adhesive is 5 μm or more and 100 μm or less.
[0021] (12) The method for manufacturing a semiconductor package described in (7) above, wherein the backgrinding tape has a substrate and an adhesive formed on the substrate, and the elastic modulus of the adhesive is 10 kPa or more and 1000 kPa or less. [Effects of the Invention]
[0022] According to the semiconductor package and the method for manufacturing the semiconductor package of the present invention, the gap between the die and the substrate in the area where the pillars are present is formed larger than the gap between the die and the substrate in the area where the pillars are not present. Therefore, the gap between the die and the substrate is wider than that of a conventional die, and the underfill material can easily enter the gap. [Brief explanation of the drawings]
[0023] [Figure 1] 1 is a schematic cross-sectional view illustrating the configuration of a semiconductor package according to a first embodiment of the present invention. [Figure 2] 2 is a flowchart illustrating an outline of a method for manufacturing the semiconductor package shown in FIG. 1. [Figure 3] 3 is a schematic view illustrating a step of attaching a backgrind tape to one surface of a wafer in the method for manufacturing the semiconductor package shown in FIG. 2. FIG. [Figure 4] 3 is a schematic diagram illustrating a state in which a backgrind tape is attached to a wafer in the method for manufacturing the semiconductor package shown in FIG. 2. FIG. [Figure 5] 3 is a schematic view illustrating a step of fixing a wafer to a vacuum chuck in the method for manufacturing the semiconductor package shown in FIG. 2. [Figure 6] 3 is a schematic view illustrating a state in which a wafer is fixed to a vacuum chuck in the method for manufacturing a semiconductor package shown in FIG. 2. FIG. [Figure 7] 3 is a schematic view illustrating a step of back-grinding a wafer in the method for manufacturing the semiconductor package shown in FIG. 2. FIG. [Figure 8] 3 is a schematic diagram illustrating a wafer that has been back-ground in the method for manufacturing the semiconductor package shown in FIG. 2. [Figure 9] 3 is a schematic view illustrating the wafer from which the vacuum chuck has been removed in the method for manufacturing the semiconductor package shown in FIG. 2. FIG. [Figure 10] 3A to 3C are schematic views illustrating a method of sealing a die in the method of manufacturing the semiconductor package shown in FIG. 2. [Figure 11]11 is a schematic diagram illustrating a step subsequent to FIG. 10. FIG. [Figure 12] 12 is a schematic diagram illustrating a step subsequent to FIG. 11. FIG. [Figure 13] 10A and 10B are schematic diagrams illustrating, as a comparative example, a method of sealing a die in a conventional semiconductor package manufacturing method. [Figure 14] FIG. 14 is a schematic view illustrating a step subsequent to FIG. 13. [Figure 15] 15 is a schematic diagram illustrating a step subsequent to FIG. 14. [Figure 16] 10A to 10C are schematic views illustrating a die pick-up step in the second embodiment of the present invention. [Figure 17] FIG. 17 is a schematic diagram illustrating a step subsequent to FIG. 16. [Figure 18] FIG. 18 is a schematic view illustrating a step subsequent to FIG. 17. [Figure 19] 10A and 10B are schematic diagrams illustrating a pick-up process when a conventional die is used as a comparative example. [Figure 20] FIG. 20 is a schematic diagram illustrating a step subsequent to FIG. 19. [Figure 21] FIG. 21 is a schematic diagram illustrating a step following FIG. 20. [Figure 22] 1 is a schematic diagram showing an example of manufacturing a die according to the present invention. DETAILED DESCRIPTION OF THE INVENTION
[0024] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following drawings, the same reference numerals refer to the same components, and the size of each component in the drawings may be exaggerated for clarity and convenience. Meanwhile, the embodiments described below are merely examples, and various modifications are possible from such embodiments.
[0025] In the following, the terms "upper" and "above" may include not only something that is directly above in contact with something, but also something that is above without contacting something.
[0026] The singular expression includes the plural expression unless the context clearly indicates otherwise. Furthermore, when a part "includes" or "has" a certain element, it does not mean that other elements are excluded, but that other elements may also be included, unless otherwise specified to the contrary.
[0027] Also, use of the term "said" and similar referents applies to both the singular and the plural.
[0028] Unless explicitly stated or stated to the contrary, steps constituting a method may be performed in any suitable order, and are not necessarily limited to the order of the steps described. Any use of examples or exemplary terms (e.g., etc.) is intended merely to illustrate the technical idea, and the scope of the invention is not limited by said examples or exemplary terms, except as limited by the scope of the claims.
[0029] (First embodiment) 1 is a schematic cross-sectional view illustrating the configuration of a semiconductor package according to the first embodiment. The semiconductor package 100 of this embodiment has, for example, as main components, a substrate 110, a die 120, and a sealing member 130. In the following description, the stacking direction of the substrate 110 and the die body 121 is referred to as the Z direction, the direction perpendicular to the Z direction is referred to as the X direction, and the direction perpendicular to the Z direction and the X direction is referred to as the Y direction.
[0030] <Substrate 110> The substrate 110 may be, for example, a substrate including a base material such as glass, metal, or resin. The substrate 110 may include, for example, a resin substrate on which a large-area re-distribution layer (RDL) is formed. The thickness of the substrate 110 may be, for example, 5 μm or more and 1000 μm or less.
[0031] <Die 120> The die 120 has a die body 121 and pillars 122. The die body 121 may be, for example, a die having a predetermined function. The die body 121 may be, for example, a bridge die that interconnects dies such as an ASIC (application specific integrated circuit), a memory, a processor, etc. Alternatively, the die body 121 may be a die including passive elements, active elements, an integrated circuit, a memory, etc.
[0032] The die body 121 may also have a multilayer wiring layer. Electrode pads connected to each of the multilayer wirings and a protective insulating film are formed on the top layer of this multilayer wiring layer. The electrode pads are formed by exposing a portion of the protective insulating film. The electrode pads may be made of a metal such as aluminum (Al). The electrode pads corresponding to each of the wirings in the multilayer wiring are connected to pillars 122. The die body 121 is flip-chip mounted on the substrate 110. The die body 121 is formed approximately parallel to the XY plane.
[0033] A plurality of conductive pillars 122 are provided on one surface of the die body 121 facing the substrate 110 (hereinafter referred to as the "first surface SC1"). The pillars 122 may be made of a metal such as copper (Cu). The pillars 122 may have a diameter of 30 μm and a length of 30 μm, for example. The die body 121 and the substrate 110 are bridge-connected to each other via the pillars 122. The pillars 122 may be arranged over the entire area of the first surface SC1 of the die body 121 or over a portion of the area. The number of pillars 122 provided per unit area on the first surface SC1 of the die body 121 may vary depending on the positions of the pillars 122 on the first surface SC1. That is, the arrangement interval (pitch) of the pillars 122 in a portion of the first surface SC1 may differ from the arrangement interval of the pillars 122 in another portion of the first surface SC1.
[0034] Furthermore, in this embodiment, the thickness of the die body 121 corresponding to the region on the first surface SC1 where the pillars 122 are present is thinner than the thickness of the die body 121 corresponding to the region on the first surface SC1 where the pillars 122 are not present. More specifically, the denser the number of pillars 122 in a region on the first surface SC1 of the die body 121, the thinner the thickness of the die body 121. The difference between the maximum and minimum thicknesses of the die body 121 is preferably, for example, 15 μm or more. This is because, if the difference between the maximum and minimum values is 15 μm or more, the underfill material will sufficiently penetrate into the gap between the substrate 110 and the die body 121, whereas if the difference is less than 15 μm, the underfill material may not sufficiently penetrate into the gap.
[0035] Furthermore, the thickness of the die body 121 may vary smoothly and continuously along the first surface SC1 depending on the density of the number of pillars 122 on the first surface SC1. In FIG. 1, the shape of the die body 121 in the XZ cross section is shown enlarged and exaggerated for the purpose of explanation. The actual shape of the die body 121 in the XZ cross section or YZ cross section may be an uneven shape with smooth concave and convex portions, rather than the uneven shape with sharp concave and convex portions as shown in FIG. 1 (see FIG. 22).
[0036] <Sealing member 130> The encapsulant 130 encapsulates the die 120 on the substrate 110. The encapsulant 130 includes a resin material as an underfill agent. The underfill agent may be, for example, an epoxy resin.
[0037] <Method of Manufacturing Semiconductor Package 100> The semiconductor manufacturing apparatus in this embodiment includes at least a first bonding device, a suction device, a polishing device, a second bonding device, a dicing device, a sealing device, and the like (none of which are shown). The first bonding device bonds a backgrinding tape to the wafer 123. The backgrinding tape is a tape used to protect the front surface of the wafer 123 when the back surface of the wafer 123 is polished (backgrinded). The suction device uses a vacuum chuck to suck the wafer 123 with the backgrinding tape attached and transports it to the polishing device. The polishing device uses a grinding wheel to polish the back surface of the wafer 123, thinning the wafer 123. The second bonding device bonds a dicing tape to the wafer 123. The dicing tape is a tape used to secure the wafer 123 when the wafer 123 is diced by the dicing device, i.e., when integrated circuits and the like are cut from the wafer 123 to form dices. After the backgrinding tape is peeled off, the wafer 123 is transported to the dicing device. The dicing device cuts the integrated circuits and the like from the wafer 123 to form dices. The encapsulation device encapsulates a die 120 disposed on a substrate 110 .
[0038] Hereinafter, a method for manufacturing semiconductor package 100 in which a die is face-down mounted according to this embodiment will be described in detail with reference to FIGS.
[0039] FIG. 2 is a flowchart illustrating an outline of a method for manufacturing the semiconductor package shown in FIG. 1. FIG. 3 is a schematic view illustrating a step of applying a backgrind tape to one surface of a wafer in the method for manufacturing the semiconductor package shown in FIG. 2, and FIG. 4 is a schematic view illustrating a state in which the backgrind tape has been applied to the wafer. FIG. 3 shows cross sections of a portion (solid line portion) of the wafer corresponding to the die and the remaining portion (dashed line portion) of the wafer (FIGS. 4 to 21 show only the portion of the wafer corresponding to the die). FIG. 5 is a schematic view illustrating a step of fixing a wafer to a vacuum chuck in the method for manufacturing the semiconductor package shown in FIG. 2, and FIG. 6 is a schematic view illustrating a state in which the wafer is fixed to the vacuum chuck. FIG. 7 is a schematic view illustrating a step of backgrinding a wafer in the method for manufacturing the semiconductor package shown in FIG. 2, and FIG. 8 is a schematic view illustrating a backgrinded wafer. FIG. 9 is a schematic view illustrating a wafer from which the vacuum chuck has been removed in the method for manufacturing the semiconductor package shown in FIG. 2. 10 to 12 are schematic diagrams illustrating a method for sealing a die in a method for manufacturing a semiconductor package.
[0040] As shown in FIG. 2, first, in step S101, a first bonding device bonds a backgrind tape to a wafer 123. More specifically, as shown in FIG. 3, the bonding device prepares a wafer 123 and presses and bonds a backgrind tape BGT to a first surface SC1 of the wafer 123. The initial thickness of the wafer 123 is, for example, 500 to 775 μm. As described above, pillars 122 grown by plating are formed on the wafer 123 using a known plating technique. The backgrind tape BGT is used to protect the circuits on the first surface SC1 of the wafer 123 when the back surface (second surface SC2) of the first surface SC1 of the wafer 123 is ground in step S103, which will be described later.
[0041] The backgrinding tape BGT has a substrate and an adhesive (adhesive layer) formed on the substrate. The substrate and adhesive preferably satisfy the following conditions.
[0042] The thickness of the substrate may be, for example, 25 μm or more and 300 μm or less, and the modulus of elasticity may be, for example, 0.1 GPa or more and 10 GPa or less. The softening point of the substrate may be, for example, 90° C. or more and 250° C. By thinning the substrate to about 25 μm or more and 300 μm or less and hardening the substrate (setting the modulus of elasticity to 0.1 GPa or more and 10 GPa or less), unevenness is more likely to appear on the back surface of the protrusion PRJ (see FIG. 4).
[0043] The thickness of the adhesive may be, for example, 5 μm or more and 100 μm or less, and the modulus of elasticity may be, for example, 10 kPa or more and 1000 kPa or less. By reducing the thickness of the adhesive to about 5 μm or more and 100 μm or less, unevenness on the back surface of the protrusion PRJ becomes more likely to appear.
[0044] 4, when the backgrinding tape BGT is attached to the wafer 123, the back surface of the attached surface of the backgrinding tape BGT (the surface opposite to the surface on which the adhesive layer is formed) is pushed out by the pillars 122 and protrudes, forming protrusions PRJ, which increase the surface roughness of the backgrinding tape BGT.
[0045] Next, in step S102, the vacuum chuck attracts and fixes the wafer 123. More specifically, as shown in Fig. 5, the vacuum chuck VCK attracts and fixes the wafer 123 to the vacuum chuck VCK by attracting the back grinding tape BGT attached to the first surface SC1 of the wafer 123.
[0046] 6, when the wafer 123 is attracted to and fixed on the vacuum chuck VCK, the protrusions PRJ of the back-grinding tape BGT push the back-grinding tape BGT and the pillars 122 toward the wafer 123. As a result, the wafer 123 is distorted by the stress caused by the back-grinding tape BGT and the pillars 122, forming recesses on the first surface SC1. Meanwhile, on the second surface SC2 opposite the first surface SC1, protrusions PRT corresponding to the recesses on the first surface SC1 are formed.
[0047] Next, in step S103, the grinding wheel GWL thins the wafer 123. More specifically, as shown in Fig. 7, the grinding wheel GWL thins the wafer 123 by back-grinding the second surface SC2 of the wafer 123.
[0048] 8, the wafer 123 is back-ground to remove the convex portions PRT on the second surface SC2, thereby reducing the thickness of the wafer 123.
[0049] Next, in step S104, the second bonding device bonds dicing tape to the surface opposite to the surface to which the backgrind tape is bonded of the wafer 123. The subsequent steps from bonding the dicing tape to the wafer 123 to dicing the wafer 123 are the same as conventional steps, and therefore are not illustrated.
[0050] Next, in step S105, the first joining device peels off the backgrind tape from the wafer 123. As shown in Fig. 9, the vacuum chuck VCK moves in a direction away from the wafer 123 while adsorbing the backgrind tape BGT, thereby peeling the backgrind tape BGT from the wafer 123.
[0051] Next, in step S106, the dicing device dices the wafer 123 into dies. In this specification, the diced wafer 123 is referred to as a die body 121. The die body 121 and the pillars 122 are collectively referred to as a die 120.
[0052] Next, in step S107, the die is mounted on the substrate 110. Specifically, the sealing device places the die 120 at a predetermined position on the substrate 110, as shown in FIG.
[0053] Next, in step S108, the sealing device seals the die 120. As shown in Fig. 11, the sealing device supplies an underfill agent onto the substrate 110. The underfill agent is filled onto the die 120 and into the space around the die 120. The underfill agent is also pressurized in the gap between the substrate 110 and the die body 121, causing it to permeate.
[0054] 12, the underfill material is filled into the gap between the substrate 110 and the die body 121. The sealing device cures the underfill material by, for example, heating the laminated body including the substrate 110, the die 120, and the sealing member 130 until the temperature reaches a temperature higher than the curing temperature of the underfill material. This completes the semiconductor package 100.
[0055] As described above, in this embodiment, the gap between the die body 121 and the substrate 110 in the region where the pillars 122 are present is formed to be larger than the gap between the die body 121 and the substrate 110 in the region where the pillars 122 are not present. Therefore, the gap between the die body 121 and the substrate 110 in the region where the pillars are present is wider than in a conventional die, making it easier for the underfill material to enter the gap. As a result, formation defects such as voids in the sealing member 130 are suppressed.
[0056] <Comparison with conventional technology> 13 to 15 are schematic diagrams illustrating, as a comparative example, a method of sealing a die in a conventional semiconductor package manufacturing method. In the comparative example, the die body 21 has a uniform thickness and has no irregularities on the first surface SC1. The sealing device seals the die 20. Specifically, as shown in FIGS. 13 and 14, the sealing device places the die 20 in a predetermined position on the substrate 10 and supplies an underfill agent as a sealing member 30 onto the substrate 10. The underfill agent is filled onto the die 20 and in the space around the die 20. Furthermore, the underfill agent penetrates into the gap between the substrate 10 and the die body 21 when pressurized, but because the gap between the substrate 10 and the die body 21 is narrow, there is a possibility that the underfill agent may not be filled, particularly around the pillars 22 and in the center of the gap.
[0057] 15, the sealing device heats the laminate including the substrate 10, the die 20, and the sealing member 30 until the temperature reaches a temperature higher than the curing temperature of the underfill agent, thereby curing the sealing member 30. Voids may form in the gap between the substrate 10 and the die body 21 where the underfill agent is not filled, potentially resulting in defective formation of the sealing member 30.
[0058] The semiconductor package 100 of this embodiment described above has the following unique effects.
[0059] The gap between the die body 121 and the substrate 110 in the region where the pillars 122 are present is formed to be larger than the gap between the die body 121 and the substrate 110 in the region where the pillars 122 are not present. Therefore, the gap between the die body 121 and the substrate 110 in the region where the pillars 122 are present is wider than in a conventional die, making it easier for the underfill material to enter the gap.
[0060] (Second embodiment) In the second embodiment, a die pick-up process in face-up mounting will be described. The die pick-up process in this embodiment will be described in detail below with reference to Figures 16 to 18. Figures 16 to 18 are schematic views illustrating the die pick-up process in the second embodiment.
[0061] The semiconductor manufacturing apparatus in this embodiment includes at least a die holding unit, a photographing unit, an alignment unit, a pickup unit, and the like (none of which are shown).
[0062] 16, the die holding unit holds the face-up die 220 with the dicing tape DCT attached on a stage (not shown). The photographing unit photographs the die 220 on the stage. The alignment unit acquires position information of the die 220 on the stage based on the photographed image of the die 220.
[0063] Next, as shown in FIG. 17, the pickup unit moves the collet COL to above the die 220 based on the position information of the die 220, and then lowers the collet COL to a pickup position directly above the die 220.
[0064] 18, the pickup unit applies negative pressure to the die 220 using the collet COL to adsorb and pick up the die 220. In this embodiment, the die 220 has unevenness on the first surface SC1 corresponding to the pillars 222, so that when the collet COL adsorbs the die 220, it is possible to prevent air from leaking between the collet COL and the die 220. Therefore, the pickup unit can pick up the die 220 from the side of the first surface SC1 where the pillars 222 are formed.
[0065] <Comparison with conventional technology> 19 to 21 are schematic diagrams illustrating a pickup process using a conventional die as a comparative example. In the comparative example, the die body 21 has a uniform thickness and has no irregularities on the first surface SC1.
[0066] As shown in Fig. 19, the die holding unit holds the face-up die 20 with the dicing tape DCT attached on a stage (not shown). As shown in Fig. 20, the pickup unit moves the collet COL to a pickup position directly above the die 20 based on position information of the die 20. As shown in Fig. 21, in the comparative example, the die body 21 has no unevenness on the first surface SC1, so even if negative pressure is applied to the die 20, air leaks between the collet COL and the die 20, and the collet COL cannot adsorb the die 20. Therefore, the pickup unit cannot pick up the die 20.
[0067] (Example of die manufacturing) A die was fabricated through the steps shown in Figures 3 to 12 in the manufacturing method of semiconductor package 100. Figure 22 is a schematic diagram created based on a SEM (Scanning Electron Microscope) cross-sectional photograph of the fabricated die. The maximum and minimum thicknesses of die body 121 were 56.2 μm and 37.0 μm, respectively.
[0068] Furthermore, the thickness of the die body 121 becomes thinner in regions where the number of pillars 122 on the first surface SC1 of the die body 121 is denser. The thickness of the die body 121 changes continuously according to the density of the number of pillars 122 on the first surface.
[0069] The configuration of the semiconductor package 100 described above is a main configuration for explaining the features of the above embodiment, but is not limited to the above configuration and can be modified in various ways within the scope of the claims. Furthermore, configurations of general dies and semiconductor packages are not excluded.
[0070] In addition, in the first embodiment, an example was given of forming unevenness corresponding to the pillars on the first surface SC1 of the die, but unevenness corresponding to the pillars can also be formed on the wafer before it is diced. [Explanation of symbols]
[0071] BGT back grind tape, GWL grinding wheel, VCK vacuum chuck, SC1 die first side, SC2 Second side of the die, 100 semiconductor packages, 110 board, 120,220 dies, 121,221 die body, 122,222 pillars, 123 wafers, 130 Sealing member.
Claims
1. Dai and a plurality of pillars disposed on one surface of the die; A semiconductor package, wherein the thickness of the die corresponding to an area on the one surface where the pillars are present is thinner than the thickness of the die corresponding to an area on the one surface where the pillars are not present.
2. The semiconductor package of claim 1 , wherein the thickness of the die is thinner in an area on one surface of the die where the number of the pillars is denser.
3. The semiconductor package of claim 2 , wherein the thickness of the die varies continuously along the surface depending on the density of the number of pillars on the surface.
4. 3. The semiconductor package according to claim 1, wherein the difference between the maximum and minimum thicknesses of the die is 15 [mu]m or more.
5. The semiconductor package of claim 1 , wherein the die is a bridge die that connects two dies together.
6. a substrate connected to the die by the plurality of pillars; The semiconductor package according to claim 1 , further comprising: an encapsulating member that encapsulates the die on the substrate.
7. (a) applying a backgrind tape to one surface of a wafer or die having a plurality of pillars on said one surface; (b) vacuum-suctioning and fixing the one surface of the wafer or die to a vacuum chuck; (c) thinning the wafer or die by backgrinding the other side of the wafer or die; A method for manufacturing a semiconductor package, comprising:
8. The backgrind tape has a substrate and an adhesive formed on the substrate, The thickness of the substrate is 25 μm or more and 300 μm or less. The method for manufacturing a semiconductor package according to claim 7 .
9. The backgrind tape has a substrate and an adhesive formed on the substrate, The elastic modulus of the substrate is 0.1 GPa or more and 10 GPa or less. The method for manufacturing a semiconductor package according to claim 7 .
10. The backgrind tape has a substrate and an adhesive formed on the substrate, The softening point of the substrate is 90°C or higher and 250°C or lower. The method for manufacturing a semiconductor package according to claim 7 .
11. The backgrind tape has a substrate and an adhesive formed on the substrate, The thickness of the adhesive is 5 μm or more and 100 μm or less. The method for manufacturing a semiconductor package according to claim 7 .
12. The backgrind tape has a substrate and an adhesive formed on the substrate, The method for manufacturing a semiconductor package according to claim 7 , wherein the adhesive has a modulus of elasticity of 10 kPa or more and 1000 kPa or less.
Citation Information
Patent Citations
Mold underfill composition for TSV
JP2023109410A