Substrate correction device, substrate stacking device, substrate processing system, substrate correction method, substrate processing method, and semiconductor device manufacturing method

Abstract

To provide a substrate correction device, a substrate stacking device, a substrate processing system, a substrate correction method, a substrate processing method, and a semiconductor device manufacturing method.SOLUTION: In a substrate processing system, a substrate correction device 601 includes an acquisition unit that acquires first information based on position information of a plurality of alignment marks on a substrate W measured outside, a fixed stage 332 that holds the substrate, a correction unit (actuator 612) that corrects a positional deviation between the substrate held by the fixed stage and another substrate W bonded to the substrate, and a control unit 150 that controls the correction unit based on the first information.SELECTED DRAWING: Figure 21

Description

[Technical Field]

[0001] The present invention relates to a substrate correction apparatus, a substrate stacking apparatus, a substrate processing system, a substrate correction method, a substrate processing method, and a method for manufacturing a semiconductor device. [Background technology]

[0002] Patent Document 1 describes a lithography system that includes a measurement device that measures positional information of multiple marks on a substrate, and an exposure device that performs alignment measurement to measure positional information of a selected portion of the multiple marks on the substrate and exposure. [Prior art document] [Patent Documents] [Patent Document 1] International Publication No. 2016 / 136691 [General Disclosure]

[0003] A first aspect of the present invention provides a substrate correction apparatus. The substrate correction apparatus may include an acquisition unit that acquires first information based on position information of a plurality of alignment marks on a first substrate measured externally. The substrate correction apparatus may include a stage that holds a second substrate to be bonded to the first substrate. The stage may have a deformation unit that deforms the second substrate. The deformation unit may be controlled based on the first information.

[0004] In the second aspect of the present invention, a holding member having a holding surface for holding the first substrate may be provided, and when the first substrate and the second substrate are joined, the holding of the first substrate by the holding member may be released.

[0005] In the third aspect of the present invention, the deformation portion may be capable of partially deforming the second substrate.

[0006] In the fourth aspect of the present invention, the deformation section may have a plurality of actuators arranged along the second substrate.

[0007] A fifth aspect of the present invention provides a substrate correction apparatus. The substrate correction apparatus may include an acquisition unit that acquires first information based on position information of a plurality of alignment marks on a first substrate measured externally. The substrate correction apparatus may include a measurement unit that measures position information of a plurality of alignment marks on the first substrate and outputs second information based on the position information. The substrate correction apparatus may include a stage that holds a second substrate to be bonded to the first substrate. The substrate correction apparatus may include a deformation unit that deforms the second substrate held on the stage. The substrate correction apparatus may include a control unit that controls the deformation unit based on the first information and aligns the first substrate and the second substrate based on the second information.

[0008] A sixth aspect of the present invention provides a substrate correction apparatus. The substrate correction apparatus may include an acquisition unit that acquires first information based on position information of a plurality of alignment marks on a substrate measured externally. The substrate correction apparatus may include a stage that holds the substrate. The substrate correction apparatus may include a correction unit that corrects misalignment between the substrate held on the stage and another substrate to be bonded to the substrate. The substrate correction apparatus may include a control unit that controls the correction unit based on the first information.

[0009] In a seventh aspect of the present invention, the substrate correction apparatus may further include a measurement unit that measures position information of a plurality of alignment marks on the substrate while the substrate is placed on the stage and outputs second information based on the measured position information. The control unit may align the substrate with the other substrate based on the second information.

[0010] In the eighth aspect of the present invention, the number of the plurality of alignment marks measured by the measurement unit may be smaller than the number of the plurality of alignment marks measured externally.

[0011] In a ninth aspect of the present invention, the control unit may set parameters used for aligning the substrate and the other substrate based on the second information measured by the measurement unit.

[0012] In a tenth aspect of the present invention, the first information may include information on linear and non-linear components of distortion of the substrate.

[0013] In an eleventh aspect of the present invention, the control unit may control the correction unit based on third information regarding distortion that occurs in at least one of the substrate and the other substrate when the substrate is stacked on the other substrate.

[0014] In a twelfth aspect of the present invention, the first measurement unit may measure position information of alignment marks on the substrate within a range in which positional deviation occurs due to distortion of nonlinear components occurring in at least one of the substrate and the other substrate.

[0015] In a thirteenth aspect of the present invention, the substrate may further comprise a holding member having a holding surface for holding the substrate, and the holding surface may have a convex shape with a center that rises toward the substrate.

[0016] In a fourteenth aspect of the present invention, the substrate holder may further comprise a holding member having a holding surface for holding the substrate, and the holding surface may have an area whose height varies in the circumferential direction.

[0017] In a fifteenth aspect of the present invention, the correction section may be a plurality of actuators arranged on one surface of the substrate.

[0018] A sixteenth aspect of the present invention provides a substrate processing system. The substrate processing system may include the substrate correction apparatus according to the sixth aspect. The substrate processing system may include a stacking unit that stacks the substrate on another substrate.

[0019] A seventeenth aspect of the present invention provides a substrate processing system. The substrate processing system may include a first measurement unit that measures position information of a plurality of alignment marks on a substrate placed on a first stage and outputs first information based on the measured position information. The substrate processing system may include a correction unit that corrects misalignment between the substrate held on a second stage and another substrate to be bonded to the substrate. The substrate processing system may include a control unit that controls the correction unit based on the first information.

[0020] In an eighteenth aspect of the present invention, the substrate processing system may include a second measurement unit that measures position information of a smaller number of alignment marks than the number of alignment marks measured by the first measurement unit and outputs second information based on the measured position information. The control unit may control the correction unit based on the first information and control alignment of the substrate with another substrate based on the second information.

[0021] A nineteenth aspect of the present invention provides a substrate processing system. The substrate processing system may include a first measurement unit that measures position information of a plurality of alignment marks on a substrate placed on a first stage and outputs first information based on the measured position information. The substrate processing system may include a second measurement unit that measures position information of a plurality of alignment marks on the substrate held on a second stage and outputs second information based on the position information. The substrate processing system may include a correction unit that corrects misalignment between the substrate held on the second stage and another substrate to be bonded to the substrate. The substrate processing system may include a control unit that controls the correction unit based on the first information. The number of alignment marks measured by the second measurement unit may be smaller than the number of alignment marks measured by the first measurement unit.

[0022] A twentieth aspect of the present invention provides a substrate processing system. The substrate processing system may include a measurement unit that measures position information of a plurality of alignment marks on a substrate placed on a first stage and outputs first information based on the measured position information. The substrate processing system may include a correction unit that corrects misalignment between the substrate held on a second stage and another substrate to be bonded to the substrate. The substrate processing system may include a control unit that controls the correction unit based on the first information. The measurement unit may have a reference coordinate system and measure absolute coordinates of the alignment marks in the reference coordinate system.

[0023] A 21st aspect of the present invention provides a substrate correction method. The substrate correction method may include an acquisition step of acquiring first information based on position information of a plurality of alignment marks on a substrate. The substrate correction method may include a correction step of correcting a positional misalignment between the substrate held on a stage and another substrate to be bonded to the substrate. The substrate correction method may include a control step of controlling the correction step based on the first information.

[0024] In a 22nd aspect of the present invention, the substrate correction method may further include a measurement step of measuring position information of a plurality of alignment marks on the substrate while the substrate is placed on the stage, and outputting second information based on the measured position information. In the control step, the substrate and the other substrate may be aligned based on the second information.

[0025] In a 23rd aspect of the present invention, the number of the plurality of alignment marks measured in the measuring step may be smaller than the number of the plurality of alignment marks measured externally.

[0026] A 24th aspect of the present invention provides a substrate processing method. The substrate processing method may include a measurement step of measuring positional information of a plurality of alignment marks on a substrate placed on a first stage and outputting information based on the measured positional information. The substrate processing method may include a correction step of correcting a positional misalignment between the substrate placed on a second stage and another substrate to be bonded to the substrate. The substrate processing method may include a control step of controlling the correction step based on the information acquired in the measurement step.

[0027] A 25th aspect of the present invention provides a method for manufacturing a semiconductor device. The method for manufacturing a semiconductor device may include a substrate corrected by the substrate correction method according to any one of the 21st to 23rd aspects. The method for manufacturing a semiconductor device may include an alignment step of aligning the substrate with another substrate. The method for manufacturing a semiconductor device may include a bonding step of bonding the substrate and the other substrate to form a stack. The method for manufacturing a semiconductor device may include a dicing step of separating a plurality of semiconductor devices by cutting the stack.

[0028] A 26th aspect of the present invention provides a substrate correction apparatus. The substrate correction apparatus may include an acquisition unit that acquires first information based on position information of a plurality of alignment marks on a substrate measured externally. The substrate correction apparatus may include a stage that holds the substrate. The substrate correction apparatus may include a deformation unit that deforms the substrate held on the stage. The substrate correction apparatus may include a control unit that controls the deformation unit based on the first information.

[0029] The above summary of the invention does not list all of the necessary features of the present invention, and subcombinations of these features may also constitute inventions. [Brief explanation of the drawings]

[0030] [Figure 1] 1 is a diagram schematically illustrating a configuration of a substrate processing system 1000 according to the present embodiment. [Figure 2] FIG. 2 is a schematic plan view of a wafer W in this embodiment. [Figure 3] 10 is a flowchart showing the operation of the substrate processing system 1000 in this embodiment. [Figure 4] 1 is a diagram schematically illustrating the configuration of a measurement device 100 according to the present embodiment. [Figure 5] FIG. 2 is a schematic plan view of a stacking device 200 according to the present embodiment. [Figure 6] 10 is a schematic diagram illustrating measurement of a wafer W using a part of a pre-aligner 500 in this embodiment. FIG. [Figure 7] 1 is a schematic cross-sectional view of a wafer holder WH that holds an upper wafer W of two wafers W to be stacked in a stacking device 200 according to the present embodiment. [Figure 8] 1 is a schematic cross-sectional view of a wafer holder WH that holds a lower wafer W of two wafers W to be stacked in a stacking device 200 according to the present embodiment. [Figure 9] 10 is a flowchart showing a procedure for stacking wafers W to produce a stack 230 in the stacking apparatus 200 in this embodiment. [Figure 10] 1 is a diagram showing the structure of the stacking unit 300 in this embodiment, as well as a view showing the state after a wafer holder WH holding a wafer W has been carried into the stacking unit 300. FIG. [Figure 11] 10A to 10C are diagrams illustrating the operation of the stacking unit 300 in step S15 in this embodiment. [Figure 12] 2 is a schematic cross-sectional view of a stacking portion 300 in a state where a wafer W is aligned in this embodiment. FIG. [Figure 13] 1 is a diagram showing a state of a wafer W and a wafer holder WH in an aligned state in this embodiment. [Figure 14] 1 is a schematic cross-sectional view of a stacking unit 300 in a state where stacking of wafers W has started in this embodiment. [Figure 15] 10 is a diagram showing the state of the wafer W and the wafer holder WH when stacking is started in this embodiment. FIG. [Figure 16]10 is a diagram showing the state of the wafer W and the wafer holder WH in a state where the wafer W is released from the wafer holder WH in this embodiment. FIG. [Figure 17] 10 is a flowchart showing a procedure for calculating a correction amount for a wafer W in this embodiment. [Figure 18] FIG. 9 is a diagram showing a schematic configuration of a nonlinear vector diagram 901 showing a nonlinear component of distortion of a wafer W in this embodiment. [Figure 19] FIG. 9 is a diagram showing a schematic configuration of a cubic diagram 902 for correcting nonlinear components of distortion of a wafer W in this embodiment. [Figure 20] 4 is a flowchart showing a procedure for stacking wafers W in this embodiment. [Figure 21] FIG. 6 is a schematic cross-sectional view of a substrate correction device 601 that can be used to correct a nonlinear component of distortion of a wafer W in this embodiment. [Figure 22] FIG. 6 is a schematic plan view of a substrate correction apparatus 601 according to the present embodiment, showing the layout of actuators 612 in the substrate correction apparatus 601. [Figure 23] 6A to 6C are diagrams illustrating the operation of a substrate correction apparatus 601 in this embodiment. [Figure 24] 1 is a flowchart showing a method for manufacturing a stacked semiconductor device according to the present embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0031] The present invention will be described below through embodiments of the invention. The following embodiments do not limit the scope of the invention. Not all of the combinations of features described in the embodiments are necessarily essential to the solution of the invention.

[0032] FIG. 1 is a diagram schematically illustrating the configuration of a substrate processing system 1000 according to this embodiment. As shown in FIG. 1, the substrate processing system 1000 includes a measuring device 100 and a stacking device 200 that are connected in-line. Note that being connected in-line means that different devices are connected to each other while the transport paths of wafers, which are an example of substrates, are connected. The measuring device 100 includes a measurement control unit 60. The stacking device 200 includes a stacking control unit 150 and a substrate correction device 601.

[0033] The measurement control unit 60 of the measuring device 100 and the stacking control unit 150 of the stacking device 200 are connected to each other via a local area network (LAN) 800 and communicate with each other. A control device 900 that controls the entire substrate processing system 1000 is connected to the LAN 800. The control device 900 has a storage unit 910.

[0034] The substrate processing system 1000 in this embodiment is an apparatus for stacking wafers while correcting misalignment caused by distortion occurring in the wafers.

[0035] 2 is a schematic plan view of a wafer W stacked in the substrate processing system 1000. The wafer W has a notch 214, a plurality of circuit regions 216, and a plurality of alignment marks 218. The wafer W is, for example, a 300 mm wafer, and a plurality of, for example, I (for example, I=98) circuit regions 216 are formed on the wafer W in a matrix arrangement.

[0036] The circuit regions 216 are periodically arranged on the surface of the wafer W in the plane direction of the wafer W. In each of the circuit regions 216, semiconductor devices, wiring, protective films, etc. are formed by photolithography or the like. In the circuit regions 216, structures including connecting portions such as pads and bumps that serve as connecting terminals when electrically connecting the wafer W to another wafer W, a lead frame, etc. are also arranged.

[0037] The alignment marks 218 are an example of structures formed on the surface of the wafer W, and are arranged so as to overlap the scribe lines 212 arranged between the circuit regions 216. The alignment marks 218 are used as indicators when aligning this wafer W with another wafer W to be stacked. The alignment marks 218 include, for example, alignment marks for search alignment and alignment marks for fine alignment. In this embodiment, two-dimensional marks are used as the alignment marks 218.

[0038] Next, the types of distortion occurring in the wafer W will be described. The distortion occurring in the wafer W includes initial distortion occurring before the wafers W are stacked, and strain during stacking occurring when the wafers W are stacked. The initial distortion is distortion occurring due to processing of the wafers W, such as forming a structure on the surface of the wafer W, and the strain during stacking is distortion occurring during the stacking process in the stacking device 200. The distortion occurring in the wafer W is a displacement of the structure on the wafer W from the design coordinates, i.e., the design position. The distortion occurring in the wafer W includes planar distortion and three-dimensional distortion.

[0039] Plane distortion is distortion that occurs in a direction along the stacking surface of the wafer W, and includes linear distortion in which the displaced position of each structure on the wafer W relative to its design position is expressed by a linear transformation, and nonlinear distortion other than linear distortion that cannot be expressed by a linear transformation.

[0040] Linear distortion includes magnification distortion, in which the displacement increases at a constant rate from the center in the radial direction. Magnification distortion is a value obtained by dividing the amount of deviation from the design value at distance X from the center of the wafer W by X, and is expressed in ppm. Magnification distortion includes isotropic magnification distortion. Isotropic magnification distortion is distortion in which the X and Y components of a displacement vector from the design position are equal when the coordinates X and Y are the same, i.e., the magnification in the X direction and the magnification in the Y direction are equal. Linear distortion includes anisotropic magnification distortion, which is distortion in which the X and Y components of a displacement vector from the design position are different, i.e., the magnification in the X direction and the magnification in the Y direction are different.

[0041] Linear distortion includes orthogonal distortion. Orthogonal distortion is distortion in which, when the center of the wafer W is set as the origin and the X-axis and Y-axis are orthogonal to each other, the structure is displaced parallel to the X-axis from its design position, with the amount increasing the further the structure is from the origin in the Y-axis direction. The amount of displacement is equal in each of multiple regions parallel to the X-axis and crossing the Y-axis, and the absolute value of the displacement amount increases with distance from the X-axis. Furthermore, orthogonal distortion is such that the direction of displacement on the positive side of the Y-axis is opposite to the direction of displacement on the negative side of the Y-axis.

[0042] The three-dimensional distortion of the wafer W is a displacement in a direction other than the direction along the stacking surface of the wafer W, i.e., a direction intersecting the stacking surface. The three-dimensional distortion includes curvature that occurs in the whole or part of the wafer W due to the whole or part of the wafer W being bent. Here, bending of the wafer W means that the wafer W changes to a shape in which the surface of the wafer W includes points that do not lie on a plane specified by three points on the wafer W. The three-dimensional distortion also includes linear distortion and nonlinear distortion.

[0043] Furthermore, curvature refers to distortion of the surface of the wafer W, forming a curved surface, and includes, for example, warpage of the wafer W. In this embodiment, warpage refers to distortion remaining in the wafer W when the influence of gravity is eliminated. Distortion of the wafer W resulting from the addition of the influence of gravity to the warpage is called deflection. Note that warpage of the wafer W includes global warpage in which the entire wafer W bends with a generally uniform curvature, and local warpage in which a portion of the wafer W bends due to a change in local curvature.

[0044] Nonlinear distortion occurs due to the interaction of a wide variety of factors, primarily the crystalline anisotropy of the silicon single crystal substrate and the manufacturing process of the wafer W. During the manufacturing process of the wafer W, multiple structures are formed on the wafer W. For example, multiple circuit regions 216, scribe lines 212, and multiple alignment marks 218 are formed on the wafer W as structures. Each of the multiple circuit regions 216 also includes wiring formed by photolithography or other techniques, a protective film, and connecting portions such as pads and bumps that serve as connection terminals when electrically connecting the wafer W to other wafers W, lead frames, etc. The structure and arrangement of these structures, i.e., the configuration of the structures, affect the in-plane rigidity distribution and in-plane stress distribution of the wafer W. If unevenness occurs in the rigidity distribution or in-plane stress distribution, the wafer W will undergo localized curvature.

[0045] The configuration of these structures may differ for each wafer W or for each type of wafer W, such as a logic wafer, a CIS wafer, or a memory wafer. Furthermore, even if the manufacturing process is the same, the configuration of the structures may differ slightly depending on the manufacturing equipment, and therefore the configuration of these structures may differ for each manufacturing lot of wafers W. Thus, the configuration of the multiple structures formed on a wafer W may differ for each wafer W, each type of wafer W, each manufacturing lot of wafers W, or each manufacturing process of wafers W. Therefore, the in-plane rigidity distribution of the wafer W also differs. Therefore, the curvature of the wafer W that occurs during the manufacturing process and stacking process also differs.

[0046] FIG. 3 is a flowchart showing the operation of the substrate processing system 1000 in this embodiment. In step S01, the measuring device 100 measures the initial distortion occurring in the stacked wafers W before stacking. In step S02, it is determined whether information on distortion during stacking occurring during stacking of the wafers W is held. If information on distortion during stacking of the wafers W is not held (NO in step S02), the process proceeds to step S03, where the distortion during stacking of the wafers W is measured. After step S03 is completed, the process proceeds to step S04, where the correction amount for the wafers W is calculated. If information on distortion during stacking of the wafers W is held in step S02 of FIG. 3 (YES in step S02), the process proceeds to step S04 without passing through step S03. After step S04 is completed, the process proceeds to step S05, where the wafers W are stacked. Hereinafter, details of step S01, in which the measuring device 100 measures the initial distortion of the wafers W, will be described with reference to FIGS. 4 to 8.

[0047] 4 is a diagram schematically illustrating the configuration of a measurement apparatus 100 according to this embodiment. The measurement apparatus 100 is an apparatus that measures a plurality of alignment marks 218 on the wafer W to measure distortion of the wafer W. The measurement apparatus 100 includes a measurement unit 101 having a mark detection system that detects the alignment marks 218 on the wafer W, a wafer slider 102 that holds the wafer W and is capable of minute movement relative to a stage on which the wafer W is placed, a drive system 103 that drives the wafer slider 102, and a measurement control unit 104 that acquires measurement information from the measurement unit 101 and calculates position information of a plurality of marks on the wafer W while controlling the drive of the wafer slider 102 by the drive system 103.

[0048] The measurement unit 101 detects, for example, one alignment mark 218 for each of a plurality of regions divided on the wafer using a mark detection system. In this embodiment, the measurement unit 101 detects a first number of alignment marks 218. The first number may be, for example, the number of all alignment marks 218 provided on the wafer W. That is, the measurement unit 101 may measure the positions of all alignment marks 218 provided on the wafer W. A plurality of measurement units 101 may be provided. The measurement control unit 104 calculates position information of each alignment mark 218 based on measurement information by the measurement unit 101. The measurement control unit 104 performs an EGA (Enhanced Global Alignment) calculation using the position information of the alignment marks 218 measured by the measurement unit 101. EGA calculation means a statistical calculation that, after measuring the alignment mark 218, calculates the parameters of a model formula that expresses the correction amount of the position coordinates of the alignment mark 218 using statistical calculations such as the least squares method based on information about the difference between the design value and the actual measured value of the position coordinates of the alignment mark 218.

[0049] By calculating the results of the EGA calculation using statistical calculations such as the least squares method, it is possible to accurately calculate the linear and nonlinear components of the initial distortion of the wafer W. The measurement control unit 104 transmits information on the calculated linear and nonlinear components of the initial distortion of the wafer W to the control device 900. Note that the measurement control unit 104 may transmit only information on the nonlinear component of the initial distortion of the wafer W to the control device 900.

[0050] 5 to 16, the measurement of strain during stacking of wafers W in step S03 of FIG. 3 will be described in detail. FIG. 5 shows a schematic plan view of a stacking device 200 in this embodiment. The stacking device 200 is an apparatus that stacks one wafer W on another wafer W to form a stack 230, and includes a housing 110, wafer cassettes 120 and 130 disposed outside the housing 110, a stacking control unit 150, a transfer unit 140 disposed inside the housing 110, a stacking unit 300, a holder stocker 400, a pre-aligner 500, and an activation device 600.

[0051] One wafer cassette 120 accommodates wafers W to be stacked. The other wafer cassette 130 accommodates a plurality of stacks 230 formed by stacking wafers W. By using the wafer cassette 120, a plurality of wafers W can be loaded into the stacking device 200 all at once. Also, by using the wafer cassette 130, a plurality of stacks 230 can be unloaded from the stacking device 200 all at once.

[0052] The transfer unit 140 transfers the wafer W and wafer holder WH from the measuring device 100 into the inside of the stacking device 200. A plurality of wafer holders WH are stored in the holder stocker 400. The transfer unit 140 transfers and sets the wafer holder WH selected from the holder stocker 400 into the inside of the stacking unit 300 in advance, and then transfers the wafer W to be stacked into the inside of the stacking unit 300. The transfer unit 140 may transfer the wafer holder WH holding the wafer W into the inside of the stacking unit 300.

[0053] The wafer holder WH is an example of a wafer holding member, and is a highly rigid disk-shaped member that is slightly larger than the wafer W. Each wafer holder WH has a wafer suction function such as an electrostatic chuck or a vacuum chuck, and holds each wafer W inside the stacking device 200.

[0054] 6 is a schematic diagram illustrating measurement of the wafer W using a part of the pre-aligner 500. The pre-aligner 500 includes a rotation drive unit 510, an edge detection unit 520, and a distance measurement unit 530.

[0055] The rotation driver 510 rotates the loaded wafer W while supporting the vicinity of its center against gravity. The edge detector 520 continuously detects the position of the outer circumferential edge of the rotating wafer W. In this way, the pre-aligner 500 detects the amount of eccentricity of the wafer W with respect to the center of rotation, and detects the geometric center of each wafer W. The pre-aligner 500 also detects notches and the like provided on the wafer W to detect the orientation of the wafer W.

[0056] The pre-aligner 500 measures the deformation of the wafer W using a distance measurement unit 530. The distance measurement unit 530 detects the distance to the bottom surface of the rotating wafer W in the figure from a direction parallel to the rotation axis. This makes it possible to continuously detect deformation in the thickness direction of the wafer W in the circumferential direction based on fluctuations in the detected distance. Furthermore, by scanning the distance measurement unit 530 in the radial direction of the wafer W, it is possible to measure the state of deformation of the entire wafer W.

[0057] At this stage, a wafer W for which deformation greater than a predetermined range is detected may be determined to be unsuitable for stacking. A wafer W determined to be unsuitable for stacking may be transported to a predetermined position, for example, a specific storage position in the wafer cassette 130, and removed from the list of wafers to be stacked.

[0058] The decision to exclude a certain wafer W from stacking may be made, for example, based on whether the deformation amount of the wafer W exceeds a predetermined range. Here, "exceeding the predetermined range" means, for example, that the wafer W is deformed to such an extent that the suction force of the wafer holder WH, which is a holding member, is not sufficient to bring the wafer W into close contact with the holding surface of the wafer holder WH.

[0059] Furthermore, "exceeding the predetermined range" refers to, for example, a case where the deformation amount of the wafer W to be measured exceeds the limit of the amount of correction by the correction described below. Furthermore, "exceeding the predetermined range" refers to, for example, a case where the combination of the wafer W to be measured and the wafer W to be stacked on it has already been determined, and the misalignment due to the difference in the amount of deformation of the two wafers W has reached a size that cannot be eliminated by the correction described below. The correction amount is the amount of deformation to be caused in at least one of the two wafers W so that the misalignment between the two wafers W stacked on top of each other is equal to or less than a threshold value.

[0060] The stacking control unit 150 is configured with a processor such as a CPU, FPGA, or ASIC, and memories such as a ROM or RAM, and performs overall control by linking each unit of the stacking device 200 based on a control program. The stacking control unit 150 also receives instructions from an external user and sets manufacturing conditions for manufacturing the stack 230. The stacking control unit 150 also has a user interface that displays the operating status of the stacking device 200 to the outside.

[0061] The activation device 600 generates plasma that activates the upper surfaces of the wafers W. The wafers W activated by the activation device 600 are stacked by contacting or approaching each other. Note that stacking includes the wafers W autonomously adsorbing and bonding to each other. After activating the upper surfaces of the wafers W with plasma, the activation device 600 cleans the surfaces of the wafers W with a chemical solution such as ammonia, alcohol, or hydrochloric acid, or pure water.

[0062] The stacking unit 300 has a pair of opposing stages, each holding a wafer W, and after aligning the wafers W held on the stages with each other, the wafers W are brought into contact with each other and stacked to form a stack 230.

[0063] The wafers W stacked in the stacking apparatus 200 may be wafers W on which elements, circuits, terminals, etc. are formed, as well as unprocessed silicon wafers, compound semiconductor wafers, glass wafers, etc. The combination of wafers W to be stacked may be a circuit wafer and an unprocessed wafer, or two unprocessed wafers. Furthermore, the wafers W to be stacked may themselves be a stack formed by stacking multiple wafers.

[0064] 7 is a schematic cross-sectional view of a wafer holder WH that holds the upper wafer W of two wafers W to be stacked in the stacking device 200. The wafer holder WH has a flat holding surface 225 and has a function of attracting and holding the wafer W, such as an electrostatic chuck or a vacuum chuck. The wafer holder WH may have a holding surface that is convex with a raised center or a holding surface that is partially uneven.

[0065] As will be described later, one wafer W1 is released from the hold by the wafer holder WH when it is stacked on the other wafer W. In this embodiment, one wafer W is held by a wafer holder WH having a flat holding surface 225.

[0066] 8 is a schematic cross-sectional view of a wafer holder WH that holds the lower wafer W of two wafers W stacked in the stacking device 200. In the illustrated example, the holding surface 225 of the wafer holder WH has a convex shape with a raised center.

[0067] The wafer holder WH has a function of attracting and holding the wafer W, such as an electrostatic chuck or a vacuum chuck. Therefore, the wafer W held by the wafer holder WH is curved along the shape of the holding surface 225, and is deformed convexly with the center of the wafer W as the apex.

[0068] The linear distortion and nonlinear distortion occurring in the wafer W as described above can be corrected by controlling the shape of the wafer holder WH that holds the wafer W. For example, for a wafer W that has a distortion of the magnification component, which is a linear distortion, a correction can be made by changing the magnification of the wafer W by using a wafer holder WH having a holding surface 225 that is a linearly curved surface that is uniformly convex in the circumferential direction, as shown in FIG.

[0069] Furthermore, by using a wafer holder WH having a holding surface 225 that is partially concave or convex in the circumferential direction, it is possible to correct nonlinear components of the distortion components that occur in the wafer W. In order to correct the nonlinear components, the wafer holder WH may have, for example, a concave shape near the center, or a shape in which the curvature near the center is smaller than that of other regions.

[0070] FIG. 9 is a flowchart showing the procedure (S03) for measuring distortion of wafers W during stacking in this embodiment.

[0071] The stacking control unit 150 selects a wafer holder WH from the holder stocker 400, and transports and sets the selected wafer holder WH into the stacking unit 300 in advance using the transport unit 140 (step S11). Next, the stacking control unit 150 measures deformation of the wafer W using the distance measurement unit 530 of the pre-aligner 500 (step S12). Next, the stacking control unit 150 activates the stacking surfaces of the wafers W to be stacked and cleans the stacking surfaces of the wafers W (step S13). The stacking control unit 150 scans the surfaces of the wafers W with plasma generated by the activation device 600. This cleans the surfaces of the wafers W and increases their chemical activity. Therefore, the wafers W autonomously attract and stack by coming into contact with or approaching each other.

[0072] In addition to the method of exposing the wafer W to plasma, the wafer W can also be activated by sputter etching using an inert gas, an ion beam, a fast atom beam, or mechanical processing such as polishing. When an ion beam or a fast atom beam is used, the laminated portion 300 can be generated under reduced pressure. Furthermore, the wafer W can also be activated by ultraviolet irradiation, an ozone asher, or the like. Furthermore, the wafer W may be activated by chemically cleaning the surface thereof using, for example, a liquid or gaseous etchant.

[0073] Next, the wafers W to be stacked on top of each other are carried into the stacking section 300 (step S14).

[0074] 10 is a diagram showing the structure of the stacking unit 300 in this embodiment, as well as the state after the wafer W has been carried into the stacking unit 300. The stacking unit 300 in the stacking device 200 includes a frame 310, a fixed stage 322, and a movable stage 332 as a second stage.

[0075] The frame 310 has a bottom plate 312 and a top plate 316 that are parallel to the floor surface 301 , and a plurality of support columns 314 that are perpendicular to the floor surface 301 .

[0076] Fixed stage 322, which is fixed facing downward to the lower surface of top plate 316 in the drawing, has a holding function such as a vacuum chuck or an electrostatic chuck. As shown in the drawing, fixed stage 322 holds wafer W together with wafer holder WH having a flat holding surface 225.

[0077] A microscope 324 is fixed to the lower surface of the top plate 316. The microscope 324 can observe the upper surface of the wafer W held on a moving stage 332 arranged opposite the fixed stage 322.

[0078] The moving stage 332 is mounted on a Y-direction drive unit 333 that moves in the direction indicated by the arrow Y in the figure. The Y-direction drive unit 333 is placed on an X-direction drive unit 331 disposed on the bottom plate 312. The X-direction drive unit 331 moves in the direction indicated by the arrow X in the figure, parallel to the bottom plate 312. This allows the moving stage 332 to move two-dimensionally in the X and Y directions. The moving stage 332 shown in the figure holds a wafer W that is held by a wafer holder WH. Although not shown, the wafer holder WH has a curved holding surface 225, and the wafer W is also held in a curved state along the holding surface 225.

[0079] Alternatively, the fixed stage 322 or the movable stage 332 on which the wafer W is placed in the stacking unit 300 of the stacking device 200 may directly hold the wafer W without using the wafer holder WH. In this case, the fixed stage 322 or the movable stage 332 serves as a holding member.

[0080] The moving stage 332 is raised and lowered relative to the Y direction driving unit 333 by a Z direction driving unit 335 which is raised and lowered in the direction indicated by the arrow Z.

[0081] The amount of movement of the movable stage 332 by the X-direction drive unit 331, the Y-direction drive unit 333, and the Z-direction drive unit 335 is precisely measured using an interferometer or the like. The X-direction drive unit 331 and the Y-direction drive unit 333 may also have a two-stage configuration consisting of a coarse movement unit and a fine movement unit. This allows for both high-precision alignment and high throughput, and allows the movement of the wafer W mounted on the movable stage 332 to be stacked at high speed without reducing control accuracy.

[0082] The Y-direction driving unit 333 further has a microscope 334 mounted on each side of the moving stage 332. The microscope 334 can observe the lower surface of the wafer W held on the fixed stage 322 and facing downward.

[0083] The stacking unit 300 may further include a rotation drive unit that rotates the movable stage 332 around a rotation axis perpendicular to the bottom plate 312, and a swing drive unit that swings the movable stage 332. This makes it possible to adjust the tilt angle of the movable stage 332, make the movable stage 332 parallel to the fixed stage 322, and rotate the wafer W held by the movable stage 332, thereby improving the alignment accuracy of the wafer W.

[0084] The stacking control unit 150 calibrates the microscopes 324, 334 relative to each other in advance by mutually aligning the focus of the microscopes 324, 334 and by having them observe a common index. This allows the relative positions of the pair of microscopes 324, 334 in the stacking unit 300 to be measured. Next, referring again to Figure 9, in the stacking unit 300, the alignment marks 218 formed on each of the wafers W are detected (step S15).

[0085] FIG. 11 is a diagram illustrating the operation of the stacking unit 300 in step S15. In step S15, the stacking control unit 150 operates the X-direction driving unit 331 and the Y-direction driving unit 333 to detect a second number of alignment marks 218 from among the alignment marks 218 provided on each wafer W using the microscopes 324 and 334. The second number may be, for example, 10 or less. In this embodiment, the linear distortion and nonlinear distortion of the wafer W can be determined in advance based on the position information of the alignment marks 218 measured by the measuring device 100. Therefore, in step S15, it is sufficient to secure only the number of measurement points necessary to determine the position of the wafer W relative to the coordinate system of the stacking unit 30, i.e., the shift and rotation. Therefore, the second number of alignment marks 218 of the wafer W measured in step S15 may be less than the first number of alignment marks 218 of the wafer W measured by the measuring device 100.

[0086] In this way, by detecting position information of the alignment marks 218 of the wafer W using the microscopes 324, 334 whose relative positions are known, the stacking control unit 150 calculates the relative position of the wafer W and calculates the movement amount of the moving stage 332 (step S16). That is, in the stacking unit 300, the movement amount of the moving stage 332 is calculated so that corresponding circuit regions 216 overlap each other. Note that, if the moving stage 332 is tilted and adjustment of the tilt angle is necessary, the stacking control unit 150 also calculates the adjustment amount of the tilt angle. As described above, the microscopes 324, 334 in this embodiment function as a second measurement unit that outputs second information indicating the movement amount of the moving stage 332 for aligning the wafer W.

[0087] The amount of movement of the moving stage 332 calculated in step S16 can be calculated by performing EGA calculations that measure the positions of the alignment marks 218 on the wafer W at multiple points and perform statistical processing.

[0088] Referring again to Fig. 9, next, the stacking control unit 150 moves the moving stage 332 based on the movement amount calculated in step S15 to align the wafer W (step S17), as shown in Fig. 12. Fig. 13 is a diagram showing the state of the wafer W and wafer holder WH in an aligned state.

[0089] Referring again to Fig. 9, next, as shown in Fig. 14, the stacking control unit 150 causes the Z-direction driving unit 335 to raise the moving stage 332, bringing the aligned wafers W into contact with each other, and starts stacking the wafers W (step S18). Fig. 15 is a diagram showing the state of the wafers W and wafer holder WH when stacking has started.

[0090] 15, at the time of contact in step S18, one flat wafer W and the other curved wafer W are in partial contact with each other. As a result, a starting point of stacking where the wafers W are partially stacked is formed approximately in the center of the wafer W, as shown by the dotted line C in the figure.

[0091] 16, after a portion of the wafer W comes into contact, the stacking control unit 150 releases the wafer W from the wafer holder WH on the fixed stage 322. The wafer W, now freed, at the upper side in the drawing autonomously expands the stacked area due to its own weight and the intermolecular forces of the activated wafer W itself, and eventually the entire surface is stacked. In this way, a stack 230 of wafers W is formed in the stacking unit 300.

[0092] In the stack 230, the wafer W on the lower side in the drawing continues to be held by the wafer holder WH with the curved holding surface 225 throughout the stacking process from step S18 onwards. Therefore, since the wafer W is stacked in a corrected state by the wafer holder WH, differences in magnification between the wafers W, etc., are corrected.

[0093] In addition, during the process of expanding the contact area of ​​the wafer W as described above, the stacking control unit 150 may release part or all of the wafer W from the wafer holder WH. Also, the fixed stage 322 may release the wafer holder WH from its hold. When the wafer W is released from its hold, during the process of expanding the contact area, the lower wafer W lifts up from the wafer holder WH and curves due to the pulling force from the upper wafer W. As a result, the shape of the surface of the lower wafer W changes so that it stretches, and the difference in the amount of stretch with respect to the surface of the upper wafer W becomes smaller by the amount of this stretch.

[0094] This suppresses misalignment caused by different amounts of deformation between the two wafers W. The amount of lift of the wafer W from the wafer holder WH can be adjusted by adjusting the holding force of the wafer holder WH. Therefore, if a difference occurs between the correction amount preset for the multiple wafer holders WH and the actually required correction amount, the difference can be compensated for by adjusting the holding force of the wafer holder WH.

[0095] Furthermore, the stacking of wafers W may proceed by releasing the wafers W held by the movable stage 332 without releasing the wafers W held by the fixed stage 322. Furthermore, the wafers W may be stacked by moving the fixed stage 322 and the movable stage 332 closer to each other while the wafers W are held by both the fixed stage 322 and the movable stage 332.

[0096] After the stack 230 is formed using the wafers W, the microscopes 324 and 334 detect the alignment marks 218 formed on the wafers W that form the stack 230, and acquire positional information about the alignment marks 218. By performing EGA calculations based on the acquired positional information about the alignment marks 218 on the wafers W, the linear and nonlinear components of the strain caused by stacking of the wafers W can be calculated (step S19). The positional information about the alignment marks 218 observed at this time includes the initial strain component of the wafers W and the strain caused by stacking components. Therefore, by subtracting the initial strain component of the wafers W measured by the measuring device 100, the strain caused by stacking of the wafers W can be calculated. The stacking control unit 150 transmits the calculated information about the linear and nonlinear components of the strain caused by stacking of the wafers W to the control device 900 as third information. This completes the step of measuring the strain caused by stacking of the wafers W in step S03 of FIG. 3.

[0097] 3 is completed, the process proceeds to step S04 to calculate the correction amount for the wafer W. Hereinafter, the step of calculating the correction amount for the wafer W in step S04 of FIG. 3 will be described in detail with reference to FIGS. 17 to 19.

[0098] 17 is a flowchart showing a procedure for calculating the correction amount for the wafer W in this embodiment. FIG. 17 shows details of step S04 in FIG. 3. In step S21 in FIG. 17, the control device 900 receives information on the linear and nonlinear components of the initial distortion of the wafer W from the measurement control unit 60. Subsequently, in step S22, the control device 900 receives information on the linear and nonlinear components of the distortion of the wafer W during stacking from the stacking control unit 150.

[0099] Next, in step S23, the control device 900 generates information that integrates the nonlinear components of the distortion of the wafer W, using information on the nonlinear components of the initial distortion of the wafer W, information on the nonlinear components of the distortion during stacking, and design information that indicates the size of the wafer W, etc. Fig. 18 is a nonlinear vector diagram 901 that schematically shows information that integrates the nonlinear components of the distortion of the wafer W in this embodiment. Fig. 18 shows that distortion of a magnitude corresponding to the length of the arrow occurs in the wafer W in the direction of the arrow.

[0100] Next, in step S24, the control device 900 generates shape information indicating the shape of the wafer W to be corrected based on the information integrating the nonlinear components. Fig. 19 is a three-dimensional diagram 902 that schematically shows shape information for correcting the nonlinear components of the distortion of the wafer W in this embodiment. The three-dimensional diagram 902 shows the magnitude of distortion in the Z direction of the wafer W (the direction perpendicular to the plane of the wafer W).

[0101] Next, in step S25, the control device 900 calculates, based on the generated shape information, the drive amount of the actuator to be driven to correct the nonlinear component of the distortion of the wafer W. Details of the operation of the actuator to correct the nonlinear component of the distortion of the wafer W will be described later. This completes the step of calculating the correction amount of the wafer W, step S04 in FIG. 3. Next, the process proceeds to step S05 in FIG. 3, a step of stacking wafers W.

[0102] Fig. 20 is a flowchart showing the procedure for stacking wafers W in this embodiment. Fig. 20 shows details of step S05 in Fig. 3, which is the step of stacking wafers W. Steps S12 to S18 in Fig. 20 are the same as steps S12 to S18 in Fig. 9, and therefore will not be described.

[0103] 20, the stacking control unit 150 selects a wafer holder WH from the holder stocker 400 and transports the selected wafer holder WH into the stacking unit 300 in advance using the transport unit 140. The wafer holder WH selected at this time is selected for the purpose of correcting misalignment between wafers W due to linear distortion of the wafers W. The stacking control unit 150 receives information on the linear component of the initial distortion of the wafers W measured in step S01 and information on the linear component of the distortion during stacking from the control device 900, and selects a wafer holder WH from the holder stocker 400 that is suitable for correcting the linear component of the distortion of the wafers W based on this information. This allows the wafer holder WH to correct the linear component of the distortion of the wafers W.

[0104] 20, the actuators are driven based on the actuator drive amounts calculated in step S25 of Fig. 17 to correct the nonlinear components of the distortion of the wafer W. Details of the correction of the nonlinear components of the distortion of the wafer W will be described below with reference to Fig. 21 to Fig. 23. Step S32 of Fig. 20 is performed between steps S14 and S15 in Fig. 9.

[0105] 21 is a schematic cross-sectional view of a substrate correction device 601 that can be used to correct the nonlinear component of distortion of a wafer W in this embodiment. The substrate correction device 601 is incorporated into the moving stage 332 of the stacking unit 300 and corrects one of the wafers W in the stacking device 200. The substrate correction device 601 deforms the wafer W by adsorbing the wafer W with an adsorption surface shaped to deform the wafer W, thereby correcting the nonlinear component of distortion of the wafer W.

[0106] The substrate correction device 601 has a base 611, a plurality of actuators 612, and an adsorption unit 613. The base 611 supports the adsorption unit 613 via the actuators 612. The adsorption unit 613 has an adsorption mechanism such as a vacuum chuck or an electrostatic chuck, and forms the upper surface of the moving stage 332. The adsorption unit 613 adsorbs and holds the loaded wafer holder WH. Although not shown in FIG. 21, the wafer holder WH that holds the lower wafer W has a convex shape as shown in FIG. 8.

[0107] A plurality of actuators 612 are arranged below the suction portion 613 along the lower surface of the suction portion 613. The plurality of actuators 612 are individually driven by a working fluid supplied from the outside through a pump 615 and a valve 616 under the control of the stacking control unit 150. As a result, the plurality of actuators 612 expand and contract by different amounts in the thickness direction of the moving stage 332, i.e., the stacking direction of the wafers W, thereby raising or lowering the region of the suction portion 613 to which they are bonded.

[0108] Each of the actuators 612 is coupled to an adsorption unit 613 via a link. The center of the adsorption unit 613 is coupled to the base 611 by a support 614. When the actuators 612 operate in the substrate correction device 601, the surface of the adsorption unit 613 is displaced in the thickness direction for each region to which the actuator 612 is coupled.

[0109] 22 is a schematic plan view of a substrate correction apparatus 601 according to this embodiment, showing the layout of actuators 612 in the substrate correction apparatus 601. In the substrate correction apparatus 601, the actuators 612 are arranged radially around a support 614. The arrangement of the actuators 612 can also be considered as concentric circles around the support 614. The arrangement of the actuators 612 is not limited to that shown in the figure, and may be arranged in a lattice pattern, a spiral pattern, or the like. This allows the wafer W to be corrected by changing its shape in a concentric, radial, spiral, or other pattern.

[0110] 23 is a diagram illustrating the operation of the substrate correction apparatus 601 in this embodiment. As shown in the figure, the actuators 612 can be expanded or contracted by individually opening or closing the valves 616, thereby changing the shape of the suction portion 613. Therefore, when the suction portion 613 is suctioning the wafer holder WH and the wafer holder WH is holding the wafer W, the shapes of the wafer holder WH and the wafer W can be changed and curved by changing the shape of the suction portion 613.

[0111] 22, the actuators 612 can be considered to be arranged concentrically, that is, in the circumferential direction of the movable stage 332. Therefore, as shown by dotted line M in Fig. 22, the actuators 612 for each circumference can be grouped together and the drive amount can be increased as the actuators get closer to the periphery, thereby causing the center of the surface of the suction portion 613 to bulge and changing the shape into a spherical, parabolic, cylindrical, or other shape. Alternatively, the actuators 612 shown by dotted line N in Fig. 22 can be grouped together and the drive amount can be controlled so that the drive amount is increased as the actuators get closer to the periphery.

[0112] As a result, the wafer W can be curved by changing its shape to conform to a spherical surface, a parabolic surface, etc., just as in the case where the wafer W is held by a curved wafer holder WH. Therefore, in the substrate correction device 601, compared to the center B of the wafer W in the thickness direction, which is indicated by the dashed-dotted line in FIG. 23, the shape of the upper surface of the wafer W in the drawing is changed so that the surface of the wafer W expands in the planar direction.

[0113] Also, the shape of the lower surface of the wafer W in the figure is changed so that the surface of the wafer W shrinks in the planar direction. Furthermore, by individually controlling the amounts of expansion and contraction of the multiple actuators 612, the shape of the wafer W can be changed and curved into other shapes such as a cylindrical surface, as well as a nonlinear shape including multiple concave and convex portions. As described above, by individually controlling the drive amounts of the actuators 612 of the substrate correction device 601, the nonlinear component of the distortion of the wafer W can be corrected. This completes the step of correcting the nonlinear component of the distortion of the wafer W in step S31 of FIG. 20. The wafers W whose nonlinear components of the distortion have been corrected are then stacked (S18).

[0114] As described above, according to the substrate processing system 1000 of this embodiment, before the wafer W is loaded into the stacking device 200, the initial distortion of the wafer W is measured by measuring the first number of alignment marks 218 on the wafer W. Then, based on the information on the initial distortion of the wafer W and the information on the distortion during stacking, a correction amount for the distortion of the wafer W or a misalignment between the wafers W caused by the distortion is calculated, and the actuator 612 corrects the distortion of the wafer W or the misalignment between the wafers W caused by the distortion. This eliminates the need to measure the distortion of the wafer W in the stacking device 200, and the stacking device 200 only needs to measure a second number of alignment marks 218, which is fewer than the first number, to align the wafer W, thereby reducing the number of alignment marks 218 on the wafer W to be measured in the stacking device 200.

[0115] In the above embodiment, the linear component of the distortion of the wafer W is corrected using the wafer holder WH, and the nonlinear component of the distortion of the wafer W is corrected by controlling the actuator 612. However, this is not limiting, and both the linear and nonlinear components of the distortion of the wafer W may be corrected using the wafer holder WH. In this case, the nonlinear component of the distortion of the wafer W that cannot be fully corrected by the wafer holder WH may be supplementally corrected using the actuator 612 of the substrate correction device 601. Furthermore, the linear component of the distortion of the wafer W may be supplementally corrected using the actuator 612 of the substrate correction device 601. The actuator 612 and the wafer holder WH each function as a correction unit that corrects misalignment between the wafers W and also as a deformation unit that deforms the wafer W.

[0116] In the above embodiment, the strain of the wafer W during stacking was measured by observing the alignment marks 218 of the wafers W in the stack 230 that was actually stacked using the microscopes 324, 334. However, this is not limiting, and the strain of the wafer W during stacking may be estimated by simulation based on information about the initial strain of the wafer measured by the measurement device 100. This makes it possible to omit the process of actually measuring the strain of the wafers W during stacking. Furthermore, when correcting the strain during the first bonding of the wafers W (bonding for measuring the strain during stacking), the correction may be made by referring to accumulated past data.

[0117] In the above embodiment, the measuring apparatus 100 measures a first number of alignment marks 218. However, for example, it may be possible to measure only alignment marks 218 on the wafer W in a range where nonlinear distortion occurs. The range where nonlinear distortion occurs on the wafer W may be calculated in advance and learned by machine learning. Alternatively, it may be possible to measure only alignment marks 218 in areas on the wafer W where nonlinear distortion is poorly reproducible (areas on the wafer W that need to be checked each time). Furthermore, the alignment marks 218 to be measured may be selected depending on the correction capability of the substrate correction apparatus 601 (e.g., shapes that can be corrected using an actuator). The alignment marks 218 to be measured may be determined depending on the number and positions of the actuators 612 and suction units 613 of the substrate correction apparatus 601. In this case, the alignment marks 218 to be measured may be determined taking into consideration the centers and surrounding areas of the actuators 612 and suction units 613, the areas affected by the driving of the actuators 612, etc. Furthermore, the number of alignment marks 218 to be measured may be thinned out evenly across the wafer.

[0118] In the above embodiment, the correction amount for the distortion of the wafer W is calculated based on information on the initial distortion of the wafer W and information on the distortion during stacking, but this is not limiting and the correction amount for the distortion of the wafer W may be calculated based only on information on the initial distortion of the wafer W. Also, the correction amount for the distortion of the wafer W may be calculated using an expected amount of fluctuation in the distortion during stacking (the amount of fluctuation in the distortion during stacking is predicted from prior manufacturing information on the wafer W and the amount of warpage of the wafer W). Also, the component of the distortion to be corrected may be an orthogonal component (linear component) in addition to a magnification nonlinear component.

[0119] In the above embodiment, the stacking control unit 150 may take into consideration the shape of the wafer holder WH selected in step S31 of FIG. 20 when calculating the movement amount of the moving stage 332.

[0120] In the above embodiment, various orders may be used for driving the substrate correction device 601, loading the wafer holder WH into the stacking device 200, loading the wafer W into the stacking device 200, and suction and holding by the substrate correction device 601. For example, the following order may be used. 1. For example, the wafer holder WH may be held by suction on the substrate correction device 601 while the suction surface of the substrate correction device 601 is flat, and then the substrate correction device 601 is driven to create a shape for the suction surface, thereby deforming the wafer holder WH due to the frictional force between the suction surface of the substrate correction device 601 and the wafer holder WH. Thereafter, the wafer W may be loaded into the stacking device 200, and the wafer W may be deformed to match the shape of the wafer holder WH by suctioning the wafer W with the wafer holder WH. 2. The substrate correction device 601 may be driven in advance to create the shape of the suction surface, and then the wafer holder WH may be loaded into the stacking device 200 and held by suction, thereby deforming the wafer holder WH to match the shape of the suction surface. Finally, the wafer W may be loaded and suctioned by the wafer holder WH, thereby deforming the wafer W to match the shape of the wafer holder WH. 3. After the substrate correction device 601 has been driven in advance to create the shape of the suction surface, the wafer W held by the wafer holder WH can be simultaneously carried into the stacking device 200, and the wafer holder WH can be held by suction with the substrate correction device 601, thereby deforming both the wafer W and the wafer holder WH to conform to the shape of the suction surface. 4. With the suction surface of the substrate correction device 601 flat, the wafer W chucked by the wafer holder WH may be carried into the stacking device 200, the wafer holder WH may be held by suction by the substrate correction device 601, and the substrate correction device 601 may then be driven to create a shape for the suction surface, thereby deforming the wafer W and the wafer holder WH due to the frictional force between the suction surface of the substrate correction device 601 and the wafer holder WH, and correcting the shapes of the wafer holder WH and the wafer W. In the above steps 3 and 4, after the wafer W and the wafer holder WH are deformed, the wafer W may be released from the suction of the wafer holder WH, thereby temporarily releasing the deformation of the wafer W and allowing the wafer W to be re-suctioned to the wafer holder WH. Furthermore, as in 2. and 3. above, when the wafer W is loaded into the stacking device 200 after the shape of the chucking surface of the substrate correction device 601 has been created, EGA calculations may be performed based on information regarding the nonlinear components of the distortion of the wafer W measured by the measurement device 100 and position information of the multiple alignment marks 218 on the wafer W measured within the stacking device 200.

[0121] In the above embodiment, when a plurality of wafers W are bonded successively as a first set, a second set, and so on to an Xth set, the method for calculating the correction amount for distortion of the wafers W includes the following methods (1) to (3). (1) First, the first set is stacked, and the correction amount for the distortion of the second set of wafers W is calculated from the nonlinear component of the distortion during stacking of the first set of wafers W obtained by the stacking device 200 and the nonlinear component of the initial distortion of the second set of wafers W obtained by the measurement device 100. (2) The correction amount for the distortion of the first set of wafers W is calculated from the nonlinear component of the initial distortion of the first set of wafers W obtained by the measuring device 100 and the nonlinear component of the distortion of the wafers W during stacking estimated from past data of wafers of the same or similar type. (3) The nonlinear component of the distortion of the wafers W during stacking is estimated from the nonlinear and linear components of the initial distortion of the first set of wafers W obtained by the measuring device 100, and the correction amount for the distortion of the first set of wafers W is calculated using both.

[0122] 24 is a flowchart showing a method for manufacturing a stacked semiconductor device. This manufacturing method includes steps S100, S102, S104, S106, and S108. The semiconductor device is, for example, an electronic component such as an imaging element such as a back-illuminated imaging element or a memory such as a flash memory. The semiconductor device is, for example, a chip component (electronic component) obtained by dicing a stack in which a pixel substrate on which pixels are arranged and a processing substrate on which processing circuits such as an amplifier circuit, an image processing circuit, and a control circuit are arranged are stacked. Note that the stacked semiconductor device is not limited to a back-illuminated imaging element, and may be, for example, an arithmetic processing element obtained by stacking a memory substrate and a logic substrate and dicing them.

[0123] S100: This is a wafer preparation process in which a predetermined number of wafers W on which a plurality of semiconductor devices are formed are prepared. In this process, as explained in relation to Fig. 2, a semiconductor exposure apparatus is used to reduce and project a circuit pattern on a mask onto a wafer coated with resist, and after the resist is developed, etching and impurity thermal diffusion processes are performed to obtain wafers W on which circuit elements are formed.

[0124] S102: This is a correction step for correcting distortion of at least one of the overlapping wafers W or misalignment between the wafers W caused by the distortion. In this step, the corrections described with reference to Figs. 3 to 23 are performed. For example, steps S01 to S04 in Fig. 3, S21 to S25 in Fig. 17, and S31 to S32 in Fig. 20 are performed.

[0125] S104: This is an alignment step for aligning the wafers W to be superimposed on each other. In this step, the alignment described with reference to Fig. 3 to Fig. 23 is performed. For example, steps S05 in Fig. 3 and S15 to S17 in Fig. 20 are performed.

[0126] S106: A stacking step of stacking aligned wafers W. In this step, the stacking described with reference to FIGS. 3 to 23 is performed to obtain a stack 230. For example, steps S05 in FIG. 3 and S18 in FIG. 20 are performed. The stack 230 is transported from the stacking device 200 to an electrode bonding implementation unit (not shown) by a robot arm.

[0127] S108: This is an electrode bonding process for bonding the connection terminals on the stacked wafers together. In this process, the aligned and stacked stack 230 is carried into an annealing furnace and heat-treated. By applying a predetermined amount of heat for a predetermined period of time, the connection terminals (metal bumps and pads, and metal bumps and metal bumps) on the wafers W are bonded. Note that steps S106 and S108 may be collectively referred to as the bonding process. Furthermore, if sufficient bonding strength and electrical connection can be obtained in step S106, step S108 may be omitted.

[0128] The above-described correction step (S012), alignment step (S104), stacking step (S106), and electrode bonding step (S108) are repeated the same number of times as the number of wafers W to be stacked (the predetermined number described above). In some cases, after the stacking and bonding, a step of thinning the stack 230 by grinding, polishing, or etching may be added. In this way, the stack 230 formed by stacking the predetermined number of wafers is obtained.

[0129] S110: A dicing process is performed to separate and cut individual semiconductor devices from a stack 230 formed by stacking a predetermined number of wafers W. In this process, the wafers W, which have been stacked and bonded at the wafer level, are cut along scribe lines 212 to be cut into chips for each circuit region 216. Cutting is usually performed using a dicing saw method that uses a dicing blade to cut, a method that uses a laser beam to melt and split the wafer surface, or a method that uses a diamond cutter to draw a cutting line and split the wafer. Among these, the dicing saw method is particularly preferred as a method for separating the stack 230 into chips. The individual chips cut out in this manner are stacked semiconductor devices.

[0130] In the above embodiment, the measuring apparatus 100 may have a reference coordinate system and measure the absolute coordinates of the alignment mark 218 on the wafer W in the reference coordinate system. The measuring apparatus 100 may detect the absolute coordinates of other marks on the wafer W in addition to the alignment mark 218. When the measurement target is a stack, the measuring apparatus 100 may measure the absolute coordinates of the alignment mark 218 of at least one wafer W among the multiple wafers W that make up the stack, and calculate the position information. The measuring apparatus 100 may send the calculated position information of the alignment mark 218 to an exposure apparatus that exposes a pattern onto at least one wafer W of the stack, and the exposure apparatus may perform an exposure process based on the received position information. Information regarding the measurement results of the stack measured by the measuring device 100 may be sent from the measuring device 100 to an exposure device that exposes a pattern onto at least one of the other multiple wafers W to be subsequently bonded, and the exposure device may perform an exposure process on the wafer W based on the sent information. As described above, whether the measurement information of the stack is fed forward to an exposure apparatus that performs further exposure processing on the stack, or fed back to an exposure apparatus that performs exposure processing on the wafer W to be bonded thereafter, the information sent from the measurement apparatus 100 to the exposure apparatus is not limited to position information of the alignment mark 218, but may also include at least one of information on the positional deviation of the mark from the design value, information on the positional deviation between the multiple stacked wafers W, and information on distortion, warping, etc. of at least one of the multiple stacked wafers W.

[0131] Although the present invention has been described above using embodiments, the technical scope of the present invention is not limited to the scope described in the above embodiments. It will be apparent to those skilled in the art that various modifications and improvements can be made to the above embodiments. It is clear from the claims that such modifications and improvements can also be included within the technical scope of the present invention.

[0132] It should be noted that the execution order of each process, such as operations, procedures, steps, and stages, in the devices, systems, programs, and methods shown in the claims, specifications, and drawings is not specifically stated as "before," "prior to," etc., and that the processes can be performed in any order unless the output of a previous process is used in a subsequent process. Even if the operational flow in the claims, specifications, and drawings is described using "first," "next," etc. for convenience, this does not mean that the processes must be performed in this order. [Other possible items] [Item 1] an acquisition unit that acquires first information based on position information of a plurality of alignment marks on the first substrate measured externally; a stage that holds a second substrate to be bonded to the first substrate; Equipped with the stage has a deformation portion that deforms the second substrate, The deformation unit is controlled based on the first information. Substrate correction device. [Item 2] a holding member having a holding surface for holding the first substrate; 2. The substrate correction device according to item 1, wherein the holding of the first substrate by the holding member is released when the first substrate and the second substrate are joined. [Item 3] 3. The substrate correction device according to item 1 or 2, wherein the deformation unit is capable of partially deforming the second substrate. [Item 4] 4. The substrate correction device according to any one of items 1 to 3, wherein the deformation unit has a plurality of actuators arranged along the second substrate. [Item 5] an acquisition unit that acquires first information based on position information of a plurality of alignment marks on the first substrate measured externally; a measurement unit that measures position information of a plurality of alignment marks on the first substrate and outputs second information based on the position information; a stage that holds a second substrate to be bonded to the first substrate; a deformation unit that deforms the second substrate held by the stage; a control unit that controls the deformation unit based on the first information and aligns the first substrate and the second substrate based on the second information; A substrate correction device comprising: [Item 6] an acquisition unit that acquires first information based on position information of a plurality of alignment marks on a substrate measured externally; a stage for holding the substrate; a correction unit that corrects a positional deviation between the substrate held by the stage and another substrate to be bonded to the substrate; a control unit that controls the correction unit based on the first information; A substrate correction device comprising: [Item 7] a measurement unit that measures position information of a plurality of alignment marks on the substrate while the substrate is placed on the stage and outputs second information based on the measured position information; 7. The substrate correction apparatus according to item 6, wherein the control unit aligns the substrate with the other substrate based on the second information. [Item 8] 8. The substrate correction apparatus according to item 7, wherein the number of the alignment marks measured by the measurement unit is less than the number of the alignment marks measured externally. [Item 9] 9. The substrate correction apparatus according to item 7 or 8, wherein the control unit sets parameters used for aligning the substrate and the other substrate based on the second information measured by the measurement unit. [Item 10] 10. The substrate correction apparatus according to any one of items 6 to 9, wherein the first information includes information on linear and nonlinear components of distortion of the substrate. [Item 11] 11. The substrate correction device according to any one of items 6 to 10, wherein the control unit controls the correction unit based on third information regarding distortion that occurs in at least one of the substrate and the other substrate when the substrate is stacked on the other substrate. [Item 12] 12. The substrate correction device according to any one of items 6 to 11, wherein the first measurement unit measures position information of alignment marks on the substrate within a range in which misalignment occurs due to distortion of nonlinear components occurring on at least one of the substrate and the other substrate. [Item 13] a holding member having a holding surface for holding the substrate; 13. The substrate correction device according to any one of items 10 to 12, wherein the holding surface has a convex shape with a center that is raised toward the substrate. [Item 14] a holding member having a holding surface for holding the substrate; 14. The substrate correction device according to any one of items 10 to 13, wherein the holding surface has an area with a different height in the circumferential direction. [Item 15] 15. The substrate correction device according to any one of items 6 to 14, wherein the correction unit is a plurality of actuators arranged on one surface of the substrate. [Item 16] A substrate correction device according to any one of items 6 to 15, a lamination unit that laminates the substrate onto another substrate; A substrate laminating device comprising: [Item 17] a first measurement unit that measures position information of a plurality of alignment marks on a substrate placed on a first stage and outputs first information based on the measured position information; a correction unit that corrects misalignment between the substrate held on the second stage and another substrate to be bonded to the substrate; a control unit that controls the correction unit based on the first information; A substrate processing system comprising: [Item 18] a second measurement unit that measures position information of a smaller number of alignment marks than the number of alignment marks measured by the first measurement unit, and outputs second information based on the measured position information; Item 18. The substrate processing system according to item 17, wherein the control unit controls the correction unit based on the first information and controls alignment of the substrate with another substrate based on the second information. [Item 19] a first measurement unit that measures position information of a plurality of alignment marks on a substrate placed on a first stage and outputs first information based on the measured position information; a second measurement unit that measures position information of a plurality of alignment marks on the substrate held on a second stage and outputs second information based on the position information; a correction unit that corrects a positional misalignment between the substrate held by the second stage and another substrate to be bonded to the substrate; a control unit that controls the correction unit based on the first information; Equipped with A substrate processing system, wherein the number of the alignment marks measured by the second measurement unit is smaller than the number of the alignment marks measured by the first measurement unit. [Item 20] a measurement unit that measures position information of a plurality of alignment marks on a substrate placed on a first stage and outputs first information based on the measured position information; a correction unit that corrects misalignment between the substrate held on the second stage and another substrate to be bonded to the substrate; a control unit that controls the correction unit based on the first information; Equipped with The measurement unit has a reference coordinate system and measures absolute coordinates of the alignment mark in the reference coordinate system. [Item 21] an acquisition step of acquiring first information based on position information of a plurality of alignment marks on the substrate; a correction step of correcting a positional deviation between the substrate held on the stage and another substrate to be bonded to the substrate; a control step of controlling the correction step based on the first information; A substrate correction method comprising: [Item 22] a measurement step of measuring position information of a plurality of alignment marks on the substrate while the substrate is placed on the stage, and outputting second information based on the measured position information; 22. The substrate correction method according to item 21, wherein in the control step, the substrate and the other substrate are aligned based on the second information. [Item 23] Item 23. The substrate correction method according to item 22, wherein the number of the plurality of alignment marks measured in the measurement step is less than the number of the plurality of alignment marks measured externally. [Item 24] a measurement stage in which position information of a plurality of alignment marks on a substrate placed on a first stage is measured and information based on the measured position information is output; a correction step of correcting a positional misalignment between the substrate placed on the second stage and another substrate to be bonded to the substrate; a control step of controlling the correction step based on the information acquired in the measurement step; A substrate processing method comprising: [Item 25] An alignment step of aligning the substrate corrected by the substrate correction method according to any one of items 21 to 23 with another substrate; a bonding step of bonding the substrate and the other substrate to each other to form a laminate; a dicing step of cutting the stack to separate the semiconductor devices into a plurality of semiconductor devices; A method for manufacturing a semiconductor device comprising: [Item 26] an acquisition unit that acquires first information based on position information of a plurality of alignment marks on a substrate measured externally; a stage for holding the substrate; a deformation unit that deforms the substrate held by the stage; a control unit that controls the deformation unit based on the first information; A substrate correction device comprising: [Explanation of symbols]

[0133] 60 measurement control section, 100 measurement device, 101 measurement unit, 102 wafer slider, 103 drive system, 104 measurement control section, 110 housing, 120, 130 wafer cassette, 140 transport section, 150 control section, 200 stacking device, 212 scribe line, 214 notch, 216 circuit area, 218 alignment mark, 225 holding surface, 230 stacked body, 300 stacking section, 301 floor surface, 310 frame body, 312 bottom plate, 314 support column, 316 top plate, 322 fixed stage, 324, 334 microscope, 331 X-direction drive section, 332 moving stage, 333 Y-direction drive section, 335 Z-direction drive section, 400 holder stocker, 500 pre-aligner, 600 activation device, 601 Correction device, 611 base, 612 actuator, 613 suction part, 614 support, 615 pump, 616 valve, 1000 substrate processing system, W wafer, WH wafer holder

Claims

1. Observing a plurality of first structures included in a first substrate and a plurality of second structures included in a second substrate in a first stack in which a first substrate and a second substrate are stacked; outputting information based on the observation results of the plurality of first structures and the plurality of second structures as setting information for setting processing conditions for a first target substrate to be processed by a processing device; the information based on the observation results includes information on positions of the first structures or the second structures in a coordinate system of an observation device that observes the first structures and the second structures; method.

2. Observing a plurality of first structures included in a first substrate and a plurality of second structures included in a second substrate in a first stack in which a first substrate and a second substrate are stacked; outputting information based on the observation results of the plurality of first structures and the plurality of second structures as setting information for setting processing conditions for a first target substrate to be processed by a processing device; the setting information includes information about a nonlinear component of distortion of the first substrate; method.

3. calculating information about the nonlinear component by statistical calculation based on information based on the observation results; The method of claim 2.

4. Observing a plurality of first structures included in a first substrate and a plurality of second structures included in a second substrate in a first stack in which a first substrate and a second substrate are stacked; outputting information based on the observation results of the plurality of first structures and the plurality of second structures as setting information for setting processing conditions for a first target substrate to be processed by a processing device; the number of the plurality of observed first structures and the number of the plurality of observed second structures are each greater than 10; method.

5. the processing device observes a plurality of structures included in the first target substrate; the number of the plurality of structures observed in the processing device is 10 or less; The method of claim 4.

6. The outputting includes outputting information based on the observation results as setting information for setting processing conditions for the first target substrate to be processed by the processing apparatus and a second target substrate different from the first target substrate to be processed by the processing apparatus. The method according to any one of claims 1 to 5.

7. Observing a plurality of first structures included in a first substrate and a plurality of second structures included in a second substrate in a first stack in which a first substrate and a second substrate are stacked; processing a first target substrate based on setting information based on information based on observation results of the plurality of first structures and the plurality of second structures; the setting information includes information on positions of the plurality of first structures in a coordinate system of an observation device that observes the plurality of first structures; the setting information includes information on a nonlinear component of distortion of the first substrate; or the number of the plurality of first structures to be observed is greater than 10. method.

8. processing a second target substrate different from the first target substrate based on the setting information; The method of claim 7.

9. Observing a plurality of first structures included in a first substrate; outputting information based on the observation results of the plurality of first structures as setting information for setting formation conditions of a first target stack formed by a stacking device; the setting information includes information on positions of the plurality of first structures in a coordinate system of an observation device that observes the plurality of first structures; the setting information includes information on a nonlinear component of distortion of the first substrate; or the number of the plurality of first structures is greater than 10. method.

10. The outputting includes outputting information based on the observation results as setting information for setting formation conditions of the first target stack formed by the stacking device and a second target stack different from the first target stack formed by the stacking device.

10. The method of claim 9.

11. observing the plurality of first structures includes observing the plurality of first structures included in the first substrate in a first stack in which the first substrate and the second substrate are stacked, The first target stack is a stack different from the first stack.

11. The method according to claim 9 or 10.

12. Observing a plurality of first structures included in a first substrate; outputting information based on the observation results of the plurality of first structures as setting information for setting processing conditions for a first target substrate to be processed by a processing device; the first target substrate is a substrate to be bonded to the first substrate; method.

13. the setting information includes information on positions of the plurality of first structures in a coordinate system of an observation device that observes the first structures; The method of claim 12.

14. the setting information includes information about a nonlinear component of distortion of the first substrate, or the number of the plurality of first structures is greater than 10; The method of claim 12.

15. the processing device is an exposure device; The method according to any one of claims 1 to 5 and 12 to 14.

16. the processing device deforms the first target substrate based on the setting information; The method according to any one of claims 1 to 5 and 12 to 14.

17. the setting information includes information on positional deviations between the plurality of first structures and the corresponding plurality of second structures; The method according to any one of claims 1 to 5 and 7 to 10.

18. the plurality of first structures include alignment marks, wiring, protective films, or connection terminals; The method according to any one of claims 1 to 5, 7 to 10, and 12 to 14.

19. each of the plurality of first structures is located on a scribe line of the first substrate; The method according to any one of claims 1 to 5, 7 to 10, and 12 to 14.

20. an observation device configured to observe a plurality of first structures included in a first substrate and a plurality of second structures included in a second substrate in a first stack in which a first substrate and a second substrate are stacked, the observation device outputs information based on observation results of the plurality of first structures and the plurality of second structures as setting information for setting processing conditions for a first target substrate to be processed by a processing device; the information based on the observation results includes information on positions of the plurality of first structures or positions of the plurality of second structures in a coordinate system of the observation device; Device.

21. the setting information includes information about a nonlinear component of distortion of the first substrate, or the number of the plurality of first structures is greater than 10; 21. The apparatus of claim 20.

22. the first target substrate is a substrate to be bonded to the first substrate; 21. The apparatus of claim 20.

23. the processing device is an exposure device; 23. Apparatus according to any one of claims 20 to 22.

24. the processing device deforms the first target substrate based on the setting information; 23. Apparatus according to any one of claims 20 to 22.

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