Infrared sensor

Abstract

An infrared sensor having a high resistance is provided. [Solution] The infrared sensor comprises a compound semiconductor stack in which a plurality of compound semiconductor layers are formed, the compound semiconductor stack comprising an active layer which is a compound semiconductor containing In and Sb, a barrier layer which is a compound semiconductor having a band gap larger than that of the active layer, and a third layer which is a compound semiconductor, the active layer, the barrier layer, and the third layer being in contact with each other in this order, the lattice mismatch between the active layer and the third layer being greater than 0.1%, and the thickness of the barrier layer being greater than or equal to the critical thickness h with respect to the third layer. c3 The critical thickness h for the active layer is larger than cA Smaller than.

Description

[Technical Field]

[0001] The present disclosure relates to infrared sensors. [Background technology]

[0002] In particular, infrared radiation in the short-wavelength to mid- and long-wavelength infrared range (referred to as the mid-infrared range) with wavelengths of approximately 2 to 15 μm has been used in non-dispersive infrared absorption gas concentration measurement devices because gas molecules exhibit specific absorption bands. Among these, infrared sensors are important components that greatly influence the key performance of gas concentration measurement devices, such as their detection resolution and power consumption, and infrared sensors with high light-receiving sensitivity at desired wavelengths have been sought. Known examples of infrared sensors include infrared photodiodes (PDs), pyroelectric sensors, and thermopiles. Among these, infrared PDs using semiconductors, in particular, have been used in gas concentration measurement devices because their material design allows them to receive light in the desired wavelength range.

[0003] Improving the crystallinity of compound semiconductor layers is important in fabricating high-performance infrared photodiodes. In particular, improvements have been made to the underlayer, which is stacked closer to the substrate than the active layer, to reduce the threading dislocation density, which affects the active layer. Patent Document 1 discloses that the threading dislocation density can be reduced by introducing an AlInSb underlayer with a different lattice constant and a thickness below the critical thickness. Patent Document 2 discloses that the threading dislocation density can be reduced by increasing the thickness of an InAs intermediate layer between the InAsSb underlayer and the InAsSb active layer to a thickness above the critical thickness. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 2019-114772 [Patent Document 2] Japanese Patent Application Laid-Open No. 2015-090901 Summary of the Invention [Problem to be solved by the invention]

[0005] In general, it is preferable to match the lattice constants of the materials of the active layer and the underlayer or upper layer. However, it is known that in mixed crystal systems containing elements with different lattice constants, the crystallinity deteriorates as the mixed crystal ratio increases. Therefore, even if there is a difference between the lattice constants of the underlayer or upper layer and the active layer, reducing the mixed crystal ratio of the underlayer or upper layer may result in improved performance. However, in such cases, lattice mismatch between the active layer and the underlayer or upper layer introduces crystal defects at the interface between the active layer and the underlayer or upper layer, increasing the defect-induced carrier recombination rate near the interface and reducing the device resistance.

[0006] The present disclosure has been made in view of the above circumstances, and has an object to provide an infrared sensor having high resistance. [Means for solving the problem]

[0007] An infrared sensor according to an embodiment of the present disclosure includes: a compound semiconductor stack having a plurality of compound semiconductor layers formed thereon; The compound semiconductor stack is an active layer that is a compound semiconductor containing In and Sb; a barrier layer made of a compound semiconductor having a band gap larger than that of the active layer; a third layer that is a compound semiconductor; the active layer, the barrier layer, and the third layer are in contact with each other in this order, the lattice mismatch between the active layer and the third layer is greater than 0.1%, The thickness of the barrier layer is The critical thickness h for the third layer c3 Bigger, The critical thickness h for the active layer cA Smaller than. [Effects of the Invention]

[0008] According to the present disclosure, by selecting an appropriate film thickness for the barrier layer, an infrared sensor having high resistance can be provided. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a diagram showing the structure of an infrared sensor according to an embodiment. [Figure 2] FIG. 2 is a diagram showing the structure of an infrared sensor according to an embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. However, the drawings are schematic. For example, thickness, length, etc. may differ from actual values. The technical concept of the present disclosure may be modified in various ways within the technical scope defined by the claims. The following embodiments do not limit the scope of the claims. Furthermore, not all of the combinations of features described in the embodiments are necessarily required.

[0011] <Infrared sensor> The infrared sensor according to this embodiment is a photodiode sensitive to infrared light with a wavelength of 2 μm to 15 μm. The infrared sensor includes a semiconductor substrate and a compound semiconductor stack in which a plurality of compound semiconductor layers are formed. The compound semiconductor stack has a structure in which an active layer is sandwiched between a p-type semiconductor layer and an n-type semiconductor layer. At least a portion of the compound semiconductor stack corresponds to a thin film stack portion described below.

[0012] <Substrate> The infrared sensor according to this embodiment includes a semiconductor substrate. Examples include a Si substrate, an InP substrate, and a GaAs substrate. Since an InSb substrate has a lattice constant similar to that of the active layer material described below, it can be used as a substrate for forming a low-defect, high-performance infrared sensor. Furthermore, in the long-wavelength infrared region, free electron absorption by electrons or holes becomes significant, so a semiconductor substrate with a low impurity concentration (carrier concentration) is preferred. Furthermore, by using a semi-insulating GaAs substrate, the free electron absorption can be suppressed and thin-film laminates formed on the substrate can be electrically insulated and isolated. Therefore, by connecting multiple thin-film laminates in series using electrode wiring, an infrared sensor with high resistance can be obtained.

[0013] <Thin film lamination section> The infrared sensor according to this embodiment includes a thin film stack formed on a substrate. The thin film stack has at least a portion where an active layer, a barrier layer, and a third layer are in contact with each other in this order. With regard to the stacking order of the active layer, the barrier layer, and the third layer, either the active layer or the third layer may be closer to the substrate.

[0014] FIG. 1 shows the structure of a substrate and a thin film stacked portion according to one embodiment. In this embodiment, the thin film stacked portion has a structure in which an underlayer, an active layer, a barrier layer, and a third layer are stacked in this order on a substrate. The underlayer is a layer stacked closer to the substrate than the active layer. The underlayer is doped n-type, and the barrier layer and the third layer are doped p-type. Conversely, the doping combination may be such that the underlayer is p-type and the barrier layer and the third layer are n-type. Furthermore, the underlayer and the third layer may include an np tunnel junction.

[0015] FIG. 2 shows the structure of a substrate and a thin film stack in another embodiment. In this embodiment, the thin film stack has a structure in which a third layer, a barrier layer, an active layer, and an upper layer are stacked in this order on a substrate. The upper layer is stacked on the side farther from the substrate than the active layer. The third layer is doped n-type, and the barrier layer and the upper layer are doped p-type. Conversely, the doping combination may be such that the base layer is p-type and the barrier layer and the third layer are n-type. Alternatively, the base layer and the third layer may include an np tunnel junction.

[0016] For p-type doping, Zn, Si, Be, Ge, etc. may be used. For n-type doping, Si, Sn, Te, etc. may be used.

[0017] <Active layer> The active layer generates electron-hole carrier pairs by receiving part or all of the infrared light with a wavelength of 2 μm to 15 μm. The active layer is a compound semiconductor containing at least In and Sb. The active layer may be a compound semiconductor containing In, As, and Sb. For example, a thin film containing AlGaInAsSb (0≦Al+Ga≦0.5, 0≦As≦1) can be used as the active layer. Here, the notation in parentheses indicates the composition ratio of the homologous elements in the mixed crystal. (0≦Al+Ga≦0.5) indicates that in AlGaInAsSb, the composition ratio of Al and Ga combined among the Group 3 elements is 0 to 0.5. Furthermore, (0≦As≦1) indicates that in AlGaInAsSb, the composition ratio of As among the Group 5 elements is 0 to 1, i.e., any ratio is possible. Hereinafter, composition ratios will be indicated by similar notations. The active layer may be a thin film of a single composition made of the material in question, or may be a laminate of different materials. The active layer may be a stack including a quantum well structure using semiconductor layers with multiple bandgaps, and may be p-doped to suppress an increase in the effective bandgap due to thermal excitation of carriers.

[0018] By using InAsSb (0 < As < 0.36) as the constituent material of the active layer, sensitivity to infrared rays with a longer wavelength can be realized at a relatively small mixed crystal ratio compared to the case of using InSb. In this composition range, sensitivity to infrared rays up to a maximum of 15 μm can be obtained.

[0019] Furthermore, by further narrowing the As composition range, better crystal growth becomes possible, so InAsSb (0 < As < 0.20) may be used. In this composition range, sensitivity to infrared rays up to a maximum of 12 μm can be obtained.

[0020] InAsSb (0.8 < As ≦ 1) may be used as the constituent material of the active layer. In this composition range, sensitivity to infrared rays in the range of 3.4 μm to 5.7 μm can be obtained.

[0021] By using AlInSb (0 < Al < 0.2) as the constituent material of the active layer, sensitivity limited to infrared rays with a shorter wavelength and a high diode resistance can be realized at a relatively small mixed crystal ratio compared to the case of using InSb. In this composition range, sensitivity to infrared rays in the range of 2.3 μm to 7.3 μm can be obtained.

[0022] <The third layer> The third layer may be an underlying layer laminated on the substrate side with respect to the active layer and the barrier layer, or may be an upper layer laminated on the side away from the substrate.

[0023] To reduce the mixed crystal ratio of the third layer, the lattice mismatch f A-3 between the third layer and the active layer may be 0.1% or more. f A-3 is determined by Equation (1) using the lattice constant a3 of the third layer and the lattice constant a A of the active layer.

[0024]

Equation

[0025] The lattice constant of each layer is the lattice constant in the case of no lattice strain, which is determined using the material composition and Vegard's law. Also, when the material composition is unknown, the lattice constant in the in-plane direction and the lattice constant in the direction perpendicular to the plane can be obtained respectively by the inverse lattice mapping method using X-ray diffraction, and can also be determined as their average value.

[0026] The bandgap of the third layer is preferably larger than that of the active layer in order to suppress infrared absorption outside the active layer. Also, the bandgap of the third layer is preferably smaller than that of the barrier layer in order to increase the electrical conductivity. Further, in order to increase the electrical conductivity, the third layer may be doped with p-type or n-type.

[0027] As a constituent material of the third layer, for example, AlGaInAsSb (0 ≤ Al + Ga ≤ 0.5, 0 ≤ As ≤ 1) may be used. When InAsSb (0 < As < 0.36) is used for the active layer, using AlInSb (0 ≤ Al < 0.3) for the third layer makes the bandgap larger than that of the active layer. Also, further using InSb for the third layer can minimize the crystal mixing ratio.

[0028] <Barrier layer> The barrier layer is laminated sandwiched between the active layer and the third layer. The barrier layer has a larger bandgap than the active layer. The barrier layer contains, as a constituent material, for example, AlGaInAsSb (0 ≤ Al + Ga ≤ 0.5, 0 ≤ As ≤ 0.5). Also, the barrier layer may be doped with p-type or n-type as described above.

[0029] As a constituent material of the barrier layer, particularly AlInSb (0.1 < Al < 0.4) may be used. Among AlGaInAsSb (0 ≤ Al + Ga ≤ 0.5, 0 ≤ As ≤ 1), this material can achieve a large bandgap with a smaller crystal mixing ratio.

[0030] Conventionally, when the film thickness of a certain layer is made larger than the critical film thickness, many crystal defects occur at the layer interface, and it is known that many of the crystal defects are localized at a distance of about the critical film thickness from the interface (for example, Patent Document 2).

[0031] Critical thickness of the barrier layer for the third layer h c3 is the lattice constant a3 of the third layer and the lattice constant a of the barrier layer B and the Poisson's ratio ν of the barrier layer, which can be calculated using equation (2). B-3 is calculated using equation (4) described later.

[0032]

number

[0033] Similarly, the lattice constant a of the active layer A and the lattice constant a of the barrier layer B and the Poisson's ratio ν of the barrier layer, the critical thickness h of the barrier layer relative to the active layer is cA is calculated by equation (3). Here, f B-A is calculated using equation (5) described below.

[0034]

number

[0035] The thickness of the barrier layer is h c3 Bigger, h cA By making the thickness smaller, there are fewer defects at the interface between the active layer and the barrier layer, and there are many defects at the interface between the third layer and the barrier layer. At this time, the defects that occur at the interface between the third layer and the barrier layer are located at a distance of h c3 However, when the barrier layer thickness is h c3 Since it is larger, it is possible to suppress the influence of defects occurring at the interface between the third layer and the barrier layer on the active layer.

[0036] For example, if the barrier layer is Al 0.18 In 0.82 Sb, i.e., a Bh when is 0.6417nm and ν is 0.3464 c3 are shown in Table 1. In this material system, B The influence of ν on the critical thickness is due to the lattice mismatch f between the third layer and the barrier layer. B-3 This is smaller than the effect of (Equation (4)). Therefore, even if the material of the barrier layer is different from that in this example, the critical thickness value does not change significantly as long as the lattice mismatch is the same.

[0037]

number

[0038] Table 1 shows the results of the Al barrier layer. 0.18 In 0.82 h in the case of Sb c3 In each case in Table 1, the thickness of the barrier layer is h c3 It is better to have a larger value.

[0039] [Table 1]

[0040] Table 2 shows that the barrier layer is similarly Al 0.18 In 0.82 h in the case of Sb cA In this material system, B The influence of ν on the critical thickness is due to the lattice mismatch f between the active layer and the barrier layer. B-A Therefore, even if the material of the barrier layer is different from that in this example, the critical thickness value does not change significantly as long as the lattice mismatch is the same. In each case in Table 2, the thickness of the barrier layer is h cA It is better to have it smaller than .

[0041] [Table 2]

[0042]

number

[0043] Furthermore, since the barrier layer has a large band gap and low conductivity, it is more preferable that the thickness is 300 nm or less in order to efficiently extract carriers.

[0044] Furthermore, according to the above film design, lattice relaxation occurs at the interface between the barrier layer and the third layer, but not at the interface between the barrier layer and the active layer. Therefore, it is preferable that the in-plane lattice constant of the barrier layer is closer to the in-plane lattice constant of the active layer than the in-plane lattice constant of the third layer. In other words, it is preferable that the in-plane lattice mismatch between the barrier layer and the active layer is smaller than the in-plane lattice mismatch between the barrier layer and the third layer. The above in-plane lattice mismatch is calculated by the lattice constant a of each layer in Equations (4) and (5). A , a B , a3 are replaced by the lattice constants in the in-plane direction of the corresponding layers. The lattice constants in the in-plane direction can be determined by reciprocal lattice mapping or the like.

[0045] (Comparative Example 1) Table 3 shows the structure of the thin film laminated part according to Comparative Example 1. In Comparative Example 1, layers 1 to 4 are underlayers, which are made of AlInSb (Al is either 0 or 0.09) that is not doped or is doped with Sn to make it n-type. Layer 5 is a barrier layer on the underlayer side, and is made of Al 0.18 In 0.82 The doping concentration of the n-type layers is 7×10 18 / cm 3 Layer number 6 is InAs 0.13 Sb 0.87 The active layer is made of p ― The doping concentration of the active layer is 3×10 17 / cm 3 Layer number 7 is the upper barrier layer, Al 0.18 In 0.82 It is composed of Sb and Zn, and is 3×10 17 / cm 3 Layer 8 is the top layer made of InSb and is doped with Zn at 3×10 18 / cm 3It is p-doped.

[0046] When layer number 4 of Comparative Example 1 is used as the third layer and layer number 6 is used as the active layer, the lattice mismatch between the active layer and the third layer is f A-3 The critical thickness of the barrier layer of layer number 5 is h c3 is 112.7 nm, h cA The thickness of the barrier layer is 23 nm, while the thickness of the barrier layer is 635 nm. c3 is smaller than.

[0047] In addition, when layer number 8 of Comparative Example 1 is used as the third layer and layer number 6 is used as the active layer, the lattice mismatch between the active layer and the third layer is f A-3 The critical thickness of the barrier layer of layer number 7 is h c3 is 47.9 nm, h cA The thickness of the barrier layer is 23 nm, while the thickness of the barrier layer is 635 nm. c3 is smaller than.

[0048] [Table 3]

[0049] Example 1 Table 4 shows the structure of the thin film stack part according to Example 1. In Example 1, the thickness of the barrier layer of layer number 5 in the structure of Comparative Example 1 is increased to 114 nm, and the thickness of layer number 4 is reduced instead, so that the total thickness is the same as that of Comparative Example 1. In this case, there is a lattice mismatch of more than 0.1% between the active layer and the third layer, and the thickness of the barrier layer is h c3 h is greater than 112.7 nm cA is smaller than 635nm.

[0050] Furthermore, when the structure in Table 4 was actually formed and the in-plane lattice constants of the third layer, barrier layer, and active layer were determined using the reciprocal lattice mapping method, they were found to be 0.6452 nm, 0.6443 nm, and 0.6438 nm, respectively. Therefore, the in-plane lattice mismatch of 0.08% between the barrier layer and active layer is smaller than the in-plane lattice mismatch of 0.14% between the third layer and barrier layer.

[0051] [Table 4]

[0052] Example 2 Table 5 shows the structure of the thin film stack part according to Example 2. In Example 2, the thickness of the barrier layer of layer number 7 in the structure of Comparative Example 1 is increased to 114 nm, and the thickness of layer number 6 is reduced instead, so that the total thickness is the same as that of Comparative Example 1. In this case, there is a lattice mismatch of more than 0.1% between the active layer and the third layer, and the thickness of the barrier layer is h c3 h is larger than 47.9 nm cA is smaller than 635nm.

[0053] Furthermore, when the structure in Table 5 was actually formed and the in-plane lattice constants of the third layer, barrier layer, and active layer were determined using the reciprocal lattice mapping method, they were found to be 0.6436 nm, 0.6434 nm, and 0.6434 nm, respectively. Therefore, the in-plane lattice mismatch of 0.00% between the barrier layer and the active layer is smaller than the in-plane lattice mismatch of 0.04% between the third layer and the barrier layer.

[0054] [Table 5]

[0055] (Production procedure) The infrared sensors of Comparative Example 1, Example 1, and Example 2 were all fabricated by the following procedure. First, a thin film stack shown in Tables 3 to 5 was formed on a semi-insulating GaAs substrate by MBE. A mesa structure was formed by dry etching from the top to the middle of layer number 4, and after forming a protective layer made of SiO2 and SiN, a window was opened for the contact part between the electrode and the semiconductor. Next, an electrode layer made of Au / Pt / Ti layers was formed so as to cover the opened window. The area of ​​the mesa structure was approximately 230 μm 2 Infrared light is incident from the GaAs substrate side, passes through the substrate and underlayer, and is absorbed by the active layer. Of the carrier pairs generated in the active layer, holes are extracted to the electrode layer connected to layer number 8, and electrons are extracted to the electrode layer connected to layer number 4. By electrically connecting the electrode layer connected to layer number 8 of one mesa with the electrode layer connected to layer number 4 of another mesa, 643 mesas are connected in series.

[0056] The resistance values ​​under no bias in Comparative Example 1, Example 1, and Example 2 were 24.8 kΩ, 26.9 kΩ, and 27.0 kΩ, respectively. That is, improvements of 1.08 times and 1.09 times were confirmed for the resistance values ​​in Example 1 and Example 2, respectively. On the other hand, there was almost no change in the light receiving sensitivity of Example 1 and Example 2 compared to Comparative Example 1. The SN ratio of the infrared sensor is calculated by (light receiving sensitivity) × (resistance value) 1 / 2 The SN ratios of Examples 1 and 2 were all improved by 1.04 times compared to Comparative Example 1. In other words, it was confirmed that the performance of the infrared sensor was improved.

[0057] As described above, the infrared sensor according to this embodiment becomes an infrared sensor having high resistance by selecting an appropriate film thickness for the barrier layer.

Claims

1. a compound semiconductor stack having a plurality of compound semiconductor layers formed thereon; The compound semiconductor stack is an active layer made of a compound semiconductor containing In and Sb; a barrier layer made of a compound semiconductor having a band gap larger than that of the active layer; a third layer that is a compound semiconductor; the active layer, the barrier layer, and the third layer are in contact with each other in this order, a lattice mismatch between the active layer and the third layer of greater than 0.1%; The thickness of the barrier layer is The critical thickness h for the third layer ｃ３ Bigger, The critical thickness h for the active layer ｃＡ Smaller infrared sensor.

2. the active layer is a compound semiconductor containing In, As, and Sb, 2. The infrared sensor according to claim 1, wherein the barrier layer and the third layer contain at least In and Sb and have a band gap larger than that of the active layer.

3. 3. The infrared sensor according to claim 1, wherein the active layer is InAsSb (0<As≦0.36), the barrier layers are AlInSb (0.1<Al<0.4), and the third layer is AlInSb (0≦Al<0.3).

4. 4. The infrared sensor according to claim 1, wherein the barrier layer has a thickness of 300 nm or less.

5. The in-plane lattice mismatch between the barrier layer and the active layer is The infrared sensor according to claim 1 , wherein the in-plane lattice mismatch between the barrier layer and the third layer is smaller than the in-plane lattice mismatch between the barrier layer and the third layer.

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