Method of manufacturing semiconductor device
By selectively forming a planarization layer in regions with varying surface heights and using a flat-surface member, the method addresses the challenge of uniform layer formation across multiple semiconductor devices, improving manufacturing efficiency and quality.
Patent Information
- Application Number
- JP2024141223
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-08-22
- Publication Date
- 2026-03-06
AI Technical Summary
In semiconductor device manufacturing, forming layers across multiple types of devices with different surface heights on the same substrate is challenging due to difficulties in achieving uniformity in a single process.
A method involving the selective formation of a first planarization layer in the region with a lower surface height, followed by a collective formation of a second planarization layer across both regions, using a planarization process with a member having a flat surface to reduce surface height differences.
This approach allows for the accurate and uniform formation of layers across different device regions, enhancing the manufacturing process efficiency and quality of semiconductor devices.
Smart Images

Figure 2026037893000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a method for manufacturing a semiconductor device. [Background technology]
[0002] A plurality of devices such as an imaging device or a display device can be manufactured from the same substrate. Patent Document 1 describes a method for forming a plurality of devices (semiconductor devices) on a substrate using a semiconductor wafer. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2024-82129 Summary of the Invention [Problem to be solved by the invention]
[0004] In the manufacture of semiconductor devices, multiple types of devices may be formed on the same substrate. In this case, it is desirable to form layers across the multiple types of devices in a single process. However, if the surface heights of the multiple types of devices are different from each other, it may be difficult to form the layers in a single process.
[0005] Therefore, an object of the present invention is to provide a technique that is advantageous in manufacturing a plurality of types of devices from the same substrate. [Means for solving the problem]
[0006] In order to achieve the above-mentioned object, one aspect of the present invention provides a method for manufacturing a semiconductor device using a substrate having a first device region and a second device region in which different types of devices are formed, the method comprising: selectively forming a first planarization layer in the second device region, which has a surface height lower than that of the first device region; and, after forming the first planarization layer, forming a second planarization layer collectively across the first device region and the second device region, wherein the first planarization layer is formed by a planarization process in which a composition supplied to the second device region is planarized using a member having a flat surface.
[0007] Further objects and other aspects of the present invention will become apparent from the following description of preferred embodiments with reference to the accompanying drawings. [Effects of the Invention]
[0008] According to the present invention, for example, it is possible to provide a technique that is advantageous in manufacturing a plurality of types of devices from the same substrate. [Brief explanation of the drawings]
[0009] [Figure 1] 1 illustrates a substrate having multiple device regions. [Figure 2] 1A to 1C are diagrams schematically illustrating a method for manufacturing a device according to a first embodiment. [Figure 3] 1A to 1C are diagrams schematically illustrating a method for manufacturing a device according to a first embodiment. [Figure 4] 1A to 1C are diagrams schematically illustrating a method for manufacturing a device according to a first embodiment. [Figure 5] 5A to 5C are diagrams schematically illustrating a method for manufacturing a device according to a second embodiment. [Figure 6] 5A to 5C are diagrams schematically illustrating a method for manufacturing a device according to a second embodiment. [Figure 7] 5A to 5C are diagrams schematically illustrating a method for manufacturing a device according to a second embodiment. [Figure 8] FIG. 1 is a diagram illustrating a configuration example of a planarization device. [Figure 9] FIG. 10 is a diagram illustrating a planarization process selectively performed on a second device region of a substrate. DETAILED DESCRIPTION OF THE INVENTION
[0010] Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. Note that the following embodiments do not limit the scope of the invention claimed. Although multiple features are described in the embodiments, not all of these multiple features are necessarily essential to the invention, and multiple features may be combined arbitrarily. Furthermore, in the accompanying drawings, the same reference numerals are used to designate the same or similar components, and redundant explanations will be omitted.
[0011] First Embodiment A first embodiment of the present invention will be described. FIG. 1 shows a substrate 10 having multiple device regions. A semiconductor wafer such as silicon can be used as the substrate 10. Each device region is, for example, a region of the substrate 10 where an imaging device or a display device having multiple pixels is formed, and is a region that becomes a single semiconductor chip. Each device region may include a stacked structure in which multiple substrates, multiple layers, or multiple films are stacked.
[0012] 1 shows multiple types of device regions (first device region 11, second device region 12) in which different types of devices (semiconductor devices) are formed. First device region 11 is, for example, a region in which a color imaging device or display device (hereinafter sometimes referred to as a color device) is formed, and can be located in the center of substrate 10. Second device region 12 is, for example, a region in which a monochrome imaging device or display device (hereinafter sometimes referred to as a monochrome device) is formed, and can be located in the periphery of substrate 10.
[0013] In this way, when a color device and a monochrome device are formed on the same substrate 10, a color filter layer is provided in the first device region 11, but a color filter layer is not provided in the second device region 12. In other words, after the color filter layer is formed in the first device region 11, the surface heights of the first device region 11 and the second device region 12 will be different from each other. Therefore, after the color filter layer is formed, it may be difficult to form a common layer or film across the first device region 11 and the second device region 12 in a single process.
[0014] Therefore, in this embodiment, a planarization layer (first planarization layer) is selectively formed by planarization treatment on the second device region 12, which has a lower surface height than the first device region 11 on which the color filter layer is formed. The planarization treatment is defined herein as "a treatment for planarizing a composition using a member having a flat surface," and is used, for example, to planarize the composition supplied to the second device region 12 to form a planarization layer. Details of the planarization treatment and its apparatus (planarization apparatus) will be described later.
[0015] An example of a method for manufacturing a device according to this embodiment will be described below with reference to FIGS. 2 to 4. FIGS. 2 to 4 are diagrams that schematically show a method for manufacturing a device in the first device region 11 and the second device region 12. In this embodiment, the first device region 11 in which a color device is formed may be referred to as the "color device region 11," and the second device region 12 in which a monochrome device is formed may be referred to as the "monochrome device region 12." Although the color device region 11 and the monochrome device region 12 are shown separately in FIGS. 2 to 4, the color device region 11 and the monochrome device region 12 are provided on the same substrate 10.
[0016] 2 is a preparation step for the substrate 10, and will be referred to in order to explain the configuration of each of the color device region 11 and the monochrome device region 12 in the substrate 10. In each of the color device region 11 and the monochrome device region 12 in the substrate 10, a structural body 101, a lower electrode 102, an insulating layer 103, an organic layer 104 including a light-emitting layer, and an upper electrode 105 have already been formed. In this embodiment, the structural body 101, the lower electrode 102, the insulating layer 103, the organic layer 104, and the upper electrode 105 have the same configurations in the color device region 11 and the monochrome device region 12.
[0017] The structure 101 may include switching elements such as transistors for driving pixels, and conductors such as insulating layers, wiring pattern layers, and contact plugs formed on the substrate 10. The structure 101 may have, for example, an insulating film containing silicon oxide or the like, or a wiring pattern whose main component is copper, aluminum, or the like.
[0018] The lower electrode 102 is disposed on the structure 101 for each pixel. In this specification, "above" refers to the direction from the substrate 10 toward the lens array 110 described below. The lower electrode 102 can function as an anode or cathode of the light-emitting element included in each pixel. The lower electrode 102 may also serve as a reflective layer for light generated from the light-emitting layer included in the organic layer 104. For this reason, the lower electrode 102 can be made of a metal with a relatively high reflectivity, such as aluminum or silver, or an alloy thereof.
[0019] The insulating layer 103 can be formed to cover the edge of the lower electrode 102. The insulating layer 103 is sometimes called a pixel separation film or a bank. The insulating layer 103 can be made of an insulating material such as silicon nitride, silicon oxynitride, or silicon oxide. The light-emitting position of each pixel can be determined by the position of the lower electrode 102 exposed from an opening provided in the insulating layer 103.
[0020] The organic layer 104 is disposed so as to cover the lower electrode 102 and the insulating layer 103. The organic layer 104 may be composed of multiple layers including a light-emitting layer. The multiple layers may include a hole injection layer, a hole transport layer, an electron blocking layer, a light-emitting layer, a hole blocking layer, an electron transport layer, an electron injection layer, etc.
[0021] The upper electrode 105 is disposed on the organic layer 104 across multiple pixels. The upper electrode 105 can function as a cathode or anode of the light-emitting element included in each pixel. The upper electrode 105 is a conductive layer that has the property of transmitting light emitted from the light-emitting layer included in the organic layer 104 (optical transparency). The upper electrode 105 can be made of a transparent conductive material such as an alloy containing silver or magnesium as a main component, or indium tin oxide (ITO).
[0022] 2, a lower planarization layer 106 is formed in one step on the substrate 10 across the color device region 11 and the monochrome device region 12. The lower planarization layer 106 is a layer for planarizing irregularities on the upper surface of the substrate 10, and can be formed, for example, by spin-coating an organic material onto the substrate 10 using a spin coating method. This allows the lower planarization layer 106, having a flat surface (upper surface), to be formed in one step across the entire substrate 10, including the color device region 11 and the monochrome device region 12. The organic material used for the lower planarization layer 106 can be a material that has the property of transmitting light emitted from the light-emitting layer included in the organic layer 104 (light transparency) and is compatible with spin coating.
[0023] While the present embodiment illustrates an example in which the lower planarization layer 106 is formed using spin coating, the present invention is not limited thereto. The lower planarization layer 106 may be formed using a method other than spin coating as long as it is a method capable of forming a layer with a flat surface. For example, the lower planarization layer 106 may be formed by a planarization process described below using a member with a flat surface. In this planarization process, a member with a flat surface that can contact the entire substrate 10 may be used. Furthermore, if a protective layer is disposed on the upper electrode 105, the lower planarization layer 106 may be formed on the protective layer. The protective layer is disposed to prevent external moisture and impurities from diffusing into the organic layer 104 and the structure 101. For example, silicon nitride, silicon oxide, aluminum oxide, etc. may be used for the protective layer.
[0024] In step S12 of FIG. 3, a color filter layer 107 is formed on the lower planarization layer 106 in the color device region 11. The color filter layer 107 may include multiple types of filters that transmit (or absorb) light in specific frequency bands. For example, in the color device region 11, filters of different types (colors) may be provided for each pixel. The color filter layer 107 may include, for example, three types of filters: a filter 107R that transmits red light, a filter 107G that transmits green light, and a filter 107B that transmits blue light. The multiple types of filters 107R, 107G, and 107B in the color filter layer 107 may have different thicknesses to adjust the transmittance of each filter. Note that in step S12, the color filter layer 107 is not formed in the monochrome device region 12.
[0025] 3, a planarization layer 108 (first planarization layer) is formed on the lower planarization layer 106 in the monochrome device region 12. The planarization layer 108 is a layer for reducing the difference in surface height between the color device region 11 and the monochrome device region 12 caused by the formation of the color filter layer 107 in the above-mentioned step S12, and is selectively formed in the monochrome device region 12. Specifically, the planarization layer 108 is formed in the monochrome device region 12 by a planarization process described below so as to reduce the difference in surface height between the color filter layer 107 in the color device region 11 and the planarization layer 108 in the monochrome device region 12. The planarization layer 108 is preferably formed so that its surface height approaches that of the color filter layer 107. When the color filter layer 107 is composed of multiple types of filters with different thicknesses, the planarization layer 108 is preferably formed so that its surface height is between the highest and lowest points of the surface height of the color filter layer 107. Here, the composition (material) used for the planarizing layer 108 can have the property of transmitting light emitted from the light-emitting layer included in the organic layer 104 (light transparency).
[0026] 4, an upper planarization layer 109 (second planarization layer) is formed in one step over the color device region 11 and the monochrome device region 12. The upper planarization layer 109 is a layer for planarizing the surfaces of the layers below it (color filter layer 107, planarization layer 108), and can be formed, for example, by spin-coating an organic material using a spin coating method. This allows the upper planarization layer 109, which has a flat surface (top surface), to be formed in one step over the entire substrate 10, including the color device region 11 and the monochrome device region 12. The upper planarization layer 109 is formed on the color filter layer 107 in the color device region 11, and on the planarization layer 108 in the monochrome device region 12.
[0027] The organic material used for the upper planarization layer 109 may be a material that has the property of transmitting light emitted from the light-emitting layer included in the organic layer 104 (light transparency) and that can be subjected to spin coating. The organic material used for the upper planarization layer 109 may be the same as the organic material used for the lower planarization layer 106. While the present embodiment illustrates an example in which the upper planarization layer 109 is formed using spin coating, the present invention is not limited thereto. The upper planarization layer 109 may be formed using a method other than spin coating as long as it is a method capable of forming a layer having a flat surface. For example, the upper planarization layer 109 may be formed by a planarization process described below using a member having a flat surface. In this case, a member having a flat surface that can contact the entire substrate 10 may be used for the planarization process.
[0028] In step S15 of FIG. 4, a lens array 110 (microlens array) is formed on the upper planarization layer 109 for each of the color device region 11 and the monochrome device region 12. The lens array 110 is formed so that one microlens is arranged for each pixel. For example, a lens material is formed on the upper planarization layer 109 over the entire area of the substrate 10, including the color device region 11 and the monochrome device region 12, and then a photoresist applied on the lens material is patterned into lenses by a photolithography process. The lens material is then etched using the photoresist as a mask, thereby forming the lens array 110 on the upper planarization layer 109.
[0029] As described above, in this embodiment, the planarization layer 108 is selectively formed in the monochrome device region 12, thereby reducing the difference in surface height between the color filter layer 107 in the color device region 11 and the planarization layer 108 in the monochrome device region 12. The selective formation of the planarization layer 108 in the monochrome device region 12 can be achieved by a planarization process using a member with a flat surface. This improves the surface flatness of the upper planarization layer 109, which is formed collectively over the color device region 11 and the monochrome device region 12. This allows the lens array 110 to be formed collectively and accurately on the upper planarization layer 109 over the color device region 11 and the monochrome device region 12.
[0030] Second Embodiment A second embodiment of the present invention will be described. This embodiment basically follows on from the first embodiment, and can follow the first embodiment except for the matters mentioned below.
[0031] In the first embodiment described above, an example was described in which a difference in surface height occurs between the first device region 11 and the second device region (monochrome device region) due to the formation of a color filter layer 107 in the first device region 11 (color device region). In contrast, in the present embodiment, an example is described in which a difference in surface height occurs in the substrate 10 itself between the first device region 11 and the second device region 12. Even when a difference in surface height occurs in the substrate 10 itself, it may be difficult to form a common layer or film across the first device region 11 and the second device region 12 in a single process. Therefore, in the present embodiment, a planarization layer 111 is selectively formed in the second device region 12 by a planarization process using a member having a flat surface, so as to reduce the difference in surface height of the substrate 10 itself between the first device region 11 and the second device region 12. In the present embodiment, the second device region 12 can be defined as a region of the substrate 10 having a lower surface height than the first device region 11.
[0032] In this embodiment, both the first device region 11 and the second device region 12 are described as regions for forming color devices, but this is not limited thereto, and both may be regions for forming monochrome devices. Alternatively, one of the first device region 11 and the second device region 12 may be a region for forming a color device, and the other may be a region for forming a monochrome device. In this case, the planarization layer 108 described in the first embodiment may be applied. Furthermore, the first device region 11 is not limited to being disposed in the central portion of the substrate 10, and the second device region 12 is not limited to being disposed in the peripheral portion of the substrate 10.
[0033] An example of a method for manufacturing a device in this embodiment will be described below with reference to Figures 5 to 7. Figures 5 to 7 are diagrams that schematically show a method for manufacturing a device in the first device region 11 and the second device region 12. Although Figures 5 to 7 show the first device region 11 and the second device region 12 separately, the first device region 11 and the second device region 12 are provided on the same substrate 10.
[0034] Step S20 in FIG. 5 is a preparation step for the substrate 10, and will be referred to in order to explain the respective configurations of the first device region 11 and the second device region 12 in the substrate 10. In each of the first device region 11 and the second device region 12 in the substrate 10, a structure 101, a lower electrode 102, an insulating layer 103, an organic layer 104 including an emitting layer, and an upper electrode 105 have already been formed. The configurations of the structure 101, the lower electrode 102, the insulating layer 103, the organic layer 104, and the upper electrode 105 are as described in the first embodiment and are similar between the first device region 11 and the second device region 12. However, in this embodiment, the number of stacked layers (e.g., the number of wiring layers) constituting the structure 101 in the second device region 12 is smaller than that in the first device region 11, and the surface height of the substrate 10 is lower than that in the first device region 11.
[0035] In step S21 of FIG. 5 , a planarization layer 111 (first planarization layer) is formed on the substrate 10 in the second device region 12. The planarization layer 111 is a layer for reducing the difference in surface height of the substrate 10 between the first device region 11 and the second device region 12, and is selectively formed in the second device region. Specifically, the planarization layer 111 is formed in the second device region 12 by a planarization process described below so as to reduce the difference in surface height between the substrate 10 in the first device region 11 and the planarization layer 111 in the second device region 12. The planarization layer 111 is preferably formed so that its surface height approaches the surface height of the substrate 10 in the first device region 11. If there is a step in the substrate 10 in the first device region 11, the planarization layer 111 is preferably formed so that its surface height is between the highest and lowest points of the step.
[0036] In step S22 of FIG. 6 , a lower planarization layer 106 (second planarization layer) is formed collectively over the first device region 11 and the second device region 12. The lower planarization layer 106 is a layer for planarizing the surfaces of the layers below it (substrate 10, planarization layer 111) and can be formed, for example, by spin-coating an organic material using a spin coating method. This allows the lower planarization layer 106, having a flat surface (upper surface), to be formed collectively over the entire region of the substrate 10, including the first device region 11 and the second device region 12. The lower planarization layer 106 is formed on the substrate 10 in the first device region 11, and on the planarization layer 111 in the second device region 12. Note that the material of the lower planarization layer 106 is the same as that described in step S11 of the first embodiment, and therefore will not be described in detail here.
[0037] 6, a color filter layer 107 is formed on the lower planarization layer 106 for each of the first device region 11 and the second device region 12. The color filter layer 107 may have, for example, three types of filters: a filter 107R that transmits red light, a filter 107G that transmits green light, and a filter 107B that transmits blue light. Note that the configuration of the color filter layer 107 is the same as that described in step S12 of the first embodiment, and therefore a detailed description thereof will be omitted here.
[0038] In step S24 of FIG. 7 , an upper planarization layer 109 is formed collectively over the first device region 11 and the second device region 12. The upper planarization layer 109 is a layer for planarizing the surface of the layer below it (the color filter layer 107) and can be formed, for example, by spin-coating an organic material using a spin coating method. This allows the upper planarization layer 109, having a flat surface (top surface), to be formed collectively over the entire area of the substrate 10, including the first device region 11 and the second device region 12. The upper planarization layer 109 is formed on the color filter layer 107 in each of the first device region 11 and the second device region 12. Note that the material of the upper planarization layer 109 is the same as that described in step S14 of the first embodiment, and therefore will not be described in detail here.
[0039] 7, a lens array 110 (microlens array) is formed on the upper planarization layer 109 for each of the first device region 11 and the second device region 12. The lens array 110 is formed so that one microlens is arranged for each pixel. Note that the configuration and formation method of the lens array 110 are the same as those described in step S15 of the first embodiment, and therefore will not be described in detail here.
[0040] As described above, in this embodiment, the planarization layer 111 is selectively formed in the second device region 12, which has a lower surface height of the substrate 10 than the first device region 11, thereby reducing the surface heights of the first device region 11 and the second device region 12. The selective formation of the planarization layer 111 in the second device region 12 can be achieved by a planarization process using a member having a flat surface. This improves the surface flatness of the lower planarization layer 106, which is formed collectively across the first device region 11 and the second device region 12. This allows the color filter layer 107 (each filter) to be formed collectively and accurately on the lower planarization layer 106 across the first device region 11 and the second device region 12. This also improves the surface flatness of the upper planarization layer 109, which is formed collectively across the first device region 11 and the second device region 12. This also allows the lens array 110 to be formed collectively and accurately on the upper planarization layer 109 across the first device region 11 and the second device region 12.
[0041] <Embodiments of the planarization process> Hereinafter, an embodiment of the planarization process according to the present invention will be described. As described above, the planarization process is a process for planarizing a composition using a member having a flat surface, and may include inkjet-based adaptive planarization (IAP). The planarization process may be applied to the formation of the planarization layer 108 in step S13 of the first embodiment, and to the formation of the planarization layer 111 in step S21 of the second embodiment. A member (mold) having a flat surface may be called a planarization member, superstrate, or planar template, and may be referred to as a "planarization member" below.
[0042] 8 is a diagram schematically illustrating an example configuration of a planarization apparatus 200 that performs a planarization process. In FIG. 8, directions are shown in an XYZ coordinate system in which a plane parallel to the surface on which the substrate S is held (holding surface) is the XY plane. The planarization apparatus 200 may include a curing unit 210, a head 220 that holds a planarizing member M, a stage 230 that holds the substrate S, a supply unit 240 that supplies a composition C onto the substrate S, a measurement unit 250, and a control unit 260.
[0043] The substrate S corresponds to the substrate 10 in the first and second embodiments, and may be understood as the substrate after one or more layers are formed on the substrate 10. Furthermore, as shown in FIG. 1, the substrate S is provided with a plurality of device regions. The plurality of device regions include a plurality of types of device regions (first device region 11, second device region 12) in which different types of devices are formed. In this embodiment, the planarization apparatus 200 can individually perform planarization processing on each of the second device regions 12 of the substrate S.
[0044] The composition C used in the planarization treatment is a curable composition (sometimes referred to as an uncured resin) that cures when curing energy is applied. Examples of curing energy include electromagnetic waves and heat. Electromagnetic waves include, for example, light having a wavelength selected from the range of 10 nm to 1 mm, specifically infrared light, visible light, and ultraviolet light. The curable composition is a composition that cures when irradiated with light or when heated. Among these, photocurable compositions that cure when irradiated with light contain at least a polymerizable compound and a photopolymerization initiator and may further contain a non-polymerizable compound or a solvent, as necessary. The non-polymerizable compound is at least one selected from the group consisting of sensitizers, hydrogen donors, internal mold release agents, surfactants, antioxidants, and polymer components. The viscosity of the viscous material (at 25°C) is, for example, 1 mPa·s to 100 mPa·s.
[0045] When a photocurable composition is used, the planarizing member M is preferably made of a light-transmitting material. Examples of materials that can be used for the planarizing member include glass, quartz, PMMA (Polymethyl Methacrylate), and polycarbonate resin. The planarizing member M also has a protruding portion Ma, the surface of which facing the substrate S is configured as a flat surface Mb. The protruding portion Ma has approximately the same dimensions (XY directions) as one device region and is configured in a shape (mesa shape) that protrudes toward the substrate S in order to perform a planarization process on the second device region 12, which has a lower surface height than the first device region 11. The flat surface Mb is a surface that comes into contact with the composition C on the substrate S to planarize the composition C.
[0046] The curing unit 210 (irradiation unit) irradiates light L onto the composition C on the substrate S, thereby curing the composition C. The curing unit 210 of this embodiment includes a light source unit 211 that emits light L to cure the composition C on the substrate S, and an optical member 212 that guides the light L emitted from the light source unit 211 to the composition C on the substrate S, and irradiates the light L onto the composition C on the substrate S via a planarizing member M. The optical member 212 may include an optical element that adjusts (shapes) the shape of the light L emitted from the light source unit 211 into a shape suitable for planarization processing.
[0047] The head 220 may include a member holding unit 221 that holds the planarizing member M by vacuum suction or the like, and a member driving unit 222 that drives the member holding unit 221 to drive the planarizing member M. The member holding unit 221 and the member driving unit 222 have opening regions that are open in the center (inside) so that the light L from the curing unit 210 can be irradiated onto the composition C on the substrate S. The member driving unit 222 drives the member holding unit 221 (planarizing member M) in the Z direction to bring the planarizing member M into contact with the composition C on the substrate S, or to separate the planarizing member M from the composition C after it has been cured.
[0048] The stage 230 may include a substrate holding unit 231 that holds the substrate S by vacuum suction force or the like, and a substrate driving unit 232 that drives the substrate S by driving the substrate holding unit 231. The substrate driving unit 232 drives the substrate holding unit 231 (substrate S) in the X and Y directions to align the flattening member M and the substrate S.
[0049] Here, the head 220 (member driving unit 222) and the stage 230 (substrate driving unit 232) constitute a relative driving unit that drives the planarizing member M and the substrate S relatively. That is, the relative driving (Z direction) between the planarizing member M and the substrate S for bringing the planarizing member M into contact with the composition C on the substrate S or for separating the planarizing member M from the composition C after curing can be performed by at least one of the head 220 and the stage 230. Furthermore, the relative driving (XY directions) between the planarizing member M and the substrate S for aligning the planarizing member M and the substrate S can be performed by at least one of the head 220 and the stage 230.
[0050] The supply unit 240 includes a dispenser that discharges (drops) the composition C as a plurality of droplets, and supplies the composition C onto the substrate S by discharging the composition C from the dispenser. For example, while the stage 230 is moving the substrate S in the X and Y directions below the supply unit 240, the supply unit 240 discharges the composition C as a plurality of droplets. This allows the composition C to be supplied (placed) on the substrate S as a plurality of droplets.
[0051] The measurement unit 250 includes a scope that detects marks provided on the planarizing member M and marks provided on the substrate S, and measures the relative positions in the X and Y directions between the planarizing member M and the substrate S based on the positional deviation between the marks detected by the scope. The measurement results of the measurement unit 250 can be used to selectively supply the composition C to the second device region 12 of the substrate S and bring the planarizing member M (flat surface Mb) into contact with the second device region 12.
[0052] The control unit 260 is configured by a computer (information processing device) having a processor such as a CPU (Central Processing Unit) and a storage unit such as a memory, and controls the planarization process by controlling each unit of the planarization apparatus 200. The control unit 260 may be configured by, for example, a PLD (abbreviation for Programmable Logic Device) such as an FPGA (abbreviation for Field Programmable Gate Array), an ASIC (abbreviation for Application Specific Integrated Circuit), a general-purpose computer with an embedded program, or a combination of all or part of these.
[0053] 9 is a diagram illustrating a planarization process selectively performed on the second device region 12 of the substrate S. The planarization process shown in FIG. 9 is a process performed inside the planarization apparatus 200, and is performed by the control unit 260 comprehensively controlling each part of the planarization apparatus 200. Note that, for ease of understanding, FIG. 9 schematically illustrates only the planarization member M and the substrate S, and does not illustrate each part of the planarization apparatus 200.
[0054] In the planarization process for the second device region 12, first, as shown in Fig. 9(a), a supply unit 240 supplies a plurality of droplets of composition C to the second device region 12. Next, as shown in Fig. 9(b), the head 220 (member driving unit 222) drives the planarizing member M in the -Z direction, thereby bringing the flat surface Mb of the planarizing member M (protrusion Ma) into contact with the composition C on the second device region 12. As a result, the composition C on the second device region 12 spreads along the flat surface Mb of the planarizing member M to form a liquid film.
[0055] Once the composition C has spread over the second device region 12, as shown in FIG. 9(c), the curing unit 210 irradiates the composition C with light L while the planarizing member M and the composition C in the second device region 12 are in contact, thereby curing the composition C. Next, as shown in FIG. 9(d), the head 220 (member driving unit 222) drives the planarizing member M in the +Z direction, thereby separating the planarizing member M from the cured composition C in the second device region 12. This allows a planarizing layer (for example, the planarizing layer 108 in the first embodiment or the planarizing layer 111 in the second embodiment) to be formed in the second device region 12.
[0056] Here, the above-described planarization process may be used when the lower planarization layer 106 is formed collectively over the first device region 11 and the second device region 12 in step S11 of the first embodiment and / or step S22 of the second embodiment. Similarly, the above-described planarization process may be used when the upper planarization layer 109 is formed collectively over the first device region 11 and the second device region 12 in step S14 of the first embodiment and / or step S24 of the second embodiment. In these cases, a planarization member M having a flat surface Mb with dimensions capable of contacting the entire area of the substrate S may be used.
[0057] <Summary of the embodiment> The disclosure of the present specification includes at least the following method for manufacturing a semiconductor device. (Item 1) A manufacturing method for manufacturing a semiconductor device using a substrate having a first device region and a second device region in which different types of devices are formed, comprising: selectively forming a first planarization layer on the second device region having a surface height lower than that of the first device region; and forming a second planarization layer collectively over the first device region and the second device region after forming the first planarization layer; The manufacturing method, wherein the first planarization layer is formed by a planarization process in which a composition supplied to the second device region is planarized using a member having a flat surface. (Item 2) 2. The manufacturing method according to item 1, wherein the first planarization layer is formed in the second device region by the planarization process so as to reduce a difference in surface height between the first device region and the second device region. (Item 3) 3. The manufacturing method according to item 1 or 2, wherein the planarization treatment includes the steps of: supplying the composition to the second device region; curing the composition in the second device region while the flat surface of the member is in contact with the composition; and separating the member from the cured composition. (Item 4) 4. The manufacturing method according to any one of items 1 to 3, wherein the second planarization layer is formed by a spin coating method. (Item 5) 5. The manufacturing method described in any one of items 1 to 4, wherein the first device region is a region where a color imaging device or display device is formed, and the second device region is a region where a monochrome imaging device or display device is formed. (Item 6) further comprising forming a color filter layer in the first device region; 6. The manufacturing method described in item 5, wherein the first planarization layer is formed in the second device region by the planarization process so that a difference in surface height between the color filter layer in the first device region and the first planarization layer in the second device region is reduced. (Item 7) further comprising collectively forming a lower planarization layer on the substrate across the first device region and the second device region; 7. The manufacturing method described in item 6, wherein the color filter layer is formed on the lower planarization layer in the first device region, and the first planarization layer is formed on the lower planarization layer in the second device region. (Item 8) 8. The manufacturing method according to any one of items 5 to 7, further comprising forming a lens array on the second planarization layer for each of the first device region and the second device region. (Item 9) 5. The manufacturing method according to any one of items 1 to 4, wherein the second device region is lower in surface height of the substrate than the first device region. (Item 10) 10. The manufacturing method of item 9, wherein the first planarization layer is formed in the second device region by the planarization process so that a difference between a surface height of the substrate in the first device region and a surface height of the first planarization layer in the second device region is reduced. (Item 11) each of the first device region and the second device region is a region in which an imaging device or a display device is formed; 11. The manufacturing method according to item 9 or 10, further comprising: forming a color filter layer on the second planarization layer for each of the first device region and the second device region; and forming an upper planarization layer collectively across the first device region and the second device region after forming the color filter layer. (Item 12) Item 12. The manufacturing method according to item 11, further comprising forming a lens array on the upper planarization layer for each of the first device region and the second device region.
[0058] The invention is not limited to the above-described embodiments, and various changes and modifications can be made without departing from the spirit and scope of the invention. Accordingly, the following claims are appended to apprise the public of the scope of the invention. [Explanation of symbols]
[0059] 10: substrate, 11: first device region, 12: second device region, 106: lower planarization layer, 107: color filter layer, 108: planarization layer, 109: upper planarization layer, 110: lens array, 111: planarization layer
Claims
1. A manufacturing method for manufacturing a semiconductor device using a substrate having a first device region and a second device region in which different types of devices are formed, comprising: selectively forming a first planarization layer on the second device region having a surface height lower than that of the first device region; and forming a second planarization layer collectively over the first device region and the second device region after forming the first planarization layer; The manufacturing method, wherein the first planarization layer is formed by a planarization process in which a composition supplied to the second device region is planarized using a member having a flat surface.
2. 2. The method of claim 1, wherein the first planarization layer is formed in the second device region by the planarization process such that a difference in surface height between the first device region and the second device region is reduced.
3. 2. The manufacturing method according to claim 1, wherein the planarization treatment includes the steps of: supplying the composition to the second device region; curing the composition while contacting the flat surface of the member with the composition in the second device region; and separating the member from the cured composition.
4. The manufacturing method according to claim 1 , wherein the second planarization layer is formed by a spin coating method.
5. 5. The manufacturing method according to claim 1, wherein the first device region is a region where a color imaging device or a display device is formed, and the second device region is a region where a monochrome imaging device or a display device is formed.
6. further comprising forming a color filter layer in the first device region; 6. The manufacturing method according to claim 5, wherein the first planarization layer is formed in the second device region by the planarization process so that a difference between a surface height of the color filter layer in the first device region and a surface height of the first planarization layer in the second device region is reduced.
7. further comprising collectively forming a lower planarization layer on the substrate across the first device region and the second device region; 7. The method of claim 6, wherein the color filter layer is formed on the lower planarization layer in the first device region, and the first planarization layer is formed on the lower planarization layer in the second device region.
8. The method of claim 5 further comprising forming a lens array on the second planarization layer for each of the first device region and the second device region.
9. 5. The manufacturing method according to claim 1, wherein the second device region is lower in surface height of the substrate than the first device region.
10. 10. The manufacturing method of claim 9, wherein the first planarization layer is formed in the second device region by the planarization process such that a difference between a surface height of the substrate in the first device region and a surface height of the first planarization layer in the second device region is reduced.
11. each of the first device region and the second device region is a region in which an imaging device or a display device is formed; 10. The manufacturing method according to claim 9, further comprising: forming a color filter layer on the second planarization layer for each of the first device region and the second device region; and forming an upper planarization layer collectively across the first device region and the second device region after forming the color filter layer.
12. The method of claim 11 further comprising forming a lens array on the upper planarization layer for each of the first device region and the second device region.
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JP2024082129A