Semiconductor device and manufacturing method thereof

Abstract

A semiconductor device capable of suppressing an increase in manufacturing costs and a method for manufacturing the same are provided. [Solution] The semiconductor device comprises a resin layer (11), a heat sink (12) arranged on the upper surface of the resin layer (11), a semiconductor element (15) arranged on the upper surface of the heat sink (12), a metal layer (20) and a bonding material (21) arranged on the lower surface of the resin layer (11), and a cooling component (30) bonded to the resin layer (11) via the bonding material (21), and the metal layer (20) has a recess (204) formed therein that opens to the other surface (202) opposite to the one surface (201) facing the resin layer (11), and the bonding material (21) is arranged in the recess (204).

Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor device and a method for manufacturing the same. [Background technology]

[0002] In a semiconductor device that uses a heat dissipation member made of a thermal interface material (TIM) or the like to cool a power module or the like, it is necessary to prevent problems caused by pump-out of the heat dissipation member.

[0003] For example, in Patent Document 1, a heat dissipation member is filled between a power module and a housing that fixes the power module, and a heat dissipation member holding portion for holding the heat dissipation member is provided on the housing. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2009-246063 Summary of the Invention [Problem to be solved by the invention]

[0005] In this way, when the heat dissipation member holder is provided on the housing side, the housing needs to be processed to form the heat dissipation member holder, which increases the manufacturing cost of the semiconductor device.

[0006] In view of the above, an object of the present disclosure is to provide a semiconductor device and a method for manufacturing the same that can suppress increases in manufacturing costs. [Means for solving the problem]

[0007] In order to achieve the above object, according to one aspect of the present disclosure, a semiconductor device comprises a resin layer (11), a heat sink (12) arranged on the upper surface of the resin layer, a semiconductor element (15) arranged on the upper surface of the heat sink, a metal layer (20) and a bonding material (21) arranged on the lower surface of the resin layer, and a cooling component (30) bonded to the resin layer via the bonding material, wherein the metal layer has a recess (204) formed therein that opens to one surface (202) opposite to one surface (201) facing the resin layer, and the bonding material is arranged in the recess.

[0008] According to this, by disposing the bonding material in the recess of the metal layer, it is possible to prevent the bonding material from leaking out. By using the metal layer used to protect the resin layer to hold the bonding material, additional components for holding the bonding material are not required. Furthermore, the recess can be formed in the same process as the patterning of the wiring layer formed on the semiconductor element. Therefore, it is possible to prevent an increase in the manufacturing cost of the semiconductor device.

[0009] According to another aspect of the present disclosure, a method for manufacturing a semiconductor device includes preparing a resin layer (11), arranging a heat sink (12) on an upper surface of the resin layer, arranging a semiconductor element (15) on the upper surface of the heat sink, arranging a metal layer (20) on a lower surface of the resin layer, forming a recess (204) in the metal layer that opens to a surface (202) opposite to a surface (201) facing the resin layer, arranging a bonding material (21) in the recess, and bonding a cooling component (30) to the resin layer via the bonding material.

[0010] According to this, by disposing the bonding material in the recess of the metal layer, it is possible to prevent the bonding material from leaking out. By using the metal layer used to protect the resin layer to hold the bonding material, additional components for holding the bonding material are not required. Furthermore, the recess can be formed in the same process as the patterning of the wiring layer formed on the semiconductor element. Therefore, it is possible to prevent an increase in the manufacturing cost of the semiconductor device.

[0011] The reference symbols in parentheses attached to each component indicate an example of the correspondence between the component and the specific components described in the embodiments described below. [Brief explanation of the drawings]

[0012] [Figure 1] 1 is a cross-sectional view of a semiconductor device according to a first embodiment. [Figure 2] FIG. 2 is a bottom view of the circuit board module. [Figure 3A] 1A to 1C are cross-sectional views showing a manufacturing process of a semiconductor device. [Figure 3B] 3B is a cross-sectional view showing the manufacturing process of the semiconductor device subsequent to FIG. 3A. [Figure 3C] 3C is a cross-sectional view showing the manufacturing process of the semiconductor device subsequent to FIG. 3B. [Figure 3D] 3D is a cross-sectional view showing the manufacturing process of the semiconductor device subsequent to FIG. 3C. [Figure 3E] FIG. 3E is a cross-sectional view showing the manufacturing process of the semiconductor device subsequent to FIG. 3D. [Figure 3F] 3F is a cross-sectional view showing the manufacturing process of the semiconductor device subsequent to FIG. 3E. [Figure 4] FIG. 10 is a cross-sectional view of a comparative example. [Figure 5] FIG. 10 is a bottom view of the circuit board module according to the second embodiment. [Figure 6] FIG. 11 is a bottom view of the circuit board module according to the third embodiment. [Figure 7] FIG. 10 is a bottom view of the circuit board module according to the fourth embodiment. [Figure 8] FIG. 11 is a bottom view of the circuit board module according to the fifth embodiment. [Figure 9] FIG. 13 is a bottom view of the circuit board module according to the sixth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0013] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. In the following embodiments, identical or equivalent parts will be denoted by the same reference numerals.

[0014] (First embodiment) A first embodiment will be described. A semiconductor device 1 of this embodiment shown in Fig. 1 is used, for example, in a vehicle inverter. The semiconductor device 1 includes a circuit board module 10 and a cooling component 30. The circuit board module 10 has a control circuit for a semiconductor element 15, which will be described later, formed thereon. The cooling component 30 is used to cool the circuit board module 10, and is bonded to the underside of a metal layer 20 and a bonding material 21, which will be described later.

[0015] The circuit board module 10 includes a resin layer 11, a heat sink 12, a core layer 13, an Ag layer 14, a semiconductor element 15, a wiring layer 16, a sealing resin 17, a through electrode 18, a wiring layer 19, a metal layer 20, and a bonding material 21.

[0016] Resin layer 11 supports heat sink 12, semiconductor element 15, etc. Resin layer 11 is a rectangular plate-shaped member made of insulating resin, and has an upper surface and a lower surface opposite to the upper surface. Heat sink 12 and core layer 13 are arranged on the upper surface of resin layer 11.

[0017] Heat sink 12 is responsible for dissipating heat from semiconductor element 15 and is made of a metal such as Cu. Heat sink 12 is a rectangular plate-shaped member with a recess formed in the inner periphery of its upper surface, and semiconductor element 15 is bonded to this recess via an Ag layer 14. Semiconductor element 15 is, for example, a power semiconductor element such as a MOSFET, and has a wiring layer 16 formed on its upper surface.

[0018] The core layer 13 is used for positioning the heat sink 12 when placing it on the resin layer 11. The core layer 13 is configured by laminating a Cu layer 131, a resin layer 132, and a Cu layer 133 in this order. The core layer 13 is formed, for example, in the shape of a rectangular frame, and the heat sink 12 is placed in a portion of the upper surface of the resin layer 11 that is surrounded by the core layer 13.

[0019] The heat sink 12 to the wiring layer 16 are sealed with a sealing resin 17. The sealing resin 17 has through holes formed therein that connect the upper surface of the sealing resin 17 to the wiring layer 16, and through holes that connect the upper surface of the sealing resin 17 to a wiring layer (not shown) formed on the outer periphery of the heat sink 12. These through holes are filled with a conductive material such as Cu to form through electrodes 18. This conductive material is also formed on the upper surface of the sealing resin 17, thereby forming a wiring layer 19 on the upper surface of the sealing resin 17.

[0020] A metal layer 20 and a bonding material 21 are formed on the lower surface of the resin layer 11. The metal layer 20 is intended to protect the resin layer 11 and is made of, for example, Cu. Of the surfaces of the metal layer 20, the upper surface facing the resin layer 11 is referred to as one surface 201, the surface opposite to the one surface 201 is referred to as the other surface 202, and the surface connecting the one surface 201 and the other surface 202 is referred to as a side surface 203. A recess 204 that opens to the other surface 202 is formed in the metal layer 20, and the bonding material 21 is disposed in the recess 204. The bonding material 21 is intended to bond the circuit board module 10 and the cooling component 30 and is made of, for example, an organic material such as TIM.

[0021] In this embodiment, the recess 204 penetrates the metal layer 20 to expose the lower surface of the resin layer 11. However, the recess 204 may not penetrate the metal layer 20, and the inner periphery of the lower surface of the resin layer 11 may be covered by the metal layer 20. As shown in FIG. 2 , in this embodiment, the recess 204 has a rectangular opening and is entirely surrounded by the outer periphery of the metal layer 20. Therefore, the bonding material 21 filled inside the recess 204 is entirely surrounded by the outer periphery of the metal layer 20. Two directions parallel to the one surface 201 and the other surface 202 and perpendicular to each other are defined as the x direction and the y direction, respectively. Specifically, the longitudinal direction of the rectangular resin layer 11, metal layer 20, etc. is defined as the x direction, and the lateral direction of the resin layer 11, metal layer 20, etc. is defined as the y direction.

[0022] A method for manufacturing the semiconductor device 1 will be described with reference to FIGS. 3A to 3F. In the step shown in FIG. 3A, a resin layer 11 having a metal layer 20 formed over the entire lower surface is prepared. In the step shown in FIG. 3B, a core layer 13 having a Cu layer 131, a resin layer 132, and a Cu layer 133 laminated in this order is attached to the upper surface of the resin layer 11. In the step shown in FIG. 3C, a heat sink 12 having a recess formed in the inner periphery of its upper surface and a semiconductor element 15 having a wiring layer 16 formed on its upper surface are prepared, and the semiconductor element 15 is bonded to the recess of the heat sink 12 via an Ag layer 14. Then, the heat sink 12 with the semiconductor element 15 bonded thereto is placed on the portion of the upper surface of the resin layer 11 that is surrounded by the core layer 13.

[0023] 3D, heat sink 12, core layer 13, Ag layer 14, semiconductor element 15, and wiring layer 16 are sealed with sealing resin 17, and then through holes are formed in the upper part of sealing resin 17 using a drill or the like to expose the outer periphery of wiring layer 16 and heat sink 12. Then, a conductive material such as Cu is applied to the inside of the through holes and the upper surface of sealing resin 17 to form through electrodes 18 and wiring layer 19.

[0024] In the step shown in FIG. 3E, the wiring layer 19 is patterned. Also, in the step shown in FIG. 3E, the recess 204 is formed. The patterning of the wiring layer 19 and the formation of the recess 204 can be performed using the same processing method. For example, these can be performed using etching, mechanical processing, or the like. By using the same processing method for the patterning of the wiring layer 19 and the formation of the recess 204, these can be performed in the same step.

[0025] 3F, a TIM is applied to the recess 204 to form the bonding material 21. Then, a cooling component 30 is attached to the lower surfaces of the metal layer 20 and the bonding material 21, thereby forming the semiconductor device 1 shown in FIG.

[0026] The effects of this embodiment will be described. For example, as shown in Fig. 4, it is assumed that a metal layer 20 is formed on the entire lower surface of a resin layer 11, the other surface 202 is made flat, a bonding material 21 is applied to the entire other surface 202, and a cooling component 30 is attached to the lower surface of the bonding material 21. In this case, since the bonding material 21 is applied to the other surface 202 which is made flat, there is a risk that the bonding material 21 will flow out.

[0027] In contrast to this, in this embodiment, the bonding material 21 is formed inside the recess 204, and therefore the step between the bottom surface of the recess 204 and the other surface 202 can prevent the bonding material 21 from flowing out.

[0028] As described above, in this embodiment, since the bonding material 21 is disposed in the recess 204, it is possible to prevent the bonding material 21 from flowing out. Furthermore, by using the metal layer 20, which is used to protect the resin layer 11, to hold the bonding material 21, an additional component for holding the bonding material 21 is not required. Furthermore, the recess 204 can be formed in the same process as the patterning of the wiring layer 19. Therefore, it is possible to prevent an increase in the manufacturing cost of the semiconductor device 1.

[0029] Furthermore, according to the above embodiment, the following effects can be obtained.

[0030] (1) The recess 204 is entirely surrounded by the outer periphery of the metal layer 20. This results in the bonding material 21 disposed inside the recess 204 being entirely surrounded by the outer periphery of the metal layer 20, which further suppresses the outflow of the bonding material 21.

[0031] (Second embodiment) The second embodiment will be described. This embodiment is different from the first embodiment in that the shape of the recess 204 is changed, but other aspects are the same as the first embodiment, so only the differences from the first embodiment will be described.

[0032] 5, the recess 204 of this embodiment opens so as to penetrate a part of the outer periphery of the metal layer 20 in a direction parallel to the one surface 201 and the other surface 202. That is, the outer periphery of the metal layer 20 is interrupted by the recess 204. The bonding material 21 is exposed on the side surface 203 from the penetrating portion of the recess 204.

[0033] 5, the recesses 204 penetrate the outer periphery of the metal layer 20 at four locations, two on each side in the x direction, but the number of penetrating portions of the recesses 204 may be three or less, or five or more. Furthermore, the recesses 204 may penetrate the outer periphery of the metal layer 20 on either or both of the one side and the other side in the y direction.

[0034] This embodiment has the same configuration and operation as the first embodiment, and can therefore obtain the same effects as the first embodiment.

[0035] (Third embodiment) The third embodiment will be described. This embodiment is the same as the first embodiment except that the shape of the recess 204 is changed, and therefore only the differences from the first embodiment will be described.

[0036] 6, region R1 is a portion of metal layer 20 facing semiconductor element 15. As shown in Fig. 6, recess 204 of this embodiment opens in a portion away from region R1. Specifically, recess 204 opens in the shape of a rectangular frame along the outer periphery of metal layer 20 on other surface 202 so as to surround region R1.

[0037] This embodiment has the same configuration and operation as the first embodiment, and can therefore obtain the same effects as the first embodiment.

[0038] Furthermore, according to the above embodiment, the following effects can be obtained.

[0039] (1) The recess 204 opens to a portion away from the region R1. When the metal layer 20 is made of Cu or the like and the bonding material 21 is made of TIM or the like, the thermal conductivity of the metal layer 20 is higher than that of the bonding material 21. Therefore, by forming the recess 204 in this manner and leaving the portion of the metal layer 20 facing the semiconductor element 15, the cooling efficiency of the semiconductor element 15 is improved compared to when this portion of the metal layer 20 is removed.

[0040] (Fourth embodiment) The fourth embodiment will be described. This embodiment is the same as the third embodiment except that the shape of the recess 204 is changed, and therefore only the differences from the third embodiment will be described.

[0041] 7, the recesses 204 of this embodiment are opened in a stripe pattern in the inner periphery of the metal layer 20. As a result, the metal layer 20 is divided into stripes and arranged in the region R1. Note that in FIG. 7, the recesses 204 and the inner periphery of the metal layer 20 are arranged in a stripe pattern parallel to the x direction, but they may also be arranged in a stripe pattern parallel to the y direction.

[0042] This embodiment has the same configuration and operation as the first and third embodiments, and can therefore obtain the same effects as the first and third embodiments.

[0043] (Fifth embodiment) The fifth embodiment will be described. This embodiment is the same as the third embodiment except that the shape of the recess 204 is changed, and therefore only the differences from the third embodiment will be described.

[0044] 8, the recesses 204 of this embodiment are opened in a lattice pattern in the inner periphery of the metal layer 20. As a result, the metal layer 20 has a shape in which a plurality of rectangular plate-shaped portions are arranged in an array in the region R1.

[0045] This embodiment has the same configuration and operation as the first and third embodiments, and can therefore obtain the same effects as the first and third embodiments.

[0046] (Sixth embodiment) The sixth embodiment will be described. This embodiment is the same as the third embodiment except that the shape of the recess 204 is changed, and therefore only the differences from the third embodiment will be described.

[0047] As shown in FIG. 9, the recess 204 of this embodiment is formed so as to leave a portion connecting the region R1 of the metal layer 20 with the outer periphery.

[0048] 9, a plurality of recesses 204 are formed. In region R1, the metal layer 20 is left without being removed, and four L-shaped recesses 204 are formed along the corners of region R1 and the corners of the outer periphery of the metal layer 20. Furthermore, four linear recesses 204 parallel to the x direction are formed in a portion of the metal layer 20 located outside the four L-shaped recesses 204 in the y direction. Furthermore, four linear recesses 204 opening to the other surface 202 and the side surface 203 are formed in a portion of the outer periphery of the metal layer 20 parallel to the y direction.

[0049] This embodiment has the same configuration and operation as the first and third embodiments, and can therefore obtain the same effects as the first and third embodiments.

[0050] Furthermore, according to the above embodiment, the following effects can be obtained.

[0051] (1) The recess 204 is formed to leave a portion that connects the region R1 and the outer periphery of the metal layer 20. This connects the region R1 and the outer periphery of the metal layer 20, thereby improving the cooling efficiency of the semiconductor element 15.

[0052] (Other embodiments) The present disclosure is not limited to the above-described embodiments and can be modified as appropriate. Furthermore, the above-described embodiments are not unrelated to each other and can be combined as appropriate unless the combination is clearly impossible. It goes without saying that the elements constituting the embodiments in the above-described embodiments are not necessarily essential unless they are specifically stated as essential or are considered to be clearly essential in principle. Furthermore, when the numbers, values, amounts, ranges, etc. of the components of the embodiments are mentioned in the above-described embodiments, they are not limited to the specific numbers unless they are specifically stated as essential or are clearly limited to a specific number in principle. Furthermore, when the shapes, positional relationships, etc. of the components, etc. are mentioned in the above-described embodiments, they are not limited to the shapes, positional relationships, etc., unless they are specifically stated or are limited to a specific shape, positional relationship, etc. in principle.

[0053] For example, the entire recess 204 does not have to be filled with the bonding material 21. The recess 204 may be filled with the bonding material 21 only in part, with the resin layer 11 exposed in the remaining part. [Explanation of symbols]

[0054] 11 Resin layer 12 Heat sink 15 Semiconductor elements 20 metal layer 21 Bonding material 30 Cooling parts

Claims

1. A semiconductor device, A resin layer (11); a heat sink (12) disposed on the upper surface of the resin layer; A semiconductor element (15) disposed on the upper surface of the heat sink; a metal layer (20) and a bonding material (21) disposed on the lower surface of the resin layer; a cooling component (30) joined to the resin layer via the joining material, The metal layer has a recess (204) formed therein, the recess (204) opening to a surface (202) opposite to a surface (201) facing the resin layer, The bonding material is disposed in the recess.

2. 2. The semiconductor device according to claim 1, wherein the bonding material is made of an organic material.

3. The semiconductor device according to claim 1 , wherein the recess is entirely surrounded by an outer periphery of the metal layer.

4. the recessed portion is open so as to penetrate a part of the outer periphery of the metal layer in a direction parallel to the one surface, 2. The semiconductor device according to claim 1, wherein the bonding material is exposed on a side surface of the metal layer from the penetrating portion of the recess.

5. The semiconductor device according to claim 1 , wherein the recess has a frame-shaped opening.

6. The semiconductor device according to claim 1 , wherein the recessed portion is opened in a stripe shape in the inner periphery of the metal layer.

7. The semiconductor device according to claim 1 , wherein the recessed portion is open in a lattice pattern in the inner periphery of the metal layer.

8. 2. The semiconductor device according to claim 1, wherein the recessed portion is open to a portion of the metal layer that is away from a portion facing the semiconductor element.

9. 2. The semiconductor device according to claim 1, wherein the recess is formed so as to leave a portion of the metal layer that connects a portion facing the semiconductor element with an outer periphery.

10. A method for manufacturing a semiconductor device, comprising: Providing a resin layer (11); placing a heat sink (12) on the upper surface of the resin layer; placing a semiconductor element (15) on the upper surface of the heat sink; Placing a metal layer (20) on the lower surface of the resin layer; forming a recess (204) in the metal layer, the recess (204) opening to a surface (202) opposite to a surface (201) facing the resin layer; Placing a bonding material (21) in the recess; and joining a cooling component (30) to the resin layer via the joining material.

11. forming a sealing resin (17) that seals the semiconductor element; forming a wiring layer (19) on the upper surface of the sealing resin; patterning the wiring layer; The method for manufacturing a semiconductor device according to claim 10 , wherein the patterning is performed using the same processing method as that used to form the recess.

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