Light-emitting diode

Abstract

The present invention provides a light-emitting diode that can reduce the line width of the electrodes and lower the resistance. [Solution] The semiconductor light-emitting structure 20 includes a P-type semiconductor layer 21, a light-emitting layer 22, and an N-type semiconductor layer 23. The P-type semiconductor layer is located on the substrate 10. The light-emitting layer is located on the P-type semiconductor layer. The N-type semiconductor layer is located on the light-emitting layer. The P-type semiconductor layer includes opposing first side 211 and second side 212. The substrate is connected to the first side. The light-emitting layer is connected to the second side. The P-type electrode 30 is embedded in the P-type semiconductor layer from the second side toward the first side. Each side of the embedded portion of the P-type electrode is in contact with the P-type semiconductor layer. The N-type electrode 40 is located on the N-type semiconductor layer.

Description

Technical Field

[0001] The present invention relates to a light-emitting diode, and particularly to a light-emitting diode capable of reducing line width and resistance.

Background Art

[0002] In recent years, light-emitting diodes have been widely used for lighting in various fields and products. Currently, a general light-emitting diode converts electrical energy into light energy by the electroluminescence effect by passing an electric current through the junction interface of two different semiconductor materials. As a result, the light-emitting diode not only emits light with high brightness but also obtains energy-saving and power-saving effects.

[0003] In a conventional red light-emitting diode, a P-type semiconductor layer, a light-emitting layer, an N-type semiconductor layer, and an N-type electrode are sequentially laminated on a substrate, and a P-type electrode is installed on the exposed P-type semiconductor layer. Since the P-type electrode requires a sufficient line width and has no transparency, the light-emitting surface of the red light-emitting diode is blocked by the P-type electrode, and the light-emitting area is reduced. Therefore, it is difficult to improve the overall brightness of the light-emitting diode.

[0004] Therefore, how to design a light-emitting diode that can improve the above problems is a research-worthy issue.

Summary of the Invention

[0005] An object of the present invention is to provide a light-emitting diode capable of reducing line width and resistance.

[0006] To achieve the above objective, the light-emitting diode of the present invention includes a substrate, a semiconductor light-emitting structure, a P-type electrode, and an N-type electrode. The semiconductor light-emitting structure includes a P-type semiconductor layer, a light-emitting layer, and an N-type semiconductor layer. The P-type semiconductor layer is located on the substrate. The light-emitting layer is located on the P-type semiconductor layer. The N-type semiconductor layer is located on the light-emitting layer. The P-type semiconductor layer includes opposing first and second sides. The substrate is connected to the first side. The light-emitting layer is connected to the second side. The P-type electrode is embedded in the P-type semiconductor layer from the second side toward the first side. Each side of the embedded portion of the P-type electrode is in contact with the P-type semiconductor layer. The N-type electrode is located on the N-type semiconductor layer.

[0007] In an embodiment of the present invention, the second side of the P-type semiconductor layer includes an installation region, and the installation region is a accommodating space that extends from the surface of the second side toward the first side to a predetermined depth.

[0008] In the embodiments of the present invention, the planned depth is less than the thickness of the P-type semiconductor layer and is 10 μm or less.

[0009] In the embodiment of the present invention, the installation area is horizontally separated from the light-emitting layer and the N-type semiconductor layer of the semiconductor light-emitting structure.

[0010] In embodiments of the present invention, the P-type semiconductor layer is made of a P-type gallium phosphide material, and the N-type semiconductor layer is made of an N-type aluminum gallium indium phosphide material.

[0011] In the embodiment of the present invention, the horizontal cross-sectional area of ​​the P-type electrode is 3% or more of the total horizontal cross-sectional area of ​​the light-emitting diode.

[0012] In the embodiment of the present invention, the intended wavelength of the semiconductor light-emitting structure is from 590 nm to 1050 nm.

[0013] In embodiments of the present invention, a junction layer is further included between the substrate and the P-type semiconductor layer, and the junction layer is made of silicon dioxide material.

[0014] In the embodiments of the present invention, the P-type electrode is made of a beryllium gold alloy material or a zinc gold alloy material.

[0015] In the embodiment of the present invention, the substrate is a sapphire substrate.

[0016] In this invention, by embedding the P-type electrode of the light-emitting diode within a P-type semiconductor layer, the contact area between the P-type electrode and the P-type semiconductor layer can be increased, thereby reducing the resistance of the P-type electrode. Therefore, in circuit design, the line width of the P-type electrode can be reduced, increasing the light-emitting area, which in turn improves the overall brightness of the light-emitting diode. [Brief explanation of the drawing]

[0017] [Figure 1] Plan view showing the light-emitting diode of the present invention [Figure 2] Cross-sectional view of the light-emitting diode of the present invention along line AA in Figure 1. [Figure 3] This figure shows the manufacturing process of the light-emitting diode of the present invention. [Modes for carrying out the invention]

[0018] Each embodiment and example is merely illustrative and not limiting; other embodiments and examples can be made by a person of ordinary skill after referring to this specification without departing from the scope of the invention. The features and advantages of embodiments of the invention will become more apparent from the following detailed description and claims.

[0019] In this specification, the terms “one” or “one” are used to describe the elements and components described herein. This is for convenience and to give a general meaning to the scope of the invention. Thus, unless otherwise intended, such descriptions are understood to include one or at least one, and the singular form also includes the plural form.

[0020] In this specification, the ordinal numbers "first" and "second" are used primarily to distinguish or refer to identical or similar components or structures, and do not necessarily imply a spatial or temporal order of these components or structures. It should be noted that in certain situations or configurations, ordinal numbers may be used interchangeably without affecting the implementation of the invention.

[0021] In this specification, “equipped with,” “possessing,” or other similar terms refer to non-exclusive inclusion. For example, a component or structure containing multiple elements is not limited to the elements listed herein, and may include other elements that are not explicitly listed but are inherent to the component or structure.

[0022] The explanation will be given with reference to Figures 1 and 2. Figure 1 is a plan view showing the light-emitting diode of the present invention. Figure 2 is a cross-sectional view of the light-emitting diode of the present invention along line AA in Figure 1. As shown in Figures 1 and 2, the light-emitting diode 1 of the present invention mainly comprises a substrate 10, a semiconductor light-emitting structure 20, a P-type electrode 30, and an N-type electrode 40. The substrate 10 is the base member of the light-emitting diode 1 of the present invention and supports the semiconductor light-emitting structure 20, the P-type electrode 30, the N-type electrode 40, and other elements. In the present invention, the substrate 10 is made of single-sided polished sapphire material, but other common substrate materials can also be used.

[0023] The semiconductor light-emitting structure 20 is located on the substrate 10. The semiconductor light-emitting structure 20 emits light of a predetermined wavelength during conduction. The semiconductor light-emitting structure 20 is an epitaxial stack structure and includes a P-type semiconductor layer 21, a light-emitting layer 22, and an N-type semiconductor layer 23. The P-type semiconductor layer 21 is located on the substrate 10. The light-emitting layer 22 is located on the P-type semiconductor layer 21. The N-type semiconductor layer 23 is located on the light-emitting layer 22. In an embodiment of the present invention, the P-type semiconductor layer 21 is made of a P-type gallium phosphide (P-GaP) material. The light-emitting layer 22 is a multiple quantum well (MQW) layer. The N-type semiconductor layer 23 is made of an N-type aluminum gallium indium phosphide (N-AlGaInP) material. Therefore, the semiconductor light-emitting structure 20 is a P-MQW-N epitaxial stack structure.

[0024] The P-type semiconductor layer 21 includes an opposing first side 211 and a second side 212. The first side 211 faces and is close to the substrate 10. The second side 212 is away from the substrate 10. The P-type semiconductor layer 21 is connected to the substrate 10 by the first side 211. The P-type semiconductor layer 21 is connected to the light-emitting layer 23 and the P-type electrode 30 by the second side 212. In the present invention, the P-type electrode 30 is embedded into the P-type semiconductor layer 21 from the second side 212 of the P-type semiconductor layer 21 toward the first side 211 (or the substrate 10). At least a part of each side surface of the P-type electrode 30 is in contact with the P-type semiconductor layer 21. Thereby, the contact area between the P-type electrode 30 and the P-type semiconductor layer 21 can be increased.

[0025] Specifically, in an embodiment of the present invention, the second side 212 of the P-type semiconductor layer 21 includes an installation region B. The installation region B is a housing space extending from the surface of the second side 212 to a predetermined depth D toward the first side 211. The housing space is for installing the P-type electrode 30. Thereby, at least a part of the P-type electrode 30 is embedded into the P-type semiconductor layer 21. In an embodiment of the present invention, the predetermined depth D is smaller than the thickness of the P-type semiconductor layer 21. The predetermined depth D is 10 μm or less. In the structural design, the installation region B is horizontally separated from the light-emitting layer 22 and the N-type semiconductor layer 23 of the semiconductor light-emitting structure 20 and does not directly contact them.

[0026] Therefore, the portion embedded in the P-type semiconductor layer 21 of the P-type electrode 30 can effectively increase the contact area between the P-type electrode 30 and the P-type semiconductor layer 21, thereby reducing the resistance. For this reason, there is no need to increase the original design line width of the P-type electrode 30. By reducing the design line width and decreasing the electrode area, the light-emitting area can be increased. Also, in the embodiments of the present invention, the P-type electrode 30 is made of a beryllium gold (BeAu) alloy material or a zinc gold (ZnAu) alloy material, but the present invention is not limited thereto.

[0027] In the design, in the present invention, there are specific limiting conditions for the area occupied by the P-type electrode 30 of the light-emitting diode 1 with respect to the chip area of the light-emitting diode 1. To prevent the chip voltage of the light-emitting diode 1 of the present invention from becoming high, in the embodiments of the present invention, the cross-sectional area of the P-type electrode 30 in the horizontal direction (that is, the area of the installation region B in FIG. 1) is 3% or more of the total cross-sectional area of the light-emitting diode 1 in the horizontal direction (that is, the cross-sectional area of the P-type semiconductor layer 21 in the horizontal direction in FIGS. 1 and 2). Thereby, the effect of voltage stability can be achieved. Preferably, in the embodiments of the present invention, the cross-sectional area of the P-type electrode 30 in the horizontal direction is about 3% to 20% of the total cross-sectional area of the light-emitting diode 1 in the horizontal direction. <000009​​​​​​​​​​In the embodiments of the present invention, the light-emitting diode 1 includes a junction layer 50. The junction layer 50 is located between the substrate 10 and the P-type semiconductor layer 21 of the semiconductor light-emitting structure 20. The junction layer 50 is made of silicon dioxide (SiO2) material. The junction layer 50 improves the bonding effect between the substrate 10 and the semiconductor light-emitting structure 20, but the present invention is not limited thereto. The junction layer 50 can also be manufactured from other materials that can provide a similar effect.

[0031] The manufacturing process of the light-emitting diode 1 of the present invention will be described below. Figure 3 is a diagram showing the manufacturing process of the light-emitting diode of the present invention. As shown in Figure 3, first a gallium arsenide (GaAs) substrate is prepared as an epitaxial substrate. A semiconductor epitaxial manufacturing process is performed on the gallium arsenide substrate to form a semiconductor light-emitting structure 20 including a P-type semiconductor layer 21, a light-emitting layer 22, and an N-type semiconductor layer 23. Next, a surface roughening process is performed on the exposed side of the P-type semiconductor layer 21. After roughening, a bonding layer 50 is formed on the exposed side. The substrate 10 is bonded to the semiconductor light-emitting structure 20 by the bonding layer 50. After the substrate 10 and the semiconductor light-emitting structure 20 are bonded, the gallium arsenide substrate is removed, resulting in the structure shown in Figure 3(a). A mesa (MESA) process is performed on the semiconductor light-emitting structure 20, thereby forming a planar region for forming an installation region B on the second side 212 of the P-type semiconductor layer 21 of the semiconductor light-emitting structure 20, resulting in the structure shown in Figure 3(b).

[0032] After the mesa process, the semiconductor light-emitting structure 20 is then subjected to a yellow light photolithography process and a dry (or wet) etching process to form an installation region B with a predetermined depth on the second side 212 of the P-type semiconductor layer 21, resulting in the structure shown in Figure 3(c). Next, a yellow light photolithography process and a vapor deposition process are performed to form a P-type electrode 30 embedded to a predetermined depth within the installation region B of the P-type semiconductor layer 21, resulting in the structure shown in Figure 3(d). Finally, the same yellow light photolithography process and vapor deposition process are performed to form an N-type electrode 40 on the N-type semiconductor layer 23, resulting in the light-emitting diode 1 shown in Figures 1 and 2. This largely completes the manufacturing process of the light-emitting diode 1 of the present invention.

[0033] The design of this invention allows for increasing the contact area between the P-type electrode and the P-type semiconductor layer, thereby reducing the resistance of the P-type electrode, by embedding the P-type electrode within the P-type semiconductor layer. Therefore, in circuit design, the line width of the P-type electrode can be reduced, increasing the light-emitting area and improving the overall brightness of the light-emitting diode.

[0034] The embodiments described above are illustrative and not intended to limit the embodiments or uses of the present invention. Furthermore, while the embodiments described above show at least one exemplary example, it should be understood that numerous variations of the invention are possible. Also, the embodiments described herein are not intended to limit the claims, uses, or configurations in any way. Rather, the embodiments described above provide a guide for a person of ordinary skill in the art to carry out one or more embodiments. Furthermore, changes can be made to the function and arrangement of elements without departing from the claims. The claims include all known and foreseeable equivalents as of the filing of this patent application. [Explanation of symbols]

[0035] 1 Light-emitting diode 10 circuit boards 20 Semiconductor light-emitting structures 21 P-type semiconductor layer 211 1st side 212 2nd side 22. Emitting layer 23 N-type semiconductor layer 30 P type electrode 40 N-type electrode 50 Bonding layer B Installation area D Planned depth

Claims

1. It is a light-emitting diode, circuit board and A semiconductor light-emitting structure comprising a P-type semiconductor layer located on the substrate, a light-emitting layer located on the P-type semiconductor layer, and an N-type semiconductor layer located on the light-emitting layer, wherein the P-type semiconductor layer includes opposing first and second sides, the substrate is connected to the first side, and the light-emitting layer is connected to the second side. A P-type electrode is embedded in the P-type semiconductor layer from the second side toward the first side, with each side of the embedded portion in contact with the P-type semiconductor layer. A light-emitting diode comprising an N-type electrode located on the aforementioned N-type semiconductor layer.

2. The second side of the P-type semiconductor layer includes an installation area. The light-emitting diode according to claim 1, characterized in that the installation area is a housing space that extends from the surface on the second side toward the first side to a predetermined depth.

3. The light-emitting diode according to claim 2, characterized in that the planned depth is smaller than the thickness of the P-type semiconductor layer and is 10 μm or less.

4. The light-emitting diode according to claim 2, characterized in that the installation area is horizontally separated from the light-emitting layer and the N-type semiconductor layer of the semiconductor light-emitting structure.

5. The aforementioned P-type semiconductor layer is made of a P-type gallium phosphide material. The light-emitting diode according to claim 1, characterized in that the N-type semiconductor layer is made of N-type aluminum gallium indium phosphide material.

6. The light-emitting diode according to claim 1, characterized in that the horizontal cross-sectional area of ​​the P-type electrode is 3% or more of the total horizontal cross-sectional area of ​​the light-emitting diode.

7. The light-emitting diode according to claim 1, characterized in that the planned wavelength of the semiconductor light-emitting structure is from 590 nm to 1050 nm.

8. The material further includes a junction layer located between the substrate and the P-type semiconductor layer, The light-emitting diode according to claim 1, characterized in that the junction layer is made of silicon dioxide material.

9. The light-emitting diode according to claim 1, characterized in that the P-type electrode is made of a beryllium gold alloy material or a zinc gold alloy material.

10. The light-emitting diode according to claim 1, characterized in that the substrate is a sapphire substrate.

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