Electronic component embedded module and method for manufacturing an electronic component embedded module
The electronic component-embedded module with a seed layer in the connection hole improves conductor connection reliability by ensuring better adhesion, addressing the challenge of connection failures in existing modules.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-09-05
- Publication Date
- 2026-03-17
AI Technical Summary
Existing electronic component built-in modules face challenges in improving connection reliability between conductors through connection holes.
The solution involves an electronic component-embedded module comprising an electronic component, a first conductor layer, and an insulating layer, with a connection hole containing a seed layer comprising a conductive film and an adhesion film, which enhances adhesion to the connection hole's wall surface, thereby improving conductor connection reliability.
This configuration suppresses connection failures due to seed layer peeling, enhancing the reliability of conductor connections through the connection holes.
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Figure 2026048166000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to an electronic component built-in module and a method for manufacturing the same.
Background Art
[0002] In recent years, electronic component built-in modules in which electronic components are incorporated have attracted attention. The electronic component built-in module functions as an interposer that connects, for example, a semiconductor element and a mounting substrate (see, for example, Patent Document 1).
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] In such an electronic component built-in module, it is desirable to improve the connection reliability between conductors through connection holes.
[0005] The present invention has been made in view of the above circumstances, and an object thereof is to provide an electronic component built-in module and a method for manufacturing the same that can improve the connection reliability between conductors through connection holes.
Means for Solving the Problems
[0006] The above problems are achieved by the following means.
[0007] (1) An electronic component-embedded module comprising at least an electronic component, a first conductor layer, and an insulating layer, wherein the electronic component has a first terminal surface and a first terminal electrode provided on the first terminal surface, the first conductor layer is provided facing the first terminal surface, the insulating layer is provided between the first conductor layer and the first terminal surface, and the insulating layer has a connection hole for electrically connecting the first terminal electrode and the first conductor layer, and the connection hole is provided with a seed layer including a conductive film and an adhesion film provided between the conductive film and the wall surface of the connection hole.
[0008] (2) The electronic component-embedded module according to (1) above, further comprising a metal film provided between the first conductor layer and the insulating layer, wherein the metal film has an opening that communicates with the connection hole.
[0009] (3) The seed layer is further provided in the opening as an electronic component-embedded module as described in (2) above.
[0010] (4) The electronic component-embedded module according to (3) above, wherein the seed layer is provided in the connection hole through the opening from the surface of the metal film.
[0011] (5) The electronic component-embedded module according to (4) above, wherein the adhesion film is provided from the surface of the metal film to the outside of the edge of the metal film.
[0012] (6) An electronic component-embedded module according to any one of (1) to (5) above, wherein the conductive film contains copper (Cu) and the adhesion film contains titanium (Ti).
[0013] (7) An electronic component-embedded module according to any one of (1) to (6) above, wherein at least one of the conductive film and the adhesion film includes a sputtered film.
[0014] (8) The contact film is in contact with the wall surface of the connection hole, and is an electronic component-embedded module as described in any of (1) to (7) above.
[0015] (9) An electronic component-embedded module according to any of (1) to (8) above, wherein the diameter of the connection holes is substantially the same across the thickness direction of the insulating layer.
[0016] (10) The electronic component-embedded module according to any one of (1) to (9) above, wherein the thickness of the conductive film and the adhesion film increases as they approach the first terminal electrode.
[0017] (11) The insulating layer is an electronic component-embedded module according to any of (1) to (10) above, comprising an organic insulating material.
[0018] (12) The electronic component-integrated module further comprises a second conductor layer, the electronic component further comprises a second terminal surface facing the first terminal surface and a second terminal electrode provided on the second terminal surface, and the second terminal electrode is electrically connected to the second conductor layer, according to any one of (1) to (11) above.
[0019] (13) An electronic component-embedded module according to any of (1) to (12) above, having a plurality of the aforementioned electronic components.
[0020] (14) The electronic component module described in (13) above, wherein the plurality of electronic components include electronic components having different thicknesses from each other.
[0021] (15) A method for manufacturing an electronic component module, comprising the steps of: (a) providing an adhesive layer on a support substrate; (b) bonding an electronic component having terminal electrodes on its terminal surface to the support substrate via the adhesive layer such that the terminal surface and the support substrate face each other; (c) removing the support substrate after bonding the electronic component to the support substrate; (d) forming holes in the adhesive layer that reach from the surface of the adhesive layer to the terminal electrodes; (e) forming an adhesion film and a conductive film in the holes in that order to form a seed layer; and (f) forming a conductor electrically connected to the terminal electrodes via the seed layer.
[0022] (16) In the step (a), the adhesive layer is provided on the support substrate via a metal film. In the step (d), an opening is formed in the metal film, and the hole portion communicating with the opening is formed. The method for manufacturing an electronic component - incorporated module according to (15) above.
[0023] (17) In the step (e), the adhesion film and the conductive film are formed using a sputtering method. The method for manufacturing an electronic component - incorporated module according to (15) or (16) above.
[0024] (18) In the step (d), the hole portion is formed in the adhesive layer using a dry - etching method. The method for manufacturing an electronic component - incorporated module according to any one of (15) to (17) above.
Advantages of the Invention
[0025] In the electronic component - incorporated module and the method for manufacturing an electronic component - incorporated module according to the present invention, since the seed layer provided in the connection hole contains an adhesion film, the seed layer is likely to adhere to the wall surface of the connection hole. As a result, the occurrence of connection failure between the first terminal electrode and the first conductor layer due to the peeling of the seed layer can be suppressed. Therefore, it becomes possible to improve the connection reliability between conductors through the connection hole.
Brief Description of the Drawings
[0026] [Figure 1] It is a cross - sectional view showing an example of the configuration of an electronic device including an electronic component - incorporated module according to an embodiment of the present invention. [Figure 2] It is a cross - sectional view showing an enlarged view of the vicinity of the connection hole shown in FIG. 1. [Figure 3] It is a cross - sectional view showing a step of the method for manufacturing the electronic device shown in FIG. 1. [Figure 4] It is a cross - sectional view showing a step following FIG. 3. [Figure 5] It is a cross - sectional view showing a step following FIG. 4. [Figure 6] It is a cross - sectional view showing a step following FIG. 5. [Figure 7]This is a cross-sectional view showing the process that follows Figure 6. [Figure 8] This is a cross-sectional view showing the process that follows Figure 7. [Figure 9] This is a cross-sectional view showing the process following Figure 8. [Figure 10] This is a cross-sectional view showing the process that follows Figure 9. [Figure 11] This is a cross-sectional view showing the process following Figure 10. [Figure 12] This is a cross-sectional view showing the process following Figure 11. [Figure 13] This is a cross-sectional view showing the process that follows Figure 12. [Figure 14] This is a cross-sectional view showing the process that follows Figure 13. [Figure 15] This is a cross-sectional view showing the process following Figure 14. [Figure 16] This is a cross-sectional view showing the process that follows Figure 15. [Figure 17] This is a cross-sectional view showing the process that follows Figure 16. [Figure 18] This is a cross-sectional view showing the process that follows Figure 17. [Figure 19] This is a cross-sectional view showing the process that follows Figure 18. [Figure 20] This is a cross-sectional view showing the process following Figure 19. [Figure 21] This is a cross-sectional view showing the process following Figure 20. [Figure 22] This is a cross-sectional view showing the process following Figure 21. [Figure 23] This is a cross-sectional view showing the process following Figure 22. [Figure 24] This is a cross-sectional view showing the process following Figure 23. [Figure 25] This is a cross-sectional view showing the process following Figure 24. [Figure 26] This is a cross-sectional view showing the process following Figure 25. [Figure 27] This is a cross-sectional view showing the process that follows Figure 26. [Figure 28] This is a cross-sectional view showing the process that follows Figure 27. [Figure 29] This is a cross-sectional view showing the process following Figure 28. [Figure 30] This is a cross-sectional view showing the process following Figure 29. [Figure 31] This is a cross-sectional view showing the process following Figure 30. [Figure 32] This is a cross-sectional view showing the process following Figure 31. [Figure 33] This is a cross-sectional view showing the process following Figure 32. [Figure 34] This is a cross-sectional view showing the process following Figure 33. [Figure 35] This is a cross-sectional view showing the process following Figure 34. [Figure 36] This is a cross-sectional view showing the process following Figure 35. [Figure 37] This is a cross-sectional view showing the process that follows Figure 36. [Figure 38] This is a cross-sectional view showing the process that follows Figure 37. [Figure 39] This is a cross-sectional view showing the process following Figure 38. [Figure 40] This is a cross-sectional view showing the process that follows Figure 39. [Figure 41] This is a cross-sectional view showing the process following Figure 40. [Figure 42] This is a cross-sectional view showing the process following Figure 41. [Figure 43] This is a cross-sectional view showing the process following Figure 42. [Figure 44] This is a cross-sectional view showing the process following Figure 43. [Figure 45] This is a cross-sectional view showing the process following Figure 44. [Figure 46] This is a cross-sectional view showing the process following Figure 45. [Figure 47] This is a cross-sectional view showing the process that follows Figure 46. [Figure 48] This is a cross-sectional view showing the process that follows Figure 47. [Figure 49] This is a cross-sectional view showing the process following Figure 48. [Figure 50] This is a cross-sectional view showing the process following Figure 49. [Figure 51] This is a cross-sectional view showing the process following Figure 50. [Figure 52] This is a cross-sectional view showing the process following Figure 51. [Figure 53] This is a cross-sectional view showing the process following Figure 52. [Figure 54] This is a cross-sectional view showing an example of the configuration of the main part of an electronic component-embedded module according to a modified example. [Figure 55] This is a cross-sectional view showing an example of the configuration of an electronic component-embedded module relating to other variations. [Figure 56] This is a cross-sectional view showing an example of the configuration of an electronic component-embedded module relating to other variations. [Figure 57] This is a cross-sectional view showing an example of the configuration of an electronic component-embedded module relating to other variations. [Modes for carrying out the invention]
[0027] Embodiments of the present invention will be described in detail below with reference to the attached drawings. In the following drawings, the same reference numerals refer to the same components, and the size of each component in the drawings is exaggerated for clarity and convenience of explanation. On the other hand, the embodiments described below are merely illustrative, and various modifications are possible from such embodiments.
[0028] In the following, "top" or "above" may include not only things that are directly above and in contact with the object, but also things that are above but not in contact with the object.
[0029] A singular expression includes multiple expressions unless the context clearly indicates otherwise. Furthermore, when a part "contains" or "has" a component, it does not exclude other components, but rather may include other components, unless otherwise specified.
[0030] Furthermore, the use of the term "the aforementioned," and similar demonstrative terms, can be singular or plural.
[0031] Unless explicitly stated otherwise, the steps constituting the method shall be performed in the appropriate order. This order is not necessarily limited to the order in which the steps are described. The use of all examples or illustrative terms (e.g., "for example") is solely for illustrative purposes and is not limited by the scope of the claims.
[0032] <Embodiment> Figure 1 shows an example of the configuration of an electronic device having an electronic component-embedded module (electronic component-embedded module 10) according to one embodiment of the present invention. This electronic device includes, for example, the electronic component-embedded module 10, semiconductor elements 31 and 32, and a mounting substrate 40 as its main components. The electronic component-embedded module 10 functions as an interposer connecting the semiconductor elements 31 and 32 to the mounting substrate 40. In the electronic device, the mounting substrate 40, the electronic component-embedded module 10, and the semiconductor elements 31 and 32 are stacked in this order. In the following description, the stacking direction of the mounting substrate 40, the electronic component-embedded module 10, and the semiconductor elements 31 and 32 may be referred to as the Z direction, the direction perpendicular to the Z direction as the X direction, and the direction perpendicular to both the Z and X directions as the Y direction.
[0033] The semiconductor elements 31 and 32 are, for example, semiconductor chips each having a predetermined function. The semiconductor elements 31 and 32 are, for example, IC (Integrated Circuit) chips or memory chips. The semiconductor element 31 has, for example, a plurality of electrodes 311 on a predetermined plane (for example, the XY plane). The semiconductor element 32 has, for example, a plurality of electrodes 321 on a predetermined plane (for example, the XY plane). The electronic device further has, for example, a sealing layer 33 and a plurality of bumps 35 in the vicinity of the semiconductor elements 31 and 32.
[0034] The sealing layer 33 covers, for example, the semiconductor elements 31 and 32. Multiple bumps 35 electrically connect each of the electrodes 311 and 321 to the electronic component module 10.
[0035] The mounting substrate 40 is, for example, a semiconductor package substrate and a motherboard. The mounting substrate 40 has, for example, a base material 41, a first wiring layer 42, a first electrode 43, a first solder resist layer 44, a second wiring layer 46, a second solder resist layer 47, and a second electrode 48. The first wiring layer 42, the first electrode 43, and the first solder resist layer 44 are provided on one main surface side of the base material 41. The second wiring layer 46, the second solder resist layer 47, and the second electrode 48 are provided on the other main surface side of the base material 41.
[0036] The mounting substrate 40 is electrically connected to the electronic component module 10 via a plurality of bumps 45. The plurality of bumps 45 are provided on the first electrode 43. For example, the spacing between adjacent bumps 45 is greater than the spacing between adjacent bumps 35. Each of the plurality of second electrodes 48 is electrically connected to another component via, for example, a bump 55. For example, the spacing between adjacent bumps 55 is greater than the spacing between adjacent bumps 45. The bumps 35, 45, and 55 contain, for example, solder material.
[0037] (Overall configuration of the electronic component module 10) The electronic component-embedded module 10 includes, for example, a first substrate electrode 11, a relay conductor layer 12, a first conductor layer 13, an adhesive layer 15, an electronic component 16, a second conductor layer 17, a second substrate electrode 18, a first solder resist layer 21, a first insulating layer 22, a second insulating layer 23, and a second solder resist layer 24. Here, the adhesive layer 15 corresponds to one specific example of the insulating layer of the present invention.
[0038] In the electronic component-embedded module 10, the first solder resist layer 21, the first insulating layer 22, the second insulating layer 23, and the second solder resist layer 24 are stacked in this order along the Z direction. For example, the first solder resist layer 21, the first insulating layer 22, the second insulating layer 23, and the second solder resist layer 24 are arranged in this order from a position close to the semiconductor elements 31, 32. The first solder resist layer 21 and the second solder resist layer 24 contain, for example, organic insulating materials such as epoxy resin, phenolic resin, and acrylic resin. The first solder resist layer 21 and the second solder resist layer 24 may also contain fillers.
[0039] The first insulating layer 22 and the second insulating layer 23 include, for example, organic insulating materials such as epoxy resin, phenolic resin, acrylic resin, polyimide resin, and liquid crystal polymer. The first insulating layer 22 and the second insulating layer 23 may also contain fillers. The first insulating layer 22 and the second insulating layer 23 may also contain inorganic insulating materials.
[0040] The first substrate electrode 11 is located on one end face in the Z direction of the electronic component module 10 (for example, the XY plane). The second substrate electrode 18 is located on the other end face in the Z direction of the electronic component module 10 (for example, the XY plane). The first substrate electrode 11 is provided, for example, in an opening in the first solder resist layer 21 (opening 21M in Figure 47, described later). The second substrate electrode 18 is provided, for example, in an opening in the second solder resist layer 24 (opening 24M in Figure 24, described later). The electronic component module 10 has, for example, a plurality of first substrate electrodes 11 and a plurality of second substrate electrodes 18.
[0041] The first substrate electrode 11 is provided at positions corresponding to, for example, the electrode 311 of the semiconductor element 31 and the electrode 321 of the semiconductor element 32. The second substrate electrode 18 is provided at positions corresponding to, for example, the first electrode 43 of the mounting substrate 40. The first substrate electrode 11 is electrically connected to the electrodes 311 and 321 via bumps 35. The second substrate electrode 18 is electrically connected to the first electrode 43 via bumps 45. The first substrate electrode 11 and the second substrate electrode 18 each contain a conductive metallic material such as gold, copper, nickel, or tin. The constituent materials of the first substrate electrode 11 and the constituent materials of the second substrate electrode 18 may be different. The first substrate electrode 11 and the second substrate electrode 18 include, for example, a plating film.
[0042] The intermediate conductor layer 12 is in contact with, for example, each of the multiple first substrate electrodes 11. For example, the first substrate electrodes 11 are provided in a selective area of the surface of the intermediate conductor layer 12. The intermediate conductor layer 12 is arranged in a predetermined pattern on the upper surface of the first insulating layer 22. For example, the surface and sides of the intermediate conductor layer 12 are covered with the first solder resist layer 21. The intermediate conductor layer 12 contains, for example, a conductive metallic material such as gold, platinum, palladium, silver, copper, aluminum, cobalt, titanium, chromium, nickel, tungsten, iron, tin, indium, or zinc. The intermediate conductor layer 12 contains, for example, copper. The intermediate conductor layer 12 contains, for example, a plating film.
[0043] The first conductor layer 13 plays the role of electrically connecting the intermediate conductor layer 12 and the electronic component 16 (more specifically, the terminal electrode 161 described later). The first conductor layer 13 contains a conductive metallic material such as gold, platinum, palladium, silver, copper, aluminum, cobalt, titanium, chromium, nickel, tungsten, iron, tin, indium, or zinc. The first conductor layer 13 is arranged on the second insulating layer 23 in a predetermined pattern, for example. The first conductor layer 13 is positioned to overlap the electronic component 16 in a planar (XY plane) view, for example. For example, the surface and sides of the first conductor layer 13 are covered by the first insulating layer 22.
[0044] The first insulating layer 22 is provided with a connection hole V1 that reaches the surface of the first conductor layer 13. This connection hole V1 is provided with, for example, a relay conductor layer 12. This electrically connects the first conductor layer 13 and the first substrate electrode 11. The relay conductor layer 12 may be connected to the first conductor layer 13 via a seed layer (for example, the seed layer 121 in Figure 45, described later). The seed layer includes, for example, an adhesion film containing titanium and a conductive film containing copper.
[0045] The adhesive layer 15 is provided between the first insulating layer 22 and the electronic component 16. This adhesive layer 15 plays the role of adhering the electronic component 16 to the first insulating layer 22. The adhesive layer 15 is surrounded by the second insulating layer 23.
[0046] The adhesive layer 15 contains, for example, an organic insulating material such as epoxy resin, phenolic resin, acrylic resin, polyimide resin, and liquid crystal polymer. The adhesive layer 15 may also contain a filler. Preferably, the coefficient of thermal expansion of the adhesive layer 15 is lower than that of the second insulating layer 23. This makes it possible to suppress warping of the electronic component module 10. Preferably, the thermal conductivity of the adhesive layer 15 is higher than that of the second insulating layer 23. This makes it possible to improve the heat dissipation of the electronic component module 10.
[0047] The electronic component 16 is embedded in the second insulating layer 23. The electronic component 16 has a predetermined function, such as an IC, bridge, capacitor, inductor, coil, thermistor, resistor, and fuse. The electronic component 16 is, for example, a semiconductor chip. By having the electronic component 16, the electronic component-embedded module 10 can provide the interposer connecting the semiconductor elements 31, 32 and the mounting substrate 40 with a desired function. This makes it possible to miniaturize and enhance the functionality of electronic devices. The constituent material of the electronic component 16 is different from the constituent material of the first insulating layer 22. The elastic modulus of the electronic component 16 is different from the elastic modulus of the first insulating layer 22.
[0048] The electronic component 16 has, for example, a terminal surface facing the first insulating layer 22 (the terminal surface 16Sa in Figure 2, described later). The electronic component 16 has terminal electrodes 161 on this terminal surface. The electronic component 16 has, for example, a plurality of terminal electrodes 161.
[0049] An adhesive layer 15 is provided between the terminal surface of the electronic component 16 and the first insulating layer 22, and a connection hole V2 is provided in the adhesive layer 15 that reaches the surface of the terminal electrode 161. The connection hole V2 is connected to the first conductor layer 13. As a result, the terminal electrode 161 and the first substrate electrode 11 are electrically connected via the intermediate conductor layer 12 and the first conductor layer 13. For example, the surface of the terminal electrode 161 in the portion corresponding to the connection hole V2 is recessed compared to other portions.
[0050] The second conductor layer 17 is in contact with, for example, each of the multiple second substrate electrodes 18. For example, the second substrate electrodes 18 are provided in a selective area of the surface of the second conductor layer 17. The second conductor layer 17 is arranged in a predetermined pattern on the underside of, for example, the second insulating layer 23. For example, the surface and sides of the second conductor layer 17 are covered with a second solder resist layer 24. The second conductor layer 17 contains, for example, a conductive metallic material such as gold, platinum, palladium, silver, copper, aluminum, cobalt, titanium, chromium, nickel, tungsten, iron, tin, indium, or zinc. The second conductor layer 17 contains, for example, copper. The second conductor layer 17 contains, for example, a plating film.
[0051] The second insulating layer 23, in which the electronic component 16 is embedded, is provided with pillars 14 that connect the second conductor layer 17 and the first conductor layer 13. This electrically connects the first substrate electrode 11 and the second substrate electrode 18 via the intermediate conductor layer 12, the first conductor layer 13, and the second conductor layer 17. The second conductor layer 17 may also be connected to the pillars 14 via a seed layer (for example, the seed layer 171 in Figure 22, described later). The seed layer may include, for example, an adhesion film containing titanium and a conductive film containing copper.
[0052] (Configuration of connection port V2) Figure 2 shows a magnified view of the vicinity of the connection hole V2 shown in Figure 1. The connection hole V2 provided in the adhesive layer 15 electrically connects the first conductor layer 13 and the terminal electrode 161 of the electronic component 16. The terminal electrode 161 is provided on the terminal surface 16Sa of the electronic component 16. The terminal surface 16Sa faces the first insulating layer 22 with the adhesive layer 15 in between. At least a portion of the first conductor layer 13 faces the terminal surface 16Sa with the adhesive layer 15 in between. Here, the terminal surface 16Sa corresponds to a specific example of the first terminal surface of the present invention, and the terminal electrode 161 corresponds to a specific example of the first electrode of the present invention.
[0053] The connection hole V2 has, for example, a circular planar (XY plane) shape. The hole diameter of the connection hole V2 is, for example, 5 μm to 50 μm. The hole diameter of the connection hole V2 is, for example, approximately constant in the thickness direction (Z direction) of the adhesive layer 15. In other words, the hole diameter of the connection hole V2 is substantially the same in the thickness direction of the adhesive layer 15. Substantially the same means that it is the same within the range of errors that occur under various conditions such as manufacturing conditions. The portion of the connection hole V2 that is in contact with the terminal electrode 161 has, for example, a curved surface. A connection hole V2 of this shape is formed, for example, by using a dry etching method.
[0054] The connection hole V2 is provided with, for example, a seed layer 19 together with the first conductor layer 13. The seed layer 19 is provided, for example, from the surface of the adhesive layer 15 to the entire wall surface of the connection hole V2. The first conductor layer 13 is electrically connected to the terminal electrode 161 via this seed layer 19.
[0055] In this embodiment, the seed layer 19 includes an adhesion film 191 and a conductive film 192. The adhesion film 191 is provided between the wall surface of the connection hole V2 and the conductive film 192. The conductive film 192 is provided between the adhesion film 191 and the first conductor layer 13. That is, the adhesion film 191, the conductive film 192, and the first conductor layer 13 are stacked in order from the wall surface side of the connection hole V2. As will be described in detail later, in this embodiment, since the seed layer 19 has an adhesion film 191 between the conductive film 192 and the wall surface of the connection hole V2, the seed layer 19 can easily adhere to the wall surface of the connection hole V2.
[0056] The adhesion between the adhesion film 191 and the adhesive layer 15 is higher than the adhesion between the conductive film 192 and the adhesive layer 15. This makes it easier for the seed layer 19 to adhere to the wall surface of the connection hole V2. The adhesion film 191 is, for example, in contact with the wall surface of the connection hole V2.
[0057] The adhesion film 191 and the conductive film 192 each contain, for example, a conductive metallic material such as gold, platinum, palladium, silver, copper, aluminum, cobalt, titanium, chromium, nickel, tungsten, iron, tin, indium, or zinc. Preferably, the adhesion film 191 and the conductive film 192 contain at least one of copper, aluminum, titanium, and chromium. Preferably, the adhesion film 191 contains titanium, and preferably the conductive film 192 contains copper. This allows the adhesion of the seed layer 19 to be maintained while keeping its thickness down. The wall surface of the connection hole V2 is covered, for example, with the seed layer 19.
[0058] The thickness of the adhesion film 191 and the conductive film 192 varies, for example, in the thickness direction of the adhesive layer 15. The thickness of the adhesion film 191 and the conductive film 192 gradually increases, for example, as you move from the first insulating layer 22 side towards the electronic component 16 side. In other words, the thickness of the adhesion film 191 and the conductive film 192 increases as you move closer to the terminal electrode 161. The thickness of the adhesion film 191 and the conductive film 192 is greatest, for example, in the portion in contact with the terminal electrode 161. The thickness of the adhesion film 191 and the conductive film 192 in their thickest portions is, for example, 10 nm to 50 nm, and the thickness of the adhesion film 191 and the conductive film 192 in their thinnest portions is, for example, 0.5 to 0.99 times the thickness of their thickest portions. Such adhesion film 191 and conductive film 192 can be formed, for example, using a sputtering method. That is, the adhesion film 191 and the conductive film 192 include a sputtered film. At least one of the adhesion film 191 and the conductive film 192 may include a sputtered film. The thickness of the adhesion film 191 and the conductive film 192 should, in general, increase as they approach the terminal electrode 161, but there may be portions where the thickness is locally smaller.
[0059] (Manufacturing methods for electronic equipment) Next, an example of a manufacturing method for electronic devices will be explained using Figures 3 to 53.
[0060] First, a support substrate 100 is prepared (Figure 3). The support substrate 100 includes, for example, a support 101, a first adhesion layer 102, a second adhesion layer 103, a release layer 104, a first seed layer 105, and a second seed layer 106. The support 101 is composed of a plate-like member containing, for example, at least one of glass, silicon (Si), SUS (Stainless Used Steel), ferrite, alumina, and prepreg. It is preferable that the support 101 contains glass in terms of thermal expansion coefficient and surface smoothness. In the support substrate 100, the first adhesion layer 102, the second adhesion layer 103, the release layer 104, the first seed layer 105, and the second seed layer 106 are laminated on the support 101 in this order.
[0061] The first adhesion layer 102, the second adhesion layer 103, the first seed layer 105, and the second seed layer 106 contain conductive metals such as gold, platinum, palladium, silver, copper, aluminum, cobalt, titanium, chromium, nickel, tungsten, iron, tin, indium, or zinc. From the viewpoint of interlayer adhesion, it is preferable that the first adhesion layer 102 and the first seed layer 105 contain titanium. From the viewpoint of conductivity and cost, it is preferable that the second adhesion layer 103 and the second seed layer 106 contain copper. The release layer 104 contains, for example, an inorganic material and copper. The first adhesion layer 102, the second adhesion layer 103, the first seed layer 105, and the second seed layer 106 are formed using, for example, a metal foil pressing method, a plating method, or a sputtering method. The support substrate 100 is made of, for example, HRDP (registered trademark, High Resolution De-bondable Panel).
[0062] Next, a resist film 107 is formed on the second seed layer 106 (Figure 4). Subsequently, an opening 107M is formed in this resist film 107 (Figure 5). The opening 107M is formed, for example, by photolithography.
[0063] After forming an opening 107M in the resist film 107, this opening 107M is used to form an opening 106M in the second seed layer 106 (Figure 6). Subsequently, the resist film 107 is removed (Figure 7). For example, multiple openings 106M are formed.
[0064] After removing the resist film 107, a resist film 108 is formed on the second seed layer 106 (Figure 8). Subsequently, an opening 108M is formed in this resist film 108 (Figure 9). After this, a pillar 14 is formed in this opening 108M (Figure 10), and the resist film 108 is removed (Figure 11).
[0065] After removing the resist film 108, the electronic component 16 is mounted on the portion of the second seed layer 106 where the opening 106M is formed, via the adhesive layer 15. Specifically, after providing the adhesive layer 15 on the second seed layer 106 (Figure 12), the electronic component 16 is mounted on the support substrate 100 so that the main surface of the support substrate 100 and the terminal surface 16Sa face each other (Figure 13). In other words, the electronic component 16 is mounted on the support substrate 100 using a face-down method. This makes it possible to improve alignment accuracy. The adhesive layer 15 may be in any form, such as paste or film, but as an example, it is preferable to use a paste-type adhesive layer 15.
[0066] After mounting the electronic components 16 onto the support substrate 100, a second insulating layer 23 is formed on the support substrate 100 (Figures 14, 15, and 16). The second insulating layer 23 is formed, for example, as follows.
[0067] First, an organic insulating material 23a is formed on the support substrate 100 using a film lamination method or a spin coating method (Figure 14). By forming the second insulating layer 23 using the film lamination method, a second insulating layer 23 with high surface flatness can be formed. Next, this organic insulating material 23a is planarized (Figure 15). For example, the organic insulating material 23a is planarized using the CMP (Chemical Mechanical Polishing) method. In the CMP method, for example, a polishing head 60 is used to planarize the organic insulating material 23a. Note that in Figure 15, a perspective view of the polishing head 60 is shown for clarity. The second insulating layer 23 is formed by planarizing the organic insulating material 23a until one end of the pillar 14 is exposed (Figure 16).
[0068] After forming the second insulating layer 23, a second conductor layer 17 is formed on the second insulating layer 23 (Figures 17 to 20). The second conductor layer 17 is formed using a semi-additive process, for example, as follows.
[0069] First, a seed layer 171 is formed on the second insulating layer 23 (Figure 17). The seed layer 171 includes, for example, an adhesion film 1711 and a conductive film 1712. For example, after forming the adhesion film 1711 on the second insulating layer 23, the conductive film 1712 is formed on the adhesion film 1711. The adhesion film 1711 and the conductive film 1712 include, for example, conductive metallic materials such as titanium, aluminum, and copper. The adhesion film 1711 preferably contains titanium, and the conductive film 1712 preferably contains copper. The seed layer 171 is formed using, for example, electroless plating, sputtering, CVD (chemical vapor deposition), or ALD (Atomic Layer Deposition). The seed layer 171 is preferably formed using the sputtering method.
[0070] After forming the seed layer 171, a resist film 110 is formed on the seed layer 171 (Figure 18). Next, an opening 110M is formed in the resist film 110 (Figure 19). After this, a conductive metal material is plated and grown in the opening 110M of the resist film 110. As a result, a second conductive layer 17 is formed in the opening 110M of the resist film 110 (Figure 20).
[0071] After forming the second conductive layer 17, the resist film 110 is removed (Figure 21). Subsequently, the seed layer 171 exposed from the second conductive layer 17 is removed, for example, by etching (Figure 22). This forms the seed layer 171 and the second conductive layer 17.
[0072] After forming the second conductor layer 17, a second solder resist layer 24 is formed (Figure 23). For example, the second solder resist layer 24 is formed on the second insulating layer 23 so as to cover the second conductor layer 17. Subsequently, an opening 24M is formed in the second solder resist layer 24 (Figure 24). The opening 24M of the second solder resist layer 24 is formed at a position corresponding to the second conductor layer 17. The second solder resist layer 24 is formed, for example, using photolithography or printing.
[0073] After forming an opening 24M in the second solder resist layer 24, a second substrate electrode 18 is formed in this opening 24M (Figure 25). The second substrate electrode 18 is formed, for example, by electroless plating or electrolytic plating.
[0074] After forming the second substrate electrode 18, the support 201 is bonded to the second solder resist layer 24 via a release layer 204 (Figure 26). The support 201 is, for example, a plate-shaped member and is made of the same material as the support 101. The support 201 includes, for example, glass. The release layer 204 includes, for example, epoxy resin or acrylic resin. A film containing a metallic material such as titanium, copper, or nickel may be provided between the second solder resist layer 24 and the release layer 204.
[0075] After bonding the support 201 to the second solder resist layer 24, the support 101 is removed (Figure 27). For example, the release layer 104 and the support 101 are peeled off from the first seed layer 105 by irradiating the release layer 104 with a laser or UV (ultraviolet). Alternatively, the support 101 may be peeled off by using a chemical reaction with chemicals to reduce the adhesion between the release layer 104 and the first seed layer 105. Or, the support 101 may be peeled off by applying physical force to it.
[0076] After removing support 101, support 201 is inverted (Figure 28). This places the first seed layer 105 and the second seed layer 106 on the upper side of support 201.
[0077] Next, the first seed layer 105 is removed (Figure 29). The first seed layer 105 is removed, for example, by a chemical etching method using chemicals. After removing the first seed layer 105, a hole H2 reaching the terminal electrode 161 is formed in the adhesive layer 15 (Figure 30). The seed layer 19 and the first conductor layer 13 are formed in this hole H2 to form a connection hole V2. The hole H2 is formed, for example, using the opening 106M of the second seed layer 106 (Figure 6) and a dry etching method. After forming the hole H2, the second seed layer 106 is removed (Figure 31). For example, at this time, the surface of the exposed terminal electrode 161 is scraped off.
[0078] Next, a seed layer 19 is formed on the second insulating layer 23 and within the pores H2 (Figure 32). For example, the seed layer 19 is formed by forming an adhesion film 191 and a conductive film 192 in that order on the second insulating layer 23 and within the pores H2. The seed layer 19 is formed using, for example, electroless plating, sputtering, CVD, or ALD. It is preferable to form the seed layer 19 using the sputtering method.
[0079] After forming the seed layer 19, a resist film 205 is formed on the seed layer 19 (Figure 33). Next, an opening 205M is formed in the resist film 205 (Figure 34). The opening 205M is formed in a region that overlaps with at least the hole H2 and the pillar 14 in a planar (XY plane) view. After this, a conductive metal material is plated and grown in the opening 205M of the resist film 205. As a result, a first conductor layer 13 is formed in the opening 205M of the resist film 205 (Figure 35). That is, a connection hole V2 having the seed layer 19 and the first conductor layer 13 is formed.
[0080] After forming the first conductive layer 13, the resist film 205 is removed (Figure 36). Subsequently, the seed layer 19 exposed from the first conductive layer 13 is removed, for example, by etching (Figure 37).
[0081] Next, a first insulating layer 22 is formed on the second insulating layer 23 so as to cover the first conductor layer 13 (Figure 38). Subsequently, a hole H1 is formed in the first insulating layer 22 that reaches the first conductor layer 13 (Figure 39). A seed layer 121 and a relay conductor layer 12 are formed in this hole H1, thereby forming a connection hole V1. The hole H1 is formed, for example, using a dry etching method.
[0082] Next, a seed layer 121 is formed on the first insulating layer 22 and within the pore H1 (Figure 40). For example, the seed layer 121 is formed by forming an adhesion film 1211 and a conductive film 1212 in that order on the first insulating layer 22 and within the pore H1. The seed layer 121 is formed using, for example, electroless plating, sputtering, CVD, or ALD. It is preferable to form the seed layer 121 using the sputtering method.
[0083] After forming the seed layer 121, a resist film 206 is formed on the seed layer 121 (Figure 41). Next, an opening 206M is formed in the resist film 206 (Figure 42). The opening 206M is formed in a region that overlaps with at least the hole H1 and the pillar 14 in a planar (XY plane) view. After this, a conductive metal material is plated and grown in the opening 206M of the resist film 206. As a result, a relay conductor layer 12 is formed in the opening 206M of the resist film 206 (Figure 43). That is, a connection hole V1 having the seed layer 121 and the relay conductor layer 12 is formed.
[0084] After forming the intermediate conductor layer 12, the resist film 206 is removed (Figure 44). Subsequently, the seed layer 121 exposed from the intermediate conductor layer 12 is removed, for example, by etching (Figure 45).
[0085] Next, a first solder resist layer 21 is formed (Figure 46). For example, the first solder resist layer 21 is formed on the first insulating layer 22 so as to cover the intermediate conductor layer 12. Subsequently, an opening 21M is formed in this first solder resist layer 21 (Figure 47). The opening 21M of the first solder resist layer 21 is formed at a position corresponding to the intermediate conductor layer 12. The first solder resist layer 21 is formed, for example, using photolithography or printing.
[0086] After forming an opening 21M in the first solder resist layer 21, a first substrate electrode 11 is formed in this opening 21M (Figure 48). The first substrate electrode 11 is formed, for example, using an electroless plating method or an electrolytic plating method. This forms the electronic component-embedded module 10.
[0087] Next, bumps 35 are formed on the first substrate electrode 11 (Figure 49). Subsequently, semiconductor elements 31 and 32 are mounted on the electronic component module 10 via these bumps 35 (Figure 50). Specifically, the electrodes 311 and 321 of the semiconductor elements 31 and 32 are electrically connected to the first substrate electrode 11 of the electronic component module 10 via the bumps 35.
[0088] Next, a sealing layer 33 is formed to cover the semiconductor elements 31 and 32 (Figure 51). Subsequently, the thickness of the sealing layer 33 is adjusted, for example, by polishing (Figure 52).
[0089] Next, the support 201 is removed (Figure 53). For example, the support 201 is removed by peeling it off the electronic component module 10. The same method as for removing the support 101 can be used to remove the support 201.
[0090] Next, the mounting substrate 40 is connected to the electronic component module 10. For example, the first electrode 43 of the mounting substrate 40 and the second substrate electrode 18 of the electronic component module 10 are electrically connected via the bump 45. For example, electronic equipment can be manufactured in this way.
[0091] (Effects of the electronic component-embedded module 10) In the electronic component-embedded module 10 of this embodiment, the seed layer 19 provided in the connection hole V2 includes an adhesion film 191, which makes it easier for the seed layer 19 to adhere to the wall surface of the connection hole V2.
[0092] For example, when the seed layer 19 does not include an adhesion film (e.g., adhesion film 191), the conductive film 192 comes into contact with the wall surface of the connection hole V2. For example, when the conductive film 192 is made of copper, the conductive film 192 has low adhesion to the adhesive layer 15, which is an organic insulating material, and the conductive film 192 is prone to peeling off from the wall surface of the connection hole V2. This peeling of the conductive film 192 may cause a connection failure between the terminal electrode 161 and the first conductor layer 13.
[0093] In contrast, in the electronic component-embedded module 10, a conductive film 192 is formed in the connection hole V2 via an adhesion film 191. This makes it easier for the seed layer 19 to adhere to the wall surface of the connection hole V2 compared to when the adhesion film 191 is not provided. As a result, the occurrence of connection failures between the terminal electrode 161 and the first conductor layer 13 caused by peeling of the seed layer 19 is suppressed. Therefore, it is possible to improve the reliability of connections between conductors via the connection hole V2.
[0094] Furthermore, by constructing the adhesion film 191 from titanium, the wall surface of the connection hole V2 and the seed layer 19 can adhere more closely. Therefore, the occurrence of connection failures between the terminal electrode 161 and the first conductor layer 13 can be suppressed more reliably.
[0095] As described above, in the electronic component-embedded module 10 of this embodiment, the seed layer 19 provided in the connection hole V2 includes an adhesion film 191, which makes it easier for the seed layer 19 to adhere to the wall surface of the connection hole V2. This suppresses the occurrence of connection failures between the terminal electrode 161 and the first conductor layer 13 caused by peeling of the seed layer 19. Therefore, it is possible to improve the reliability of connections between conductors via the connection hole V2.
[0096] The following describes modified versions of the electronic component module 10 according to the above embodiment. To avoid repetition, detailed explanations of configurations similar to those of the electronic component module 10 in the above embodiment will be omitted.
[0097] <Variation> Figure 54 shows an example of the configuration near the connection hole V2 of the modified electronic component module 10. Figure 54 corresponds to Figure 2, which represents the electronic component module 10 of the above embodiment. This electronic component module 10 has a second seed layer 106 on the surface of the adhesive layer 15. Except for this point, the modified electronic component module 10 has the same configuration as the electronic component module 10 described in the above embodiment. Here, the second seed layer 106 corresponds to a specific example of the metal film of the present invention.
[0098] In this electronic component-embedded module 10, the second seed layer 106, the adhesion film 191, and the conductive film 192 are arranged in this order from the adhesive layer 15 side between the surface of the adhesive layer 15 and the first conductor layer 13.
[0099] The second seed layer 106 is provided with an opening 106M that communicates with the connection hole V2. The opening 106M penetrates the second seed layer 106 in the thickness direction (Z direction). In a planar view (XY plane), the opening 106M is positioned to overlap with the connection hole V2. The opening 106M has approximately the same diameter as the hole diameter (diameter) of the connection hole V2. The second seed layer 106 contains, for example, copper. The thickness of the second seed layer 106 is, for example, 0.05 μm to 5 μm.
[0100] The seed layer 19 is provided, for example, from the surface of the second seed layer 106 through the opening 106M to the connection hole V2. In other words, the seed layer 19 is also provided on the wall surface of the opening 106M. The adhesion film 191 is provided, for example, from the surface of the second seed layer 106 to the outside of the edge of the second seed layer 106. The adhesion film 191 may protrude beyond the edge of the second seed layer 106, or it may cover the edge of the second seed layer 106. The adhesion film 191 is made of, for example, titanium.
[0101] The edge of the conductive film 192 constituting the seed layer 19 is positioned to overlap with the edge of the second seed layer 106 in a planar (XY plane) view, for example. The conductive film 192 is made of copper, for example.
[0102] An electronic component-embedded module 10 according to the modified example can be formed, for example, as follows. First, the hole H2 is formed in the same manner as described in the above embodiment (Figure 30). After this, the seed layer 19 is formed without removing the second seed layer 106. Subsequently, the steps shown in Figures 31 to 36 are carried out in the same manner as described in the above embodiment. Next, after removing the seed layer 19 exposed from the first conductor layer 13 (Figure 37), the second seed layer 106 exposed from the first conductor layer 13 is removed. At this time, for example, a part of the conductive film 192 is etched together with the second seed layer 106. As a result, the adhesion film 191 is formed outside the edge of the conductive film 192 and the edge of the second seed layer 106. After removing the second seed layer 106 exposed from the first conductor layer 13, the steps shown in Figures 38 to 53 are carried out in the same manner as described in the above embodiment. For example, an electronic component-embedded module 10 according to the modified example can be formed in this way.
[0103] In the modified electronic component-embedded module 10, the seed layer 19 provided in the connection hole V2 includes an adhesion film 191, which makes it easier for the seed layer 19 to adhere to the wall surface of the connection hole V2. This suppresses the occurrence of connection failures between the terminal electrode 161 and the first conductor layer 13 caused by peeling of the seed layer 19. Therefore, it is possible to improve the reliability of connections between conductors via the connection hole V2.
[0104] Furthermore, in this electronic component-embedded module 10, the removal process of the second seed layer 106 is unnecessary. Therefore, the number of manufacturing steps is reduced, and the yield can be improved. In addition, the second seed layer 106 contains a metallic material such as copper, titanium, or chromium. This increases the thermal conductivity near the connection hole V2, improving the heat dissipation of the electronic component-embedded module 10.
[0105] <Other variations> Figures 55 to 57 show an example of the configuration of the electronic component-embedded module 10 relating to other modifications.
[0106] The electronic component module 10 may have a connection hole V31 instead of the pillar 14 (Figures 55-57).
[0107] The electronic component module 10 may have multiple electronic components (electronic components 16A, 16B) mounted on it (Figures 55 and 57). These multiple electronic components may have different thicknesses (sizes in the Z direction). For example, by mounting multiple electronic components on a support substrate (for example, the support substrate 100 in Figure 13) using a face-down method, it becomes possible to easily mount multiple electronic components with different thicknesses on the electronic component module 10 with high alignment accuracy.
[0108] The electronic component 16 may further have a terminal surface 16Sb facing the terminal surface 16Sa (see Figure 2) in the Z direction (Figures 56 and 57). A terminal electrode 162 is provided on this terminal surface 16Sb. The terminal electrode 162 is electrically connected to the second conductor layer 17, for example, via a connection hole V32. Here, the terminal surface 16Sb corresponds to a specific example of the second terminal surface of the present invention, and the terminal electrode 162 corresponds to a specific example of the second terminal electrode of the present invention.
[0109] The electronic component module 10 may have three or more electronic components.
[0110] Figure 1 illustrates an example in which one terminal electrode 161 is provided with one connection hole V2. A single terminal electrode 161 may be provided with multiple connection holes V2.
[0111] Figures 3 to 53 illustrate an example of the manufacturing process for the electronic component module 10, but the electronic component module 10 may be manufactured through a different process. Other known methods may be used to form each component.
[0112] The configuration of the electronic component-embedded module 10 described above is merely a description of the main configuration for explaining the features of the above-described embodiment, and is not limited to the above configuration; various modifications can be made within the scope of the claims. Furthermore, it does not preclude configurations that are common to general electronic component-embedded modules. [Examples]
[0113] The present invention will be described in more detail using the following examples and comparative examples, but the technical scope of the present invention is not limited to the following examples.
[0114] <Creating modules with embedded electronic components> (Example 1) An electronic component module containing 15 electronic components was created in the same manner as described in the above embodiment.
[0115] (Example 2) In the same manner as described in the above modification, an electronic component-embedded module containing 15 electronic components was created. Specifically, the second seed layer 106 was left intact when creating the electronic component-embedded module.
[0116] (Comparative example) An electronic component module containing 15 electronic components was created in the same manner as in Example 1, except that the adhesion film 191 of the seed layer 19 was not formed.
[0117] <Evaluation of modules with integrated electronic components> The connection reliability of the fabricated electronic component embedded modules was evaluated using a reflow load test (IPC / J-STD-020D standard). The peak temperature of the reflow oven was 260 degrees Celsius. In this reflow load test, 15 electronic component embedded modules for each of Example 1, Example 2, and Comparative Example were passed through the reflow oven 10 times, and the number of electronic component embedded modules that developed open-circuit defects was measured. The evaluation results of these electronic component embedded modules are shown in Table 1 below.
[0118] [Table 1]
[0119] In the comparative example, all 15 electronic component-embedded modules experienced open-circuit failures after passing through the reflow oven four times. In contrast, in the electronic component-embedded modules of Example 1 and Example 2, no open-circuit failures were observed in any of the 15 modules even after passing through the reflow oven ten times. Thus, it was confirmed that the electronic component-embedded modules of Example 1 and Example 2 have higher connection reliability compared to the electronic component-embedded modules of the comparative example. [Explanation of symbols]
[0120] 10 Electronic component-integrated modules, 11 first substrate electrode, 12 relay conductor layers, 13. First conductor layer, 14 Pillar, 15 adhesive layer, 16, 16A, 16B electronic components, 17. Second conductor layer, 18 second substrate electrode, 19 seed tier, 191 Adhesion film, 192 conductive film, 21 First solder resist layer, 22 First insulating layer, 23 Second insulating layer, 24 Second solder resist layer, 31,32 Semiconductor devices, 33 sealing layer, 35, 45, 55 Bump, 40 mounted circuit board, 41 Base material, 42 1st wiring layer, 43 first electrode, 44. First solder resist layer, 46 2nd wiring layer, 47 Second solder resist layer, 48 Second electrode.
Claims
1. Electronic components and, The first conductor layer, An electronic component module comprising at least an insulating layer, The electronic component has a first terminal surface and a first terminal electrode provided on the first terminal surface. The first conductor layer is provided facing the first terminal surface, The insulating layer is provided between the first conductor layer and the first terminal surface, and the insulating layer has a connection hole for electrically connecting the first terminal electrode and the first conductor layer. An electronic component-embedded module is provided with a seed layer in the connection hole, which includes a conductive film and an adhesion film provided between the conductive film and the wall surface of the connection hole.
2. The present invention further comprises a metal film provided between the first conductor layer and the insulating layer, The electronic component-embedded module according to claim 1, wherein the metal film is provided with an opening that communicates with the connection hole.
3. The electronic component-embedded module according to claim 2, wherein the seed layer is further provided in the opening.
4. The electronic component-embedded module according to claim 3, wherein the seed layer is provided in the connection hole through the opening from the surface of the metal film.
5. The electronic component-embedded module according to claim 4, wherein the adhesion film is provided from the surface of the metal film to the outside of the edge of the metal film.
6. The conductive film contains copper (Cu), The electronic component-embedded module according to claim 1 or 2, wherein the adhesion film comprises titanium (Ti).
7. The electronic component-integrated module according to claim 1 or 2, wherein at least one of the conductive film and the adhesion film includes a sputtered film.
8. The electronic component-embedded module according to claim 1 or 2, wherein the adhesive film is in contact with the wall surface of the connection hole.
9. The electronic component module according to claim 1 or 2, wherein the diameter of the connection holes is substantially the same across the thickness direction of the insulating layer.
10. The electronic component module according to claim 1 or 2, wherein the thickness of the conductive film and the adhesion film increases as they approach the first terminal electrode.
11. The electronic component-integrated module according to claim 1 or 2, wherein the insulating layer comprises an organic insulating material.
12. The aforementioned electronic component-embedded module further comprises a second conductor layer, The electronic component further comprises a second terminal surface facing the first terminal surface and a second terminal electrode provided on the second terminal surface. The electronic component-integrated module according to claim 1 or 2, wherein the second terminal electrode is electrically connected to the second conductor layer.
13. The electronic component-embedded module according to claim 1 or 2, having a plurality of the aforementioned electronic components.
14. The electronic component module according to claim 13, wherein the plurality of electronic components include electronic components having different thicknesses from each other.
15. Step (a) of providing an adhesive layer on a support substrate, (b) A step of bonding an electronic component having terminal electrodes on its terminal surface to the support substrate via the adhesive layer such that the terminal surface and the support substrate face each other, The steps include: (c) attaching the electronic components to the support substrate and then removing the support substrate; The adhesive layer comprises the step (d) of forming holes in the adhesive layer that reach from the surface of the adhesive layer to the terminal electrodes, Step (e) of forming a seed layer by forming an adhesion film and a conductive film in the aforementioned pores in this order, (f) A step of forming a conductor electrically connected to the terminal electrode via the seed layer A method for manufacturing an electronic component-embedded module.
16. In step (a) above, the adhesive layer is provided on the support substrate via a metal film, The method for manufacturing an electronic component-embedded module according to claim 15, wherein in step (d), an opening is formed in the metal film and the hole portion communicating with the opening is formed.
17. The method for manufacturing an electronic component-embedded module according to claim 15, wherein in step (e), the adhesion film and the conductive film are formed using a sputtering method.
18. The method for manufacturing an electronic component-embedded module according to claim 15, wherein in step (d), the holes are formed in the adhesive layer using a dry etching method.
Citation Information
Patent Citations
Circuit module and method for manufacturing the same
JP2011523773A