Light-emitting diodes including hybrid structures formed from layers and nanowires

The integration of AlN-based nanowires with p-doped GaN and an ohmic contact layer addresses the doping challenges in UV LEDs, improving electrical conduction and reducing absorption, thereby enhancing efficiency for UV wavelengths below 350 nm.

JP2026053470APending Publication Date: 2026-03-25COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES +2
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Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2025-12-18
Publication Date
2026-03-25

AI Technical Summary

Technical Problem

Existing UV LEDs face challenges in achieving sufficient p-type doping for AlN layers, leading to reduced electrical conduction and absorption of UV radiation, particularly for wavelengths below 350 nm, which affects their efficiency and current injection.

Method used

Incorporation of AlN-based nanowires with p-doped GaN and an ohmic contact layer, such as ITO or diamond, to enhance current distribution and reduce absorption, while avoiding short circuits.

Benefits of technology

Improves electrical conduction and reduces UV radiation absorption, enhancing the efficiency of UV LEDs, especially for wavelengths between 250 nm and 260 nm, suitable for sterilization applications.

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Abstract

Provided is a light-emitting diode that avoids the occurrence of a short circuit caused by an ohmic contact layer formed on the upper part of an LED due to its structure. 【Solution means】The present invention relates to a light-emitting diode 100 including at least the following: · A first layer 106 of n-doped Al X1 Ga (1-X1-Y1) In Y1 N (X1>0 and X1 + Y1≤1), · A second layer 108 of p-doped Al X2 Ga (1-X2-Y2) In Y2 N (X2>0 and X2 + Y2≤1), · An active region 110 disposed between the first layer and the second layer and including at least one multi-quantum well light-emitting structure 112, 114, · A nanowire 122 based on AlN p-doped with indium atoms and magnesium atoms disposed on the second layer, · An ohmic contact layer 124 in contact with the nanowire.
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Description

[Technical Field]

[0001] This invention relates to the field of light-emitting diodes or LEDs ("Light-Emitting Diodes"). Advantageously, this invention is applied to the manufacture of LEDs that emit light in the ultraviolet (UV) range, particularly in the wavelength range contained between about 200 nm and 350 nm. [Background technology]

[0002] In the field of ultraviolet light emission, there is a need to find a light emission method that does not use mercury. LEDs, which are made of AlN and GaN alloys, solve this problem.

[0003] LEDs based on semiconductor heterostructures that emit light in the UV range consist of a stack of layers containing AlGaN of various compositions. Figure 1 schematically shows the structure of such an LED 10. LED 10 includes a pn junction formed by a first layer 12 containing n-doped AlGaN and a second layer 14 containing p-doped AlGaN. LED 10 also includes an active region 16 between layers 12 and 14, which forms the light-emitting region of LED 10 and contains a quantum well where electron-hole recombination occurs, resulting in photon emission. The active region 16 contains intentionally undoped or intrinsic AlGaN. LED 10 also includes a layer 18 of highly p-doped GaN on the second layer 14 and a conductive layer 20 placed on layer 18, which contains, for example, a Ni-Au alloy. These layers are formed by MOCVD ("Metal Organic Chemical Vapor Deposition," or chemical vapor deposition from organometallic precursors).

[0004] The semiconductor composition of the active region 16 is selected according to the wavelength intended to be emitted by the LED 10. To emit in the UV range, the active region 16 is Al such that X is 0 ≤ X ≤ 1. X Ga (1-X) It contains N. The first layer 12 is n-doped Al Y1 Ga (1-Y1) The second layer 14 contains N and p-doped AlY2 Ga (1-Y2) contains N, and Y1 > X and Y2 > X.

[0005] Ideally, making layers 12 and 14 of AlN (i.e., making them such that Y1 = 1 and Y2 = 1) would simplify the fabrication of LED 10. However, making the second layer 14 of p-doped AlN poses a problem. This is because there is no technical solution that enables obtaining AlN with a p-type doping level large enough to guarantee sufficient and necessary electrical conduction for the proper operation of LED 10. Therefore, layers 12 and 14 are currently made such that Y1 < 1 and Y2 < 1.

[0006] Furthermore, in order to reach important wavelengths in the UV range, for example, in the range of 300 nm or less, layers 12 and 14 must contain a high concentration of aluminum (e.g., more than about 60%), which poses a problem for implementing p-doping of layer 14.

[0007] Finally, the current injection that has to be carried out on the side of layer 14 of LED 10 is another important constraint to consider.

[0008] These problems are currently solved by the presence of a highly p-doped GaN layer 18 that is tens of nanometers thick and enables ensuring the transition between layers 14 and 20. However, the effectiveness of LED 10 is limited by the absorption of UV radiation emitted from the active region 16 by this layer 18 (especially for wavelengths less than about 350 nm). In particular, LEDs that emit wavelengths contained between about 250 nm and 260 nm and are used for sterilization applications essentially have their effectiveness reduced by absorbing a part of the radiation emitted by the highly p-doped GaN layer 18.

[0009] Furthermore, the deposition of layer 20 is necessary to ensure a good lateral distribution of current lines and optimize the current injection into layer 14 of LED 10, but it also causes a further decrease in the light emission efficiency of LED 10. This is because this layer 20 absorbs a part of the UV light emitted from the active region 16.

[0010] The publication "Mg and In Codoped p-type AlN Nanowires for pn Juntion Realization" by A-M Siladie et al. in Nano Letters 2019 19(12), 8357-8364 proposes the realization of a pn junction including AlN nanowires, and by using magnesium atoms, significant p-doping can be carried out. Such nanowires are generated by growth on a silicon substrate. These nanowires also contain p-doped GaN on top of them. The nanowires are deposited on top of the p-doped GaN part of the nanowires and covered with an ITO (indium tin oxide) layer used as an ohmic contact. If a UV LED is manufactured using such a pn junction and it is made of nanowires, this LED manufactured with an ITO ohmic contact layer may not be optimal. This is because ITO may exist between the nanowires, and there is a possibility of a short circuit occurring between the n-doped part and the p-doped part of the nanowires.

Prior Art Documents

Non-Patent Documents

[0011]

Non-Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0012] An object of the present invention is to provide a light-emitting diode that avoids the occurrence of a short circuit caused by an ohmic contact layer formed on top of an LED due to its structure.

Means for Solving the Problem

[0013] For this purpose, the present invention proposes a light-emitting diode including at least the following: · A first layer of n-doped Al X1 Ga (1-X1-Y1) In Y1 N (X1>0 and X1 + Y1 ≤ 1), · A second layer of p-doped Al X2 Ga (1-X2-Y2) In​​​​​​​​​​​​​​​​​​​​​​​The multiple quantum well structure in the active region can correspond to one or more layers of quantum dots, each formed from an emissive layer positioned between two barrier layers.

[0018] Throughout this specification, the expression “AlN-based nanowire” refers to a nanowire that, in addition to AlN, may contain a mole fraction of at least one other material between 0 and 30%. This material or these other materials may correspond to, for example, GaN, InN, or BN. When this other material corresponds to InN, the mole fraction of InN present in the AlN-based nanowire is preferably 20% or less. Advantageously, regardless of this material or these other materials, the mole fraction of the material present in the AlN-based nanowire is preferably 5% or less. The expression “AlN-based nanowire” also includes the case of AlN nanowires, i.e., nanowires that do not contain any material other than AlN.

[0019] In the first embodiment, the LED may further include a dielectric layer covering the lateral surface of the nanowire, on which an ohmic contact layer is disposed.

[0020] In a second embodiment, the ohmic contact layer can cover the lateral sides and / or top of the nanowire. When the ohmic contact layer covers the lateral sides of the nanowire, the nanowire can be placed within the ohmic contact layer. This configuration is advantageous because the contact surface between the ohmic contact layer and the nanowire is more important, which improves the lateral distribution of the current line and the current injection into the p-doped layer side of the LED.

[0021] Advantageously, the ohmic contact layer can contain diamond.

[0022] The atomic concentration of indium in nanowires is approximately 10 17 from 10 21 atoms / cm 3 It can be composed of between and / or the atomic concentration of magnesium in the nanowire is about 10 18 from 10 21 atoms / cm3 It can be composed between these two points.

[0023] At least a portion of the second layer thickness may be etched to form pillars on which nanowires can be placed.

[0024] The multiple quantum well light emission structure is Al X3 Ga (1-X3) N can be included, and X3 is between approximately 0 and 1, or between 0 and 0.9. When X3 is 1, the LED structure corresponds to a pn junction structure, which may be advantageous for performing light emission at a wavelength equal to 200 nm.

[0025] The light-emitting diode is made of undoped aluminum such that the first layer is positioned between the active region and the third layer. X4 Ga (1-X4-Y4) In Y4 A third layer of N(X4>0 and X4+Y4≦1) can be further included.

[0026] The lateral dimensions of the nanowire at the interface with the second layer may be smaller than those at the interface with the ohmic contact layer.

[0027] Each nanowire can have a cylindrical shape, or alternatively, another shape such as a frustoconical shape. A frustoconical nanowire with a large cross-section at the top can promote the deposition of an ohmic contact layer.

[0028] The present invention also relates to a method for manufacturing light-emitting diodes, and includes at least the following: ·n-doped Al X1 Ga (1-X1-Y1) In Y1 Steps to generate a first layer of N(X1>0 and X1+Y1≦1), - A step of generating an active region located on a first layer and including at least one multiple quantum well light-emitting structure, • p-doped Al on the active region X2 Ga (1-X2-Y2) In Y2Steps to generate a second layer of N(X2>0 and X2+Y2≦1), • A step of generating nanowires based on AlN p-doped with indium and magnesium atoms on a second layer. • A step of generating an ohmic contact layer that is positioned in contact with nanowires.

[0029] The first layer, the active region, and the second layer can be produced by MOCVD-type deposition, and the nanowires can be produced by molecular beam epitaxy.

[0030] Ohmic contact layers can be produced, for example, by molecular beam epitaxy, vacuum deposition, cathode sputtering, or chemical vapor deposition (CVD).

[0031] According to one particular configuration, the production of nanowires may involve performing the following steps: - A step of generating a hard mask on a second layer through which openings corresponding to the number and arrangement of nanowires to be generated pass. The step of generating nanowires by epitaxy from the openings of the hard mask on the surface of a second layer on which the hard mask is placed.

[0032] According to a different specific configuration, the generation of nanowires may involve performing the following steps: - A step in which etching is performed from the surface of the second layer on the side where nanowires are intended to be generated, in at least a portion of the thickness of the second layer, to form pillars whose number and arrangement correspond to the number and arrangement of nanowires intended to be generated. • A step of generating nanowires by epitaxy on pillars formed in the second layer.

[0033] The present invention will be better understood by referring to the accompanying drawings and reading the description of the exemplary embodiments, which are for illustrative purposes only and not limiting. [Brief explanation of the drawing]

[0034] [Figure 1] This shows an earlier LED technology that emits light in the UV range. [Figure 2] This figure shows a hybrid structure LED including a material layer and nanowires, which are the objectives of the present invention, according to different embodiments. [Figure 3] This figure shows a hybrid structure LED including a material layer and nanowires, which are the objectives of the present invention, according to different embodiments. [Figure 4] This figure shows a hybrid structure LED including a material layer and nanowires, which are the objectives of the present invention, according to different embodiments. [Figure 5] This figure shows a hybrid structure LED including a material layer and nanowires, which are the objectives of the present invention, according to different embodiments. [Figure 6] This figure shows the steps of a first method for manufacturing a hybrid structure LED comprising layers of material and nanowires, which is an objective of the present invention. [Figure 7] This figure shows the steps of a first method for manufacturing a hybrid structure LED comprising layers of material and nanowires, which is an objective of the present invention. [Figure 8] This figure shows the steps of a first method for manufacturing a hybrid structure LED comprising layers of material and nanowires, which is an objective of the present invention. [Figure 9] This figure shows the steps of a first method for manufacturing a hybrid structure LED comprising layers of material and nanowires, which is an objective of the present invention. [Figure 10] This figure shows the steps of a second method for fabricating a hybrid structure LED comprising layers of material and nanowires, which is the subject of the present invention. [Figure 11] This figure shows the steps of a second method for fabricating a hybrid structure LED comprising layers of material and nanowires, which is the subject of the present invention. [Figure 12] This figure shows the steps of a second method for fabricating a hybrid structure LED comprising layers of material and nanowires, which is the subject of the present invention. [Figure 13] This figure shows the steps of a second method for fabricating a hybrid structure LED comprising layers of material and nanowires, which is the subject of the present invention. [Figure 14] This figure shows the steps of a second method for fabricating a hybrid structure LED comprising layers of material and nanowires, which is the subject of the present invention.

[0035] Identical, similar, or equivalent parts of the various figures described below are given the same reference number to facilitate transitions from one figure to another.

[0036] To make the diagram easier to read, the various parts shown in the diagram are not necessarily drawn to a consistent scale.

[0037] It must be understood that the various possibilities (modifications and embodiments) are not mutually exclusive but can be combined with one another. [Modes for carrying out the invention]

[0038] Figure 2, described below, shows a hybrid structure LED 100 formed from layers of material and nanowires according to the first embodiment.

[0039] In the following explanation, the term "thickness" is used to refer to the dimension parallel to the Z-axis, i.e., the dimension parallel to the stacking direction of the various layers of the LED100.

[0040] The LED 100 includes a substrate 102. In this first embodiment, the substrate 102 includes, for example, sapphire. Other types of substrates may be used, including semiconductor materials such as silicon. The thickness of the substrate 102 is, for example, equal to several hundred microns.

[0041] The LED 100 also includes a buffer layer 104 placed on the substrate 102. The buffer layer 104 contains AlN. The thickness of the buffer layer 104 is, for example, between approximately 0.5 and 3 microns.

[0042] LED100 is n-doped Al X1 Ga (1-X1-Y1) In Y1 The first layer 106 of N is included, where X1 > 0 and X1 + Y1 ≤ 1. Preferably, the value of X1 is between approximately 0.7 and 0.8, and the value of Y1 is between approximately 0 and 0.1. Advantageously, the value of Y1 is zero, which means that the semiconductor of the first layer 106 is AlGaN. The thickness of the first layer 106 is, for example, equal to 1 μm or between approximately 0.5 μm and 5 μm.

[0043] According to an exemplary embodiment, n-type doping of the semiconductor of the first layer 106 is achieved by incorporating silicon atoms into the semiconductor of the first layer 106 during the deposition of the semiconductor. The concentration of the dopant in the semiconductor of the first layer 106 is, for example, 10 17 atoms / cm 3 from 10 19 atoms / cm 3 It is between these two points.

[0044] LED100 also includes a second layer 108 of p-doped semiconductor. The semiconductor of the second layer 108 is p-doped Al X2 Ga (1-X2-Y2) In Y2 Corresponding to N, where X2 > 0 and X2 + Y2 ≤ 1. Favorably, the semiconductor of the second layer 108 has X2 = X1 and Y2 = 0. It is also possible and favorable that X2 = 1. The dopant concentration in the semiconductor of the second layer 108 is, for example, about 10 18 atoms / cm 3 from 10 21 atoms / cm 3 The thickness of the second layer 108 is, for example, equal to 1 μm, and more generally between approximately 0.2 μm and 1 μm.

[0045] LED 100 also includes an active region 110 disposed between a first layer 106 and a second layer 108. This active region 110 includes a multiple quantum well light-emitting structure where light is intended to be emitted. This light-emitting structure includes one or more light-emitting layers 112 each disposed between two barrier layers 114.

[0046] The light-emitting layer 112 includes, for example, a semiconductor corresponding to Al X3 Ga (1-X3) N, where X3 < X2, and X1 and X3 are preferably between 0 and 0.9. This semiconductor is intentionally undoped (or intrinsic), that is, during the manufacture of the LED 100, no step of introducing doping atoms into the semiconductor is performed. The concentration of residual doping atoms present in this semiconductor is, for example, about 10 15 to 10 17 atoms / cm 3 . The thickness of each of the light-emitting layers 112 is, for example, between about 1 and 10 nm.

[0047] Advantageously, the value of X3 is selected such that the wavelength of the light emitted from the light-emitting layer 112 of the active region 110 belongs to the UV range, particularly between about 210 nm and 340 nm, more specifically UV-C (i.e., between 210 nm and 280 nm), which corresponds to X3 such that 0.7 < X3 < 1. It is also possible for X3 to be between 0 and 1, and when X3 = 1, the structure of the LED is advantageous for emitting light at a wavelength equal to 200 nm.

[0048] The barrier layer 114 also includes, for example, a semiconductor corresponding to AlN or Al X Ga 1-X N (X > X3, preferably equal to X3 + 0.1). As with the semiconductor of the light-emitting layer 112, the semiconductor of the barrier layer 114 is intentionally undoped. The thickness of each of the barrier layers 114 is, for example, between about 1 nm and 10 nm.

[0049] The thickness of the active region 110 is, for example, equal to 100 nm, and more generally between about 100 nm and 300 nm.

[0050] In an exemplary embodiment corresponding to the LED 100 shown in Figure 2, the LED 100 also includes a third layer 116 such that the first layer 106 is positioned between the active region 110 and the third layer 116. This third layer 116 is, for example, undoped aluminum. X4 Ga (1-X4-Y4) In Y4 N is included, where X4 > 0 and X4 + Y4 ≤ 1. Preferably, the value of X4 is between approximately 0.3 and 0.7, and the value of Y4 is between approximately 0 and 0.1. The composition of the third layer 116 may be the same as the composition of the first layer 106, or X4 may be equal to, for example, X1 - 0.1. The thickness of the third layer 116 is, for example, between approximately 500 nm and 2 microns. The concentration of residual dopant present in the third layer 116 is, for example, approximately 5.10 15 from 5.10 16 Dopant / CM 3 It is between these two points.

[0051] Alternatively, LED100 may not include the third layer 116.

[0052] In a particular exemplary embodiment shown in Figure 2, the LED 100 also includes a deliberately undoped AlGaN layer 118 positioned between the first layer 106 and the active region 110, with a thickness of, for example, equal to 20 nm or between approximately 10 nm and 30 nm, and a deliberately undoped AlGaN layer 120 positioned between the second layer 108 and the active region 110, used as an electron blocking layer to avoid an excess of electrons in the second layer 108 and to facilitate the recombination of charge carriers in the active region 110, with a thickness of, for example, equal to 20 nm or between approximately 10 nm and 30 nm. Alternatively, the LED 100 may not include layer 118.

[0053] LED100 also includes p-doped AlN-based nanowires 122 formed on a second layer 108. The geometric features of these nanowires 122 are, for example, a diameter between 50 nm and 100 nm and a density of 1 cm³. 2 1010 The range is such that the distance between the centers of the wires is between 100 nm and 200 nm, and the height is, for example, between 100 nm and 1 micron.

[0054] The p-doping level in nanowire 122 is made significant, i.e., approximately 10 20 atoms / cm 3 To exceed this, the material of nanowire 122 is doped with indium and magnesium atoms. The atomic concentration of indium in nanowire 122 is, for example, about 10 17 from 10 21 atoms / cm 3 The atomic concentration of magnesium in nanowire 122 is, for example, about 10 18 from 10 21 atoms / cm 3 This is between [the specified period]. Other characteristics of such doping applicable to the LED100 described herein are described in the publication "Mg and In Codoped p-type AlN Nanowires for pn Junction Realization" by AM Siladie et al., Nano Letters 2019 19(12), 8357-8364.

[0055] The LED 100 also includes a dielectric layer 123 formed around the nanowire 122, which contains, for example, SiO2. The dielectric layer 123 does not cover the top of the nanowire 122 so that the nanowire 122 can be electrically connected from above.

[0056] Finally, the LED 100 is positioned on top of the nanowires 122 and includes an ohmic contact layer 124 electrically connected to these nanowires 122. This ohmic contact layer 124 includes at least one material that is conductive and transparent to the wavelength intended to be emitted by the LED 100, such as ITO or, favorably, diamond.

[0057] Figure 3, described below, shows a hybrid structure LED 100 including layers of material and nanowires according to a second embodiment.

[0058] Compared to the LED 100 according to the first embodiment described above, the LED 100 according to this second embodiment includes an ohmic contact layer 124 deposited between the nanowires 122 on a second layer 108 by covering the top and lateral surfaces of the nanowires 122. Such an ohmic contact layer 124 can be obtained, for example, by depositing the material of the second layer 108 perpendicular to the surface of the second layer 108 on which the nanowires 122 are arranged. Such an ohmic contact layer 124 is advantageous because the contact surface between the ohmic contact layer 124 and the nanowires 122 is larger than that of the first embodiment. In this second embodiment, the LED 100 does not include a dielectric layer 123.

[0059] Figure 4, described below, shows a hybrid structure LED 100 including layers of material and nanowires according to a third embodiment.

[0060] In contrast to the LED 100 according to the first and second embodiments described above, the second layer 108 of the LED 100 according to this third embodiment is etched over a portion of its thickness from the side of the second layer 108 on which the nanowires 122 are intended to be manufactured. Pillars 125 or columns having a number and arrangement corresponding to the number and arrangement of nanowires 122 to be manufactured are formed on the etched portion of the second layer 108. In the example of Figure 4, each pillar 125 has a cross-section that is circular or elliptical in a plane parallel to the plane (parallel to the plane (X,Y)) parallel to the plane of the second layer 108 on which the pillar 125 is etched. Alternatively, these cross-sections of the pillars 125 may be of various shapes, such as polygons. In the case of pillars 125 with a circular cross-section, the diameter of the cross-section of each pillar 125 is, for example, between approximately 50 nm and 100 nm. In the case of the polygonal cross-section pillar 125, the maximum diagonal of the cross-section of each pillar 125 is, for example, between approximately 50 nm and 100 nm. The height of each pillar 125 (a dimension along the Z-axis, corresponding to the stacking direction of the various layers of LED 100) is, for example, between approximately 300 nm and 500 nm.

[0061] The nanowires 122 are generated on the pillars 125. The dielectric layer 123 is formed around the nanowires 122 and the pillars 125, but does not cover the top of the nanowires 122. The ohmic contact layer 124 is positioned on top of the nanowires 122, electrically connected to these nanowires 122, and also on portions of the dielectric layer 123 located between the nanowires 122.

[0062] Figure 5, described below, shows a hybrid structure LED 100 including layers of material and nanowires according to the fourth embodiment.

[0063] Similar to the third embodiment, the LED 100 according to this fourth embodiment includes pillars 125 formed in part of the thickness of the second layer 108, on which the nanowires 122 are formed. In this fourth embodiment, the ohmic contact layer 124 is also positioned between the nanowires 122 and between the pillars 125 on the unetched portion of the second layer 108 by covering the top of the nanowires 122 and the lateral sides of the nanowires 122 and pillars 125.

[0064] Alternatively, the ohmic contact layer 124 may not cover the top of the nanowire 122. In this case, the ohmic contact layer 124 covers only the lateral surfaces of the nanowire 122 and the pillar 125.

[0065] According to another embodiment, the dielectric layer 123 may cover only the lateral surface of the pillar 125, in which case the ohmic contact layer 124 covers the lateral surface of the nanowire 122, and optionally the top of the nanowire 122. For example, it is possible to have a dielectric layer 123 that covers the lateral surface of the pillar 125 only over a portion of its height, and an ohmic contact layer 124 that covers the lateral surface of the pillar 125 over the remaining height, and also covers the lateral surface of the nanowire 122. Alternatively, it is possible to have a dielectric layer 123 that covers the lateral surface of the pillar 125 and the lateral surface of the nanowire 122 over a portion of its height, and an ohmic contact layer 124 that covers the lateral surface of the nanowire 122 over the remaining height. In all cases, the ohmic contact layer 124 may or may not cover the top of the nanowire 122.

[0066] Instead of the first, second, third, and fourth embodiments described above, the lateral dimensions of the nanowire 122 at the interface with the second layer 108 may be smaller than those at the interface with the ohmic contact layer 124. In this modification, the nanowire 122 has a substantially truncated conical shape such that the surface of the nanowire 122 in contact with the second layer 108 is smaller than the surface of the nanowire 122 above it.

[0067] A first method for manufacturing LED100 is described below in relation to Figures 6 to 9.

[0068] As shown in Figure 6, the various layers of the LED 100 are produced from the substrate 102 by continuous deposition, and these depositions are advantageously of the MOCVD type. During such MOCVD deposition, the components used to deposit the semiconductor are organometallic precursors, such as trimethylaluminum or triethylaluminum used as an aluminum source, ammonia used as a nitrogen source, trimethylindium or triethylindium used as an indium source, and optionally trimethylgallium or triethylgallium used as a gallium source.

[0069] After generating the second layer 108, a layer 126, intended for the fabrication of a hard mask, is deposited on top of the second layer 108 (see Figure 7). This layer 126 may contain, for example, SiN, graphene, or TiN.

[0070] Next, lithography and etching steps are performed to form openings 128 through layer 126, having a number and arrangement corresponding to the number and arrangement of nanowires 122 intended to be manufactured, thus forming a hard mask 130 used for growing the nanowires 122 (see Figure 8).

[0071] To form the nanowires 122, epitaxy is favorably performed by molecular beam from the aperture 128 of the hard mask 130 (Figure 9). Doping of the nanowires 122 with indium and magnesium atoms is carried out concurrently with their growth. Details of the implementation of such doping are described in the publication "Mg and In Codoped p-type AlN Nanowires for pn Junction Realization" by AM Siladie et al., Nano Letters 2019 19(12), 8357-8364.

[0072] The LED 100 is completed by first manufacturing the dielectric layer 123 and then the ohmic contact layer 124, as described above for the first embodiment (see Figure 2), or by manufacturing the ohmic contact layer 124, as described above for the second embodiment (see Figure 3). In both cases, the hard mask 130 may be retained or removed before manufacturing the dielectric layer 123 or the ohmic contact layer 124. The hard mask 130 is preferably removed to avoid absorption of UV light emitted by the LED 100.

[0073] The dielectric layer 123 is produced, for example, by spin coating. The ohmic contact layer 124 is produced, for example, by molecular beam epitaxy, vacuum deposition, cathode sputtering, or chemical deposition.

[0074] A second method for manufacturing LED100 is described below in relation to Figures 10 to 14.

[0075] The steps of the first method for manufacturing the LED 100 described above are carried out first, relating to Figures 6 to 8. These steps are shown in Figures 10 to 12.

[0076] Next, using the hard mask 130, pillars 125 in a number and arrangement corresponding to the number and arrangement of openings 128 are etched from the surface of the second layer 108 on the side where the nanowires 122 are intended to be fabricated (which corresponds to the surface of the second layer 108 on which the hard mask 130 is fabricated), in a portion of the thickness of the second layer 108. The hard mask 130 is then removed (see Figure 13).

[0077] To grow nanowires 122 on top of pillar 125, molecular beam epitaxy is advantageously performed (Figure 14). Doping of the nanowires 122 with indium and magnesium atoms is carried out simultaneously with their growth, as described above in the first manufacturing method.

[0078] The LED 100 is completed by first generating the dielectric layer 123 and then the ohmic contact layer 124, as described above for the third embodiment (see Figure 4), or by generating the ohmic contact layer 124, as described above for the fourth embodiment (see Figure 5).

[0079] Furthermore, in the various manufacturing methods described above, the nanowire 122 can be manufactured such that the lateral dimension at the interface with the second layer 108 is smaller than the lateral dimension at its upper surface. Details of the implementation for forming such nanowires are described in the publication "Mg and In Coposed p-type AlN Nanowires for pn Junction Realization" by AM Siladie et al., Nano Letters 2019 19(12), 8357-8364.

[0080] In the manufacturing method described above, the nanowires 122 are manufactured in a different apparatus than the one used to manufacture the other layers of the LED 100. To facilitate transfer from one apparatus to another, for example, from the MOCVD deposition apparatus used to produce the layers of the LED 100 to the MBE epitaxy apparatus used to produce the nanowires 122, it is possible to deposit a protective layer, for example, based on GaN, on the structure produced by MOCVD deposition before removing it from the MOCVD deposition apparatus. Once the structure enters the MBE epitaxy apparatus, the protective layer is removed and the nanowires 122 are produced. [Explanation of symbols]

[0081] 100 Light-Emitting Diodes 106 The first layer 108 The second layer 110 Active area 112, 114 Multiple quantum well luminescence structure 116 The Third Layer 122 nanowires 123 Dielectric layer 124 Ohmic Contact Layer 125 Pillar 128 Opening 130 Hard Mask

Claims

1. Light-emitting diode (100) including at least the following: n-doped Al X1 Ga (1-X1-Y1) In Y1 The first layer (106) of N (X1 > 0 and X1 + Y1 ≤ 1), p-doped Al X2 Ga (1-X2-Y2) In Y2 The second layer (10⁸) of N (X² > 0 and X² + Y² ≤ 1), - An active region (110) located between the first and second layers (106, 108) and including at least one multiple quantum well light-emitting structure (112, 114), - Nanowires (122) based on AlN p-doped with indium and magnesium atoms, arranged on the second layer (108), - An ohmic contact layer (124) that comes into contact with the nanowire (122).

2. The light-emitting diode (100) according to claim 1, further comprising a dielectric layer (123) covering the lateral surface of a nanowire (122) and on which an ohmic contact layer (124) is disposed.

3. The light-emitting diode (100) according to claim 1, wherein the ohmic contact layer (124) covers the lateral surface and / or top of the nanowire (122).

4. The light-emitting diode (100) according to any one of claims 1 to 3, wherein the ohmic contact layer (124) contains diamond.

5. The atomic concentration of indium in the nanowire (122) is from about 10 17 to 10 21 atoms / cm 3 and / or the atomic concentration of magnesium in the nanowire (122) is from about 10 18 to 10 21 atoms / cm 3 The light emitting diode (100) according to any one of claims 1 to 4.

6. The light-emitting diode (100) according to any one of claims 1 to 5, wherein at least a portion of the thickness of the second layer (108) is etched to form a pillar (125) on which nanowires (122) are placed.

7. The multiple quantum well light-emitting structure (112, 114) is Al X3 Ga (1-X3) A light-emitting diode (100) according to any one of claims 1 to 6, comprising N and having X3 between approximately 0 and 1.

8. The first layer (106) is intentionally undoped Al so that it is positioned between the active region (110) and the third layer (116). X4 Ga (1-X4-Y4) In Y4 A light-emitting diode (100) according to any one of claims 1 to 7, further comprising a third layer (116) of N (X4 > 0 and X4 + Y4 ≤ 1).

9. The light-emitting diode (100) according to any one of claims 1 to 8, wherein the lateral dimension of the nanowire (122) at the interface with the second layer (108) is smaller than that at the interface with the ohmic contact layer (124).

10. A method for manufacturing a light-emitting diode (100), comprising at least the following: n-doped Al X1 Ga (1-X1-Y1) In Y1 Steps to generate a first layer (106) of N (X1 > 0 and X1 + Y1 ≤ 1), - A step of generating an active region (110) located on a first layer (106) and including at least one multiple quantum well light-emitting structure (112, 114), - p-doped Al on the active region (110) X2 Ga (1-X2-Y2) In Y2 Steps to generate a second layer (108) of N (X2 > 0 and X2 + Y2 ≤ 1), - A step of generating nanowires (122) based on AlN p-doped with indium and magnesium atoms on a second layer (108), - A step of generating an ohmic contact layer (124) that is positioned in contact with the nanowire (122).

11. The method according to claim 10, wherein the first layer (106), the active region (110), and the second layer (108) are generated by MOCVD type deposition, and the nanowire (122) is generated by molecular beam epitaxy.

12. The method according to claim 10 or 11, wherein the ohmic contact layer (124) is produced by molecular beam epitaxy, vacuum deposition, cathode sputtering, or chemical vapor deposition.

13. The method according to any one of claims 10 to 12, wherein the generation of the nanowire (122) includes carrying out the following steps: - A step of generating a hard mask (130) on a second layer (108) through which openings (128) corresponding to the number and arrangement of nanowires (122) to be generated pass. - A step of generating nanowires (122) by epitaxy from openings (128) of the hard mask (130) on the surface of a second layer (108) on which the hard mask (130) is placed.

14. The method according to any one of claims 10 to 12, wherein the generation of the nanowire (122) includes carrying out the following steps: - A step in which etching is performed on at least a portion of the thickness of the second layer (108) from the side of the second layer (108) on which the nanowires (122) are intended to be generated, thereby forming pillars (125) whose number and arrangement correspond to the number and arrangement of nanowires (122) that are intended to be generated. - A step of generating nanowires (122) by epitaxy on pillars (125) formed in a second layer (108).