Semiconductor equipment

Abstract

The present invention provides a semiconductor device having a circuit with reduced area and a circuit that reduces fluctuations in power supply voltage. [Solution] The semiconductor device 500 includes a first transistor 491, a second transistor 490, a first power supply wiring 480, and a second power supply wiring 482. The second transistor and the first transistor are stacked, and the second power supply wiring and the first power supply wiring are stacked, overlapping at least partially and generally parallel to each other. The source electrode of the first transistor is electrically connected to the first power supply wiring, and the source electrode of the second transistor is electrically connected to the second power supply wiring. The second transistor is an n-channel type, and the channel formation region is formed of an oxide semiconductor. The first transistor is a p-channel type, and the channel formation region is formed of silicon.

Description

[Technical Field]

[0001] The present invention relates to a product, method, or method of manufacture. Or, the present invention relates to a process, machine Relating to the manufacture or composition of matter, in particular. The present invention relates to, for example, semiconductors, semiconductor devices, display devices, light-emitting devices, lighting devices, energy storage devices, Related to memory devices or processors; or semiconductors, semiconductor devices, display devices, and light-emitting devices. The invention relates to a method for manufacturing lighting devices, energy storage devices, memory devices, or processors. Or, semiconductors. A method for driving a device, display device, light-emitting device, lighting device, energy storage device, memory device, or processor. Regarding.

[0002] In this specification, a semiconductor device is defined as a device that can function by utilizing semiconductor properties. This refers to all types of devices, including memory devices, display devices, light-emitting devices, lighting devices, electro-optical devices, and semiconductor circuits. Electronic devices and other equipment may include semiconductor devices. [Background technology]

[0003] The channel formation region is made of semiconductor silicon (Si) in the transistor (hereinafter referred to as Si transistor). ZISTAS (also known as DISTA) are widely used in electronic devices such as integrated circuits and image display devices. The integrated circuit arranges n-channel Si transistors and p-channel Si transistors. ...and the inverter circuit, NAND gate, flip-flop, and other cells (logic cells) that are wired together. It has as its constituent unit a (sometimes called a standard cell) (see Non-Patent Literature 1). ).

[0004] On the other hand, the channel formation region is acid such as In-Ga-Zn oxide (In-Ga-Zn-O). A transistor made of an oxide semiconductor (OS) (hereinafter referred to as an OS transistor) is known. Since an oxide semiconductor has a larger bandgap than silicon, it is known that a transistor made of an oxide semiconductor has an extremely low off-current. For example, in Patent Document 1, a semiconductor device capable of retaining data even after power-off is described by using an OS transistor in a memory cell.

[0005] In recent years, with the improvement in performance, miniaturization, or weight reduction of electronic devices, the demand for a circuit in which semiconductor elements such as miniaturized transistors are integrated at high density has been increasing.

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

Non-Patent Documents

[0007]

Non-Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0008] One aspect of the present invention has at least one of the following problems. To provide a semiconductor device (cell) having a circuit with a reduced area in which a plurality of transistors are arranged and wired, and to provide a circuit having a plurality of transistors arranged and wired and capable of improving the operating speed. ​ To provide a semiconductor device (cell) in which multiple transistors are arranged and wired, To provide a semiconductor device (cell) having a circuit capable of reducing power consumption, and multiple It has a circuit in which a transistor is arranged and wired, which can reduce fluctuations in the power supply voltage. To provide a semiconductor device (cell) in which multiple transistors are arranged and wired, To provide a semiconductor device of a certain type, in which multiple transistors are arranged and wired, processing speed To provide a semiconductor device that can improve the arrangement and wiring of multiple transistors To provide a semiconductor device that can reduce power consumption, and which has multiple transistors To provide a semiconductor device in which the studs are arranged and wired, thereby reducing costs. or to provide a novel semiconductor device.

[0009] Furthermore, the description of these problems does not preclude the existence of other problems. One approach does not require that all of these issues be resolved. The title will become clear from the description in the specification, drawings, claims, etc. It is possible to extract other issues from the descriptions in the drawings, claims, etc. [Means for solving the problem]

[0010] (1) One aspect of the present invention comprises a first transistor, a second transistor, a first conductor, and It has two conductors, and the second transistor and the first transistor are stacked, and the first conductor The first power supply voltage is supplied to the first conductor, and the second power supply voltage is supplied to the second conductor, and the first conductor is the first The first and second regions are one or more layers, with the second conductor having a region and the first and second regions having a second region. Overlapping and extending parallel to each other through the insulator layer, the source electrode or of the first transistor The rain electrode is electrically connected to the first conductor and is the source electrode or dormant electrode of the second transistor. The rain electrode is electrically connected to the second conductor, and the second transistor is of the n-channel type. Furthermore, the channel formation region of the second transistor is formed of an oxide semiconductor, and the first transistor The transistor is a p-channel type, and the channel formation region of the first transistor is formed of silicon. It is a semiconductor device.

[0011] (2) Or, one aspect of the present invention has an input terminal and an output terminal, and the width of the first conductor and the The width of each of the two conductors is wider than the width of the conductor connected to the input terminal, and the width of the output terminal is wider than the width of the conductor connected to the input terminal. This is a semiconductor device according to embodiment (1), which is wider than the width of the conductor to be connected.

[0012] (3) Or, one aspect of the present invention comprises a first insulator having a first opening and a second insulator having a second opening It has a second insulator, a third conductor, and a fourth conductor, and in the first opening, the first trap The source or drain electrode of the converter and the first conductor are in direct contact via the third conductor. The second aperture is connected to the source electrode or drain electrode of the second transistor. A conductor is one of the following embodiments, (1) or (2), that is directly connected via the fourth conductor. This is a semiconductor device related to the above.

[0013] (4) Or, in one aspect of the present invention, between the first conductor and the first transistor, and the second Between the conductor and the second transistor, any of (1) to (3) which do not have a transistor This is a semiconductor device relating to one of the following embodiments.

[0014] (5) Or, in one aspect of the present invention, there is no conductor between the first region and the second region (1 A semiconductor device relating to any one of the embodiments of (4) to (4).

[0015] (6) Or, in one aspect of the present invention, the first conductor and the second conductor are formed by conductors in adjacent layers. A semiconductor device relating to any one of the embodiments (1) to (5) described above.

[0016] (7) Or, in one aspect of the present invention, the channel formation region of the first transistor, the first conductor, The second conductor and the channel formation region of the second transistor are stacked in that order (1) to (6) A semiconductor device relating to any one of the following embodiments.

[0017] (8) Or, in one aspect of the present invention, the channel formation region of the first transistor, the first conductor, The channel formation region of the second transistor and the second conductor are stacked in that order (1) to (6) A semiconductor device relating to any one of the following embodiments.

[0018] (9) Or, in one aspect of the present invention, the source electrode, gate electrode, and of the first transistor The direction in which the drain electrodes are aligned, and the source electrode, gate electrode, and drain electrode of the second transistor. The direction in which the electrodes are aligned is either parallel or antiparallel, and the gate electrode of the first transistor and the second The gate electrode of a two-transistor is one of the electrically connected (1) through (8). This is a semiconductor device relating to an embodiment.

[0019] (10) Or, in one aspect of the present invention, the direction in which the current flows through the first transistor and the second transistor The direction in which current flows through a transistor is either parallel or antiparallel, and the gate of the first transistor... The electrode and the gate electrode of the second transistor are electrically connected as shown in (1) to (9). This is a semiconductor device relating to one of the following embodiments.

[0020] (11) Or, in one aspect of the present invention, an acid forming the channel formation region of the second transistor Iridescent semiconductors have multiple c-axis oriented crystalline regions and exhibit a diffraction pattern that shows c-axis oriented crystals. Any of (1) to (10) in which the region in which it is observed accounts for 90% or more of a certain range This is a semiconductor device relating to one aspect.

[0021] (12) Or, one aspect of the present invention relates to any one aspect of (1) to (11) This is a storage device having a memory cell array that includes a body device.

[0022] (13) Or, one aspect of the present invention relates to any one aspect of (1) to (11) This is an RFID tag having a body device and an antenna.

[0023] (14) Or, one aspect of the present invention relates to any one aspect of (1) to (11) An electronic device comprising a body and a printed circuit board. [Effects of the Invention]

[0024] The present invention provides a semiconductor device having a reduced-area circuit in which transistors are arranged and wired. It is possible to improve the operating speed by arranging and wiring the transistors. A semiconductor device having a circuit that can do this can be provided. Or, a transistor To provide a semiconductor device having a circuit that is arranged and wired in a way that can reduce power consumption. It is possible to reduce fluctuations in the power supply voltage by arranging and wiring transistors. A semiconductor device having a circuit capable of doing so can be provided. Or, a novel semiconductor A body device can be provided. Note that the description of these effects does not preclude the existence of other effects. It is not that. Furthermore, one aspect of the present invention does not necessarily have to have all of these effects. No. Furthermore, any other effects will become clear from the description in the specification, drawings, claims, etc. This is how it works, and we extract other effects from the descriptions in the specification, drawings, claims, etc. It is possible. [Brief explanation of the drawing]

[0025] [Figure 1] A schematic diagram showing a semiconductor device according to one aspect of the present invention. [Figure 2] A schematic diagram showing a semiconductor device according to one aspect of the present invention. [Figure 3] A top view showing a semiconductor device according to one aspect of the present invention. [Figure 4] A cross-sectional view showing a semiconductor device according to one aspect of the present invention. [Figure 5] A cross-sectional view showing a semiconductor device according to one aspect of the present invention. [Figure 6] A cross-sectional view showing a semiconductor device according to one aspect of the present invention. [Figure 7] A schematic diagram showing a semiconductor device according to one aspect of the present invention. [Figure 8] A top view showing a semiconductor device according to one aspect of the present invention. [Figure 9] A cross-sectional view showing a semiconductor device according to one aspect of the present invention. [Figure 10] A schematic diagram showing a semiconductor device according to one aspect of the present invention. [Figure 11] A top view showing a semiconductor device according to one aspect of the present invention. [Figure 12] A cross-sectional view showing a semiconductor device according to one aspect of the present invention. [Figure 13] A schematic diagram showing a semiconductor device according to one aspect of the present invention. [Figure 14] A top view showing a semiconductor device according to one aspect of the present invention. [Figure 15]A cross-sectional view showing a semiconductor device according to one aspect of the present invention. [Figure 16] A schematic diagram showing a semiconductor device according to one aspect of the present invention. [Figure 17] A top view showing a semiconductor device according to one aspect of the present invention. [Figure 18] A cross-sectional view showing a semiconductor device according to one aspect of the present invention. [Figure 19] Circuit diagram showing a semiconductor device according to one aspect of the present invention. [Figure 20] Circuit diagram showing a semiconductor device according to one aspect of the present invention. [Figure 21] A block diagram showing a CPU according to one aspect of the present invention. [Figure 22] Circuit diagram showing a semiconductor device according to one aspect of the present invention. [Figure 23] Circuit diagram showing a semiconductor device according to one aspect of the present invention. [Figure 24] A diagram showing the configuration of a chip and module according to one aspect of the present invention. [Figure 25] A block diagram showing an RFID according to one aspect of the present invention. [Figure 26] A block diagram showing a storage device according to one aspect of the present invention. [Figure 27] A circuit diagram showing a memory cell. [Figure 28] A circuit diagram showing a memory cell. [Figure 29] A circuit diagram showing a memory cell. [Figure 30] A diagram showing an electronic device according to one aspect of the present invention. [Figure 31] A schematic diagram showing a semiconductor device according to one aspect of the present invention. [Figure 32] A schematic diagram showing a semiconductor device according to one aspect of the present invention. [Figure 33] A cross-sectional view showing a transistor. [Figure 34] A cross-sectional view showing a transistor. [Figure 35] Cross-sectional TEM image and local Fourier transform image of an oxide semiconductor. [Figure 36]A diagram showing the nanobeam electron diffraction pattern of an oxide semiconductor, and a diagram showing an example of a transmission electron diffraction measurement device. [Figure 37] A figure and a planar TEM image illustrating an example of structural analysis by transmission electron diffraction measurement. [Figure 38] A cross-sectional view showing the stacking of semiconductors, and a diagram showing the band structure. [Figure 39] A schematic diagram showing a semiconductor device according to one aspect of the present invention. [Modes for carrying out the invention]

[0026] Embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is as follows It is easy for anyone skilled in the art to see that the form and details can be changed in various ways, not just in the description. It is understood that the present invention is limited to the contents of the embodiments described below. No. Furthermore, when explaining the structure of the invention using drawings, the same reference numerals are used to indicate the same thing. It is used consistently across different drawings. Furthermore, when referring to similar items, the same hatch pattern is used. Combs, especially those without a symbol, are sometimes used.

[0027] Note that in the diagram, the size, thickness of the film (layer), or area may be exaggerated for clarity. There are cases where this is the case.

[0028] Furthermore, voltage is defined by a certain potential and a reference potential (e.g., ground potential (GND) or source potential). It often refers to the potential difference between (voltage and electric potential). Therefore, it is possible to rephrase voltage as electric potential. ru.

[0029] Note that the ordinal numbers "1st" and "2nd" are used for convenience only and do not necessarily indicate the order of the processes or the number of steps. This does not indicate a hierarchical order. Therefore, for example, "the first" could be "the second" or "the third." It can be explained by substituting it as appropriate. Also, the ordinal numbers and The ordinal numbers used to specify one aspect of the present invention may not always coincide.

[0030] Furthermore, even when the term "semiconductor" is used, if, for example, its conductivity is sufficiently low, it can be referred to as an "insulator." They may possess the following characteristics. Also, the boundary between "semiconductors" and "insulators" is ambiguous, and strictly speaking, In some cases, they cannot be closely distinguished. Therefore, the term "semiconductor" as used in this specification may also be used to refer to "insulators." It may be possible to substitute them. Similarly, the term "insulator" as used herein is equivalent to "semiconductor". In some cases, this can be rephrased as follows.

[0031] Also, even when the term "semiconductor" is used, for example, if the conductivity is sufficiently high, it can be referred to as a "conductor." They may possess the following characteristics. Also, the boundary between "semiconductors" and "conductors" is ambiguous, and strictly In some cases, they cannot be closely distinguished. Therefore, the term "semiconductor" as used in this specification may be used interchangeably with "conductor". It may be possible to substitute them. Similarly, the term "conductor" as used herein is equivalent to "semiconductor". In some cases, this can be rephrased as follows.

[0032] Furthermore, semiconductor impurities refer to components other than the main components that make up the semiconductor, for example, concentrated Elements with a concentration of less than 0.1 atomic percent are considered impurities. The presence of impurities can, for example, result in... The formation of Density of State (DOS) in the conductor, and carrier migration. In some cases, the degree of quality may decrease, or the crystallinity may decrease. In the case of conductors, impurities that alter the properties of semiconductors include, for example, Group 1 elements and Group 2 elements. These include group elements, group 14 elements, group 15 elements, and transition metals other than the main component, for example. Hydrogen (also found in water), lithium, sodium, silicon, boron, phosphorus, carbon, nitrogen There are elements such as [elements]. In the case of oxide semiconductors, for example, oxygen vacancies can be created by the inclusion of impurities such as hydrogen. It may form. Also, if the semiconductor is silicon, it can change the properties of the semiconductor. As pure substances, for example, Group 1 elements, Group 2 elements, Group 13 elements, and Group 1 elements, excluding oxygen and hydrogen. This includes elements from Group 5, among others.

[0033] In the embodiments shown below, unless otherwise specified, the insulator is, for example, boron. Element, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, Argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium An insulator containing one or more types of hafnium or tantalum can be used in a single layer or in a multilayer structure. Alternatively, a resin may be used as an insulator. For example, polyimide, polyamide, etc. A resin containing acrylic or silicone can be used. By using a resin, the upper surface of the insulator In some cases, planarization treatment is not necessary. Also, resins can form thick films in a short amount of time. This allows for increased productivity. Preferably, aluminum oxide is used as the insulator. Um, silicon nitride, silicon nitride, gallium oxide, yttrium oxide, zirconium oxide Insulators containing nium, lanthanum oxide, neodymium oxide, hafnium oxide, or tantalum oxide It can be used in a single layer or in a multi-layered configuration.

[0034] Furthermore, in the embodiments shown below, unless otherwise specified, the conductor is, for example, boron Element, nitrogen, oxygen, fluorine, silicon, phosphorus, aluminum, titanium, chromium, manganese, Cobalt, nickel, copper, zinc, gallium, yttrium, zirconium, molybdenum, Conductors containing one or more of the following elements: ruthenium, silver, indium, tin, tantalum, or tungsten. It can be used as a single layer or in a multilayer configuration. For example, it may be an alloy film or a compound film. Conductors containing luminium, conductors containing copper and titanium, conductors containing copper and manganese Using conductors containing indium, tin, and oxygen, conductors containing titanium and nitrogen, etc. That's fine.

[0035] In this specification, when it is stated that A has a region of concentration B, for example, A If the entire depth direction in a certain region is concentration B, then the average depth direction in a certain region of A If the average value is concentration B, then if the median value in the depth direction in a certain region of A is concentration B, If the maximum value in the depth direction in a certain region of A is concentration B, then the depth in a certain region of A If the minimum value in the direction is concentration B, then the convergence value in the depth direction in a certain region of A is concentration B. This includes cases where the region in which a reliable value of A itself can be obtained through measurement is the region where the concentration is B. .

[0036] Furthermore, in this specification, A is an area of ​​size B, length B, thickness B, width B, or distance B. When describing something as having, for example, if a certain area of ​​A has size B, length B, and thickness If B is the width B or distance B, then the average value in a region of A is the size B, length B, thickness B. If the size B is the width B or the distance B, then the median of a region A is the size B, length B, If the thickness is B, the width is B, or the distance is B, then the maximum value in a region of A is the size B, length B If the thickness is B, the width is B, or the distance is B, then the minimum value in a region of A is the size B, and the length is B. If B is thickness B, width B, or distance B, then the convergence value in a region of A is magnitude B, length B When the values ​​are B, thickness B, width B, or distance B, the reliable value of A itself can be obtained through measurement. This includes cases where the area has size B, length B, thickness B, width B, or distance B.

[0037] Note that channel length refers to, for example, the length of the semiconductor (or transistor) in a top view of a transistor. The region where the gate electrode overlaps with the part of the semiconductor through which current flows when the inverter is ON. Source (source region or source electrode) in the region where a region or channel is formed. This refers to the distance between the drain (drain region or drain electrode). In a transistor, the channel length is not necessarily the same across all regions. That is, one The channel length of a transistor may not be fixed to a single value. Therefore, in this specification... The channel length is any one value, maximum value, or minimum value in the region where the channel is formed. Use the value or average.

[0038] Channel width refers to, for example, the width of a semiconductor (or transistor) when it is in the ON state. In the region where the current flows (the part) and the gate electrode overlap, or in the region where the channel is formed This refers to the length of the section where the source and drain are facing each other in a single transistor. In a zista, the channel width is not necessarily the same across all regions. That is, one The channel width of a transistor may not be fixed to a single value. Therefore, in this specification... The channel width is any one value, maximum value, or minimum value in the region where the channel is formed. Use the value or average.

[0039] Furthermore, depending on the transistor structure, the channel may actually be formed in the region where the channel is formed. The channel width (hereinafter referred to as the effective channel width) and the top view of the transistor are shown. The channel width (hereinafter referred to as the apparent channel width) may differ from the actual channel width. For example, In transistors with a three-dimensional structure, the effective channel width is the top surface of the transistor. The apparent channel width shown in the figure becomes larger, and its effect cannot be ignored. In some cases, this may occur. For example, in transistors with a fine and three-dimensional structure, the upper surface of the semiconductor The proportion of channel regions formed on the semiconductor surface is compared to the proportion of channel regions formed on the semiconductor surface. The sum may become larger. In that case, the apparent channel width shown in the top view The effective channel width that is actually formed is larger than the theoretical width.

[0040] By the way, in transistors with a three-dimensional structure, the effective channel width is Estimation by measurement can sometimes be difficult. For example, it can be difficult to determine the effective channel width from the design value. For accumulation to occur, it is necessary to assume that the shape of the semiconductor is known. Therefore, the shape of the semiconductor is If the exact channel width is unknown, it is difficult to accurately measure the effective channel width.

[0041] Note that the "source" and "drain" functions of a transistor are different for transistors with opposite polarities. When adopting this method, or when the direction of current changes during circuit operation, the configuration may be reversed. Therefore, in this specification, the terms "source" and "drain" are used interchangeably. It may be used as a substitute.

[0042] In this specification, "parallel" means that two lines are at an angle of -10° or more and 10° or less. This refers to a state in which the positions are arranged. Therefore, it also includes cases where the angle is between -5° and 5°. Also, "Perpendicular" refers to a state where two straight lines are positioned at an angle between 80° and 100°. Therefore, this also includes cases where the angle is between 85° and 95°.

[0043] (Embodiment 1) In this embodiment, a semiconductor device according to one aspect of the present invention will be described with reference to the drawings.

[0044] An example of a semiconductor device configuration with transistors arranged and wired will be explained with reference to Figure 1. ru.

[0045] Figure 1 shows a semiconductor device in which transistors 490 and 491 are arranged and wired. This is a schematic diagram of 500. The semiconductor device 500 consists of a transistor 491 and wiring. It has a conductive material 480, a transistor 490, and a conductive material 482 that functions as wiring. The semiconductor device 500 has a transistor that is formed simultaneously with the transistor 490. It is acceptable. The transistor in question and transistor 490 are channel-forming with the same semiconductor material. A region is formed. The semiconductor device 500 is formed simultaneously with the transistor 491. It may have a zista. The transistor and transistor 491 are made of the same semiconductor material. A channel formation region is formed. Transistors 490 and 491 are stacked. Conductor 480 has the function of supplying a high power supply voltage (VDD) (hereinafter referred to as high power supply wiring). Also called (). Conductor 482 has the function of supplying low power supply voltage (VSS) (hereinafter referred to as low). Also called power wiring. Conductors 482 and 480 are stacked.

[0046] Transistor 491 is, for example, a p-channel type transistor with a high switching speed. A transistor can be used. For example, the switching speed of transistor 491 is Less than 10 ns, preferably less than 1 ns, more preferably less than 0.1 ns. Therefore, a p-channel Si transistor can be used as transistor 491. The Rangista 490 is, for example, an n-channel transistor with a high switching speed. A transistor can be used. For example, the switching speed of transistor 490 is 10 Less than ns, preferably less than 1 ns, more preferably less than 0.1 ns. For example, The channel-forming region includes an oxide semiconductor (preferably an oxide containing In, Ga, and Zn). Let's call the transistor transistor 490 (hereinafter referred to as a transistor using an oxide semiconductor). (Also called) can be used.

[0047] Note that the switching speed of a transistor refers to the time it takes for a single transistor to become non-conductive. This represents the speed at which the circuit transitions from a neutral state to a conductive state. This is because the transient occurs when the gate voltage changes. The charge corresponding to the increment in the drain current of the sta is accumulated in the gate capacitance over a period of time. It can be interpreted as speed. Alternatively, the switching speed of a transistor is... When using a transistor as an amplifier, the maximum frequency at which the current gain is 1 or greater (cutoff frequency) is determined. It can also represent the speed corresponding to the wavenumber.

[0048] The semiconductor device 500 is connected to transistor 491 and / or simultaneously with transistor 491. A transistor formed therein, and transistor 490, and / or transistor 490 By arranging and wiring the transistors that are formed at the same time, the circuit functions. This is a semiconductor device capable of doing so. Furthermore, the semiconductor device 500 supplies power to the transistor. It has power wiring. The semiconductor device 500 has, for example, various electronic circuit components and It may be any unit. Such a unit may be a standard cell, a logical cell, or simply It is called a cell.

[0049] The transistors and power supply wiring of the semiconductor device 500 are closely spaced. Wiring is preferably arranged regularly at the edges of the cell area. This allows the electronic circuit to It can be made smaller.

[0050] The semiconductor device 500 (cell) includes an inverter circuit, a NAND circuit, an AND circuit, and a NOR gate. Circuits, OR gates, buffers, level shifters, XOR gates, XNOR gates, AND-NOR gates Circuits, OR-NAND circuits, AND-OR-INV circuits, OR-AND-INV circuits, A Analog switches, flip-flops, settable flip-flops, resettable flip-flops Rip-flops, set and resettable flip-flops, adders, half-adders, ma Lutiplexer, demultiplexer, register, scan register, retention register This includes isolators, decoders, etc.

[0051] In particular, by arranging and wiring p-channel transistors and n-channel transistors Complementary Metal Oxide Semiconductor (CMOS) It is possible to construct a CMOS circuit using an IDE Semiconductor. By doing so, the power consumption of electronic circuits can be reduced.

[0052] Electronic circuits that use semiconductor devices 500 (cells) include CPUs and GPUs (Graphics Processing Units). ics Processing Unit), DSP(Digital Signal Processor), MCU (Microcontroller Unit), RF- ID (Radio Frequency Identification), Custom L Examples include SI. In these electronic circuits, multiple cells are arranged in multiple rows, forming an electronic circuit. The input and output terminals of the cell are connected by wiring so that it can function.

[0053] The low-power wiring (conductor 482) is connected to the source electrode (or source region) of transistor 490. It is connected to the region. Alternatively, the source electrode (or source region) of transistor 490 is , via the transistor formed simultaneously with transistor 490, low power supply wiring (conductor 4 82) is connected. The high-power wiring (conductor 480) is the source electrode of transistor 491. (or the source region) is connected. Alternatively, the source electrode of transistor 491 (if (The source region) is formed simultaneously with transistor 491 via a transistor, It is connected to the power wiring (conductor 480). Low power wiring (conductor 482) and high power wiring (conductor The electrical components (480) are arranged roughly parallel to each other and overlap each other. The output signal OUT is , the drain electrode (or drain region) of transistor 490, and transistor 490 and The drain electrode (or drain region) of the transistor is formed at the same time. The drain electrode (or drain region) of transistor 491, or simultaneously with transistor 491, One or more of the drain electrodes (or drain regions) of the transistor being formed The output is generated from the number. The input signal IN is the gate electrode of transistor 490, or the transistor The gate electrode of transistor 491, which is formed simultaneously with transistor 490, and the gate of transistor 491. One of the electrodes, or gate electrodes of the transistor 491, which are formed simultaneously with the transistor. It is entered as one or more inputs.

[0054] The low-power wiring (conductor 482) and the high-power wiring (conductor 480) are generally parallel to each other and overlap each other. As a result of being arranged in this manner, the wiring has a large parasitic capacitance (also called wiring capacitance). As a result, by using this wiring as power wiring, voltage fluctuations due to power supply noise can be reduced. This circuit can suppress power supply noise, is resistant to power supply noise, and reduces fluctuations in power supply voltage. It can be expressed. Also, in a semiconductor device to which semiconductor device 500 (cell) is applied, Capacitive elements are sometimes intentionally incorporated into power supply wiring to reduce fluctuations in power supply voltage. Low power wiring (conductor 482) and high power wiring (conductor 480) have large wiring capacities. This makes it possible to reduce the size of such capacitive elements. As a result, semiconductor devices can be miniaturized. This makes it possible to do so. Also, low power wiring (conductor 482) and high power wiring (conductor 480) By arranging them to overlap each other, the area occupied by the wiring can be reduced, and half The area of ​​the conductor device 500 (cell) can be reduced.

[0055] Low power wiring (conductor 482) and high power wiring (conductor 480) are adjacent to each other in the vertical direction. It is preferable to use a conductor for the wire. Use conductors for wiring adjacent to each other in the vertical direction. Therefore, the distance between wires becomes smaller, and the wires have a large wiring capacity. As a result, the power supply This makes it possible to create a circuit that is highly resistant to noise and can reduce fluctuations in power supply voltage. This makes it possible to miniaturize semiconductor devices using the 500 (cell) semiconductor device.

[0056] Note that when wiring conductor A and wiring conductor B are adjacent in the vertical direction, for example, half If the conductive device has n layers of conductive materials for wiring in order from the substrate side, then the conductive material for wiring A is a conductor for wiring in the i-th layer, and wiring conductor B is a conductor for wiring in the (i+1)-th layer. This means that (i is an integer greater than or equal to 1 and less than or equal to (n-1)).

[0057] Alternatively, low-power wiring (conductor 482) and high-power wiring (conductor 480) are connected to adjacent layers. It is preferable to use an electric component. Alternatively, in semiconductor device 500 (cell), low power wiring (conductor) is used. Between the electric body 482) and the high power wiring (conductor 480), there is a conductor that overlaps them. It is preferable that there be none.

[0058] Transistors 490 and 491 are positioned overlapping each other. This allows for a reduction in the area of ​​the semiconductor device 500 (cell).

[0059] The fact that transistors 490 and 491 overlap each other means, at least, The gate electrode and drain electrode (or drain region) of transistor 490, In other words, a part of the source electrode (or source region) is the gate electrode of transistor 491. Electrode, drain electrode (or drain region), or source electrode (or source region) This refers to overlapping with a part of the gate electrode of transistor 490. Region including the in electrode (or drain region) and the source electrode (or source region) And the gate electrode and drain electrode (or drain region) of transistor 491, The region including the source electrode (or source region) overlaps with at least a portion of it. This refers to the region containing the components of transistor 490 and the region containing the components of transistor 491. This refers to a situation where the area containing the constituent elements overlaps with, at least partially.

[0060] Transistors 490 and 491 are arranged overlapping each other, The direction in which current flows in transistor 490 and the direction in which current flows in transistor 491 They are generally parallel or antiparallel. Alternatively, the source electrode and gate electrode of transistor 490 The orientation of the poles and drain electrodes, and the source electrode and gate electrode of transistor 491. And the direction in which the drain electrodes are aligned is generally parallel. As a result, transistor 490 When connecting the gate electrode of transistor 491 to the gate electrode of transistor 490, transistor 490 and The transistor 491 can be placed in a narrow area, including the gate electrode connection, and the semiconductor This makes it possible to reduce the area of ​​the 500 (cell) unit.

[0061] Also, transistor 491 or a transistor of the same type as transistor 491, By stacking transistors of the same type as the ZISTA 490 or the transistor 490, Compared to not doing so, the area can be reduced, thus shortening the wiring length connecting the transistors. This makes it possible to reduce parasitic capacitance associated with signal wiring. As a result, it becomes possible to improve the operating speed of the semiconductor device 500 (cell).

[0062] Transistor 490 is located above transistor 491. Conductor 482 is conductive It is located above body 480. Conductor 482 is located above transistor 491.

[0063] Furthermore, when we say that part A is above part B, we mean that, from the perspective of the substrate, part A is further away from part B. It refers to being located at a certain point. Alternatively, it refers to part A being formed after part B. The term "position" includes regions, conductors, insulators, transistors, electrodes, etc. In particular, semiconductor devices are... If the substrate has n layers of conductive material for wiring, starting from the substrate side, then part A is below conductor C. This means that part A is located between the conductor for the i-th layer wiring and the conductor for the (i+1)-th layer wiring. This means that conductor C uses a conductor for wiring from the (i+1)th layer onwards to the nth layer onwards. U. The statement that part A is above conductor C means that part A is above the conductor for wiring of the i-th layer and the (i+ 1) Located between the conductor for wiring layers, and the conductor C is for wiring layers 1 and above, and up to layer i. This refers to the use of a conductive material.

[0064] The transistors and power supply wiring of the semiconductor device 500 (cell) are arranged closely together. This makes it possible to make electronic circuits smaller. The area occupied by semiconductor device 500 (cells) The area (also called a cell area) may be a rectangle with height Hcell and width Wcell. By the way, wiring connecting multiple cells has wires that are roughly perpendicular to each other and extend in the height direction. It is preferable to use at least a wire (conductor) and wiring (conductor) that extends in the width direction. Let Px be the pitch of the wiring extending in the height direction, and Py be the pitch of the wiring extending in the width direction. Then, the cell will have a height Hcell that is an integer multiple of Py, and a width Wcell that is an integer multiple of Px. In some cases, the cell area may be doubled. This allows for efficient connections between cells. It can be done easily.

[0065] Figure 39 is an example of a top view of an inverter circuit cell. A detailed explanation of the top view will be provided later. Here, we will explain the cell area. In Figure 39, for ease of understanding, an insulator is used. Some parts are omitted in the diagram. The cell shown in Figure 39 is transistor 490, transistor It has transistor 490, conductor 480, and conductor 482. It overlaps with 91. Also, conductor 480 and conductor 482 overlap. (This cell) The height is 6*Py and the width is 4*Px.

[0066] The semiconductor device 500 (cell) described above can have its cell area reduced. For example, In the case of an inverter circuit, the cell height is preferably less than or equal to WW + WT + 5 * Py. Preferably, it can be WW + WT + 4 * Py or less, where WW is the power line width. WT is the maximum channel width among the multiple transistors in the semiconductor device 500 (cell). This is the channel width. Also, the cell width is 5*Px or less, more preferably 4*Px or less. This can be done. Also, for small inverters, the cell height can be set to 6*Py or less. This is possible. Also, for example, in the case of a 2-input NAND circuit, the cell height is preferably This is less than or equal to WW + WT + 7*Py, and more preferably less than or equal to WW + WT + 5*Py. This is possible. Furthermore, the cell width is preferably 5*Px or less, more preferably 4*Px or less. It can be set below.

[0067] Furthermore, it is preferable that the heights of multiple cells are the same. This way, the cell heights can be adjusted. By setting the row height and arranging multiple cells in multiple rows, efficient arrangement and wiring can be achieved. can.

[0068] In order to closely arrange the transistors and power supply wiring of the semiconductor device 500 (cell), Source or drain electrode of transistor 490 and a conductor that functions as power supply wiring. (482) When the electrode and the conductor are electrically connected, the electrode and the conductor are provided in an insulator. It is preferable that the connections be made directly via a conductor (also called a via) provided in the opening. Alternatively, it is preferable that the connection be made via vias and a conductor sandwiched between the vias. Source or drain electrode of ZISTA 491 and a conductor (48) that functions as power wiring. 0) When the electrode and the conductor are electrically connected, an opening is provided in the insulator. It is preferable that the vias and the vias are directly connected via a conductor provided in the section. Alternatively, the vias and the vias It is preferable that the connection is made via a conductor sandwiched between them.

[0069] In order to closely arrange the transistors and power supply wiring of the semiconductor device 500 (cell), The semiconductor device 500 (cell) includes a transistor 490 and a conductor that functions as power wiring. Between 482), and between transistor 491 and the conductor (480) which functions as power supply wiring. It is preferable that there are no transistors in between.

[0070] The transistors and power supply wiring of the semiconductor device 500 (cell) are arranged closely together, and multiple To efficiently arrange the number of cells, power wiring is regularly placed at the edges of the cell area. Preferably, the semiconductor device (cell) according to one aspect of the present invention has one side of the cell area Power wiring may be located only at the ends. Power wiring may be located at both ends of the cell area. In some cases, the cell area can be made smaller compared to when it is placed in a fixed location.

[0071] An example of a semiconductor device configuration with transistors arranged and wired will be explained with reference to Figure 31. The schematic diagram of the semiconductor device shown in Figure 31 is a representation of the semiconductor device 500 (cell) shown in Figure 1. transistor 491, high power wiring (conductor 480), transistor 490, low This diagram schematically shows the positional relationship between the power supply wiring (conductor 482) and the other components.

[0072] In Figure 31(A), the semiconductor device 500 (cell) consists of a transistor 491 and a high power supply distribution A wire (conductor 480), low-power wiring (conductor 482), and transistor 490 are stacked in order. In other words, the high-power wiring (conductor 480) is located above transistor 491. The low-power wiring (conductor 482) is positioned above the high-power wiring (conductor 480). Furthermore, the transistor 490 is positioned above the low-power wiring (conductor 482).

[0073] This configuration allows for low-power wiring (conductor 482) and high-power wiring (conductor 482) to be used. 0) is located close together in the vertical direction and therefore has a large wiring capacity. As a result, power supply noise This allows for the creation of a circuit that is highly resistant to power supply voltage fluctuations and can reduce power supply voltage variations. It becomes possible to miniaturize semiconductor devices using the 500 (cell) semiconductor device.

[0074] In Figure 31(B), the semiconductor device 500 (cell) consists of a transistor 491 and a high power supply distribution. A wire (conductor 480), a transistor 490, and a low-power wiring (conductor 482) are stacked in order. In other words, the high-power wiring (conductor 480) is located above transistor 491. The transistor 490 is positioned above the high-power wiring (conductor 480), Low power wiring (conductor 482) is positioned above the ZISTA 490.

[0075] In semiconductor device 500 (cell), the source electrode (or saw) of transistor 490 The drain region (or drain electrode) is above transistor 490. In some cases, the configuration may be such that it is connected only to one conductor. In that case, the conductor is a semiconductor device. It is used for wiring connections between transistors within a 500 (cell). Therefore, the conductive material In some cases, it may be difficult to use it as wiring for connecting multiple semiconductor devices 500 (cells). This is because the wiring positions are irregular in the connections between multiple semiconductor devices (cells). This is because scattered unusable areas increase the number of wiring connections that need to be rerouted. Even in such cases, the area increase is minimal, and the conductive material can be used as power wiring. This is possible. This is because the power wiring is regularly arranged at the edges of the semiconductor device 500 (cell) area. This is because... In such cases, the stacked power wiring (conductor 482) and semiconductor device 5 The wiring for connecting transistors within a cell can be constructed from the same layer of conductive material. This makes it possible to keep manufacturing costs low.

[0076] Refer to Figures 2 to 4 and Figure 19 for a more specific view of the semiconductor device 500 (cell) in Figure 1. The device structure will be explained. The semiconductor device 501 (cell) shown in Figure 2 is the same as the semiconductor shown in Figure 1. In the device 500 (cell), transistors 490 and 491 are arranged. It is a wired semiconductor device (cell).

[0077] Figure 2 is a schematic diagram showing an example of the configuration of semiconductor device 501 (cell). Note that Figure 2 and Figure In section 3, for the sake of easier understanding, some parts such as insulators are omitted, and also formed in the same layer. The same hatching pattern is applied to conductive materials and other components.

[0078] Figure 3 is a top view showing an example of the configuration of semiconductor device 501 (cell), and Figure 3(A) shows , of the semiconductor device 501 (cell), the region including the transistor 491 and the conductor 480 The image shows a top view, and Figure 3(B) shows transistor 490 of semiconductor device 501 (cell). The image shows a top view of the region including conductors 482 and 484.

[0079] Figure 4 is a cross-sectional view showing an example of the configuration of semiconductor device 501 (cell). On the left side of Figure 4 Figures 3(A) and 3(B) show cross-sectional views taken along the dashed line A1-A2, and the right side of the same figure... The cross-sections are shown along the dashed line B1-B2 in Figures 3(A) and 3(B).

[0080] The semiconductor device 501 (cell) has transistors 491 and 490, as shown in Figure 1. The CMOS inverter circuit shown in 9 is constructed. In the CMOS inverter circuit, the output signal O UT is the inverted signal of the input signal IN. Transistor 491 is, for example, a switch A fast-speed p-channel transistor can be used. In this embodiment, a p-channel transistor is used. This explanation will use a channel-type Si transistor. As an example, switch speed A fast n-channel transistor can be used as transistor 490. In the application, an oxide semiconductor (preferably an oxide containing In, Ga, and Zn) is channeled. The explanation will assume that the transistor included in the transistor formation region is used as transistor 490.

[0081] The semiconductor device 501 (cell) includes a transistor 491, a conductor 480, and a transistor It has 490, a conductor 482, a conductor 424a, and a conductor 424b. Transistor 4 90 and transistor 491 are stacked. Conductors 482 and 480 are stacked. Transistor 491 has region 476a, region 476b, and conductor 454. The transistor 490 has conductors 416a, 416b, and 404.

[0082] The semiconductor device 501 (cell) has a conductor 484. The transistor 490 is a conductor It has 413.

[0083] Conductor 482 functions as wiring that supplies a low power supply voltage (VSS) (low power supply wiring). It has. Conductor 480 is a wiring (high power wiring) that supplies a high power voltage (VDD). It has a function. Regions 476a and 476b are the source electrodes of transistor 491 ( Alternatively, one of the source region and the drain electrode (or drain region) and the other It has the function of the conductor 454, which functions as the gate electrode of transistor 491. Conductors 416a and 416b are the source electrodes (or saw electrodes) of transistor 490. It has the function of one or the other of the drain region and the drain electrode (or drain region). Conductor 404 functions as the gate electrode of transistor 490.

[0084] Conductor 413 functions as the gate electrode of transistor 490. Conductor 48 4 functions as wiring that supplies voltage to the gate electrode of transistor 490.

[0085] Furthermore, both conductors 413 and 404 are gate electrodes of transistor 490. It has the function of being a conductor, but the potential applied to each can be different. For example, By applying a negative or positive gate voltage to the electrode 413, the threshold voltage of the transistor 490 is determined. You can adjust the pressure.

[0086] The high-power wiring (conductor 480) is located in the source region (region 476a) of transistor 491. Electrically connected. The low-power wiring (conductor 482) is the source electrode of transistor 490. Electrically connected to (conductor 416a). High power wiring (conductor 480) and low power wiring ( The conductors 482) are arranged in roughly parallel and overlapping positions. The gate electrode (conductor 404) and the gate electrode (conductor 454) of transistor 491 are electrically connected. It is connected to the drain electrode (conductor 416b) of transistor 490 and the transistor It is electrically connected to the drain region (region 476b) of TA491. Output signal OUT This refers to the drain electrode (conductor 416b) of transistor 490 and transistor 491. A conductor 4 located above the conductor 416b is connected to the drain region (region 476b). Output is sent externally from 24a. The input signal IN is the gate electrode (conductive) of transistor 490. A conductive body 404) is connected to the gate electrode (conductor 454) of transistor 491. The input is received from the outside via the conductor 424b located above body 404.

[0087] The gate electrode (conductor 413) of transistor 490 is connected to the wiring that supplies the gate voltage (conductor It is electrically connected to the electric body 484. Wiring (conductor 484) that supplies the gate voltage and low voltage The source wiring (conductor 482) is arranged in roughly parallel and overlapping positions.

[0088] The low-power wiring (conductor 482) and the high-power wiring (conductor 480) are generally parallel to each other and overlap each other. As a result of being arranged in this manner, the wiring has a large parasitic capacitance (also called wiring capacitance). As a result, by using this wiring as power wiring, voltage fluctuations due to power supply noise can be reduced. This circuit can suppress power supply noise, is resistant to power supply noise, and reduces fluctuations in power supply voltage. It can be expressed. Also, in a semiconductor device to which semiconductor device 501 (cell) is applied, Capacitive elements are sometimes intentionally incorporated into power supply wiring to reduce fluctuations in power supply voltage. Low power wiring (conductor 482) and high power wiring (conductor 480) have large wiring capacities. This makes it possible to reduce the size of such capacitive elements. As a result, semiconductor device 501 ( It becomes possible to miniaturize semiconductor devices using (Lu). Also, low power wiring (conductor 4 82) and the high-power wiring (conductor 480) are arranged to overlap each other, so that the wiring The occupied area can be reduced, and the surface of the semiconductor device to which the semiconductor device 501 (cell) is applied The product can be made smaller.

[0089] High-power wiring (conductor 480) and low-power wiring (conductor 482) are adjacent to each other in the vertical direction. Conductive materials can be used for wiring. By using conductive materials for wiring adjacent to each other in the vertical direction... As a result, the distance between wires becomes smaller, and the wires have a large wiring capacity. This allows for the creation of a circuit that is resistant to noise and can reduce fluctuations in power supply voltage. Furthermore, it becomes possible to miniaturize semiconductor devices to which semiconductor device 501 (cell) is applied.

[0090] Alternatively, low-power wiring (conductor 482) and high-power wiring (conductor 480) are connected to adjacent layers. It is preferable to use an electric material. Alternatively, low power wiring (conductor 482) and high power wiring (conductive material) may be used. It is preferable that there is no conductor between the body 480.

[0091] Transistors 490 and 491 are positioned overlapping each other. This allows for a reduction in the area of ​​the semiconductor device 501 (cell).

[0092] Transistors 490 and 491 are arranged overlapping each other, The direction in which current flows in transistor 490 and the direction in which current flows in transistor 491 They are generally parallel or antiparallel. Alternatively, the source electrode and gate electrode of transistor 490 The orientation of the poles and drain electrodes, and the source electrode and gate electrode of transistor 491. And the direction in which the drain electrodes are aligned is generally parallel. As a result, transistor 490 The drain electrode and the drain electrode of transistor 491 can be placed in close proximity to each other. Furthermore, the gate electrode of transistor 490 and the gate electrode of transistor 491 are connected to each other. It can be placed in close proximity to it. With this arrangement, transistor 490 The drain electrode is connected to the drain electrode of transistor 491, and transistor 49 When connecting the gate electrode of transistor 0 to the gate electrode of transistor 491, the area of ​​the connection region This allows for a reduction in size, thereby reducing the area of ​​the semiconductor device 501 (cell).

[0093] The direction in which current flows in transistor 490 (or the source of transistor 490) The direction in which the electrodes, gate electrode, and drain electrode are aligned, and the low power wiring (conductor 482) The direction of extension is generally parallel. In this case, the source electrode and drain of transistor 490. Even if the electrodes are swapped and rearranged, the source electrode and the low-power wiring (conductor 482) are short. It is preferable that it be connectable by wiring. The direction of current flow in transistor 491 (Alternatively, the arrangement of the source electrode, gate electrode, and drain electrode of transistor 491) The direction of the power supply wiring (conductor 480) is generally parallel to the direction of extension. In this case, Regardless of which side of the gate electrode the source electrode of the inverter 491 is located on, the high power supply wiring (Conductor 480) can be connected by short wiring, which is preferable.

[0094] Furthermore, the direction in which current flows in transistor 490 (or the direction of transistor 490) (The direction in which the source electrode, gate electrode, and drain electrode are aligned) and low power wiring (conductor 48 2) The extension direction may be approximately perpendicular. The source electrode of transistor 490 is low current. When connecting to the power supply wiring (conductor 482), position the source electrode so that it overlaps with the low power supply wiring. This is preferable because it allows for a reduction in area. In transistor 491, The direction of flow (or the source electrode, gate electrode, and dray electrode of transistor 491) The direction in which the electrodes are aligned and the direction in which the high-power wiring (conductor 480) extends are generally perpendicular. This is also good. When the source electrode of transistor 491 is connected to the high power supply wiring (conductor 480). This allows the source electrode to be positioned so as to overlap with the high-power wiring, thereby reducing the area required. Therefore, it is preferable.

[0095] Furthermore, if the input / output terminals are connected to adjacent or nearby cells, the output signal The output terminal of OUT connects to the drain electrode of transistor 490 without passing through conductor 424a. The drain region (region 476b) of the conductor 416b) or the transistor 491 may be directly connected to the input terminals of adjacent cells or neighboring cells. Also, the input terminal of the input signal IN may be directly connected to the gate electrode (conductor 404) of the transistor 490 or the gate electrode (conductor 454) of the transistor 491 without passing through the conductor 424b, to the output terminals of adjacent cells or neighboring cells.

[0096] In FIG. 2, the semiconductor device 501 (cell) has the transistor 491, the high power supply wiring (conductor 480), the low power supply wiring (conductor 482), the conductor 484, and the transistor 490 stacked in sequence. That is, the high power supply wiring (conductor 480) is disposed above the transistor 491, the low power supply wiring (conductor 482) is disposed and overlaps above the high power supply wiring (conductor 480), the conductor 484 is disposed and overlaps above the low power supply wiring (conductor 482), and the transistor 490 is disposed above the conductor 484.

[0097] Since the source electrode (or source region) of the transistor 491 is connected to the high power supply wiring (conductor 480), it is easier and preferable to connect than the case where the source electrode (or source region) of the transistor 491 is connected to the low power supply wiring (conductor 482) disposed above the high power supply wiring (conductor 480). Since the source electrode (or source region) of the transistor 490 is connected to the low power supply wiring (conductor 482), it is easier and preferable to connect than the case where the source electrode (or source region) of the transistor 490 is connected to the high power supply wiring (conductor 480) disposed below the low power supply wiring (conductor 482).

[0098] Furthermore, in the semiconductor device 501 (cell), high power wiring (conductor 480) and low power wiring The wiring width of each wire (conductor 482) is the gate electrode (conductor 45) of transistor 491. 4) The gate electrode (conductor 404) of transistor 490, or the input / output signal transfer It is preferable that the width is wider than the wiring width of the signal wiring. Alternatively, high power wiring (conductor 480) and The width of each low-power wiring (conductor 482) is the width of the wiring (conductor) connected to the input terminal. The width of the power supply wiring is preferably wider than the width of the wiring (conductor) connected to the output terminal. Since these often carry more current than signal wiring, it is preferable to have lower wiring resistance than signal wiring. This is because it is desirable.

[0099] Furthermore, in the semiconductor device 501 (cell), high power wiring (conductor 480) and low power wiring The width of the region where the lines (conductor 482) overlap is the gate electrode (conductor 45) of transistor 491. 4) The gate electrode (conductor 404) of transistor 490, or the input / output signal transfer It is preferable that the width is wider than the wiring width of the signal wiring. Alternatively, high power wiring (conductor 480) and The width of the area where the low-power wiring (conductor 482) overlaps is the width of the wiring (conductor) connected to the input terminal. It is preferable that the width of the connector is wider than the width of the wiring (conductor) connected to the output terminal.

[0100] A further detailed explanation will be provided using the cross-sectional view of the semiconductor device shown in Figure 4.

[0101] The semiconductor device 501 (cell) shown in Figure 4 consists of transistor 491 and transistor 491 It has an insulator 442 on top and a transistor 490 on the insulator 442. 442 is preferably an insulator that has the function of blocking oxygen and hydrogen.

[0102] The transistor 491 is connected to an insulator 462 on the semiconductor substrate 400 and a conductive material on the insulator 462. Body 454, insulator 470 in contact with the side surface of conductor 454, and conductor in semiconductor substrate 400 Regions 476a and 476b, which do not overlap with 454 and insulator 470, and insulator 4 It has a region 474 which overlaps with region 70.

[0103] The semiconductor substrate 400 is, for example, a single semiconductor such as silicon or germanium, or carbonized Silicon, silicon germanium, gallium arsenide, gallium nitride, indium phosphide, acid Compound semiconductors such as zinc oxide and gallium oxide can be used. Note that the semiconductor substrate 400 is Either an amorphous or crystalline semiconductor can be used, and as a crystalline semiconductor, a single-crystal semiconductor is used. These include polycrystalline semiconductors and microcrystalline semiconductors.

[0104] Insulator 462 functions as a gate insulator for transistor 491. The electric element 454 functions as the gate electrode of the transistor 491. Also, the insulator 4 70 functions as a sidewall insulator (also called a sidewall) for the conductor 454. Furthermore, regions 476a and 476b are the source region or drain region of transistor 491. It functions as a region. In addition, region 474 is the LDD (Light) of transistor 491. It functions as a (doped drain) region.

[0105] Furthermore, region 474 can be formed by impurity doping using conductor 454 as a mask. It is possible. Furthermore, an insulator 470 is then formed, and the conductor 454 and the insulator 470 are massed together. Regions 476a and 476b can be formed by impurity injection. When regions 474 and regions 476a, 476b are formed by adding the same type of impurities region 474 becomes a region with a lower impurity concentration than regions 476a and 476b.

[0106] By having region 474, transistor 491 can suppress the short-channel effect Therefore, it can be seen that it has a structure suitable for miniaturization.

[0107] Transistor 491 is separated from other transistors provided on semiconductor substrate 400 by insulator 4 60 or the like. In FIG. 4, an example in which insulator 460 is formed by a technique called STI (Shallow Trench Isolation) is shown, but it is not limited to this. For example, instead of insulator 460, an insulator formed by the LOCOS (Local Oxidation of Silicon) method may be used to separate the transistors

[0108] Transistor 490 includes conductor 413, insulator 402 on conductor 413, semiconductor 406a on insulator 4 02, semiconductor 406b on semiconductor 406a, conductors 416a and conductor 4 16b that contact the side surfaces of semiconductor 406a, the upper and side surfaces of semiconductor 406b, the upper and side surfaces of conductor 416a semiconductor 406c that contacts the upper and side surfaces of conductor 416b, insulator 412 on semiconductor 406c, and conductor 404 on insulator 412. Here, although conductor 413 is regarded as part of transistor 490, it is not limited to this. For example, conductor 413 may be an independent component from transistor 490.

[0109]

[0109] Conductor 413 functions as the gate electrode of transistor 490. It also acts as an insulator. Body 402 functions as a gate insulator for transistor 490. Also, conductor 4 16a and conductor 416b are the source and drain electrodes of transistor 490. It has the function of being a gate insulator for transistor 490. It has the function of conductor 404 as the gate electrode of transistor 490. It holds.

[0110] As shown in Figure 4, the conductors 416a and 416b are located on the sides of semiconductor 406b. They make contact. Furthermore, the conductor 404 electrically surrounds the semiconductor 406b in the channel width direction. The structure is such that the semiconductor 406b is surrounded not only on the top surface but also on the sides. This type of transistor structure is called a surrounded channel (s-ch This is called an annel structure. Preferably, the conductor 404 has a structure that extends below the semiconductor 406b. .

[0111] By making the transistor structure an s-channel structure, the side surface of semiconductor 406b Conversely, it becomes easier to control the channel formation region by the gate electric field. Conductor 404 is a semiconductor In structures that extend below 406b, controllability is even better. As a result, the transient The subthreshold swing value (also called the S value) of the Ta490 can be reduced. The current in the off state of transistor 490 can be reduced.

[0112] This structure allows for good electrical characteristics even in minute transistors. Due to the miniaturization of transistors, semiconductor devices having such transistors have a high degree of integration. This makes it possible to create high-density semiconductor devices. Also, the parasitic capacity of transistors Because the amount decreases, good switching characteristics can be obtained. For example, transistor 490 The channel length is preferably 40 nm or less, more preferably 30 nm or less, and even more preferably It has a region of 20 nm or less, and the transistor 490 has a channel width of preferably 4 Having a region of 0 nm or less, more preferably 30 nm or less, and more preferably 20 nm or less. ru.

[0113] Furthermore, if transistor 490 has an s-channel structure, semiconductor 406b Channels may form throughout the entire bulk. Therefore, the thicker the semiconductor 406b, the more channels may form. The channel formation region becomes larger. For example, 20 nm or more, preferably 40 nm or more, and A semiconductor having a region with a thickness of preferably 60 nm or more, more preferably 100 nm or more. It would be fine to use 406b. However, this may reduce the productivity of semiconductor devices, for example. A thickness of 300 nm or less, preferably 200 nm or less, and more preferably 150 nm or less. The semiconductor 406b having the region can be used. By adopting such a structure, s-cha In an NEL structure, a large current can flow between the source and drain of the transistor, and conduction is possible. The on-current can be increased.

[0114] Also, at least a portion of the conductor 416a (and / or conductor 416b) (and (All of them) are the surface, sides, top, and / or bottom of semiconductor layers such as semiconductor 406b. It is in contact with at least a part (or all) of the surface. The semiconductor 406b in contact. In this case, hydrogen can enter the oxygen-deficient site to form a donor level, and n-C This results in a channel-type conductive region. Note that the state in which hydrogen enters the oxygen-deficient site is called V. O H and Table This may be noted. As a result, current flows through the n-channel conductive region, resulting in good ON It is possible to obtain an electric current.

[0115] Furthermore, as an oxide semiconductor, CAAC-OS (C Axis Aligned) will be discussed later. Using Crystalline Oxide Semiconductor Preferred. CAAC-OS is one of the oxide semiconductors having multiple c-axis oriented crystalline regions. Yes. In particular, it is preferable to increase the CAAC ratio, as will be discussed later. The CAAC ratio is constant. This is the percentage of the region within a given range where the CAAC-OS diffraction pattern is observed. (CAAC ratio) By increasing the rate, for example, defects can be reduced. Also, for example, Rear scattering can be reduced. Furthermore, it enables the creation of CAAC-OS with fewer impurities. This allows for, for example, extremely low off-current characteristics to be achieved. For example, a good quality C If it is AAC-OS, the CAAC ratio should be 50% or more, preferably 80% or more, more preferably More preferably 90% or more, and more preferably 95% to 100%.

[0116] Furthermore, the impurity concentration in semiconductor 406b is reduced, making the oxide semiconductor intrinsically or substantially intrinsically Making it true is effective. Here, essentially true means that the carrier density of the oxide semiconductor is , 1 x 10 17 / cm 3 It should be less than 1 × 10⁻⁶ 15 / cm 3 It is less than And, more preferably, 1 × 10 13 / cm 3 It indicates being less than. In an oxide semiconductor, hydrogen, nitrogen, carbon, silicon, and metal elements other than the main component become impurities. For example hydrogen and nitrogen contribute to the formation of donor levels in the oxide semiconductor, increasing the carrier density . Also, silicon forms impurity levels in the oxide semiconductor .

[0117] For a transistor using a substantially intrinsic oxide semiconductor, since the carrier density in the channel formation region is low, the threshold voltage rarely becomes negative in electrical characteristics. Also , a transistor using the oxide semiconductor has few carrier traps in the oxide semiconductor , so the variation in electrical characteristics is small, resulting in a highly reliable transistor. Also, a transistor using the oxide semiconductor can achieve a very low off-current .

[0118] For example, when a transistor using an oxide semiconductor is in the off state, the drain current can be 1×10 A or less at room temperature (about 25°C), preferably 1×10 -18 A or less, more preferably 1×10 -21 A or less, or 1×10 A or less at 85°C, preferably 1 -24 ×10 -15 A or less, more preferably 1×10 ×10 -18 A or less, and even more preferably 1×10 -21 A or less. Note that , when a transistor is in the off state, in the case of an n-channel transistor, it means a state where the gate voltage is less than the threshold voltage. Specifically, if the gate voltage is 1 V or more, 2 V or more, or 3 V or more less than the threshold voltage, the transistor is in the off state .

[0119] ​​​Furthermore, if transistor 490 is a storage type with electrons as the majority carrier, semiconductor 40 The electric field extending from the region in contact with the source and drain electrodes of 6b to the channel over a short distance is Because it is shielded, the transistor can control carriers with the gate field even with a short channel. It's cheap.

[0120] Furthermore, by forming transistors on an insulating surface, the semiconductor substrate can be directly converted into a channel shape. Unlike when used as a constituent region, parasitic capacitance is formed between the gate electrode and the semiconductor substrate. Because of this, controlling carriers using the gate field becomes easier.

[0121] This structure allows for good electrical characteristics. Specifically, excellent subs It provides a high threshold characteristic, extremely low off-current, and good on-current. Itching characteristics can be obtained.

[0122] The three-layer structure described above is just one example. For example, two layers without semiconductor 406a or semiconductor 406c. A layered structure is also acceptable. Alternatively, it can be on or below semiconductor 406a, or semiconductor 406 Examples of semiconductors 406a, 406, and 406c are shown above or below. It may also be a four-layer structure having one of the semiconductors. Alternatively, semiconductor 406 may be a semiconductor Above body 406a, below semiconductor 406a, above semiconductor 406c, below semiconductor 406c In two or more places, semiconductor 406a, semiconductor 406, and semiconductor 406c are used as examples. It may have an n-layer structure (where n is an integer greater than or equal to 5) that comprises any one of the semiconductors.

[0123] Furthermore, it is preferable that the insulator 402 is an insulator containing excess oxygen.

[0124] For example, an insulator containing excess oxygen is an insulator that has the function of releasing oxygen through heat treatment. It is a body. For example, silicon oxide containing excess oxygen releases oxygen through heat treatment, etc. It is silicon oxide that can move through the film. Therefore, the insulator 402 is an insulator that allows oxygen to move through the film. It is an insulating material. That is, the insulator 402 should be an insulator that has oxygen permeability. For example, The edge material 402 can be an insulator with higher oxygen permeability than the semiconductor material 406a.

[0125] When an insulator containing excess oxygen has the function of reducing oxygen vacancies in semiconductor 406b. There is. In semiconductor 406b, oxygen vacancies form DOS, which can become hole traps, etc. Furthermore, hydrogen can enter oxygen-deficient sites to generate electrons, which are carriers. Therefore, by reducing the oxygen vacancy in semiconductor 406b, transistor 490 can be safely It is possible to impart specific electrical characteristics.

[0126] The insulator 442 shown in Figure 4, etc., is located between transistor 491 and transistor 490. It is provided in the following location. The insulator 442 may be, for example, an oxide containing aluminum, for example, an oxide Aluminum is used. Insulator 442 is an insulator that blocks oxygen and hydrogen. The density is 3.2 g / cm³. 3 Aluminum oxide below a certain level has a particularly high ability to block hydrogen. Therefore, it is preferable. Alternatively, aluminum oxide with low crystallinity is particularly good for blocking hydrogen. It is desirable because it is highly functional.

[0127] For example, if transistor 491 is a transistor using silicon, then hydrogen is externally... By supplying from this source, dangling bonds of silicon can be reduced, thus tra The electrical characteristics of the inverter may be improved. Hydrogen supply is, for example, under a hydrogen-containing atmosphere. This can be done by heat treatment in [location]. Alternatively, for example, a hydrogen-containing insulator can be transposed By placing it near transistor 491 and subjecting it to heat treatment, the hydrogen is diffused, and transistor 4 It is also acceptable to supply it to 91. Specifically, the insulator 464 on transistor 491 is supplying hydrogen It is preferable to include an insulator. The insulator 464 may also be in a single-layer or multi-layer structure. That's fine. For example, silicon oxide nitride or silicon oxide and silicon nitride oxide or silicon A laminated structure containing silicon dioxide and other materials can be used as the insulator 464.

[0128] Hydrogen-containing insulators, for example, can be found in TDS analysis to be between 100°C and 700°C or 10 1 × 10 in the surface temperature range of 0°C to 500°C 18 atoms / cm 3 The above is 1 x 1 0 19 atoms / cm 3 or more, or 1 x 10 20 atoms / cm 3 The above hydrogen (hydrogen It may also emit (in terms of the number of atoms).

[0129] By the way, the hydrogen that diffused from the insulator 464 enters the conductive material provided at the opening of the insulator 464. via the body 471, the conductor 480 on the insulator 464, the conductor 482 on the conductor 480, etc. Although it may reach the vicinity of transistor 490, the insulator 442 blocks the hydrogen. Because it has the function of doing so, only a small amount of hydrogen reaches transistor 490. Hydrogen is acid In monstrous semiconductors, carrier traps and carrier sources occur, affecting the electrical characteristics of transistor 490. It can degrade the hydrogen. Therefore, blocking hydrogen with insulator 442 is only half the effort. This is of great importance for improving the performance and reliability of conductive devices.

[0130] On the other hand, for example, by supplying oxygen to transistor 490 from an external source, the oxide semiconductor Because oxygen deficiency can be reduced, the electrical characteristics of transistors may improve. Oxygen can be supplied, for example, by heat treatment in an oxygen-containing atmosphere. Alternatively, for example, an insulator containing excess oxygen (oxygen) is placed near the transistor 490, and The oxygen may be diffused by heat treatment and supplied to transistor 490. In this case, the insulator 402 of transistor 490 is an insulator containing excess oxygen.

[0131] Diffused oxygen may reach transistor 491 through each layer, but the insulator Because 442 has the function of blocking oxygen, the oxygen that reaches transistor 491 It will be a small amount. If transistor 491 is a silicon transistor, then silico The inclusion of oxygen in silicon can reduce its crystallinity and hinder carrier movement. It can be a harmful factor. Therefore, the insulator 442 blocks oxygen. This is of great importance for improving the performance and reliability of semiconductor devices.

[0132] Furthermore, as shown in Figure 4, the semiconductor device has an insulator 408 on the transistor 490. This is preferable. The insulator 408 has the function of blocking oxygen and hydrogen. Insulator 4 For example, 08 refers to the description of insulator 442. Or, insulator 408 is an example. For example, it blocks oxygen and hydrogen better than semiconductor 406a and / or semiconductor 406c. It has a high characteristic of doing so.

[0133] The semiconductor device has an insulator 408, which allows oxygen to diffuse outward from the transistor 490. This can suppress the excess oxygen (oxygen) contained in the insulator 402, etc. This allows for an effective supply of oxygen to transistor 490. In addition, insulator 408 is This includes impurities containing hydrogen that are mixed in from layers above the insulator 408 or from outside the semiconductor device. Because it blocks material, the electrical characteristics of transistor 490 deteriorate due to the inclusion of impurities. This can suppress that.

[0134] For convenience, insulator 442 and / or insulator 408 are distinguished from transistor 490. As explained above, it is also acceptable if it is part of transistor 490.

[0135] In the cross-sectional view shown in Figure 4, the semiconductor device 501 (cell) is a transistor 49 It has a conductor for multiple layers of wiring connected to transistor 491 and the first layer The electrical components are located on an insulator 464 provided on transistor 491, and high power wiring (conductive Includes body 480). Transistor 491 and the first layer conductor are provided on insulator 464. The connections may be made via conductive material 471 (also called via) provided in the opening. Second layer The conductor is located on an insulator 465 provided on the first layer of conductors, and low power wiring (conductive Includes body 482). The first layer conductor and the second layer conductor are connected by an opening provided in the insulator 465. The connections may also be made via conductive material 472 (also called via) provided at the opening. The current body is located on an insulator 466 provided on the second layer of conductor and supplies the gate voltage. Includes wiring (conductor 484). The second layer conductor and the third layer conductor are connected to the insulator 466. The connections may be made via conductive material 473 (also called via) provided in the cut-out opening. An insulator 442 is located on an insulator 467 provided on the third layer of conductor, and insulator 442 Above it are the conductor 413 and the transistor 490. The conductor of the fourth layer is the transistor An insulator 408 is provided on the 490, and a conductor 424a is located on the insulator 468. , including 424b. The third layer conductor and the fourth layer conductor are provided on the insulators 408 and 468. A conductive material 475 (also called a via) is provided in the opening, and the transistor 490 is connected They may be connected via an in electrode (conductor 416b). Further on the fourth layer of conductors An insulator may be provided. On the insulator, one or more layers of conductors may be provided. And an insulator may be provided. These conductors are between multiple semiconductor devices (cells). It can be used as wiring for connections, etc. In the configuration example shown in Figure 4, a transistor Although three layers of conductors are provided between transistor 490 and transistor 491, in one aspect of the present invention The structure of the semiconductor device (cell) is not limited thereto. Transistor 490 and Transistor One to ten layers of conductive material may be placed between the ZISTA 491.

[0136] Note that the structure of transistor 491 is not limited to the structure shown in Figure 4. For example, see Figure 5. As shown in transistor 491, the semiconductor substrate 400 has protrusions (also called projections, fins, etc.). It is acceptable to have a structure that will be exposed. The structure of transistor 491 shown in Figure 5 is Compared to the structure of transistor 491 shown in Figure 4, the effective channel for the same occupied area The channel width can be increased. Therefore, the current of transistor 491 when conducting can be increased. Furthermore, the conductor 454 can be used to support the protrusions of the semiconductor substrate 400 in the channel width direction. The surrounding structure makes it easier to control the channel formation region using the gate electric field. As a result, it was found that the short-channel effect could be suppressed, making it a structure suitable for miniaturization. Light.

[0137] Alternatively, for example, as shown in the transistor 491 in Figure 6, an insulator may be placed on the semiconductor substrate 400. A structure that includes region 452 is also acceptable. The structure of transistor 491 is as shown in Figure 6. This allows for more reliable isolation between individually operating transistors, reducing leakage current. This can suppress parasitic capacitance formed between the substrate and the circuit board, as well as leakage current to the substrate. This can be suppressed. As a result, the leakage current of transistor 491 can be reduced. This also enables high-speed and low-power operation of transistor 491.

[0138] The p-channel Si transistor described above provides good switching speed. For example, the switching speed of the transistor is less than 10 ns, preferably less than 1 ns. More preferably, it is less than 0.1 ns. Furthermore, the above-mentioned oxide semiconductor is used as the channel formation region. Transistors included in this region can achieve good switching speeds. For example, The switching speed of the device is less than 10 ns, preferably less than 1 ns, more preferably 0 ns. It is less than 0.1ns. Transistor 491 is the p-channel type Si transistor described above. Using this, the transistor 490 includes the above-mentioned oxide semiconductor in the channel formation region. By using a sta, the semiconductor device (cell) according to one aspect of the present invention improves the operating speed. This becomes possible. For example, an inverter, which is a semiconductor device (cell) according to one aspect of the present invention. The delay time of the 2-input NAND circuit is less than 10ns, preferably less than 1ns, more preferably The duration is less than 0.1 ns.

[0139] Furthermore, because transistors using oxide semiconductors have extremely low off-currents, static This makes it possible to provide semiconductor devices with low leakage current (or DC leakage current). In particular, during periods when the input signal is low or the power supply voltage is low, the input signal is affecting the oxide semiconductor. Even when input to the gate electrode of the transistor used, the transistor using an oxide semiconductor... It enters the off state, and the leakage current through the oxide semiconductor transistor is made extremely small. This makes it possible to provide a semiconductor device that can reduce power consumption. This becomes possible.

[0140] Also, transistor 491 or transistor formed simultaneously with transistor 491 It is preferable to use only p-channel type Si transistors. In the manufacturing process of the ZISTA, there is no need to manufacture n-channel Si transistors. It is possible to keep costs low. In particular, for micro transistors, n-channel type Si The manufacturing processes for transistors and p-channel Si transistors are optimized differently. Therefore, the effect of reducing manufacturing costs by not manufacturing n-channel Si transistors is The effect is significant. Also, when manufacturing only p-channel Si transistors, the silicon base As the surface orientation of the plate, a orientation that is convenient for p-channel transistors, for example, one that provides high mobility. You can select the available surface orientations. For example, the surface orientation of a silicon substrate can be Si (110) It can be made into a plane.

[0141] (Embodiment 2) A semiconductor device according to one embodiment of the present invention is not limited to the structure shown in Figures 4 to 6. In the section on implementation, an example of a semiconductor device, which is one embodiment of the present invention, will be explained using Figures 7 to 9. The semiconductor device 502 (cell) shown in Figure 7 corresponds to the semiconductor device 500 (cell) shown in Figure 1. This is a cell in which transistors 490 and 491 are arranged and wired.

[0142] Figure 7 is a schematic diagram showing an example of the configuration of a semiconductor device 502 (cell). Note that Figure 7 and Figure In diagram 8, for the sake of easier understanding, some parts such as insulators are omitted, and also, diagrams formed in the same layer are shown. The same hatching pattern is applied to conductive materials and other components.

[0143] Figure 8 is a top view showing an example of the configuration of the semiconductor device 502 (cell), and Figure 8(A) shows A top view of the region of the semiconductor device 502 that includes the transistor 491 and the conductor 480. As shown, Figure 8(B) shows the transistor 490 and the conductor 482 of the semiconductor device 502. This shows a top view of the region including [the specified area].

[0144] Figure 9 is a cross-sectional view showing an example of the configuration of semiconductor device 502 (cell). On the left side of Figure 9 Figures 8(A) and 8(B) show cross-sectional views taken along the dashed line A1-A2, and the right side of the same figure... The cross-sections are shown along the dashed line B1-B2 in Figures 8(A) and 8(B).

[0145] In Figure 7, the semiconductor device 502 (cell) consists of a transistor 491 and high-power wiring (conductive). Body 480), low power wiring (conductor 482), and transistor 490 are stacked in order. In other words, the high-power wiring (conductor 480) is positioned above transistor 491. The low power wiring (conductor 482) is positioned above the high power wiring (conductor 480) and overlaps with it. Furthermore, transistor 490 is positioned above the low-power wiring (conductor 482).

[0146] The source electrode (or source region) of transistor 491 is connected to the high-power wiring (conductor 48 Because it is connected to (0), the source electrode (or source region) of transistor 491 is high-voltage. In the case where the low power wiring (conductor 482) is located above the power wiring (conductor 480) and is connected to it It is easier to connect and preferable to a combination. Source electrode (or source region) of transistor 490 The region is connected to the low power wiring (conductor 482), so the source power of transistor 490 High-power wiring where the pole (or source region) is located below the low-power wiring (conductor 482). This is preferable because it is easier to connect than when connected to (conductor 480).

[0147] Furthermore, in the semiconductor device 502 (cell), high power wiring (conductor 480) and low power wiring Each wire (conductor 482) has a width equal to the gate electrode (conductor 45) of transistor 491. 4) The gate electrode (conductor 404) of transistor 490, or the input / output signal transfer It is preferable that the width is wider than the wiring width of the signal wiring. Alternatively, high power wiring (conductor 480) and The width of each low-power wiring (conductor 482) is the width of the wiring (conductor) connected to the input terminal. The width of the power supply wiring is preferably wider than the width of the wiring (conductor) connected to the output terminal. Since these often carry more current than signal wiring, it is preferable to have lower wiring resistance than signal wiring. This is because it is desirable.

[0148] In Figures 2 to 6, the transistor 490 has a conductor 413 that functions as a gate electrode. Although an example has been shown, the structure of the semiconductor device according to one embodiment of the present invention is not limited thereto. (Figure 7) As shown in Figure 9, the transistor 490 does not necessarily have to have a conductor 413. Furthermore, the semiconductor device 502 (cell) does not have a conductor 484 that supplies voltage to the conductor 413. It is not necessary. This structure allows for the formation of a conductive layer for the conductive material 484. This eliminates the need for certain processes, thus reducing manufacturing costs.

[0149] Figures 2 through 6 show the gate electrode (conductor 404) of transistor 490 and the transistor The gate electrode (conductor 454) of 491 and the conductor 424 located above the conductor 404. Although an example of connection via b has been shown, the structure of a semiconductor device (cell) according to one aspect of the present invention is This is not limited to this. As shown in Figures 7 to 9, the conductor 404 and the conductor 454 are conductors. Without going through the electric element 424b, only through the conductor located between the conductor 404 and the conductor 454 It is acceptable for them to be connected in this way. By using this structure, the gate voltage of transistor 490 The area connecting the pole and the gate electrode of transistor 491 can be reduced. As a result, the semiconductor device 502 (cell) can be made smaller.

[0150] (Embodiment 3) A semiconductor device according to one embodiment of the present invention is not limited to the structure shown in Figures 4 to 6. In the section on embodiment, an example of a semiconductor device, which is one embodiment of the present invention, will be explained using Figures 10 to 12. The semiconductor device 503 (cell) shown in Figure 10 is the same as the semiconductor device 500 (cell) shown in Figure 1. This corresponds to a cell in which transistors 490 and 491 are arranged and wired. .

[0151] Figure 10 is a schematic diagram showing an example of the configuration of a semiconductor device 503 (cell). In Figure 11, for the sake of easier understanding, some parts such as insulators are omitted, and also in the same layer The same hatching pattern is applied to the conductors and other materials that are formed.

[0152] Figure 11 is a top view showing an example of the configuration of a semiconductor device 503 (cell), and Figure 11(A) This includes the upper surface of the region of the semiconductor device 503 that includes the transistor 491 and the conductor 480. The diagram shows that in Figure 11(B), transistor 490 and The image shows a top view of the region containing the conductor 482.

[0153] Figure 12 is a cross-sectional view showing an example of the configuration of a semiconductor device 503 (cell). Left side of Figure 12 Figures 11(A) and 11(B) show cross-sectional views taken along the dashed line A1-A2. On the right side of the figure, the cross-section cut along the dashed line B1-B2 in Figures 11(A) and 11(B) is shown. show.

[0154] In Figure 10, the semiconductor device 503 (cell) consists of a transistor 491 and high power wiring (conductors). The power supply (480), low power supply wiring (conductor 482), and transistor 490 are stacked in order. In other words, the high-power wiring (conductor 480) is positioned above transistor 491. Furthermore, the low-power wiring (conductor 482) is positioned above the high-power wiring (conductor 480) and overlaps with it. As a result, transistor 490 is positioned above the low-power wiring (conductor 482).

[0155] The source electrode (or source region) of transistor 491 is connected to the high-power wiring (conductor 48 Because it is connected to (0), the source electrode (or source region) of transistor 491 is high-voltage. In the case where the low power wiring (conductor 482) is located above the power wiring (conductor 480) and is connected to it It is easier to connect and preferable to a combination. Source electrode (or source region) of transistor 490 The region is connected to the low power wiring (conductor 482), so the source power of transistor 490 High-power wiring where the pole (or source region) is located below the low-power wiring (conductor 482). This is preferable because it is easier to connect than when connected to (conductor 480).

[0156] Furthermore, in the semiconductor device 503 (cell), high power wiring (conductor 480) and low power wiring The width of each wire (conductor 482) is the gate electrode (conductor 4) of transistor 491. 54) The gate electrode (conductor 404) of transistor 490, or the input / output signal transfer It is preferable that the width is wider than the wiring width of the signal wiring. Alternatively, high power wiring (conductor 480) and The width of each wire in the low power wiring (conductor 482) is the width of the wire connected to the input terminal (conductor) It is preferable that the width of the power supply wiring is wider than the width of the wiring (conductor) connected to the output terminal. These often carry more current than signal wiring, and therefore the wiring resistance should be lower than that of signal wiring. Because it is preferable.

[0157] In Figures 2 to 6, transistor 490 has a gate electrode (conductor 413), and gate The electrode (conductor 413) and the gate electrode (conductor 404) can have gate voltages applied independently. Although an example has been shown, the structure of a semiconductor device (cell) according to one aspect of the present invention is not limited thereto. As shown in Figures 10 to 12, gate electrode (conductor 413) and gate electrode (conductor 40 4) By electrically connecting them, the same potential can be applied. In this case, the effective Because the channel width can be increased, the current when transistor 490 conducts can be increased. This is possible. Furthermore, even in regions where the electric field from the gate electrode (conductor 404) is difficult to reach. Because the electric field from the gate electrode (conductor 413) reaches the transistor 490, the subthread The shoulder swing value (also called the S value) can be reduced, and transistor 490 The current in the off state can be reduced.

[0158] (Embodiment 4) The cross-sectional structure of a semiconductor device according to one embodiment of the present invention is limited to the structure shown in Figures 4 to 6. No. In this embodiment, an example of the cross-sectional structure of a semiconductor device, which is one embodiment of the present invention, is shown in Figure 13. This will be explained using Figure 15. The semiconductor device 504 (cell) shown in Figure 13 is a semiconductor as shown in Figure 1. It corresponds to the 500 (cell) body, and transistors 490 and 491 are arranged. It is a wired cell.

[0159] Figure 13 is a schematic diagram showing an example of the configuration of a semiconductor device 504 (cell). In Figure 14, for the sake of easier understanding, some parts such as insulators are omitted, and also in the same layer The same hatching pattern is applied to the conductors and other materials that are formed.

[0160] Figure 14 is a top view showing an example of the configuration of semiconductor device 504 (cell), and Figure 14(A) The upper surface of the region of the semiconductor device 504 that includes the transistor 491 and the conductor 480 The diagram shows that in Figure 14(B), transistor 490 and conductor 4 of the semiconductor device 504 are shown. The image shows a top view of the region including 82 and the conductor 484.

[0161] Figure 15 is a cross-sectional view showing an example of the configuration of a semiconductor device 504 (cell). Left side of Figure 15 Figures 14(A) and 14(B) show cross-sectional views taken along the dashed line A1-A2. On the right side of the same figure, the cross-section cut along the dashed line B1-B2 in Figures 14(A) and 14(B) is shown. show.

[0162] In Figure 13, the semiconductor device 504 (cell) has a transistor 491 and high power wiring (conductors). The electric body 480), conductor 484, transistor 490, and low power wiring (conductor 482) They are stacked in order. In other words, the high power supply wiring (conductor 4) is above transistor 491. 80) is positioned, and conductor 484 is positioned above the high power wiring (conductor 480) and overlaps As a result, the transistor 490 is positioned above the conductor 484, and above the transistor 490 Low-power wiring (conductor 482) is placed there.

[0163] The source electrode (or source region) of transistor 491 is connected to the high-power wiring (conductor 48 Because it is connected to (0), the source electrode (or source region) of transistor 491 is high-voltage. In the case where the low power wiring (conductor 482) is located above the power wiring (conductor 480) and is connected to it It is easier to connect and preferable to a combination. Source electrode (or source region) of transistor 490 The region is connected to the low power wiring (conductor 482), so the source power of transistor 490 High-power wiring where the pole (or source region) is located below the low-power wiring (conductor 482). This is preferable because it is easier to connect than when connected to (conductor 480).

[0164] Furthermore, in the semiconductor device 504 (cell), high power wiring (conductor 480) and low power wiring The wiring width of each wire (conductor 482) is the gate electrode (conductor 45) of transistor 491. 4) The gate electrode (conductor 404) of transistor 490, or the input / output signal transfer It is preferable that the width is wider than the wiring width of the signal wiring. Alternatively, high power wiring (conductor 480) and The width of each low-power wiring (conductor 482) is the width of the wiring (conductor) connected to the input terminal. The width of the power supply wiring is preferably wider than the width of the wiring (conductor) connected to the output terminal. Since these often carry more current than signal wiring, it is preferable to have lower wiring resistance than signal wiring. This is because it is desirable.

[0165] In Figures 2 to 6, the low-power wiring (conductor 482) and the high-power wiring (conductor 480) are shown. An example using adjacent conductors has been shown, but the structure of a semiconductor device (cell) according to one aspect of the present invention This is not limited to the above. As shown in Figures 13 to 15, low power wiring (conductor 482) and Between the high-power wiring (conductor 480) and the low-power wiring (conductor 482), they overlap each other. A conductor 484 may be provided. Conductors 482 and 484 overlap each other. As they are arranged, they have parasitic capacitance between the wires. Also, low power wiring (conductor 482 ) and the high power wiring (conductor 480) overlap each other As such, it is acceptable for a conductor 484 to be provided. Conductors 480 and 484 are mutual Due to their overlapping arrangement, parasitic capacitance is created between the wires. These parasitic capacitances result in This allows for the creation of a circuit that is resistant to power supply noise and can reduce fluctuations in power supply voltage. Furthermore, it is preferable that the potential of the conductor 484 does not change frequently. Alternatively, the conductor 48 4 preferably functions as a power supply wire. With this configuration, The phenomenon in which fluctuations in the current 484 cause fluctuations in the potential of conductors 480 and 482. It can be reduced.

[0166] In the configuration examples shown in Figures 13 to 15, the conductor 484 is a wire that provides a gate voltage. It has the function of controlling the threshold voltage of transistor 490. It can be used. The gate voltage may always be constant, in which case the conductor 484 is It functions as a power supply wire. Furthermore, the gate voltage is used when the semiconductor device 504 (cell) is operating. You can switch values ​​between periods when it's running and periods when it's not. Such switching is frequent. This process is not performed frequently, and conductor 484 is a wiring configuration where the potential does not change frequently.

[0167] Furthermore, in Figures 2 to 6, the low-power wiring (conductor 482) and conductors 424a and 424b are shown. Although the two were provided with separate layers of conductive material, the structure of a semiconductor device (cell) according to one aspect of the present invention This is not limited to the above. As shown in Figures 13 to 15, the conductor 482 and the conductor 424 a and 424b may use the same layer of conductor. As a result, the area can be reduced and the conductor can be reduced. Reducing the number of layers can sometimes lower manufacturing costs.

[0168] The output signal OUT is connected to the drain electrode (conductor 416b) of transistor 490. The conductor 416b is connected to the drain region (region 476b) of transistor 491. The output is emitted to the outside from the conductor 425a located above. Conductor 425a is connected to conductor 477 It is connected to conductor 424a via. The input signal IN is the gate voltage of transistor 490. It is connected to the pole (conductor 404) and the gate electrode (conductor 454) of transistor 491. The input is received from the outside via the conductor 425b located above the conductor 404. Body 425b is connected to conductor 424b via conductor 478. Conductors 477, 47 8 is provided in the opening of the insulator 469.

[0169] (Embodiment 5) An example of the configuration of a semiconductor device (cell) according to one aspect of the present invention is shown in Figures 16 to 18. This will be explained using Figures 20 and 32.

[0170] Figure 32 shows transistors 490a, 490b, 491a, and This is a schematic diagram of a semiconductor device in which transistor 491b is arranged and wired.

[0171] The semiconductor device 510 (cell) consists of transistor 491a and transistor 491b and The diast 490a and transistor 490b and the conductor 480 which functions as wiring and as wiring It has a functional conductor 482 and constitutes a 2-input NAND circuit with a CMOS configuration as shown in Figure 20. In a CMOS 2-input NAND circuit, when both input signals A and B are high... The output signal Z will be low only in this case. Transistors 490a and 490b and The transistor 491a and transistor 491b are stacked. Conductor 482 is low power supply It has the function of supplying voltage (VSS). Conductor 480 supplies high power supply voltage (VDD). It has a function. Conductors 482 and 480 are stacked. The output signal Z is a transistor Drain electrode of transistor 490b, drain electrode of transistor 491a and transistor 4 The output is from the drain electrode of 91b. One of the input signals, A, is the gate of transistor 490a. The input is applied to the electrode and the gate electrode of transistor 491a. The other input signal B is, The gate electrode of transistor 490b and the gate electrode of transistor 491b are input. ru.

[0172] Transistors 491a and 491b are, for example, examples of switching speed A fast p-channel transistor can be used. For example, the transistor switch The tuning speed is less than 10 ns, preferably less than 1 ns, more preferably less than 0.1 ns. It is full. For example, a p-channel Si transistor is transistor 491a, and a transistor It can be used as transistor 491b. Transistors 490a and 490b are For example, an n-channel transistor with a high switching speed can be used. For example, the switching speed of a transistor is less than 10 ns, preferably 1 ns. Less than s, more preferably less than 0.1 ns. For example, oxide semiconductor (preferably In A transistor that includes an oxide (containing Ga and Zn) in the channel formation region. It can be used as transistor 490a or transistor 490b.

[0173] The low-power wiring (conductor 482) is electrically connected to the source electrode of transistor 490a. The low power wiring (conductor 482) is connected to the source electrode of transistor 490b. Electrically connected via sta 490a. High power wiring (conductor 480) is transient The source electrode of transistor 491a and the source electrode of transistor 491b are electrically connected. The gate electrode of transistor 490a and the gate electrode of transistor 491a are electrically connected. They are connected. The gate electrode of transistor 490b and the gate electrode of transistor 491b are They are electrically connected. The drain electrode of transistor 490b is connected to the drain electrode of transistor 491a. It is electrically connected to the drain electrode and the drain electrode of transistor 491b. The drain electrode of transistor 490a and the source electrode of transistor 490b are electrically connected. The drain electrodes of transistor 491a and transistor 491b are electrically connected. They are connected precisely. Low power wiring (conductor 482) and high power wiring (conductor 480) are generally They are arranged in parallel and overlap each other.

[0174] The low-power wiring (conductor 482) and the high-power wiring (conductor 480) are generally parallel to each other and overlap each other. As a result of being arranged in this manner, the wiring has a large parasitic capacitance (also called wiring capacitance). As a result, by using this wiring as power wiring, voltage fluctuations due to power supply noise can be reduced. This circuit can suppress power supply noise, is resistant to power supply noise, and reduces fluctuations in power supply voltage. It can be expressed. Also, in a semiconductor device to which semiconductor device 510 (cell) is applied, Capacitive elements are sometimes intentionally incorporated into power supply wiring to reduce fluctuations in power supply voltage. Low power wiring (conductor 482) and high power wiring (conductor 480) have large wiring capacities. This makes it possible to reduce the size of such capacitive elements. As a result, semiconductor device 510 ( It becomes possible to miniaturize semiconductor devices using (Lu). Also, low power wiring (conductor 4 82) and the high-power wiring (conductor 480) are arranged to overlap each other, so that the wiring This allows for a reduction in occupied area, and thus reduces the area of ​​the semiconductor device 510 (cell). can.

[0175] Low power wiring (conductor 482) and high power wiring (conductor 480) are adjacent to each other in the vertical direction. It is preferable to use a conductor for the wire. Use conductors for wiring adjacent to each other in the vertical direction. Therefore, the distance between wires becomes smaller, and the wires have a large wiring capacity. As a result, the power supply This makes it possible to create a circuit that is highly resistant to noise and can reduce fluctuations in power supply voltage. This makes it possible to miniaturize semiconductor devices to which semiconductor device 510 (cell) is applied.

[0176] Alternatively, low-power wiring (conductor 482) and high-power wiring (conductor 480) are connected to adjacent layers. It is preferable to use an electric material. Alternatively, low power wiring (conductor 482) and high power wiring (conductive material) may be used. It is preferable that there is no conductor between the body 480.

[0177] Transistors 490a and 491a are positioned overlapping each other. Transistor 490b and transistor 491b are arranged overlapping each other. As a result, The area of ​​the semiconductor device 510 (cell) can be reduced.

[0178] Transistors 490a and 491a are arranged overlapping each other, In transistor 490a, the direction in which current flows is determined, and in transistor 491a, the direction in which current flows is determined. The direction is generally parallel or antiparallel. Alternatively, the source electrode of transistor 490a. The orientation of the gate electrode and drain electrode, and the source electrode of transistor 491a, The orientation of the gate electrode and drain electrode is generally parallel. Transistor 490 b and transistor 491b are arranged overlapping each other, and transistor 490b The direction in which current flows is roughly parallel to the direction in which current flows in transistor 491b. Or they are antiparallel. Or, the source electrode, gate electrode, and of transistor 490b. The direction in which the drain electrodes are aligned, and the source electrode, gate electrode, and drain electrode of transistor 491b. The direction in which the rain electrodes are aligned is generally parallel. As a result, transistor 490a and the transistor The ZISTA 491a can be connected in a narrow area, including the gate electrode connection, and the transistor Transistor 490b and transistor 491b can be connected in a narrow area, including the gate electrode connection. This makes it possible to reduce the (cell) area of ​​the semiconductor device 510.

[0179] In Figure 32(A), the semiconductor device 510 (cell) consists of transistors 491a and 491 b. High power wiring (conductor 480), low power wiring (conductor 482), and transistor 49 0a and 490b are stacked in order. In other words, transistors 491a and 491b A high-power wiring (conductor 480) is positioned above it, and above the high-power wiring (conductor 480) Low power wiring (conductor 482) is positioned and overlaps, above the low power wiring (conductor 482) Transistors 490a and 490b are placed there.

[0180] This configuration allows for low-power wiring (conductor 482) and high-power wiring (conductor 482) to be used. 0) is located close together in the vertical direction and therefore has a large wiring capacity. As a result, power supply noise This allows for the creation of a circuit that is highly resistant to power supply voltage fluctuations and can reduce power supply voltage variations. It becomes possible to miniaturize semiconductor devices using semiconductor device 510 (cell).

[0181] In Figure 32(B), the semiconductor device 510 (cell) is provided on a semiconductor substrate. On the semiconductor substrate, transistors 491a and 491b, high power wiring (conductor 480), It has transistors 490a and 490b, and low-power wiring (conductor 482) in that order. Therefore, the high-power wiring (conductor 480) is positioned above transistors 491a and 491b. Transistors 490a and 490b are positioned above the high-power wiring (conductor 480). Low-power wiring (conductor 482) is positioned above transistors 490a and 490b.

[0182] In semiconductor device 510 (cell), the source electrodes of transistors 490a and 490b Alternatively, the drain electrode is semiconductor via the conductor above transistors 490a and 490b. It may be connected to other transistors within the body device 510 (cell). In that case, the corresponding When the conductive material used as wiring for connecting multiple cells is formed in the same layer, the wiring requires The area to be covered may become larger. This is because, in connections between multiple cells, the wiring position Because the distribution is irregular, there are scattered areas that cannot be used, which increases the amount of wiring that needs to be rerouted. This is to add to the mix. Even in such cases, the conductor and the conductor used as power wiring are When formed in the same layer, there may be little increase in area. This is because the power wiring is within the cell area. This is because they are regularly arranged at the edges of the region. As a result, the area can be reduced and the number of conductive layers can be reduced. In some cases, manufacturing costs can be reduced.

[0183] The semiconductor device 510 (cell) described above can have a smaller cell area. For example, For a 2-input NAND circuit, the cell height is preferably less than or equal to WW + WT + 7 * Py. More preferably, it can be less than or equal to WW + WT + 5 * Py. Also, the cell width is Preferably, it can be 5*Px or less, and more preferably 4*Px or less. WW is the power line width, and WT is the chain of multiple transistors in the semiconductor device 510 (cell). This is the widest channel width among the available channel widths.

[0184] Furthermore, it is preferable that the heights of multiple cells are the same. This way, the cell heights can be adjusted. By setting the row height and arranging multiple cells in multiple rows, efficient arrangement and wiring can be achieved. can.

[0185] In order to closely arrange the transistors and power supply wiring of the semiconductor device 510 (cell), Source electrode of transistor 490a, and / or source electrode of transistor 490b When the conductive material (482) that functions as a power supply wire is electrically connected to the said The electrode and the conductor are connected via a conductor (also called a via) provided in an opening in the insulator. It is preferable that they be directly connected. Alternatively, the source electrode of transistor 490a, and / or the source electrode of transistor 490b and a conductor (482) that functions as power wiring. ) is preferably connected via vias and a conductor sandwiched between the vias. The source electrode of transistor 491a, and / or the source electrode of transistor 491b, and When a conductor (480) that functions as a source wire is electrically connected to the electrode, the electrode and A conductor is a material that is directly connected to an insulator through an opening in the insulator. Preferred. Alternatively, the source electrode of transistor 491a, and / or transistor 4 The source electrode of 91b and the conductor (480) which functions as a power supply wire are connected by vias and between vias. It is preferable that the connection is made via a conductor sandwiched between them.

[0186] In order to closely arrange the transistors and power supply wiring of the semiconductor device 510 (cell), The semiconductor device 510 (cell) consists of transistors 490a and 490b and a power supply. Between the conductor 480 which functions as wiring, and between transistor 491a and the transistor There is no transistor between the 491b and the conductor 482 which functions as a power supply wire. It is preferable.

[0187] The transistors and power supply wiring of the semiconductor device 510 (cell) are arranged closely together, and multiple To efficiently arrange the number of cells, power wiring is regularly placed at the edges of the cell area. Preferably, the semiconductor device (cell) according to one aspect of the present invention has one side of the cell area Power wiring may be located only at the ends. Power wiring may be located at both ends of the cell area. In some cases, the cell area can be made smaller compared to when it is placed in a fixed location.

[0188] Figure 16 is a schematic diagram showing an example of the configuration of a semiconductor device 511 (cell). The semiconductor device 511 (cell) corresponds to the semiconductor device 510 (cell) shown in Figure 32, and Transistor 490a, Transistor 490b, Transistor 491a, and Transistor 491b is the cell that has been placed and wired. Figures 16 and 17 are provided for easier understanding. Therefore, some parts such as insulators are omitted from the diagram, and the same conductors etc. formed in the same layer are shown. It has a stitching pattern.

[0189] Figure 17 is a top view showing an example of the configuration of a semiconductor device 511 (cell), and Figure 17(A) This includes the transistors 491a and 491b and the conductor 480 among the semiconductor device 511. Figure 17(B) shows a top view of the region, and among the semiconductor device 511 (cell), the transient The image shows a top view of the region including sta 490a and 490b and conductor 482.

[0190] Figure 18 is a cross-sectional view showing an example of the configuration of a semiconductor device 511 (cell). Left side of Figure 18 Figures 17(A) and 17(B) show cross-sectional views taken along the dashed line A1-A2. On the right side of the same figure, the cross-section cut along the dashed line B1-B2 in Figures 17(A) and 17(B) is shown. show.

[0191] The semiconductor device 511 (cell) shown in Figure 16 consists of transistor 491a and transistor 49 1b and conductor 480 and transistor 490a and transistor 490b and conductor 482 It possesses. Transistors 490a and 490b are transistors 491a and The transistor 491b is stacked. Conductors 482 and 480 are stacked. The transistor 491a has regions 476a, 476b, and a conductor 454a. Transistor 491b has regions 476b, 476c, and a conductor 454b. Transistor 4 90a has conductors 416a, 416b, and 404a. Transistor 490b is It has conductors 416b, 416c, and 404b.

[0192] Regions 476a and 476b are the source electrodes (or source) of transistor 491a. It functions as one or the other of the region and the drain electrode (or drain region). Conductor 454a functions as the gate electrode of transistor 491a. Region 4 76b and 476c are the source electrode (or source region) of transistor 491b and It functions as one and the other drain electrode (or drain region). Conductor 454b functions as the gate electrode of transistor 491b. Conductor 416a And 416b is the source electrode (or source region) of transistor 490a and the drain It functions as one and the other electrode (or drain region). Conductor 404 a functions as the gate electrode of transistor 490a. Conductor 416b and 416c is the source electrode (or source region) and drain electrode of transistor 490b. It functions as one and the other of (or the drain region). Conductor 404b is It functions as the gate electrode of transistor 490b.

[0193] The high-power wiring (conductor 480) and the low-power wiring (conductor 482) are generally parallel to each other and overlap each other. They are arranged in this manner. The output signal is transmitted to the drain electrode (conductor 416c) of transistor 490b. ), the drain region of transistor 491a (region 476a), and transistor 491b A conductor located above the conductor 416c, which is connected to the drain region (region 476c) The signal is output externally from 424a. One of the input signals is the gate electrode of transistor 490a. (Conductor 404a) and the gate electrode (conductor 454a) of transistor 491a are connected. The input is received from the outside via conductor 424b, which is located above conductor 404a. The other side of the signal is the gate electrode (conductor 404b) of transistor 490b and the transistor It is located above the conductor 404b and is connected to the gate electrode (conductor 454b) of TA 491b. The input is received from the outside via the conductive element 424c.

[0194] The low-power wiring (conductor 482) and the high-power wiring (conductor 480) are generally parallel to each other and overlap each other. As a result of being arranged in this manner, the wiring has a large parasitic capacitance (also called wiring capacitance). As a result, by using this wiring as power wiring, voltage fluctuations due to power supply noise can be reduced. This circuit can suppress power supply noise, is resistant to power supply noise, and reduces fluctuations in power supply voltage. It can be expressed. Also, in a semiconductor device to which semiconductor device 511 (cell) is applied, Capacitive elements are sometimes intentionally incorporated into power supply wiring to reduce fluctuations in power supply voltage. Low power wiring (conductor 482) and high power wiring (conductor 480) have large wiring capacities. This makes it possible to reduce the size of such capacitive elements. As a result, semiconductor device 511 ( It becomes possible to miniaturize semiconductor devices using (Lu). Also, low power wiring (conductor 4 82) and the high-power wiring (conductor 480) are arranged to overlap each other, so that the wiring This allows for a reduction in the occupied area, and thus reduces the area of ​​the semiconductor device 511 (cell). can.

[0195] Low power wiring (conductor 482) and high power wiring (conductor 480) are adjacent to each other in the vertical direction. Conductive materials for wires can be used. By using conductive materials for wiring adjacent to each other in the vertical direction... As a result, the distance between wires becomes smaller, and the wires have a large wiring capacity. This allows for the creation of a circuit that is highly resistant to power supply voltage fluctuations and can reduce power supply voltage variations. It becomes possible to miniaturize semiconductor devices using semiconductor device 511 (cell).

[0196] Alternatively, low-power wiring (conductor 482) and high-power wiring (conductor 480) are connected to adjacent layers. It is preferable to use an electric material. Alternatively, low power wiring (conductor 482) and high power wiring (conductive material) may be used. It is preferable that there is no conductor between the body 480.

[0197] Transistors 490a and 491a are positioned overlapping each other. The 490b transistor and the 491b transistor are positioned overlapping each other. As a result, semiconductor The area of ​​the body device 510 (cell) can be reduced.

[0198] Transistors 490a and 491a are arranged to overlap each other, The direction in which current flows in sta 490a and the direction in which current flows in transistor 491a The direction is generally parallel or antiparallel. Alternatively, the source electrode of transistor 490a, The direction in which the gate electrode and drain electrode are aligned, and the source electrode of transistor 491a, The direction in which the front electrode and drain electrode are aligned is generally parallel. Transistor 490b The transistor 491b and transistor 490b are arranged to overlap each other, and in transistor 490b The direction of flow and the direction of current flow in transistor 491b are roughly parallel. They are antiparallel. Alternatively, the source electrode, gate electrode, and Dre of transistor 490b The direction in which the in electrodes are aligned, and the source electrode, gate electrode, and drain electrode of transistor 491b. The direction in which the electrodes are aligned is generally parallel. By using this arrangement, the transistor 4 The drain electrode of transistor 90a and the drain electrode of transistor 491a are placed in close proximity to each other. It is possible to connect the gate electrode of transistor 490a and the gate electrode of transistor 491a The electrodes can be placed in close proximity to each other. Also, the drain of transistor 490b The drain electrode and the drain electrode of transistor 491b can be placed in close proximity to each other. Furthermore, the gate electrode of transistor 490b and the gate electrode of transistor 491b are connected to each other. It can be placed in close proximity to the gate electrode of transistor 490a and the transistor. Connect the gate electrode of transistor 491a to the drain electrode of transistor 490b and the transistor Connect the drain electrode of transistor 491b and the gate electrode of transistor 490b. When connecting to the gate electrode of transistor 491b, the area of ​​the connection region is reduced. This allows for a reduction in the area of ​​the semiconductor device 510 (cell).

[0199] In transistor 490a, the direction in which current flows (or the direction of transistor 490a) (Direction in which the electrode, gate electrode, and drain electrode are aligned) and low power wiring (conductor 482 The extension direction is roughly parallel to the ). In this case, the source electrode of transistor 490a is Regardless of which side the gate electrode is located on, the low-power wiring (conductor 482) and short wiring This connection is possible and preferable. In transistor 491a, the direction in which current flows (or (This refers to the alignment of the source, gate, and drain electrodes of transistor 491a.) And, the direction of extension of the high-power wiring (conductor 480) is generally parallel. In this case, Regardless of which side the gate electrode of the 491a source electrode is located on, the high power supply wiring ( It is preferable that it can be connected by a short wire to the conductor 480. The direction in which the current flows (or, the source electrode, gate electrode, of transistor 490b) The direction in which the drain electrodes are aligned and the direction in which the low-power wiring (conductor 482) extends are generally parallel. This is the row. In this case, the source electrode of transistor 490b is on either side of the gate electrode. Even when located to the side, it can be connected by low-power wiring (conductor 482) and short wiring, which is preferable. In transistor 491b, the direction in which current flows (or, transistor 491b (The direction in which the source electrode, gate electrode, and drain electrode are aligned) and high power wiring (conductor 4 The extension direction relative to 80) is generally parallel. In this case, the source electrode of transistor 491b However, regardless of which side the gate electrode is located on, there are high-power wiring (conductor 480) and short wiring. It is possible to connect by this method, which is preferable.

[0200] In transistor 490a, the direction in which current flows (or the direction of transistor 490a) (Direction in which the electrode, gate electrode, and drain electrode are aligned) and low power wiring (conductor 482 The extension direction of ) may be approximately perpendicular. The source electrode of transistor 490a is low current. When connecting to the power supply wiring (conductor 482), position the source electrode so that it overlaps with the low power supply wiring. This is preferable because it allows for a reduction in area. The direction in which the current flows (or, the source electrode, gate electrode, and dot of transistor 491a) The direction in which the rain electrodes are aligned and the direction in which the high-power wiring (conductor 480) extends are generally perpendicular. That's fine. The source electrode of transistor 491a is connected to the high power supply wiring (conductor 480). In this case, the source electrode can be positioned to overlap with the high-power wiring, reducing the area. This is preferable because it allows for the current to flow in transistor 490b (or, the transistor The direction in which the source electrode, gate electrode, and drain electrode of the converter 490b are aligned, and the low current The direction of extension of the source wiring (conductor 482) may be approximately perpendicular. Transistor 490 If the source electrode of b is connected to the low power wiring (conductor 482), the source electrode is connected to the low power wiring It is possible to arrange them so that they overlap, and the area can be reduced, which is preferable. In transistor 491b, the direction in which current flows (or, the source electrode of transistor 491b, The direction in which the gate electrode and drain electrode are aligned, and the direction of extension of the high-power wiring (conductor 480) The direction can be roughly perpendicular. The source electrode of transistor 491b is connected to the high power supply wiring (conductor) When connecting to the power unit (480), the source electrode can be positioned so as to overlap with the high-power wiring. It is desirable because it is capable and its area can be reduced.

[0201] In transistor 490a, the direction in which current flows (or the direction of transistor 490a) (The direction in which the electrode, gate electrode, and drain electrode are aligned) and transistor 490b The direction in which the current flows (or, the source electrode, gate electrode, and The direction in which the drain electrodes are aligned may be generally parallel or antiparallel. By aligning the orientation, a regular arrangement can be achieved when arranging and wiring transistors to construct a circuit. This can be done. By arranging them in a regular manner, for example, the height of semiconductor devices (cells) can be arranged. It allows for alignment and efficient placement of multiple cells. Aligning the orientation of the transistors can reduce variations in their electrical characteristics. ru.

[0202] Furthermore, if the input / output terminals are connected to adjacent or nearby cells, the output signal The output terminal that outputs OUT bypasses the conductor 424a and is connected to transistor 490b. Rain electrode (conductor 416c), drain electrode or drain of transistor 491a Region (region 476a), or the drain electrode or drain region of transistor 491b. Even if you connect the region (region 476c) directly to the input / output terminals of an adjacent or nearby cell, Good. One of the input terminals to which the input signal IN is input does not use conductor 424b, but rather a transient The gate electrode (conductor 404a) of transistor 490a or the gate electrode of transistor 491a Even if (conductor 454a) is directly connected to the input / output terminals of an adjacent cell or nearby cell, Good. The other input terminal to which the input signal IN is input does not use conductor 424c, and the transient The gate electrode (conductor 404b) of transistor 490b and the gate electrode of transistor 491b Even if (conductor 454b) is directly connected to the input / output terminals of an adjacent cell or nearby cell, good.

[0203] In Figure 16, the semiconductor device 511 (cell) has transistors 491a and 491b, and high Power wiring (conductor 480), low power wiring (conductor 482), and transistor 490a The 490b transistors are stacked in order. In other words, above transistors 491a and 491b High power wiring (conductor 480) is placed there, and low power wiring (conductor 480) is placed above the high power wiring (conductor 480) The wiring (conductor 482) is positioned and overlaps, and above the low power wiring (conductor 482) there is a trap The 490a and 490b units will be installed.

[0204] The source electrodes (or source regions) of transistors 491a and 491b are connected to high-power wiring. (Conductor 480) is connected to the source electrodes of transistors 491a and 491b ( Or the source area) is positioned above the high power wiring (conductor 480) and the low power wiring (conductor The connection is easier and preferable than when connected to body 482). The electrode (or source region) is connected to the low power wiring (conductor 482), so The source electrode (or source region) of the transistor 490a is connected to the low-power wiring (conductor 482). It is easier to connect than when connected to the high-power wiring (conductor 480) located below it. preferable.

[0205] Furthermore, in the semiconductor device 511 (cell), high power wiring (conductor 480) and low power wiring The wiring width of each wire (conductor 482) is the gate electrode (conductor 45) of transistor 491. 4) The gate electrode (conductor 404) of transistor 490, or the input / output signal transfer It is preferable that the width is wider than the wiring width of the signal wiring. Alternatively, high power wiring (conductor 480) and The width of each low-power wiring (conductor 482) is the width of the wiring (conductor) connected to the input terminal. The width of the power supply wiring is preferably wider than the width of the wiring (conductor) connected to the output terminal. Since these often carry more current than signal wiring, it is preferable to have lower wiring resistance than signal wiring. This is because it is desirable.

[0206] The semiconductor device shown in Figure 18 has a cross-sectional structure similar to that of the semiconductor device shown in Figure 5. Therefore, the semiconductor device shown in Figure 18 can be described by appropriately referring to the explanation of the transistor shown in Figure 5. It can illuminate.

[0207] This embodiment can be appropriately combined with other embodiments shown herein. ru.

[0208] (Embodiment 6) Transistor 490 can take on various structures. In this embodiment, to facilitate understanding, Therefore, only transistor 490 and its surrounding region are extracted, as shown in Figures 33 and 34. This will be shown.

[0209] Figure 33(A) is an example of a top view of transistor 490. The dashed line in Figure 33(A) An example of a cross-sectional view obtained by cutting along E1-E2 and the dashed line E3-E4 is shown in Figure 33(B). In Figure 33(A), some parts, such as the insulator, are omitted for easier understanding.

[0210] In Figure 4, etc., the conductive material 416a and conductive material function as the source electrode and drain electrode. An example is shown in which body 416b is in contact with the top and side surfaces of semiconductor 406b, the top surface of insulator 402, etc. However, the structure of the transistor according to one aspect of the present invention is not limited thereto. For example, Figure 3 As shown in 3, the conductors 416a and 416b are in contact only with the upper surface of the semiconductor 406b. It is acceptable for the structure to be such.

[0211] The transistor shown in Figure 33 has conductors 416a and 416b, and semiconductor 406 It does not come into contact with the side of b. Therefore, the conductor 404, which functions as a gate electrode, is not a semiconductor. The electric field applied toward the side of 406b is transmitted by conductors 416a and 416b. It has a structure that is not easily shielded. Also, the conductors 416a and 416b are insulators 4 It does not come into contact with the upper surface of 02. Therefore, excess oxygen (oxygen) released from the insulator 402 is 41 6a and conductor 416b are not consumed to oxidize. Therefore, from insulator 402 The excess oxygen released is efficiently utilized to reduce oxygen deficiencies in semiconductor 406b. It is a structure that can be used. That is, the transistor with the structure shown in Figure 33 has a high ON-voltage It has features such as high flow rate, high field-effect mobility, low subthreshold swing value, and high reliability. It is a transistor with excellent electrical characteristics.

[0212] Figure 34(A) is an example of a top view of transistor 490. The dashed line in Figure 34(A) An example of a cross-sectional view obtained by cutting along G1-G2 and the dashed line G3-G4 is shown in Figure 34(B). In Figure 34(A), some parts, such as the insulator, are omitted for easier understanding.

[0213] The transistor 490 shown in Figures 34(A) and 34(B) is a conductive material on the insulator 442. Body 413, insulator 402 having protrusions on insulator 442 and conductor 413, insulation A semiconductor 406a on the protrusion of body 402, a semiconductor 406b on semiconductor 406a, and semiconductor 4 The semiconductor 406c on 06b, and semiconductors 406a, 406b and 406c Conductors 416a and 416b are arranged in contact with each other and spaced apart, and semiconductor 406c Above, the insulator 412 on the conductor 416a and the conductor 416b, and the conductive material on the insulator 412. Body 404, on conductor 416a, on conductor 416b, on insulator 412, and conductor 404 It has an upper insulator 408 and an insulator 468 on the insulator 408.

[0214] Furthermore, in the G3-G4 cross-section, the insulator 412 has at least the side surface of the semiconductor 406b and They are in contact. Also, in the G3-G4 cross section, the conductor 404 is at least connected to the insulator 412. The conductor 413 faces the top and side surfaces of the semiconductor 406b. It faces the lower surface of semiconductor 406b via this. Furthermore, the insulator 402 does not necessarily have to have a protrusion. Furthermore, it is not necessary to have semiconductor 406c. Furthermore, it is not necessary to have insulator 408. That's fine. Also, it's not necessary to have insulator 468.

[0215] The transistor 490 shown in Figure 34 has some structural differences from the transistor 490 shown in Figure 4. The only difference is that the semiconductor 406a of transistor 490 shown in Figure 4 is different from the semiconductor 406a of transistor 490. Structure of conductor 406b and semiconductor 406c, and semiconductor of transistor 490 shown in Figure 34. The only difference between semiconductors 406a, 406b, and 406c is their structure. Therefore, Figure For the transistor shown in 34, please refer to the explanation of the transistor shown in Figure 4 as appropriate. It is possible.

[0216] In this embodiment, the transistor 490 is, for example, used in channels, etc. While oxide semiconductors can be used, one embodiment of the present invention is not limited thereto. It is not done. For example, transistor 490 is located in the channel and its vicinity, the source region, and the drain. In some areas, or depending on the situation, Si (silicon), Ge ( Germanium, SiGe (silicon germanium), GaAs (gallium arsenide), etc. It may be formed from a material having [a certain characteristic].

[0217] For example, in this specification, various substrates are used to construct transistor 490 and transistors It is possible to form transistors such as the Ta491. The type of substrate is limited to specific types. It will not be done. An example of such a substrate is a semiconductor substrate (for example, a single crystal substrate or silicon (Silicon substrate), SOI (Silicon on insulator) substrate, glass substrate, stone British circuit boards, plastic circuit boards, metal circuit boards, stainless steel circuit boards, stainless steel... Substrate with foil, tungsten substrate, substrate with tungsten foil, flexible group Examples include sheets, laminated films, paper containing fibrous materials, or base films. Examples of substrates include barium borosilicate glass, aluminobrosilicate glass, or saw Examples include dalime glass. Examples include flexible substrates, laminated films, and base films. Examples include the following: For example, polyethylene terephthalate (PET), Polyethylene naphthalate (PEN) and polyethersulfone (PES) are representative examples. There is plastic. Or, for example, there is synthetic resin such as acrylic. Or For example, polypropylene, polyester, polyvinyl fluoride, or polyvinyl chloride Examples include polyamide, polyimide, aramid, epoxy, etc. Examples include inorganic vapor-deposited films or paper. In particular, semiconductor substrates, single crystal substrates, or SOI groups. By manufacturing transistors using boards or similar materials, characteristics, size, or shape can be improved. It is possible to manufacture transistors with less rattle, high current capacity, and small size. When a circuit is constructed using such transistors, the power consumption of the circuit can be reduced, or the circuit can be... High integration can be achieved.

[0218] Furthermore, a flexible substrate is used as the substrate, and transistors are formed directly on the flexible substrate. Alternatively, a release layer may be provided between the substrate and the transistor. After partially or completely completing a semiconductor device, it is separated from the circuit board and transferred to another circuit board. It can be used in this way. In this case, the transistor can be used on substrates with poor heat resistance or flexible substrates. It can be mounted. Furthermore, the aforementioned release layer may include, for example, an inorganic tungsten film and a silicon oxide film. This method utilizes a layered film structure or a configuration in which an organic resin film such as polyimide is formed on a substrate. It is possible.

[0219] In other words, a transistor is formed using one substrate, and then the transistor is placed on another substrate. The transistor may be transposed and placed on a different substrate. As an example, in addition to the substrates on which the transistors described above can be formed, paper substrates, cellophane Fan boards, aramid film boards, polyimide film boards, stone boards, wood boards, cloth Substrate (natural fibers (silk, cotton, linen), synthetic fibers (nylon, polyurethane, polyester) (or recycled fibers (acetate, cupro, rayon, recycled polyester, etc.)) These include leather substrates and rubber substrates. By using these substrates, a tiger with good characteristics can be produced. Formation of transistors, formation of low-power transistors, manufacturing of durable devices, heat resistance This allows for the addition of features, weight reduction, or thinning of the material.

[0220] (Embodiment 7) The following describes oxides applicable to semiconductors 406a, 406b, 406c, etc. The structure of semiconductors will be described. In this specification, crystals are defined as trigonal or rhombohedral. In that case, it is represented as a hexagonal crystal system.

[0221] Oxide semiconductors are broadly classified into non-single-crystal oxide semiconductors and single-crystal oxide semiconductors. Crystal oxide semiconductors are CAAC-OS (C Axis Aligned Crystal Line Oxide Semiconductor, Polycrystalline Oxide Semiconductor, Microcrystalline Acid This refers to oxide semiconductors, amorphous oxide semiconductors, and the like.

[0222] First, let me explain CAAC-OS.

[0223] CAAC-OS is an oxide semiconductor having multiple c-axis oriented crystalline regions.

[0224] CAAC-OS is used in a transmission electron microscope (TEM). When observed with a microscope, clear boundaries between crystalline regions, i.e., bonds, can be seen. The grain boundaries (also called crystal grain boundaries) cannot be identified. Therefore, CA AC-OS is less prone to the decrease in electron mobility caused by grain boundaries.

[0225] CAAC-OS was observed by TEM from a direction roughly parallel to the sample surface (cross-sectional TEM observation). ) This confirms that metal atoms are arranged in layers in the crystalline region. Each layer reflects the surface (also called the formed surface) or the top surface that forms the CAAC-OS. It has this shape and is arranged parallel to the surface or top surface of the CAAC-OS to be formed.

[0226] On the other hand, CAAC-OS was observed by TEM from a direction roughly perpendicular to the sample surface (planar TEM). (M observation) In the crystalline region, metal atoms are arranged in a triangular or hexagonal shape. This can be confirmed. However, the arrangement of metal atoms between different crystalline regions is not necessarily regular. They are not necessarily arranged in a specific order.

[0227] Figure 35(a) is a cross-sectional TEM image of CAAC-OS. Figure 35(b) is a cross-sectional TEM image of Figure 3 This is a further enlarged cross-sectional TEM image of 5(a), with the atomic arrangement enhanced for easier understanding. It is being displayed.

[0228] Figure 35(c) shows the area circled (diameter approximately 4) between AO and A' in Figure 35(a). This is a local Fourier transform image of nm. From Figure 35(c), c-axis orientation is observed in each region. This can be confirmed. Also, since the orientation of the c-axis is different between A and O and between O and A', different G This suggests it is rain. Also, between A and O, the c-axis angles are 14.3° and 16°. It can be seen that it changes gradually and continuously, such as 6° and 26.4°. Similarly, OA In between, the angle of the c-axis is -18.3°, -17.6°, and -15.9° in a gradual, continuous manner. It is clear that things are changing.

[0229] Furthermore, when electron diffraction is performed on CAAC-OS, oriented spots (bright spots) can be observed. It is measured. For example, electrons between 1 nm and 30 nm in size are measured against the upper surface of CAAC-OS. When electron diffraction using a line (also called nanobeam electron diffraction) is performed, spots are observed. (See Figure 36(A).)

[0230] Cross-sectional TEM observation and planar TEM observation revealed that the crystalline portion of CAAC-OS exhibits orientation. You can tell they are there.

[0231] Furthermore, most of the crystalline parts contained in CAAC-OS are cubes with sides less than 100 nm long. It is small enough to fit inside. Therefore, the crystalline portion contained in CAAC-OS has sides of 10 nm. This also includes cases that fit within a cube less than 5 nm or less than 3 nm in size. However, Multiple crystalline regions contained in CAAC-OS connect to form one large crystalline region. This can occur. For example, in a planar TEM image, at 2500 nm 2 Above 5μm 2 That's all. or 1000 μm 2 In some cases, crystal regions exceeding the above size may be observed.

[0232] X-ray diffraction (XRD) equipment for CAAC-OS When structural analysis is performed using this method, for example, CAAC-OS having InGaZnO4 crystals In the out-of-plane analysis, a peak appeared near 31° at the diffraction angle (2θ). This may occur. This peak is attributed to the (009) plane of the InGaZnO4 crystal. Therefore, the CAAC-OS crystals have c-axis orientation, and the c-axis is roughly perpendicular to the surface being formed or the upper surface. It can be confirmed that it is facing straight ahead.

[0233] On the other hand, for CAAC-OS, in-pl X-rays are incident from a direction approximately perpendicular to the c-axis. In analysis using the ANE method, a peak may appear when 2θ is around 56°. This peak is It is attributed to the (110) plane of the InGaZnO4 crystal. Single crystal oxidation of InGaZnO4 For solid semiconductors, fix 2θ to around 56° and use the normal vector of the sample surface as the axis (φ axis). When the sample is rotated while analysis (φ scan) is performed, it is possible to return to a crystal plane equivalent to the (110) plane. Six peaks belonging to this group are observed. In contrast, in the case of CAAC-OS, 2θ is set to 56°. Even when fixed in the vicinity and scanned using φ, no clear peak appears.

[0234] From the above, it can be concluded that in CAAC-OS, the orientation of the a-axis and b-axis is inconsistent between different crystalline regions. It is a rule, but it has c-axis orientation and the c-axis is parallel to the normal vector of the surface to be formed or the upper surface. It can be seen that it is facing in a certain direction. Therefore, it is arranged in layers as confirmed by the aforementioned cross-sectional TEM observation. Each layer of arranged metal atoms is a plane parallel to the ab-plane of the crystal.

[0235] The crystalline portion is formed when CAAC-OS is deposited, or when crystallization treatment such as heat treatment is performed. It is formed when this occurs. As mentioned above, the c-axis of the crystal is the surface on which CAAC-OS is formed or It is oriented in a direction parallel to the normal vector of the top surface. Therefore, for example, the shape of CAAC-OS is When altered by etching or other means, the c-axis of the crystal becomes the surface on which CAAC-OS is formed or The normal vector of the top surface may not be parallel.

[0236] Furthermore, the distribution of c-axis oriented crystal regions in CAAC-OS does not need to be uniform. For example, the crystalline portion of CAAC-OS is formed by crystal growth from near the top surface of CAAC-OS. If formed, the region near the top surface will have more c-axis oriented crystal divisions than the region near the surface being formed. The concentration may increase. Also, CAAC-OS with added impurities may have added impurities. The altered region can also be transformed, forming regions with a different proportion of partially c-axis-oriented crystals. be.

[0237] Furthermore, the out-of-plane method for CAAC-OS containing InGaZnO4 crystals. Analysis revealed that in addition to a peak near 2θ = 31°, a peak also appeared near 2θ = 36°. In some cases, the peaks near 36° 2θ indicate c-axis orientation in a portion of CAAC-OS. This indicates that crystals that do not possess this property are included. CAAC-OS has a peak around 31° when 2θ is near 31°. It is preferable that the curve is shown and that 2θ does not show a peak near 36°.

[0238] CAAC-OS is an oxide semiconductor with a low impurity concentration. The impurities are hydrogen, carbon, and cinnabar. These are elements other than the main components of oxide semiconductors, such as silicon and transition metals. Which element has a stronger bond with oxygen than the metal elements that make up oxide semiconductors? By removing oxygen from the body, it disrupts the atomic arrangement of oxide semiconductors, leading to a decrease in crystallinity. Also, heavy metals such as iron and nickel, argon, and carbon dioxide have atomic radii (or fractions). Because of its large particle radius, when it is contained within an oxide semiconductor, it disrupts the atomic arrangement of the oxide semiconductor. This can be a factor in reducing crystallinity. Furthermore, impurities contained in oxide semiconductors are carriers. It can sometimes be the source of rap or career development.

[0239] Furthermore, CAAC-OS is an oxide semiconductor with a low defect level density. For example, oxide semiconductors Oxygen vacancies in conductors can act as carrier traps or capture hydrogen, thus facilitating the transmission of oxygen. It can be a source of rear-end emissions.

[0240] A low impurity concentration and low defect level density (few oxygen vacancies) are referred to as high-purity intrinsic or This is essentially called high-purity intrinsic. Oxide semiconductors that are high-purity intrinsic or substantially high-purity intrinsic. Because there are fewer carrier sources, the carrier density can be kept low. Transistors using oxide semiconductors exhibit an electrical characteristic where the threshold voltage is negative (normal). Also called Leone.) It rarely becomes high purity intrinsic or substantially high purity intrinsic. Oxide semiconductors have few carrier traps. Therefore, when using these oxide semiconductors... Transistors with this feature exhibit less variation in electrical characteristics and become highly reliable. Charges trapped in the carrier traps of oxide semiconductors take a long time to be released. It can behave as if it were a fixed charge. Therefore, the impurity concentration is high and the defect level Transistors using oxide semiconductors with high ion density may exhibit unstable electrical properties. .

[0241] Furthermore, transistors using CAAC-OS exhibit electrical characteristics under irradiation with visible and ultraviolet light. The fluctuations are small.

[0242] Next, we will explain microcrystalline oxide semiconductors.

[0243] Microcrystalline oxide semiconductors can be clearly observed using TEM. In some cases, this is not the case. The crystalline portion contained in microcrystalline oxide semiconductors is between 1 nm and 100 nm. Or they are often between 1 nm and 10 nm in size. In particular, between 1 nm and 10 nm Below, or microcrystals that are between 1 nm and 3 nm in size are called nanocrystals (nc: nanocr Oxide semiconductors containing nanocrystals are called nc-OS (nanocrys). It is called (talline oxide semiconductor). Also known as nc-OS For example, in TEM observations, grain boundaries may not be clearly visible.

[0244] nc-OS is used in minute regions (for example, regions between 1 nm and 10 nm, especially regions larger than 1 nm). It has periodicity in the atomic arrangement in the region of 3 nm or less. In addition, nc-OS has different properties. No regularity is observed in the crystal orientation between the crystal regions. Therefore, no orientation is observed throughout the entire layer. Furthermore, depending on the analysis method, nc-OS may be indistinguishable from amorphous oxide semiconductors. For example, an XRD device that uses X-rays with a diameter larger than that of the crystal region is used for nc-OS. When structural analysis is performed, the out-of-plane method shows peaks indicating crystal planes. It is not detected. Also, for nc-OS, a probe diameter larger than the crystal portion (e.g., 50 When electron diffraction (also called limited-field electron diffraction) is performed using an electron beam of 1 nm or greater, a halo is observed. A diffraction pattern resembling a pattern is observed. On the other hand, compared to nc-OS, the size of the crystal region is different. When nanobeam electron diffraction is performed using an electron beam with a probe diameter close to or smaller than that of the crystal region, A pot is observed. Also, when nanobeam electron diffraction is performed on nc-OS, it traces a circle. In some cases, a ring-shaped area of ​​high brightness may be observed. Also, compared to nc-OS, When performing beam electron diffraction, multiple spots may be observed within a ring-shaped region. (See Figure 36(B).)

[0245] nc-OS is an oxide semiconductor with higher orderliness than amorphous oxide semiconductors. nc-OS has a lower defect level density than amorphous oxide semiconductors. However, nc-O S shows no regularity in crystal orientation between different crystal regions. Therefore, nc-OS is CA Compared to AC-OS, the defect level density is higher.

[0246] Therefore, nc-OS may have a higher carrier density compared to CAAC-OS. Oxide semiconductors with high carrier density may have high electron mobility. Therefore, nc - Transistors using OS may have high field-effect mobility. Also, nc- Compared to CAAC-OS, the OS has a higher defect level density, resulting in more carrier traps. This can happen. Therefore, transistors using nc-OS are different from those using CAAC-OS. Compared to transistors, they exhibit greater fluctuations in electrical characteristics and are less reliable. Furthermore, nc-OS can be formed even if it contains a relatively large amount of impurities, CA It is easier to form than AC-OS and can be suitably used depending on the application. Therefore, semiconductor devices with transistors using nc-OS can be manufactured with high productivity. It may be possible.

[0247] Oxide semiconductors include, for example, amorphous oxide semiconductors, microcrystalline oxide semiconductors, and CAACs. -The laminated film may have two or more types of OS.

[0248] As described above, CAAC-OS exhibits characteristics of grain boundaries compared to polycrystalline and microcrystalline materials. Because carrier scattering is small, there is an advantage that a decrease in carrier mobility is less likely to occur. Also, C AAC-OS is an oxide semiconductor with a low defect level density and therefore has few carrier traps. Transistors using CAAC-OS exhibit small fluctuations in electrical characteristics and are highly reliable. It becomes a transistor.

[0249] When oxide semiconductors have multiple structures, structural analysis can be performed using nanobeam electron diffraction. It may be possible.

[0250] Figure 36(C) shows the electron gun chamber 10, the optical system 12 below the electron gun chamber 10, and below the optical system 12. The sample chamber 14, the optical system 16 below the sample chamber 14, the observation chamber 20 below the optical system 16, and observation A camera 18 installed in room 20 and a film room 22 below the observation room 20 are included in the transmission electric field. This shows the particle diffraction measurement device. Camera 18 is installed facing the inside of the observation room 20. It is not necessary to have a room 22.

[0251] Furthermore, Figure 36(D) shows the internal structure of the transmission electron diffraction measuring device shown in Figure 36(C). Inside the transmission electron diffraction measuring device, electrons emitted from the electron gun installed in the electron gun chamber 10 24 is irradiated onto the substance 28 placed in the sample chamber 14 via the optical system 12. The electrons that pass through are incident on a fluorescent screen 32 installed inside the observation room 20 via the optical system 16. On the fluorescent screen 32, a pattern appears corresponding to the intensity of the incident electrons, resulting in transmitted electron diffraction patterns. It can measure turns.

[0252] Camera 18 is positioned facing the fluorescent board 32 and captures the patterns that appear on the fluorescent board 32. It is possible to cast a shadow. A straight line passing through the center of the lens of camera 18 and the center of the fluorescent screen 32. The angle between the line and the top surface of the fluorescent board 32 is, for example, between 15° and 80°, or between 30° and above. The angle should be 75° or less, or between 45° and 70°. The smaller the angle, the more likely it is that the camera 18 will capture the image. The transmitted electron diffraction pattern that is shadowed will be greatly distorted. However, if the angle is known in advance... If so, it is also possible to correct the distortion of the obtained transmission electron diffraction pattern. In some cases, camera 18 may be placed in the film chamber 22. It may also be installed in the room chamber 22 so as to be opposite to the direction of incidence of electrons 24. In this case, a fluorescent screen A low-distortion transmission electron diffraction pattern can be captured from the back surface of the 32-lens microscope.

[0253] A holder for fixing the sample substance 28 is installed in the sample chamber 14. The holder has a structure that allows electrons to pass through material 28. The holder is, for example, a material The holder may have a function to move quality 28 along the X, Y, and Z axes. For example, 1nm to 10nm, 5nm to 50nm, 10nm to 100nm Move within ranges such as m or less, 50 nm to 500 nm, and 100 nm to 1 μm. It is sufficient to have a certain level of precision. These ranges should be determined by setting the optimal range based on the structure of material 28. Yes.

[0254] Next, the transmission electron diffraction pattern of the material is measured using the transmission electron diffraction measuring device described above. I will explain how to do it.

[0255] For example, as shown in Figure 36(D), the irradiation position of electrons 24, which are a nanobeam, in a material. By changing (scanning) the material, we can observe how the structure of the material changes. Yes, it is possible. In this case, if substance 28 is CAAC-OS, the cycle will be as shown in Figure 36(A). A folding pattern is observed. Alternatively, if material 28 is nc-OS, as shown in Figure 36(B) A ring-shaped diffraction pattern with bright spots is observed.

[0256] Figure 36(A) shows the typical diffraction pattern observed in CAAC-OS, i.e., the c-axis. The diffraction pattern that shows orientation is called the diffraction pattern of the CAAC structure. It is shown in Figure 36(A). Therefore, in the diffraction pattern of CAAC-OS, for example, spots located at the vertices of a hexagon are clearly visible. It is recognized. CAAC-OS scans the irradiation position to determine the orientation of this hexagon. It appears that the rotation is not uniform, but rather a gradual rotation. Furthermore, the angle of rotation has a certain range. do.

[0257] Alternatively, in the diffraction pattern of CAAC-OS, by scanning the irradiation position, c A gradual rotation around the axis can be observed. This is because, for example, the a-axis and b-axis form... It could also be said that the surface is rotating.

[0258] By the way, even if substance 28 is CAAC-OS, it is partially the same as nc-OS, etc. Various diffraction patterns may be observed. Therefore, the quality of CAAC-OS is within a certain range. The proportion of the region in the range where the CAAC-OS diffraction pattern is observed (CAAC ratio, and This is also called the CAAC conversion rate.) It can sometimes be expressed as. For example, high quality CAAC- For OS, the CAAC ratio should be 50% or more, preferably 80% or more, more preferably 9% It is 0% or more, more preferably 95% or more and 100% or less. The proportion of regions where a diffraction pattern different from that of CAAC-OS is observed is called the non-CAAC ratio, or This is referred to as the non-CAAC conversion rate.

[0259] The following describes the method for evaluating the CAAC ratio of CAAC-OS. Random measurement points are used. Select the desired option, acquire the transmission electron diffraction pattern, and for the total number of measurement points, determine the diffraction pattern of the CAAC structure. Calculate the proportion of measurement points where the signal is observed. Here, it is preferable to have 50 or more measurement points. Furthermore, a score of 100 or higher is preferable.

[0260] One method for randomly selecting measurement points is to scan the irradiation position in a straight line and then measure at certain equal intervals. The diffraction pattern should be acquired at regular intervals. CAAC can be obtained by scanning the irradiation position. This is preferable because it allows us to identify the boundaries between regions with structures and other regions.

[0261] As an example, CAAC-OS immediately after deposition (denoted as-sputtered) The sample and the CAAC-OS after heat treatment at 450°C in an oxygen-containing atmosphere. Samples were prepared, and transmission electron diffraction patterns were acquired by scanning the top surface of each sample. Here, the diffraction pattern was observed while scanning at a speed of 5 nm / second for 60 seconds. The CAAC ratio was derived by converting the resulting diffraction pattern into a still image every 0.5 seconds. Furthermore, a nanobeam electron beam with a probe diameter of 1 nm was used as the electron beam. Measurements were performed on 6 samples. The CAAC ratio was calculated using the average value across the 6 samples. I used it.

[0262] The CAAC ratio for each sample is shown in Figure 37(A). CAAC-OS immediately after film deposition The AC ratio was 75.7% (the non-CAAC ratio was 24.3%). Furthermore, the 450°C heating treatment was performed. The CAAC ratio in the post-treatment CAAC-OS was 85.3% (the non-CAAC ratio was 14.7%). It can be seen that the CAAC ratio is higher after the 450°C heat treatment compared to immediately after film formation. Heat treatment at high temperatures (e.g., 400°C or higher) results in a lower non-CAAC ratio. It can be seen that (the CAAC ratio increases). Also, even in heat treatment below 500°C It can be seen that a CAAC-OS with a high CAAC ratio can be obtained.

[0263] Here, most of the diffraction patterns that differ from CAAC-OS are similar to those of nc-OS. It was a turn. Furthermore, amorphous oxide semiconductors could not be confirmed in the measurement area. Therefore, by heat treatment, regions having a structure similar to nc-OS are adjacent to each other. This suggests that the region is rearranged and transformed into CAAC due to the influence of its structure.

[0264] Figures 37(B) and 37(C) show CAAC- immediately after film deposition and after heat treatment at 450°C. This is a planar TEM image of OS. By comparing Figure 37(B) and Figure 37(C), 45 CAAC-OS after 0°C heat treatment shows that the film quality is more homogeneous. It can be seen that the film quality of CAAC-OS is improved by heat treatment at a certain temperature.

[0265] Using this measurement method, it is possible to analyze the structure of oxide semiconductors that have multiple structures. This can happen.

[0266] When nanobeam electron diffraction is performed here, the CAAC-OS partially has a CAAC structure. Regions with external structures, such as regions where diffraction patterns of nc structures are observed, or spinel-type regions. Consider the case where the diffraction pattern of the crystal structure has a region in which it can be observed. In the region where the diffraction pattern of the CAAC structure is observed, the diffraction patterns of other structures are observed. At the boundary with the region, for example, carrier scattering increases and carrier mobility decreases. Yes. Furthermore, the boundary area is likely to become a pathway for the movement of impurities and is also considered to be a place where impurities can be easily captured. Therefore, there are concerns that the impurity concentration of CAAC-OS will increase.

[0267] In particular, the region having a structure other than the CAAC structure is the region having a spinel-type crystal structure. In that case, between the region having a CAAC structure and the region having a structure other than a CAAC structure A clear boundary can sometimes be observed. Also, at that boundary, carrier scattering and other factors can occur. Electron mobility may decrease. Also, when forming a conductive film on CAAC-OS, The elements in the conductive film, such as metallic elements, form regions with a CAAC structure and spinel-type crystals. It can diffuse into the boundaries of regions that have a structure. Also, it has a spinel-type crystal structure. In such films, the concentration of impurities in the film, such as hydrogen, may increase, for example, at grain boundaries. It is possible that impurities such as hydrogen are trapped. Therefore, CAAC-OS It is more preferable that the crystal structure contains little to no spinel-type crystal structures.

[0268] Consider the case where the oxide semiconductor contains an indioxide semiconductor, element M, and zinc. Here, element M is preferably aluminum, gallium, yttrium, or tin. Other elements to which element M can be applied include boron, silicon, titanium, iron, and nitrile. Germanium, yttrium, zirconium, molybdenum, lanthanum, cerium These include neodymium, hafnium, tantalum, and tungsten. However, as element M, In some cases, it is acceptable to combine multiple of the aforementioned elements. For example, indium found in oxide semiconductors. The ratio of the number of atoms of element M and zinc, and the preferred range of x:y:z will be explained.

[0269] In oxides containing indium, element M, and zinc, InMO3(ZnO) m (m is natural It is known that there exists a homologous phase (homologous series) represented by a number. Now, let's consider the case where element M is Ga as an example.

[0270] For example, as a compound having a spinel-type crystal structure, ZnM2 such as ZnGa2O4 Compounds represented by O4 are known. Also, compositions near ZnGa2O4, namely Zn x Ga y O z In this case, x, y, and z have values ​​close to (x, y, z) = (0, 1, 2). In some cases, a spinel-type crystal structure is likely to form or be present. Here, oxide semiconductor It is preferable that it be CAAC-OS. Furthermore, CAAC-OS is particularly spinel type. It is preferable that the material does not contain a crystalline structure. In addition, to increase carrier mobility, In content may be added. It is preferable to increase the ratio. In oxide semiconductors having indium, element M and zinc, mainly The s orbitals of heavy metals contribute to carrier conduction. Increasing the indium content... This results in more s orbitals overlapping. For this reason, oxides with a high indium content are in Compared to oxides with a low zinc content, it exhibits higher mobility. Therefore, oxide semiconductors By using oxides with a high indium content, carrier mobility can be increased. .

[0271] For example, by increasing the atomic ratio of indium compared to other metallic elements, This is preferable because it can increase mobility. For example, the indium contained in oxide semiconductors When the ratio of the number of atoms of element M and zinc is expressed as x:y:z, x is 1.75 times or more the number of atoms of y. And that is preferable.

[0272] Furthermore, in order to further increase the CAAC ratio of oxide semiconductors, compared to other metal elements, It is preferable to increase the atomic ratio of lead. For example, the atomic ratio of In-Ga-Zn oxide is fixed. By defining the range within which solubility is possible, it may be possible to further increase the CAAC ratio. By increasing the ratio of zinc atoms to the sum of indium and gallium atoms, the solid solution region is increased. The range of possible values ​​tends to be broad. Therefore, for the sum of the number of atoms of indium and gallium By increasing the atomic ratio of zinc, the CAAC ratio of oxide semiconductors can be further increased. In some cases, it is possible. For example, the number of atoms of indium, element M, and zinc in an oxide semiconductor. When the ratio of x to y is expressed as x:y:z, it is preferable that z is 0.5 times or more of x+y. On the other hand, To increase the atomic ratio of indium and improve carrier mobility, z should be less than or equal to twice x+y. It would be desirable to have it.

[0273] As a result, the proportion of spinel-type crystal structures observed in nanobeam electron diffraction was eliminated. It is possible to do so, or to make it extremely low. Therefore, a superior CAAC-OS It can be obtained. Also, carriers at the boundary between the CAAC structure and the spinel-type crystal structure. Because scattering and other factors can be reduced, when oxide semiconductors are used in transistors, high This enables the realization of transistors with high field-effect mobility. Furthermore, highly reliable transistors can be realized. It is possible to achieve this goal.

[0274] As a result, oxide semiconductors with a high CAAC ratio can be realized. In other words, high quality This makes it possible to realize CAAC-OS. Furthermore, in the region where a spinel-type crystal structure is observed... It is possible to realize CAAC-OS with no or very few boundaries. For example, a high quality If it is CAAC-OS, the CAAC ratio should be 50% or more, preferably 80% or more, more preferably The percentage is preferably 90% or more, and more preferably 95% to 100%.

[0275] Furthermore, when depositing oxide semiconductors using the sputtering method, the atomic ratio of the target is... A film with an atomic ratio that is different from that of the target may be formed. In particular, zinc may have an atomic ratio that is different from that of the target. The atomic ratio of the film may become smaller. Specifically, the number of zinc atoms contained in the target. The ratio may be between 40 atomic% and approximately 90 atomic%.

[0276] Therefore, the atomic ratio of the target is greater than that of the oxide semiconductor obtained by the sputtering method. It is preferable that the ratio of zinc atoms be high.

[0277] Furthermore, the oxide semiconductor may consist of multiple stacked films. Also, the CAA of each of the multiple films The C ratio may differ. Also, of the multiple layered films, at least one film may be, for example It is preferable that the CAAC ratio is 90% higher, and more preferably 95% or higher. It is even more preferable that the percentage be between 7% and 100%.

[0278] The above describes oxide semiconductors applicable to semiconductors 406a, 406b, 406c, etc. It is the structure of a conductor.

[0279] Next, semiconductors applicable to semiconductors 406a, 406b, 406c, etc. Other elements will be explained.

[0280] Oxide semiconductors applicable to semiconductor 406b include, for example, indium-containing oxide semiconductors. For example, if semiconductor 406b contains indium, the carrier mobility (electron mobility) ) becomes higher. Also, semiconductor 406b preferably contains element M. Element M is preferably This includes aluminum, gallium, yttrium, or tin. Other elements M may be used. Applicable elements include boron, silicon, titanium, iron, nickel, germanium, and Zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, Examples include tantalum and tungsten. However, as element M, multiple combinations of the aforementioned elements are used. There are cases where this is acceptable. Element M is, for example, an element with a high bond energy with oxygen. For example, an element whose bond energy with oxygen is higher than that of indium. Or, an element M is, for example, an element that has the function of increasing the energy gap of oxide semiconductors. Furthermore, semiconductor 406b preferably contains zinc. Oxide semiconductors become crystalline when zinc is present. It may become easier to transform.

[0281] Semiconductor 406b uses, for example, an oxide with a large energy gap. Semiconductor 40 The energy gap of 6b is, for example, 2.5 eV to 4.2 eV, preferably 2. The voltage should be between 8 eV and 3.8 eV, and more preferably between 3 eV and 3.5 eV.

[0282] Semiconductors 406a, 406b, and 406c contain at least indium. It is preferable to do so. Furthermore, when semiconductor 406a is In-M-Zn oxide, the sum of In and M When is set to 100 atomic%, preferably In is less than 50 atomic and M is 5 0 atomic% or more, more preferably In is less than 25 atomic% and M is 75 at The comic% must be 1% or higher. Also, when semiconductor 406b is In-M-Zn oxide, In and When the sum of bi and M is 100 atomic%, preferably In is 25 atomic% or more. , M is less than 75 atomic%, more preferably In is 34 atomic%, and M is It shall be less than 66 atomic%. Also, when semiconductor 406c is In-M-Zn oxide, When the sum of In and M is set to 100 atomic%, preferably In is 50 atomic. c% or less, M is 50 atomic% or more, and more preferably In is 25 atomic% or less The minimum molecular weight (M) is 75% or higher. Note that semiconductor 406c is the same as semiconductor 406a. You may use a variety of oxides.

[0283] Semiconductor 406b is an acid with a higher electron affinity than semiconductors 406a and 406c. A synthetic material is used. For example, as semiconductor 406b, semiconductor 406a and semiconductor 406c are used. Furthermore, electron affinity of 0.07 eV to 1.3 eV, preferably 0.1 eV to 0.7 eV An oxide with a voltage of V or less, and more preferably 0.15 eV to 0.4 eV or higher, is used. Electron affinity is the energy difference between the vacuum level and the lower end of the conduction band.

[0284] Furthermore, indium gallium oxide has low electron affinity and high oxygen blocking properties. Therefore, it is preferable that semiconductor 406c contains indium gallium oxide. The atomic ratio [Ga / (In+Ga)] is, for example, 70% or more, preferably 80% or more. More preferably, it should be 90% or more.

[0285] At this time, when an electric field is applied to the gate electrode, semiconductor 406a, semiconductor 406b, semiconductor Of the 406c atoms, channels are formed in the semiconductor 406b, which has a high electron affinity. Therefore, The field-effect mobility of the transistor can be increased. Here, semiconductor 406b and semiconductor Because body 406c shares common constituent elements, interfacial scattering is almost nonexistent.

[0286] Here, between semiconductor 406a and semiconductor 406b, semiconductor 406a and semiconductor 406 It may have a mixed region with b. Also, between semiconductor 406b and semiconductor 406c The semiconductor 406b and semiconductor 406c may have a mixed region. The mixed region is at the interface. The level density becomes lower. Therefore, semiconductors 406a, 406b, and 406c In the laminate, the energy changes continuously near each interface (continuous bonding and Also known as ) it forms a band structure. Note that Figure 38(A) shows semiconductor 406a and semiconductor 406b Figure 38(B) is a cross-sectional view showing the semiconductor 406c stacked in this order. A) is the energy (Ec) at the lower end of the conduction band corresponding to the dashed line P1-P2, and semiconductor 4 This shows the case where the electron affinity of semiconductor 406c is greater than that of 06a. Also, Figure 38(C) shows the case of semiconductor 406c. This shows the case where the electron affinity of semiconductor 406c is smaller than that of conductor 406a.

[0287] At this time, the electrons are not in semiconductor 406a and semiconductor 406c, but in semiconductor 406 It mainly moves within b. As described above, at the interface between semiconductor 406a and semiconductor 406b. Interface state density at the interface between semiconductor 406b and semiconductor 406c By lowering this, the movement of electrons in semiconductor 406b is less inhibited, The on-current of the 490 transistor can be increased.

[0288] For example, semiconductors 406a and 406c contain oxygen other than that which constitutes semiconductor 406b. It is an oxide semiconductor having one or more or two or more of the elements. The semiconductor 406b is composed of One or more elements other than oxygen are used to create semiconductor 406a and semiconductor 406c. Therefore, the interface between semiconductor 406a and semiconductor 406b, and the interface between semiconductor 406b and semiconductor At the interface with 406c, interface states are less likely to form.

[0289] Semiconductors 406a, 406b, and 406c contain a spinel-type crystal structure. It is preferable that there is little or no semiconductor 406a, semiconductor 406b and semiconductor Body 406c is preferably CAAC-OS.

[0290] For example, CAAC-OS having multiple c-axis oriented crystal portions is used as semiconductor 406a. As a result, the semiconductor 406b stacked on top of it is near the interface with semiconductor 406a Even in this case, a region with good c-axis orientation can be formed.

[0291] Furthermore, by increasing the CAAC ratio of CAAC-OS, for example, defects can be reduced. This is possible. Furthermore, for example, the region having a spinel-type structure can be reduced. Furthermore, for example, carrier scattering can be reduced. Also, for example, against impurities Therefore, a film with high blocking ability can be made. Thus, semiconductor 406a and semiconductor 406c By increasing the CAAC ratio, a good interface is established between the semiconductor 406b where the channel is formed and the interface. This forms a structure that can suppress carrier scattering to a small extent. Also, impurities in semiconductor 406b This can suppress the inclusion of impurities and reduce the impurity concentration of semiconductor 406b.

[0292] Furthermore, electron movement is inhibited when the defect level density in the channel formation region is high. It will be done.

[0293] For example, semiconductor 406b has an oxygen deficiency (V O Also written as: ) If it has oxygen deficiency Hydrogen can enter the site, forming a donor level. Below is information on oxygen-deficient sites. V is the state in which hydrogen is incorporated. O It is sometimes written as H. O Because H scatters electrons, This is a factor that reduces the on-current of transistor 490. Note that oxygen-deficient sites are water The presence of oxygen is more stable than the presence of elemental atoms. Therefore, reducing oxygen vacancies in semiconductor 406b is necessary. This can sometimes increase the on-current of transistor 490.

[0294] To reduce oxygen vacancies in semiconductor 406b, for example, excess acid contained in insulator 402 One method involves moving the element to semiconductor 406b via semiconductor 406a. The semiconductor 406a is an oxygen-permeable layer (a layer that allows oxygen to pass through or permeate). This is preferable.

[0295] Oxygen is released from the insulator 402 by heat treatment, etc., and incorporated into the semiconductor 406a. Oxygen may be present as free oxygen between atoms in semiconductor 406a, or as oxygen from other sources. It may exist in combination with such as. The lower the density of semiconductor 406a, the more it exists between atoms. The more voids there are, the higher the oxygen permeability. For example, semiconductor 406a has a layered crystalline structure. If such a material exists and oxygen movement across the layer is unlikely to occur, semiconductor 406a will be moderately crystalline. It is preferable that the group has a low sex rate.

[0296] In order to get the excess oxygen (oxygen) released from the insulator 402 to the semiconductor 406b The semiconductor 406a should preferably have a degree of crystallinity that allows excess oxygen (oxygen) to permeate. For example, If semiconductor 406a is CAAC-OS, then if the entire layer becomes CAAC, then excess Since it cannot permeate oxygen, it is preferable to have a structure that has gaps in some parts. For example, the CAAC ratio of semiconductor 406a is less than 100%, preferably less than 98%, Furthermore, it is preferable to have less than 95%, and more preferably less than 90%. However, for semiconductors 4 To reduce the interface state density between 06a and semiconductor 406b, the CA of semiconductor 406a is The AC ratio should be 10% or more, preferably 20% or more, more preferably 50%, and even more preferably The value should be 70% or higher.

[0297] Furthermore, in order to increase the on-current of transistor 490, the thickness of semiconductor 406c must be small. The more preferable. For example, less than 10 nm, preferably 5 nm or less, and even more preferably 3 A semiconductor 406c having a region of less than nm can be used. On the other hand, semiconductor 406c is channel To the semiconductor 406b where the layer is formed, elements other than oxygen that constitute the adjacent insulator (hydrogen, sulfide) It has a function to block the entry of (such as recon). Therefore, semiconductor 406c It is preferable that it has a certain thickness. For example, 0.3 nm or more, preferably 1 nm. The semiconductor 406c may have a region with a thickness of m or more, more preferably 2 nm or more. Furthermore, semiconductor 406c suppresses the outward diffusion of oxygen released from insulator 402 and the like. Therefore, it is preferable that it has the property of blocking oxygen.

[0298] Furthermore, to increase reliability, semiconductor 406a should be thick and semiconductor 406c should be thin. This is preferable. For example, 10 nm or more, preferably 20 nm or more, and even more preferably 40 nm. The semiconductor 406a may have a region with a thickness of m or more, more preferably 60 nm or more. By increasing the thickness of semiconductor 406a, the interface between the adjacent insulator and semiconductor 406a is improved. The distance from the semiconductor 406b where the channel is formed can be increased. However, the semiconductor The productivity of the device may decrease, for example, 200 nm or less, preferably 120 If the semiconductor 406a has a region with a thickness of nm or less, and more preferably 80 nm or less, then good.

[0299] For example, between semiconductor 406b and semiconductor 406a, for example, secondary ion mass spectrometry ( SIMS (Secondary Ion Mass Spectrometry) odor , 1 x 10 19 atoms / cm 3 Less than 5 × 10 18 atoms / cm 3 Less than 2 × 10 18 atoms / cm 3 Region with silicon concentration below a certain level It has a 1×1 0 19 atoms / cm 3 Less than 5 × 10 18 atoms / cm 3 less than, further Preferably 2 × 10 18 atoms / cm 3 It has a region where the silicon concentration is less than [amount missing].

[0300] Furthermore, in order to reduce the hydrogen concentration of semiconductor 406b, semiconductor 406a and semiconductor 40 It is preferable to reduce the hydrogen concentration of 6c. Semiconductors 406a and 406c are SIM In S, 2 × 10 20 atoms / cm 3 The following is preferably 5 × 10 19 atoms / cm 3 More preferably 1 × 10 19 atoms / cm 3 More preferably, 5 x 10 18 atoms / cm 3 It has a region with the following hydrogen concentrations. Also, semiconductor 40 To reduce the nitrogen concentration of 6b, the nitrogen concentrations of semiconductors 406a and 406c were reduced. It is preferable to reduce it. Semiconductors 406a and 406c are 5 × 1 in SIMS. 0 19 atoms / cm 3 Less than 5 × 10 18 atoms / cm 3 From here on Preferably 1 × 10 18 atoms / cm 3 More preferably 5 × 10 17 ato ms / cm 3 It has a region with the following nitrogen concentrations.

[0301] The above describes oxide semiconductors applicable to semiconductors 406a, 406b, 406c, etc. These are the structure and other elements of the conductor. The oxide semiconductor described above is called semiconductor 406a, and semiconductor By applying it to conductor 406b, semiconductor 406c, etc., transistor 490 provides good electrical performance. Aerodynamic characteristics can be obtained. For example, good switching speed can be obtained. For example, transient The switching speed of the ST490 is less than 10ns, preferably less than 1ns, more preferably Furthermore, it is less than 0.1 ns. In addition, transistor 490 has good switching By using a p-channel Si transistor with speed, according to one aspect of the present invention Semiconductor devices (cells) can have their operating speed improved. For example, p-channel S The switching speed of the i-transistor is less than 10ns, preferably less than 1ns. Preferably, it is less than 0.1 ns. Also, for example, a semiconductor device according to one aspect of the present invention ( The delay time of the inverter and NAND circuit is less than 10ns, preferably less than 1ns. It is less than 0.1 ns, and more preferably less than 0.1 ns.

[0302] (Embodiment 8) Regarding an example of the configuration of a semiconductor device using a semiconductor device (cell) according to one aspect of the present invention, I will explain this using Figure 21.

[0303] The semiconductor device 300 shown in Figure 21 includes a CPU core 301 and a power management unit. It has a power management unit 321 and peripheral circuits 322. The power management unit 321 is power It has a controller 302 and a power switch 303. Peripheral circuit 322 is a catch Cache 304 with memory, bus interface (BUS I / F) 305 It has a debug interface (Debug I / F) 306. 3 CPU cores 01 is data bus 323, control unit 307, PC (program counter) 308, pi Pipeline register 309, pipeline register 310, ALU (Arithmetic It has a logic unit 311 and a register file 312. CPU core 3 Data exchange between 01 and peripheral circuits 322 such as cache 304 is handled by the data bus 32 This is done via 3.

[0304] A semiconductor device (cell) according to one aspect of the present invention includes a power controller 302 and a control device 3 It can be applied to many logic circuits, including 07. In particular, by using standard cells... It can be applied to all logic circuits that can be constructed using this method. As a result, small semiconductors We can provide a semiconductor device 300. We can also provide a semiconductor device 300 that can reduce power consumption. It can be provided. Furthermore, a semiconductor device 300 capable of improving operating speed can be provided. This allows us to provide a semiconductor device 300 that can reduce fluctuations in power supply voltage.

[0305] A semiconductor device (cell) according to one aspect of the present invention includes a p-channel Si transistor and the aforementioned The oxide semiconductor described in the embodiment (preferably an oxide containing In, Ga, and Zn) A transistor included in the channel formation region is used to form the semiconductor device (cell) semiconductor device 300 By applying this, a small semiconductor device 300 can be provided. In addition, power consumption can be reduced. We can provide a semiconductor device 300 that enables this. In addition, a semiconductor that can improve the operating speed. We can provide the device 300. In particular, by using only p-channel type Si transistors, manufacturing Manufacturing costs can be kept low.

[0306] The control device 307 includes PC 308, pipeline register 309, pipeline register 310, ALU311, Register File 312, Cache 304, Bus Interface The operation of -305, debug interface 306, and power controller 302 By providing comprehensive control, the instructions contained within the input application or other program are controlled. It has the functionality to decode and execute.

[0307] The ALU311 has the functionality to perform various arithmetic operations, including basic arithmetic and logical operations.

[0308] Cache 304 has the function of temporarily storing frequently used data. C308 is a register that stores the address of the next instruction to be executed. Although not shown in Figure 21, the cache 304 controls the operation of the cache memory. A cache controller is provided.

[0309] Pipeline register 309 is a register that has the function of temporarily storing instruction data. That is the case.

[0310] Register file 312 has multiple registers, including general-purpose registers, and main Data read from memory, or data obtained as a result of the ALU311's arithmetic processing, It can remember things like that.

[0311] The pipeline register 310 contains data used for the arithmetic processing of the ALU311, or A Registrar has a function to temporarily store data obtained as a result of the LU311's calculation processing. It is Ta.

[0312] The bus interface 305 connects the semiconductor device 300 to each external device of the semiconductor device 300. It functions as a data path between the seed device and the Debug Interface 3. 06 is a signal for inputting instructions to the semiconductor device 300 for debugging control. It functions as a road.

[0313] The power switch 303 is a component of the semiconductor device 300 other than the power controller 302. It has the function of controlling the supply of power voltage to various circuits. The above various circuits are several Each belongs to a word domain, and various circuits belonging to the same power domain are power The power supply voltage is controlled by switch 303. 302 has the function of controlling the operation of the power switch 303.

[0314] The semiconductor device 300 having the above configuration is capable of power gating. Let's explain the operation flow of power gating with an example.

[0315] First, the CPU core 301 determines the timing for stopping the supply of power voltage, which is controlled by the power controller. Set in register 302. Then, from CPU core 301 to power controller 3 A command is sent to 02 to start power gating. Then, within the semiconductor device 300 The various registers and cache 304 included begin saving data. Next, the semiconductor The supply of power voltage to various circuits other than the power controller 302 of the device 300 is It is stopped by the power switch 303. Then, an interrupt signal is received by the power controller 302 When input is received, the supply of power voltage to the various circuits of the semiconductor device 300 is initiated. Furthermore, a counter is provided in the power controller 302 to indicate when the power supply voltage is started. The timing of this operation is determined using the counter, regardless of the input of the interrupt signal. This is fine. Next, the various registers and cache 304 begin to restore the data. Then, the execution of instructions in the control unit 307 is resumed.

[0316] Such power gating affects the entire processor, or a component of the processor. This can be done in one or more logic circuits. Also, even if the power supply is only for a short time, It can be stopped. Therefore, power consumption can be controlled at a fine granularity, either spatially or temporally. Reductions can be made.

[0317] When power gating is performed, the information held by the CPU core 301 and peripheral circuit 322 is used. It is preferable to be able to evacuate in a short period of time. This would allow for quick switching of the power on and off. This results in greater power saving effects.

[0318] In order to quickly save the information held by the CPU core 301 and peripheral circuit 322, It is preferable that the flop circuit can save data within that circuit (backup possible). (This is called a flip-flop circuit.) Also, SRAM cells can save data within the cell. Preferred (referred to as a backupable SRAM cell). Backupable flip-flow The chip circuit and SRAM cell are made of oxide semiconductors (preferably containing In, Ga, and Zn). It is preferable to have a transistor that includes a material in the channel formation region. The low off-current of the zista allows for backup flip-flop circuits and SR (Scanning Reduction). AM cells can retain information for extended periods without power supply. Furthermore, high transistor performance... The fast switching speed allows for backup flip-flop circuits and SR (Sensor-Return). AM cells may allow for short-term data backup and recovery.

[0319] Examples of backupable flip-flop circuits and backupable SRAM cells Next, we will explain using Figures 22 and 23.

[0320] The semiconductor device 200 shown in Figure 22 is an example of a backup-capable flip-flop circuit. There is. The semiconductor device 200 has a first memory circuit 201, a second memory circuit 202, and a third It has a memory circuit 203 and a read circuit 204. The semiconductor device 200 has a potential V1 The potential difference between potential V1 and potential V2 is supplied as the power supply voltage. One is a high level, and the other is a low level. Below, potential V1 is low level, and potential V2 is high level. Using the case of Bell as an example, we will explain an example of the configuration of the semiconductor device 200.

[0321] The first memory circuit 201 operates during the period when the power supply voltage is supplied to the semiconductor device 200. When a signal D containing data is input, it has the function of holding that data. And, half During the period when the power supply voltage is supplied to the conductor device 200, the first memory circuit 201 Then, a signal Q containing the retained data is output. Meanwhile, the first memory circuit 201 is half During periods when no power voltage is supplied to the conductor device 200, the data is retained. No, it is not possible. In other words, the first memory circuit 201 can be called a volatile memory circuit.

[0322] The second memory circuit 202 reads the data held in the first memory circuit 201. It has a function to store (or save) data. The third memory circuit 203 is the second memory circuit It has the function of reading and storing (or saving) the data held in 202. The data retrieval circuit 204 receives data held in the second memory circuit 202 or the third memory circuit 203. It has the function of reading data and storing (or restoring) it in the first memory circuit 201.

[0323] In particular, the third memory circuit 203 is configured to function during periods when no power supply voltage is supplied to the semiconductor device 200. Even then, the data held in the second memory circuit 202 is read and stored (or retrieved). It has the function of avoiding.

[0324] As shown in Figure 22, the second memory circuit 202 consists of a transistor 212 and a capacitive element 219. The third memory circuit 203 has transistor 213, transistor 215, and a capacitor. The circuit has element 220. The readout circuit 204 has transistor 210 and transistor 21 It has transistor 8, transistor 209, and transistor 217.

[0325] Transistor 212 receives an charge corresponding to the data held in the first memory circuit 201. The transistor 212 has the function of charging and discharging the capacitive element 219. The charge corresponding to the data held in 01 can be rapidly charged and discharged to the capacitive element 219. This is desirable. Specifically, transistor 212 is made of crystalline silicon (preferably The channel-forming region includes polycrystalline silicon (more preferably single-crystal silicon). desirable.

[0326] Transistor 213 enters a conduction state or depending on the charge held in capacitive element 219. A non-conductive state is selected. Transistor 215 is selected when transistor 213 is in a conductive state. Sometimes, it has the function of charging and discharging the capacitive element 220 with a charge corresponding to the potential of the wiring 244. The transistor 215 should ideally have a very low off-current. Specifically, the transistor Ta215 channels an oxide semiconductor (preferably an oxide containing In, Ga, and Zn). It is desirable to include it in the formation region.

[0327] To explain the connection relationships of each element in detail, the source and drain of transistor 212 are One end is connected to the first memory circuit 201. The source and drain of transistor 212 The other side of the input consists of one electrode of the capacitive element 219, the gate of the transistor 213, and the transistor. It is connected to the gate of the zista 218. The other electrode of the capacitive element 219 is connected to the wiring 242. They are connected. One of the sources and drains of transistor 213 is connected to wiring 244. The source and drain of transistor 213 are connected to the other side of transistor 215. Connected to either the source or the drain of transistor 215. The other end is connected to one electrode of the capacitive element 220 and the gate of the transistor 210. The other electrode of the capacitive element 220 is connected to the wiring 243. Transistor 21 One of the sources and drains of transistor 0 is connected to wiring 241. The other end of the source and drain is connected to one of the source and drain of transistor 218. The source and drain of transistor 218 are connected to the source of transistor 209. It is connected to one of the source and drain of transistor 209. The other side is connected to one of the source and drain of transistor 217 and to the first memory circuit 201. They are connected. The source and drain of transistor 217 are connected to wiring 240. In addition, in Figure 22, the gate of transistor 209 is connected to transistor 2 Although connected to the gate of 17, the gate of transistor 209 is not necessarily the same as the transistor It does not need to be connected to gate TA217.

[0328] The transistor exemplified in the previous embodiment can be applied to transistor 215. Because the off-current of transistor 215 is small, the semiconductor device 200 can withstand long-term power supply. Information can be retained without it. The switching characteristics of transistor 215 are good. To achieve this, the semiconductor device 200 can perform high-speed backup and recovery.

[0329] The semiconductor device 100 shown in Figure 23 is an example of a backup-capable SRAM cell. The conductor device 100 includes transistors M101, M102, Mos1, Mos2, and an inverter. The semiconductor device includes INV101, INV102, and capacitors C101 and C102. 100 is connected to wiring WL, BL, BLB, and BRL. Also, semiconductor device 100 A low power supply voltage (VSS) or similar is supplied as the power supply voltage.

[0330] Inverter INV101 and Inverter INV102 have input and output nodes that interact with each other. It is connected to and forms an inverter loop circuit. The gate of transistor M101 and The gate of transistor M102 is connected to wiring WL. Transistor M101 is It functions as a switch connecting the wiring BL and the input node of inverter INV101. Transistor M102 connects the wiring BLB and the input node of inverter INV102. It functions as a switch.

[0331] Wiring WL functions as a word line for writing / reading and a signal for selecting memory cells. WLE) is input from the word line driver circuit. Wiring BL, BLB is data signal D, It functions as a bit line that sends DB. The data signal DB is the inverted logical value of the data signal D. These are the signals. Data signals D and DB are supplied from the bit line driver circuit. Wirings BL and BLB are also wiring that sends data read from semiconductor device 100 to the output circuit. be.

[0332] The semiconductor device 100 includes inverter INV101, inverter INV102, and transistor A pair of memory circuits is provided in a volatile memory circuit having transistor M101 and transistor M102. This corresponds to the circuit. The pair of memory circuits consist of transistor Mos1 and capacitor C1. A memory circuit having 01 (hereinafter referred to as memory circuit (Mos1, C101)), transistor A memory circuit having a Mos2 and a capacitor C102 (hereinafter referred to as the memory circuit (Mos2, C1 It is shown as 02). It consists of memory circuit (Mos1, C101), memory circuit (Mos2 C102) indicates the potentials held at node NET1 and node NET2, respectively. These are circuits for backing up data in volatile memory circuits. The memory circuit works by turning on transistors Mos1 and Mos2, thereby controlling capacitor C Charge or discharge 101 and C102 to write data, and then turn them off. And by retaining the charge stored in the capacitor, it can retain data without a power supply. That is the case.

[0333] Data recovery is also performed by turning on transistors Mos1 and Mos2. With the power supply to inverters INV101 and INV102 stopped, the transistors Turn on Mos1 and Mos2, connect node FN1 and node NET1, and Node FN1 and node NET1 share charge, and node FN2 and node NET2 are connected. Next, node FN2 and node NET2 share charge. Then, inverter INV10 1. By supplying power to INV102, the potential of node NET1 and node NET2 will be adjusted accordingly. Then, data is restored to the inverter loop circuit. After that, transistor Mos1, Turn off Mos2.

[0334] The gates of transistors Mos1 and Mos2 are connected to wiring BRL. The signal OSG is input to L. The signal OSG connects a pair of memory circuits (memory circuit (Mos 1. The memory circuit (Mos2C102) is driven, and backup or reset is performed. A covert operation will be held.

[0335] The configuration of the memory circuit (Mos1, C101) and the memory circuit (Mos2, C102) is described below. Let me explain how it works.

[0336] The memory circuits (Mos1, C101) and (Mos2, C102) use capacitor C101. By accumulating charge in C102, the potentials of nodes FN1 and FN2 are maintained. Transition By turning on Mos1 and Mos2, node NET1 and node FN1 are connected. Then, the potential held by node NET1 is applied to node FN1, and the transistor By turning on Mos2, node NET2 and node FN2 are connected, and node F The potential held by node NET2 is applied to N2. Then, transistor Mos1 By turning off Mos2, nodes FN1 and FN2 become electrically floating. The charge stored in capacitors C101 and C102 is retained, and the memory circuit maintains the data retention state. To become.

[0337] For example, if node FN1 is at the H level, charge leaks from C101 and gradually... The voltage may drop. Transistors Mos1 and Mos2 are oxide semiconductors. It is desirable to include a body (preferably an oxide containing In, Ga, and Zn) in the channel-forming region. It seems so. As a result, the leakage current (off current) flowing between the source and drain in the off state is Because it is extremely small, the voltage fluctuation of node FN1 is suppressed. In other words, the memory circuit (Mos 1. C101) is used as a non-volatile memory circuit or to retain data for a long period of time without a power supply. It can be operated as a memory circuit that can do this. Also, the memory circuit (Mos2, C102) is similar, and these memory circuits are connected to inverter INV101, inverter I A volatile memory circuit having NV102, transistor M101, and transistor M102 It can be used as a backup memory circuit.

[0338] Apply the transistors exemplified in the previous embodiment to transistors Mos1 and Mos2. This is possible because the off-current of transistors Mos1 and Mos2 is small, 100 can retain information for a long period of time without power supply. Transistor Mos1, Because the switching characteristics of Mos2 are good, the semiconductor device 100 is a high-speed backup It can perform recovery and recovery.

[0339] A semiconductor device (cell) according to one aspect of the present invention and an oxide semiconductor as illustrated in the previous embodiment. A backup-capable flip-flop using a transistor that includes a channel formation region. Circuits and SRAM cells can be applied to the semiconductor device 300. As a result, This allows for the power to be turned on and off during the specified period, and enables the provision of semiconductor devices with even lower power consumption. Cut.

[0340] Furthermore, a semiconductor device (cell) according to one aspect of the present invention and the oxide exemplified in the previous embodiment. A backup flip-flop using a transistor that includes a semiconductor in its channel formation region. The ROP circuit and SRAM cell can be applied to the semiconductor device 300. As a result, It is possible to reduce manufacturing costs. In particular, when used in flip-flop circuits and SRAM cells. All n-channel transistors are channeled using the oxide semiconductor exemplified in the previous embodiment. It may also be replaced with a transistor that includes the region of formation. The Si transistor is a p-channel type. By doing so, manufacturing costs can be kept low.

[0341] Furthermore, the semiconductor device (cell) according to one aspect of the present invention includes not only a CPU but also a GPU (Gr aphics Processing Unit), PLD (Programmable Logic Devices), DSPs (Digital Signal Processes) sor), MCU (Microcontroller Unit), RF-ID (Rad (IO Frequency Identification), also for custom LSIs, etc. It is applicable.

[0342] (Embodiment 9) This embodiment describes an example of the use of a semiconductor device (cell) according to one aspect of the present invention. ru.

[0343] Figure 24(A) shows a portion of the interior of a package using a lead frame type interposer. A perspective view is shown. The package shown in Figure 24(A) is a semiconductor device according to one aspect of the present invention. Chip 751 to which the cell has been applied is bonded by wire bonding to the interposer It is connected to terminal 752 on terminal 750. Terminal 752 is the chip of interposer 750. The 751 is positioned on the surface on which it is mounted. The tip 751 is then molded into the resin. It may be sealed by 753, but a portion of each terminal 752 is exposed when sealed. Make it so.

[0344] The configuration of an electronic device (mobile phone) module, in which the package is mounted on a circuit board, This is shown in Figure 24(B). The mobile phone module shown in Figure 24(B) is a printed circuit board 7 Package 762 and battery 764 are mounted on 61. Also, the display element is A printed circuit board 761 is mounted on the provided panel 760 by an FPC763. Yes, they are.

[0345] (Embodiment 10) Regarding an example of the configuration of a semiconductor device using a semiconductor device (cell) according to one aspect of the present invention, This will be explained using Figures 26 to 29.

[0346] Figure 26 shows an example of the configuration of a semiconductor device. The semiconductor device 600 shown in Figure 26 is a memory device. This is an example of a semiconductor device that can function as a memory cell. The semiconductor device 600 is a memory cell. Array 610, Raw Decoder 621, Word Line Driver Circuit 622, Bit Line Driver Circuit It has a path 630, an output circuit 640, and a control logic circuit 660.

[0347] The bit line driver circuit 630 includes a column decoder 631, a pre-charge circuit 632, and a serole system. It has a signal amplifier 633 and a writing circuit 634. The precharge circuit 632 is distributed Function to precharge wires BL and BLB, and the voltage of wires BL and BLB in the same row. It has a function to equalize the signal. The sense amplifier 633 reads the data from wiring BL and BLB. It has the function of amplifying the data signals D and DB. The amplified data signal is output to output circuit 640. The data signal RDATA is then output to the outside of the semiconductor device 600.

[0348] Furthermore, the semiconductor device 600 has a low power supply voltage VSS as an external power supply voltage, and a memory cell. High power supply voltage VDD for circuit section 601 other than the array, high power supply voltage for memory cell array 610 Pressure VIL is supplied.

[0349] Furthermore, the semiconductor device 600 has control signals CE, WE, RE, address signals ADDR, and The data signal WDATA is input from an external source. ADDR is input to the low decoder 621 and color decoder 621. The WDATA signal is input to the M decoder 631 and then to the writing circuit 634.

[0350] The control logic circuit 660 receives externally input control signals (CE, WE, RE) The system processes the data to generate control signals for the low decoder 621 and the column decoder 631. Signal CE is the chip enable signal, and control signal WE is the write enable signal. Yes, the control signal RE is the read-through enable signal. Control logic circuit 66 The signals that 0 processes are not limited to these; other control signals may be input as needed. Just do your best.

[0351] Furthermore, the aforementioned circuits and signals can be selected or omitted as needed.

[0352] A semiconductor device (cell) according to one aspect of the present invention includes a low decoder 621 and a word line driver. Circuit 622, bit line driver circuit 630, output circuit 640, control logic circuit It can be applied to 660. In particular, it can be configured using standard cells. It can be applied to all logic circuits. As a result, a compact semiconductor device 600 can be provided. Furthermore, it is possible to provide a semiconductor device 600 that can reduce power consumption. We can provide a semiconductor device 600 that can improve the degree of performance.

[0353] A semiconductor device (cell) according to one aspect of the present invention comprises a p-channel Si transistor and the above-mentioned The oxide semiconductor (preferably an oxide containing In, Ga, and Zn) described in the form of application is By using transistors included in the channel formation region and applying them to the semiconductor device 600, a miniaturized semiconductor device can be created. We can provide a semiconductor device 600. Furthermore, we can provide a semiconductor device 600 that can reduce power consumption. We can provide this. Furthermore, we can provide a semiconductor device 600 capable of improving operating speed. In particular, by limiting Si transistors to only p-channel type, manufacturing costs can be kept low. It is possible.

[0354] Furthermore, the memory cell array 610 contains an oxide semiconductor (preferably) as described in the previous embodiment. A transistor is used that includes an oxide containing In, Ga, and Zn in the channel formation region. This is also acceptable. Examples of such memory cells are explained below using Figures 27 to 29.

[0355] Figure 27 is a circuit diagram showing an example of the configuration of a memory cell. Memory cell 103 is a transistor It has a diode Mos3 and a capacitor C103. Node FN3 is the data storage unit. The terminals of capacitor C103 are connected. Transistor Mos3 is connected to node FN3. It functions as a switch connecting wiring BL, and the gate is connected to wiring WL. The signal OSG is input to WL as a signal for memory cell selection.

[0356] Figure 28 is a circuit diagram showing an example of a memory cell configuration. Memory cell 104 is a transistor It has a diode Mos4, a transistor M104, and a capacitor C104. Node FN 4 is the data holding section, and transistor Mos4 connects node FN4 and wiring BL. It functions as a switch, and the gate is connected to wiring WL. Signal OSG is input to wiring WL. It is powered. Capacitor C104 connects wiring WLC and node FN4. Wiring WLC This is because a constant voltage is supplied to the terminals of C104 during write and read operations. This is the wiring. Transistor M104 is a p-channel transistor, and the gate is Node FN4 has its source connected to wiring SL and its drain connected to wiring BL.

[0357] With a constant voltage applied to the wiring WLC and SL, turn on transistor Mos4. Data is written by connecting node FN4 to wiring BL. Data is read from: A constant voltage is applied to wiring BL, WLC, and SL. Depending on the voltage at node FN4, the transistor... The current flowing between the source and drain of transistor M104 fluctuates. --Due to the drain current, the wiring BL is charged or discharged, so the voltage of wiring BL By detecting this, the data value stored in the memory cell 104 can be read.

[0358] Note that transistor M104 can be an n-channel transistor. The voltage applied to the wiring (BL, SL, WLC) is determined according to the conductivity type of the M104 inverter. It is determined.

[0359] Figure 29 is a circuit diagram showing an example of the configuration of a memory cell. Memory cell 105 is a transistor Transistor Mos5, transistor M105, transistor M106, and capacitor C10 It has 5. Node FN5 is the data holding part and transistor Mos5 is node FN5 It functions as a switch connecting wiring BL, and the gate is connected to wiring WL. The signal OSG is input to WL. Wiring BL and one terminal of capacitor C105 are connected to the transistor. It is connected by transistors M105 and M106. The gate of transistor M105 is The gate of transistor M106 is connected to node FN5, and is connected to line RWL. Furthermore, the other terminal of capacitor C105 is connected to node FN5.

[0360] To write data, turn on transistor Mos5 and connect node FN4 to wiring B. This is done by connecting to L. Data is read by turning on transistor M105. This is done by the following: Depending on the voltage of node FN5, the source of transistor M106 The current flowing between the rains fluctuates. This is due to the source-drain current of transistor M106. Therefore, since the wiring BL is charged or discharged, the memory can detect the voltage of the wiring BL. The data value stored in cell 105 can be read.

[0361] Note that transistors M105 and M106 can be p-channel type transistors. The voltage applied to the wiring RWL is determined according to the conductivity type of transistors M105 and M106. Then, you just need to determine the voltage to apply to capacitor C105.

[0362] In the example memory cell configuration shown in Figures 27 to 29, transistor Mos3, Mo s4 and Mos5 are oxide semiconductors (preferably oxides containing In, Ga, and Zn). It is desirable to include it in the channel formation region. As a result, the source of the transistor in the off state Because the leakage current (off-current) flowing between the rains is extremely small, nodes FN3, FN4, The voltage fluctuation of FN5 is suppressed. In other words, the circuit including Mos3 and C103, Mos4 and Circuits containing C104, and circuits containing Mos3 and C103, each stored in a non-volatile memory. It operates as a memory circuit that can retain data for long periods of time without a power supply or power source. It is possible to do so.

[0363] A semiconductor device (cell) according to one aspect of the present invention and an oxide semiconductor as illustrated in the previous embodiment. A memory cell using a transistor that includes a channel formation region is suitable for a semiconductor device 600. By using this, non-volatile memory circuits or the ability to retain data for long periods without power supply can be achieved. A semiconductor device 600 having a memory circuit that can do this can be provided. Furthermore, it can be miniaturized and low A semiconductor that can operate at high speed with low power consumption, or that can reduce fluctuations in power supply voltage. We can provide device 600.

[0364] Furthermore, a semiconductor device (cell) according to one aspect of the present invention and the oxide exemplified in the previous embodiment. A memory cell using a transistor that includes a semiconductor in its channel formation region, and a semiconductor device 60 It can be applied to 0. Therefore, it is possible to reduce manufacturing costs. In particular All n-type transistors used in the memory cell are made of oxide semiconductor material as exemplified in the previous embodiment. The channel may be formed using a transistor that includes the channel formation region. By using only channel-type connectors, manufacturing costs can be kept low.

[0365] This embodiment can be appropriately combined with other embodiments shown herein. ru.

[0366] (Embodiment 11) Figure 25 shows an example of the configuration of a device using a semiconductor device (cell) according to one aspect of the present invention. I will explain using [this method].

[0367] The semiconductor device 800 shown in Figure 25 is an example of the configuration of an RFID tag. RFID tags have a memory circuit inside, which stores the necessary information, and are contactless. It uses means such as wireless communication to exchange information with the outside world. RFID tags are used for individual identification of items by reading their unique information. It can be used in systems and other applications.

[0368] The semiconductor device 800 shown in Figure 25 includes an antenna 804, a rectifier circuit 805, and a constant voltage circuit 80 6. Demodulation circuit 807, Modulation circuit 808, Logic circuit 809, Memory circuit 810, ROM 811 It has.

[0369] Antenna 804 communicates with antenna 802, which is connected to communication device 801, via radio signal 803. This is for transmitting and receiving signals. Furthermore, the rectifier circuit 805 generates the input potential. In general, the system generates an input AC signal by receiving a wireless signal with antenna 804. A capacitive element is provided after the rectifier circuit 805, which rectifies the power signal, for example, by half-wave voltage doubling rectification. The rectified signal is then smoothed. Alternatively, a limiter circuit may be provided on the output side. A limiter circuit is a circuit that controls the amplitude of the input AC signal. When the width is large and the internally generated voltage is large, inputting power above a certain level to the subsequent circuit will result in a power output that is too high. This is a circuit designed to control things in a specific way.

[0370] The constant voltage circuit 806 generates a stable power supply voltage from the input potential and supplies it to each circuit. The constant voltage circuit 806 may also have a reset signal generation circuit inside. The signal generator utilizes the stable rise of the power supply voltage to generate the reset signal for logic circuit 809. Generate a number.

[0371] The demodulation circuit 807 demodulates the input AC signal by detecting its envelope and generates a demodulated signal. The modulation circuit 808 also modulates according to the data output from the antenna 804. .

[0372] The logic circuit 809 decodes and processes the demodulated signal. The memory circuit 810 stores the input information. It holds data and has a low decoder, column decoder, memory area, etc. Also, ROM811 It stores unique identifiers (IDs) and outputs them according to the processing requirements.

[0373] The data transmission method involves a pair of coils positioned opposite each other and communicating through mutual induction. Electromagnetic coupling, electromagnetic induction (communication using an induced electromagnetic field), and radio waves (communication using radio waves). There are various methods. The semiconductor device 800 shown in this embodiment can be used in any of these methods. It is possible.

[0374] Furthermore, the circuits described above can be selected or omitted as needed.

[0375] A semiconductor device (cell) according to one aspect of the present invention includes a logic circuit 809, a memory circuit 810, and an RO It can be applied to M811, etc. In particular, it can be configured using standard cells. It can be applied to all logic circuits. As a result, it provides a compact semiconductor device 800. Yes, it is possible. Furthermore, it is possible to provide a semiconductor device 800 that can reduce power consumption. Also, We can provide a semiconductor device 800 that can improve the manufacturing speed.

[0376] A p-channel Si transistor and an oxide semiconductor (preferably) as described in the previous embodiment. This transistor uses an oxide containing In, Ga, and Zn in its channel formation region. By applying a semiconductor device (cell) according to one aspect of the present invention to a semiconductor device 800, miniaturization is achieved. We can provide a semiconductor device 800. Furthermore, we can provide a semiconductor device 800 that can reduce power consumption. It can provide 0. Furthermore, it can provide a semiconductor device 800 that can improve operating speed. In particular, by limiting Si transistors to only p-channel type, manufacturing costs can be kept low. It is possible.

[0377] Furthermore, the memory circuit 810 can be the same as the memory circuit described in the previous embodiment. Furthermore, the rectifying element included in the demodulation circuit 807 is provided with the acid described in the previous embodiment. The channel-forming region includes an oxide semiconductor (preferably an oxide containing In, Ga, and Zn). A transistor may be used. Because the transistor has a low off-current, it provides rectification. This makes it possible to keep the reverse current of the element small. As a result, excellent rectification efficiency can be achieved. It can be achieved.

[0378] This embodiment can be appropriately combined with other embodiments shown herein. ru.

[0379] (Embodiment 12) A semiconductor device (cell) according to one aspect of the present invention is used in display devices, personal computers, and other applications. Image playback device equipped with a recording medium (typically DVD: Digital Versatile) (A device having a display capable of playing recording media such as discs and displaying the images contained therein.) It can be used for the following purposes. In addition, by using a semiconductor device (cell) according to one aspect of the present invention... Electronic devices capable of doing so include mobile phones, portable game consoles, portable data terminals, and e-books. Cameras such as terminals, video cameras, and digital still cameras, and goggle-type displays ( Head-mounted display, navigation system, sound playback device (car audio) (e.g., digital audio players), photocopiers, fax machines, printers, printers Examples include multifunction printers, automated teller machines (ATMs), and vending machines. A specific example of the equipment is shown in Figure 30.

[0380] Figure 30(A) shows a portable game console, consisting of a casing 901, casing 902, display unit 903, and display Unit 904, microphone 905, speaker 906, operation key 907, stylus 90 It has 8, etc. Note that the portable game console shown in Figure 30(A) has two display units 903 and Although it has a display unit 904, the number of display units that a portable game console may have is not limited to this. do not have.

[0381] Figure 30(B) shows a portable data terminal, consisting of a first housing 911, a second housing 912, and a first display unit. It has 913, a second display unit 914, a connection unit 915, an operation key 916, etc. First display unit 9 13 is provided in the first housing 911, and the second display unit 914 is provided in the second housing 912. The first housing 911 and the second housing 912 are connected by a connecting part 915. The angle between the first housing 911 and the second housing 912 can be changed by the connecting part 915. Yes. The video in the first display unit 913 is connected to the first housing 911 and the second housing in the connection unit 915. The configuration may be such that it switches according to the angle between it and the body 912. Also, the first display unit 9 At least one of 13 and the second display unit 914 is provided with a function as a position input device. A display device may be used. The function as a position input device is provided by the display device. This can be added by installing a touch panel. Alternatively, it can function as a position input device. This can also be achieved by providing a photoelectric conversion element, also called a photosensor, in the pixel section of the display device. It can be added.

[0382] Figure 30(C) shows a notebook personal computer, comprising a casing 921, a display unit 922, It includes a keyboard 923, a pointing device 924, and the like.

[0383] Figure 30(D) shows an electric refrigerator-freezer, consisting of a casing 931, a refrigerator door 932, and a freezer door 9 It has 33, etc.

[0384] Figure 30(E) shows a video camera, consisting of a first housing 941, a second housing 942, and a display unit 943. It has an operation key 944, a lens 945, a connector 946, etc. The lenses 945 are located in the first housing 941, and the display unit 943 is located in the second housing 942. The first housing 941 and the second housing 942 are connected by a connecting part 946. The angle between the first housing 941 and the second housing 942 can be changed by the connecting part 946. The video in the display unit 943 is connected to the first housing 941 and the second housing in the connection unit 946. The configuration may also be configured to switch according to the angle between 942 and 942.

[0385] Figure 30(F) is a regular passenger car, consisting of a body 951, wheels 952, dashboard 953, It includes the Light 954, etc.

[0386] By using a semiconductor device (cell) according to one aspect of the present invention in these electronic devices, Miniaturization of equipment, increased operating speed, reduced power consumption, and / or fluctuations in power supply voltage. This makes it possible to achieve a reduction. In particular, by limiting Si transistors to only p-channel type... This allows for lower manufacturing costs. As a result, smaller electronic devices can be provided. Furthermore, by using a semiconductor device (cell) according to one aspect of the present invention, power consumption is reduced. We can provide electronic devices. We can also provide electronic devices capable of high-speed operation. Furthermore, we can provide more stable... We can provide electronic devices that operate in this manner.

[0387] This embodiment can be appropriately combined with other embodiments shown herein. ru.

[0388] Furthermore, the content described in one embodiment (even a part of it) may be subject to change in implementation. Other content (even partial content) described in form, and / or one or more other facts The content described in the form of implementation (even if only a part of it) may be applied, combined, or replaced. It is possible to perform tasks such as drawing.

[0389] Furthermore, the content described in each embodiment refers to the use of various figures in each embodiment. This refers to the content described or the content described using the text included in the specification.

[0390] Note that a diagram (even a part of it) described in one embodiment may be a part of that diagram. , other figures (even partial ones) described in the embodiment, and / or one or more In the diagram (or even just a part of it) described in another embodiment of the number, by combining them... This allows for the creation of even more diagrams. [Explanation of symbols]

[0391] 10 Electronic gun chamber 11 Memory circuit 12 Optical system 14 Sample Room 16 Optical system 18 Cameras 20 Observation Room 22 Film Room 24 electronic 28 Substance 32 Fluorescent board 100 Semiconductor Equipment 101 INV 102 INV 103 cell cells 104 memory cells 105 memory cells 200 Semiconductor Equipment 201 Memory circuit 202 Memory circuit 203 Memory circuit 204 circuits 209 transistors 210 transistors 212 transistors 213 transistors 215 transistors 217 transistors 218 transistors 219 Capacitive elements 220 capacity 240 Wiring 241 Wiring 242 Wiring 243 Wiring 244 Wiring 300 semiconductor equipment 301 CPU cores 302 Power Controller 303 Power Switch 304 Cache 305 Bus Interface 306 Debug Interface 307 Control device 308 PC 309 Pipeline Register 310 Pipeline Registers 311 ALU 312 Register File 321 Power Management Unit 322 Peripheral Circuits 323 Databus 400 semiconductor substrates 402 Insulator 404 Conductors 404a Conductor 404b Conductor 406 Semiconductors 406a Semiconductor 406b Semiconductor 406c semiconductor 408 Insulator 412 Insulator 413 Conductors 416a Conductor 416b Electric conductor 416c conductor 424a Conductor 424b Conductor 424c conductor 425a Conductor 425b Conductor 442 Insulator 452 Insulator region 454 Conductors 454a Conductor 454b Conductor 460 Insulator 462 Insulator 464 Insulator 465 Insulator 466 Insulator 467 Insulator 468 Insulator 470 Insulator 471 Conductors 472 Conductors 473 Conductors 474 area 476a area 476b area 476c area 480 Conductors 482 Conductors 484 Conductors 490 transistors 490a Transistor 490b transistor 491 Transistors 491a Transistor 491b Transistor 492 transistors 500 Semiconductor Equipment 501 Semiconductor Equipment 502 Semiconductor Equipment 503 Semiconductor Equipment 504 Semiconductor Equipment 510 Semiconductor Equipment 511 Semiconductor Equipment 600 Semiconductor Devices 601 Circuit section 610 memory cell array 621 Low Decoder 622 Word Line Driver Circuit 630-bit line driver circuit 631 Column Decoder 632 Precharge Circuit 633 SenseAmp 634 circuits 640 Output Circuit 660 Control Logic Circuits 750 Interposer 751 chips 752 terminals 753 Mold resin 760 panels 761 Printed Wiring Board 762 packages 763 FPC 764 Battery 800 Semiconductor Equipment 801 Communication device 802 Antenna 803 Wireless signal 804 Antenna 805 Rectifier circuit 806 Constant Voltage Circuit 807 Demodulation Circuit 808 Modulation Circuit 809 Logic Circuits 810 Memory circuit 811 ROM 901 cabinet 902 cabinet 903 Display section 904 Display section 905 Microphone 906 Speakers 907 Operation Keys 908 Stylus 911 cabinet 912 cabinet 913 Display section 914 Display section 915 Connection part 916 Operation Keys 921 cabinet 922 Display section 923 Keyboard 924 Pointing Devices 931 cabinet 932 Refrigerator door 933 Freezer door 941 cabinet 942 cabinets 943 Display section 944 Operation Keys 945 lens 946 Connection part 951 Body 952 wheels 953 Dashboard 954 Light

Claims

[Claim 1] It comprises a first transistor, a second transistor, a first conductor, and a second conductor. The second transistor and the first transistor are stacked, The first conductor is supplied with a first power supply voltage, and the second conductor is supplied with a second power supply voltage. The first conductor has a first region, and the second conductor has a second region. The first region and the second region overlap and extend parallel to each other, separated by one or more layers of insulators. One of the source electrode or drain electrode of the first transistor is electrically connected to the first conductor. One of the source electrode or drain electrode of the second transistor is electrically connected to the second conductor. The second transistor is of the n-channel type, and the channel formation region of the second transistor is formed of an oxide semiconductor. A semiconductor device characterized in that the first transistor is of the p-channel type, and the channel formation region of the first transistor is formed of silicon.

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