Isolated DC / DC converter and control method for isolated DC / DC converter

Abstract

In an isolated DC / DC converter that performs intermittent operation using a transformer and an inverter, the magnetic bias of the transformer is suppressed. [Solution] During inverter downtime, inverter 2 is set to a switching state that short-circuits the primary winding of transformer 3. The initial pulse width during inverter operation is fixed to 0.5 times the pulse period. For each inverter operation period, the positive pulse width required to match the excitation current of transformer 3 to that at the start of the inverter operation period is calculated and the cumulative value is calculated by accumulating these values ​​for each inverter operation period. Based on the cumulative value, the initial pulse polarity of the next inverter operation period is selected so that it suppresses the DC magnetic flux of the transformer core during the next inverter operation period.

Description

Technical Field

[0001] The present invention relates to a power transmission technology in an isolated DC / DC converter using a transformer and an inverter, and particularly to a control method for intermittent operation in which periods of voltage output and non-voltage output by the inverter are repeated.

Background Art

[0002] As a circuit for generating another isolated DC voltage source from a DC voltage source, an isolated DC / DC converter that utilizes the insulation of a transformer 3 as shown in FIG. 1 is known. As shown in FIG. 1, an inverter 2 is provided on the primary side of the transformer 3, and a rectifier 4 is provided on the secondary side of the transformer 3. The output voltage of the inverter 2 is applied to the primary side of the transformer 3, and its voltage waveform is in a pulse shape.

[0003] As control methods for the inverter 2 to vary the power transmitted from the primary side to the secondary side, there are a method of varying the pulse width (duty) of the pulse voltage that is the inverter output voltage, and a method of performing intermittent operation by providing a period during which the output of the inverter 2 is paused while the pulse width remains constant, and varying the pulse density.

[0004] In the method of controlling the pulse density among these two methods, the power that can be transmitted per pulse is determined. When the ratio of the inverter operation period to the inverter pause period is small, the pulse density is low, and on average, the power that can be transmitted from the primary side to the secondary side is small.

[0005] On the other hand, when the ratio of the inverter operation period is large, the pulse density is high, and on average, the power that can be transmitted from the primary side to the secondary side is large. The difference in transmitted power due to the difference in pulse density is shown in FIG. 2. Note that the inverter output voltage is either +V1, 0, or -V1 with respect to the voltage V1 of the first DC voltage source 1 in FIG. 1. The inverter output voltage is ±V1 during the inverter operation period and 0 during the inverter pause period.

[0006] In the configuration shown in Figure 1, if the average voltage applied to transformer 3 is not zero, the excitation current of transformer 3 will continue to increase or decrease, causing a magnetic bias phenomenon in which the iron core of transformer 3 becomes magnetically saturated. To suppress this, Patent Documents 1 to 4 describe the following countermeasures.

[0007] Patent Document 1: The inverter output voltage pattern is controlled so that the inverter enters a shutdown period when the excitation current becomes zero.

[0008] Patent documents 2 and 3 describe a mechanism for measuring the applied voltage waveform to a transformer and the magnetic flux of the transformer core, and controlling the pulse width of the inverter output voltage according to the measured values.

[0009] Patent Document 4: The polarity of the inverter output voltage is reversed at each operating period. [Prior art documents] [Patent Documents]

[0010] [Patent Document 1] Japanese Patent Publication No. 2017-130997 [Patent Document 2] Japanese Patent Publication No. 2016-144303 [Patent Document 3] Japanese Patent Application Publication No. 5-344715 [Patent Document 4] Japanese Patent Publication No. 2024-000954 [Overview of the project] [Problems that the invention aims to solve]

[0011] In the case of Patent Document 1, the timing when the excitation current becomes zero occurs only twice per pulse cycle, making it difficult to perform high-precision control to match the inverter operation period to a desired time.

[0012] In the case of Patent Documents 2 and 3, additional mechanisms for measuring voltage and magnetic flux are required, and furthermore, the control becomes complex because both pulse density and pulse width must be controlled simultaneously.

[0013] Figure 3 shows an example waveform when the inverter is controlled to enter the inverter shutdown period at the timing when the excitation current becomes zero, as in Patent Document 1. As mentioned above, there are timing constraints because the timing when the excitation current becomes zero occurs only twice per pulse cycle. If this constraint is ignored and the inverter shutdown period is entered at a timing when the excitation current is not zero, a DC current may be superimposed on the excitation current, causing magnetic bias, as shown in Figure 4.

[0014] Patent Document 4 describes a method in which the polarity of the inverter output voltage is reversed for each operating period. When the duration of the operating period is the same for two consecutive periods, the magnetic flux of the transformer can be canceled out for each of the two operating periods. However, when the duration of the operating period differs for each period, the magnetic flux of the transformer cannot be canceled out, and residual magnetic flux may accumulate, potentially causing a magnetic bias phenomenon in which the iron core of the transformer becomes magnetically saturated.

[0015] For the reasons described above, a challenge in isolated DC / DC converters that perform intermittent operation using a transformer and an inverter is to suppress the magnetic bias of the transformer. [Means for solving the problem]

[0016] The present invention was devised in view of the above-mentioned conventional problems, and one aspect thereof is an isolated DC / DC converter to which pulse density control by intermittent operation is applied, comprising: a first DC voltage source; an inverter whose DC side is connected to the first DC voltage source; a transformer whose primary winding is connected to the AC side of the inverter; a rectifier connected to the secondary winding of the transformer; and a second DC voltage source connected to the DC side of the rectifier, wherein the inverter is in a switching state in which the primary winding of the transformer is short-circuited during the inverter idle period, the initial pulse width during the inverter operation period is fixed to 0.5 times the pulse period, the positive pulse width necessary to match the excitation current of the transformer with that at the start of the inverter operation period is calculated and the integrated value is calculated by accumulating the values ​​for each inverter operation period, and the initial pulse polarity of the next inverter operation period is selected based on the integrated value so as to suppress the DC magnetic flux of the transformer core in the next inverter operation period.

[0017] Furthermore, in one embodiment, the inverter is characterized in that, if the cumulative value is less than -0.5 × pulse period, the first pulse polarity of the next inverter operation period is negative; if the cumulative value is -0.5 × pulse period or greater and 0.5 × pulse period or less, the first pulse polarity of the next inverter operation period is the inverse of the first pulse polarity of the current inverter operation period; and if the cumulative value is greater than 0.5 × pulse period, the first pulse polarity of the next inverter operation period is positive.

[0018] Also, as one aspect, the inverter includes first and second switching elements connected in series between one end and the other end of the first DC voltage source, and third and fourth switching elements connected in series between one end and the other end of the first DC voltage source. A connection point of the first and second switching elements and a connection point of the third and fourth switching elements are connected to the primary winding of the transformer, which is a single-phase full-bridge circuit. During the inverter off period, the first and third switching elements are turned on, the second and fourth switching elements are turned off, or the second and fourth switching elements are turned on, and the first and third switching elements are turned off.

Advantages of the Invention

[0019] According to the present invention, in an isolated DC / DC converter that performs intermittent operation using a transformer and an inverter, it is possible to suppress the bias magnetization of the transformer.

Brief Description of the Drawings

[0020] [Figure 1] Schematic diagram showing an example of an isolated DC / DC converter. [Figure 2] Diagram showing the transmission power with respect to the pulse density. [Figure 3] Diagram showing an example of waveforms when the inverter is stopped at the timing when the excitation current becomes zero. [Figure 4] Diagram showing an example of waveforms when the inverter is stopped at the timing when the excitation current is not zero. [Figure 5] Diagram showing the circuit configuration of the isolated DC / DC converter of Example 1. [Figure 6] Diagram showing an example of waveforms when state 3 is applied during the inverter off period and the inverter off period is short. [Figure 7] Diagram showing the waveforms of the inverter output voltage and the excitation current of Example 1. [Figure 8] Diagram showing the circuit configuration of the isolated DC / DC converter of Example 2. [Figure 9] Diagram showing an example of the inverter output voltage waveform when the inverter operation period is twice as long as the inverter pulse period. [Figure 10] Figure 9 shows an example of a secondary DC voltage waveform under the conditions shown in Figure 9. [Figure 11] This figure shows the inverter output voltage pattern and excitation current waveform in Example 3. [Modes for carrying out the invention]

[0021] Examples 1 to 3 of the isolated DC / DC converter according to the present invention will be described in detail below with reference to Figures 5 to 11.

[0022] [Example 1] Figure 5 shows the circuit configuration of an isolated DC / DC converter to which the control method of this embodiment 1 is applied. First, the circuit configuration of the isolated DC / DC converter in this embodiment 1 will be explained based on Figure 5.

[0023] A single-phase full-bridge inverter 2 is connected to the first DC voltage source 1. Specifically, U-phase first and second switching elements S1 and S2 are connected in series between one end and the other end of the first DC voltage source 1. In addition, V-phase third and fourth switching elements S3 and S4 are connected in series between one end and the other end of the first DC voltage source 1.

[0024] The connection point of the first and second switching elements S1 and S2 is connected to one end of the primary winding of the transformer 3. The connection point of the third and fourth switching elements S3 and S4 is connected to the other end of the primary winding of the transformer 3.

[0025] A single-phase rectifier 4 is connected to the secondary winding of transformer 3. Specifically, one end of the secondary winding of transformer 3 is connected to the connection point of the first and second diodes D1 and D2 of rectifier 4, and the other end of the secondary winding of transformer 3 is connected to the connection point of the third and fourth diodes D3 and D4 of rectifier 4.

[0026] The first and third diodes D1 and D3 are connected to one end of the second DC voltage source 5, and the second and fourth diodes D2 and D4 are connected to the other end of the second DC voltage source 5. A load 6 is connected in parallel to the second DC voltage source 5.

[0027] The inverter 2 connected to the first DC voltage source 1 is a single-phase full-bridge circuit, and the phase-to-phase voltage Vuv between the U-phase and V-phase of the single-phase full-bridge circuit is applied to the primary winding of the transformer 3. The secondary winding of the transformer 3 is converted to DC by connecting a rectifier 4. This makes it possible to generate a second DC voltage source 5 that is isolated from the first DC voltage source 1 at the input of the inverter 2.

[0028] The inverter 2 of the single-phase full-bridge circuit has four switching states (states 1 to 4) as shown in Table 1. Note that state 4 has two different switching states, but since the inverter output voltage is 0 in both switching states, they are treated as a single switching state without distinction.

[0029] [Table 1]

[0030] During inverter operation, the output voltage of inverter 2 is alternately switched between +V1 and -V1 by switching between state 1 and state 2. Generally, a dead time needs to be inserted during this switching, and this dead time corresponds to state 3. On the other hand, during inverter downtime, there are two methods: state 3 or state 4.

[0031] When State 3 is applied as the inverter shutdown period, inverter 2 operates as a rectifier during the State 3 period. When switching from the inverter operation period to State 3 as the inverter shutdown period while the excitation current is not zero, the excitation current flows to the first DC voltage source 1 or the second DC voltage source 5, discharging the energy charged in the excitation inductance of transformer 3 to the first DC voltage source 1 or the second DC voltage source 5, and the excitation current decays.

[0032] Here, if the inverter downtime is short and the next inverter operation period occurs before the energy charged in the excitation inductance of transformer 3 is completely discharged, a DC current is superimposed on the excitation current, causing a magnetic bias, as shown in Figure 6.

[0033] When state 4 is applied as the inverter shutdown period, if the system switches from the inverter operation period to the inverter shutdown period while the excitation current is not zero, the excitation inductance of transformer 3 is short-circuited by the switching element of inverter 2 on the primary side. As a result, ignoring circuit losses, the excitation current is maintained as it was during the inverter operation period, as shown in Figure 4.

[0034] In this embodiment 1, state 4 is applied during the inverter shutdown period to maintain the excitation current. The switching state is kept the same during the inverter operation period immediately before and after the inverter shutdown period, and the sum of the pulse widths during the inverter operation period immediately before and after the inverter shutdown period is made to match the normal pulse width during the inverter operation period.

[0035] This allows the change in excitation current to be suppressed to the same range as when the inverter is shut down at the timing when the excitation current becomes zero, as shown in Figure 3. This method eliminates the constraints on the inverter operating period as in Patent Document 1, and the need for additional voltage and magnetic flux measurement mechanisms as in Patent Documents 2 and 3. Furthermore, it eliminates the need to match the time widths of two consecutive operating periods, which is a constraint in Patent Document 4.

[0036] The method for deriving the operating pattern according to Example 1 is summarized below. An example waveform is shown in Figure 7.

[0037] Period 1: Inverter operation period During inverter operation, ignoring dead time and assuming a pulse period of Tpulse, the system alternates between State 1 and State 2 in Table 1 for a duration of 0.5 × Tpulse (0.5 periods). This results in operation where the inverter output voltage remains constant at a 50% duty cycle.

[0038] When switching from an inverter operation period to an inverter shutdown period, the output time deficit "Tshort" for 0.5 cycles is calculated and recorded using the following formula (1), based on the switching state (state 1 or state 2) during the previous inverter operation period and the output time (Tbefore) in that state.

[0039]

number

[0040] Period 2: Inverter shutdown period During the inverter shutdown period, the system is set to state 4 in Table 1 to maintain the excitation current from the previous inverter operation period. State 4 is when the first and third switching elements S1 and S3 are on and the second and fourth switching elements S2 and S4 are off, or when the second and fourth switching elements S2 and S4 are on and the first and third switching elements S1 and S3 are off.

[0041] Period 3: Next inverter operating period The initial switching state upon resuming inverter operation will be the same as the state during the inverter operation period immediately preceding the inverter shutdown period. Subsequently, the system will return to alternating between state 1 and state 2. At this time, the duration (pulse width) of the initial switching state upon resumption will be set to "Tshort," which is calculated and recorded during "Period 1: Inverter Operation Period."

[0042] This results in a state where the inverter idle period, which maintains the excitation current, is inserted into the excitation current waveform when the inverter output voltage is kept constant at a 50% duty cycle without intermittent operation. As a result, it is possible to keep the excitation current fluctuation range the same as when the inverter is operated continuously, without imposing constraints on the length of the inverter operation period, and thus suppress bias magnetization.

[0043] As described above, according to this embodiment 1, by applying a switching state (state 4 in Table 1) that can maintain the excitation current during the inverter shutdown period, it becomes unnecessary to end the inverter operation period at the timing when the excitation current becomes 0, as described in Patent Document 1, and bias can be suppressed during any inverter operation period.

[0044] Furthermore, by calculating and recording the pulse width required for the next inverter operation period when the inverter operation period ends, the pulse width for the next inverter operation period can be adjusted without the need for information on the applied voltage or magnetic flux of the transformer 3, eliminating the need for the additional voltage and magnetic flux measurement mechanisms described in Patent Documents 2 and 3. In addition, there is no need to match the time widths of two consecutive operation periods, which is a constraint in Patent Document 4.

[0045] (Regarding the conditions under which circuit losses can be ignored) If we let ESR1 be the equivalent series resistance component on the primary side due to the windings and circuit element wiring of transformer 3, L1 be the primary winding inductance, and I1 be the primary current, then during the period corresponding to the inverter shutdown period in state 4, the secondary side is effectively open, and the following equation (2) holds.

[0046]

number

[0047] Therefore, if the fluctuations in the secondary voltage can be ignored, and the current at t=0 immediately after the transition to the pause period is I0, then the following equation (3) holds.

[0048]

number

[0049] In other words, for the above-mentioned damping to be negligible, the rest period t must be sufficiently small compared to L1 / ESR1, which corresponds to the primary time constant. Conversely, even if L1 divided by the rest period t is sufficiently large compared to the primary equivalent series resistance component ESR1, the circuit loss can be ignored, meaning that damping can be ignored. It is sufficient that the primary equivalent series resistance component ESR1 is small enough to satisfy this condition. This condition is usually met in typical designs.

[0050] [Example 2] The difference between this embodiment 2 and embodiment 1 is that the transformer 3, inverter 2, and rectifier 4 have been changed from single-phase to three-phase. The circuit configuration in this embodiment 2 is shown in Figure 8.

[0051] Specifically, U-phase first and second switching elements S1 and S2 are connected in series between one end and the other end of the first DC voltage source 1. In addition, V-phase third and fourth switching elements S3 and S4 are connected in series between one end and the other end of the first DC voltage source 1. Furthermore, W-phase fifth and sixth switching elements S5 and S6 are connected in series between one end and the other end of the first DC voltage source 1.

[0052] The connection points of the first and second switching elements S1 and S2, the connection points of the third and fourth switching elements S3 and S4, and the connection points of the fifth and sixth switching elements S5 and S6 are connected to the transformer 3.

[0053] The secondary winding of transformer 3 is connected to the connection points of the first and second diodes D1 and D2, the connection points of the third and fourth diodes D3 and D4, and the connection points of the fifth and sixth diodes D5 and D6.

[0054] The first, third, and fifth diodes D1, D3, and D5 are connected to one end of the second DC voltage source 5, and the second, fourth, and sixth diodes D2, D4, and D6 are connected to the other end of the second DC voltage source 5. A load 6 is connected in parallel to the second DC voltage source 5.

[0055] The line voltages between the U-phase and V-phase, the line voltages between the V-phase and W-phase, and the line voltages between the W-phase and U-phase are denoted as Vuv, Vvw, and Vwu, respectively.

[0056] In the case of the three-phase inverter shown in Figure 8, there are eight switching states (states 1 to 8) as shown in Table 2. Note that state 8 has two possible switching states, but since the inverter output voltage is 0 in both switching states, they are treated as a single switching state without distinction. State 8 is when the first, third, and fifth switching elements S1, S3, and S5 are on and the second, fourth, and sixth switching elements S2, S4, and S6 are off, or when the second, fourth, and sixth switching elements S2, S4, and S6 are on and the first, third, and fifth switching elements S1, S3, and S5 are off.

[0057] During inverter operation, each phase of inverter 2 outputs pulses with a 50% duty cycle, with a timing difference of 1 / 3 of the pulse period between phases (phase difference of 120 degrees). As a result, states 1 through 6 in Table 2 are output sequentially for periods of 1 / 6 of the pulse period.

[0058] [Table 2]

[0059] Next, we will explain the operation during the inverter shutdown period.

[0060] In the single-phase full-bridge circuit of Example 1, in state 4 in Table 1, the excitation inductance of transformer 3 is short-circuited by the switching element of inverter 2 on the primary side.

[0061] Similarly, in the case of the three-phase inverter of this embodiment 2, in state 8 in Table 2, the excitation inductance of the transformer 3 is short-circuited by the switching element of the primary inverter 2.

[0062] Thus, similar to Example 1, by selecting state 8 in Table 2 during the inverter shutdown period, the excitation current during the inverter shutdown period can be maintained. The initial switching state upon resuming inverter operation is the same as the switching state during the inverter operation period immediately preceding the inverter shutdown period. Subsequently, states 1 through 6 are output sequentially for periods of 1 / 6 of the pulse period. In this case, the duration of the initial switching state upon resumption is set to "Tshort," which is calculated and recorded during the inverter operation period immediately preceding the inverter shutdown period.

[0063] Therefore, the excitation current waveform, when the inverter output voltage is operated with a constant duty cycle without intermittent operation, is modified by inserting an inverter downtime period during which the excitation current is maintained. As a result, without imposing constraints on the length of the inverter operation period, the fluctuation range of the excitation current can be kept the same as when the inverter is operated continuously, thereby suppressing magnetic bias.

[0064] As described above, this embodiment 2 provides the same effects and advantages as embodiment 1, even in the case of a three-phase inverter.

[0065] [Example 3] Examples 1 and 2 solve the problems described in Patent Documents 1 to 4. On the other hand, the rise characteristics of the secondary DC voltage change depending on the condition of the initial pulse width during the inverter operation period.

[0066] Figure 9 shows the inverter output voltage waveform when the inverter operating period is twice the length of the inverter pulse period, and Figure 10 shows examples of the secondary DC voltage waveform. The narrower the initial pulse width of the inverter operating period, the slower the rise time of the secondary voltage tends to be. As a result, when the purpose is to supply voltage to equipment such as ICs whose operation switches according to a voltage threshold, there is a problem in that it affects the operating characteristics of the equipment.

[0067] This third embodiment, like the first embodiment, assumes that the transformer 3, inverter 2, and rectifier 4 are all single-phase.

[0068] This embodiment 3 is similar to embodiment 1 in that the excitation current is maintained by using state 4 during the inverter shutdown period. The difference from embodiment 1 is that the initial pulse width during the inverter operation period is fixed to 0.5 times the pulse period, regardless of the conditions during the previous inverter operation period.

[0069] Since the initial pulse width during the inverter operation period is fixed at 0.5 times the pulse period, as shown in Table 3, the excitation current of transformer 3 at the end of the inverter operation period relative to the start of the inverter operation period has a positive offset if the initial pulse during the inverter operation period is positive, and a negative offset if the initial pulse during the inverter operation period is negative. Note that if the inverter operation period is an integer multiple of the pulse period, the excitation current of transformer 3 will be the same at the start and end of the inverter operation period.

[0070] [Table 3]

[0071] By utilizing the above characteristics and appropriately selecting the polarity of the first pulse during the inverter operation period, DC bias can be suppressed. The method for deriving the operation pattern according to this embodiment 3 is summarized below.

[0072] Period 1: Inverter operation period During inverter operation, ignoring dead time, the system operates by alternately repeating states 1 and 2 in Table 1 for a duration of 0.5 × Tpulse (0.5 periods), with a pulse period of Tpulse, thereby maintaining a constant 50% duty cycle for the inverter output voltage.

[0073] The first pulse width during the inverter operation period is set to 0.5×Tpulse, and the voltage polarity is the same as the polarity selected during the previous inverter operation period in the following process. Also, measure the length Tout of the inverter operation period, and obtain the positive-polarity pulse width required to match the excitation current at the start of the inverter operation period (remove the excitation current offset) based on Table 4 from the relationship between the length Tout of the inverter operation period and the pulse period Tpulse. If the required positive-polarity pulse width is negative, it means the negative-polarity pulse width. Also, N in Table 4 represents an integer of 0 or more.

[0074] N×Tpulse≦Tout<N×Tpulse + 0.5×Tpulse in Table 4 indicates the case where the inverter operation period ends with the same pulse polarity as the first pulse polarity during the inverter operation period. In this case, when the first pulse polarity during the inverter operation period is positive, -(Tout - N×Tpulse) is used as the required positive-polarity pulse width, and when the first pulse polarity during the inverter operation period is negative, (Tout - N×Tpulse) is used as the required positive-polarity pulse width.

[0075] N×Tpulse + 0.5×Tpulse≦Tout<(N + 1)×Tpulse in Table 4 indicates the case where the inverter operation period ends with a pulse polarity different from the first pulse polarity during the inverter operation period. In this case, when the first pulse polarity during the inverter operation period is positive, -((N + 1)×Tpulse - Tout) is used as the required positive-polarity pulse width, and when the first pulse polarity during the inverter operation period is negative, ((N + 1)×Tpulse - Tout) is used as the required positive-polarity pulse width.

[0076]

Table 4

[0077] By integrating the derived required positive-polarity pulse width for each inverter operation period, an integrated value Tsum is obtained.

[0078] Period 2: Inverter rest period During inverter shutdown periods, the system is set to state 4 in Table 1 to maintain the excitation current from the previous inverter operation period.

[0079] Period 3: Next inverter operating period Based on the range of the cumulative value Tsum, the initial pulse polarity of the next inverter operation period is selected so as to suppress the current flux in the core of transformer 3 during the next inverter operation period. Specifically, the initial switching state (pulse polarity) when the inverter operation is restored is determined according to Table 5.

[0080] [Table 5]

[0081] In other words, if the cumulative value Tsum is less than -0.5 × pulse period, the polarity of the first pulse in the next inverter operation period will be negative. If the cumulative value Tsum is greater than or equal to -0.5 × pulse period and less than or equal to 0.5 × pulse period, the polarity of the first pulse in the next inverter operation period will be the inverse of the polarity of the first pulse in the current inverter operation period. If the cumulative value Tsum is greater than 0.5 × pulse period, the polarity of the first pulse in the next inverter operation period will be positive.

[0082] Furthermore, the initial pulse width during the inverter operation period after recovery will be 0.5 × Tpulse, as in the previous instance.

[0083] Figure 11 shows the inverter output voltage pattern and excitation current waveform according to this embodiment 3. Initially, the sum of the required positive pulse widths is 0.

[0084] During the first inverter operation period, the first pulse polarity is positive, and since the inverter operation period ends with the same pulse polarity as the first pulse polarity (N×Tpulse≦Tout<N×Tpulse+0.5×Tpulse), the integrated value Tsum becomes -(Tout - N×Tpulse). Since the integrated value Tsum does not exceed -0.5×Tpulse, the first pulse polarity in the second inverter operation period is inverted from the first pulse polarity in the first inverter operation period to a negative polarity.

[0085] During the second inverter operation period, the first pulse polarity is negative, and since the inverter operation period ends with a pulse polarity different from the first pulse polarity (N×Tpulse+0.5×Tpulse≦Tout<(N + 1)×Tpulse), ((N + 1)×Tpulse)-Tout) is added to the integrated value Tsum. Since the integrated value Tsum does not exceed -0.5×Tpulse, the first pulse polarity in the third inverter operation period is inverted from the first pulse polarity in the second inverter operation period to a positive polarity.

[0086] During the third inverter operation period, the first pulse polarity is positive, and since the inverter operation period ends with the same pulse polarity as the first pulse polarity (N×Tpulse≦Tout<N×Tpulse+0.5×Tpulse), -(Tout - N×Tpulse) is added to the integrated value Tsum. Since the integrated value Tsum exceeds -0.5×Tpulse, the first pulse polarity in the fourth inverter operation period becomes negative.

[0087] During the fourth inverter operation period, the first pulse polarity is negative, and since the inverter operation period ends with a pulse polarity different from the first pulse polarity (N×Tpulse+0.5×Tpulse≦Tout<(N + 1)×Tpulse), ((N + 1)×Tpulse)-Tout) is added to the integrated value Tsum. Since the integrated value Tsum exceeds -0.5×Tpulse, the first pulse polarity in the fifth inverter operation period becomes negative.

[0088] In the fifth inverter operation period, the initial pulse polarity is negative, and the inverter operation period ends with the same pulse polarity as the initial pulse polarity (N×Tpulse≦Tout<N×Tpulse+0.5×Tpulse), so (Tout-N×Tpulse) is added to the integrated value Tsum.

[0089] As described above, according to the third embodiment, by applying the switching pattern (state 4 in Table 1) that can maintain the exciting current during the inverter off period, there is no need to end the inverter operation period at the timing when the exciting current becomes 0 as in Patent Document 1, and flux bias can be suppressed in any inverter operation period.

[0090] Also, according to the third embodiment, by deriving and integrating the positive pulse width required for exciting current offset removal, and selecting the initial pulse polarity in the next inverter operation period based on this integrated value, the exciting current in the next inverter operation period can be made in the direction of suppressing the offset, and the exciting current can be suppressed.

[0091] Also, according to the third embodiment, since the operation control can be performed without the flux information of the core of the transformer 3, the additional flux measurement mechanism in Patent Documents 2 and 3 becomes unnecessary.

[0092] Also, since the initial pulse width in the inverter operation period is fixed, the rising characteristics of the secondary-side DC voltage in the inverter operation period can be made to coincide for each inverter operation period, and in the power supply to an IC or the like having characteristics depending on the threshold value, the influence of the variation in the voltage rising characteristics can be suppressed.

[0093] In the third embodiment, the range of the exciting current that can be obtained is twice that in the first embodiment. As a result, the magnetic flux generated in the transformer 3 can also be twice that in the first embodiment. Therefore, the first embodiment is suitable when it is desired to miniaturize the transformer 3 because the range of the exciting current that can be obtained is narrow. On the other hand, the third embodiment is suitable for equipment in which it is desired to suppress the influence of the variation in the voltage rising characteristics.

[0094] Although the present invention has been described in detail only with respect to the specific examples described above, it will be obvious to those skilled in the art that a wide variety of modifications and alterations are possible within the scope of the technical concept of the present invention, and it is natural that such modifications and alterations fall within the scope of the claims.

[0095] In Example 3, the threshold value used for comparison with the integrated value was set to 0.5 times the pulse period, but other values ​​may also be used. However, if the threshold value is greater than 0.5 times the pulse period, the range of possible excitation currents will be greater than when the threshold value is 0.5 times the pulse period. [Explanation of Symbols]

[0096] 1…First DC voltage source, 2…Inverter, 3…Transformer, 4…Rectifier, 5…Second DC voltage source, 6…Load, S1~S6…First~Sixth switching elements, D1~D6…First~Sixth diodes

Claims

1. An isolated DC / DC converter that applies pulse density control by intermittent operation, First DC voltage source and An inverter whose DC side is connected to the first DC voltage source, A transformer with a primary winding connected to the AC side of the inverter, A rectifier connected to the secondary winding of the transformer, A second DC voltage source connected to the DC side of the rectifier, Equipped with, The aforementioned inverter is During the inverter shutdown period, the primary winding of the transformer is set to a short-circuit state. An isolated DC / DC converter characterized by fixing the initial pulse width during the inverter operation period to 0.5 times the pulse period, calculating the positive pulse width necessary to match the excitation current of the transformer to that at the start of the inverter operation period for each inverter operation period, accumulating these values ​​for each inverter operation period, and selecting the initial pulse polarity of the next inverter operation period based on the accumulated value so as to suppress the DC magnetic flux of the transformer core in the next inverter operation period.

2. The aforementioned inverter is If the cumulative value is less than -0.5 × pulse period, the polarity of the first pulse in the next inverter operation period will be set to negative. If the cumulative value is greater than or equal to -0.5 × pulse period and less than or equal to 0.5 × pulse period, the polarity of the first pulse in the next inverter operation period shall be the inverse of the polarity of the first pulse in the current inverter operation period. The isolated DC / DC converter according to claim 1, characterized in that if the cumulative value is greater than 0.5 × pulse period, the first pulse polarity of the next inverter operating period is set to positive polarity.

3. The aforementioned inverter is The circuit comprises first and second switching elements connected in series between one end and the other end of the first DC voltage source, and third and fourth switching elements connected in series between one end and the other end of the first DC voltage source, wherein the connection point of the first and second switching elements and the connection point of the third and fourth switching elements are connected to the primary winding of the transformer, forming a single-phase full-bridge circuit. The isolated DC / DC converter according to claim 1, characterized in that during the inverter shutdown period, the first and third switching elements are turned ON and the second and fourth switching elements are turned OFF, or the second and fourth switching elements are turned ON and the first and third switching elements are turned OFF.

4. First DC voltage source and An inverter whose DC side is connected to the first DC voltage source, A transformer with a primary winding connected to the AC side of the inverter, A rectifier connected to the secondary winding of the transformer, A second DC voltage source connected to the DC side of the rectifier, A control method for an isolated DC / DC converter that includes and applies pulse density control by intermittent operation, The aforementioned inverter is During the inverter shutdown period, the primary winding of the transformer is set to a short-circuit state. A control method for an isolated DC / DC converter, characterized by fixing the initial pulse width during the inverter operation period to 0.5 times the pulse period, calculating the positive pulse width necessary to match the excitation current of the transformer to that at the start of the inverter operation period for each inverter operation period, accumulating these values ​​for each inverter operation period, and selecting the initial pulse polarity of the next inverter operation period based on the accumulated value so that it suppresses the DC magnetic flux of the transformer core in the next inverter operation period.

Images