Semiconductor device and method for manufacturing the same

Abstract

Reduce manufacturing costs. [Solution] According to the embodiment, the semiconductor device includes a semiconductor chip 60, a first conductor 20 including a first portion 20a exposed from a first surface of the encapsulating resin 10 facing a first direction, a second portion 20b protruding from a second surface of the encapsulating resin facing a second direction intersecting the first direction, and a bent portion 20e connecting the first portion and the second portion, a second conductor 40 exposed from a third surface of the encapsulating resin facing the first surface and having a thickness in the first direction greater than that of the first conductor, a third conductor 70 provided between the semiconductor chip and the first conductor, a first bonding material 51 for bonding the semiconductor chip and the second conductor, a second bonding material 52 for bonding the semiconductor chip and the third conductor, and a third bonding material 53 for bonding the third conductor and the first conductor.

Description

Technical Field

[0001] Embodiments of the present invention relate to a semiconductor device and a method of manufacturing the same.

Background Art

[0002] As a switching element used in a power conversion device (for example, a DC-DC converter), a semiconductor device such as a power MOSFET surface-mounted on a printed circuit board is known.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Patent Document 2

Patent Document 3

Summary of the Invention

Problems to be Solved by the Invention

[0004] To provide a semiconductor device capable of suppressing an increase in manufacturing cost.

Means for Solving the Problems

[0005] The semiconductor device according to the embodiment includes a semiconductor chip; a first conductor including a first portion exposed from a first surface facing a first direction of a sealing resin, a second portion protruding from a second surface facing a second direction intersecting the first direction of the sealing resin, and a bent portion connecting the first portion and the second portion; a second conductor exposed from a third surface facing the first surface of the sealing resin and having a thickness in the first direction thicker than that of the first conductor; a third conductor provided between the semiconductor chip and the first conductor; a first bonding material bonding the semiconductor chip and the first conductor; a second bonding material bonding the semiconductor chip and the third conductor; and a third bonding material bonding the third conductor and the first conductor. [Brief explanation of the drawing]

[0006] [Figure 1] A plan view of the top surface of the package of a semiconductor device according to one embodiment. [Figure 2] A plan view of the bottom surface of the package of a semiconductor device according to one embodiment. [Figure 3] An exploded view showing an example of the internal configuration of a semiconductor device according to one embodiment. [Figure 4] A plan view showing an example of the planar layout of the semiconductor chip, gate electrode, and terminal portion 20b of the emitter electrode of a semiconductor device according to one embodiment. [Figure 5] Cross-sectional view of a semiconductor device cut along line AA in Figure 1. [Figure 6] Cross-sectional view of a semiconductor device cut along line BB in Figure 1. [Figure 7] A flowchart showing an example of the assembly process for a semiconductor device according to one embodiment. [Figure 8] A cross-sectional view showing an example of a wire-bonded semiconductor device according to one embodiment, set in a mold for molding. [Modes for carrying out the invention]

[0007] The embodiments will be described below with reference to the drawings. In the following description, components having the same function and configuration will be denoted by the same reference numerals. Furthermore, the embodiments shown below are illustrative examples of devices and methods for realizing the technical concept of this embodiment, and do not specify the materials, shapes, structures, and arrangements of the components as described below. The semiconductor device according to the embodiment will be described below.

[0008] 1. Configuration of semiconductor device 1.1 Planar configuration of semiconductor device First, an example of the planar configuration of the semiconductor device 1 will be described with reference to Figures 1 and 2. Figure 1 is a plan view of the top surface of the package of the semiconductor device 1. Figure 2 is a plan view of the bottom surface of the package of the semiconductor device 1.

[0009] In the following description, the direction perpendicular to the substrate of the semiconductor chip mounted on semiconductor device 1 will be referred to as the Z direction, the up / down direction, or the thickness direction. Furthermore, two mutually perpendicular directions within a plane perpendicular to the Z direction will be referred to as the X direction and the Y direction, respectively. The two faces of semiconductor device 1 facing the Z direction will be referred to as the top and bottom of the package. Additionally, the face of semiconductor device 1 facing either the X or Y direction will be referred to as the side of the package.

[0010] As shown in Figures 1 and 2, the semiconductor device 1 has, for example, a roughly rectangular parallelepiped shape. The semiconductor device 1 includes a sealing resin 10, an emitter electrode 20, two gate electrodes 30, and a collector electrode 40. Each of the emitter electrode 20, gate electrodes 30, and collector electrode 40 has a terminal portion exposed to the outside of the sealing resin 10 (package) as a terminal responsible for electrical connection to the outside.

[0011] The sealing resin 10 is an insulating member that physically and electrically protects the internal structure of the semiconductor device 1 from the outside. The sealing resin 10 forms the outer shape of the semiconductor device 1. For example, a thermosetting epoxy resin is used for the sealing resin 10. The sealing resin 10 may also contain fillers such as silicon oxide.

[0012] The emitter electrode 20 is connected to other circuits on the top or side of the package. In the example shown in Figures 1 and 2, the emitter electrode 20 includes an exposed portion 20a, terminal portions 20b and 20c, and a cut portion 20d. The exposed portion 20a, terminal portions 20b and 20c, and the cut portion 20d are connected to each other within the sealing resin 10.

[0013] The exposed portion 20a is exposed on the top surface of the package and functions as a connection terminal to the outside. The exposed portion 20a also functions as a heat sink. The exposed surface (top surface) of the exposed portion 20a is, for example, flat across its entire surface. The shape of the exposed portion 20a on the top surface of the package is arbitrary.

[0014] The terminal portion 20b protrudes from the central portion of the package side surface facing the Y direction (lower side of the paper surface) and extends in the Y direction (lower side of the paper surface).

[0015] The terminal portion 20c protrudes from the end portion of the package side surface facing the Y direction (lower side of the paper surface) and has, for example, an L-shaped configuration. Note that the configurations of the terminal portions 20b and 20c are arbitrary.

[0016] A lead frame is used for the emitter electrode 20. The lead frame contains, for example, copper. For example, in the assembling process of the semiconductor device 1, the lead frame is cut, and a plurality of semiconductor devices 1 are separated (individualized). At this time, the cut portion 20d of the lead frame forming the emitter electrode 20 may be exposed from the package side surface. In the examples shown in FIGS. 1 and 2, four cut portions 20d protrude from both side surfaces of the package facing the X direction. For example, in order to prevent the cut portion 20d from contacting a printed circuit board or another semiconductor device, a recess is provided in the side surface (package side surface) of the sealing resin 10 facing the X direction. The recess width W1 of the recess is larger than the protruding amount of the cut portion 20d of the lead frame.

[0017] The two gate electrodes 30 function as connection terminals to the outside. The same lead frame as that of the emitter electrode 20 is used for the gate electrodes 30. The gate electrodes 30 protrude from the vicinity of the central portion of the package side surface facing the Y direction (lower side of the paper surface) and extend in the Y direction (lower side of the paper surface). The two gate electrodes 30 are arranged separately on both sides in the X direction of the terminal portion 20b of the emitter electrode 20. In other words, one gate electrode 30, the terminal portion 20b of the emitter electrode 20, and the other gate electrode 30 are arranged side by side in the X direction. The configuration of the gate electrode 30 protruding from the package side surface is substantially the same as that of the terminal portion 20b of the emitter electrode 20.

[0018] The collector electrode 40 is a plate-shaped heat sink component. The collector electrode 40 functions as a heat dissipation plate. The exposed surface (lower surface) of the collector electrode 40 is exposed from the lower surface of the package. The exposed surface of the collector electrode 40 has flatness, for example, over the entire surface. The exposed surface of the collector electrode 40 functions as a connection terminal to the outside. The shape of the exposed surface of the collector electrode 40 on the lower surface of the package is arbitrary. The exposed surface of the emitter electrode 20 and the exposed surface of the collector electrode 40 face each other. The collector electrode 40 is composed of a conductive material and includes, for example, copper.

[0019] The terminal portions (portions exposed from the encapsulating resin 10) of the emitter electrode 20, the gate electrode 30, and the collector electrode 40 may be covered with tin (Sn), solder, or the like.

[0020] 1.2 Internal Structure of the Semiconductor Device Next, an example of the internal structure of the semiconductor device 1 will be described with reference to FIG. 3. FIG. 3 is an exploded view showing an example of the internal structure of the semiconductor device 1. In the example shown in FIG. 3, the internal structure of the semiconductor device 1 decomposed in the Z direction is schematically shown. Note that in the example shown in FIG. 3, the illustration of the encapsulating resin 10 is omitted.

[0021] As shown in FIG. 3, as an internal structure, the semiconductor device 1 further includes, in addition to the emitter electrode 20, two gate electrodes 30, and the collector electrode 40, two bonding materials 51, two semiconductor chips 60, two bonding materials 52, two spacers 70, and two bonding materials 53.

[0022] The emitter electrode 20 is a conductor. The emitter electrode 20 is formed by a lead frame. The thickness of the lead frame is uniform. The exposed portion 20a that is exposed from the top surface of the package and the terminal portions 20b and 20c and the cut portion 20d that protrude from the side surface of the package have different heights in the Z direction. Therefore, the lead frame has a bent portion for connecting the exposed portion 20a that is exposed from the top surface of the package and each of the terminal portions 20b and 20c and the cut portion 20d that protrude from the side surface of the package. For example, the exposed portion 20a is suspended upward from the lead frame substrate surface (terminal portions 20b and 20c and the cut portion 20d) by the bent portion, so the bent portion is also referred to as a suspension pin. As shown in Figure 1, a part of the suspension pin may be visible from the top surface of the package. Hereinafter, such a lead frame structure will also be referred to as a suspension pin structure.

[0023] The two gate electrodes 30 are conductors. The two gate electrodes 30 are formed from the same lead frame as the emitter electrode 20. Therefore, the thickness of the gate electrodes 30 is the same as the thickness of the emitter electrode 20. The two gate electrodes 30 are positioned alongside terminal portions 20b extending from the side of the emitter electrode 20. The two gate electrodes 30 are electrically connected to pads corresponding to the gates of the two semiconductor chips 60, respectively.

[0024] The collector electrode 40 is a conductor. The collector electrode 40 is, for example, a copper plate thicker than the lead frame (emitter electrode 20 and gate electrode 30). The lower surface of the collector electrode 40 is exposed from the lower surface of the package. Two bonding materials 51 are provided on the upper surface of the collector electrode 40, spaced apart from each other. The bonding material 51 is, for example, a plate-shaped solder. The bonding material 51 is provided between the collector electrode 40 and the corresponding semiconductor chip 60. The upper surface of the collector electrode 40 may have grooves surrounding the bonding material 51 to prevent solder flow.

[0025] The semiconductor chip 60 is, for example, a power semiconductor chip. Specifically, for example, the semiconductor chip 60 is an insulated gate bipolar transistor (IGBT) or a metal-oxide-silicon field-effect transistor (MOSFET) using silicon carbide (SiC). If the semiconductor chip 60 is a MOSFET using SiC, the emitter electrode 20 and the collector electrode 40 can be interpreted as the source electrode and the drain electrode, respectively.

[0026] The lower surface of the semiconductor chip 60 is used as an electrode corresponding to the collector. The lower surface of the semiconductor chip 60 is electrically connected to the collector electrode 40 via a bonding material 51. For example, the area of ​​the lower surface of the semiconductor chip 60 is less than or equal to the internal area of ​​the solder flow groove of the collector electrode 40. The upper surface of the semiconductor chip 60 is provided with a pad corresponding to the emitter and a pad corresponding to the gate.

[0027] A corresponding bonding material 52 is provided on the upper surface of the semiconductor chip 60 in the area including the pad corresponding to the emitter but excluding the pad corresponding to the gate. The bonding material 52 is, for example, a plate-shaped solder. On the upper surface of the semiconductor chip 60, the pad corresponding to the gate is electrically connected to the corresponding gate electrode 30 via a wire (not shown).

[0028] A corresponding spacer 70 is provided on the upper surface of the joining material 52. The spacer 70 is a conductive plate. The conductive material is, for example, copper.

[0029] A corresponding bonding material 53 is provided on the upper surface of the spacer 70. The bonding material 53 is, for example, a plate-shaped solder. The bonding material 53 is provided between the corresponding spacer 70 and the exposed portion 20a of the emitter electrode 20. The pad corresponding to the emitter of the semiconductor chip 60 is electrically connected to the emitter electrode 20 via the bonding material 52, the spacer 70, and the bonding material 53.

[0030] With the above configuration, inside the semiconductor device 1, the three terminals used for input and output of the semiconductor chip 60 are electrically connected to the emitter electrode 20, gate electrode 30, and collector electrode 40, respectively. The bonding materials 51-53 and spacer 70 are responsible for the electrical connection between the semiconductor chip 60 and the terminals (electrodes), and also have the function of dissipating the heat generated by the semiconductor chip 60 to the emitter electrode 20 and collector electrode 40, which function as heat sinks.

[0031] Although Figure 3 illustrates the case where two semiconductor chips 60 are provided within the semiconductor device 1, the case is not limited to this. The number of semiconductor chips 60 provided within the semiconductor device 1 may be one or three or more.

[0032] 1.3 Planar layout of semiconductor chips Next, an example of a planar layout of the semiconductor chip 60 will be described with reference to Figure 4. Figure 4 is a plan view showing an example of a planar layout of the semiconductor chip 60, the gate electrode 30, and the terminal portion 20b of the emitter electrode 20. Note that in the example shown in Figure 4, other components of the semiconductor device 1 (encapsulating resin 10, collector electrode 40, bonding materials 51-53, and spacer 70) and other parts of the emitter electrode 20 (20a, 20c, and 20d) are omitted.

[0033] As shown in Figure 4, the upper surface of the semiconductor chip 60 is provided with a pad 60e corresponding to the emitter and a pad 60g corresponding to the gate.

[0034] The pad 60e is arranged, for example, by being divided into multiple rectangular shapes. The pad 60e is electrically connected to the emitter electrode 20.

[0035] The pad 60g has, for example, a rectangular shape. The pad 60g is connected to the corresponding gate electrode 30 via the wire 80.

[0036] 1.4 Cross-sectional shape of semiconductor device Next, an example of the cross-sectional shape of the semiconductor device 1 will be described with reference to Figures 5 and 6. Figure 5 is a cross-sectional view of the semiconductor device 1 cut along line AA in Figure 1. Figure 6 is a cross-sectional view of the semiconductor device 1 cut along line BB in Figure 1.

[0037] As shown in Figure 5, the lower surface of the collector electrode 40 is exposed from the lower surface of the sealing resin 10. Two semiconductor chips 60 are arranged side by side in the X direction on the upper surface of the collector electrode 40 via two bonding materials 51.

[0038] Spacers 70 are provided on the upper surface of each semiconductor chip 60 via a bonding material 52. The upper surfaces of the two spacers 70 are each connected to the lower surface (depressed surface) of the emitter electrode 20 via a bonding material 53.

[0039] As shown in FIGS. 5 and 6, the thickness of the emitter electrode 20, that is, the thickness of the lead frame, is uniform. The emitter electrode 20 further includes a plurality of bent portions (hanging pins) 20e provided in the sealing resin 10. The bent portion 20e connects an exposed portion 20a exposed from the package upper surface of the emitter electrode 20, terminal portions 20b and 20c protruding from the package side surface, and a cut portion 20d, respectively. For example, let the height of the sealing resin 10 (package) in the Z direction be T1. Also, let the height of the bent portion 20e be T2. Let the thickness of the emitter electrode 20 (and the gate electrode 30) be T3. For example, the height T2 is in the range of T3 or more and T1 - T3. In other words, due to the bent portion 20e, the height of the terminal portions 20b and 20c and the cut portion 20d from the package lower surface is in the range of T3 or more and T1 - T3. That is, the protruding positions of the terminal portions 20b and 20c and the cut portion 20d from the package side surface are higher than the thickness of the emitter electrode 20 from the package lower surface and lower than the thickness of the emitter electrode 20 from the package upper surface. Thereby, contact between the terminal portions 20b and 20c and the exposed portion 20a or an external terminal connected to the collector electrode 40 can be prevented. Similarly, the height of the gate electrode 30 arranged beside the terminal portion 20b from the package lower surface is in the range of T3 or more and T1 - T3.

[0040] Let the thickness of the collector electrode 40 be T4. The thicknesses T3 and T4 are in the relationship of T3 < T4. Therefore, for example, when the emitter electrode 20 and the collector electrode 40 are made of the same material, the emitter electrode 20 has lower rigidity than the collector electrode 40.

[0041] Let the length (protrusion amount) of the cut portion 20d of the emitter electrode 20 protruding from the sealing resin 10 be L1. The recess width W1 of the recess on the package side surface described using FIG. 1 and the length L1 are in the relationship of W1 > L1.

[0042] 2. Method for manufacturing a semiconductor device Next, an example of a method for manufacturing the semiconductor device 1 will be described with reference to Figures 7 and 8. Figure 7 is a flowchart showing an example of the assembly process for the semiconductor device 1. Figure 8 is a cross-sectional view showing an example of a wire-bonded semiconductor device 1 set in a mold.

[0043] As shown in Figure 7, first, the components described using Figure 3 are mounted (S1). More specifically, for example, the bonding material 53, spacer 70, bonding material 52, semiconductor chip 60, bonding material 51, and collector electrode 40 are mounted in order onto the lead frame (including the emitter electrode 20 and gate electrode 30) before it is separated into individual components.

[0044] Next, reflow soldering is performed (S2). Reflow soldering melts the bonding materials 51-53, i.e., the solder, and bonds the lead frame (emitter electrode 20), spacer, semiconductor chip 60, and collector electrode 40. Steps S1 and S2 complete the formation of the solder assembly of the semiconductor device 1.

[0045] Next, wire bonding is performed (S3). That is, a wire-bonded product is formed. More specifically, the pads corresponding to the gates of the semiconductor chip 60 and the gate electrode 30 are connected by wires 80.

[0046] Next, with the lead frame facing downwards, the wire-bonded semiconductor device 1 is sandwiched in a molding die and the molding (sealing process) is performed (S4). The following describes the case where transfer molding is performed. More specifically, as shown in Figure 8, the wire-bonded semiconductor device 1 is set on the lower mold 100 with the lead frame facing downwards. At this time, the lead frame is pressed directly against the lower mold 100. Since the lead frame is thinner and less rigid than the collector electrode 40, a gap is less likely to form between the lead frame and the lower mold 100 than when the collector electrode 40 is facing downwards. For example, a protective film 130 is provided on the inner surface of the upper mold 110. The collector electrode 40 is in contact with the protective film 130. In this state, the sealing resin 10 is poured in and partially cured.

[0047] Next, a mold cure is performed (S5). For example, a thermosetting resin is used for the encapsulating resin 10. The encapsulating resin 10 is fully cured by the cure. Steps S4 and S5 complete the molding process. Next, cutting is performed (S6) to remove the exposed surface of the collector electrode 40 (bottom surface of the package). This makes the top and bottom surfaces of the package parallel.

[0048] Next, honing is performed (S7) to deburr the sealing resin 10. In this embodiment, molding is performed with the lead frame pressed against the lower mold 100. Therefore, burrs on the contact surface of the lead frame with the lower mold 100, i.e., the upper surface of the package, are reduced. Furthermore, the protective film 130 suppresses the generation of burrs on the lower surface of the package (the exposed surface of the collector electrode 40).

[0049] Next, the exposed surfaces of the lead frame (emitter electrode 20 and gate electrode 30) and collector electrode 40 that are exposed from the sealing resin 10 are plated. The plating is electroplating. The plating electrodes are brought into contact with both the collector electrode 40 and the lead frame.

[0050] Next, separation (fragmentation) is performed to cut out the semiconductor device 1 from the lead frame. At this time, the two gate electrodes 30 are also separated.

[0051] With the configuration according to this embodiment, a semiconductor device 1 can be provided that can reduce manufacturing costs.

[0052] For example, in semiconductor device 1, if the height position in the Z direction of the exposed surface of the emitter electrode (top surface of the package) and the height position in the Z direction of the terminal portion protruding from the side of the package are different, a lead frame with irregularly shaped strips, where the thickness of the exposed portion and the thickness of the terminal portion differ, is used. Lead frames with irregularly shaped strips have higher component costs compared to lead frames with uniform thickness. Also, when a lead frame is made thicker by applying an irregularly shaped strip lead frame, the rigidity of the lead frame improves. Therefore, if there is tilting or warping of the lead frame during molding, a gap is likely to occur between the lead frame and the lower mold for molding. As a result, sealing resin adheres to the exposed surface, which needs to be removed. This makes deburring more complex and increases manufacturing costs.

[0053] In contrast, with the configuration according to this embodiment, the exposed portion 20a of the emitter electrode 20, the terminal portions 20b and 20c, and the cut portion 20d are connected via the bent portion 20e. This allows the height positions in the Z direction of the package to be changed for the exposed portion 20a of the emitter electrode 20, the terminal portions 20b and 20c, and the cut portion 20d. In other words, the suspension pins allow the exposed portion 20a of the emitter electrode 20 to be held at a different height from the terminal portions 20b and 20c and the cut portion 20d. Therefore, a lead frame with a uniform thickness can be used for the emitter electrode 20. As a result, the cost of the lead frame can be reduced compared to the case where a lead frame with irregularly shaped strips is used.

[0054] Furthermore, with the configuration according to this embodiment, rigidity can be kept low by using a thin lead frame with uniform thickness. During molding, by pressing the lead frame downwards against the lower mold 100, gaps between the lower mold 100 and the lead frame can be minimized. This reduces burrs on the contact surface of the lead frame with the lower mold 100, i.e., on the upper surface of the package. Consequently, resin burrs can be removed by honing, thus reducing manufacturing costs in the assembly process.

[0055] 3. Others While several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These novel embodiments can be carried out in a variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims of the invention and its equivalents. [Explanation of Symbols]

[0056] 1… Semiconductor equipment 10…Sealing resin 20…Emitter electrode 20a...Exposed part 20b, 20c...terminal part 20d…cutting part 20e...Folded part 30… Gate stop 40...Collector electrode 51~53…Joining material 60… Semiconductor chips 60e, 60g... pads 70... Spacer 80... Wire 100... Lower mold 110... Upper mold 130… Protective film

Claims

1. Semiconductor chips and A first conductor comprising: a first portion exposed from a first surface facing a first direction of the sealing resin; a second portion protruding from a second surface facing a second direction intersecting the first direction of the sealing resin; and a bent portion connecting the first portion and the second portion; A second conductor is exposed from a third surface facing the first surface of the sealing resin, and its thickness in the first direction is greater than that of the first conductor. A third conductor is provided between the semiconductor chip and the first conductor, A first bonding material that bonds the semiconductor chip and the second conductor, A second bonding material for bonding the semiconductor chip and the third conductor, A third joining material that joins the third conductor and the first conductor, Equipped with, Semiconductor equipment.

2. The first conductor is composed of a lead frame and has a uniform thickness. The semiconductor device according to claim 1.

3. The fourth conductor further comprises a fourth conductor that protrudes from the second surface of the sealing resin, is arranged in a third direction intersecting the first and second directions with the second portion of the first conductor, and is electrically connected to the semiconductor chip. The semiconductor device according to claim 1.

4. The emitter of the semiconductor chip is electrically connected to the first conductor. The collector of the semiconductor chip is electrically connected to the second conductor. The gate of the semiconductor chip is electrically connected to the fourth conductor. The semiconductor device according to claim 3.

5. The first conductor further includes a third portion that protrudes from a recessed portion of the fourth surface facing a third direction intersecting the first and second directions of the sealing resin, The width of the recess is greater than the amount of protrusion of the third portion. The semiconductor device according to claim 1.

6. The position of the second portion protruding from the second surface is such that, in the first direction, it is higher than the thickness of the first conductor from the third surface and lower than the thickness of the first conductor from the first surface. The semiconductor device according to claim 1.

7. A process for forming a solder assembly comprising: a semiconductor chip; a first conductor; a second conductor thicker than the first conductor; a third conductor provided between the semiconductor chip and the first conductor; a first bonding material for bonding the semiconductor chip and the second conductor; a second bonding material for bonding the semiconductor chip and the third conductor; and a third bonding material for bonding the third conductor and the first conductor. The process of forming wire-bonded products and The process of setting the wire-bonded product between the lower mold and the upper mold with the first conductor facing downwards and molding it, The process of cutting the aforementioned conductor, A method for manufacturing a semiconductor device, including the method described above.

8. The first conductor includes a first portion exposed from a first surface of the sealing resin facing a first direction, a second portion protruding from a second surface of the sealing resin facing a second direction intersecting the first direction, and a bent portion connecting the first portion and the second portion. The method for manufacturing a semiconductor device according to claim 7.

9. The first conductor is composed of a lead frame and has a uniform thickness. The method for manufacturing a semiconductor device according to claim 7.

10. The process further comprises connecting the semiconductor chip and the fourth conductor with a wire. The method for manufacturing a semiconductor device according to claim 7.

11. In the molding process, a film is provided between the upper mold and the wire-bonded product. The method for manufacturing a semiconductor device according to claim 7.

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