Semiconductor equipment
The inclined lead frame design addresses resin flow issues in semiconductor devices, enhancing durability and reliability by ensuring complete resin coverage and preventing chipping.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-09-19
- Publication Date
- 2026-04-01
AI Technical Summary
Existing semiconductor devices face issues with chipping due to inadequate resin flow during manufacturing, leading to defects in the package and affecting durability and reliability.
Incorporating an inclined portion in the lead frame design to facilitate resin flow, ensuring complete coverage of the package and preventing chipping by allowing the resin to fill all areas during the molding process.
The inclined lead frame design enhances resin flow, preventing package chipping and improving the appearance, durability, and reliability of the semiconductor device.
Smart Images

Figure 2026056441000001_ABST
Abstract
Description
Technical Field
[0001] Embodiments of the present invention relate to semiconductor devices.
Background Art
[0002] Examples of semiconductor devices include devices having semiconductor chips, packages, and connectors. Semiconductor chips include semiconductor elements such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors). Packages cover semiconductor chips and connectors. Connectors are connected to electrodes of semiconductor chips via conductors and are partially exposed from the packages.
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] To provide a semiconductor device having a shape with suppressed chipping.
Means for Solving the Problems
[0005] A semiconductor device according to one embodiment includes a first lead frame, a semiconductor chip, a first conductor, a second lead frame, and a resin. The semiconductor chip includes a first electrode and a second electrode, which are provided in a first direction from the first lead frame and electrically connected to the first lead frame. The first conductor is electrically connected to the second electrode. The second lead frame is aligned with the first lead frame in a second direction from the first lead frame and includes a first terminal and a plate portion connected to the first terminal. The plate portion is electrically connected to the first conductor. The plate portion has a slope extending from a first surface on the first direction side to a side surface on the second direction side. The resin covers a part of the first lead frame, the semiconductor chip, the first conductor, the plate portion of the second lead frame, and a part of the first terminal of the second lead frame. [Brief explanation of the drawing]
[0006] [Figure 1] Figure 1 shows the external appearance of the semiconductor device structure according to the first embodiment. [Figure 2] Figure 2 shows the internal structure of the semiconductor device of the first embodiment along the xy plane. [Figure 3] Figure 3 shows the internal structure of the semiconductor device of the first embodiment along the xy plane. [Figure 4] Figure 4 shows the cross-sectional structure of the semiconductor device of the first embodiment. [Figure 5] Figure 5 shows the cross-sectional structure of the semiconductor device according to the first embodiment. [Figure 6] Figure 6 shows the cross-sectional structure of the semiconductor device according to the first embodiment. [Figure 7] Figure 7 shows a partial structure of the semiconductor device of the first embodiment along the xy plane. [Figure 8] Figure 8 shows the cross-sectional structure of the semiconductor device of the first embodiment. [Figure 9] Figure 9 shows one state during the manufacturing of the semiconductor device of the first embodiment. [Figure 10]Figure 10 shows the state of a part of the semiconductor device of the first embodiment during manufacturing. [Figure 11] Figure 11 shows the internal structure of a modified semiconductor device of the first embodiment along the xy plane. [Figure 12] Figure 12 shows the cross-sectional structure of a modified semiconductor device of the first embodiment. [Figure 13] Figure 13 shows the cross-sectional structure of a modified semiconductor device of the first embodiment. [Figure 14] Figure 14 shows the cross-sectional structure of a modified semiconductor device of the first embodiment. [Modes for carrying out the invention]
[0007] Embodiments are described below with reference to the drawings. Multiple components having substantially the same function and configuration in one embodiment or a different embodiment may be denoted by additional numbers or letters at the end of their reference numerals to distinguish them from one another.
[0008] The drawings are schematic, and the relationship between thickness and planar dimensions, the ratio of the thickness of each layer, etc., may differ from reality. Furthermore, there may be differences in the dimensional relationships, arrangement, and / or ratios between drawings.
[0009] The following embodiments are described using a three-dimensional Cartesian coordinate system. The direction of the x-axis is referred to as the X direction. The direction opposite to the X direction is referred to as the -X direction. The direction of the y-axis is referred to as the Y direction. The direction opposite to the Y direction is referred to as the -Y direction. The direction of the z-axis is referred to as the Z direction, with the upward direction pointing to the Z direction. The direction opposite to the Z direction is referred to as the -Z direction.
[0010] 1. First Embodiment Figure 1 shows the external appearance of the semiconductor device structure according to the first embodiment. The semiconductor device 1 is configured as a semiconductor module that constitutes part of another device.
[0011] As shown in FIG. 1, the semiconductor device 1 includes a semiconductor chip 11, a package 12, and lead frames (or external connection terminals) 13, 14, and 15.
[0012] The semiconductor chip 11 is a chip including semiconductor elements. Examples of semiconductor elements include an n-type MOSFET and an IGBT (Insulated Gate Bipolar Transistor). The following description is based on an example of a MOSFET.
[0013] The package 12 is a component that covers the internal structure of the semiconductor device 1 and covers the semiconductor chip 11 and a part of the lead frame 13. Examples of the material of the package 12 include an epoxy resin. Examples of the shape of the package 12 include a hexahedron, and examples of the hexahedron include a frustum of a pyramid and a rectangular parallelepiped. The following description is based on an example in which the package 12 has the shape of a frustum of a pyramid. That is, the package 12 has an upper surface, a lower surface, and four side surfaces. The upper surface and the lower surface extend along the xy plane and face each other. The upper surface is located in the Z direction from the lower surface. The contour along the xy plane of the lower surface follows the contour along the xy plane of the upper surface. In one example, the area along the xy plane of the lower surface is larger than the area along the xy plane of the upper surface. Each of the four side surfaces is connected to one side of the upper surface and one side of the lower surface and has an inclination with respect to the z-axis. The side surfaces include a side surface LS and a side surface TS. The side surfaces LS and TS extend along the xz plane. The side surface LS and the side surface TS face each other. The side surface TS is located in the Y direction from the side surface LS.
[0014] The lead frame 13 is a conductor that electrically connects the semiconductor device 1 to a conductor outside the semiconductor device 1. The lead frame 13 is electrically connected to the semiconductor chip 11. The lead frame 13 is partially exposed from the package 12 on the side surface LS. The lead frame 13 includes a plurality of first portions (external terminals) 13A exposed from the package 12 on the side surface LS. The first portions 13A are connected to each other in the package 12. The first portions 13A are arranged at intervals in the X direction.
[0015] The lead frame 14 is a conductor that electrically connects the semiconductor device 1 to a conductor outside the semiconductor device 1. The lead frame 14 is electrically connected to the semiconductor chip 11. The lead frame 14 is partially exposed from the package 12 on the side surface TS. The lead frame 14 includes a plurality of first portions (external terminals) 14A that are exposed from the package 12 on the side surface TS. The first portions 14A are connected to each other in the package 12. The first portions 14A are arranged at intervals in the X direction.
[0016] The lead frame 15 is partially exposed from the package 12 on the side surface TS. The lead frame 15 is arranged in parallel with the first portions 14A.
[0017] FIG. 2 shows the internal structure of the semiconductor device according to the first embodiment along the xy plane. FIG. 2 shows the structure when the semiconductor device 1 is viewed from the Z direction.
[0018] As shown in FIG. 2, the lead frame 13 extends along the xy plane. The lead frame 13 further includes a second portion (first plate portion) 13B. In one example, the second portion 13B has a quadrilateral shape. The second portion 13B may have protrusions extending in the X direction and the -X direction. The second portion 13B is connected to the side of the first portion 13A in the Y direction on the side in the -Y direction. The first portion 13A extends in the Y direction.
[0019] The lead frame 14 extends along the xy plane. The lead frame 14 is located in the Y direction relative to the lead frame 13. The lead frame 14 is arranged in parallel with the lead frame 13 with a gap therebetween. The lead frame 14 further includes a second portion 14B. In one example, the second portion 14B has a quadrilateral shape. The second portion 14B is connected to the side of the first portion 14A in the -Y direction on the side in the Y direction. The first portion 14A extends in the Y direction.
[0020] The lead frame 15 extends along the xy-plane. The lead frame 15 is located in the Y direction relative to the lead frame 13. The lead frame 15 is located in the -X direction relative to the lead frame 14. The lead frame 15 is aligned with the lead frames 13 and 14 with a gap between them. The lead frame 15 extends in the Y direction.
[0021] Figure 3 shows the internal structure of the semiconductor device of the first embodiment along the xy plane. Figure 3 shows the structure of the semiconductor device 1 as viewed from the Z direction. Figure 3 shows the region in the Z direction from the region shown in Figure 2. As shown in Figure 3, the semiconductor device 1 further includes conductors 17 and 18. Conductors 17 and 18 may also be referred to as connectors 17 and 18, respectively.
[0022] The semiconductor chip 11 extends along the xy-plane. In one example, the semiconductor chip 11 has a quadrilateral shape. The semiconductor chip 11 overlaps with the second portion 13B of the lead frame 13. In one example, the contour of the semiconductor chip 11 is located inside the contour of the second portion 13B of the lead frame 13. The semiconductor chip 11 is electrically connected to the second portion 13B of the lead frame 13 at the drain electrode 113, which will be described later.
[0023] The semiconductor chip 11 has a gate electrode 111 and a source electrode 112. The gate electrode 111 is exposed on the top surface of the semiconductor chip 11 (i.e., the side in the +Z direction). The gate electrode 111 extends along the xy plane. In one example, the gate electrode 111 faces one side of the semiconductor chip 11. In one example, the gate electrode 111 faces the top side of the semiconductor chip 11 (i.e., the side in the Y direction) and also faces the left side of the semiconductor chip 11 (i.e., the side in the -X direction). The gate electrode 111 is connected to the gate of a MOSFET or IGBT in the semiconductor chip 11.
[0024] The source electrode 112 is exposed on the upper surface of the semiconductor chip 11. The source electrode 112 extends along the xy plane. The source electrode 112 extends over the upper surface of the semiconductor chip 11, excluding the region where the gate electrode 111 is exposed. The source electrode 112 is spaced apart from the gate electrode 111. The source electrode 112 may have any shape, as long as it extends over the region outside the gate electrode 111 in its vicinity. In one example, the source electrode 112 generally has a quadrilateral shape following the shape of the semiconductor chip 11, and has a quadrilateral notch around the gate electrode 111. The notch may have a shape in which multiple quadrilaterals are connected. The source electrode 112 is connected to one end (or source) of the MOSFET. If the semiconductor chip 11 includes an IGBT, the source electrode 112 is the emitter electrode and is connected to the emitter of the IGBT.
[0025] The conductor 17 overlaps with the gate electrode 111 and the lead frame 15.
[0026] The conductor 18 overlaps with the source electrode 112 and the second portion 14B of the lead frame 14.
[0027] Figure 4 shows the cross-sectional structure of the semiconductor device of the first embodiment. Figure 4 shows a cross-section along the line IV-IV in Figures 2 and 3. As shown in Figure 4, the semiconductor device 1 further includes bonding layers 21, 22, and 23.
[0028] The semiconductor chip 11 is located in the Z direction from the second portion 13B of the lead frame 13. The semiconductor chip 11 includes a drain electrode 113 on the -Z side surface (bottom surface). The drain electrode 113 extends along the xy plane. The semiconductor chip 11 includes a source electrode 112 on the Z side surface (top surface).
[0029] The bonding layer 21 is conductive and contains a conductor. The bonding layer 21 extends along the xy plane. In one example, the bonding layer 21 follows or has the same shape as the shape of the drain electrode 113 along the xy plane. The bonding layer 21 is in contact with the second portion 13B and the drain electrode 113. The bonding layer 21 fixes and electrically connects the second portion 13B and the drain electrode 113. In one example, the bonding layer 21 contains solder.
[0030] The bonding layer 22 is conductive and contains a conductor. The bonding layer 22 extends along the xy plane. In one example, the bonding layer 22 follows or has the same shape as the source electrode 112 along the xy plane. The bonding layer 22 is in contact with the source electrode 112 and the conductor 18. The bonding layer 22 fixes and electrically connects the source electrode 112 and the conductor 18. In one example, the bonding layer 22 contains solder.
[0031] The conductor 18 has a first portion (first plate portion) 18A and a second portion 18B (second plate portion). The first portion 18A and the second portion 18B are connected. The first portion 18A is located in the Z direction from the semiconductor chip 11. The conductor 18 is in contact with the junction layer 22 in the first portion 18A. The second portion 18B extends in the Y direction and extends in the -Z direction from the height of the first portion 18A. The end of the second portion 18B opposite to the first portion 18A is located in the Z direction from the lead frame 14.
[0032] The bonding layer 23 is conductive and contains a conductor. The bonding layer 23 extends along the xy plane. In one example, the bonding layer 23 follows or has the same shape as the shape of the second portion 14B of the lead frame 14 along the xy plane. The bonding layer 23 is in contact with the second portion 18B and the second portion 14B of the lead frame 14. The bonding layer 23 fixes and electrically connects the second portion 18B and the second portion 14B. In one example, the bonding layer 23 contains solder.
[0033] The package 12 covers the semiconductor chip 11, the bonding layers 21, 22, and 23, and the conductor 18. The package 12 covers a portion of the upper surface of the lead frame 13. The package 12 covers a portion of the upper surface of the lead frame 14.
[0034] As shown above with reference to Figure 4, the first portion (terminal) 14A of the lead frame 14 is connected to each other by the second portion (plate) 14B. Therefore, the area of the lead frame 14 is large, and consequently, the area in contact between the lead frame 14 and the conductor 18 via the bonding layer 23 is large. That is, although it is conceivable that multiple independent first portions 14A are electrically connected to the source electrode 112 by multiple independent conductors, in this case the lead frame 14 and the conductor 18 can contact over a larger area than in that case. This makes it possible for a large current to flow through the source.
[0035] Figure 5 shows the cross-sectional structure of the semiconductor device of the first embodiment. Figure 5 shows a cross-section along the VV line in Figures 2 and 3. As shown in Figure 5, the semiconductor device 1 further includes bonding layers 25 and 26.
[0036] The semiconductor chip 11 includes a gate electrode 111 on its upper surface.
[0037] The bonding layer 25 is conductive and contains a conductor. The bonding layer 25 is in contact with the gate electrode 111 and the conductor 17 (plate portion, wire). The bonding layer 25 fixes the gate electrode 111 and the conductor 17 and electrically connects them. In one example, the bonding layer 25 contains solder.
[0038] The conductor 17 extends in the -Z direction from a height in the Z direction relative to the semiconductor chip 11. The end of the conductor 17 is located in the Z direction relative to the lead frame 15.
[0039] The bonding layer 26 is conductive and contains a conductor. The bonding layer 26 is in contact with the conductor 17 and the lead frame 15. The bonding layer 26 fixes the conductor 17 and the lead frame 15 and electrically connects them. In one example, the bonding layer 26 contains solder.
[0040] Figure 6 shows the cross-sectional structure of the semiconductor device according to the first embodiment. Figure 6 shows a cross-section along the line VI-VI in Figures 2 and 3. As shown in Figure 6, the package 12 includes a plurality of (only one shown in Figure 6) protrusions 12A. The protrusions 12A project away from the center of the package 12 in the xy plane. In other words, the protrusions 12A project away from the center of the semiconductor device 1 from the side surface 12s of the package 12, which is located at a height corresponding to the height of the first plate portion 18A or the second plate portion 18B of the conductor 18. In this case, the protrusions 12A project in the Y direction relative to the resin 12, which is located below the side surface 12s, which is located at a height corresponding to the height of the first plate portion 18A or the second plate portion 18B of the conductor 18, and closer to the center of the semiconductor device 1 than the side surface 12s. The protrusions 12A are located in a region including the bottom surface of the package 12. Some of the protrusions 12A are located in the region including the Y-side end of the package 12, and are situated between adjacent first portions (external terminals) 14A. Others of the protrusions 12A are located in the region including the -Y-side end, and are situated between adjacent first portions 13A. The upper surfaces of the protrusions 12A are aligned with the upper surfaces of the lead frames 13 and 14.
[0041] The second portion 14B of the lead frame 14 has an inclined portion (or inclination) 141. The inclined portion 141 extends from the Z-side end (or edge) of the second portion 14B to the Y-side end (or edge) of the second portion 14B. The inclined portion 141 is inclined with respect to the xz-plane or xy-plane and lies along a straight line connecting the y-axis and the z-axis. The z-axis coordinate of the -Y-side end of the inclined portion 141 is greater than the z-axis coordinate of the Y-side end of the inclined portion 141. That is, the z-axis coordinate of each inclined portion 141 gradually decreases in the Y-direction.
[0042] Figure 7 shows a partial structure of the semiconductor device of the first embodiment along the xy plane. Figure 7 shows the lead frame 14.
[0043] As shown in Figure 7, each inclined portion 141 is located between adjacent first portions 14A. Each inclined portion 141 occupies a region between adjacent first portions 14A that includes the Y-direction side end of the second portion 14B. Each inclined portion 141 occupies a region of the lead frame 14 that includes the boundary between the region between adjacent first portions 14A and the second portion 14B of the lead frame 14. Each inclined portion 141 extends in the Y direction.
[0044] Each inclined portion 141 occupies a region including the center between the X-side end (i.e., the right end) of one first portion 14A that is more positioned in the -X direction (i.e., the left side) and the X-side end (i.e., the left end) of one first portion 14A that is more positioned in the X direction (i.e., the right side). The inclined portion 141 has a non-inclined portion 142 between it and the right end of the left first portion 14A, and a non-inclined portion 142 between it and the left end of the right first portion 14A. The non-inclined portions 142 are aligned with the inclined portions 141 in the X direction. The non-inclined portions 142 extend along the xy plane, just like the other regions of the lead frame 14. The non-inclined portions 142 are provided to prevent the inclined portions 141 from unintentionally reaching the first portion 14A due to mold tolerances and / or forming precision when forming the inclined portions 141. However, the inclined portion 141 may reach the left first portion 14A and / or the right first portion 14A without providing one or both of the non-inclined portions 142.
[0045] Figure 8 shows the cross-sectional structure of the semiconductor device of the first embodiment. Figure 8 shows a cross-section along the line VII-VII in Figure 7.
[0046] As shown in Figure 8, the inclined portion 141 extends along the Y direction for at least a length D1, or in other words, it has at least a dimension D1 along the Y direction. The length D1 is equal to the distance between the Y-side edge (upper right edge) or end EG1 of the Z-side face (upper surface) of the lead frame 14 and the imaginary line extending along the z axis from the Y-side edge (lower right edge) or end EG2 of the -Z-side face (lower surface) of the lead frame 14 (or the y-axis coordinate of the lower right edge EG2). That is, the inclined portion 141 extends across the y-axis coordinate of the upper right edge EG1 and the y-axis coordinate of the lower right edge EG2. The plate portion 14B, including the inclined portion 141, is covered with resin 12 and protrusions 12A.
[0047] The Y-side edge (right edge) of the lead frame 14 may have an inclined surface due to limitations in the molding technology of the lead frame 14. Figure 8 shows such an example. In this case, the inclined portion 141 may extend beyond a position on a virtual line (or the y-axis coordinate of the lower right edge EG2) extending along the z-axis from the upper right edge EG1 to the lower right edge EG2, with respect to the Y direction.
[0048] The inclined portion 141 extends along the Z direction for at least a length D2, in other words, it has at least a dimension D2 along the Z direction. That is, with respect to the Z direction, the inclined portion 141 extends from the upper right side EG1 and the lower right side EG2 to a position on a virtual line extending along the z axis. If the right side of the lead frame 14 has an inclined surface, the inclined portion 141 may extend from the upper right side EG1 to a position on a virtual line extending along the z axis from the lower right side EG2 to a position on the z direction. In one example, length D2 is substantially the same as length D1. In this specification and the claims, "substantially the same" and "substantially equal" of two elements mean that the two elements are intended to be the same, but are not exactly the same based on the limitations of manufacturing and measurement techniques.
[0049] The lower right edge EG2 has a distance D3 along the X direction from the connection surface (or connection end) EG3. The connection surface EG3 is the -Y direction side of the protrusion 12A of the package 12, and is the boundary between the part of the package 12 other than the protrusion 12A and the protrusion 12A. The connection surface EG3 is aligned with the xz plane.
[0050] The second part 14B has a thickness (i.e., a dimension in the Z direction) TH1. The thickness TH1 is the average, maximum, or minimum value of the thickness of the second part 14B.
[0051] Distance D3 is substantially equal to 0.5 to 2 times length D1 or / or length D2. In one example, distance D3 is substantially equal to a size of 0.05 mm or more and 0.20 mm or less. In one example, length D1 is substantially equal to 0.1 mm. In one example, length D2 is less than or equal to half the thickness TH1.
[0052] Figure 9 shows one state during the manufacturing of the semiconductor device of the first embodiment. Figure 9 shows the same region as shown in Figure 6. In the state shown in Figure 9, the intermediate structure 1A of the semiconductor device 1 includes a lead frame 14a instead of a lead frame 14. The lead frame 14a is a conductor that will be formed into a lead frame 14 in a later process. In the state shown in Figure 9, the lead frame 14a has the structure shown in Figure 10. Figure 10 shows a state during the manufacturing of a part of the semiconductor device of the first embodiment. Figure 10 shows the lead frame 14a along the xy plane. As shown in Figure 10, the lead frame 14a has a quadrilateral shape. The lead frame 14a has an opening 14aW. The opening 14aW has a quadrilateral shape and penetrates the lead frame 14a. The opening 14aW is located in the region between the regions that will become the first part 14A. The -Y side edge (lower edge) of the lead frame 14a substantially coincides with the lower right edge EG2. The lead frame 14a already has an inclined portion 141 at the lower end of the opening 14aW. The first portion 14A has not yet been formed.
[0053] Returning to Figure 9, at the start of the process shown in Figure 9, structure 1A does not yet have the package 12. As the process shown in Figure 9 begins, mold 28 is placed on the top surface of structure 1A. The mold has a space 28W inside, which has a shape substantially equal to the outer shape of package 12. Thus, the side EG11 on the -Z side of space 28W substantially coincides with the connecting surface EG3 of the package 12 that is formed. Thus, the distance between side EG11 and a virtual line extending along the z axis from the lower right side EG2 (or the coordinate of the lower right side EG2 on the y axis) is substantially equal to the distance D3.
[0054] Next, the material (i.e., resin) of the package (resin) 12 is injected into the space 28W. This fills the space 28W with the material. During injection, a portion of the material flows in the direction indicated by the arrow. That is, it flows from the center of structure 1A toward the Y direction and toward the opening 14aW. The flow of the material toward the opening 14aW follows the inclined portion 141 of the lead frame 14. The material fills the opening 14aW. After this, the lead frame 14a is molded into the lead frame 14.
[0055] According to the first embodiment, a semiconductor device is provided in which package chipping is suppressed, as described below.
[0056] A reference semiconductor device for the following comparison can be considered. Specifically, the reference semiconductor device does not have an inclined portion 141 in the lead frame 14. Therefore, in the process described above with reference to Figure 9, the gap between the side EG11 of the space 28W of the mold 28 and the lead frame 14 is narrow. Consequently, the resin flow path between the side EG11 and the lead frame 14 is narrow, making it difficult for the resin to flow. As a result, a sufficient amount of resin does not reach the opening 14aW, and a space remains where the resin does not fill the back of the opening 14aW, i.e., the Y-direction side. A semiconductor device completed with this space will have a defect in the package 12 where the space is formed. This adversely affects the appearance of the semiconductor device and also affects the durability and / or reliability of the semiconductor device.
[0057] According to the first embodiment, the lead frame 14 has an inclined portion 141. Therefore, in the process described above with reference to Figure 9, the distance between the edge EG11 of the space 28W of the mold 28 and the lead frame 14 is wide. As a result, the flow of the resin material of the package 12 is not easily obstructed in the region between the edge EG11 and the lead frame 14, and the resin can reach the back of the opening 14aW and fill the opening 14aW. Thus, chipping of the package 12 is suppressed.
[0058] The description so far relates to an example in which the semiconductor chip 11 has the source electrode 112 exposed on its upper surface and the drain electrode 113 exposed on its lower surface. However, the first embodiment is not limited to this example, and the gate electrode 111, source electrode 112, and drain electrode 113 may be arranged in any way.
[0059] The lead frame 14 may be integrated with the conductor 18, and the lead frame 15 may be integrated with the conductor 17. Figure 11 shows such an example, illustrating the internal structure of a modified semiconductor device of the first embodiment along the xy plane. As shown in Figure 11, the modified semiconductor device 1 includes lead frames 14b and 15b.
[0060] The lead frame 15b overlaps the gate electrode 111 on the -Y direction side. The lead frame 14b includes a first portion 14A and a second portion 14B, as well as a third portion 14C and a fourth portion 14D. The third portion 14C has a shape that follows the shape of the source electrode 112 along the xy plane and overlaps the source electrode 112. The fourth portion 14D is located between the second portion 14B and the third portion 14C and connects the second portion 14B and the third portion 14C. That is, the first portion 14A, the second portion 14B, the third portion 14C, and the fourth portion 14D are continuous.
[0061] Figure 12 shows the cross-sectional structure of a modified semiconductor device of the first embodiment. Figure 12 shows a cross-section along the line XII-XII in Figure 11. As shown in Figure 12, the third portion 14C is located in the Z direction from the semiconductor chip 11. The third portion 14C is in contact with the junction layer 22 on its lower surface.
[0062] The fourth section 14D is connected at its left end to the right end of the third section 14C. In one example, the fourth section 14D is located in the Z direction from the third section 14C. The right end of the fourth section 14D is located in the -Z direction from its left end. That is, the fourth section 14D has a portion extending along the Z direction between its left and right ends. The fourth section 14D is connected at its right end to the left end of the second section 14B.
[0063] Figure 13 shows the cross-sectional structure of a modified semiconductor device of the first embodiment. Figure 13 shows a cross-section along the line XIII-XIII in Figure 11. As shown in Figure 13, the lead frame 15b is located in the Z direction from the semiconductor chip 11 in the portion including the left end. The lead frame 15b is in contact with the bonding layer 25 on the lower surface of the left end. The lead frame 15b is aligned with the lead frame 13 in the portion including the right end and exposed from the package 12. The portion of the lead frame 15b including the left end and the portion of the lead frame 15b including the right end are connected to each other by an intermediate portion. The intermediate portion extends along the z axis.
[0064] Figure 14 shows the cross-sectional structure of a modified semiconductor device of the first embodiment. Figure 14 shows a cross-section along the line XIV-XIV in Figure 11. As shown in Figure 14, the second portion 14B has an inclined portion 141.
[0065] While several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These embodiments can be carried out in a variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims and their equivalents. [Explanation of Symbols]
[0066] 1… Semiconductor equipment, 11…Semiconductor chips, 12...Package, 13… Lead frame, 14… Lead frame, 15… Lead frame, 111...gate, 112... Source electrode, 113...Drain electrode, 13A...1st part (external terminal), 13B...Second part (first plate part), 14A...1st part (external terminal), 14B...Second part (first plate part), 17...Conductive material (plate part, wire), 18... Conductors, 21...bonding layer, 22...bonding layer, 23...bonding layer, 18A...first part (first plate part), 18B…Second part (second plate part)
Claims
1. First lead frame and, A semiconductor chip comprising a first electrode provided in a first direction from the first lead frame and electrically connected to the first lead frame, and a second electrode, A first conductor electrically connected to the second electrode, A second lead frame, which is aligned with the first lead frame in a second direction from the first lead frame, includes a first terminal and a plate portion connected to the first terminal, the plate portion is electrically connected to the first conductor, and the plate portion has an inclination extending from a first surface on the first direction side to a side surface on the second direction side, A resin covering a part of the first lead frame, the semiconductor chip, the first conductor, the plate portion of the second lead frame, and a part of the first terminal of the second lead frame, A semiconductor device equipped with a semiconductor device.
2. The second lead frame further includes a second terminal connected to the plate portion, The second terminal is aligned with the first terminal in a third direction. The inclination is located between the first terminal and the second terminal, The semiconductor device according to claim 1.
3. The aforementioned inclination extends in the third direction. The semiconductor device according to claim 2.
4. The resin covers the semiconductor chip, the first conductor, and the plate portion of the second lead frame, and has a second surface on the side in the first direction. The first portion of the resin is aligned with the plate portion in the second direction from the plate portion and has a third surface on the side in the first direction. The second surface is located in the first direction from the third surface, The semiconductor device according to claim 1.
5. The plate portion has a fourth surface in the direction opposite to the first direction, The distance along the second direction between the end of the first portion on the side opposite to the second direction and the end of the fourth surface on the side of the second direction is 0.05 mm or more and 0.2 mm or less. The semiconductor device according to claim 4.
6. The plate portion has a first dimension in the first direction, The second dimension of the inclined plane along the first direction from the first surface is less than or equal to half of the first dimension. The semiconductor device according to claim 4.
7. The first conductor and the second lead frame are integrated. The semiconductor device according to any one of claims 1 to 6.
8. First lead frame and, A semiconductor chip comprising a first electrode provided in a first direction from the first lead frame and electrically connected to the first lead frame, and a second electrode, A connector electrically connected to the aforementioned second electrode, A second lead frame having a first terminal, a second terminal aligned in a second direction perpendicular to the first direction, and a plate portion connecting the first terminal and the second terminal, with the edge of the first surface (upper surface) between the first terminal and the second terminal being inclined, A resin covering a part of the first lead frame, the semiconductor chip, the connector, the plate portion of the second lead frame, and a part of the first terminal of the second lead frame, A semiconductor device equipped with a semiconductor device.
Citation Information
Patent Citations
Chain extended urethane diacrylate and dental impression formation
JP1986095019A