Semiconductor device and method for manufacturing a semiconductor device

The semiconductor device's innovative conductive portion design and manufacturing process address miniaturization challenges by integrating protruding features within the sealing resin, enhancing electrical connections and structural integrity for smaller, more efficient components.

JP2026063298APending Publication Date: 2026-04-10ROHM CO LTD
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
ROHM CO LTD
Filing Date
2026-01-21
Publication Date
2026-04-10

AI Technical Summary

Technical Problem

Conventional semiconductor devices face challenges in miniaturization due to limitations in their structural design and manufacturing processes, particularly in efficiently integrating conductive portions and sealing resins.

Method used

The semiconductor device incorporates a novel design with first and second conductive portions that have protruding mounting and terminal portions, integrated with a sealing resin, allowing for efficient integration and connection of semiconductor elements, and a manufacturing process that includes precise plating and masking steps to form these features.

Benefits of technology

This design enhances the miniaturization and integration of semiconductor devices by providing robust electrical connections and improved structural integrity, facilitating smaller and more efficient electronic components.

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Abstract

Miniaturizing semiconductor devices. [Solution] The semiconductor device 1A comprises a first conductive portion 21 and a second conductive portion 22 arranged apart in the X direction, a semiconductor element 40 mounted on the first conductive portion 21 and the second conductive portion 22, and a sealing resin 10. The first conductive portion 21 includes a first mounting portion 24 and a first terminal portion 23 extending away from the semiconductor element 40 with respect to the first mounting portion 24 having a first mounting surface 241. The second conductive portion 22 includes a second mounting portion 26 and a second terminal portion 25 extending away from the semiconductor element 40 with respect to the second mounting portion 26 having a second mounting surface 261. Viewed from the Z direction, the first terminal portion 23 and the semiconductor element 40 overlap each other at least partially. Viewed from the Z direction, the second terminal portion 25 and the semiconductor element 40 overlap each other at least partially.
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Description

Technical Field

[0001] The present disclosure relates to a semiconductor device and a method for manufacturing a semiconductor device.

Background Art

[0002] Conventionally, semiconductor devices have been miniaturized as electronic devices have become smaller. Patent Document 1 shows an example of a semiconductor device. This semiconductor device includes a rectangular die pad, a plurality of leads arranged around the die pad, a semiconductor chip mounted on the die pad, and a sealing resin for sealing the semiconductor chip. The plurality of leads serve as wirings for electrically connecting the semiconductor chip to the outside of the semiconductor device. In the manufacturing method of this semiconductor device, a semiconductor chip is mounted on the die pad of a lead frame, and all the semiconductor chips on the lead frame are collectively sealed with resin. Then, the resin and the lead frame are cut by a dicing saw along a preset dicing line. Thereby, individual semiconductor devices are obtained.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

[0004] [Summary] Miniaturization of semiconductor devices is required.

[0005] A semiconductor device according to one aspect of the present disclosure comprises a first conductive portion and a second conductive portion arranged apart in a first direction, a semiconductor element mounted on the first conductive portion and the second conductive portion, and a sealing resin that seals the first conductive portion and the second conductive portion and the semiconductor element, wherein the first conductive portion and the second conductive portion are composed of a plating layer, and the first conductive portion includes a first mounting portion having a first mounting surface on which the semiconductor element is mounted, and a first terminal portion extending from the first mounting portion on the side opposite to the semiconductor element, and the second conductive portion The part includes a second mounting portion having a second mounting surface on which the semiconductor element is mounted, and a second terminal portion extending toward the side opposite to the semiconductor element relative to the second mounting portion, wherein the first mounting portion extends in a first direction along the first mounting surface from the first terminal portion and has a first protruding portion that protrudes toward the inside of the semiconductor device from the first terminal portion, the first protruding portion constitutes a part of the first mounting surface, and a first bonding portion for bonding the semiconductor element to a first conductive portion is provided in the portion of the first mounting surface corresponding to the first protruding portion. The second mounting portion extends in a first direction along the second mounting surface more than the second terminal portion and has a second protruding portion that protrudes inward from the second terminal portion toward the inside of the semiconductor device, the second protruding portion constituting a part of the second mounting surface, and a second bonding portion for bonding the semiconductor element to the second conductive portion is provided in the portion of the second mounting surface corresponding to the second protruding portion, the first mounting portion and the first terminal portion are integrally formed, the second mounting portion and the second terminal portion are integrally formed, and the sealing resin is integrally formed with respect to the first mounting surface and The semiconductor element has a resin upper surface facing the same direction as the second mounting surface and a resin lower surface facing the opposite direction from the resin upper surface, the first conductive portion has a first conductive portion lower surface exposed from the resin lower surface, and the second conductive portion has a second conductive portion lower surface exposed from the resin lower surface, and if the direction perpendicular to the first mounting surface and the second mounting surface is taken as the second direction, when viewed from the second direction, the first terminal portion and the semiconductor element overlap each other at least partially, and when viewed from the second direction, the second terminal portion and the semiconductor element overlap each other at least partially. [Brief explanation of the drawing]

[0006] [Figure 1] Figure 1 is a perspective view of a semiconductor device according to one embodiment, viewed from the top. [Figure 2] Figure 2 is a perspective view of the semiconductor device shown in Figure 1, viewed from the bottom. [Figure 3] Figure 3 is a schematic top view of the semiconductor device shown in Figure 1. [Figure 4] Figure 4 is a schematic bottom view of the semiconductor device shown in Figure 1. [Figure 5] Figure 5 is a schematic side view of the semiconductor device shown in Figure 1. [Figure 6] Figure 6 is a cross-sectional view taken along line 6-6 in Figure 3. [Figure 7] Figure 7 is a cross-sectional view taken along line 7-7 in Figure 3. [Figure 8] Figure 8 is a schematic cross-sectional view showing an exemplary manufacturing process of the semiconductor device shown in Figure 6. [Figure 9] Figure 9 is a schematic cross-sectional view showing the manufacturing process following Figure 8. [Figure 10] Figure 10 is a schematic cross-sectional view showing the manufacturing process following Figure 9. [Figure 11] Figure 11 is a schematic cross-sectional view showing the manufacturing process following Figure 10. [Figure 12] Figure 12 is a schematic cross-sectional view showing the manufacturing process following Figure 11. [Figure 13] Figure 13 is a schematic cross-sectional view showing the manufacturing process following Figure 12. [Figure 14] Figure 14 is a schematic cross-sectional view showing the manufacturing process following Figure 13. [Figure 15] Figure 15 is a schematic cross-sectional view showing the manufacturing process following Figure 14. [Figure 16] Figure 16 is a schematic cross-sectional view showing the manufacturing process following Figure 15. [Figure 17] Figure 17 is a schematic cross-sectional view showing the manufacturing process following Figure 16. [Figure 18] Figure 18 is a schematic cross-sectional view showing the manufacturing process following Figure 17. [Figure 19]FIG. 19 is a schematic cross-sectional view showing a manufacturing process following FIG. 18. [Figure 20] FIG. 20 is a schematic cross-sectional view showing a manufacturing process following FIG. 19. [Figure 21] FIG. 21 is a schematic cross-sectional view showing a manufacturing process following FIG. 20. [Figure 22] FIG. 22 is a schematic cross-sectional view showing a manufacturing process following FIG. 21. [Figure 23] FIG. 23 is a cross-sectional view showing a semiconductor device of a comparative example. [Figure 24] FIG. 24 is a schematic cross-sectional view showing a manufacturing process of the semiconductor device of the comparative example. [Figure 25] FIG. 25 is a schematic cross-sectional view showing a manufacturing process of the semiconductor device of the comparative example. [Figure 26] FIG. 26 is a schematic cross-sectional view showing a manufacturing process of the semiconductor device of the comparative example. [Figure 27] FIG. 27 is a schematic cross-sectional view showing a manufacturing process of the semiconductor device of the comparative example.

[0007] [Detailed Description] Hereinafter, embodiments and modification examples will be described with reference to the drawings. The embodiments and modification examples shown below illustrate configurations and methods for embodying the technical idea, and do not limit the materials, shapes, structures, arrangements, dimensions, etc. of each component to those described below. Various modifications can be made to the following embodiments and modification examples. Further, the following embodiments and modification examples can be implemented in combination with each other within a technically consistent range.

[0008] Hereinafter, embodiments of the semiconductor device of the present disclosure will be described with reference to the accompanying drawings. Note that, for simplicity and clarity of explanation, the components shown in the drawings are not necessarily drawn at a constant scale. Also, for ease of understanding, hatching lines may be omitted in the cross-sectional views. The accompanying drawings merely illustrate embodiments of the present disclosure and should not be regarded as limiting the present disclosure.

[0009] The following detailed description includes apparatuses, systems, and methods that embody exemplary embodiments of the present disclosure. This detailed description is merely for the purpose of explanation and is not intended to limit the embodiments of the present disclosure or the application and use of such embodiments.

[0010] (One embodiment) Hereinafter, a semiconductor device 1A according to one embodiment will be described. FIGS. 1 and 2 are perspective views showing the external appearance of the semiconductor device 1A. FIG. 1 is a perspective view of the semiconductor device 1A viewed from the upper surface side, and FIG. 2 is a perspective view of the semiconductor device 1A viewed from the lower surface side. FIG. 3 is a schematic top view of the semiconductor device 1A. FIG. 4 is a schematic bottom view of the semiconductor device 1A. FIG. 5 is a schematic side view of the semiconductor device 1A. FIG. 6 is a cross-sectional view taken along line 6-6 in FIG. 3. FIG. 7 is a cross-sectional view taken along line 7-7 in FIG. 3. FIGS. 8 to 22 are cross-sectional views showing an example of the manufacturing process of the semiconductor device 1A.

[0011] The semiconductor device 1A shown in these figures is a device that is surface-mounted on a circuit board of various electronic devices. As shown in FIGS. 1 and 2, the semiconductor device 1A has a rectangular plate shape. Here, for convenience of explanation, the thickness direction of the semiconductor device 1A is defined as the Z direction. And the first direction and the second direction that are orthogonal to each other among the directions orthogonal to the Z direction are defined as the X direction and the Y direction, respectively.

[0012] [Schematic configuration of the semiconductor device] As shown in FIGS. 1 and 2, the semiconductor device 1A has a sealing resin 10 and a plurality of external conductive films 50. As shown in FIGS. 3 to 7, the semiconductor device 1A has a semiconductor element 40, a conductive portion 20, and a bonding portion 30. The sealing resin 10 seals the semiconductor element 40, the conductive portion 20, and the bonding portion 30. The semiconductor element 40 is mounted on the conductive portion 20. More specifically, the conductive portion 20 is electrically connected to the semiconductor element 40 by the bonding portion 30.

[0013] [Sealing resin] The sealing resin 10 seals the conductive portion 20, the bonding portion 30, and the semiconductor element 40. The sealing resin 10 has a resin upper surface 10s and a resin lower surface 10r. The resin upper surface 10s and the resin lower surface 10r face opposite each other in the Z direction. The resin upper surface 10s is flat. The resin lower surface 10r is flat. The sealing resin 10 also has a plurality of resin side surfaces 101, 102, 103, and 104. The first resin side surface 101 and the second resin side surface 102 face opposite each other in the X direction. The third resin side surface 103 and the fourth resin side surface 104 face opposite each other in the Y direction.

[0014] Each of the resin sides 101 to 104 of the sealing resin 10 has a first side 111 and a second side 112. The first side 111 is located closer to the upper resin surface 10s than to the lower resin surface 10r in the Z direction. The second side 112 is located closer to the lower resin surface 10r than to the upper resin surface 10s in the Z direction. The second side 112 of each resin side 101 to 104 is located inside the sealing resin 10 relative to the first side 111 of each resin side 101 to 104 when viewed from the Z direction. In other words, in the Z direction, the side of the resin upper surface 10s of the sealing resin 10 is larger than the side of the resin lower surface 10r.

[0015] In this embodiment, the first side surface 111 of each resin side surface 101 to 104 is perpendicular to the resin upper surface 10s. Also in this embodiment, the second side surface 112 of each resin side surface 101 to 104 is perpendicular to the resin lower surface 10r. The sealing resin 10 in this embodiment has steps 12 on the first side surface 111 and the second side surface 112 that are recessed toward the inside of the sealing resin 10 when viewed from the Z direction, depending on their position. As shown in Figures 1 and 2, the steps 12 are provided along the entire circumferential direction of the sealing resin 10.

[0016] The sealing resin 10 is made of, for example, an electrically insulating resin. As this resin, for example, a synthetic resin mainly composed of epoxy resin can be used. The sealing resin 10 can also be a synthetic resin containing a filler. The filler is, for example, made of SiO2. Furthermore, the sealing resin 10 is colored, for example, black. The material and shape of the sealing resin 10 are not limited.

[0017] [Conductive part] The conductive portion 20 includes a first conductive portion 21 and a second conductive portion 22. The first conductive portion 21 is provided on the side of the first resin side surface 101 of the sealing resin 10, and the second conductive portion 22 is provided on the side of the second resin side surface 102 of the sealing resin 10. The semiconductor device 1A of this embodiment has two first conductive portions 21 and two second conductive portions 22. In this embodiment, the third resin side surface 103 and the fourth resin side surface 104 are surfaces on which no conductive portions are provided.

[0018] The first conductive portion 21 has a first terminal portion 23 and a first mounting portion 24. A semiconductor element 40 is mounted on the first mounting portion 24. The first terminal portion 23 extends on the side opposite to the semiconductor element 40 relative to the first mounting portion 24. In other words, the first conductive portion 21 has a first mounting portion 24 on which the semiconductor element 40 is mounted, and a first terminal portion 23 that extends on the side opposite to the semiconductor element 40 relative to the first mounting portion 24.

[0019] As shown in Figures 3 to 7, the first mounting portion 24 extends in the Z direction from a position overlapping with the semiconductor element 40 to the first resin side surface 101 of the encapsulating resin 10. The first mounting portion 24 is exposed from the first resin side surface 101. The first terminal portion 23 is located on the side of the first resin side surface 101 of the encapsulating resin 10 within the first mounting portion 24. The first terminal portion 23 is exposed from the resin lower surface 10r of the encapsulating resin 10 and also from the first resin side surface 101 of the encapsulating resin 10. Therefore, the first mounting portion 24 extends inward from the first terminal portion 23 into the semiconductor device 1A. In other words, the first mounting portion 24 has a protruding portion 24A that protrudes inward from the first terminal portion 23 into the semiconductor device 1A.

[0020] The first mounting portion 24 and the first terminal portion 23 are integrally formed without any interface between them. The first mounting portion 24 and the first terminal portion 23 are made of the same material. The first mounting portion 24 and the first terminal portion 23 are made of a plating layer. The constituent materials of the first mounting portion 24 and the first terminal portion 23 include, for example, Cu (copper) and Cu alloys.

[0021] The first mounting section 24 has an upper surface 241, a lower surface 242, and side surfaces 243 and 244. The upper surface 241 and the lower surface 242 face opposite each other in the Z direction. The upper surface 241 faces the same side as the resin upper surface 10s. The upper surface 241 is the mounting surface on which the semiconductor element 40 is mounted. The lower surface 242 is the surface of the protruding portion 24A of the first mounting section 24 that faces away from the semiconductor element 40. The side surfaces 243 and 244 extend in directions intersecting the upper surface 241 and the lower surface 242. Side surface 243 is covered by the sealing resin 10. Side surface 244 is an exposed surface that is exposed from the first resin side surface 101 (second side surface 112) of the sealing resin 10.

[0022] The first terminal portion 23 has a lower surface 232 and side surfaces 233 and 234. The lower surface 232 is exposed from the resin lower surface 10r of the sealing resin 10. The side surface 233 is covered by the sealing resin 10. The side surface 234 is exposed from the first resin side surface 101 of the sealing resin 10.

[0023] The thickness T24 of the first mounting portion 24 in the Z direction is 20 μm or more and 100 μm or less. In this embodiment, the thickness T24 of the first mounting portion 24 is 50 μm. The thickness T23 of the first terminal portion 23 in the Z direction is 50 μm or more and 200 μm or less. In this embodiment, the thickness T23 of the first terminal portion 23 is 100 μm. It is preferable that the thickness of the first terminal portion 23 is at least twice the thickness of the first mounting portion 24. In this embodiment, the thickness T23 of the first terminal portion 23 is twice the thickness of the first mounting portion 24. In the X direction, the length L23 of the first terminal portion 23 is 100 μm or more and 200 μm or less. In this embodiment, the length L23 of the first terminal portion 23 is 200 μm. The length of the first mounting portion 24 is defined as the length L24 of the protruding portion 24A that protrudes from the first terminal portion 23. The length L24 of the first mounting portion 24 is 100 μm or more and 150 μm or less. In this embodiment, the length L24 of the first mounting portion 24 is 100 μm.

[0024] The second conductive portion 22 has a second terminal portion 25 and a second mounting portion 26. The semiconductor element 40 is mounted on the second mounting portion 26. The second terminal portion 25 extends on the side opposite to the semiconductor element 40 relative to the second mounting portion 26. In other words, the second conductive portion 22 has a second mounting portion 26 on which the semiconductor element 40 is mounted, and a second terminal portion 25 that extends on the side opposite to the semiconductor element 40 relative to the second mounting portion 26.

[0025] As shown in Figures 3 to 7, the second mounting portion 26 extends in the Z direction from a position overlapping with the semiconductor element 40 to the second resin side surface 102 of the sealing resin 10. The second mounting portion 26 is exposed from the second resin side surface 102. The second terminal portion 25 is located on the side of the second resin side surface 102 of the sealing resin 10 within the second mounting portion 26. The second terminal portion 25 is exposed from the resin lower surface 10r of the sealing resin 10 and also from the second resin side surface 102 of the sealing resin 10. Therefore, the second mounting portion 26 extends inward from the second terminal portion 25 into the semiconductor device 1A. In other words, the second mounting portion 26 has a protruding portion 26A that protrudes inward from the second terminal portion 25 into the semiconductor device 1A.

[0026] The second mounting portion 26 and the second terminal portion 25 are integrally formed without an interface between them. The second mounting portion 26 and the second terminal portion 25 are made of the same material. The second mounting portion 26 and the second terminal portion 25 are made of a plating layer. The constituent materials of the second mounting portion 26 and the second terminal portion 25 include, for example, Cu and Cu alloys.

[0027] The second mounting section 26 has an upper surface 261, a lower surface 262, and side surfaces 263 and 264. The upper surface 261 and the lower surface 262 face opposite each other in the Z direction. The upper surface 261 faces the same side as the resin upper surface 10s. The upper surface 261 is the mounting surface on which the semiconductor element 40 is mounted. The lower surface 262 is the surface of the protruding portion 26A of the second mounting section 26 that faces away from the semiconductor element 40. The side surfaces 263 and 264 extend in directions intersecting the upper surface 261 and the lower surface 262. Side surface 263 is covered by the sealing resin 10. Side surface 264 is an exposed surface that is exposed from the second resin side surface 102 (second side surface 112) of the sealing resin 10.

[0028] The second terminal portion 25 has a lower surface 252 and side surfaces 253 and 254. The lower surface 252 is exposed from the resin lower surface 10r of the sealing resin 10. The side surface 253 is covered by the sealing resin 10. The side surface 254 is exposed from the second resin side surface 102 of the sealing resin 10.

[0029] The thickness T26 of the second mounting portion 26 in the Z direction is 20 μm or more and 100 μm or less. In this embodiment, the thickness T26 of the second mounting portion 26 is 50 μm. The thickness T25 of the second terminal portion 25 in the Z direction is 50 μm or more and 200 μm or less. In this embodiment, the thickness T25 of the second terminal portion 25 is 100 μm. It is preferable that the thickness of the second terminal portion 25 is at least twice the thickness of the second mounting portion 26. In this embodiment, the thickness T25 of the second terminal portion 25 is twice the thickness of the second mounting portion 26. In the X direction, the length L25 of the second terminal portion 25 is 100 μm or more and 200 μm or less. In this embodiment, the length L25 of the second terminal portion 25 is 200 μm. In the X direction, the length L25 of the second terminal portion 25 is 100 μm or more and 200 μm or less. In this embodiment, the length L25 of the second terminal portion 25 is 200 μm. The length of the second mounting portion 26 is defined as the length L26 of the protruding portion 26A that protrudes from the second terminal portion 25. The length L26 of the second mounting portion 26 is 100 μm or more and 150 μm or less. In this embodiment, the length L26 of the second mounting portion 26 is 100 μm.

[0030] [Joint part] As shown in Figure 6, the joint portion 30 is provided on top of the conductive portion 20. The joint portion 30 includes a first joint portion 31 provided on the first conductive portion 21 and a second joint portion 32 provided on the second conductive portion 22. The first joint portion 31 and the second joint portion 32 join the semiconductor element 40 to the first conductive portion 21 and the second conductive portion 22.

[0031] The first joint 31 and the second joint 32 include a plating layer 33 and a solder layer 34. The plating layer 33 is provided on the upper surfaces 241 and 261 of the mounting parts 24 and 26. The plating layer 33 is made of a conductive metallic material. For example, the plating layer 33 is made of Ni (nickel). The solder layer 34 is provided between the plating layer 33 and the element electrode 45 of the semiconductor element 40. The solder layer 34 connects the plating layer 33 and the element electrode 45. The solder layer 34 is made of Sn (tin) or an alloy containing Sn. For example, this alloy is a Sn-Ag (silver) alloy, a Sn-Sb (antimony) alloy, etc.

[0032] [Semiconductor element] As shown in Figures 3 to 7, the semiconductor element 40 is rectangular when viewed from the Z direction. As shown in Figure 6, the semiconductor element 40 includes an element substrate 41, electrode pads 42, an insulating film 43, a redistribution layer 44, and element electrodes 45.

[0033] As shown in Figures 3 to 7, the element substrate 41 has a main substrate surface 41s, a back substrate surface 41r, and a plurality of substrate sides 411, 412, 413, and 414. The main substrate surface 41s and the back substrate surface 41r face opposite each other in the Z direction. As shown in Figures 3 and 4, the first substrate side surface 411 and the second substrate side surface 412 face opposite each other in the X direction. The third substrate side surface 413 and the fourth substrate side surface 414 face opposite each other in the Y direction. The main substrate surface 41s faces the upper surfaces 241 and 261 of the mounting sections 24 and 26. The back substrate surface 41r faces the same direction as the resin upper surface 10s.

[0034] The semiconductor element 40 is, for example, an integrated circuit (IC) such as an LSI (Large Scale Integration). Alternatively, the semiconductor element 40 may be a voltage control element such as an LDO (Low Dropout), an amplification element such as an operational amplifier, or a discrete semiconductor element such as a diode or various sensors. For example, in the case of an LSI, the main substrate surface 41s is the surface on which the components for the function of the semiconductor element 40 are formed. Note that the semiconductor element 40 is not limited to those with multiple components formed on it; it can also be an element with a single component formed on it, such as a chip capacitor or chip inductor, or an element with components formed on a substrate other than a semiconductor. In this embodiment, the semiconductor element 40 is an LSI.

[0035] The electrode pad 42 includes a first electrode pad 421 and a second electrode pad 422. The first electrode pad 421 and the second electrode pad 422 are provided on the main substrate surface 41s of the element substrate 41. The first electrode pad 421 is located near the first substrate side surface 411. The second electrode pad 422 is located near the second substrate side surface 412.

[0036] The insulating film 43 is formed to cover the main surface 41s of the substrate. The insulating film 43 is formed to cover the peripheral edges of the first electrode pad 421 and the second electrode pad 422. Parts of the first electrode pad 421 and parts of the second electrode pad 422 are exposed from the insulating film 43. The insulating film 43 is made of, for example, SiN. The surface 43s of the insulating film 43 constitutes the main surface of the semiconductor element 40. The back surface 41r of the element substrate 41 constitutes the back surface of the semiconductor element 40. The side surfaces 411 to 414 of the element substrate 41 constitute the side surfaces of the semiconductor element 40.

[0037] The redistribution layer 44 includes a first redistribution layer 441 and a second redistribution layer 442. The first redistribution layer 441 is connected to the first electrode pad 421. The first redistribution layer 441 extends from the first electrode pad 421 to the insulating film 43 and is in contact with the surface 43s of the insulating film 43. The second redistribution layer 442 is connected to the second electrode pad 422. The second redistribution layer 442 extends from the second electrode pad 422 to the insulating film 43 and is in contact with the surface 43s of the insulating film 43. The first redistribution layer 441 and the second redistribution layer 442 are made of, for example, Cu, a Cu alloy, etc.

[0038] The element electrode 45 includes a first element electrode 451 and a second element electrode 452. The first element electrode 451 is positioned so as to not overlap with the first electrode pad 421 when viewed from the Z direction. In other words, the first electrode pad 421 and the first element electrode 451 are offset in a direction intersecting the Z direction. The first element electrode 451 is connected to the first redistribution layer 441. The second element electrode 452 is positioned so as to not overlap with the second electrode pad 422 when viewed from the Z direction. In other words, the second electrode pad 422 and the second element electrode 452 are offset in a direction intersecting the Z direction. The second element electrode 452 is connected to the second redistribution layer 442.

[0039] The first element electrode 451 and the second element electrode 452 include a conductive layer 461 and a barrier layer 462. The conductive layer 461 is composed of, for example, Cu or a Cu alloy. The conductive layer 461 may also include a seed layer. The seed layer is composed of, for example, Ti (titanium) / Cu. The barrier layer 462 is composed of Ni, an alloy containing Ni, or multiple metal layers containing Ni. As the barrier layer 462, for example, Ni, Pd (palladium), Au (gold), an alloy containing two or more of these metals, etc., can be used.

[0040] [External conductive film] The external conductive film 50 includes a first external conductive film 51 and a second external conductive film 52. The first external conductive film 51 is formed to cover the surface of the first conductive portion 21 that is exposed from the sealing resin 10.

[0041] The first external conductive film 51 has a first conductive film 511 and a second conductive film 512. The first conductive film 511 covers the lower surface 232 of the first terminal portion 23 that is exposed from the lower resin surface 10r of the sealing resin 10. The second conductive film 512 covers the side surface 234 of the first terminal portion 23 and the side surface 244 of the first mounting portion 24 that are exposed from the first resin side surface 101 of the sealing resin 10. The first external conductive film 51 having the first conductive film 511 and the second conductive film 512 becomes an external connection terminal of the semiconductor device 1A. The first external conductive film 51 is composed of, for example, a plurality of metal layers stacked on top of each other. Examples of metal layers include a Ni layer, a Pd layer, and an Au layer. The material of the first external conductive film 51 is not limited, but for example, it may be composed of stacked Ni and Au layers, or it may be Sn.

[0042] The second external conductive film 52 is formed to cover the surface of the second conductive portion 22 that is exposed from the sealing resin 10. The second external conductive film 52 has a first conductive film 521 and a second conductive film 522. The first conductive film 521 covers the lower surface 252 of the second terminal portion 25 that is exposed from the lower resin surface 10r of the sealing resin 10. The second conductive film 522 covers the side surface 254 of the second terminal portion 25 and the side surface 264 of the second mounting portion 26 that are exposed from the second resin side surface 102 of the sealing resin 10. The second external conductive film 52, having the first conductive film 521 and the second conductive film 522, becomes an external connection terminal of the semiconductor device 1A. The second external conductive film 52 is made of the same material as the first external conductive film 51, for example. The second external conductive film 52 is made of, for example, a plurality of metal layers stacked on top of each other. Examples of metal layers include a Ni layer, a Pd layer, and an Au layer. The material of the second external conductive film 52 is not limited, but for example, it may be made of stacked Ni and Au layers, or it may be made of Sn. Furthermore, the second external conductive film 52 may be made of a different material than the first external conductive film 51.

[0043] As shown in Figures 6 and 7, the sealing resin 10 seals the conductive portion 20, the bonding portion 30, and the semiconductor element 40. The conductive portion 20 includes a first conductive portion 21 and a second conductive portion 22. As shown in Figure 6, the sealing resin 10 is filled between the first conductive part 21 and the second conductive part 22 in a cross-section along the Z direction. The sealing resin 10 has a first resin part 131 and a second resin part 132. The first resin part 131 is the resin filled between the first terminal part 23 of the first conductive part 21 and the second terminal part 25 of the second conductive part 22. The second resin part 132 is the resin filled between the first mounting part 24 of the first conductive part 21 and the second mounting part 26 of the second conductive part 22. The first resin part 131 and the second resin part 132 are integrally formed. The first resin part 131 and the second resin part 132 are made of the same material. Furthermore, no interface is formed between the first resin part 131 and the second resin part 132. In other words, the first resin part 131 and the second resin part 132 are integrally formed without an interface being formed between them.

[0044] [Manufacturing method for semiconductor devices] An example of a method for manufacturing a semiconductor device 1A according to one embodiment of the present disclosure will be described with reference to Figures 8 to 22. Each of the referenced figures shows the area in which one semiconductor device 1A is formed. Figures 8 to 22 show cross-sections corresponding to Figure 6 in the manufacturing process. For ease of understanding, in Figures 8 to 22, components similar to those in Figures 1 to 7 are denoted by the same reference numerals. Also, the definitions of directions shown in each figure are the same as the definitions of directions shown in Figures 1 to 7.

[0045] As shown in Figure 8, the manufacturing method of the semiconductor device 1A includes a step of preparing a support substrate 900. The support substrate 900 is made of, for example, a single crystal material of Si. The support substrate 900 has a main surface 900s and a back surface 900r that face opposite each other in the Z direction. Alternatively, a substrate made of a synthetic resin material such as epoxy resin may be used as the support substrate 900.

[0046] As shown in Figure 9, the manufacturing method of the semiconductor device 1A includes a step of forming a seed layer 901. For example, the seed layer 901 is formed on the main surface 900s of the support substrate 900 by a sputtering method. The seed layer 901 includes, for example, a first layer mainly composed of Ti and a second layer mainly composed of Cu. The first layer is formed over the entire main surface 900s of the support substrate 900, and the second layer is formed in contact with the first layer.

[0047] As shown in Figure 10, the manufacturing method of the semiconductor device 1A includes a step of forming a first mask 902. The first mask 902 forms the terminal portions 23 and 25 shown in Figure 6, etc. The first mask 902 has a first opening 9021 corresponding to the terminal portions 23 and 25. The first mask 902 is formed, for example, by photolithography. The thickness of the first mask 902 is greater than the thicknesses T23 and T25 (see Figure 6) of the terminal portions 23 and 25 formed by the first mask 902. First, for example, a photosensitive resist layer is formed on the upper surface 901s of the seed layer 901. For example, a dry film resist can be used for the resist layer. The resist layer may be composed of a plurality of dry film resists. Next, by exposing and developing the resist layer, a first mask 902 having a first opening 9021 corresponding to the terminal portions 23 and 25 shown in Figure 6 is formed.

[0048] As shown in Figure 11, the manufacturing method of the semiconductor device 1A includes a step of forming a second mask 903. The second mask 903 forms the mounting portions 24 and 26 shown in Figure 6. The second mask 903 has a second opening 9031 corresponding to the mounting portions 24 and 26. The second mask 903 is formed, for example, by photolithography. The thickness of the second mask 903 is greater than the thicknesses T24 and T26 (see Figure 6) of the mounting portions 24 and 26 formed by the second mask 903. First, for example, a photosensitive resist layer is formed on the upper surface of the first mask 902. For example, a dry film resist can be used for the resist layer. The resist layer may be composed of multiple dry film resists. Next, by exposing and developing the resist layer, a second mask 903 having a second opening 9031 corresponding to the mounting portions 24 and 26 shown in Figure 6 is formed.

[0049] As shown in Figure 12, the manufacturing method of the semiconductor device 1A includes a step of forming a plating layer 920. The plating layer 920 corresponds to the conductive part 20 shown in Figure 6. The conductive part 20 is composed of the plating layer 920.

[0050] The plating layer 920 is formed, for example, by an electroplating method. The plating layer 920 is formed by growing the plating metal from the upper surface 901s of the seed layer 901 exposed from the first mask 902 and the second mask 903. In this process, the plating metal is grown in one step from the first opening 9021 of the first mask 902 to the second opening 9031 of the second mask 903. The plating metal constituting the plating layer 920 includes Cu and Cu alloys. As a result, the plating layer 920 has terminal portions 23 and 25 formed at the first opening 9021 of the first mask 902 and mounting portions 24 and 26 formed at the second opening 9031 of the second mask 903. Furthermore, the conductive portion 20 composed of the plating layer 920 has no internal interfaces.

[0051] As shown in Figure 13, the manufacturing method of the semiconductor device 1A includes a step of forming a third mask 904. The third mask 904 forms the joint 30 shown in Figure 6. The third mask 904 has a third opening 9041 corresponding to the joint 30. The third mask 904 is formed, for example, by photolithography. The thickness of the third mask 904 is greater than the thickness of the joint 30 formed by the third mask 904. First, for example, a photosensitive resist layer is formed on the upper surface 903s of the second mask 903 and the upper surface 920s of the plating layer 920. For example, a dry film resist can be used as the resist layer. The resist layer may be composed of multiple dry film resists. Next, by exposing and developing the resist layer, a third mask 904 having a third opening 9041 corresponding to the joint 30 shown in Figure 6 is formed.

[0052] As shown in Figure 14, the manufacturing method of the semiconductor device 1A includes a step of forming a joint 30. The joint 30 includes a plating layer 33 and a solder layer 34. The joint 30 is formed, for example, by an electrolytic plating method. First, the plating layer 33 is formed. The plating layer 33 is formed by depositing plating metal on the upper surface 920s of the plating layer 920 exposed from the third mask 904. The plating metal constituting the plating layer 33 includes Ni and Ni alloys. Next, the solder layer 34 is formed. The solder layer 34 is formed by depositing plating metal on the upper surface of the plating layer 33 exposed from the third mask 904. The plating metal constituting the solder layer 34 includes an alloy containing Sn and Ag.

[0053] As shown in Figure 15, the manufacturing method of the semiconductor device 1A includes a step of removing masks 902 to 904. The removal of masks 902 to 904 can be carried out, for example, using a stripping solution.

[0054] Furthermore, the manufacturing method of the semiconductor device 1A includes a step of removing the seed layer 901. After removing the masks 902 to 904 shown in Figure 14, the exposed seed layer 901 is removed. The seed layer 901 can be removed, for example, by etching. For example, the seed layer 901 exposed from the plating layer 920 is removed by wet etching using the plating layer 920 as a mask.

[0055] Furthermore, the manufacturing method of the semiconductor device 1A includes a step of performing flow processing. Flow processing smooths the surface of the solder layer 34. This smoothing suppresses the generation of voids when mounting the semiconductor device 40.

[0056] As shown in Figure 16, the manufacturing method of the semiconductor device 1A includes a step of mounting the semiconductor element 40. This step includes a step of flip-chip mounting the semiconductor element 40 and a step of reflow processing. The semiconductor element 40 is flip-chip mounted by applying flux to the element electrode 45 using, for example, a flip-chip bonder. Next, the element electrode 45 is bonded to the junction 30 by reflow processing.

[0057] As shown in Figure 17, the manufacturing method of the semiconductor device 1A includes a step of forming a resin layer 910. The resin layer 910 is the part that becomes the sealing resin 10 shown in Figures 1 to 7. The resin layer 910 is a synthetic resin, for example, mainly composed of epoxy resin. The resin layer 910 is formed, for example, by compression molding. The resin layer 910 is formed to cover the semiconductor element 40, the joint 30, and the conductive part 20. In other words, the resin layer 910 is filled between the first conductive part 21 and the second conductive part 22 of the conductive part 20.

[0058] As shown in Figures 18 and 19, the manufacturing method of the semiconductor device 1A includes a step of removing the support substrate 900. Dicing tape (not shown) is attached to the lower surface 910s of the resin layer 910. Note that Figure 18 is shown upside down compared to Figure 17. Then, the support substrate 900, seed layer 901, a part of the resin layer 910, and a part of the plating layer 920 are removed by grinding. At this time, grinding is performed from the side of the support substrate 900 toward the resin layer 910 up to the dashed line DL1 shown in Figure 18. As a result, the lower surfaces 232 and 252 of the terminal portions 23 and 25 are formed, as shown in Figure 19. Alternatively, after peeling the support substrate 900 from the resin layer 910, a part of the resin layer 910, the seed layer 901, and a part of the plating layer 920 may be ground.

[0059] As shown in Figure 20, the manufacturing method of the semiconductor device 1A includes a step of cutting (half-cutting) a portion of the resin layer 910 in the Z direction. In this half-cut of the resin layer 910, a dicing blade is used, for example, to cut along the cutting line (dashed line) DL2 shown in Figure 20 from the upper surface 910r of the resin layer 910 toward the lower surface 910s of the resin layer 910. By half-cutting the resin layer 910 in this way, a separation groove 912 is formed in the resin layer 910. Then, the conductive portion 20 is formed by the half-cutting of the resin layer 910 with the dicing blade. More specifically, the side surfaces 234, 254 of the terminal portions 23, 25 and the side surfaces 244, 264 of the mounting portions 24, 26 are formed. The side surfaces 234, 254 of the terminal portions 23, 25 and the side surfaces 244, 264 of the mounting portions 24, 26 are exposed to the separation groove 912.

[0060] As shown in Figure 21, the manufacturing method of the semiconductor device 1A includes a step of forming an external conductive film 50. The external conductive film 50 has a first conductive film 511, 521 that covers the lower surfaces 232, 252 of the terminal portions 23, 25, and a second conductive film 512, 522 that covers the side surfaces 234, 254 of the terminal portions 23, 25, and the side surfaces 244, 264 of the mounting portions 24, 26. The second conductive film 512, 522 is formed in the separation groove 912. The external conductive film 50 is composed of a plating metal. For example, the external conductive film 50 is formed by depositing a plating metal, such as Ni, Pd, and Au, in this order by an electroless plating method. Note that the composition and formation method of the external conductive film 50 are not limited to the above method.

[0061] As shown in Figure 22, the manufacturing method of the semiconductor device 1A includes a step of dividing the semiconductor device 1A into individual pieces. The resin layer 910 is cut and divided into individual pieces, with the semiconductor element 40 as one unit. In dividing, the resin layer 910 is cut along the cutting line (dashed line) DL2, for example, by using a dicing blade narrower than the dicing blade used to half-cut the resin layer 910, from the separation groove 912 of the resin layer 910 to the lower surface 910s of the resin layer 910, thereby cutting the resin layer 910. The individual piece is a semiconductor device 1A containing a sealing resin 10. This forms the sealing resin 10. More specifically, a first side surface 111 and a second side surface 112 are formed as the sealing resin 10. In other words, a step 12 of the sealing resin 10 is formed by cutting down to the lower surface 910s of the resin layer 910 with a dicing blade narrower than the dicing blade used to half-cut the resin layer 910. The semiconductor device 1A is manufactured through the above steps.

[0062] (action) Next, the operation of the semiconductor device 1A of this embodiment will be explained. The semiconductor device 1A of this embodiment comprises a conductive portion 20 and a semiconductor element 40 mounted on the conductive portion 20. The conductive portion 20 is composed of a plating layer. The conductive portion 20 includes mounting portions 24, 26 having mounting surfaces 241, 261 on which the semiconductor element 40 is mounted, and terminal portions 23, 25 extending from the mounting portions 24, 26 on the side opposite to the semiconductor element 40. The mounting portions 24, 26 extend in the X direction along the mounting surfaces 241, 261 more than the terminal portions 23, 25. The mounting portions 24, 26 and the terminal portions 23, 25 are integrally formed. In other words, the conductive portion 20 of this embodiment does not include an interface.

[0063] Here, a comparative example semiconductor device 1R to semiconductor device 1A of this embodiment will be described. Note that, for the components of the comparative example semiconductor device 1R, components similar to those of semiconductor device 1A of this embodiment will be denoted by the same reference numerals.

[0064] Figure 23 shows a cross-section of the comparative semiconductor device 1R. The sealing resin 60 of this semiconductor device 1R has a first resin layer 61 and a second resin layer 62 that covers the upper surface 61s of the first resin layer 61 and seals the conductive portion 70 and the semiconductor element 40. The conductive portion 70 has a terminal portion 71 that penetrates the first resin layer 61 from the upper surface 61s to the lower surface 61r, and a mounting portion 72 that is connected to the upper surface 71s of the terminal portion 71 and provided on the upper surface 61s of the first resin layer 61. The mounting portion 72 has a first metal layer 73 formed on the upper surface 71s of the terminal portion 71 and the upper surface 61s of the first resin layer 61, and a second metal layer 74 formed on the upper surface of the first metal layer 73.

[0065] The terminal portion 71 and the second metal layer 74 contain Cu and Cu alloy. The first metal layer 73 is formed as a seed layer for forming the second metal layer 74. The first metal layer 73 contains a Ti layer. The junction portion 30 is formed on the upper surface of the mounting portion 72. The semiconductor element 40 is mounted on the mounting portion 72 by the junction portion 30. The semiconductor device 1R has an external conductive film 50 that covers the surface of the conductive portion 70 exposed from the first resin layer 61.

[0066] This section outlines the manufacturing process for this semiconductor device 1R. As shown in Figure 24, the terminal portion 971 and the first resin layer 961 are formed. First, a seed layer 901 is formed on the main surface 900s of the support substrate 900, similar to the embodiment described above. A mask with an opening is formed on the seed layer 901, and a metal pillar that will become the terminal portion 971 is formed in the opening of the mask. After removing the mask and the exposed seed layer, a resin layer is formed to cover the metal pillar, and the metal pillar and the resin layer are cut to form the upper surface 961s of the first resin layer 961 and the upper surface 971s of the terminal portion 971.

[0067] As shown in Figure 25, the mounting portion 972 is formed. First, a seed layer is formed on the upper surface 961s of the first resin layer 961 and the upper surface 971s of the terminal portion 971. This seed layer includes a Ti layer that will become the first metal layer 73 and a Cu layer. The seed layer is formed, for example, by sputtering. A mask is formed to cover the seed layer and has an opening, and a second metal layer 974 is formed in the opening of the mask. After removing the mask, the seed layer exposed from the second metal layer 974 is removed to form the mounting portion 972 including the first metal layer 973 and the second metal layer 974.

[0068] As shown in Figure 26, a joint 30 is formed on the mounting portion 972, and the semiconductor element 40 is mounted on the mounting portion 972 by the joint 30. Then, a second resin layer 962 is formed that covers the upper surface 961s of the first resin layer 961 and seals the mounting portion 972, the joint 30, and the semiconductor element 40.

[0069] As shown in Figure 27, the support substrate 900 and seed layer 901 shown in Figure 26 are removed, and the first resin layer 961 is ground to form the lower surface 961r of the first resin layer 961 and the lower surface 712 of the terminal portion 71. Then, a separation groove is formed from the lower surface 961r of the first resin layer 961 toward the upper surface 962s of the second resin layer 962 to expose the side surfaces 714 and 724 of the terminal portion 71 and the mounting portion 72.

[0070] Next, similar to the embodiment described above, an external conductive film 50 is formed to cover the exposed surface (bottom surface 712 and side surface 714) of the terminal portion 71 and the side surface 724 of the mounting portion 72. Then, the second resin layer 962 is cut within the separation groove 912 to form individual pieces containing the semiconductor element 40, that is, the semiconductor device 1R of the comparative example shown in Figure 23.

[0071] In the comparative example semiconductor device 1R shown in Figure 23, the first resin layer 61 and the second resin layer 62 each contain fillers. In the semiconductor device 1R containing the first resin layer 61 and the second resin layer 62 in this way, an interface is formed between the first resin layer 61 and the second resin layer 62. This interface contains fillers processed by the process of forming the first resin layer 61 (grinding process), such as polished fillers. The interface can be confirmed by such fillers.

[0072] Furthermore, in the comparative example semiconductor device 1R shown in Figure 23, the conductive portion 70 includes an interface. As described above, the conductive portion 70 includes a terminal portion 71 and a mounting portion 72, and the mounting portion 72 includes a first metal layer 73 and a second metal layer 74. The terminal portion 71 and the second metal layer 74 are made of a Cu, Cu alloy, and the first metal layer 73 is made of a Ti layer. Therefore, the conductive portion 70 of the comparative example includes interfaces between the terminal portion 71 and the first metal layer 73, and between the first metal layer 73 and the second metal layer 74.

[0073] In the semiconductor device 1R formed in this manner, the conductive portion 70 is formed by multiple processes. As a result, adhesion may decrease between the terminal portion 71, the first metal layer 73, and the second metal layer 74 that constitute the conductive portion 70, meaning that the mechanical strength of the conductive portion 70 may decrease. This decrease in adhesion is easily caused by, for example, oxidation of the interface surface. When adhesion decreases in this way, delamination may occur at the interface of the conductive portion 70, including the interface.

[0074] Furthermore, delamination may occur at the interface due to the load during the manufacturing process. For example, when removing the support substrate 900 and seed layer 901 shown in Figure 25, the load applied to the terminal portion 971 may cause delamination at the interface between the terminal portion 971 and the first metal layer 973. Also, in the process of forming the separation groove 912 shown in Figure 26, the load applied by the dicing blade may cause delamination at the interface between the terminal portion 971 and the first metal layer 973.

[0075] In contrast, in the semiconductor device 1A of this embodiment, the terminal portions 23, 25 and mounting portions 24, 26 of the conductive portion 20 (first conductive portion 21 and second conductive portion 22) are integrally formed. In other words, the conductive portion 20 of this embodiment does not include an interface. As a result, the mechanical strength of the conductive portion 20 (first conductive portion 21 and second conductive portion 22) is improved compared to the semiconductor device 1R of the comparative example. Therefore, the occurrence of delamination between the terminal portions 23, 25 and the mounting portions 24, 26 can be suppressed.

[0076] Furthermore, in the semiconductor device 1A of this embodiment, the sealing resin 10 includes a filler. In the sealing resin 10 of this embodiment, there is no filler processed by the process between the first resin part 131 and the second resin part 132. This confirms that no interface is formed between the first resin part 131 and the second resin part 132, that is, the first resin part 131 and the second resin part 132 are integrally formed. As a result, the sealing resin 10 has improved mechanical strength compared to the semiconductor device 1R of the comparative example.

[0077] In this semiconductor device 1A, when mounted on a circuit board, the solder connecting the external conductive film 50 to the connection pads of the circuit board is interposed between the first conductive films 511, 521 and the connection pads, and also adheres to the second conductive films 512, 522. In other words, the solder, which becomes liquid phase due to the reflow process, climbs up the second conductive films 512, 522, and forms a solder fillet between the second conductive films 512, 522 and the connection pads. Thus, solder fillets are formed more easily in the semiconductor device 1A. These solder fillets increase the solder bonding area, thereby increasing the connection strength. Furthermore, the solder fillets allow the soldering condition of the semiconductor device 1A to be checked from the outside.

[0078] (effect) As described above, this embodiment provides the following effects. (1) The semiconductor device 1A comprises a conductive portion 20 and a semiconductor element 40 mounted on the conductive portion 20. The conductive portion 20 is composed of a plating layer. The conductive portion 20 includes mounting portions 24, 26 having mounting surfaces 241, 261 on which the semiconductor element 40 is mounted, and terminal portions 23, 25 extending on the side opposite to the semiconductor element 40 relative to the mounting portions 24, 26. The mounting portions 24, 26 extend in the X direction along the mounting surfaces 241, 261 more than the terminal portions 23, 25. The mounting portions 24, 26 and the terminal portions 23, 25 are integrally formed. In other words, the conductive portion 20 of this embodiment does not include an interface. This improves the mechanical strength of the conductive portion 20 (first conductive portion 21 and second conductive portion 22). Therefore, the occurrence of delamination between the terminal portions 23, 25 and the mounting portions 24, 26 can be suppressed.

[0079] (2) In the semiconductor device 1A of this embodiment, the sealing resin 10 includes a filler. In the sealing resin 10 of this embodiment, there is no filler processed by the process between the first resin part 131 and the second resin part 132. This makes it possible to confirm that no interface is formed between the first resin part 131 and the second resin part 132, that is, the first resin part 131 and the second resin part 132 are integrally formed. This makes it possible to improve the mechanical strength of the semiconductor device 1A of this embodiment.

[0080] (3) In this semiconductor device 1A, when mounted on a circuit board, the solder connecting the external conductive film 50 to the connection pads of the circuit board is interposed between the first conductive films 511, 521 and the connection pads, and also adheres to the second conductive films 512, 522. In other words, the solder, which has become liquid phase due to the reflow process, creeps up the second conductive films 512, 522, and forms a solder fillet between the second conductive films 512, 522 and the connection pads. In this way, solder fillets are formed more easily in the semiconductor device 1A. These solder fillets increase the solder bonding area and can further enhance the connection strength. In addition, the solder fillets allow the soldering status of the semiconductor device 1A to be checked from the outside.

[0081] (4) In the conductive portion 20, the terminal portions 23, 25 and the mounting portions 24, 26 are integrally formed. The plating layer 920, including the portions constituting the terminal portions 23, 25 and the portions constituting the mounting portions 24, 26, is grown in one step. This reduces the number of steps compared to when the terminal portions 23, 25 and the mounting portions 24, 26 are formed by plating growth separately. This reduces the time required for manufacturing and improves productivity.

[0082] (5) When the terminal portion 71 and the mounting portion 72 are plated separately, a seed layer is formed for the mounting portion 72. In contrast, in this embodiment, the plating layer 920, including the portions constituting the mounting portions 24 and 26, is grown all at once. This eliminates the time and effort required for the seed layer formation process. Consequently, the manufacturing time can be shortened and productivity can be improved.

[0083] (Example of change) The above embodiment can be modified as follows, for example. The above embodiment and the following modifications can be combined with each other as long as no technical inconsistencies arise. In the following modifications, parts common to the above embodiment are denoted by the same reference numerals as in the above embodiment, and their descriptions are omitted.

[0084] The above embodiment may also be configured to include three or more first conductive parts 21 and second conductive parts 22. • In the above embodiment, the number of first conductive parts 21 and the number of second conductive parts 22 may be different.

[0085] In the above embodiment, at least one of the third resin side surface 103 and the fourth resin side surface 104 may be configured to have an exposed conductive portion. In the above embodiment, the third resin side surface 103 and the fourth resin side surface 104, where the conductive portion 20 is not exposed, may be configured without a step 12. In other words, the first resin side surface 101 and the fourth resin side surface 104 may be configured so that the position of the first side surface 111 and the position of the second side surface 112 are the same when viewed from the Z direction.

[0086] (Note) The technical concepts that can be grasped from this disclosure are described below. Note that, not as an attempt to limit the scope but to aid understanding, the components described in the appendices are denoted by the corresponding reference numerals of the components in the embodiments. The reference numerals are provided as examples to aid understanding, and the components described in each appendice should not be limited to those indicated by the reference numerals.

[0087] (Note 1) Conductive parts (20, 21, 22) and The semiconductor element (40) mounted on the aforementioned conductive parts (20, 21, 22), Equipped with, The conductive parts (20, 21, 22) are composed of a plating layer. The conductive portion (20, 21, 22) includes a mounting portion (24, 26) having a mounting surface (241, 261) on which the semiconductor element (40) is mounted, and terminal portions (23, 25) extending from the mounting portion (24, 26) on the side opposite to the semiconductor element (40), The mounting portion (24, 26) extends in a first direction (X) along the mounting surface (241, 261) more than the terminal portion (23, 25), The mounting portion (24, 26) and the terminal portion (23, 25) are integrally formed. Semiconductor equipment.

[0088] (Note 2) The aforementioned mounting surface (241, 261) has connecting portions (30, 31, 32), The conductive portion (20) is electrically connected to the semiconductor element (40) by the junctions (30, 31, 32). The semiconductor device described in Appendix 1.

[0089] (Note 3) The semiconductor device according to Appendix 1 or Appendix 2, wherein the conductive portion (20) includes a first conductive portion (21) and a second conductive portion (22) arranged apart in the first direction.

[0090] (Note 4) The semiconductor device according to Appendix 3, comprising a sealing resin (10) that seals the first conductive portion (21) and the second conductive portion (22) and the semiconductor element (40).

[0091] (Note 5) The sealing resin (10) includes a first resin portion (131) between the terminal portions (23, 25) of the first conductive portion (21) and the terminal portions (23, 25) of the second conductive portion (22), and a second resin portion (132) between the mounting portions (24, 26) of the first conductive portion (21) and the mounting portions (24, 26) of the second conductive portion (22). The first resin part (131) and the second resin part (132) are integrally formed. Semiconductor device as described in Appendix 4.

[0092] (Note 6) The sealing resin (10) has a resin upper surface (10s) facing the same direction as the mounting surface and a resin lower surface (10r) facing the opposite direction from the resin upper surface (10s). The conductive portion (20) has a lower surface (232, 252) that is exposed from the lower resin surface (10r), The semiconductor device described in Appendix 4 or Appendix 5.

[0093] (Note 7) The sealing resin (10) has resin sides (101, 102) that intersect with the resin lower surface (10r), The conductive portion (20) has sides (234, 244, 254, 264) that are exposed from the resin sides (101, 102), Semiconductor device as described in Appendix 6.

[0094] (Note 8) The semiconductor device according to Appendix 7, having an external conductive film (50, 51, 52) that covers the lower surface (232, 252) and the side surfaces (234, 244, 254, 264) of the conductive portion (20) exposed from the sealing resin (10).

[0095] (Note 9) The semiconductor device according to any one of the appendices 1 to 8, wherein the mounting portion (24, 26) and the terminal portion (23, 25) are made of the same material.

[0096] (Note 10) The semiconductor device according to any one of the appendices 1 to 9, wherein the mounting portion (24, 26) and the terminal portion (23, 25) are made of a material containing Cu or a Cu alloy.

[0097] (Note 11) The semiconductor device according to any one of the appendices 1 to 10, wherein the thickness of the terminal portion (23, 25) is at least twice the thickness of the mounting portion (24, 26).

[0098] (Note 12) The semiconductor device according to any one of the appendices 1 to 11, wherein the thickness (T24, T26) of the mounting portion (24, 26) is 20 μm or more and 50 μm or less.

[0099] (Note 13) The semiconductor device according to any one of the appendices 1 to 12, wherein the thickness (T23, T25) of the terminal portion (23, 25) is 100 μm or more and 300 μm or less.

[0100] (Note 14) The semiconductor device according to any one of the appendices 1 to 13, wherein, in the first direction, the length (L24, L26) of the mounting portion (24, 26) extending from the terminal portion (23, 25) is less than or equal to the length (L23, L25) of the terminal portion (23, 25) in the first direction.

[0101] (Note 15) The semiconductor device according to Appendix 14, wherein the length (L24, L26) of the mounting portion (24, 26) in the first direction is 100 μm or more and 150 μm or less.

[0102] (Note 16) The semiconductor device according to Appendix 14 or Appendix 15, wherein the length (L23, L25) of the terminal portion (23, 25) in the first direction is 100 μm or more and 200 μm or less.

[0103] (Note 17) A method for manufacturing a semiconductor device comprising conductive parts (20, 21, 22) and a semiconductor element (40) mounted on the conductive parts (20, 21, 22), wherein the conductive parts (20, 21, 22) include mounting parts (24, 26) having mounting surfaces (242, 262) on which the semiconductor element (40) is mounted, and terminal parts (23, 25) extending from the mounting parts (24, 26) on the side opposite to the semiconductor element (40), is: The process includes a step of integrally forming the mounting portion (24, 26) and the terminal portion (23, 25) with a plating layer (920). A method for manufacturing a semiconductor device.

[0104] (Note 18) A step of forming a first mask (902) having a first opening (9021) for forming the terminal portions (23, 25), A step of forming a second mask (903) having a second opening (9031) for forming the mounting portion (24,26) on the first mask, Includes, In the process of integrally forming the conductive portion (20) and the terminal portions (23, 25), the plating metal is grown from the first opening (9021) of the first mask (902) to the second opening (9031) of the second mask (903) to form the plating layer (920). The method for manufacturing a semiconductor device as described in Appendix 17.

[0105] (Note 19) A method for manufacturing a semiconductor device according to Appendix 18, comprising the step of forming a resin layer (910) that seals the mounting portion (24, 26) and the semiconductor element (40).

[0106] (Note 20) A step of forming a third mask (904) having a third opening (9041) for forming joints (30, 31, 32) on the second mask (903) and the plating layer (920), A step of forming the joint portion (30) on the plating layer (920), A method for manufacturing a semiconductor device as described in Appendix 19, including the method described in Appendix 19.

[0107] (Note 21) A method for manufacturing a semiconductor device according to Appendix 209, comprising the step of mounting a semiconductor element (40) on the mounting portion (24, 26) using the junction portion (30).

[0108] (Note 22) The process involves preparing a support substrate (900), The process of forming a seed layer (901) on the upper surface of the support substrate (900), The first mask (902) is formed on the upper surface of the seed layer (901), A method for manufacturing a semiconductor device as described in any one of the appendices 19 to 21.

[0109] (Note 23) A step of removing the support substrate (900) and the seed layer (901) to expose the lower surface (232, 252) of the conductive portion (20), A step of forming a separation groove (912) in the resin layer (910) to expose the side surfaces (234, 244, 254, 264) of the conductive part (20), A method for manufacturing a semiconductor device as described in Appendix 22, including the method described in Appendix 22.

[0110] (Note 24) A method for manufacturing a semiconductor device as described in Appendix 23, comprising the step of forming an external conductive film (50, 51, 52) that covers the lower surface (232, 252) and the side surface (234, 244, 254, 264) of the conductive portion (20).

[0111] (Note 25) A method for manufacturing a semiconductor device according to Appendix 24, comprising the step of cutting the resin layer (910) within the separation groove to separate the semiconductor device into individual pieces.

[0112] (Note 1-1) A first conductive part and a second conductive part arranged apart in a first direction, Semiconductor elements mounted on the first conductive portion and the second conductive portion, A semiconductor device equipped with, The first conductive portion and the second conductive portion are composed of a plating layer. The first conductive portion includes a first mounting portion having a first mounting surface on which the semiconductor element is mounted, and a first terminal portion extending from the first mounting portion on the side opposite to the semiconductor element. The second conductive portion includes a second mounting portion having a second mounting surface on which the semiconductor element is mounted, and a second terminal portion extending from the second mounting portion on the side opposite to the semiconductor element. The first mounting portion extends in a first direction along the first mounting surface more than the first terminal portion and has a first protruding portion that protrudes from the first terminal portion toward the inside of the semiconductor device, the first protruding portion constituting a part of the first mounting surface, and a first bonding portion for bonding the semiconductor element to the first conductive portion is provided in the portion of the first mounting surface corresponding to the first protruding portion. The second mounting portion extends in a first direction along the second mounting surface more than the second terminal portion and has a second protruding portion that protrudes from the second terminal portion toward the inside of the semiconductor device, the second protruding portion constituting a part of the second mounting surface, and a second bonding portion for bonding the semiconductor element to the second conductive portion is provided in the portion of the second mounting surface corresponding to the second protruding portion. The first mounting portion and the first terminal portion are integrally formed, The second mounting portion and the second terminal portion are integrally formed. Semiconductor equipment.

[0113] (Appendix 1-2) The first conductive portion is electrically connected to the semiconductor element by the first junction, The second conductive portion is electrically connected to the semiconductor element by the second junction. Semiconductor device as described in Appendix 1-1.

[0114] (Appendix 1-3) The semiconductor element comprises an element substrate, a first electrode pad provided on the main surface of the element substrate, a first redistribution layer connected to the first electrode pad, a first element electrode connected to the first redistribution layer, a second electrode pad provided on the main surface of the element substrate, a second redistribution layer connected to the second electrode pad, and a second element electrode connected to the second redistribution layer. The first element electrode is positioned so as not to overlap with the first electrode pad when viewed from the thickness direction of the semiconductor element. The second element electrode is positioned so as to not overlap with the second electrode pad when viewed from the thickness direction of the semiconductor element. The first element electrode is electrically connected to the first conductive portion by the first junction, The second element electrode is electrically connected to the second conductive portion by the second junction. Semiconductor device as described in Appendix 1-1 or Appendix 1-2.

[0115] (Appendix 1-4) The first joint includes a first plating layer provided on the first mounting surface of the first mounting portion and a first solder layer provided between the first plating layer and the first element electrode. The second joint includes a second plating layer provided on the second mounting surface of the second mounting portion and a second solder layer provided between the second plating layer and the second element electrode. The first solder layer connects the first plating layer and the first element electrode. The aforementioned second solder layer connects the aforementioned second plating layer and the aforementioned second element electrode. Semiconductor devices as described in Appendix 1-3.

[0116] (Appendix 1-5) A semiconductor device according to any one of the appendices 1-1 to 1-4, comprising a sealing resin for sealing the first conductive portion and the second conductive portion and the semiconductor element.

[0117] (Appendix 1-6) The sealing resin includes a first resin portion between the first terminal portion of the first conductive portion and the second terminal portion of the second conductive portion, and a second resin portion between the first mounting portion of the first conductive portion and the second mounting portion of the second conductive portion. The first resin part and the second resin part are integrally formed. Semiconductor devices as described in Appendix 1-5.

[0118] (Appendix 1-7) The sealing resin has a resin upper surface facing the same direction as the first mounting surface and the second mounting surface, and a resin lower surface facing the opposite direction from the resin upper surface. The first conductive portion and the second conductive portion have a lower surface that is exposed from the lower surface of the resin. Semiconductor devices as described in Appendix 1-5 or Appendix 1-6.

[0119] (Appendix 1-8) The sealing resin has a resin side surface that intersects with the resin lower surface, The first conductive portion and the second conductive portion have sides that are exposed from the resin side, Semiconductor devices as described in Appendix 1-7.

[0120] (Appendix 1-9) The semiconductor device according to Appendix 1-8, having an external conductive film covering the lower surface and side surface of the first conductive portion exposed from the sealing resin, and an external conductive film covering the lower surface and side surface of the second conductive portion.

[0121] (Appendix 1-10) A semiconductor device comprising a first conductive portion and a second conductive portion arranged apart in a first direction, and a semiconductor element mounted on the first conductive portion and the second conductive portion, wherein the first conductive portion includes a first mounting portion having a first mounting surface on which the semiconductor element is mounted, and a first terminal portion extending from the first mounting portion toward the side opposite to the semiconductor element, the second conductive portion includes a second mounting portion having a second mounting surface on which the semiconductor element is mounted, and a second terminal portion extending from the second mounting portion toward the side opposite to the semiconductor element, the first mounting portion extends in the first direction along the first mounting surface more than the first terminal portion, and extends from the first terminal portion toward the inside of the semiconductor device The method for manufacturing the semiconductor device is as follows: The semiconductor device has a first protruding portion that protrudes toward a certain direction, the first protruding portion constituting a part of the first mounting surface, and a first bonding portion for bonding the semiconductor element to a first conductive portion is provided in the portion of the first mounting surface corresponding to the first protruding portion, and the second mounting portion extends in a first direction along the second mounting surface more than the second terminal portion and has a second protruding portion that protrudes toward the inside of the semiconductor device from the second terminal portion, the second protruding portion constituting a part of the second mounting surface, and a second bonding portion for bonding the semiconductor element to a second conductive portion is provided in the portion of the second mounting surface corresponding to the second protruding portion, A step of integrally forming the first mounting portion and the first terminal portion by a plating layer, and integrally forming the second mounting portion and the second terminal portion, A step of forming a third mask having a third opening for forming the first joint and the second joint, and growing a plating layer and a solder layer in the third opening, Equipped with, A method for manufacturing a semiconductor device.

[0122] (Appendix 1-11) A step of forming a first mask having a first opening for forming the first terminal portion and the second terminal portion, A step of forming a second mask on the first mask, having a second opening for forming the first mounting portion and the second mounting portion, Includes, In the process of integrally forming the first conductive portion and the first terminal portion, and integrally forming the second conductive portion and the second terminal portion, the plating metal is grown from the first opening of the first mask to the second opening of the second mask to form the plating layer. A method for manufacturing a semiconductor device as described in Appendix 1-10.

[0123] (Appendix 1-12) A method for manufacturing a semiconductor device according to Appendix 1-11, comprising the step of forming a resin layer that encapsulates the first mounting portion, the second mounting portion, and the semiconductor element.

[0124] (Note 2-1) A semiconductor device according to one aspect of the present disclosure comprises a conductive portion and a semiconductor element mounted on the conductive portion, wherein the conductive portion is composed of a plating layer, and the conductive portion includes a mounting portion having a mounting surface on which the semiconductor element is mounted and a terminal portion extending toward the opposite side from the semiconductor element with respect to the mounting portion, the mounting portion extending toward a first direction along the mounting surface than the terminal portion, and the mounting portion and the terminal portion are integrally formed.

[0125] (Note 2-2) A method for manufacturing a semiconductor device according to one aspect of the present disclosure comprises a conductive portion and a semiconductor element mounted on the conductive portion, wherein the conductive portion includes a mounting portion having a mounting surface on which the semiconductor element is mounted and a terminal portion extending toward the opposite side from the semiconductor element with respect to the mounting portion, and the method for manufacturing a semiconductor device comprises a step of integrally forming the mounting portion and the terminal portion by a plating layer.

[0126] (Note 3-1) A first conductive part and a second conductive part arranged apart in a first direction, Semiconductor elements mounted on the first conductive portion and the second conductive portion, A sealing resin that seals the first conductive portion, the second conductive portion and the semiconductor element, A first external conductive film and a second external conductive film covering the first conductive portion and the second conductive portion, respectively, A semiconductor device equipped with, The first conductive portion and the second conductive portion are composed of a plating layer. The first conductive portion includes a first mounting portion having a first mounting surface on which the semiconductor element is mounted, and a first terminal portion extending from the first mounting portion on the side opposite to the semiconductor element. The second conductive portion includes a second mounting portion having a second mounting surface on which the semiconductor element is mounted, and a second terminal portion extending from the second mounting portion on the side opposite to the semiconductor element. The first mounting portion extends in a first direction along the first mounting surface more than the first terminal portion and has a first protruding portion that protrudes from the first terminal portion toward the inside of the semiconductor device, the first protruding portion constituting a part of the first mounting surface, and a first bonding portion for bonding the semiconductor element to the first conductive portion is provided in the portion of the first mounting surface corresponding to the first protruding portion. The second mounting portion extends in a first direction along the second mounting surface more than the second terminal portion and has a second protruding portion that protrudes from the second terminal portion toward the inside of the semiconductor device, the second protruding portion constituting a part of the second mounting surface, and a second bonding portion for bonding the semiconductor element to the second conductive portion is provided in the portion of the second mounting surface corresponding to the second protruding portion. The first mounting portion and the first terminal portion are integrally formed, The second mounting portion and the second terminal portion are integrally formed, The sealing resin has a resin upper surface facing the same direction as the first mounting surface and the second mounting surface, a resin lower surface facing the opposite direction from the resin upper surface, and a first resin side surface and a second resin side surface intersecting the resin lower surface. The first conductive portion has a first conductive portion side surface exposed from the first resin side surface and a first conductive portion lower surface exposed from the resin lower surface, The first external conductive film covers the lower surface and side surface of the first conductive portion that are exposed from the sealing resin. The second conductive portion has a second conductive portion side surface exposed from the second resin side surface and a second conductive portion lower surface exposed from the resin lower surface, The second external conductive film covers the lower surface and side surface of the second conductive portion that are exposed from the sealing resin. If the direction perpendicular to the first mounting surface and the second mounting surface is defined as the second direction, The position in the second direction is the same from the portion corresponding to the first protruding portion on the first mounting surface to the portion corresponding to the first terminal portion on the first mounting surface that is in contact with the first resin side surface, The position in the second direction from the portion corresponding to the second protruding portion on the second mounting surface to the portion corresponding to the second terminal portion on the second mounting surface that is in contact with the second resin side surface is the same. Semiconductor equipment.

[0127] (Appendix 3-2) Viewed from the second direction, the first terminal portion and the semiconductor element overlap each other at least partially. Viewed from the second direction, the second terminal portion and the semiconductor element overlap each other at least partially. Semiconductor equipment as described in Appendix 3-1.

[0128] (Appendix 3-3) The first conductive portion is electrically connected to the semiconductor element by the first junction, The second conductive portion is electrically connected to the semiconductor element by the second junction. Semiconductor equipment as described in Appendix 3-1 or Appendix 3-2.

[0129] (Appendix 3-4) The semiconductor element comprises an element substrate, a first electrode pad provided on the main surface of the element substrate, a first redistribution layer connected to the first electrode pad, a first element electrode connected to the first redistribution layer, a second electrode pad provided on the main surface of the element substrate, a second redistribution layer connected to the second electrode pad, and a second element electrode connected to the second redistribution layer. The first element electrode is positioned so as not to overlap with the first electrode pad when viewed from the thickness direction of the semiconductor element. The second element electrode is positioned so as to not overlap with the second electrode pad when viewed from the thickness direction of the semiconductor element. The first element electrode is electrically connected to the first conductive portion by the first junction, The second element electrode is electrically connected to the second conductive portion by the second junction. A semiconductor device as described in any one of the appendices 3-1 to 3-3.

[0130] (Appendix 3-5) The first joint includes a first plating layer provided on the first mounting surface of the first mounting portion and a first solder layer provided between the first plating layer and the first element electrode. The second joint includes a second plating layer provided on the second mounting surface of the second mounting portion and a second solder layer provided between the second plating layer and the second element electrode. The first solder layer connects the first plating layer and the first element electrode. The aforementioned second solder layer connects the aforementioned second plating layer and the aforementioned second element electrode. Semiconductor equipment as described in Appendix 3-4.

[0131] (Appendix 3-6) The sealing resin includes a first resin portion between the first terminal portion of the first conductive portion and the second terminal portion of the second conductive portion, and a second resin portion between the first mounting portion of the first conductive portion and the second mounting portion of the second conductive portion. The first resin part and the second resin part are integrally formed. A semiconductor device described in any one of the appendices 3-1 to 3-5.

[0132] (Appendix 3-7) A semiconductor device comprising: a first conductive portion and a second conductive portion arranged apart in a first direction; a semiconductor element mounted on the first conductive portion and the second conductive portion; a sealing resin that seals the first conductive portion and the second conductive portion and the semiconductor element; and a first external conductive film and a second external conductive film that cover the first conductive portion and the second conductive portion, respectively, wherein the first conductive portion includes a first mounting portion having a first mounting surface on which the semiconductor element is mounted, and a first terminal portion extending from the first mounting portion on the side opposite to the semiconductor element, and the second conductive portion is The first mounting portion includes a second mounting surface on which a semiconductor element is mounted, and a second terminal portion extending toward the side opposite to the semiconductor element relative to the second mounting portion, wherein the first mounting portion extends in a first direction along the first mounting surface from the first terminal portion and has a first protruding portion that protrudes toward the inside of the semiconductor device from the first terminal portion, the first protruding portion constitutes a part of the first mounting surface, and a first bonding portion for bonding the semiconductor element to a first conductive portion is provided in the portion of the first mounting surface corresponding to the first protruding portion, and the second mounting portion The second protruding portion extends in the first direction along the second mounting surface from the second terminal portion and has a second protruding portion that protrudes inward from the second terminal portion toward the inside of the semiconductor device, the second protruding portion forming a part of the second mounting surface, and a second bonding portion for bonding the semiconductor element to the second conductive portion is provided in the portion of the second mounting surface corresponding to the second protruding portion, the sealing resin has a resin upper surface facing the same direction as the first mounting surface and the second mounting surface, a resin lower surface facing the opposite side of the resin upper surface, and a first resin side surface intersecting the resin lower surface The semiconductor device manufacturing method is as follows: The semiconductor device has a first conductive portion having a first conductive portion side surface exposed from the first resin side surface and a first conductive portion lower surface exposed from the resin lower surface, the first external conductive film covers the first conductive portion lower surface and the first conductive portion side surface exposed from the sealing resin, the second conductive portion having a second conductive portion side surface exposed from the second resin side surface and a second conductive portion lower surface exposed from the resin lower surface, and the second external conductive film covers the second conductive portion lower surface and the second conductive portion side surface exposed from the sealing resin. A step of integrally forming the first mounting portion and the first terminal portion by a plating layer, and integrally forming the second mounting portion and the second terminal portion, A step of forming a third mask having a third opening for forming the first joint and the second joint, and growing a plating layer and a solder layer in the third opening, Equipped with, If the direction perpendicular to the first mounting surface and the second mounting surface is defined as the second direction, The steps of integrally forming the first mounting portion and the first terminal portion, and integrally forming the second mounting portion and the second terminal portion, are to integrally form the first mounting portion and the first terminal portion such that the position in the second direction from the portion corresponding to the first protruding portion on the first mounting surface to the portion corresponding to the first terminal portion on the first mounting surface that contacts the first resin side surface is the same, and to integrally form the second mounting portion and the second terminal portion such that the position in the second direction from the portion corresponding to the second protruding portion on the second mounting surface to the portion corresponding to the second terminal portion on the second mounting surface that contacts the second resin side surface is the same. A method for manufacturing a semiconductor device.

[0133] (Appendix 3-8) Viewed from the second direction, the first terminal portion and the semiconductor element overlap each other at least partially. Viewed from the second direction, the second terminal portion and the semiconductor element overlap each other at least partially. The method for manufacturing a semiconductor device as described in Appendix 3-7.

[0134] (Appendix 3-9) A step of forming a first mask having a first opening for forming the first terminal portion and the second terminal portion, A step of forming a second mask on the first mask, having a second opening for forming the first mounting portion and the second mounting portion, Includes, In the process of integrally forming the first conductive portion and the first terminal portion, and integrally forming the second conductive portion and the second terminal portion, the plating metal is grown from the first opening of the first mask to the second opening of the second mask to form the plating layer. A method for manufacturing a semiconductor device as described in Appendix 3-7 or Appendix 3-8.

[0135] (Appendix 3-10) A method for manufacturing a semiconductor device according to Appendix 3-9, comprising the step of forming a resin layer that seals the first mounting portion, the second mounting portion, and the semiconductor element.

[0136] The above description is illustrative only. Those skilled in the art will recognize that many more possible combinations and substitutions are possible beyond the components and methods (manufacturing processes) enumerated for the purpose of illustrating the technology of this disclosure. This disclosure is intended to encompass all alternatives, variations, and modifications that fall within the scope of this disclosure, including the claims. [Explanation of symbols]

[0137] 1A, 1R... Semiconductor device, 10... Encapsulating resin, 10r... Resin bottom surface, 10s... Resin top surface, 101... First resin side surface, 102... Second resin side surface, 103... Third resin side surface, 104... Fourth resin side surface, 111... First side surface, 112... Second side surface, 12... Step, 131... First resin part, 132... Second resin part, 20... Conductive part, 21... First conductive part, 22... Second conductive part, 23... First terminal part, 232... Bottom surface, 233... Side surface, 234... Side surface, 24... First mounting part, 24A... Protruding part, 241... Top surface, mounting surface, 242... Bottom surface, 243... Side surface, 244... Side surface, 25... Second terminal part, 252... Bottom surface, 253 ...side, 254...side, 26...second mounting section, 26A...protruding section, 261...top surface, mounting surface, 262...bottom surface, 263...side, 264...side, 30...joint, 31...first joint, 32...second joint, 33...plating layer, 34...solder layer, 40...semiconductor element, 41...element substrate, 41r...back surface of substrate, 41s...main surface of substrate, 411...first substrate side, 412...second substrate side, 413...third substrate side, 414...fourth substrate side, 42...electrode pad, 421...first electrode pad, 422...second electrode pad, 43...insulating film, 43s...surface, 44...redistribution layer, 441...first redistribution layer, 442 …Second redistribution layer, 45…Element electrode, 451…First element electrode, 452…Second element electrode, 461…Conductive layer, 462…Barrier layer, 50…Outer conductive film, 51…First outer conductive film, 511…First conductive film, 512…Second conductive film, 52…Second outer conductive film, 521…First conductive film, 522…Second conductive film, 60…Sealing resin, 61…First resin layer, 61r…Bottom surface, 61s…Top surface, 62…Second resin layer, 70…Conductive part, 71…Terminal part, 71s…Top surface, 712…Bottom surface, 714…Side surface, 72…Mounting part, 724…Side surface, 73…First metal layer, 74…Second metal layer, 900…Support substrate, 900r…Back surface, 900s...Main surface, 901...Seed layer, 901s...Top surface, 902...First mask, 9021...First opening, 903...Second mask, 903s...Top surface, 9031...Second opening, 904...Third mask, 9041...Third opening, 910...Resin layer, 910r...Top surface, 910s...Bottom surface, 912...Separation groove, 920...Plating layer, 920s...Top surface, 961...First resin layer, 961r...Bottom surface, 961s...Top surface, 962...Second resin layer, 971...Terminal section, 971s...Top surface, 972...Mounting section, 973...First metal layer, 974...Second metal layer, DL1...Dashed line, DL2...Cutting line, L23~L26...LengthT23~T26...thickness.

Claims

1. A first conductive part and a second conductive part arranged apart in a first direction, Semiconductor elements mounted on the first conductive portion and the second conductive portion, A sealing resin that seals the first conductive portion, the second conductive portion and the semiconductor element, A semiconductor device equipped with, The first conductive portion and the second conductive portion are composed of a plating layer. The first conductive portion includes a first mounting portion having a first mounting surface on which the semiconductor element is mounted, and a first terminal portion extending from the first mounting portion on the side opposite to the semiconductor element. The second conductive portion includes a second mounting portion having a second mounting surface on which the semiconductor element is mounted, and a second terminal portion extending from the second mounting portion on the side opposite to the semiconductor element. The first mounting portion extends in a first direction along the first mounting surface more than the first terminal portion and has a first protruding portion that protrudes from the first terminal portion toward the inside of the semiconductor device, the first protruding portion constituting a part of the first mounting surface, and a first bonding portion for bonding the semiconductor element to the first conductive portion is provided in the portion of the first mounting surface corresponding to the first protruding portion. The second mounting portion extends in the first direction along the second mounting surface more than the second terminal portion and has a second protruding portion that protrudes from the second terminal portion toward the inside of the semiconductor device, the second protruding portion constituting a part of the second mounting surface, and a second bonding portion for bonding the semiconductor element to the second conductive portion is provided in the portion of the second mounting surface corresponding to the second protruding portion. The first mounting portion and the first terminal portion are integrally formed, The second mounting portion and the second terminal portion are integrally formed, The sealing resin has a resin upper surface facing the same direction as the first mounting surface and the second mounting surface, and a resin lower surface facing the opposite direction from the resin upper surface. The first conductive portion has a lower surface of the first conductive portion that is exposed from the lower surface of the resin, The second conductive portion has a lower surface of the second conductive portion that is exposed from the lower surface of the resin, If the direction perpendicular to the first mounting surface and the second mounting surface is defined as the second direction, Viewed from the second direction, the first terminal portion and the semiconductor element overlap each other at least partially. Viewed from the second direction, the second terminal portion and the semiconductor element overlap each other at least partially. Semiconductor equipment.

2. The first conductive portion is electrically connected to the semiconductor element by the first junction, The second conductive portion is electrically connected to the semiconductor element by the second junction. The semiconductor device according to claim 1.

3. The semiconductor element comprises an element substrate, a first electrode pad provided on the main surface of the element substrate, a first redistribution layer connected to the first electrode pad, a first element electrode connected to the first redistribution layer, a second electrode pad provided on the main surface of the element substrate, a second redistribution layer connected to the second electrode pad, and a second element electrode connected to the second redistribution layer. The first element electrode is positioned so as not to overlap with the first electrode pad when viewed from the thickness direction of the semiconductor element. The second element electrode is positioned such that it does not overlap with the second electrode pad when viewed from the thickness direction of the semiconductor element. The first element electrode is electrically connected to the first conductive portion by the first junction, The second element electrode is electrically connected to the second conductive portion by the second junction. The semiconductor device according to claim 1 or claim 2.

4. The first joint includes a first plating layer provided on the first mounting surface of the first mounting portion and a first solder layer provided between the first plating layer and the first element electrode. The second joint includes a second plating layer provided on the second mounting surface of the second mounting portion and a second solder layer provided between the second plating layer and the second element electrode. The first solder layer connects the first plating layer and the first element electrode. The second solder layer connects the second plating layer and the second element electrode. The semiconductor device according to claim 3.

5. The sealing resin includes a first resin portion between the first terminal portion of the first conductive portion and the second terminal portion of the second conductive portion, and a second resin portion between the first mounting portion of the first conductive portion and the second mounting portion of the second conductive portion. The first resin part and the second resin part are integrally formed. A semiconductor device according to any one of claims 1 to 4.

6. A semiconductor device comprising: a first conductive portion and a second conductive portion arranged apart in a first direction; a semiconductor element mounted on the first conductive portion and the second conductive portion; and a sealing resin for sealing the first conductive portion, the second conductive portion and the semiconductor element, wherein the first conductive portion includes a first mounting portion having a first mounting surface on which the semiconductor element is mounted, and a first terminal portion extending from the first mounting portion toward the side opposite to the semiconductor element, the second conductive portion includes a second mounting portion having a second mounting surface on which the semiconductor element is mounted, and a second terminal portion extending from the second mounting portion toward the side opposite to the semiconductor element, the first mounting portion extends in the first direction along the first mounting surface from the first terminal portion and has a first protruding portion that protrudes from the first terminal portion toward the inside of the semiconductor device, the first protruding portion constitutes a part of the first mounting surface, and A first bonding portion for bonding the semiconductor element to the first conductive portion is provided in the portion of the first mounting surface corresponding to the first protruding portion, the second mounting portion has a second protruding portion that extends in the first direction along the second mounting surface more than the second terminal portion and protrudes inward from the second terminal portion toward the inside of the semiconductor device, the second protruding portion constitutes a part of the second mounting surface, a second bonding portion for bonding the semiconductor element to the second conductive portion is provided in the portion of the second mounting surface corresponding to the second protruding portion, the sealing resin has a resin upper surface facing the same direction as the first mounting surface and the second mounting surface and a resin lower surface facing the opposite side of the resin upper surface, the first conductive portion has a first conductive portion lower surface exposed from the resin lower surface, and the second conductive portion has a second conductive portion lower surface exposed from the resin lower surface, the method for manufacturing the semiconductor device is: A step of integrally forming the first mounting portion and the first terminal portion by a plating layer, and integrally forming the second mounting portion and the second terminal portion, A step of forming a third mask having a third opening for forming the first joint and the second joint, and growing a plating layer and a solder layer in the third opening, Equipped with, If the direction perpendicular to the first mounting surface and the second mounting surface is defined as the second direction, The steps of integrally forming the first mounting portion and the first terminal portion, and integrally forming the second mounting portion and the second terminal portion, are to integrally form the first mounting portion and the first terminal portion such that, when viewed from the second direction, the first terminal portion and the semiconductor element overlap each other at least partially, and to integrally form the second mounting portion and the second terminal portion such that, when viewed from the second direction, the second terminal portion and the semiconductor element overlap each other at least partially. A method for manufacturing a semiconductor device.

7. A step of forming a first mask having a first opening for forming the first terminal portion and the second terminal portion, A step of forming a second mask on the first mask, having a second opening for forming the first mounting portion and the second mounting portion, Includes, In the process of integrally forming the first conductive portion and the first terminal portion, and integrally forming the second conductive portion and the second terminal portion, the plating metal is grown from the first opening of the first mask to the second opening of the second mask to form the plating layer. The method for manufacturing a semiconductor device according to claim 6.

8. A method for manufacturing a semiconductor device according to claim 7, comprising the step of forming a resin layer that seals the first mounting portion, the second mounting portion, and the semiconductor element.

Citation Information

Patent Citations

  • Semiconductor device

    JP2013239740A