High-performance power integrated circuit semiconductor devices

The dielectric-isolated, vertically structured power integrated circuit semiconductor device with SiC and novel single-crystal islands addresses the limitations of current devices by integrating reverse-conducting elements with FWD functionality, achieving high voltage, current capacity, and low losses while minimizing chip size and costs.

JP2026063915APending Publication Date: 2026-04-13菅原良孝
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
菅原良孝
Filing Date
2024-10-01
Publication Date
2026-04-13

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Abstract

The present invention provides a high-power capacity power integrated circuit semiconductor device that incorporates a vertical semiconductor element (including a vertical reverse-conducting semiconductor element) that achieves low loss and small chip area, and also achieves high reliability by significantly suppressing the snapback phenomenon unique to reverse-conducting semiconductor elements. [Solution] The Si vertical reverse conducting IGBT integrates vertical semiconductor elements by stacking and layering a semiconductor chip body of a dielectric isolated integrated circuit, consisting of an element integration substrate equivalent portion 101 in which single crystal islands containing integrated circuit constituent elements are laid out in isolation regions 117 via an SiO2 film 106 which is a dielectric insulating isolation film, and an element support substrate equivalent portion 102 which has both a support function and a conductive path function for the element integration substrate equivalent portion.
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