Support substrates, composite substrates, electronic devices and modules

By employing a polycrystalline support substrate with a specific crystal grain orientation, the Q value of elastic wave filters is enhanced, resulting in improved resonator performance.

JP2026065611APending Publication Date: 2026-04-15QUANZHOU SANAN INTEGRATED CIRCUIT CO LTD
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
QUANZHOU SANAN INTEGRATED CIRCUIT CO LTD
Filing Date
2025-09-02
Publication Date
2026-04-15

AI Technical Summary

Technical Problem

Existing designs for elastic wave filters, such as SAW filter devices, do not effectively improve the Q value by focusing on the support substrate, which is crucial for resonator performance at radio and microwave frequencies.

Method used

A support substrate made of polycrystalline material with a specific crystal orientation ratio, particularly with (101) oriented crystal grains exceeding 7% in a 150 μm × 150 μm observation area, enhances the Q value by optimizing the occupancy ratio of these grains.

Benefits of technology

The designed support substrate significantly improves the Q value of electronic devices, leading to high-quality and high-performance filter devices.

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Abstract

The present invention provides support substrates, composite substrates, electronic devices, and modules that effectively improve the Q value by having a specific crystal orientation ratio. [Solution] The support substrate 11 is made of a polycrystalline material and has a main support surface 111. The observation area on the main support surface or a cross-section parallel to the main support surface contains (101) oriented crystal grains. In the observation area, the number of (101) oriented crystal grains accounts for 7% or more of the total number of crystal grains in the observation area. The observation area is any one of the square regions with sides of 150 μm on a predetermined surface.
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Description

Technical Field

[0001] The present invention relates to the technical field of processing and manufacturing of electronic devices, and particularly relates to support substrates, composite substrates, electronic devices and modules.

Background Art

[0002] The Q value (resonator quality factor, Quality Factor) is an important parameter indicating the performance of a resonator, and is particularly important in resonators, filters and other electronic components at radio frequencies and microwave frequencies. In conventional elastic wave filters, such as SAW (Surface Acoustic Wave) filter devices, design improvements have been made regarding the piezoelectric layer or IDT (Interdigital Transducer). However, at present, no design method for improving the Q value of a device by focusing on the support substrate has been proposed.

Summary of the Invention

[0003] An object of the present invention is to improve the Q value of a device. To achieve this object, a support substrate, a composite substrate, an electronic device and a module are provided. The support substrate according to the present invention has a specific crystal orientation ratio and can effectively increase the Q value.

[0004] One embodiment of the present invention provides a support substrate. The support substrate is made of a polycrystalline material and has a main support surface. In any cross-sectional observation region parallel to the main support surface or the main support surface, crystal grains with (101) orientation are provided. In the observation region, the number of crystal grains with (101) orientation is 7% or more of the total number of crystal grains in the support substrate, and the observation region is a region of 150 μm × 150 μm.

[0005] One embodiment of the present invention provides a composite substrate. The composite substrate includes the support substrate.

[0006] One embodiment of the present invention provides an electronic device, the electronic device comprising the composite substrate.

[0007] One embodiment of the present invention provides a module. The module comprises a wiring board, a plurality of external connection terminals, an inductor, a sealing portion, and the electronic device.

[0008] The above-described embodiments of the present invention have at least one or more of the following advantageous effects. That is, by designing the occupancy ratio of crystal grains having a specific orientation in the support substrate, the Q value of the manufactured electronic device can be improved, and a high-quality and high-performance filter device can be obtained. [Brief explanation of the drawing]

[0009] Hereinafter, specific embodiments of the present invention will be described in detail with reference to the drawings.

[0010] Figure 1 is a schematic diagram showing the configuration of a support substrate according to one embodiment of the present invention.

[0011] Figure 2 is a distribution diagram of crystal grains of various orientations in a support substrate according to one embodiment of the present invention.

[0012] Figure 3 is a distribution diagram of crystal grains of various orientations in a support substrate according to another embodiment of the present invention.

[0013] Figure 4 is a distribution diagram of crystal grains of various orientations in a support substrate according to yet another embodiment of the present invention.

[0014] Figure 5 is a distribution diagram of crystal grains of various orientations in a support substrate according to yet another embodiment of the present invention.

[0015] Figure 6 is a schematic diagram showing the configuration of a composite substrate according to one embodiment of the present invention.

[0016] Figure 7 is a schematic diagram showing the configuration of an electronic device according to one embodiment of the present invention.

[0017] Figure 8 is a schematic diagram showing the configuration of an electronic device according to another embodiment of the present invention.

[0018] Figure 9 is a schematic diagram showing the configuration of an electronic device according to yet another embodiment of the present invention.

[0019] Figure 10 is a schematic diagram showing the configuration of an electronic device according to yet another embodiment of the present invention.

[0020] Figure 11 is a schematic diagram showing the configuration of a module according to an embodiment of the present invention. Explanation of reference numerals

[0021] The explanation of the reference numerals of each member used in the drawings is as follows.

[0022] 1000: Module 100: Electronic device 10: Composite substrate 11: Support substrate 111: Main support surface 112: Back surface 113: Side surface 12: Piezoelectric layer 121: Main surface 13: Intermediate layer 20: Electrode 21: IDT electrode 22: Electrode pad 30: Package substrate 41: First sealing structure 42: Second sealing structure 51: Bump 52: First conductive part 53: First external terminal electrode 54: Second conductive part 55: Second external terminal electrode 60: Gap 70: Cover 400: Inductor 500: Sealing part 600: Integrated circuit component 700: Wiring substrate 701: External connection terminal Embodiment

[0023] To further clarify the above-mentioned objectives, features, and advantages of the present invention, specific embodiments of the present invention will be described in detail below with reference to the drawings.

[0024] To enable those skilled in the art to better understand the technical means of the present invention, the technical means according to embodiments of the present invention will be described clearly and completely below with reference to the drawings of embodiments of the present invention. The embodiments described herein represent only a portion of the present invention and do not encompass all possible examples. All other embodiments that can be obtained by those skilled in the art without requiring any creative effort based on the embodiments of the present invention are included within the scope of protection of the present invention.

[0025] Furthermore, terms such as “first,” “second,” etc., used in this specification, the claims, and the drawings are for distinguishing similar subjects and do not limit any particular order or priority. Such terms are interchangeable where appropriate, and it should be understood that embodiments of the present invention may be implemented in an order other than that illustrated or described herein. Also, “includes” and “has,” and their variations, mean non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes multiple steps or components may further include other steps or components not listed, or may include elements inherent to them.

[0026] Furthermore, it should be noted that the classification of the multiple embodiments in this invention is for convenience only and should not be interpreted restrictively. The features described in each embodiment can be used in combination and cross-referenced, as long as they do not contradict each other.

[0027] Referring to Figure 1, a support substrate 11 according to one embodiment of the present invention is provided. The support substrate 11 is made of a polycrystalline material and has a main support surface 111. The observation area on the main support surface 111 or on any cross-section parallel to the main support surface 111 contains (101) oriented crystal grains. In the observation area, the number of (101) oriented crystal grains is 7% or more of the total number of crystal grains in the observation area, and the observation area is a region of 150 μm × 150 μm. In short, this means that the occupancy rate of (101) oriented crystal grains in the observation area is 7% or more. In some specific embodiments, the occupancy rate of (101) oriented crystal grains in the observation area is 7 to 20%, for example, 7%, 10%, 12%, 15%, 19%, etc.

[0028] The support substrate 11 is made of, for example, a spinel-type material, and contains multiple crystal grains. These multiple crystal grains have, for example, a spinel-type structure. More specifically, in the spinel-type structure, oxygen ions are arranged in cubic close packing (CCP), with divalent cations occupying 1 / 8 of the tetrahedral gaps and trivalent cations occupying 1 / 2 of the octahedral gaps. The general formula for the spinel-type structure is AB2O4, where A is the element of the divalent cation, B is the element of the trivalent cation, and O is the element oxygen. Magnesium aluminate spinel (chemical formula: MgAl2O4) is a typical example of a spinel-type structure. In some embodiments, polycrystalline magnesium aluminate spinel may be used as the main material of the support substrate 11.

[0029] The average grain size of the crystal grains contained in the support substrate 11 is 1 to 100 μm. That is, the support substrate may contain crystal grains of different grain sizes, for example, crystal grains with different grain sizes such as 3 μm, 25 μm, 40 μm, 50 μm, 60 μm, and 100 μm. In this case, the grain size of the smallest crystal grain is 1 μm or larger, and the grain size of the largest crystal grain is 100 μm or smaller. The average grain size of these multiple crystal grains with different grain sizes is the average grain size of the support substrate 11. As a method for calculating the average grain size, for example, the support substrate 11 may be divided into multiple regions, the number of crystal grains of each grain size present in each region may be statistically determined, and a weighted average may be performed using the number of grains for each grain size as a weight. In other words, the average grain size of the support substrate 11 is defined as the weighted average value of the grain sizes of all crystal grains in the support substrate.

[0030] The main support surface 111 is the surface for supporting the piezoelectric layer; that is, when the support substrate 11 and the piezoelectric layer are joined, the surface facing the piezoelectric layer is the main support surface 111. Correspondingly, the support substrate 11 further has a back surface 112 located on the opposite side of the main support surface 111. Here, the cross-section may be, for example, the back surface 112, or it may be a cross-section parallel to the main support surface 111. For example, when the support substrate 11 shown in Figure 1 is cut along point AA (parallel to the main support surface 111), the support substrate 11 is divided into two parts, upper and lower, with the main support surface 111 located in the upper part and the back surface 112 located in the lower part. In this case, both the lower surface of the upper part and the upper surface of the lower part correspond to cross-sections parallel to the main support surface 111.

[0031] The observation area is any one square region with sides of 150 μm on a given surface. That is, one surface for observation is selected from either the main support surface 111 or a cross section parallel to the main support surface 111, and an arbitrarily selected 150 μm × 150 μm region within that observation surface becomes the observation area.

[0032] Here, a (101) oriented crystal grain refers to a crystal grain in which the (101) crystal plane of a given crystal grain faces the plane of the observation region. The (101) orientation includes 101 and its two opposite crystal orientations. The occupancy rate of (101) oriented crystal grains in the observation region can be determined by obtaining a microstructural image of the observation region using electron backscatter diffraction (EBSD) and applying IPF coloring (Inverse Pole Figure coloring) to it. IPF coloring is a method for representing crystal orientation in materials science, and by representing the crystal orientation information with color on a polar coordinate diagram, it allows the observer to visually identify the texture of the crystal. Specifically, as a result of the IPF coloring process, crystal grains with different crystal orientations are displayed in different colors. Therefore, the occupancy rate of crystal grains with the aforementioned orientation can be determined by counting the number of crystal grains corresponding to a specific color in the observation region and dividing it by the total number of crystal grains in the observation region. This calculation process is performed by a measuring device equipped with an IPF processing function.

[0033] Referring to Figure 2, this is an IPF coloring diagram of a 150 μm × 150 μm region (i.e., observation region) on the main support surface 111 of a support substrate 11 (hereinafter abbreviated as "Sample 1") according to one embodiment of the present invention. This support substrate 11 is a magnesium aluminate spinel substrate with an average grain size of 60 μm. In the observation region shown in Figure 2, the occupancy rate of (101) oriented grains is 14.2%. When a filter tip 1 manufactured using this Sample 1 was measured, the Q value of the filter tip 1 was 1678. Referring to Figure 3, this is an IPF coloring diagram of a 150 μm × 150 μm observation region on the main support surface 111 of a support substrate 11 (hereinafter abbreviated as "Sample 2") according to another embodiment of the present invention. This support substrate 11 is also a magnesium aluminate spinel substrate with an average grain size of 25 μm. In the region shown in Figure 3, the occupancy rate of (101) oriented grains is 12.9%. The Q value of filter tip 2 manufactured using sample 2 was 1450. Referring to Figure 4, this is an IPF coloring diagram of a 150 μm × 150 μm observation area on the main support surface 111 of a support substrate 11 (hereinafter abbreviated as "sample 3") according to yet another embodiment of the present invention. This support substrate 11 is also a magnesium aluminate spinel substrate, and the average grain size is 3 μm. In the observation area shown in Figure 4, the occupancy rate of (101) oriented grains was 9.9%. The Q value of filter tip 3 obtained from this sample 3 was 1325. Referring to Figure 5, this is an IPF coloring diagram of a 150 μm × 150 μm observation area on the main support surface 111 of a support substrate 11 (hereinafter abbreviated as "sample 4") according to yet another embodiment of the present invention. Sample 4 is also a magnesium aluminate spinel substrate, and the average grain size is 25 μm. In the region shown in Figure 5, the occupancy rate of (101) oriented crystal grains was 14.5%. The Q value of the filter chip 4 obtained from this sample 4 was 1695. As is clear from the above, it has been confirmed that the support substrate 11 having a specific crystal grain orientation ratio according to the embodiment of the present invention has the effect of improving the Q value.

[0034] In some embodiments, a higher Q value can be obtained by having a (101) oriented grain occupancy rate of 9-20% in the observation region.

[0035] Specifically, in some embodiments, the observation region is also provided with (001)-oriented crystal grains and (111)-oriented crystal grains, and the occupancy rate of (101)-oriented crystal grains in the observation region is 70% or more of the occupancy rate of (001)-oriented crystal grains. For example, if the occupancy rate of (001)-oriented crystal grains in the observation region is 12%, then the occupancy rate of (101)-oriented crystal grains in the observation region is 8.4% or more. The occupancy rate of (001)-oriented crystal grains is the ratio of the number of (001)-oriented crystal grains in the observation region to the total number of crystal grains in the observation region. In some embodiments, the occupancy rate of (101)-oriented crystal grains in the observation region is 70% or more of the occupancy rate of (111)-oriented crystal grains. For example, if the occupancy rate of (111) oriented crystal grains in the observation region is 12.5%, then the occupancy rate of (101) oriented crystal grains in the observation region is 8.75% or higher. The occupancy rate of (001) oriented crystal grains in the observation region is the ratio of the number of (001) oriented crystal grains in that observation region to the total number of crystal grains in that observation region. Based on Figures 2 to 5, the occupancy rates of (001) oriented and (111) oriented crystal grains in Samples 1 to 4 can be obtained, and the results are shown in Table 1. Table 1 also shows the occupancy rates of (101) oriented, (001) oriented, and (111) oriented crystal grains in Samples 5 to 8. Furthermore, the last row of Table 1 shows the Q value of the chips made from each sample.

[0036] Table 1 is as follows:

[0037] [Table 1]

[0038] Based on Samples 1 to 7, the occupancy rate of (101) oriented crystal grains all exceeds 7%, and the corresponding Q values ​​are all above 1000, indicating that high Q values ​​can be obtained. Comparing Sample 2 and Sample 4, it is clear that when the occupancy rates of (001) oriented and (111) oriented crystal grains are approximately the same, the one with a larger occupancy rate of (101) oriented crystal grains (Sample 4) shows a higher Q value. Furthermore, in Samples 1, 2, 4, and 5, it can be seen that higher Q values ​​are obtained when the occupancy rate of (101) oriented crystal grains is higher than the occupancy rates of (001) and (111) oriented crystal grains. Based on Sample 8, when the occupancy rate of (101) oriented crystal grains is approximately 50% of the occupancy rates of (001) and (111) oriented crystal grains, and the occupancy rate of (101) oriented crystal grains is less than 7%, the Q value is relatively low. In Sample 7, the occupancy rate of (101) oriented grains is approximately 60% of the total occupancy rate of (001) + (111) oriented grains. When the (101) orientation is 7% or more, a higher Q value is obtained than in Sample 8. In Sample 6, when the occupancy rate of (101) oriented grains is in the range of 70-80% of the total occupancy rate of (001) + (111) orientations, the Q value is higher than in Samples 8 and 7 (1184). Also, in Sample 3, when the occupancy rate of (101) oriented grains is approximately 80% of the occupancy rate of (111) oriented grains, the Q value can meet the required level (1000 or higher).

[0039] Table 2 shows data for the Young's modulus of crystal grains in (001), (101), and (111) orientations (obtained by fabricating and measuring single-crystal magnesium aluminate spinel substrates with each orientation) and the corresponding electromechanical coupling coefficients (obtained by bonding single-crystal magnesium aluminate spinel substrates with each orientation to a piezoelectric material to form chips and measuring the chips).

[0040] Table 2 is as follows:

[0041] [Table 2]

[0042] According to the data comparison in Table 2, the (101) oriented grains have the smallest Young's modulus, and the corresponding K 2 The value is maximized, resulting in a wider bandwidth. Therefore, a higher Q value can be obtained.

[0043] In some specific embodiments, the number of (001)-oriented crystal grains in the support substrate 11 accounts for 10-20% of the total number of crystal grains in the support substrate. For example, 10%, 11%, 15%, etc. More specifically, the occupancy rate of (001)-oriented crystal grains is 10-15%, and more specifically, 11-14%.

[0044] In some specific embodiments, the number of (111)-oriented grains accounts for 8 to 17% of the total number of grains in the support substrate. For example, 10%, 12%, 13%, 17%, etc. More specifically, the occupancy rate of (111)-oriented grains is 10 to 17%, and even more specifically, 9 to 13%.

[0045] In some embodiments, the ratio of (101)-oriented crystal grains on the main support surface 111 to the total number of crystal grains on the main support surface 111 is greater than 7%, more specifically 10-20%. The ratio of (001)-oriented crystal grains on the main support surface 111 to the total number of crystal grains on the main support surface 111 is 10-20%, more specifically 11-14%. The ratio of (111)-oriented crystal grains on the main support surface 111 to the total number of crystal grains on the main support surface 111 is 8-17%, more specifically 9-13%.

[0046] In some embodiments, at any lateral interface parallel to the main support surface 111 on the support substrate 11, the ratio of (101) oriented crystal grains to the total number of crystal grains on that lateral interface is 7% or more, more specifically 10-20%. At any lateral interface parallel to the main support surface 111 on the support substrate 11, the ratio of (001) oriented crystal grains to the total number of crystal grains on that lateral interface is 10-20%, more specifically 11-14%. At any lateral interface parallel to the main support surface 111 on the support substrate 11, the ratio of (111) oriented crystal grains to the total number of crystal grains on that lateral interface is 8-17%, more specifically 9-13%.

[0047] In some embodiments, the support substrate 11 also includes a side surface 113 connected between the main support surface 111 and the back surface 112, and an observation area of ​​150 μm × 150 μm is selected on the side surface 113. In this observation area as well, the occupancy rate of (101) oriented crystal grains is 7% or more, the occupancy rate of (001) oriented crystal grains is 10 to 20%, and the occupancy rate of (111) oriented crystal grains is 8 to 17%.

[0048] The support substrate 11 according to the embodiment of the present invention can be manufactured through processes such as preparation of raw material powder, sorting of particle size, pressure molding of the molded body, cutting, polishing, and grinding. In the raw material powder preparation process, an appropriate sintering aid can be added. If the sintering aid reacts significantly with (101) oriented crystal grains and reacts somewhat weakly with (001) oriented and (111) oriented crystal grains, the proportion of (101) oriented crystal grains can be controlled by adjusting the amount of sintering aid added. Furthermore, by adjusting the type of sintering aid and its mixing ratio, the proportion of crystal grains with different orientations can be controlled to a desired range.

[0049] Referring to Figure 6, the embodiment of the present invention also provides a composite substrate 10. The composite substrate 10 includes a piezoelectric layer 12 and a support substrate 11 according to the above embodiment, wherein the piezoelectric layer 12 is provided on the support substrate 11. In one embodiment, the piezoelectric layer 12 and the support substrate 11 are joined to each other, specifically, the piezoelectric layer 12 is joined to the main support surface 111 of the support substrate 11. The two can be directly joined by van der Waals forces. The piezoelectric layer 12 may be made of, for example, lithium tantalate or lithium niobate. The composite substrate 10 has the effect of improving the Q value by using the above-described support substrate 11.

[0050] Referring to Figure 7, embodiments of the present invention also provide an electronic device 100. The electronic device 100 includes a support substrate 11 according to the above-described embodiment, or a composite substrate 10 according to the above-described embodiment. In the composite substrate 10, the piezoelectric layer 12 has, for example, a main surface 121 facing the back side with respect to the support substrate 11, and the electronic device 100 further includes an electrode 20 provided on the main surface 121, the electrode 20 including, for example, an IDT electrode 21. The electronic device 100 may also be, for example, a SAW device. Since the electronic device 100 includes the support substrate 11 according to the above-described embodiment, it has the effect of improving the Q value.

[0051] Referring to Figure 8, the electronic device 100 (composite substrate 10) according to another embodiment of the present invention also includes an intermediate layer 13, which is located between the piezoelectric layer 12 and the support substrate 11. Here, the speed of sound in the intermediate layer 13 is lower than the speed of sound in the piezoelectric layer 12. That is, the speed of sound of the bulk wave in the intermediate layer 13 is lower than that of the bulk wave propagating within the piezoelectric layer 12. In this embodiment, by providing an intermediate layer 13 with a low speed of sound, the speed of sound of the elastic wave can be reduced, and the energy of the elastic wave can be concentrated in the medium with a low speed of sound (i.e., the intermediate layer 13), thereby reducing losses and improving the Q factor.

[0052] The material of the intermediate layer 13 is silicon dioxide (SiO2), silicon nitride (SiON), tantalum oxide (Ta2O5), or any of these materials as the main component. In some embodiments, silica is used as the intermediate layer 13 and lithium tantalate is used as the material for the piezoelectric layer 12. Since lithium tantalate has a negative elastic constant with respect to temperature, while silicon dioxide (SiO2) has a positive temperature constant, the absolute value of the TCF (temperature coefficient) of the elastic wave device can be reduced. Furthermore, since the intrinsic acoustic impedance of silica is smaller than that of lithium tantalate, the electromechanical coupling coefficient of the electronic component can be increased.

[0053] In some embodiments, the thickness of the intermediate layer 13 is 0.5λ or more. Here, λ represents the wavelength of the elastic wave determined by the electrode period of the IDT electrode 21. Specifically, the thickness of the intermediate layer 13 may be 0.6 to 0.8λ. In some embodiments, the thickness of the piezoelectric layer 12 is 2λ or less. More specifically, the thickness of the piezoelectric layer 12 may be less than 1λ. In one specific example, λ is 2.25 μm, the thickness of the piezoelectric layer 12 is 0.1λ to 1λ, and the thickness of the intermediate layer 13 is 0.6λ.

[0054] The electronic device 100 according to this embodiment can use a CSP package (Chip Scale Package) or a WLP package (Wafer Level Package).

[0055] Referring to Figure 9, for example, this is a schematic diagram of the structure of an electronic device 100 employing a CSP package. The electronic device 100 comprises an element (including a composite substrate 10 and electrodes 20), a package substrate 30, a first sealing structure 41, and a first external terminal electrode 53. The package substrate 30 is positioned opposite the surface on which the electrodes 20 of the element are provided (i.e., the main surface 121 of the piezoelectric layer 12), and a gap 60 is formed between the package substrate 30 and the main surface 121. The first sealing structure 41 is provided on the element-side surface of the package substrate 30, covers the side surface of the element and the surface facing the package substrate 30, and seals the gap 60 to seal the element. The electrodes 20 include an electrode pad 22 electrically connected to an IDT electrode 21, and the electrode pad 22 is electrically connected to a first conductive portion 52 in the wiring pattern on the package substrate 30 via a bump 51. The first conductive portion 52 is electrically connected to the first external terminal electrode 53, which is located on the opposite side of the package substrate 30 from the element, thereby enabling the electronic device 100 to be electrically connected to an external device via the first external terminal electrode 53.

[0056] Here, the materials of the package substrate 30 and the first sealing structure 41 can refer to substrate materials and sealing materials commonly used in existing CSP packages. The electrode pads 22, bumps 51, first conductive portion 52, and first external terminal electrodes 53 are all made of materials with excellent conductivity, but this embodiment is not limited to these examples.

[0057] Referring to Figure 10, this is a schematic diagram of the structure of an electronic device 100 employing CSP encapsulation. The electronic device 100 comprises an element (including a composite substrate 10 and electrodes 20), a cover 70, a second encapsulation structure 42, and a second external terminal electrode 55. The cover 70 is positioned opposite the surface on the element where the electrodes 20 are provided (i.e., the main surface 121 of the piezoelectric layer 12), and a gap 60 is formed between the cover 70 and the main surface 121. The electrodes 20 include an electrode pad 22 electrically connected to an IDT electrode 21, and the region on the main surface 121 where the IDT electrode 21 is provided is called the effective region. The second encapsulation structure 42 is positioned between the cover 70 and the element and is provided so as to surround this effective region. The second encapsulation structure 42 surrounds the electrode pad 22, thereby achieving encapsulation of the element. The second external terminal electrode 55, provided on the back surface of the cover 70 facing the element, is connected to the electrode pad 22 via a second conductive portion 54 that penetrates the cover 70 and the second sealing structure 42, allowing the electronic device 100 to be electrically connected to an external device via the second external terminal electrode 55.

[0058] Here, the materials for the lid 70 and the second sealing structure 42 can refer to the lid materials and sealing materials used in conventional WLP sealing, and the electrode pads 22, the second conductive part 54, and the second external terminal electrode 55 are all made of highly conductive materials, and this embodiment is not limited to these.

[0059] Referring to Figure 11, the present invention further provides module 1000. Module 1000 comprises a wiring board 700, a plurality of external connection terminals 701, integrated circuit components 600, electronic devices 100 (including a composite board 10), an inductor 400, and a sealing section 500. The plurality of external connection terminals 701 are formed on one surface of the wiring board 700 and are mounted on a pre-configured mobile communication terminal motherboard. The integrated circuit components 600 (also referred to as ICs) are mounted inside the wiring board 700. The integrated circuit components 600 include a switch circuit and a noise amplifier. The electronic devices 100 are mounted on the main surface of the wiring board 700. The inductor 400 is used for impedance matching, and for example, the inductor 400 is an Integrated Passive Device (IPD). The sealing section 500 is for sealing the plurality of electronic components, including the electronic devices 100, on the wiring board 700.

[0060] The module 1000 provided by this embodiment includes an electronic device 100, that is, a support substrate 11, and since it has the same effects as the support substrate 11, a detailed explanation is omitted here.

[0061] Preferred embodiments of the present invention have been described above, but this does not limit the invention in any way. The present invention is disclosed in the above preferred embodiments, but this is not intended to limit the invention. Those skilled in the art will be able to make some changes, modifications, or equivalent variations based on the technical content disclosed above without departing from the technical scope of the present invention. Accordingly, any simple changes, equivalent variations, and modifications to the above embodiments based on the technical essence of the present invention are all included within the technical scope of the present invention.

Claims

1. A support substrate made of a polycrystalline material and having a main support surface, The crystal grains in the support substrate have a spinel-type structure. In the observation region of the main support surface or any cross-section parallel to the main support surface, the crystal grains are (101) oriented, The number of crystal grains with the (101) orientation is 7% or more and 20% or less of the total number of crystal grains in the observation region. A support substrate characterized in that the observation area is a region of 150 μm × 150 μm.

2. The observation region also includes (001) oriented crystal grains, The support substrate according to claim 1, characterized in that the number of crystal grains with the (101) orientation is 70% or more of the number of crystal grains with the (001) orientation.

3. The support substrate according to claim 2, characterized in that the number of crystal grains with (101) orientation in the observation region is greater than the number of crystal grains with (001) orientation.

4. The support substrate according to claim 2, characterized in that, in the observation region, the number of crystal grains with the (001) orientation is 10% or more and 20% or less of the total number of crystal grains in the observation region.

5. The observation region also includes crystal grains with the (111) orientation, The support substrate according to claim 1, characterized in that the number of crystal grains with the (101) orientation is 70% or more of the number of crystal grains with the (111) orientation.

6. The support substrate according to claim 5, characterized in that the number of crystal grains with (101) orientation in the observation region is greater than the number of crystal grains with (111) orientation.

7. The support substrate according to claim 5, characterized in that the number of crystal grains with the (111) orientation in the observation region is 10% or more and 17% or less of the total number of crystal grains in the observation region.

8. The support substrate according to claim 1, characterized in that, in the observation region, the number of crystal grains with the (101) orientation is 9% or more and 20% or less of the total number of crystal grains in the observation region.

9. The observation region comprises crystal grains oriented (001) and crystal grains oriented (111), In the observation region, the number of crystal grains with the (001) orientation is 10% or more and 15% or less of the total number of crystal grains in the observation region. The support substrate according to claim 1, characterized in that the number of crystal grains with the (111) orientation is 8% or more and 17% or less of the total number of crystal grains in the observation area.

10. A composite substrate comprising a support substrate according to any one of claims 1 to 9 and a piezoelectric layer provided on the support substrate.

11. An electronic device characterized by comprising a composite substrate as described in claim 10.

12. The electronic device according to claim 11, characterized in that the piezoelectric layer is provided with the IDT electrode on the surface opposite to the main surface of the support substrate.

13. The intermediate layer is disposed between the support substrate and the piezoelectric layer, The electronic device according to claim 12, characterized in that the sound velocity of the intermediate layer is lower than the sound velocity of the piezoelectric layer.

14. The electronic device according to claim 13, characterized in that the thickness of the intermediate layer is 0.5λ or more, and λ is the wavelength of an elastic wave determined based on the electrode period of the IDT electrode.

15. The electronic device according to claim 12, characterized in that the thickness of the piezoelectric layer is 2λ or less, and λ is the wavelength of an elastic wave determined based on the electrode period of the IDT electrode.

16. A module comprising a wiring board, a plurality of external connection terminals, an inductor, a sealing portion, and an electronic device according to any one of claims 11 to 15.