Semiconductor wafer bonding apparatus and bonding method

Abstract

This simple configuration can improve the bonding strength between wafers in semiconductor manufacturing processes. [Solution] A semiconductor wafer bonding apparatus 34 for bonding semiconductor wafers W1 and W2 together, wherein the semiconductor wafers W1 and W2 are plasma-treated to activate their surfaces, then a high vacuum state is created within a predetermined time to polarize ions on the surfaces of the semiconductor wafers W1 and W2, and the application of a high-frequency power supply to at least one of the opposing semiconductor wafers W1 and W2 causes the ions to move on the surfaces of the semiconductor wafers W1 and W2, thereby increasing the bonding strength between the semiconductor wafers W1 and W2.

Description

Technical Field

[0001] The present invention relates to a semiconductor wafer bonding apparatus and a bonding method for bonding semiconductor wafers to each other by, for example, radio frequency ion flow bonding (RFIFB) in a semiconductor manufacturing process.

Background Art

[0002] Hybrid bonding, which is part of a conventional semiconductor manufacturing process, has, for example, a plasma treatment step, a cleaning step, a drying step, and a bonding step.

[0003] In the plasma treatment step, for example, atmospheric pressure plasma or vacuum plasma is applied to the semiconductor wafer to activate the surface of the semiconductor wafer. In the cleaning step, for example, while rotating the semiconductor wafer around its central axis, a cleaning liquid (pure water or chemical solution) is dropped to clean the surface of the semiconductor wafer. In the drying step, for example, while rotating the semiconductor wafer at high speed around its central axis, water droplets on the surface of the semiconductor wafer are scattered. In the bonding step, for example, the upper and lower two semiconductor wafers that have undergone the plasma treatment step to the drying step are opposed to each other and bonded by a bonding apparatus.

[0004] Here, in a conventional bonding apparatus, a semiconductor wafer is placed on a planar stage arranged to face each other, and a pair of semiconductor wafers facing each other are bonded by a surface activated bonding (SAB) method (hereinafter, appropriately referred to as the "SAB method") of a room temperature bonding process.

[0005] Surface activated bonding ionizes an inert gas such as argon to create an ion beam, and irradiates the surface of the material to be bonded with this ion beam or plasma, thereby removing the oxide film and contamination layer present on the surface of the bonding material and activating the surface, thereby realizing bonding at low temperature and room temperature.

[0006] In the SAB method, the entire surface of the semiconductor wafer is activated uniformly at once. However, when removing the oxide film, the surface of the semiconductor wafer is processed by sliding the semiconductor wafer or the ion beam source because the irradiation area of ​​the ion beam is small.

[0007] However, the SAB method had a problem where the surface uniformity of the semi-paper conductive wafer was poor, causing surface roughness in some parts of the semiconductor wafer and reducing the bonding strength between semiconductor wafers. In addition, the spot irradiation of the Ar ion beam caused movement of the semiconductor wafer or the beam, which resulted in the generation of particles and voids. [Prior art documents] [Patent Documents]

[0008] [Patent Document 1] Japanese Patent Publication No. 2018-201022 [Overview of the project] [Problems that the invention aims to solve]

[0009] Therefore, in view of the above problems, the present invention aims to provide a semiconductor wafer bonding apparatus and bonding method that can improve the bonding strength between wafers in a semiconductor manufacturing process with a simple configuration. [Means for solving the problem]

[0010] The present invention relates to a semiconductor wafer bonding apparatus or bonding method for bonding semiconductor wafers together, This is a semiconductor wafer bonding apparatus or bonding method, comprising: activating the surface of the semiconductor wafer by plasma treatment; polarizing ions on the surface of the semiconductor wafer by creating a high vacuum state within a predetermined time; and increasing the bonding strength between the semiconductor wafers by applying a high-frequency power supply to at least one of the opposing semiconductor wafers, causing the ions to move across the surface of the semiconductor wafers.

[0011] The predetermined time is preferably 0 to 30 seconds, with immediate bonding after plasma cessation being preferable. Furthermore, the predetermined time is preferably 0 to 5 seconds. Here, 0 seconds means bonding the semiconductor wafers together while the plasma is applied and during the process of creating a high vacuum. In this case, it includes bonding the semiconductor wafers together while maintaining the plasma.

[0012] Alternatively, high-frequency currents of two different frequencies may be applied to the upper and lower semiconductor wafers (stages) to remove the surface oxide film and create a dungley bond, and the semiconductor wafers may be joined while the dungley bond is formed (activated). In this case, the gap between the semiconductor wafers should be as narrow as possible, and it is preferable that the bonding between the semiconductor wafers is completed before the dungley bond disappears, after the plasma has dissipated.

[0013] Furthermore, the present invention relates to a semiconductor wafer bonding apparatus or bonding method for bonding semiconductor wafers held by parallel planar plasma electrodes by plasma treatment, This is a semiconductor wafer bonding apparatus or bonding method, which involves activating the surface of a semiconductor wafer by plasma treatment, polarizing ions on the surface of the semiconductor wafer by creating a high vacuum, and bonding the semiconductor wafers together by applying a high-frequency power supply to the semiconductor wafer, causing the ions to move across the surface of the semiconductor wafer.

[0014] An electrostatic chuck may be used as the parallel plate plasma electrode. [Effects of the Invention]

[0015] According to the present invention, the bonding strength between semiconductor wafers in a semiconductor manufacturing process can be improved with a simple configuration. [Brief explanation of the drawing]

[0016] [Figure 1] This is a diagram of the semiconductor wafer bonding apparatus for one embodiment of the present invention. [Figure 2]It is a configuration diagram showing plasma treatment and bonding treatment for a semiconductor wafer by a bonding device of an embodiment of the present invention. [Figure 3] It is a process diagram in plasma treatment and bonding treatment for a semiconductor wafer by a bonding device of an embodiment of the present invention. [Figure 4] It is a flowchart showing an example of high-frequency ion flow bonding treatment. [Figure 5] It is a plan view of a semiconductor manufacturing system in which a bonding device for a semiconductor wafer of an embodiment of the present invention is assembled. [Figure 6] It is a side view of a semiconductor manufacturing system in which a bonding device for a semiconductor wafer of an embodiment of the present invention is assembled. [Figure 7] It is a configuration diagram showing the structure of a unipolar electrostatic chuck. [Figure 8] It is a configuration diagram showing the structure of a bipolar electrostatic chuck. [Figure 9] It is a configuration diagram showing the state when semiconductor wafers are bonded with a bipolar electrostatic chuck provided on a stage constituting a bonding device for a semiconductor wafer of an embodiment of the present invention.

Mode for Carrying Out the Invention

[0017] First, a bonding device and a bonding method for a semiconductor wafer according to an embodiment of the present invention will be described.

[0018] In the bonding device and the bonding method for a semiconductor wafer according to an embodiment of the present invention, bonding of semiconductor wafers is performed using a plasma chamber or a vacuum chamber. In other words, the plasma chamber or the vacuum chamber can also be referred to as a bonding chamber, a bonding chamber, a bonding device, a bonding device, etc.

[0019] [Technical Idea of the Present Invention] The technical concept of the present invention is a semiconductor wafer bonding apparatus that enhances the bonding strength between a pair of opposing wafers by bonding them together in a vacuum environment (plasma environment) inside a vacuum chamber where plasma processing is performed on the wafer, using RF high-frequency ion flow and Coulomb force (also called "electrostatic force"; the same applies hereinafter).

[0020] The vacuum chamber may have a pair of holding parts positioned opposite each other on a stage, and by applying plasma between the wafers and moving at least one of the holding parts while the wafers are held in place by the holding parts, the opposing wafers may be joined together.

[0021] In this case, it is preferable to use a silicon electrode on one of the wafers and a semiconductor wafer on the other before joining the wafers facing each other, perform the first plasma treatment on the silicon electrode and the other semiconductor wafer, then change the silicon electrode to a bonded wafer, and perform the second plasma treatment on the bonded wafer and the semiconductor wafer.

[0022] Between the first and second plasma treatments, oxide films formed on the surfaces of the semiconductor wafers facing each other may be removed by supplying etching gas.

[0023] The technical concept of the present invention described above is not limited to semiconductor wafer bonding apparatus, but also applies to semiconductor wafer bonding methods having the same characteristics as described above.

[0024] [Configuration of semiconductor wafer bonding equipment] As shown in Figure 1, the semiconductor wafer bonding apparatus 34 of this embodiment bonds various types of wafers together. While semiconductor wafers and bonded wafers can be, for example, silicon wafers, they are not limited to silicon wafers. It is also possible to use semiconductor wafers made of different materials that have been used conventionally, or to bond semiconductor wafers made of different materials together.

[0025] As shown in Figure 1, the semiconductor wafer bonding apparatus 34 includes a chamber 14 which is a housing, a first stage 36 located on the upper side inside the chamber, and a second stage 38 located on the lower side inside the chamber. The first stage 36 is provided with a first holding portion 102 capable of holding a semiconductor wafer or an electrode (e.g., a silicon electrode). The second stage 38 is provided with a second holding portion 104 capable of holding a semiconductor wafer or an electrode (e.g., a silicon electrode).

[0026] The enclosure chamber 14 or the joining device 34 can also be referred to as a "vacuum chamber."

[0027] Here, the first stage 36 and the second stage 38, or the first holding part 102 and the second holding part 104, can be, for example, electrostatic chucks or mechanical clamps. Note that, for example, electrostatic chucks 78 and 80 (Figures 7 to 9) may be used. The configuration of electrostatic chucks 78 and 80 in Figures 7 to 9 will be described later.

[0028] Furthermore, as shown in Figure 2, a first replacement device 106 is arranged at or near the first stage 36, which is upstream in the direction of gravity, for replacing the first holding part 102 and the semiconductor wafer W1 or silicon electrode G1 held by the first holding part 102 with a semiconductor wafer or silicon electrode held by another holding part. In the replacement process between the silicon electrode G1 and the semiconductor wafer W1, it is preferable to replace the silicon electrode G2 and the first holding part 102 that holds the silicon electrode G1 as a set, and the semiconductor wafer W1 and the first holding part 102 that holds the semiconductor wafer W1 as a set, in sets, but the invention is not limited to this embodiment.

[0029] The silicon electrode G1 is a well-known material, also known as a dummy wafer or bare wafer, for example.

[0030] The semiconductor wafer W1 held by the first holding portion 102 includes, for example, a silicon wafer electrode G1 as well as a bonded wafer G2, etc.

[0031] The first replacement device 106 is not limited to being provided on the first stage 36 side, but may also be part of the joining device 34 or located outside the joining device 34.

[0032] Furthermore, a second replacement device 108 may be arranged at or near the second stage 38, which is downstream in the direction of gravity, for replacing the second holding part 38 and the semiconductor wafer W2 or silicon electrode held by the second holding part 38 with a semiconductor wafer W2 or silicon electrode held by another holding part. In the process of replacing the silicon electrode (not shown) and the semiconductor wafer W2, it is preferable to replace each set, with the silicon electrode (not shown) and the second holding part 104 that holds the silicon electrode (not shown) as a set, and the semiconductor wafer W2 and the second holding part 104 that holds the semiconductor wafer W2 as a set, but the invention is not limited to this embodiment.

[0033] The second replacement device 108 is not limited to being provided on the second stage 38 side, but may also be part of the joining device 34 or located outside the joining device 34.

[0034] Furthermore, it is preferable that at least one of the first replacement device 106 or the second replacement device 108 is provided.

[0035] Here, the first replacement device 106 and the second replacement device 108 are, for example, robot hands, but are not limited to these.

[0036] Examples of semiconductor wafers W1 held by the first holding portion 102 and semiconductor wafers W2 held by the second holding portion 104 include, but are not limited to, Si wafers or SiC wafers.

[0037] As shown in Figure 1, a high-frequency power supply 110 is connected to the first stage 36 and the second stage 38, respectively. The high-frequency power supply 110 has the capability to realize a high-frequency electric field (13.56 MHz, 200 W). When the high-frequency power supply 110 is applied, the flow and diffusion of atoms are promoted by the electric field, improving the adhesion of the junction surfaces of the semiconductor wafers W1 and W2.

[0038] In this embodiment or example, a configuration is used in which a high-frequency power supply 110 is connected to the first stage 36 and the second stage 38, respectively, and it is assumed that a high-frequency voltage is applied to both the semiconductor wafer W1 held on the first stage 36 side and the semiconductor wafer W2 held on the second stage 38 side. However, in a configuration in which a high-frequency power supply 110 is connected to both the first stage 36 and the second stage 38, the high-frequency voltage may be applied to only one of the semiconductor wafers. In this case, however, the high-frequency power supply 110 may be installed on only one of the first stage 36 or the second stage 38.

[0039] The semiconductor wafer bonding apparatus 34 is equipped with an automatic pressure control device 112 (APC) that can control the pressure inside the housing. The pressure inside the housing is controlled by the automatic pressure control device 112.

[0040] The semiconductor wafer bonding apparatus 34 is equipped with a turbomolecular pump 114 (TMP). The turbomolecular pump 114 is composed of, for example, a rotor (moving blades) with turbine-type blades and a stator (fixed blades).

[0041] The turbomolecular pump 114 has a capacity of 1 × 10 -6 This is a high-performance pump with a high vacuum of Pa and a large pumping speed.

[0042] [Effectiveness of semiconductor wafer bonding equipment] The bonding between each wafer becomes stronger. When bonding semiconductor wafers that require different plasma processing times, the plasma processing time can be shortened by using a semiconductor wafer that requires a shorter plasma processing time as the bonding wafer and replacing the silicon electrodes. This enables short-duration plasma processing of the bonding wafer. As a result, the surface of the bonding wafer does not deteriorate due to prolonged plasma processing, and quality degradation of the semiconductor product (semiconductor device, etc.) formed by bonding the wafers can be prevented.

[0043] [First plasma treatment execution] As shown in Figures 1 and 2, the semiconductor wafer bonding apparatus 34 has a parallel plate electrode structure. With the inside of the housing in a vacuum, the silicon electrode G1 (for example, also called the "silicon wafer electrode") is held in the first holding part 102, and the semiconductor wafer W2 (for example, the silicon wafer) is held in the second holding part 104. A first plasma treatment using argon plasma or the like is then performed. As a result, silicon is sputtered from the silicon electrode G1 using argon plasma inside the vacuum chamber 14, and the surface of the semiconductor wafer W2 held in the second holding part 104 is activated by the plasma, forming a silicon vapor-deposited film X on the surface of the semiconductor wafer W2. In the plasma surface activation of the semiconductor wafer W2, a gas such as argon (Ar) or nitrogen (N2) is used to remove the oxide film and contaminants from the surface of the semiconductor wafer W2. A similar effect is obtained in the surface activation of the semiconductor wafer W2 in the second plasma treatment.

[0044] Here, because a high-frequency power supply 110 is used, the energy is reduced, resulting in less plasma damage to the surface of the semiconductor wafer W2. In addition, a thin deposited film X is formed on the semiconductor wafer W2 by sputtering onto the plasma electrode G1, which is a silicon wafer electrode.

[0045] The first plasma treatment may be omitted (the same applies to the following embodiments and examples). In other words, instead of using an upper silicon electrode (semiconductor wafer), the upper and lower semiconductor wafers may be set directly and plasma may be generated by applying a high-frequency power supply in the first step to bond the upper and lower semiconductor wafers together. In particular, if the oxide film on the semiconductor wafers is removed in advance by wet etching before placing them in the apparatus, the oxide film can be removed in a single plasma treatment without dividing the plasma treatment into two steps.

[0046] [Isotropic etching] Furthermore, between the first plasma treatment and the subsequent second plasma treatment, an isotropic etching process may be performed to remove the oxide film formed on the surface of the semiconductor wafer W2 by supplying an etching gas such as SF6. After the isotropic etching process, the plasma gas is switched to argon gas (gas replacement), and the wafer surface is activated in the second plasma treatment.

[0047] [Second plasma treatment execution] Next, the silicon electrode G1 is replaced with a bonded wafer G2, which is a semiconductor wafer W1. The bonded wafer G2 is a semiconductor wafer such as a silicon wafer, but is not limited to silicon. The replacement process between the silicon electrode G1 and the bonded wafer W1 is carried out by replacing the silicon electrode G1 and the first holding part 102 that holds the silicon electrode G1 as a set component with another set component consisting of the bonded wafer G2 and the first holding part 102 that holds the bonded wafer G2. Alternatively, the first holding part 102 may be used in its original state, and only the silicon electrode G1 may be separated from the first holding part 102 before the bonded wafer G2 is held in the first holding part 102. During and after the exchange process, plasma treatment is performed, and the surfaces of the bonded wafer G2 held in the first holding section 102 and the semiconductor wafer W2 held in the second holding section 104 are activated using a gas such as argon (Ar) or nitrogen (N2). The oxide film and contaminants on the surfaces of the bonded wafer G2 held in the first holding section 102 and the semiconductor wafer W2 held in the second holding section 104 are removed, respectively. Then, in an environment where the high-frequency power supply 110 is still applied, the supply of gas such as argon (Ar) or nitrogen (N2) is stopped, and the automatic pressure control device 112 is driven at high output so that the vacuum inside the chamber 14 reaches the target vacuum (e.g., 1 × 10⁻¹⁰) in about 10 seconds. -6The temperature reaches Pa(pascal). At this point, the plasma disappears, but the surfaces of the bonded wafer G2 held by the first holding part 102 and the semiconductor wafer W2 held by the second holding part 104 become polarized with ions.

[0048] The time required to reach the ultimate vacuum inside the chamber 14 is not limited to approximately 10 seconds, but may be set to a range of, for example, 1 to 30 seconds, more preferably 1 to 15 seconds, and even more preferably 1 to 10 seconds. The faster the time required to reach the ultimate vacuum inside the chamber 14, the better.

[0049] Here, the time to reach the desired vacuum inside the chamber 14 may be set to a range of 0 to 30 seconds, more preferably 0 to 5 seconds. A rapid bonding process after plasma cessation is preferred within 0 to 30 seconds. Here, 0 seconds means bonding the semiconductor wafers while the plasma is applied and during the process of achieving a high vacuum. This includes bonding the semiconductor wafers while maintaining the plasma.

[0050] [Execution of wafer joining process] In this state, for example as shown in Figure 3, the first stage 36 and / or the second stage 38 move closer to each other, thereby reducing the distance between the bonded wafer G2 held by the first holding part 102 and the semiconductor wafer W2 held by the second holding part 104. Due to the Coulomb force (electrostatic force) generated on the surfaces of both wafers, the interatomic distance between them decreases, and they eventually come into contact. At this time, the first stage 36 may be fixed and the second stage 38 may be moved closer to the first stage 36. Alternatively, the second stage 38 may be fixed and the first stage 36 may be moved closer to the second stage 38. The initial bonding force between the bonded wafer G2 held by the first holding part 102 and the semiconductor wafer W2 held by the second holding part 104 is strong. However, by continuing to apply the high-frequency power supply 110 even after the opposing wafers G2 and W2 come into contact with each other, the RF high frequency flows between the surfaces of the respective wafers G2 and W2, and ionic flow (atomic diffusion) is generated by the electric field, making the bond between the two even stronger.

[0051] The semiconductor wafer manufacturing method according to this embodiment is the first of its kind in the industry and is called RF Ion Flow Bonding (RFIFB).

[0052] Furthermore, while the plasma treatment of the bonded wafer G2 held by the first holding unit 102 is performed only once, the plasma treatment of the semiconductor wafer W2 held by the second holding unit 104 is performed only twice.

[0053] Furthermore, it is preferable, but not limited to, a configuration in which the silicon electrode G1 held by the first holding part 102 is replaced with another first holding part 102 and a bonded wafer G2 held by the first holding part 102, and then the bonded wafer G2 held by the first holding part 102 and the semiconductor wafer W2 held by the second holding part 104 are joined. It is also preferable that the first holding part 102 is located on the upstream side (upper side) in the direction of gravity, and the second holding part 104 is located on the downstream side (lower side) in the direction of gravity.

[0054] On the other hand, there is a conventional technology called atomic diffusion bonding (ADB). Atomic diffusion bonding is a technique also known as room-temperature activated bonding, and is known to be performed by activating the semiconductor wafer surface with an Ar beam or by activating the semiconductor wafer surface with Si sputtering, but in both cases, bonding the activated semiconductor wafers together takes several minutes.

[0055] Generally, the activated state of semiconductor wafer surfaces deteriorates rapidly, requiring quick vacuuming and bonding.

[0056] Therefore, according to this embodiment, after activating the wafer surface by plasma treatment, for example, by vacuuming to the target pressure with a turbomolecular pump 114 within about 10 seconds and bonding the wafers together, atomic diffusion bonding is made possible with the surface activation decay after wafer surface activation reduced to the absolute minimum.

[0057] In other words, this embodiment utilizes, for example, parallel planar plasma electrodes in the vertical direction, and employs a structure (e.g., an electrostatic chuck, a mechanical clamp, etc.) that can hold wafers on the upper and lower electrodes, with one electrode designed to be interchangeable with a bonded wafer.

[0058] According to this embodiment, due to the roughening of the electrode surface of the silicon electrode G1 by sputtering, fine particles appear in the parallel flat wafer plasma, and voids are formed. The surface of the silicon electrode G1 is roughened by the sputtering, and the sputtered silicon grows and peels off from the surface of the silicon electrode G1. The peeled-off silicon continues to float as particles undergoing Brownian motion, causing void defects in the wafer. However, in this embodiment, since the silicon electrode G1 (e.g., a Si bare wafer) is used in place of the bonded wafer G2 in the initial stage, damage to the bonded wafer G2 due to voids can be reduced. This makes it possible to avoid a decrease in the quality and degradation of the semiconductor product obtained by bonding the bonded wafer G2 and the semiconductor wafer W2. It is preferable to replace the silicon electrode G1 every time or periodically every few times.

[0059] As described above, by surface activation of wafers used on one or both sides of the parallel plate and soft sputtering by applying a high-frequency power supply 110 to the silicon electrode G1, an extremely thin, high-purity Si deposition film X is formed on the processed surface of the semiconductor wafer W2 facing the silicon electrode G1.

[0060] In a plasma environment, the surface of the semiconductor wafer W2 is struck by ions, exposing a clean surface. After the surface of the semiconductor wafer W2 is cleaned, a high-frequency power supply 110 of a different frequency is applied to the silicon electrode G1 (for example, a silicon wafer) located above it. As a result, tiny silicon particles are ejected from the silicon electrode G1 and accumulate on the surface of the semiconductor wafer W2 located below it, forming a deposited film X, which is a thin film created by vapor deposition.

[0061] Furthermore, if a thin film created by vapor deposition is not required, this step can be omitted.

[0062] Next, during the bonding of the bonded wafer G2 and the semiconductor wafer W2, with the bonded wafer G2 set, for example, on the upper electrode, the surface of the bonded wafer G2 is activated using a gas such as argon (Ar) or nitrogen (N2). At this time, the surface of the semiconductor wafer W2, which is located at the bottom, is also activated. As a result, the surface activation of the bonded wafer G2 is performed only once, and the surface activation of the semiconductor wafer W2 is performed only twice.

[0063] Within the chamber 14, which is a single housing, the surfaces of the two wafers (bonded wafer G2 and semiconductor wafer W2) are activated by applying a pressure that allows plasma to be generated between mutually opposing electrodes, and at a pressure that allows the plasma to be maintained in a high vacuum as much as possible. The electrode structure may be configured by adding a magnetron, ICP coil, etc., to enable the maintenance of plasma in a high vacuum.

[0064] Furthermore, it is preferable that the separation distance between the bonded wafer G2 positioned above and the semiconductor wafer W2 positioned below after the plasma surface activation is completed be narrow. Similarly, it is preferable that the separation distance between the silicon electrode G1 positioned above and the semiconductor wafer W2 positioned below be narrow. The separation distance can be, for example, the smallest possible gap between electrodes to which plasma can be uniformly applied during plasma processing, and may be in the range of 10 μm to 50 μm when the pressure is changed to a high vacuum after completion. This is because narrowing the separation distance makes it difficult for particles from the outside to penetrate between the electrodes, preventing the mixing of particles during the wafer bonding process, and simultaneously shortening the time from achieving the vacuum to bonding.

[0065] After the bonding wafer G2 and semiconductor wafer W2 are activated by plasma treatment, the supply of gas such as argon (Ar) or nitrogen (N2) is stopped, and the automatic pressure control device 112 is driven to control the pressure to reach the vacuum pressure achievable by the turbomolecular pump 114 (or cryopump) within, for example, about 10 seconds. At this time, the application of the high-frequency power supply 110 is continued, but is not limited to this.

[0066] As a result, polarized ions (electrons) remain on the respective surfaces of the bonded wafer G2 and semiconductor wafer W2. When the bonded wafer G2 and semiconductor wafer W2 are joined in a high vacuum, the ionic potential charged on the respective surfaces of the bonded wafer G2 and semiconductor wafer W2 increases the motion of atoms, making it easier for atoms to temporarily move on the respective surfaces of the bonded wafer G2 and semiconductor wafer W2. Furthermore, the application of the high-frequency power supply 110 after the bonding of the bonded wafer G2 and semiconductor wafer W2 also increases the motion of atoms, making it easier for atoms to temporarily move on the respective surfaces of the bonded wafer G2 and semiconductor wafer W2. Due to these synergistic effects, atoms are rearranged to a more stable energy state. In particular, when the respective surfaces of the bonded wafer G2 and semiconductor wafer W2 are activated, atoms are more easily rearranged to a more optimal position. As a result, the energy on the surfaces of both the bonded wafer G2 and the semiconductor wafer W2 is minimized, improving the bonding strength between the bonded wafer G2 and the semiconductor wafer W2.

[0067] Generally, the time between plasma treatment of a semiconductor wafer and the bonding of the semiconductor wafers involves a waiting period of several minutes, which includes the transfer time of the semiconductor wafer from the plasma treatment chamber to the bonding chamber, and the plasma treatment and transport time for the second semiconductor wafer. During this time, the surface of the semiconductor wafer deteriorates by approximately 10-50% in activity immediately after plasma treatment (attenuation rate of 10-50%).

[0068] In contrast, in this embodiment, instantaneous bonding is performed immediately after plasma treatment of the bonded wafer G2 and the semiconductor wafer W2. As a result, the activated state of each surface of the bonded wafer G2 and the semiconductor wafer W2 is maintained at an attenuation rate of 1% or less while the bonded wafer G2 and the semiconductor wafer W2 are bonded. Consequently, the bond between the bonded wafer G2 and the semiconductor wafer W2 becomes strong.

[0069] [Voidless bonding] Most voids consist of Si sputtering flakes and particles within the chamber. Frequent replacement of the silicon electrode G1 eliminates the sputtering-formed flakes and particles, thereby reducing voids. Furthermore, in the vacuum plasma, organic matter that acts as a seed for void formation between the bonded wafer G2 and the semiconductor wafer W2 is removed by the plasma. The plasma also prevents organic matter from entering the wafer space from the outside. These measures enable void-free bonding.

[0070] [Characteristics of high-frequency ion flow bonding] High-frequency ionic fluid bonding has the following characteristics: (1) Surface activation and cleaning of wafers can be achieved through plasma treatment and controlled instantaneous vacuum level. (2) The initial bonding force between wafers can be strengthened by utilizing Coulomb force (electrostatic force). (3) The use of a high-frequency power supply (RF high frequency) promotes the flow and diffusion of atoms, thereby improving the bonding strength between wafers.

[0071] [Flowchart of High-Frequency Ion Fluid Bonding Process] An example of a high-frequency ionic fluid bonding process flow is described below. As shown in Figure 4, for example, a wafer is removed from the wafer cassette (S100), and wafer alignment is performed (S200). The wafer is cleaned (S300), and then transported to the load lock chamber (S400). Plasma treatment is performed on the wafer (S500), and the wafers are bonded together (S600). After that, the semiconductor product formed by bonding the wafers is removed from the load lock chamber (S700), and the semiconductor product is inspected (S800). Here, it is preferable that the time required from the end of the plasma treatment process (S500) on the wafer to the end of the bonding process (S600) is, for example, 10 seconds or less. As described above, for example, by using an ESC chuck for Coulomb force-controlled assisted bonding, it is possible to prevent misalignment when opposing wafers come into contact, and to achieve high-strength bonding through high-frequency ionic fluid bonding technology.

[0072] (Examples) Next, we will describe an example of high-frequency ionic fluid bonding.

[0073] [Overview] (1) Two Si wafers are placed in a vacuum in a parallel plate electrode structure. (2) A replaceable silicon wafer electrode is used on one side, and the surface of the silicon wafer electrode is activated with argon plasma. (3) The silicon ejected from the surface of the silicon wafer electrode is sputtered onto the surface of the semiconductor wafer facing the silicon wafer electrode.

[0074] [Process] (1) Surface activation by silicon wafer electrodes Plasma treatment using argon plasma (first stage) activates the surfaces of the silicon wafer electrode and the semiconductor wafer facing the silicon wafer electrode, and silicon is sputtered from the silicon wafer electrode. The silicon wafer electrodes are replaced with bonded wafers that will serve as the bonding target. The bonded wafer and the semiconductor wafer are subjected to argon plasma treatment (second time), and after the gas supply is stopped, a turbomolecular pump or the like is used to achieve the desired vacuum level within approximately 10 seconds. Although the plasma disappears due to the vacuum, ions remain in a polarized state on the surfaces of the opposing bonded wafers and semiconductor wafers. (2) Wafer joining Ions that remain polarized on the surfaces of the bonded wafer and the semiconductor wafer generate a Coulomb force (electrostatic force), which reduces the interatomic distance between the wafers and causes them to come into contact. RF high-frequency current flows across the surface of each wafer, causing ionic flow (atomic diffusion) due to the electric field, resulting in a strong bond between the wafers.

[0075] In wafer bonding, while it is possible to rapidly create a high vacuum after plasma application and bond the wafers together, it is also possible to bond the wafers together while the plasma is still applied (by performing vacuum evacuation during plasma excitation). In other words, the wafers can be bonded together without changing the vacuum level down to a region where plasma does not rise. Generally, in the case of parallel plate plasma, the region where plasma does not rise is about 1 Pa. In the case of magnetron or ICP plasma, it is 1 × 10⁻⁶ -2 It is approximately 1 × 10⁻⁶. In the case of an argon ion beam, -6 It is to that extent.

[0076] [Specific structure] (1) Parallel plate plasma electrode structure (1-1) Wafer holding mechanism The structure is designed to hold each wafer on the upper and lower electrodes using electrostatic chucks or mechanical clamps as the respective holding parts. At least one of the upper or lower electrodes is designed to be replaceable with a bonded wafer. The replacement operation is preferably performed by a robotic hand or the like. Furthermore, it is preferable to replace the upper electrode with a bonded wafer. This suppresses the generation of particles due to surface roughness of the electrodes. (1-2) Sputtering of electrodes By using silicon electrodes made from SI bare wafers as electrodes, particles are controlled during the plasma process. This reduces voids during bonding of the bonded wafer and the semiconductor wafer. (1-3) Surface activation of one or both sides of wafers facing each other By applying a high-frequency power supply to each electrode, soft sputtering is performed, and the silicon ejected from the electrode accumulates on the surface of the opposing wafer, forming a thin, high-purity Si film. If necessary, the step of forming the high-purity Si film (silicon film) can be omitted. A high-frequency power supply of a different frequency may be applied to the upper electrode to sputter silicon (Si).

[0077] (2) Set of bonded wafers (2-1) Activation of wafer surface using gas The wafer surface is activated using Ar (argon) or N2 (nitrogen) gas. Plasma processing is performed simultaneously on two wafers, one positioned above and one below, within a single chamber. (2-2) Plasma treatment Plasma processing is performed in a high vacuum. A magnetron or ICP coil can be used. The structure between the electrodes ensures that the plasma is uniform and is not affected by external influences such as the intrusion of dust from outside. (2-3) Vacuuming after plasma treatment The supply of argon and nitrogen gas into the chamber is stopped, the automatic pressure control (APC) is activated, and the turbomolecular pump controls the pressure inside the chamber to the target vacuum pressure in, for example, about 10 seconds. Depending on the product, the application of high-frequency power to the upper and lower electrodes may be continued or stopped. (2-4) Vacuum bonding (vacuum joining) Two wafers with charged surfaces are brought close together and brought into contact by Coulomb force (electrostatic force). Because Coulomb force is used, the initial bonding force between the wafers is improved. Also, because Coulomb force is used, the motion of atoms increases, making it easier for atoms residing on the surface of each wafer to move. By applying a high-frequency power supply to each electrode, atoms are rearranged to a stable energy state, forming a strong bond between the wafers.

[0078] (3) Instantaneous bonding of wafers after plasma treatment (instantaneous bonding) After the surface of each wafer is activated, bonding occurs, for example, within about 10 seconds, which minimizes the degradation of the wafer surface's activation state (activity level). In contrast, conventional room-temperature activated bonding or atomic diffusion bonding requires time for wafer bonding. Specifically, a waiting time of several minutes can reduce the active state by approximately 20%. This has led to problems with the quality of semiconductor wafer products, but this problem has been solved by the high-frequency ionic fluid bonding of this embodiment.

[0079] [In high vacuum (1×10 -6 [Attenuation rate after surface activation in Pa(pascal)] Attenuation rate after 10 seconds in a vacuum: A(10 seconds) ≈ 99.83% A(10 seconds) = 99.83% = 0.17% attenuation rate Attenuation rate after 2 minutes in a vacuum: A(2 mins) ≈ 81.87% A(2 mins) = 81.87% = 18.13% From the above, it has been found that rapid vacuuming and wafer bonding are extremely important for maintaining the surface activation state, and as a result, a strong bond between wafers is obtained.

[0080] Next, we analyze ion diffusion in a high-frequency ion fluid bonding process, in which silicon wafers are plasma-treated in a vacuum to activate their surface, then the gas is stopped and the surface-activated state is maintained at high speed in a vacuum. The wafers are then bonded together, and a high-frequency power supply is applied.

[0081] [High-frequency ionic fluid bonding process] (1) Plasma surface activation Plasma etching using a fluorine-based gas chemically removes organic contaminants and oxides from the wafer surface. Argon sputtering removes potentially residual minute contaminants and heterogeneous chemical residues. The wafer surface is cleaned by activation and plasma etching, and at the same time, the atoms on the wafer surface are further activated by physically striking the wafer surface with argon sputter, thereby improving the bonding efficiency between wafers. The combined effects of cleaning and activating the wafer surface cause atoms to diffuse, resulting in high bonding strength between wafers.

[0082] (2) Gas shutoff and high-speed vacuuming After plasma treatment of the wafer, the supply of argon and nitrogen gases is stopped, and a turbomolecular pump is used to create a high vacuum (1 × 10⁻¹⁰). -6 Control the process to reach Pa(pascal). By reaching the required vacuum level within approximately 10 seconds, the activated state of the wafer surface is maintained.

[0083] (3) Lamination of wafers The wafers are joined together while the polarized ions remain on the surface of each wafer. Coulomb force (electrostatic force) reduces the interatomic distance between the surfaces of closely placed wafers, thereby strengthening the contact between the wafers.

[0084] (4) Application of high-frequency power supply After joining the wafers together, a high-frequency power supply is applied to generate an electric field on the surface of each wafer. The electric field causes ions on the wafer surface to flow, strengthening the bonds between atoms.

[0085] [Considerations on ion diffusion] (1) Ionic state of the wafer surface The ions remaining on the wafer surface become polarized due to activation by plasma treatment. Because the polarized ions are strongly adsorbed onto the wafer surface, ion movement is facilitated. In a high vacuum, electrodes become insulated, and ions do not ionize (discharge), remaining on the wafer surface.

[0086] (2) High vacuum state In a high vacuum, the activated state of the wafer surface is maintained, and re-contamination of the wafer surface is suppressed.

[0087] (3) Effects of high-frequency power supply The high-frequency electric field (13.56 MHz, 200 W) has the following effects on the wafer surface and interface: (3-1) Surface potential variation A high-frequency electric field generates an alternating electric field on the wafer surface. This causes fluctuations in the potential of the wafer surface, leading to the following effects. Surface potential fluctuations: A potential of ±200V fluctuates at 13.56MHz, causing the movement of electrons and ions on the wafer surface. Influence of high-frequency electric fields: High-frequency electric fields (alternating electric fields) rearrange atoms and ions on the wafer surface. (3-2) Promotion of atomic diffusion at the interface The high-frequency electric field has the following effects on the wafer surface: Ion movement: The alternating electric field makes it easier for ions on the wafer surface to move. Interatomic changes: The alternating electric field alters the interatomic forces between wafers, forming stronger bonds. Reduction of activation energy: The alternating electric field reduces the energy required for atomic diffusion, promoting bonding between atoms.

[0088] [Mechanism of ion diffusion] When a high-frequency power supply is applied, ion diffusion occurs through the following mechanism. Furthermore, by applying the high-frequency power supply to only one of the opposing wafers, all of the following effects can be achieved: (1) ion movement due to electric field induction, (2) surface diffusion, and (3) strengthening of interatomic bonds. Therefore, by applying the high-frequency power supply to at least one of the opposing wafers, ionic flow phenomena can be generated. (1) Movement of ions by electric field induction High-frequency electric fields attract or push ions on the wafer surface. This causes ions to move uniformly across the entire wafer surface.

[0089] (2) Surface diffusion As ions move across the wafer surface, atoms are rearranged. The rearrangement of atoms on the wafer surface creates a more stable energy state.

[0090] (3) Strengthening of interatomic bonds The rearrangement of atoms on the wafer surface strengthens the bonds between atoms. This results in a stronger bond between wafers.

[0091] In the high-frequency ionic fluid bonding process, a silicon wafer is chemically reacted in a vacuum to isotropically etch the oxide film on the wafer surface, and then the wafer surface is activated by soft sputtering with argon. Subsequently, the wafers are bonded together while maintaining the activated state of the wafer surface by creating a high-vacuum environment at high speed, for example, about 10 seconds. Furthermore, by continuously applying a high-frequency power supply between the wafers, ions on the wafer surface diffuse, causing ion movement and strengthening the interatomic bonds. This results in a strong bond between the wafers. Thus, high-frequency ionic fluid bonding technology is highly effective in wafer bonding technology, and can simultaneously improve the bonding strength and quality between wafers.

[0092] Furthermore, frequent automatic electrode replacement and the use of bare wafers contribute to reducing flakes and particles formed by Si sputtering, thereby achieving voidless bonding. This significantly reduces the frequency of cleaning within the chamber, contributing to reduced maintenance time and improved equipment uptime.

[0093] [An example of a semiconductor manufacturing system] An example of how the semiconductor wafer bonding apparatus of this embodiment and its examples is incorporated into a semiconductor manufacturing system will be described.

[0094] As shown in Figures 5 and 6, the semiconductor wafer bonding apparatus 34 can also be incorporated into the semiconductor manufacturing system 200 in place of the plasma chamber 10 in a conventional system. In the semiconductor manufacturing system 200 shown in Figures 5 and 6, a semiconductor wafer bonding apparatus 34 capable of plasma processing of semiconductor wafers and bonding of wafers, a vacuum bonding chamber 204, an atomic bonding chamber 206, a rotary cleaning chamber 208, a standby chamber 210, and a load lock chamber 212 are arranged around a central chamber 202 that houses a robot hand. A wafer transport mechanism 214 and multiple wafer cassettes 216 are arranged near the load lock chamber 212.

[0095] [An example of a wafer holding mechanism] Next, we will describe an example of a wafer holding mechanism for holding each wafer.

[0096] In this embodiment, a semiconductor wafer bonding apparatus and bonding method are configured such that an electrostatic chuck 80 (see Figures 7 to 9) is arranged as a wafer holding mechanism on the first stage 36 and the second stage 38 for holding semiconductor wafers W1 and W2. Alternatively, the electrostatic chuck 80 (see Figures 7 to 9), the first holding part 102, and the second holding part 104 may be replaced with other components.

[0097] Figures 7 and 8 illustrate the structures of a unipolar electrostatic chuck 78 and a bipolar electrostatic chuck 80. The electrostatic chucks 78 and 80 are made of insulating materials such as aluminum oxide (Al2O3) or aluminum nitride (AIN). The structure incorporates electrodes within the insulator, and applying a voltage to these electrodes attracts objects such as semiconductor wafers W1 and W2 (86 and 92).

[0098] The unipolar electrostatic chuck 78 shown in Figure 7 is a unipolar type and has a base substrate 82 and an internal electrode (also called an electrode sheet or polyimide film electrode layer) 84 disposed on the base substrate 82. The base substrate 82 applies either a positive or negative voltage to the internal electrode 84. For example, when a positive voltage is applied to the internal electrode 84, negative charges move to the surface of the object to be adsorbed 86, and the object to be adsorbed 86 is attracted to the unipolar electrostatic chuck 78. Conversely, when a negative voltage is applied to the internal electrode 84, positive charges move to the surface of the object to be adsorbed 86, and the object to be adsorbed 86 is attracted to the unipolar electrostatic chuck 78.

[0099] The electrostatic chuck 80 shown in Figure 8 is of the bipolar type and has a base substrate 88 and internal electrodes (also called electrode sheets or polyimide film electrode layers) 90 arranged on the base substrate 88. The base substrate 88 applies both positive and negative voltages to the internal electrodes 90. For example, negative charges move to the surface of the object to be adsorbed 92 facing the internal electrode 90 to which a positive voltage is applied, and positive charges move to the surface of the object to be adsorbed 92 facing the internal electrode 90 to which a negative voltage is applied, causing the object to be adsorbed 92 to be attracted to the bipolar electrostatic chuck 80.

[0100] An example of the use of a bipolar electrostatic chuck in a semiconductor wafer bonding apparatus is described. As shown in Figure 9, it is preferable that the electrostatic chucks 80 are built into the first stage 36 and the second stage 38, respectively. For convenience of explanation, the electrostatic chuck 80 built into the first stage 36 will be referred to as the first electrostatic chuck 80A, and the electrostatic chuck 80 built into the second stage 38 will be referred to as the second electrostatic chuck 80B. Each electrostatic chuck 80A and 80B is, for example, a bipolar type. Since the first stage 36 and the second stage 38 are arranged opposite each other, each electrostatic chuck 80A and 80B is positioned opposite each other, thereby forming a pair of electrostatic chucks.

[0101] The first electrostatic chuck 80A includes a first base substrate 88A and a first internal electrode 90A disposed on the first base substrate 88A. The first internal electrode 90A is connected to ground. The first base substrate 88A controls the voltage applied to the first internal electrode 90A. The first internal electrode 90A is composed of two or more adjacent first unit electrodes 91A, and voltages that are opposite to each other, positive and negative, are applied to each of the mutually adjacent first unit electrodes 91A.

[0102] The second electrostatic chuck 80B is positioned opposite the first electrostatic chuck 80A. The second electrostatic chuck 80B has the same configuration as the first electrostatic chuck 80A, including a second base substrate 88B and a second internal electrode 90B positioned on the second base substrate 88B. The second internal electrode 90B is connected to ground. The second base substrate 88B controls the voltage applied to the second internal electrode 90B. The second internal electrode 90B is composed of two or more adjacent second unit electrodes 91B, and voltages that are positive (plus) and negative (minus) and reversed with respect to each other are applied to the mutually adjacent second unit electrodes 91B.

[0103] Here, the first unit electrode 91A on the first electrostatic chuck 80A side and the second unit electrode 91B on the second electrostatic chuck 80B side, which is opposite to the first unit electrode 91A, are controlled by the first base board 88A and the second base board 88B to have voltages of opposite polarity (positive and negative) applied to them, respectively. As a result, the first unit electrode 91A of the first electrostatic chuck 80A, which is applied to the negative voltage, is positioned opposite to the second unit electrode 91B of the second electrostatic chuck 80B, which is applied to the positive voltage. Similarly, the first unit electrode 91A of the first electrostatic chuck 80A, which is applied to the positive voltage, is positioned opposite to the first unit electrode 91B of the second electrostatic chuck 80B, which is applied to the negative voltage.

[0104] As a general principle of the bipolar electrostatic chuck 80, with a semiconductor wafer W1 placed on the first electrostatic chuck 80A and a semiconductor wafer W2 placed on the second electrostatic chuck 80B, positive and negative voltages are applied to the first internal electrode 90A and the second internal electrode 90B, respectively. This causes the positive and negative charges on the semiconductor wafers W1 and W2 to move in an attractive manner toward the respective internal electrodes 90A and 90B facing them (dielectric polarization). As a result, an attractive force is generated between the first internal electrode 90A and the semiconductor wafer W1, and between the second internal electrode 90B and the semiconductor wafer W2, thereby fixing the semiconductor wafers W1 and W2 in place.

[0105] As shown in Figure 7, in general, in a unipolar electrostatic chuck 78, applying a voltage between the object to be adsorbed (such as a semiconductor wafer) 86 and the internal electrode 84 (also called the chuck or holding device) generates an electric charge on the surface of the object to be adsorbed (such as a semiconductor wafer) 86. Specifically, if the internal electrode 84 is positively charged, the surface of the object to be adsorbed (such as a semiconductor wafer) 86 facing it becomes negatively charged, and if the internal electrode 84 is negatively charged, the surface of the object to be adsorbed (such as a semiconductor wafer) 86 facing it becomes positively charged. This principle is the same in the bipolar electrostatic chuck 80 shown in Figure 8.

[0106] Normally, the surfaces of semiconductor wafers W1 and W2 become negatively charged (or potentially positively charged) after plasma treatment and activation. Therefore, when attempting to join semiconductor wafers W1 and W2, whose surfaces are negatively charged (or positively charged) to each other, they repel each other electrically. In this state, if semiconductor wafers W1 and W2 are forcibly joined together, they will repel each other, causing misalignment and reducing the accuracy of the bond between semiconductor wafers W1 and W2.

[0107] As shown in Figure 9, by positively (negatively) charging the surface of one semiconductor wafer W1 and negatively (positively) charging the surface of the other semiconductor wafer W2, a state in which the semiconductor wafers to be joined are charged with opposite polarities is intentionally created. This allows for improved adhesion by utilizing both van der Waals forces (intermolecular forces) and Coulomb forces (electrostatic forces) generated between them, thereby assisting in the joining of semiconductor wafers W1 and W2.

[0108] Generally, objects with negative static charge (or positive charge) repel each other. This is one of the fundamental properties of static electricity; charges of the same sign (for example, both having a negative charge) repel each other, while charges of opposite polarity (for example, one positive and the other negative) attract each other.

[0109] Semiconductor wafers W1 and W2, charged with opposite polarities, are controlled by a surface voltage that does not cause discharge. When the positively charged semiconductor wafer W1 (or W2) comes into contact with the negatively charged semiconductor wafer W2 (or W1), electrons move from the positively charged object to the negatively charged object, neutralizing the charge. This weakens the effect of static electricity and simultaneously increases the bonding adhesion force during bonding.

[0110] In a typical bipolar electrostatic chuck, the surface of a semiconductor wafer is maintained in an electrical equilibrium state by applying voltages of the same magnitude (absolute value) to both the positive and negative sides.

[0111] In contrast, instead of applying voltages of the same magnitude (absolute value) to the positive and negative terminals, the system is designed to intentionally disrupt the balance between positive and negative by applying voltages of different magnitudes. In other words, it creates an unbalanced state between the positive and negative voltages in terms of the magnitude of the applied voltages.

[0112] As shown in Figure 9, for example, a voltage of -400 volts is applied to one of the first unit electrodes 91A constituting the first internal electrode 90A of the first electrostatic chuck 80A, and a voltage of +500 volts is applied to the other first unit electrode 91A. Simultaneously, a voltage of +400 volts is applied to one of the second unit electrodes 91B constituting the second internal electrode 90B of the second electrostatic chuck 80B, and a voltage of -500 volts is applied to the other second unit electrode 91B.

[0113] Here, the first unit electrode 91A of the first internal electrode 90A of the first electrostatic chuck 80A, to which a voltage of -400 volts is applied, and the second unit electrode 91B of the second internal electrode 90B of the second electrostatic chuck 80B, to which a voltage of +400 volts is applied, are positioned opposite each other. Although these have different polarities (positive and negative), they are subjected to the same magnitude of voltage in absolute terms.

[0114] Furthermore, the first unit electrode 91A on the other side of the first internal electrode 90A of the first electrostatic chuck 80A, to which a voltage of +500 volts is applied, and the second unit electrode 91B on the other side of the second internal electrode 90B of the second electrostatic chuck 80B, to which a voltage of -500 volts is applied, are set to face each other. Although these have different polarities (positive and negative), they are subjected to the same magnitude of voltage in absolute terms.

[0115] As a result, the surface of the semiconductor wafer W1 facing the first electrostatic chuck 80A becomes charged with a charge of +100 volts, which is the difference between the +500 volts and -400 volts of the first electrostatic chuck 80A. Similarly, the surface of the semiconductor wafer W2 facing the second electrostatic chuck 80B becomes charged with a charge of -100 volts, which is the difference between the +400 volts and -500 volts of the second electrostatic chuck 80B.

[0116] At this time, floating charges are generated on the surfaces of semiconductor wafers W1 and W2. As a result, by applying a reverse voltage to the opposing internal electrodes 90A and 90B (or to the unit electrodes), the semiconductor wafers W1 and W2 are attracted to each other by a strong Coulomb force and bonded together. This suppresses the generation of bubbles when semiconductor wafers W1 and W2 are bonded together.

[0117] In this process, it is preferable that the semiconductor wafers W1 and W2, held by a pair of electrostatic chucks 80A and 80B, are placed in a miniature space where the distance between them is between 10 μm and 50 μm. In this miniature space, the semiconductor wafers W1 and W2 are bonded together while maintaining their planar orientation.

[0118] It should be noted that this embodiment and the examples illustrate one aspect of the present invention, and the present invention is not limited thereto. Differences in the degree of design modifications from this embodiment and the examples are naturally included within the scope of the technical idea of ​​the present invention. [Explanation of symbols]

[0119] 14 Chambers 16 stages 34. Semiconductor wafer bonding equipment 36. Stage 1 38. Second Stage 78. Single-pole electrostatic chuck 80 Bipolar electrostatic chuck 80A First electrostatic chuck 80B Second electrostatic chuck 82 Base board 84 Internal electrode 86 Adsorbed object 88 Base Board 88A First base board 88B Second base 90 Internal electrode 90A First internal electrode 90B Second internal electrode 91A First unit electrode 91B Second unit electrode 92 Adsorbed object 102 First retaining part 104 Second retaining part 106 First replacement device 108 Second replacement device 110 High frequency power supply 112 Automatic pressure control device 114 Turbomolecular pumps 200 Semiconductor Manufacturing Systems 202 Central Chamber 204 Vacuum Bonding Chamber 206 Atomic junction chamber 208 Rotary Cleaning Chamber 210 Standby Chamber 212 Load Lock Chamber 214 Wafer transport mechanism 216 Wave Cassette G1 silicon wafer G2 Laminated Wafer W1 Semiconductor wafer W2 semiconductor wafer

Claims

1. A semiconductor wafer bonding apparatus for bonding semiconductor wafers together, A semiconductor wafer bonding apparatus comprising: activating the surface of a semiconductor wafer by plasma treatment; polarizing ions on the surface of the semiconductor wafer by creating a high vacuum within a predetermined time; and increasing the bonding strength between the semiconductor wafers by causing the ions to move on the surface of the semiconductor wafers by applying a high-frequency power supply to at least one of the opposing semiconductor wafers.

2. A semiconductor wafer bonding apparatus that bonds semiconductor wafers held by parallel planar plasma electrodes by plasma processing, A semiconductor wafer bonding apparatus comprising: activating the surface of a semiconductor wafer by plasma treatment; polarizing ions on the surface of the semiconductor wafer by creating a high vacuum; and bonding the semiconductor wafers together by causing the ions to move across the surface of the semiconductor wafer when a high-frequency power supply is applied to the semiconductor wafer.

3. The semiconductor wafer bonding apparatus according to claim 1, wherein the predetermined time is 0 to 30 seconds.

4. The semiconductor wafer bonding apparatus according to claim 1, wherein the predetermined time is 0 to 5 seconds.

5. The semiconductor wafer bonding apparatus according to claim 2, wherein an electrostatic chuck is used as the parallel plate plasma electrode.

6. A method for joining semiconductor wafers, which joins semiconductor wafers together, A method for bonding semiconductor wafers, comprising: activating the surface of a semiconductor wafer by plasma treatment; polarizing ions on the surface of the semiconductor wafer by creating a high vacuum within a predetermined time; and increasing the bonding strength between the semiconductor wafers by applying a high-frequency power supply to at least one of the opposing semiconductor wafers, causing the ions to move across the surface of the semiconductor wafers.

7. A semiconductor wafer joining method comprising joining semiconductor wafers held by parallel planar plasma electrodes by plasma treatment, A method for joining semiconductor wafers, comprising: activating the surface of the semiconductor wafer by plasma treatment; polarizing ions on the surface of the semiconductor wafer by creating a high vacuum; and joining the semiconductor wafers together by applying a high-frequency power supply to the semiconductor wafer, causing the ions to move across the surface of the semiconductor wafer.

8. The semiconductor wafer bonding method according to claim 6, wherein the predetermined time is 0 to 30 seconds.

9. The semiconductor wafer bonding method according to claim 6, wherein the predetermined time is 0 to 5 seconds.

10. The method for joining semiconductor wafers according to claim 7, wherein an electrostatic chuck is used as the parallel plate plasma electrode.

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