Semiconductor equipment

Abstract

To provide a semiconductor device with a high on-current. [Solution] A first oxide, a second oxide on the first oxide, and a third oxide on the second oxide. an oxide, a first insulator on a third oxide, a conductor on the first insulator, and a second oxide A material, a second insulator in contact with the third oxide, and a third insulator on the second insulator, The second oxide has first to fifth regions, and the resistance of the first region and the second region The resistance is lower than the resistance of the third region, and the resistance of the fourth and fifth regions is lower than that of the third region. The conductor is lower than the resistance of the first region and higher than the resistance of the second region, and the third region The third region, the fourth region, and the fifth region overlap with the third region, the fourth region, and A semiconductor device located above the fifth region.

Description

Technical Field

[0001] One aspect of the present invention relates to a semiconductor device and a method for manufacturing the semiconductor device. Alternatively, one aspect of the present invention relates to a semiconductor wafer, a module, and an electronic device. In the present specification and the like, the semiconductor device generally refers to a device that can function by utilizing semiconductor characteristics. Semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and storage devices are one aspect of semiconductor devices. Display devices (such as liquid crystal display devices and light-emitting display devices), projection devices, lighting devices, electro-optical devices, power storage devices, storage devices, semiconductor circuits, imaging devices, and electronic devices may be said to have semiconductor devices in some cases.

[0002] Note that one aspect of the present invention is not limited to the above technical field. One aspect of the invention disclosed in the present specification and the like relates to an object, a method, or a manufacturing method. Alternatively, one aspect of the present invention relates to a process, a machine, a manufacture, or a composition (composition of matter).

[0003]

[0004] As a semiconductor thin film applicable to transistors, silicon-based semiconductor materials are widely known, but oxide semiconductors are attracting attention as other materials. As oxide semiconductors, for example, not only oxides of single-element metals such as indium oxide and zinc oxide, but also oxides of multi-element metals are known. Among the oxides of multi-element metals, in particular, research on In-Ga-Zn oxide (hereinafter also referred to as IGZO) has been actively conducted.

[0005] ​​​​​​​​​​​​​Research on IGZO has shown that in oxide semiconductors, C is neither single-crystal nor amorphous. AAC (c-axis aligned crystalline) structure and nc(n An anocrystalline structure was discovered (see Non-Patent Documents 1 to 3). Non-Patent Documents 1 and 2 use an oxide semiconductor having a CAAC structure. Techniques for fabricating transistors are also disclosed. Furthermore, CAAC structure and nc structure Even oxide semiconductors with lower crystallinity can have minute crystals, as shown in Non-Patent Document 4. This is also shown in Non-Patent Document 5.

[0006] Furthermore, transistors using IGZO as the active layer have extremely low off-current (non See Patent Document 6.) LSIs and displays utilizing this characteristic have been reported. See Non-Patent Documents 7 and 8. [Prior art documents] [Non-patent literature]

[0007] [Non-Patent Document 1] S. Yamazaki et al., “SID Symposium Digest of Technical Papers”, 2012, volume 43, issue 1, pp.183-186 [Non-Patent Document 2] S. Yamazaki et al., “Japanese Journal of Applied Physics”, 2014, volume 53, Number 4S, p.04ED18-1-04ED18-10 [Non-Patent Document 3] S. Ito et al., “The Proceedings of AM-FPD'13 Digest of Technical Papers”, 2013, pp.151-154 [Non-Patent Document 4] S. Yamazaki et al., “ECS Journal of Solid State Science and Technology”, 2014, volume 3, issue 9, p.Q3012-Q3022 [Non-Patent Document 5] S. Yamazaki, “ECS Transactions”,2014, volume 64, issue 10, pp.155-164 [Non-Patent Document 6] K. Kato et al., “Japanese Journal of Applied Physics”, 2012, volume 51, p.021201-1-021201-7 [Non-Patent Document 7] S. Matsuda et al., “2015 Symposium on VLSI Technology Digest of Technical Papers”, 2015, p.T216-T217 [Non-Patent Document 8] S. Amano et al., “SID Symposium Digest of Technical Papers”, 2010, volume 41, issue 1, pp.626-629 [Overview of the Initiative] [Problems that the invention aims to solve]

[0008] One aspect of the present invention aims to provide a semiconductor device with a large on-current. Alternatively, one aspect of the present invention aims to provide a semiconductor device having high frequency characteristics. One aspect of the present invention is to provide a semiconductor device with good reliability. This may be one of the topics. Alternatively, one aspect of the present invention relates to a semiconductor device that can be miniaturized or highly integrated. One of the objectives is to provide a product that has good electrical characteristics. One of the objectives is to provide a semiconductor device that improves productivity. Alternatively, one aspect of the present invention is to provide a semiconductor device that improves productivity. One of our challenges is to provide high-performance semiconductor devices.

[0009] One aspect of the present invention provides a semiconductor device capable of retaining data over a long period of time. This is one of the challenges. One aspect of the present invention provides a semiconductor device with a high information writing speed. One of the challenges is to provide a semiconductor device with a high degree of design freedom. This is one of the challenges. One aspect of the present invention is a semiconductor device that can reduce power consumption. One of the objectives of this invention is to provide a novel semiconductor device. This will be one of the challenges.

[0010] Furthermore, the description of these problems does not preclude the existence of other problems. One approach does not require that all of these issues be resolved. The title will become clear from the description in the specification, drawings, claims, etc. It is possible to extract other issues from the descriptions in the drawings, claims, etc. [Means for solving the problem]

[0011] One aspect of the present invention comprises a first oxide, a second oxide on the first oxide, and the second oxide The third oxide above, the first insulator on the third oxide, the conductor on the first insulator, and Part of the top surface of oxide 2, part of the side surface of oxide 2, and part of the side surface of oxide 3 A second insulator in contact with the first, a third insulator on the second insulator, the upper surface of the third oxide, and the first The upper surface of the insulator, the upper surface of the conductor, and the fourth insulator in contact with the upper surface of the third insulator, The second oxide is located in the first region, the second region, and between the first and second regions. The third region, the fourth region located between the first and third regions, and the second region and the It has a fifth region located between the three regions, and the resistance of the first region and the second region is The resistance of the 4th and 5th regions is lower than the resistance of the 3rd region. The conductor is lower and higher than the resistance of the first and second regions, and the third region, The third, fourth, and fifth regions overlap with the fourth and fifth regions. Located above the region, a portion of the third oxide and a portion of the first insulator are on the side of the conductor. The second insulator is provided between the surface and the side surface of the third insulator, and the first region and the second It is a semiconductor device that is in contact with a region.

[0012] In the above, the conductor overlaps with at least a portion of the first region and the second region. Preferably, a fifth insulating material is in contact with the upper surface of the second insulating material. The fifth insulator has a body and is in contact with the lower surface of the third insulator and the side surface of the third oxide. It is preferable.

[0013] In the above, the first region, the second region, the fourth region, and the fifth region are phosphorus, It is preferable that it contains either or boron. Furthermore, in the above, the first region and the second This region contains more phosphorus or boron than the fourth and fifth regions. It is preferable. Furthermore, the first region, the second region, the fourth region, and the fifth region are the third region It is preferable to have more oxygen deficiency than the region. Also, the first region, the second region, and It is preferable that region 4 and region 5 have more hydrogen than region 3. .

[0014] Another aspect of the present invention involves a first oxide and a second oxide on the first oxide. Formed, and covered with a first oxide and a second oxide to form a first insulating film, and the first insulating A second oxide is superimposed on the film to form a first dummy gate, and the first dummy gate As a mask, the first dopant is added to the second oxide, and a portion of the first dummy gate is Remove to form a second dummy gate, and remove a portion of the second oxide to the second dummy gate. By exposing it and using the second dummy gate as a mask, the second dopant is applied to the second oxide. Add and cover the first insulating film and the second dummy gate to form the second insulating film, A third insulating film is deposited on the second insulating film, and a portion of the second insulating film and the third insulating film is used. Remove the top of the second dummy gate until it is exposed, and remove the second dummy gate and the second insulating film. Remove the portion and a part of the first insulating film to form an opening, and embed it in the opening. A third oxide, a fourth insulating film, and a conductive film are deposited in sequence, and the third oxide, the fourth insulating film , and removing a portion of the conductive film until the top of the third insulating film is exposed, the process of a semiconductor device This is the manufacturing method.

[0015] Furthermore, in the above, as the first Dopant and the second Dopant, Rin or It is preferable to use boron. Furthermore, in the above, the amount of the first dopant added is It is preferable that the amount of dopant 2 is greater than the amount of dopant 2 added. Also, in the above, the first dopant The addition of the dopant and the addition of the second dopant are performed by ion implantation, or ion doping. It is preferable that the method is used. Furthermore, in the above, the first dummy gate is carbon It is preferable to include. Furthermore, in the above, the formation of the second dummy gate is due to oxygen radicals It is preferable that this is carried out by an ashing process using [a specific method / tool]. [Effects of the Invention]

[0016] According to one aspect of the present invention, a semiconductor device with a large on-current can be provided. According to one aspect of the present invention, a semiconductor device having high frequency characteristics can be provided. Alternatively, according to one aspect of the present invention, a semiconductor device with good reliability can be provided. Alternatively, to provide a semiconductor device that can be miniaturized or highly integrated according to one aspect of the present invention. This is possible. Alternatively, according to one aspect of the present invention, a semiconductor device having good electrical characteristics is provided. This is possible. Alternatively, according to one aspect of the present invention, a highly productive semiconductor device can be provided. It is possible.

[0017] Alternatively, a semiconductor device capable of retaining data over a long period of time can be provided. Alternatively, it is possible to provide a semiconductor device with a high information writing speed. Or, design freedom. It is possible to provide semiconductor devices with high performance. Or, semiconductor devices that can reduce power consumption. We can provide a conductive device, or a novel semiconductor device.

[0018] Furthermore, the description of these effects does not preclude the existence of other effects. One embodiment does not need to have all of these effects. Other effects are described in the specification. This will become clear from the description in the drawings, claims, etc., and the specification, drawings, claims From descriptions such as these, it is possible to extract other effects. [Brief explanation of the drawing]

[0019] [Figure 1] A top view and a cross-sectional view of a semiconductor device according to one aspect of the present invention. [Figure 2] A cross-sectional view of a semiconductor device according to one aspect of the present invention. [Figure 3] A cross-sectional view of a semiconductor device according to one aspect of the present invention. [Figure 4] A top view and a cross-sectional view of a semiconductor device according to one aspect of the present invention. [Figure 5] A top view and a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 6] A top view and a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 7] A top view and a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 8] A top view and a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 9] A top view and a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 10] A top view and a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 11] A top view and a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 12] A top view and a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 13] A top view and a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 14] A top view and a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 15] A top view and a cross-sectional view of a semiconductor device according to one aspect of the present invention. [Figure 16] A top view and a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 17] A top view and a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 18] A top view and a cross-sectional view illustrating a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 19] A top view and a cross-sectional view of a semiconductor device according to one aspect of the present invention. [Figure 20] A cross-sectional view showing the configuration of a storage device according to one aspect of the present invention. [Figure 21] A cross-sectional view showing the configuration of a storage device according to one aspect of the present invention. [Figure 22] A block diagram and a perspective view showing an example of the configuration of a storage device according to one aspect of the present invention. [Figure 23] A circuit diagram showing an example of the configuration of a storage device according to one aspect of the present invention. [Figure 24] A schematic diagram of a semiconductor device according to one aspect of the present invention. [Figure 25] A schematic diagram of a storage device according to one aspect of the present invention. [Figure 26] A diagram showing an electronic device according to one aspect of the present invention. [Modes for carrying out the invention]

[0020] The embodiments will be described below with reference to the drawings. However, many embodiments are described. It can be implemented in different ways, without deviating from its purpose and scope. It will be readily apparent to those skilled in the art that the form and details can be varied in various ways. Therefore, the present invention shall not be construed as being limited to the contents described in the following embodiments.

[0021] Furthermore, in the drawings, the size, layer thickness, or area may be exaggerated for clarity. This may be the case. Therefore, it is not necessarily limited to that scale. Note that the drawing is an ideal This is a schematic example and is not limited to the shapes or values ​​shown in the diagram. For example, In the actual manufacturing process, processes such as etching can cause layers and resist masks to be altered as intended. Although there may be some decrease in volume, this may not be reflected in the diagram for the sake of ease of understanding. Furthermore, in drawings, the same reference numeral is used for identical parts or parts having similar functions, but different reference numerals are used for different parts. It is used in common throughout, and explanations of its repetition may be omitted. It also refers to similar functions. In some cases, the hatch patterns are the same, and no special designation is assigned.

[0022] Furthermore, the invention is made easier to understand, especially in top views (also called "plan views") and perspective views. Therefore, the description of some components may be omitted. Also, some hidden lines and other markings may be omitted. The word "included" may be omitted in some cases.

[0023] Furthermore, the ordinal numbers used in this specification, etc., as "1st," "2nd," etc., are used for convenience only. It does not indicate the order of processes or stacking order. Therefore, for example, "the first" should be written as "the second". This can be explained by appropriately replacing it with "of" or "the third of," etc. The ordinal numbers described herein do not correspond to the ordinal numbers used to specify one aspect of the present invention. There are cases where this is the case.

[0024] Furthermore, in this specification, phrases indicating placement such as "above" and "below" refer to the relative positions of the components. The positional relationships are used for convenience in explaining them by referring to the diagram. Also, the positions of the components are shown. The relationships change as appropriate depending on the direction in which each component is described. Therefore, in the specification... The terms explained are not limited to those used in the text; they can be appropriately rephrased depending on the context.

[0025] For example, in this specification, it is explicitly stated that X and Y are connected. In this case, X and Y are electrically connected, and X and Y are functionally connected. The cases disclosed in this specification, etc., include cases where X and Y are directly connected. Therefore, it is limited to predetermined connection relationships, for example, connection relationships shown in a diagram or text. Furthermore, connections other than those shown in the diagram or text are also disclosed in the diagram or text. It shall be considered as such.

[0026] Here, X and Y are objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films, etc.) Let's assume it is a layer, etc.

[0027] Furthermore, the source and drain functions may differ when using transistors with different polarities, or when the circuit The direction of the current may change during operation, which can cause the current to switch positions. In detailed documents, the terms "source" and "drain" may be used interchangeably. ru.

[0028] In this specification, depending on the transistor structure, channel formation may actually occur. The channel width in the region (hereinafter also referred to as the "effective channel width") and the transition The channel width shown in the top view of the stylus (hereinafter also referred to as the "apparent channel width") is as follows. ) and may differ. For example, when the gate electrode covers the side of the semiconductor, the effective ch When the channel width becomes larger than the apparent channel width, and its effect can no longer be ignored. For example, in a transistor that is very small and whose gate electrode covers the side of the semiconductor, the semiconductor In some cases, the proportion of channel-forming regions formed on the sides may increase. In such cases, the apparent The effective channel width will be larger than the channel width shown above.

[0029] In such cases, it can be difficult to estimate the effective channel width through actual measurements. For example, in order to estimate the effective channel width from the design value, the shape of the semiconductor is known. A certain assumption is necessary. Therefore, if the shape of the semiconductor is not precisely known, the effective It is difficult to accurately measure channel width.

[0030] In this specification, when simply referred to as "channel width," it refers to the apparent channel width. There is. Or, in this specification, when simply referred to as channel width, it means effective channel It can refer to width. Note that it can also refer to channel length, channel width, effective channel width, or apparent width. Channel width and other parameters can be determined by analyzing cross-sectional TEM images, etc. can.

[0031] Furthermore, semiconductor impurities refer to components other than the main components that make up the semiconductor, for example, concentrated Elements with a concentration of less than 0.1 atomic percent are considered impurities. The presence of impurities can, for example, lead to... High Density of States (DOS) of semiconductors and low crystallinity In some cases, such as the following may occur. If the semiconductor is an oxide semiconductor, the properties of the semiconductor may change. Examples of impurities that can be altered include Group 1 elements, Group 2 elements, Group 13 elements, and Group 14 elements. These include elements, Group 15 elements, and transition metals other than the main components of oxide semiconductors, for example, Examples include hydrogen, lithium, sodium, silicon, boron, phosphorus, carbon, and nitrogen. In the case of semiconductors, water can also function as an impurity. Also, in the case of oxide semiconductors, for example... In some cases, the presence of impurities can lead to the formation of oxygen vacancies. Also, if the semiconductor is silicon... In this case, impurities that alter the properties of semiconductors include, for example, Group 1 elements other than oxygen and hydrogen. These include Group 2 elements, Group 13 elements, Group 15 elements, and so on.

[0032] In this specification, silicon oxidnitride is defined as having a composition that contains more oxygen than nitrogen. It has a high content of [something]. Also, silicon nitride oxide, in terms of its composition, has more oxygen than [something]. It has a high nitrogen content.

[0033] Furthermore, in this specification, the term "insulator" shall be replaced with "insulating film" or "insulating layer." It is possible to replace the term "conductor" with "conductive film" or "conductive layer." This is possible. Also, the term "semiconductor" can be replaced with "semiconductor film" or "semiconductor layer." can.

[0034] Furthermore, in this specification, "parallel" means that two straight lines have an angle of -10 degrees or more and 10 degrees or less. This refers to a state where objects are arranged in degrees. Therefore, it also includes cases where the angle is between -5 degrees and 5 degrees. Furthermore, "approximately parallel" means that two straight lines are positioned at an angle of -30 degrees or more and 30 degrees or less. It refers to a state or condition. Also, "perpendicular" means that two straight lines are positioned at an angle of 80 degrees or more and 100 degrees or less. This refers to a state in which the temperature is between 85 and 95 degrees. Therefore, it also includes cases between 85 and 95 degrees. "Perpendicular" refers to a state where two straight lines are positioned at an angle between 60 degrees and 120 degrees.

[0035] In this specification, a barrier film is defined as a film that suppresses the permeation of impurities such as water and hydrogen, as well as oxygen. A membrane that has a controlling function, and if the barrier membrane is conductive, it is called a conductive barrier. It is sometimes called the diaphragm.

[0036] In this specification, metal oxide refers to metal in a broad sense. It is an oxide. Metal oxides are oxide insulators and oxide conductors (including transparent oxide conductors). . ), oxide semiconductor (also called Oxide Semiconductor or simply OS) They are classified into categories such as . ) For example, when a metal oxide is used in the semiconductor layer of a transistor, These metal oxides are sometimes referred to as oxide semiconductors. In other words, OS FETs or OS Where a transistor is mentioned, the transistor is an oxide or oxide semiconductor. It can be rephrased as a transistor with a body.

[0037] Furthermore, in this specification, normally off means not applying a potential to the gate, or The current flowing through the transistor per 1 μm of channel width when the gate is given a ground potential. However, at room temperature, 1 × 10 -20 A or less, 1 × 10 at 85℃ -18 A or less, or 1 × 10 at 125℃ -16 This means being less than or equal to A.

[0038] (Embodiment 1) The following describes the specific configuration of a semiconductor device having a transistor 200 according to one aspect of the present invention. An example of this will be explained using Figures 1 to 19.

[0039] <Example of semiconductor device configuration> Figures 1(A), 1(B), 1(C), and 1(D) illustrate one aspect of the present invention. These are top and cross-sectional views of the transistor 200 and the area surrounding it.

[0040] Figure 1(A) is a top view of a semiconductor device having transistor 200. Also, Figure 1( Figures B) and 1(C) are cross-sectional views of the semiconductor device. Here, Figure 1(B) is a cross-sectional view of the semiconductor device. 1(A) is a cross-sectional view of the area indicated by the dashed line A1-A2, and shows the chain of transistor 200. This is also a cross-sectional view in the direction of the nellum's length. Furthermore, Figure 1(C) is a cross-sectional view of Figure 1(A) with a dashed line connecting A3-A4. This is a cross-sectional view of the area indicated by the arrow, and is also a cross-sectional view of transistor 200 in the channel width direction. Furthermore, Figure 1(D) is a cross-sectional view of the area indicated by the dashed line A5-A6 in Figure 1(A). In the top view of Figure 1(A), some elements have been omitted for clarity. Figure 2 is an enlarged view of oxide 230b and its vicinity in Figure 1(B).

[0041] [Transistor 200] As shown in Figure 1, transistor 200 is an acid placed on a substrate (not shown) A methyl oxide 230a, an oxide 230b placed on top of the oxide 230a, and an oxide 230b On the upper surface, there are layers 253a and 253b formed at a distance from each other, and layers 253a and 2 Between 53b, layers 252a and 252b are formed, separated from each other, and oxide 23 It is placed on 0b and superimposed between layer 253a and layer 253b to form a portion of the opening 263. The insulator 280, the conductor 260 placed in the opening 263, the oxide 230b, and An insulator 250 and an oxide 230b are placed between the insulator 280 and the conductor 260. , and an oxide 230c disposed between an insulator 280, an insulator 250, and Here, as shown in Figures 1(B) and 1(C), the upper surface of the conductor 260 is the insulator 250, acid It is preferable that the upper surface of the oxide 230c and the insulator 280 coincides substantially with each other.

[0042] In the following, oxides 230a, 230b, and 230c are grouped together. Sometimes it is called oxide 230. Also, layers 252a and 252b are combined into layer 2 There are cases where it is 52. Also, there are cases where layers 253a and 253b are collectively called layer 253. There is a match.

[0043] Furthermore, as shown in Figure 1, the insulator 224, oxide 230a, and oxide 230b, It is preferable that an insulator 256 is placed between the insulator 280 and the other insulator. Here, the insulator 25 6 is the top and side of layer 253a, and the top and side of layer 253b, as shown in Figures 1(B) and 1(C). It is preferable that it is in contact with the surface, the side surface of the oxide 230c, and the upper surface of the insulator 224.

[0044] Furthermore, as shown in Figure 1, an insulator 266 is placed between insulator 256 and insulator 280. It is preferable that the insulator 266 is as shown in Figures 1(B) and 1(C), the insulator 2 It is preferable that it is in contact with the upper surface of 56, the side surface of the oxide 230c, and the lower surface of the insulator 280. .

[0045] In transistor 200, the channel is formed in the region (hereinafter referred to as the channel formation region). Also known as ) and in its vicinity, oxide 230a, oxide 230b, and oxide 2 Although the present invention shows a configuration in which three layers of 30c are stacked, the present invention is not limited to this. For example, a two-layer structure of oxide 230b and oxide 230c, or a laminated structure of four or more layers. It may also be configured to include the oxide 230a, oxide 230b, and oxide 230 Each of c may have a stacked structure of two or more layers. Also, in transistor 200 Although the conductor 260 is shown as a two-layer laminated structure, the present invention is not limited thereto. No. For example, the conductor 260 may have a single-layer structure or a multilayer structure of three or more layers. That's fine.

[0046] For example, the oxide 230c is composed of a first oxide and a second oxide on the first oxide. If a layered structure is present, the first oxide has a composition similar to oxide 230b, and the second oxide The material preferably has a composition similar to oxide 230a.

[0047] Here, the conductor 260 functions as the gate electrode of the transistor, and layer 252a and Layer 253a, and layers 252b and 253b are, respectively, source regions or drain regions. It functions as an insulator. As described above, the conductor 260 is insulator 280, insulator 266 It is formed to be embedded in the opening 263 of the insulator 256. Also, the opening 263 is It is formed in the region sandwiched between layers 253a and 253b. Here, the conductor 260, layer 252 The arrangement of layers a, 252b, 253a, and 253b is self-aligned with respect to the opening 263. It is selected accordingly. In other words, in transistor 200, the gate electrode is selected from the source electrode. It can be positioned between the rain electrodes in a self-aligned manner. Therefore, the conductor 260 can be positioned Since it can be formed without providing a margin for alignment, transistor 200 This allows for a reduction in the occupied area, thereby enabling miniaturization and high integration of semiconductor devices. It is possible.

[0048] Furthermore, as shown in Figure 1, the conductor 260 is provided inside the insulator 250. 60a and a conductor 260b provided so as to be embedded inside the conductor 260a, It is preferable to have it.

[0049] Furthermore, transistor 200 is connected to an insulator 214 placed on a substrate (not shown) an insulator 216 placed on top of the insulator 214, and a component arranged to be embedded in the insulator 216. The conductor 205 is placed, and the insulator 216 and the insulator 222 are placed on top of the conductor 205. Preferably, the insulator 224 is disposed on top of the insulator 222. It is preferable that oxide 230a is placed on top of 4.

[0050] Furthermore, on top of the transistor 200, there is an insulator 274 that functions as an interlayer film, and an insulator It is preferable that 281 is arranged. Here, the insulator 274 is conductor 260, insulator 2 It is preferable that the 50, oxide 230c, and the insulator 280 be placed in contact with the upper surface of the insulator.

[0051] Insulators 222, 256, 266, and 274 contain hydrogen (for example, It is preferable that the material has the function of suppressing the diffusion of hydrogen atoms, hydrogen molecules, etc. For example, insulation. Body 222, insulator 256, insulator 266, and insulator 274 are insulator 224, insulator It is preferable that the hydrogen permeability is lower than that of 250 and insulator 280. Also, insulator 222 Insulators 256, 266, and 274 contain oxygen (e.g., oxygen atoms, oxygen). It is preferable that it has the function of suppressing the diffusion of molecules, etc. For example, insulator 222, insulation Body 256, insulator 266, and insulator 274 are insulator 224, insulator 250, and It is preferable that the oxygen permeability is lower than that of insulator 280.

[0052] Here, insulator 224, oxide 230a, oxide 230b, and insulator 250 are insulators From the edge body 280 and insulator 281, insulator 256, insulator 266, oxide 230c, And it is separated by insulator 274. Therefore, insulator 280 and insulator 281 The impurities contained, such as hydrogen, and excess oxygen, affect insulator 224, oxide 230a, and oxide 2 This can prevent contamination of 30b and the insulator 250.

[0053] Also, as shown in Figures 1(B) and 1(D), it is electrically connected to transistor 200 and plugged in. Conductors 240 (conductors 240a and conductors 240b) that function as such are provided. This is preferable. Furthermore, an insulator 241 is placed in contact with the side surface of the conductor 240 which functions as a plug. Insulators 241a and 241b are provided. That is, insulator 256, insulator Insulators 266, 280, 274, and 281 are in contact with the inner wall of the opening of the insulators. A 241 is provided. In addition, the first conductor of the conductor 240 is in contact with the side surface of the insulator 241. It may also be configured such that a second conductor of the conductor 240 is provided further inside. Thus, the height of the top surface of the conductor 240 and the height of the top surface of the insulator 281 can be made to be approximately the same. In transistor 200, the first conductor of conductor 240 and the second conductor of conductor 240 Although this invention describes a configuration in which electrical bodies are stacked, the present invention is not limited to this. For example, Alternatively, the conductor 240 may be provided as a single layer or as a laminated structure of three or more layers. When a structure has a layered structure, ordinal numbers may be assigned to distinguish it based on the order of formation.

[0054] Furthermore, transistor 200 is made of oxide 230 (oxide 230a) which includes a channel formation region. Metal oxides (oxide 230b and oxide 230c) function as oxide semiconductors. It is preferable to use an oxide semiconductor (hereinafter also referred to as an oxide semiconductor). For example, the 230 oxide The metal oxide that forms the channel-forming region has a band gap of 2 eV or more, preferably 2 It is preferable to use a metal with a band gap of 0.5 eV or higher. By using oxides, the leakage current (off-current) in the non-conductive state of the transistor can be reduced. It can be made even smaller. By using such transistors, low power consumption can be achieved. We can provide conductive devices.

[0055] For example, as oxide 230, In-M-Zn oxide (where element M is aluminum, galvanic acid) Umium, yttrium, tin, copper, vanadium, beryllium, boron, titanium, iron, nickel Germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium One or more types selected from luminous, tantalum, tungsten, or magnesium. It is preferable to use metal oxides such as ) . In particular, element M can be aluminum, gallium, yttrium It is preferable to use um or tin. In addition, indium oxide and zinc oxide can be used as oxide 230. Using In-Ga oxide, In-Zn oxide, Ga-Zn oxide, or gallium oxide That's fine.

[0056] Here, oxide 230 is an element that forms an oxygen vacancy, or an element that bonds with an oxygen vacancy. When added, the carrier density may increase, and the resistance may decrease. Typical examples include boron and phosphorus. In addition to boron and phosphorus, hydrogen and carbon are also examples. Elemental, nitrogen, fluorine, sulfur, chlorine, titanium, noble gases, etc. can be used. Typical examples include helium, neon, argon, krypton, and xenon. Furthermore, oxide 230 includes aluminum, chromium, copper, silver, gold, platinum, tantalum, and nickel. Titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, ma Gnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium One or more metallic elements selected from among metallic elements such as thium and lanthanum. The following elements may be added. Among those mentioned above, boron and phosphorus are preferred to be added. The addition of boron and phosphorus is used in the production of amorphous silicon or low-temperature polysilicon. Because the equipment of the above element can be used, capital investment can be reduced. The concentration is determined by secondary ion mass spectrometry (SIMS). Measurements can be taken using methods such as pectrometry.

[0057] In particular, when adding elements to oxide 230, use elements that readily form oxides. Such elements are preferred. Typical examples of such elements include boron, phosphorus, aluminum, and magnesium. Examples include Cium. When this element is added to oxide 230, it removes oxygen from oxide 230. This can form an oxide. As a result, many oxygen vacancies occur in the oxide 230. A carrier is generated when an elementary defect combines with hydrogen in oxide 230, resulting in an extremely low-resistance region. Furthermore, the elements added to oxide 230 are in a stable oxide state in oxide 23. Because it is present in the 0, even if a process requiring a high temperature is performed in the subsequent step, the oxide It is difficult to detach from 230. In other words, as an element added to oxide 230, it forms an oxide. By using elements that are easily formed, the oxide 230 is less likely to become highly resistive even after going through high-temperature processes. It can form a region.

[0058] Layer 252 is a layer formed by adding the above elements to oxide 230. Figure 1(B) As shown in Figure 2, layers 252a and 252b face each other with the conductor 260 in between. It is formed in such a way that the upper surface is preferably in contact with oxide 230c. In a top view, the layer It is preferable that at least a portion of layers 252a and 252b is superimposed on the conductor 260. Here, the concentration of the above element in layer 252 is such that layers 252 and 253 of oxide 230 are formed. It is preferable that the oxygen deficiency is higher than that of the undefinite portion. Also, the amount of oxygen deficiency contained in layer 252 is Higher than the amount of oxygen vacancy in the areas where layers 252 and 253 of oxide 230 are not formed. This is preferable. As a result, layer 252 and layer 253 of oxide 230 Compared to areas where no structure has formed, the carrier density is higher and the resistance is lower.

[0059] Layer 253 is a layer formed by adding the above elements to the oxide 230, and is different from layer 252. It is formed by adding many of the above elements. As shown in Figures 1(B) and 2, Layers 253a and 253b are formed opposite each other with the conductor 260 and layer 252 in between. It is preferable that the upper surface is in contact with the insulator 256 and oxide 230c. Furthermore, the sides of layers 253a and 253b facing the conductor 260 are aligned with the sides of the conductor 260. This means that, or a portion of layer 253a and layer 253b are superimposed on the conductor 260. Preferably, the concentration of the above element in layer 253 is equivalent to the concentration of the above element in layer 252. Or preferably higher. Also, the amount of oxygen vacancies contained in layer 253 is oxidation The amount of oxygen deficiency in the portion of material 230 where layers 252 and 253 are not formed is higher than the amount of oxygen deficiency in the portion of material 230 where layers 252 and 253 are not formed. This is preferable. As a result, layer 253 is formed of oxide layer 252 and layer 253. Compared to the untreated portion, the carrier density is higher and the resistance is lower.

[0060] As shown in Figure 2, in the oxide 230, the conductor 260 is superimposed, and layer 252a and The region sandwiched between layers 252b is designated as region 234, and the region overlapping with layer 253 is designated as region 231 ( Region 231a and Region 231b) are designated as such, and the region overlapping with layer 252 is Region 232 (Region 2 Let region 32a and region 232b be included. As shown in Figure 2, region 234 is region 231a It is located between region 231b, and region 232a is located between region 231a and region 234. Region 232b is located between region 231b and region 234. Here, region 231 is region Compared to region 234, it is a region with a high carrier density and low resistance. Also, region 232 is a region Compared to region 234, this region has a higher carrier density and lower resistance, and compared to region 231... This is a region with low carrier density and high resistance. Alternatively, region 232 is equivalent to region 231. It may have a carrier density and equivalent resistance. Therefore, region 234 is transient It functions as the channel-forming region of sta 200, and region 231 is the source region or drain region. It functions as a region, and region 232 functions as a junction region.

[0061] By using the above configuration, the layer 252 superimposed on the conductor 260 is what is known as an overlap. It functions as a channel formation region (also called a Lov region). Therefore, the channel formation region of oxide 230 This prevents the formation of an offset region between the region and the source or drain region. This makes it possible to suppress the effective channel length from becoming larger than the width of the conductor 260. To further increase the on-current of transistor 200, improve the S value, and enhance the frequency characteristics. It can be measured.

[0062] By forming a region 231 in the oxide 230 that functions as a source region or drain region Therefore, without providing source and drain electrodes made of metal, in region 231 A conductor 240 that functions as a plug can be connected. The metal is in contact with the oxide 230. By providing the source electrode and drain electrode formed by the above, the manufacturing process of transistor 200 is completed. Alternatively, if high-temperature heat treatment is performed in a subsequent process, the source electrode and which are made of metal may be affected. The drain electrode oxidizes, degrading the on-current, S-value, and frequency characteristics of transistor 200. This may occur. However, in the semiconductor device shown in this embodiment, it is formed of metal. There is no need to provide source and drain electrodes. Therefore, the transistor 200 can be fabricated. Even when high-temperature heat treatment is performed in the process or subsequent process, good on-current, S value, and frequency are maintained. A semiconductor device exhibiting wavenumber characteristics can be provided. For example, the semiconductor shown in this embodiment. In the apparatus, after the fabrication of transistor 200, the temperature is set to between 450°C and 800°C, typically 60°C. It can perform processes involving high temperatures between 0°C and 750°C.

[0063] Furthermore, as described above, by adding elements that form oxygen vacancies to layers 252 and 253, By performing heat treatment, the hydrogen contained in region 234, which functions as a channel-forming region, is layered In some cases, oxygen deficiencies in layer 253 can be captured. Here, in layer 253 or layer 252 The concentration of hydrogen contained is in the portion where layers 252 and 253 of oxide 230 are not formed. It is preferable that the hydrogen concentration is higher than that of transistor 200. This ensures stable electricity in transistor 200. By assigning specific characteristics, reliability can be improved.

[0064] Furthermore, although details will be described later, the transistor 200 was manufactured using the method shown in this embodiment. By forming this, the conductor 260 is self-aligned and positioned between layer 253a and layer 253b. Furthermore, it can be superimposed with layers 252a and 252b. Therefore, good electrical characteristics Semiconductor devices with the properties can be manufactured with a high yield. Also, the channel length (region 2) This can also be described as the length of layer 34 in the A1-A2 direction, or the distance between layer 252a and layer 252b. .) can also be made below the resolution limit of the exposure device. For example, the channel length can be set to 1 nm or more. It can also be 0 nm or less, more preferably 15 nm to 40 nm. By shortening the channel length, the on-current of transistor 200 is increased, and the S value is reduced. This can improve performance and enhance frequency response.

[0065] Furthermore, although the details of the semiconductor device fabrication method will be described later, layers 252 and 253 are By adding the above elements as dopants to the oxide 230 via the insulator 256, the shape is formed It is preferable that this be done. In this case, the dopant is not only oxide 230 but also insulator 25 It may also be added to product 6.

[0066] The dopants added to regions 231 and 232 of oxide 230 are oxide 230 In order to bond with the oxygen inside, in regions 231 and 232, the oxide 230 contains oxygen A defect is generated. Here, the hydrogen contained in region 234 of oxide 230 is in region 231. It diffuses into region 232 and is captured in the oxygen vacancy, thus reducing the resistance of the oxide 230 in region 234. The resistance value is expected to be higher compared to the resistance value after film formation. On the other hand, oxide 2 in region 231 The resistance value of 30 is lower compared to the resistance value after film formation because the oxygen vacancy captures the hydrogen. It is thought that this will happen.

[0067] Furthermore, the insulator 256 superimposed on region 231 contains oxygen (or excess oxygen, as described later). In this case, when the oxygen diffuses into the oxide 230, the oxide 230 becomes highly resistant in region 231. Furthermore, there are concerns that it may not function adequately as both a source and drain area. However, When the dopant is added to the insulator 256, the oxygen contained in the insulator 256 is absorbed by the dopant. It is captured and immobilized by the punt. Therefore, the release of oxygen from insulator 256 is suppressed. In region 231, the resistance value of oxide 230 remains lower than the resistance value after film formation. It is possible.

[0068] Due to the above mechanism, region 234 in oxide 230 maintains a high resistance value. It functions as a channel-forming region, and region 231 maintains a low resistance value, source region, It is thought that the sac can function as a drain region. Also, the oxide 230 is attached to it. The added dopant does not undergo diffusion or other changes even during subsequent heat treatments, and remains stable. Therefore, regions 234, 232, and 231 do not expand even after the heat treatment is performed. It does not undergo heat treatment and remains stable. In other words, the transistor according to the present invention does not undergo heat treatment. Due to electrical characteristics such as increases or decreases in channel length and connections between the source and drain regions, This reduces the risk of causing reliability failures.

[0069] In Figure 2, layers 252 and 253 are acid in the direction of the film thickness of oxide 230b. It is formed near the interface between the oxide 230b and the insulator 256 and oxide 230c, It is not limited to this. For example, layers 252 and 253 may have approximately the same thickness as the oxide 230b. It may have thickness, and it may also be formed on the oxide 230a.

[0070] Furthermore, in oxide 230, it can sometimes be difficult to clearly detect the boundaries of each region. The concentrations of metallic elements, as well as impurity elements such as hydrogen and nitrogen, detected within each region are Not only are there gradual changes in each region, but there are also continuous changes within each region (also known as gradients). ) It is also acceptable to do so. In other words, the closer the region is to the channel-forming region, the more likely it is to contain metal elements. Furthermore, it is sufficient that the concentrations of impurity elements such as hydrogen and nitrogen decrease.

[0071] In Figure 2, the conductor 260 overlaps with regions 234 and 232 (layer 252). Although the configuration for tatami matting has been shown, this embodiment is not limited to this. For example, Figure As shown in 3, the conductor 260 is located in region 234, region 232 (layer 252), and region 23 It may also be configured to overlap with a part of layer 1 (layer 253). By using such a configuration, the conductor In addition to layer 252 which overlaps with layer 260, a portion of layer 253 also functions as an overlapping region. Therefore, between the channel-forming region of oxide 230 and the source or drain region This more reliably prevents the formation of an offset region, and the effective channel length is 260 conductor This prevents the width from becoming larger than the specified width. This allows the ON state of transistor 200. By increasing the current, the S value can be improved, and the frequency characteristics can be enhanced.

[0072] Based on the above, it is possible to provide a semiconductor device having a transistor with a large on-current. Alternatively, it is possible to provide a semiconductor device having a transistor with high frequency characteristics. It can do so. Alternatively, it can suppress fluctuations in electrical characteristics, have stable electrical characteristics, and improve reliability. We can provide an improved semiconductor device, or a transistor with a low off-current. A semiconductor device having the following characteristics can be provided.

[0073] The following describes the detailed configuration of a semiconductor device having a transistor 200 according to one aspect of the present invention. I will explain this.

[0074] The conductor 205 is arranged to overlap with the oxide 230 and the conductor 260. It is preferable that the conductor 205 is embedded in the insulator 216. Here, the conductor It is preferable to ensure good flatness of the upper surface of 205. For example, the average surface of the upper surface of the conductor 205. The roughness (Ra) is 1 nm or less, preferably 0.5 nm or less, more preferably 0.3 nm or less. This will improve the flatness of the insulator 224 formed on the conductor 205. To improve the crystallinity of oxides 230a, 230b, and 230c, It is possible.

[0075] Here, the conductor 260 functions as the first gate (also called the top gate) electrode. In some cases, this may occur. Also, the conductor 205 is connected to the second gate (also called the bottom gate) electrode. In some cases, it may function in this way. In that case, the potential applied to the conductor 205 is marked on the conductor 260. By changing the potential independently of the applied potential, the Vth of transistor 200 can be controlled. It can be controlled. In particular, by applying a negative potential to the conductor 205, the transient By increasing the Vth of the 200 to greater than 0V, it becomes possible to reduce the off-current. Therefore, applying a negative potential to conductor 205 is better than not applying a negative potential to conductor 260 The drain current can be reduced when the applied potential is 0V.

[0076] Furthermore, the conductor 205 is provided in a larger area than the channel formation region in the oxide 230. This is preferable. In particular, as shown in Figure 1(C), the conductor 205 is the channel width of the oxide 230. It is preferable that the region extends even in the area outside the end where it intersects with the direction. On the outer side of the side surface of the material 230 in the channel width direction, there is a conductor 205 and a conductor 26 0 is preferably superimposed via an insulator.

[0077] Having the above configuration, the electric field of the conductor 260, which functions as the first gate electrode Then, the electric field of the conductor 205, which functions as a second gate electrode, causes the oxide 230 The channel formation region can be electrically surrounded.

[0078] Furthermore, as shown in Figure 1(C), the conductor 205 is extended and also functions as wiring. However, it is not limited to this, and a conductive material that functions as wiring is located beneath the conductor 205. A configuration with a body may also be used. Alternatively, one conductor 205 may be provided for each transistor. It is not always necessary. For example, if the conductor 205 is shared by multiple transistors... That's good too.

[0079] Furthermore, the conductor 205 is in contact with the inner wall of the opening of the insulator 216, forming a first conductor. Further inside, a second conductor is formed. Here, the first conductor of conductor 205 and The height of the second conductor and the height of the top surface of the insulator 216 can be made to be approximately the same. In diagram 200, a configuration is shown in which the first conductor and the second conductor of the conductor 205 are stacked. However, the present invention is not limited to this. For example, the conductor 205 is a single layer, Alternatively, it may be configured as a laminated structure of three or more layers. In some cases, ordinal numbers are assigned to distinguish them based on their formation order.

[0080] Furthermore, the first conductor of conductor 205 is a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, It suppresses the diffusion of impurities such as nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms. A conductor with a controlling function (that prevents the above-mentioned impurities from penetrating easily) may be used. Alternatively, an acid It has the function of suppressing the diffusion of an element (for example, at least one such as an oxygen atom or oxygen molecule). The above oxygen does not easily permeate.) It is preferable to use a conductor. In this specification, The function of suppressing the diffusion of impurities or oxygen refers to either the above-mentioned impurities or the above-mentioned oxygen. The function is to suppress one or all of the diffusion.

[0081] As the first conductor of conductor 205, a conductor having the function of suppressing oxygen diffusion is used. This prevents oxidation of the conductor 205 and a decrease in conductivity. Examples of conductors that have the function of suppressing oxygen diffusion include tantalum, tantalum nitride, It is preferable to use ruthenium or ruthenium oxide. Therefore, conductor 20 As the first conductor in 5, the above conductive material can be used in a single layer or in a multilayer structure.

[0082] Furthermore, tungsten, copper, or aluminum may be used as the second conductor of conductor 205. It is preferable to use a conductive material as the main component.

[0083] Insulator 214 prevents impurities such as water or hydrogen from entering the transistor 200 from the substrate side. It is preferable that it functions as a barrier insulating film that suppresses this. Therefore, insulator 21 4 consists of a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, and a nitrogen oxide molecule (N2O, NO). It has the function of suppressing the diffusion of impurities such as copper atoms (including NO2, etc.) (the above impurities permeate) It is difficult to do so.) It is preferable to use an insulating material. Alternatively, oxygen (for example, oxygen atoms, acid It has the function of suppressing the diffusion of at least one elementary molecule (the above oxygen does not easily permeate). It is preferable to use an insulating material.

[0084] For example, aluminum oxide or silicon nitride may be used as the insulator 214. This is preferable. This allows impurities such as water or hydrogen to be released from the substrate side of the insulator 214. This can suppress diffusion towards the transistor 200. Alternatively, the insulator 224 can be used to prevent this. This suppresses the diffusion of oxygen contained within the material towards the substrate side beyond the insulator 214.

[0085] Furthermore, the insulators 216, 280, and 281, which function as interlayer films, are insulators It is preferable that the dielectric constant is lower than that of the edge material 214. By using a material with a low dielectric constant as the interlayer film... This can reduce parasitic capacitance between wires. For example, insulator 216, insulator 28 0, and as insulator 281, silicon oxide, silicon oxide nitride, silicon oxide nitride, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, and carbon You can use silicon oxide with added nitrogen, or silicon oxide with voids, as appropriate. stomach.

[0086] Furthermore, the insulator 216 may have a laminated structure. For example, in the insulator 216, at least A structure may be adopted in which an insulator similar to the insulator 214 is provided at a portion that also contacts the side surface of the conductor 205. By adopting such a structure, oxidation of the conductor 205 can be suppressed by the oxygen contained in the insulator 216. Alternatively, the conductor 205 can suppress the absorption of oxygen contained in the insulator 216.

[0087] The insulators 222 and 224 have the function as a gate insulator.

[0088] Here, it is preferable that the insulator 224 contacting the oxide 230 desorbs oxygen by heating. In this specification, oxygen desorbed by heating may be referred to as excess oxygen. For example, the insulator 224 may be appropriately formed of silicon oxide, silicon oxynitride, or the like. By providing an oxygen-containing insulator in contact with the oxide 230, oxygen vacancies in the oxide 230 can be reduced, and the reliability of the transistor 200 can be improved.

[0089] Specifically, as the insulator 224, an oxide material in which some oxygen desorbs by heating is preferably used. The oxide that desorbs oxygen by heating is an oxide film in which the desorption amount of oxygen in terms of oxygen atoms is 1.0×10 atoms / cm or more, preferably 1.0×10 atoms / cm 18 or more, more preferably 2.0×10 3 atoms / cm 19 or more, and further preferably 3.0×10 atoms / cm 3 or more in TDS (Thermal Desorption Spectroscopy) analysis. Note that the above TDS analysis 19 3 20 3 <00​​​​​​​​​​​The surface temperature of the film during deposition is between 100°C and 700°C, or between 100°C and 40°C. A temperature range of 0°C or lower is preferred.

[0090] Furthermore, as shown in Figure 1(C), the insulator 224 has a region that does not overlap with the oxide 230b. It is preferable that the film thickness in one area is thinner than the film thickness in other areas. Therefore, the lower end of the conductor 260 can be positioned further down, so the first gate electrode This makes it easier to apply the electric field of the conductor 260, which functions as such, to the side surface of the oxide 230. This increases the on-current of transistor 200 and improves its frequency characteristics. Furthermore, the insulator 224 is superimposed with oxides 230b and 230a and provided in an island-like configuration. It is also acceptable to use this configuration.

[0091] Insulator 222, like insulator 214, allows impurities such as water or hydrogen to enter from the substrate side. It is preferable that it functions as a barrier insulating film to suppress contamination of transistor 200. For example, it is preferable that the insulator 222 has lower hydrogen permeability than the insulator 224. Body 222, insulator 256, insulator 266, and insulator 274, insulator 224, By surrounding the oxide 230 and the insulator 250, water or hydrogen is prevented from entering from the outside. This can prevent impurities from entering transistor 200.

[0092] Furthermore, the insulator 222 contains oxygen (for example, at least one such as an oxygen atom or oxygen molecule). It is preferable that the material has a function to suppress diffusion (i.e., the oxygen does not easily permeate it). For example, The edge material 222 is preferably less oxygen permeable than the insulator 224. By having a function of suppressing the diffusion of elements and impurities, the oxygen possessed by the oxide 230 can be reduced from diffusing to the substrate side. This is preferable. Also, the conductor 205 can be suppressed from reacting with the oxygen possessed by the insulator 224 or the oxide 230. This is preferable because it can reduce the diffusion to the substrate side. Also, the conductor 205 can be suppressed from reacting with the oxygen possessed by the insulator 224 or the oxide 230.

[0093] The insulator 222 may be an insulator containing one or both of oxides of aluminum and hafnium, which are insulating materials. As the insulator containing one or both of oxides of aluminum and hafnium, it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), etc. When the insulator 222 is formed using such a material, the insulator 222 functions as a layer that suppresses the release of oxygen from the oxide 230 and the mixing of impurities such as hydrogen from the peripheral portion of the transistor 200 into the oxide 230.

[0094] Alternatively, one selected from, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, and zirconium oxide may be added to these insulators. Or these insulators may be nitrided. Silicon oxide, silicon oxynitride, or silicon nitride may be laminated on the above insulators and used.

[0095] Also, the insulator 222 contains, for example, so-called high-k materials such as aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), or (Ba,Sr)TiO3 (BST). ​​​​​​​​​​​​​The insulating material may be used in a single layer or multilayer configuration. As transistors become smaller and more highly integrated... However, thinning the gate insulator can sometimes lead to problems such as leakage current. By using a high-k material as an insulator that functions as an insulator, the physical film thickness can be maintained. This makes it possible to reduce the gate potential during transistor operation.

[0096] The insulators 222 and 224 may have a laminated structure of two or more layers. In that case, it is not limited to laminated structures made of the same material, but also applies to laminated structures made of different materials. That's fine. For example, you could also configure it so that an insulator similar to insulator 224 is placed below insulator 222. stomach.

[0097] Oxide 230 consists of oxide 230a, oxide 230b on oxide 230a, and oxide 2 It has oxide 230c on 30b, and oxide 230a below oxide 230b. Therefore, impurities are transferred from the structure formed below oxide 230a to oxide 230b. Diffusion can be suppressed. Also, by having oxide 230c on oxide 230b , diffusion of impurities from structures formed above oxide 230c to oxide 230b It can be suppressed.

[0098] Furthermore, oxide 230 has a layered structure due to oxides with different atomic ratios of each metal atom. It is preferable that the metal oxide used in oxide 230a contains constituent elements The atomic ratio of element M in the oxide is the element of the constituent elements in the metal oxide used in oxide 230b. It is preferable that the ratio is greater than the atomic ratio of element M. Also, the metal oxide used in oxide 230a In this case, the atomic ratio of element M to In is in the metal oxide used in oxide 230b. Furthermore, it is preferable that the atomic ratio of element M to In is greater than that of In. Also, in oxide 230b In the metal oxide used, the atomic ratio of In to element M is used in oxide 230a. It is preferable that the atomic ratio of In to element M in the metal oxide is greater than that of In. Oxide 230c is a metal oxide that can be used in the case of oxide 230a or oxide 230b. The object can be used.

[0099] Oxides 230a, 230b, and 230c are preferably crystalline. In particular, it is preferable to use CAAC-OS. These oxides have few impurities or defects (such as oxygen vacancies), and possess a dense structure with high crystallinity. Having such oxide 230, the transistor 200 is manufactured in a way that is beneficial to the manufacturing process. It becomes stable at high temperatures (the so-called thermal budget).

[0100] Furthermore, the energy at the lower end of the conduction band of oxide 230a and oxide 230c is that of oxide 23 It is preferable that the energy is higher than the energy at the lower end of the conduction band at 0b. In other words, oxidation The electron affinity of material 230a and oxide 230c is smaller than the electron affinity of oxide 230b. It is preferable that... In this case, oxide 230c can be used as oxide 230a. It is preferable to use a metal oxide. Specifically, the metal oxide used in oxide 230c is In this case, the atomic ratio of element M in the constituent elements is in the metal oxide used in oxide 230b. It is preferable that the atomic ratio is greater than that of element M in the constituent elements. Also, in oxide 230c In the metal oxide used, the atomic ratio of element M to In is used in oxide 230b. It is preferably greater than the atomic ratio of element M to In in the metal oxide. Also, In the metal oxide used for the oxide 230b, the atomic ratio of In to element M is greater than the atomic ratio of In to element M in the metal oxide used for the oxide 230c. This is preferable.

[0101] Here, at the junction of the oxide 230a, the oxide 230b, and the oxide 230c, the energy level of the bottom of the conduction band changes smoothly. In other words, the energy level of the bottom of the conduction band at the junction of the oxide 230a, the oxide 230b, and the oxide 230c can also be said to change continuously or be continuously joined. To achieve this, it is advisable to lower the defect level density of the mixed layer formed at the interface between the oxide 230a and the oxide 230b and at the interface between the oxide 230b and the oxide 230c. Specifically, by having a common element (as the main component) other than oxygen between the oxide 230a and the oxide 230b and between the oxide 230b and the oxide 230c, a mixed layer with a low defect level density can be formed. For example, when the oxide 230b is an In-Ga-Zn oxide, In-Ga-Zn oxide, Ga-Zn oxide,

[0102] gallium oxide, etc. may be used as the oxide 230a and the oxide 230c. Also, the oxide 230c may have a laminated structure. For example, a laminated structure of an In-Ga-Zn oxide and a Ga-Zn oxide on the In-Ga-Zn oxide, or a laminated structure of an In-Ga-Zn oxide and gallium oxide on the In-Ga-Zn oxide can be used. In other words, a laminated structure of an In-Ga-Zn oxide and an oxide不含In can be used as the oxide 230c. For example, a laminated structure of an In-Ga-Zn oxide and a Ga-Zn oxide on the In-Ga-Zn oxide, or a laminated structure of an In-Ga-Zn oxide and gallium oxide on the In-Ga-Zn oxide can be used. In other words, a laminated structure of an In-Ga-Zn oxide and an oxide不含In can be used as the oxide 230c. [[ID=,37]] oxide-free can be used as the oxide 230c.

[0103] Specifically, for oxide 230a, In:Ga:Zn = 1:3:4 [atomic ratio], Alternatively, a metal oxide in an atomic ratio of 1:1:0.5 may be used. Also, oxide 230b and Then, gold in an atomic ratio of In:Ga:Zn = 4:2:3 or 3:1:2. A group oxide can be used. Also, for oxide 230c, In:Ga:Zn = 1:3:4 [Atomic ratio], In:Ga:Zn=4:2:3 [Atomic ratio], Ga:Zn=2:1 [Atom A metal oxide with a specific ratio, or Ga:Zn=2:5 [atomic ratio], can be used. A specific example of a layered structure for 230c is In:Ga:Zn=4:2:3[ Layered structure of [atomic ratio] and In:Ga:Zn=1:3:4 [atomic ratio], In:Ga:Z Layered structure of n=4:2:3 [atomic ratio] and Ga:Zn=2:1 [atomic ratio], In: Layered structures of Ga:Zn=4:2:3 [atomic ratio] and Ga:Zn=2:5 [atomic ratio] Examples include a layered structure with gallium oxide and an atomic ratio of In:Ga:Zn=4:2:3. It is possible.

[0104] In this case, the main carrier pathway is through oxide 230b and the vicinity of its interface. By configuring material 230a and oxide 230c as described above, oxide 230a and oxide 230 The defect level density at the interface with b, and at the interface between oxide 230b and oxide 230c, is reduced. This makes it possible to reduce the influence of interfacial scattering on carrier conduction. The Rangista 200 can achieve high on-current and high frequency characteristics. When oxide 230c is in a layered structure, the interface between oxide 230b and oxide 230c is as described above. In addition to the effect of lowering the defect level density in the oxide, the constituent elements of oxide 230c are insulating. It is expected that diffusion to the body 250 side will be suppressed. More specifically, oxide 230c The laminated structure is formed, and an oxide that does not contain In is positioned on top of the laminated structure, insulator 25 In which diffusion to the 0 side can be suppressed. The insulator 250 is used as a gate insulator. Therefore, if In diffuses, it will result in poor transistor characteristics. By using a layered structure for 230c, it becomes possible to provide highly reliable semiconductor devices. .

[0105] Insulator 250 functions as a gate insulator. Insulator 250 is on top of oxide 230c It is preferable to arrange them in contact with the surface. The insulator 250 is silicon oxide, silicon oxide and nitride. silicon nitride oxide, silicon nitride, silicon oxide with added fluorine, carbon-added acid Using silicon oxide, silicon oxide with added carbon and nitrogen, and silicon oxide with voids This is possible. In particular, silicon oxide and silicon oxide-nitride are stable to heat. It is preferable.

[0106] Insulator 250, like insulator 224, is free from impurities such as water or hydrogen in insulator 250. It is preferable that the concentration is reduced. The film thickness of the insulator 250 is 1 nm or more and 20 nm or less. It is preferable to do so.

[0107] Furthermore, a metal oxide may be provided between the insulator 250 and the conductor 260. It is preferable to suppress oxygen diffusion from the insulator 250 to the conductor 260. Therefore, the oxidation of the conductor 260 by oxygen in the insulator 250 can be suppressed. For example, Any metal oxide that can be used as the oxide 230c described above may be used.

[0108] Furthermore, the metal oxide may function as part of the gate insulator. Therefore, when silicon oxide or silicon oxide nitride is used for the insulator 250, the metal acid For the oxide, it is preferable to use a metal oxide, which is a high-k material with a high dielectric constant. The insulator is made of a laminated structure of insulator 250 and the metal oxide, making it safe against heat. A laminated structure with constant dielectric constant and high relative permittivity can be achieved. Therefore, the physical properties of the gate insulator This makes it possible to reduce the gate potential applied during transistor operation while maintaining the film thickness. Furthermore, it becomes possible to thin the equivalent oxide film thickness (EOT) of the insulator that functions as a gate insulator. ru.

[0109] Specifically, hafnium, aluminum, gallium, yttrium, zirconium, t Magnesium, titanium, tantalum, nickel, germanium, or magnesium, etc. A metal oxide containing one or more selected types can be used. In particular, A An insulator containing an oxide of either luminium or hafnium, or both. Aluminum, hafnium oxide, aluminum and hafnium oxides (hafnium oxide) It is preferable to use materials such as luminescent coatings.

[0110] Although the conductor 260 is shown as a two-layer structure in Figure 1, it may also be a single-layer structure or a three-layer structure or more. The above layered structure is also acceptable.

[0111] Conductor 260a contains the above-mentioned hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, and oxides. It has the function of suppressing the diffusion of impurities such as nitrogen molecules (N2O, NO, NO2, etc.) and copper atoms. It is preferable to use a conductor that does not conduct electricity. Alternatively, oxygen (for example, oxygen atoms, oxygen molecules, etc.) It is preferable to use a conductive material that has the function of suppressing the diffusion of at least one of the substances.

[0112] Furthermore, because the conductor 260a has the function of suppressing oxygen diffusion, the insulator 250 The oxygen contained in the material suppresses the oxidation of the conductor 260b, which reduces its conductivity. Yes, it is possible. Examples of conductive materials that have the function of suppressing oxygen diffusion include tantalum and nitrogen. It is preferable to use tantalum oxide, ruthenium oxide, or similar materials.

[0113] Furthermore, the conductor 260b is a conductive material mainly composed of tungsten, copper, or aluminum. It is preferable to use a conductive material. Also, since the conductor 260 also functions as wiring, It is preferable to use a highly conductive material. For example, tungsten, copper, or aluminum. A conductive material mainly composed of um can be used. In addition, the conductor 260b has a laminated structure. This may also be the case, for example, a laminated structure of titanium, titanium nitride and the above-mentioned conductive material. .

[0114] Furthermore, it can be used as an oxide 230 between the insulator 250 and the conductor 260a. A metal oxide may be provided. In this case, the metal oxide is used as a gate electrode, similar to the conductor 260. It functions as an electrode. By providing a metal oxide, the insulator 250 and the oxide 230 It is preferable that oxygen can be supplied to at least one of the two. Also, as the metal oxide, By using a metal oxide that has the function of suppressing oxygen permeability, the insulator 250, This allows the oxygen contained in the insulator 280 to suppress the oxidation of the conductor 260. This can be done. Alternatively, it can suppress the absorption of oxygen contained in the insulator 250 by the conductor 260. can.

[0115] Furthermore, as shown in Figures 1(A) and 1(C), layers 252 and 253 of oxide 230b overlap. In the region where it does not occur, in other words, in the channel formation region of oxide 230, oxide 230 The sides of the device are arranged to be covered with the conductive material 260. This allows the first gate electrode to be formed This makes it easier to apply the electric field of the conductor 260, which functions in this way, to the side surface of the oxide 230. Therefore, The on-current of transistor 200 is increased, the S value is improved, and the frequency characteristics are enhanced. It is possible.

[0116] Insulator 256, like insulator 214, contains impurities such as water or hydrogen, which are present in insulator 2 It functions as a barrier insulating film to prevent contamination from the 80 side into the transistor 200. It is preferable that the insulator 256 has lower hydrogen permeability than the insulator 224. Furthermore, as shown in Figures 1(B) and 1(C), the insulator 256 has sides of oxide 230c In part, the top and side surfaces of layer 253a, the top and side surfaces of layer 253b, that is, oxide 230b A portion of the top surface, a portion of the side surface, the side surface of the oxide 230a, and the top surface of the insulator 224 are in contact with each other. It is preferable to do so. With this configuration, the hydrogen contained in the insulator 280 will oxidize This can prevent penetration into material 230a, oxide 230b, and insulator 224.

[0117] Furthermore, the insulator 256 contains oxygen (for example, at least one such as an oxygen atom or oxygen molecule). It is preferable that the material has a function to suppress diffusion (i.e., the oxygen does not easily permeate it). For example, The edge material 256 preferably has lower oxygen permeability than the insulator 280 or the insulator 224.

[0118] Furthermore, the insulator 256 may be formed by a sputtering method. Body 256 is formed by depositing a film using the sputtering method in an oxygen-containing atmosphere, thereby creating an insulator 22 Oxygen can be added to the vicinity of the region in contact with the insulator 256 of 4. From this region, oxygen can be supplied into the oxide 230 via the insulator 224. Here, The insulator 256 has the function of suppressing the upward diffusion of oxygen, thereby preventing oxygen from diffusing into oxide 23. This prevents diffusion from 0 to the insulator 280. Also, the insulator 222 downwards By having the function of suppressing the diffusion of oxygen, oxygen diffuses from the oxide 230 to the substrate side. This can be prevented. In this way, oxygen is supplied to the channel-forming region of oxide 230. This reduces the oxygen deficiency of oxide 230, and the transistor's normal operation. It can suppress ionization.

[0119] As the insulator 256, for example, an acid made of either or both aluminum and hafnium. It is preferable to deposit an insulating film containing an alloy. Note that either aluminum or hafnium may be used. As insulators containing oxides of both, aluminum oxide, hafnium oxide, aluminum oxide It is preferable to use an oxide containing hafnium (hafnium aluminate), etc.

[0120] Furthermore, the insulator 256 may have a laminated structure. When the insulator 256 has a laminated structure, A second insulator is formed on a first insulator formed by sputtering using the ALD method. They may be formed. In this case, the first insulator and the second insulator are selected from the materials described above. The same material may be used, or different materials may be used. For example, as the first insulator Using aluminum oxide formed by sputtering, as the second insulator, A Aluminum oxide formed by the LD method may be used. It has high coverage and forms a film with high uniformity even in stepped areas caused by structures such as oxide 230. This can be achieved. Furthermore, the first insulating film formed by the sputtering method It can compensate for film defects, which is preferable.

[0121] Furthermore, as the insulator 256, for example, an insulator containing aluminum nitride may be used. As the insulator 256, the composition formula is AlNx (where x is a real number greater than 0 and less than or equal to 2, preferably) It is preferable to use a nitride insulator that satisfies the condition x is a real number greater than 0.5 and less than or equal to 1.5. This allows for the creation of a film with excellent insulating properties and excellent thermal conductivity, thus enabling the creation of a unique film. This improves the heat dissipation of the heat generated when the generator 200 is driven. As 256, aluminum titanium nitride, titanium nitride, etc. can also be used. In addition, by depositing the insulator 256 using the sputtering method, oxygen or o It is preferable because it can be formed without using highly oxidizing gases such as nitrogen. Silicon oxide or silicon nitride can also be used.

[0122] Thus, the insulator 224 and the insulator 256, which have barrier properties against hydrogen, and oxidation By covering material 230, the insulator 280 is separated from insulator 224 and oxide 230. This prevents impurities such as hydrogen from entering the transistor 200 from the outside. This suppresses the effect, thus providing transistor 200 with good electrical characteristics and reliability. Cut.

[0123] Furthermore, the insulator 256 may be, for example, one or both aluminum and hafnium. It is preferable to form an insulator containing one of the oxides. Note that one of aluminum and hafnium Alternatively, as an insulator containing both oxides, aluminum oxide, hafnium oxide, aluminum It is preferable to use oxides containing um and hafnium (such as hafnium aluminate). In this case, it is preferable that the insulator 256 be formed using the ALD method. Because this method provides good coverage, unevenness on the surface to be coated can cause stepped edges or other defects. This can prevent that.

[0124] Furthermore, as will be described later, the insulator 256 is a protective film when forming layers 252 and 253. It may also have the function of ion implantation in the formation of layers 252 and 253. When using ions or ion doping, an insulator 256 is provided as a protective film, thus preventing oxidation. The surface of 230 is not directly exposed to ions or plasma, and layers 252 and 253 This is preferable because it can suppress damage to oxide 230 during formation. Here, oxide 23 Damage of 0 refers to the formation of excessive oxygen deficiencies in oxide 230, or excessive oxide 2 This refers to a decrease in crystallinity, etc. For example, as an insulator 256, silicon oxide, oxidative nitride Silicon, silicon nitride oxide, silicon nitride, fluorine-added silicon oxide, carbon-added Silicon oxide with added carbon and nitrogen, or silicon oxide with vacancies Silicon and other materials can be used. It functions as an insulator 256, acting as such a protective film. The aforementioned barrier insulating film may be further laminated on top of the insulating material.

[0125] Insulator 266, like insulator 214, contains impurities such as water or hydrogen, which are present in insulator 2 It functions as a barrier insulating film to prevent contamination from the 80 side into the transistor 200. It is preferable that the insulator 266 has lower hydrogen permeability than the insulator 224. Furthermore, as shown in Figures 1(B) and 1(C), the insulator 266 is located on the upper surface of the insulator 256. It is preferable to arrange them so as to be in contact with the side surface of oxide 230c. As a result, hydrogen contained in the insulator 280 penetrates the oxide 230 and the insulator 224. This can be suppressed.

[0126] Thus, by using the insulators 256 and 266 which have barrier properties against hydrogen, By covering the insulator 224, insulator 250, and oxide 230, the insulator 280 provides an insulating layer. It is separated from the edge 224, oxide 230, and insulator 250. This prevents traction Because it can suppress the intrusion of impurities such as hydrogen from the outside of Transistor 200, This can provide the Sta200 with excellent electrical characteristics and reliability.

[0127] Furthermore, the insulator 266 contains oxygen (for example, at least one such as an oxygen atom or oxygen molecule). It is preferable that the material has a function to suppress diffusion (i.e., the oxygen does not easily permeate it). For example, The edge material 266 is preferably less oxygen permeable than the insulator 224. By having the function of suppressing the diffusion of elemental particles, the conductor 260 and the oxygen contained in the insulator 280 It is possible to suppress the reaction.

[0128] As the insulator 266, for example, a barrier insulating film that can be used for the insulator 256 is used. It is sufficient if it is present. However, if the insulator 256 has sufficient barrier properties against hydrogen, the insulator 266 does not necessarily require the use of a barrier insulating film.

[0129] Insulator 280, via insulators 256 and 266, is insulator 224, and acid It is provided on the ion 230. For example, as the insulator 280, silicon oxide, silicon oxide nitride Silicon oxide with carbon dioxide, silicon oxide with fluorine, silicon oxide with carbon , silicon oxide with added carbon and nitrogen, or silicon oxide with voids, etc. It is preferable that silicon oxide and silicon oxide nitride are thermally stable. This is particularly preferable. Especially silicon oxide, silicon oxide nitride, and silicon oxide with vacancies. The material is preferred because it can easily form regions containing oxygen that is desorbed by heating. .

[0130] It is preferable that the concentration of impurities such as water or hydrogen in the insulator 280 is reduced. Furthermore, the upper surface of the insulator 280 may be flattened.

[0131] Insulator 274, like insulator 214, is susceptible to impurities such as water or hydrogen from above. It is preferable that it functions as a barrier insulating film that suppresses contamination of the insulator 280. In this case, it is preferable that the insulator 274 has lower hydrogen permeability than the insulator 280.

[0132] Furthermore, the insulator 274 contains oxygen (for example, at least one such as an oxygen atom or oxygen molecule). It is preferable that the material has a function to suppress diffusion (i.e., the oxygen does not easily permeate it). For example, The edge material 274 preferably has lower oxygen permeability than the insulator 280. By having a function that suppresses the diffusion of elemental oxygen, the oxygen contained in the insulator 280 does not diffuse outward. It can be suppressed.

[0133] Insulator 274 can be used, for example, as insulator 214, insulator 222, etc. An insulator should be used. Additionally, a barrier insulating film against impurities such as water or hydrogen, and oxygen... A configuration may also be adopted in which an insulating film having the function of suppressing diffusion is laminated.

[0134] Furthermore, it is preferable to provide an insulator 281 that functions as an interlayer film on top of the insulator 274. i. Insulator 281, like insulator 224, has an impurity concentration of water or hydrogen in the film. It is preferable that this is reduced.

[0135] Also, insulators 281, 274, 280, 266 and 256 Conductors 240a and 240b are placed in the opening formed therein. Conductor 240a The conductor 240b is provided opposite the conductor 260, with the conductor 24 Even if the height of the upper surface of 0a and the conductor 240b is coplanar with the upper surface of the insulator 281 good.

[0136] Note that insulators 281, 274, 280, 266, and 25 An insulator 241a is provided in contact with the inner wall of the opening 6, and a conductor 240a is provided in contact with its side surface. A first conductor is formed therein. At least a portion of the bottom of the opening is a layer 253a The conductive material 240a is placed in contact with layer 253a. Here, as shown in Figure 1(D), The first conductor of the conductor 240a is the upper surface and side surface of layer 253a (upper surface of oxide 230b) It is preferable that the conductive material 240a is in contact with the sides (which may also be called the sides). By doing so, the contact area between the conductor 240a and layer 253a increases, so the transistor 20 This allows for improvements in the on-current and mobility of 0, as well as a reduction in the S value. Similarly, the absolute The openings of the edge body 281, insulator 274, insulator 280, insulator 266, and insulator 256 An insulator 241b is provided in contact with the inner wall, and the first conductor of the conductor 240b is provided in contact with its side surface. An electric body is formed. At least a portion of the bottom of the opening is located in layer 253b. The conductor 240b is in contact with layer 253b. Although not shown in the figure, similar to the conductor 240a, The first conductor of conductor 240b is the upper surface and side surface of layer 253b (upper surface of oxide 230b) It is preferable that the conductive material 240b is in contact with the sides (which may also be called the sides). By doing so, the contact area between the conductor 240b and layer 253b increases, so the transistor 20 This allows for improvements in the on-current and mobility of the 0-current, as well as a reduction in the S-value.

[0137] Conductors 240a and 240b are primarily composed of tungsten, copper, or aluminum. It is preferable to use conductive materials as components. Also, conductor 240a and conductor 24 0b may be a layered structure.

[0138] Furthermore, when the conductor 240 has a layered structure, oxide 230a, oxide 230b, insulator The conductors in contact with insulators 256, 266, 280, 274, and 281 are Using a conductor that has the function of suppressing the diffusion of impurities such as water or hydrogen, as described above. These are preferred. For example, tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, and It is preferable to use ruthenium oxide or the like. Also, the diffusion of impurities such as water or hydrogen. A conductive material having the function of suppressing may be used in a single layer or a laminate. By using this method, the oxygen added to the insulator 280 is absorbed by the conductors 240a and 240b. This prevents absorption by water or hydrogen from above the insulator 281. The impurities are mixed into the oxide 230 through the conductors 240a and 240b. It can be suppressed.

[0139] Insulators 241a and 241b can be used as insulator 214, etc. An insulator, such as aluminum oxide or silicon nitride, may be used. Insulator 24 Since 1a and insulator 241b are provided in contact with insulators 256 and 266, Impurities such as water or hydrogen are released from the insulator 280, conductor 240a and conductor 24 It is possible to suppress the mixing of 0b into the oxide 230. Also, in the insulator 280 This prevents the contained oxygen from being absorbed by conductors 240a and 240b. .

[0140] ALD or CVD methods can be used to form insulators 241a and 241b. can.

[0141] Also, although not shown in the figures, the upper surface of the conductor 240a and the upper surface of the conductor 240b are in contact with each other. Conductors that function as wires may be placed. Conductors that function as wiring are made of tungsten. It is preferable to use a conductive material mainly composed of copper or aluminum. The conductor may also have a laminated structure, for example, titanium, titanium nitride and the conductive material. It may be laminated. The conductor is formed so as to be embedded in an opening provided in the insulator. That's fine.

[0142] Also, although not shown in the diagram, a resistivity of 1.0 × 10 is applied to cover the conductor. 13 Ωcm or larger 1.0 × 10 15 Ωcm or less, preferably 5.0 × 10⁻⁶ 13 Ωcm or more, 5.0 × 10 14 It is preferable to provide an insulator with a resistivity of Ωcm or less. By providing an insulator, the insulator maintains its insulating properties while interacting with the transistor 200. Disperse the charge accumulated between the conductive material and the wiring, and the transistor and the This is preferable because it can suppress characteristic defects and electrostatic discharge damage in electronic devices that have a transistor.

[0143] As oxide 230c, insulator 256, and insulator 274, multilayer insulating films are used, respectively. The transistor 200 is shown in Figure 4. Similar to Figure 1, Figure 4(A)(B)(C)( D) is a top view and a cross-sectional view of transistor 200 and the area around transistor 200. Figure 4(A) is a top view of a semiconductor device having transistor 200. Also, Figure 4 (B) and Figure 4(C) are cross-sectional views of the semiconductor device. Here, Figure 4(B) is, Figure 4(A) is a cross-sectional view of the region indicated by the dashed line A1-A2, and shows the cross of transistor 200. This is also a cross-sectional view along the channel length. Furthermore, Figure 4(C) is a single-point chain of A3-A4 in Figure 4(A). This is a cross-sectional view of the area indicated by the line, and it is also a cross-sectional view of transistor 200 in the channel width direction. Furthermore, Figure 4(D) is a cross-sectional view of the area indicated by the dashed line A5-A6 in Figure 4(A). Oh, in the top view of Figure 4(A), some elements have been omitted from the illustration for clarity.

[0144] In the transistor 200 shown in Figure 4, oxide 230c is used as oxide 230c1 and Using oxide 230c2 laminated on top, as insulator 256, insulator 256a and on top Using the laminated insulator 256b, the insulator 274 is made of insulator 274a and laminated on top of it. A layered insulator 274b is used.

[0145] Here, metal oxides that can be used as oxide 230c1 and oxide 230b are A metal oxide that can be used as oxide 230c2 and oxide 230a. , you can use it. For example, as oxide 230c1, In:Ga:Zn=4:2:3[original Using metal oxides with a specific atom ratio, and considering the oxide 230c2, the ratio In:Ga:Zn = 1:3:4 You can use the [atomic ratio].

[0146] Furthermore, as an insulator 256a, it serves as a protective film when forming layers 252 and 253. The insulating material, designated as insulator 256b, suppresses the incorporation of impurities such as water or hydrogen. An insulator that functions as a barrier insulating film can be used. For example, if the insulator is 256a Silicon oxynitride or silicon oxide can be used. Also, insulator 256b Examples include silicon nitride, silicon oxide nitride, aluminum nitride, and aluminum oxide. It can be used.

[0147] Furthermore, as the insulator 274a, an insulator having the function of suppressing oxygen diffusion is used as the insulator 2 As 74b, it is used as a barrier insulating film to suppress the incorporation of impurities such as water or hydrogen. Any suitable insulator can be used. For example, as insulator 274a, it can be produced by sputtering. A film of aluminum oxide can be used. Also, as the insulator 274b, nitride Silicon, silicon nitride, aluminum nitride, etc., can be used.

[0148] <Component materials for semiconductor devices> The following describes the constituent materials that can be used in semiconductor devices.

[0149] <<Substrate>> Examples of substrates for forming the transistor 200 include an insulating substrate, a semiconductor substrate, and A conductive substrate can be used. Examples of insulating substrates include glass substrates, quartz substrates, and Fire substrate, stabilized zirconia substrate (such as yttria-stabilized zirconia substrate), resin substrate There are plates and other materials. Semiconductor substrates include, for example, silicon and germanium. Body substrate, or silicon carbide, silicon germanium, gallium arsenide, indium phosphide These include compound semiconductor substrates made of zinc oxide and gallium oxide. Furthermore, the aforementioned semiconductors A semiconductor substrate having an insulating region inside the substrate, for example, SOI (Silicon On Examples include insulator substrates. Conductive substrates include graphite substrates, metal substrates, and alloy substrates. These include substrates, conductive resin substrates, etc. Alternatively, substrates having metal nitrides, metal oxides, etc. There are substrates that have this feature. Furthermore, there are substrates in which a conductor or semiconductor is provided on an insulating substrate. A substrate on which a conductor or insulator is provided on a semiconductor substrate, a conductive substrate on which a semiconductor or insulator There are substrates that are provided. Alternatively, you can use substrates on which the elements are provided. i. Elements provided on the substrate include capacitive elements, resistive elements, switch elements, light-emitting elements, etc. Examples include memory elements.

[0150] <<Insulator>> Insulators include insulating oxides, nitrides, oxidized nitrides, nitride oxides, and metal oxides. Examples include metal oxides, metal nitrides, and metal nitride oxides.

[0151] For example, as transistors become smaller and more integrated, the gate insulator can be made thinner. This can lead to problems such as leakage current. By using high-k materials, the physical film thickness is maintained while lowering the voltage during transistor operation. This becomes possible. On the other hand, for the insulator that functions as an interlayer film, a material with a low dielectric constant is used. This reduces parasitic capacitance between wires. Therefore, it is possible to reduce the parasitic capacitance that occurs between wires. Then, you should select the materials.

[0152] Furthermore, insulators with high dielectric constants include gallium oxide, hafnium oxide, and zirconium oxide. Oxides containing aluminum, aluminum, and hafnium, aluminum and hafnium Oxidized nitrides, silicon and hafnium oxides, silicon and hafnium Examples include oxide nitrides containing um, or nitrides containing silicon and hafnium.

[0153] Furthermore, examples of insulators with low dielectric constant include silicon oxide, silicon oxide nitride, and silicon nitride oxide. Silicon oxide, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, Silicon oxide with added carbon and nitrogen, porous silicon oxide, or resins, etc. be.

[0154] Furthermore, transistors using oxide semiconductors contain impurities such as water or hydrogen and oxygen. Insulator having a function to suppress transmission (insulator 214, insulator 222, insulator 256, and By surrounding it with an insulator (such as 274), the electrical characteristics of the transistor can be stabilized. Yes, it is possible. Examples of insulators that have the function of suppressing the permeation of impurities such as hydrogen and oxygen include For example, boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, ri chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum An insulator containing neodymium, hafnium, or tantalum is used in a single layer or multilayer configuration. That would be fine. Specifically, an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen. For example, aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, oxide Yttrium, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and These include metal oxides such as tantalum oxide, aluminum nitride, titanium aluminum nitride, and titanium nitride. Metal nitrides such as tung, silicon nitride, or silicon nitride can be used.

[0155] Furthermore, the insulator that functions as a gate insulator has regions containing oxygen that is released by heating. It is preferable that the insulator has a region containing oxygen that is desorbed by heating. By creating a structure in which silicon oxide or silicon oxide nitride is in contact with oxide 230, This can compensate for the oxygen deficiency present in 230.

[0156] <<Conductive material>> Examples of conductive materials include aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, and crystalline silver. Tun, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium Zium, zirconium, beryllium, indium, ruthenium, iridium, strontium A metallic element selected from um, lanthanum, etc., or an alloy containing the aforementioned metallic elements. It is preferable to use an alloy or the like that which combines the above-mentioned metal elements. For example, tantalum nitride Titanium nitride, tungsten, nitrides containing titanium and aluminum, tantalum and aluminum Nitrides containing ruthenium, ruthenium oxide, ruthenium nitride, strontium and ruthenium It is preferable to use oxides containing lanthanum and nickel. Tantalum, titanium nitride, titanium and aluminum nitrides, tantalum and aluminum Includes nitrides, ruthenium oxide, ruthenium nitride, strontium and ruthenium oxides Oxides containing lanthanum and nickel are conductive materials that are resistant to oxidation, or that absorb oxygen. It is preferable because it is a material that maintains conductivity even when subjected to certain conditions. Furthermore, it does not contain impurity elements such as phosphorus. Highly electrically conductive semiconductors such as polycrystalline silicon and nickel silicides. Silicide may also be used.

[0157] Furthermore, multiple conductive layers formed from the above materials may be stacked and used. For example, as described above. A laminated structure may be formed by combining a material containing a metallic element with a conductive material containing oxygen. Furthermore, a laminate combining the aforementioned metal element-containing material and a nitrogen-containing conductive material is also used. It may also be used as a structure. Furthermore, a material containing the aforementioned metal element, a conductive material containing oxygen, and nitrogen A laminated structure combining conductive materials containing elements may also be used.

[0158] Furthermore, when oxide is used in the channel formation region of a transistor, it functions as a gate electrode. The conductor is a combination of a material containing the aforementioned metal element and a conductive material containing oxygen. It is preferable to use a laminated structure. In this case, an oxygen-containing conductive material is used to form channels. It is preferable to place it on the region side. By placing an oxygen-containing conductive material on the channel-forming region side, Oxygen detached from the conductive material is more easily supplied to the channel-forming region.

[0159] In particular, as a conductor that functions as a gate electrode, it is included in the metal oxide in which the channel is formed. It is preferable to use a conductive material containing metallic elements and oxygen. Conductive materials containing group elements and nitrogen may be used. For example, titanium nitride, tantalum nitride Conductive materials containing nitrogen, such as indium tin oxide and tungsten oxide, may also be used. Indium oxide containing tungsten, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide containing titanium dioxide, indium tin oxide containing titanium dioxide, indium zinc oxide Indium tin oxide with added silicon may also be used. Moogarium zinc oxide may also be used. Using such a material allows for channel formation. In some cases, hydrogen contained in the metal oxide can be captured. Alternatively, the outer atmosphere In some cases, it is possible to capture hydrogen that has been introduced from surrounding materials.

[0160] <<Metal Oxides>> It is preferable to use a metal oxide that functions as an oxide semiconductor as oxide 230. The following describes metal oxides applicable to the oxide 230 according to the present invention.

[0161] The oxide semiconductor preferably contains at least indium or zinc. In particular, indium Preferably, it contains aluminum and zinc. In addition, aluminum and gallium It is preferable that it contains yttrium or tin, as well as boron and silicon. Titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium Choose from materials such as magnesium, neodymium, hafnium, tantalum, tungsten, or magnesium. It may include one or more of the specified types.

[0162] Here, the oxide semiconductor is In-M-Zn acid, which has indium, element M, and zinc. Let's consider the case of a monized form. Note that element M is aluminum, gallium, yttrium, or This is tin, etc. Other elements that can be applied to element M include boron, silicon, and tin. Tungsten, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, Examples include neodymium, hafnium, tantalum, tungsten, and magnesium. However, the original In some cases, it is acceptable to combine multiple of the aforementioned elements as element M.

[0163] In this specification, metal oxides containing nitrogen are also referred to as metal oxides (metal oxides). They are sometimes collectively referred to as metal oxynitrides (metal oxides). Also, metal oxides containing nitrogen are sometimes called metal oxynitrides (metal oxides). It may also be called tal oxynitride.

[0164] Oxide semiconductors are divided into single-crystal oxide semiconductors and non-single-crystal oxide semiconductors. Examples of single-crystal oxide semiconductors include polycrystalline oxide semiconductors and amorphous oxide semiconductors. These are some of the known facts.

[0165] As an oxide semiconductor used in transistors, highly crystalline thin films are used. Preferably, the thin film can be used to improve the stability or reliability of the transistor. This can be achieved. For example, the thin film can be a thin film of a single-crystal oxide semiconductor or a thin film of a polycrystalline oxide semiconductor. Thin films of single-crystal oxide semiconductors or polycrystalline oxide semiconductors are examples. Forming a thin film of the body on a substrate requires a high-temperature or laser heating process. This increases manufacturing costs and also reduces throughput.

[0166] In 2009, In-Ga-Zn oxide having a CAAC structure (CAAC-IGZO) It has been reported in Non-Patent Documents 1 and 2 that the following was discovered: Therefore, CAAC-IGZO has c-axis orientation, grain boundaries are not clearly visible, and low It has been reported that it can be formed on a substrate at a low temperature. Furthermore, using CAAC-IGZO Transistors have been reported to possess excellent electrical characteristics and reliability.

[0167] Furthermore, in 2013, In-Ga-Zn oxide (nc-IGZO) having an nc structure was also discovered. It is called.) and was discovered (see Non-Patent Document 3). Here, nc-IGZO is a minute area The atomic arrangement has periodicity in a region (for example, a region of 1 nm to 3 nm), and different It has been reported that no regularity is observed in crystal orientation between regions.

[0168] Non-patent documents 4 and 5 describe the above CAAC-IGZO, nc-IGZO, And the average crystal size of each thin film of low-crystallinity IGZO obtained by electron beam irradiation. The changes in ions are shown. In a thin film of IGZO with low crystallinity, before irradiation with an electron beam... Even then, crystalline IGZO of about 1 nm has been observed. Therefore, here, IGZO In this context, a completely amorphous structure It has been reported that the presence of ure could not be confirmed. Furthermore, low crystallinity IGZO Compared to thin films, CAAC-IGZO thin films and nc-IGZO thin films undergo electron beam irradiation. It has been shown to have high stability against [unspecified]. Therefore, as a semiconductor for transistors, CAA It is preferable to use a thin film of C-IGZO or a thin film of nc-IGZO.

[0169] Transistors using oxide semiconductors exhibit extremely low leakage current in the non-conductive state. Specifically, the off-current per 1 μm channel width of the transistor is yA / μm(10 - 24 Non-patent document 6 shows that it is on the order of A / μm. For example, oxide semiconductors A low-power CPU that utilizes the characteristic of low leakage current in transistors made of solid material. (See Non-Patent Document 7.)

[0170] Furthermore, taking advantage of the low leakage current characteristic of transistors using oxide semiconductors, Applications of this transistor in display devices have been reported (see Non-Patent Document 8). Display device So, the displayed image changes dozens of times per second. The number of cycles is called the refresh rate. The refresh rate is also called the drive frequency. This can also happen. Such high-speed screen switching, which is difficult for the human eye to perceive, can cause eye strain. This is considered to be the cause. Therefore, the refresh rate of the display device is reduced, and the image It has been proposed to reduce the number of times the image is rewritten. Also, the refresh rate is reduced. This driving method makes it possible to reduce the power consumption of the display device. This is called Idling Stop (IDS) drive.

[0171] The discovery of CAAC and nc structures is related to oxide semiconductors having CAAC or nc structures. Improving the electrical characteristics and reliability of transistors using conductors, as well as reducing the cost of the manufacturing process. It contributes to reduced load and improved throughput. Furthermore, the leakage current of the transistor is low. Research is underway to apply this characteristic to display devices and LSIs of the transistor. It is being done.

[0172] [Composition of metal oxides] Hereinafter, CAC(C) that can be used in the transistor disclosed in one aspect of the present invention will be described. This document describes the configuration of a loud-Aligned Composite (Loud) OS.

[0173] Furthermore, in this specification, etc., CAAC (c-axis aligned crystal l) and when referring to CAC (Cloud-Aligned Composite) There is. Note that CAAC represents one example of a crystal structure, and CAC represents one of the functions or components of the material. This illustrates an example.

[0174] CAC-OS or CAC-metal oxide is a material in which some parts are conductive. It has both electrical and insulating properties in some parts of the material, and the material as a whole has semiconductor properties. Furthermore, CAC-OS or CAC-metal oxide is used to activate the transistor. When used in layers, the conductive function is the function of allowing electrons (or holes) that act as carriers to flow. In other words, the insulating function is the function of preventing the flow of electrons, which act as carriers. Conductive function and insulating function By making the functions of sex and other functions work complementaryly, a switching function (On / O) is created. To impart a function (to cause ff) to CAC-OS or CAC-metal oxide. This is possible. In CAC-OS or CAC-metal oxide, each instrument By separating the functions of both, it becomes possible to maximize the capabilities of both.

[0175] Furthermore, CAC-OS or CAC-metal oxide provides conductive and insulating properties. It has conductive regions. The conductive regions have the conductive function described above, and the insulating regions have the insulating function described above. It has the function of being conductive. Furthermore, within the material, the conductive region and the insulating region are separated by nanoparticles. In some cases, they are separated by a bell. Also, conductive regions and insulating regions are located within the material. It may be unevenly distributed. Also, the conductive region appears blurred around the edges and connected in a cloud-like manner when observed. There are cases where this can happen.

[0176] Furthermore, in CAC-OS or CAC-metal oxide, the conductive region and The insulating region is defined as 0.5 nm to 10 nm, preferably 0.5 nm to 3 nm. They may be dispersed in the material in sizes smaller than m.

[0177] Furthermore, CAC-OS or CAC-metal oxide have different band gaps. It is composed of components having [a certain characteristic]. For example, CAC-OS or CAC-metal ox The ide consists of a component with a wide gap due to the insulating region and a component with a wide gap due to the conductive region. It consists of a component having a narrow gap. In this configuration, when the carrier is flowing... In components with a narrow gap, the carrier mainly flows. The component with a gap acts complementaryly with the component with a wide gap, and the component with a narrow gap In conjunction with the components that perform this action, carriers also flow to components with a wide gap. Therefore, the above CAC-OS or CAC-metal oxide in the channel formation region of the transistor When used in this way, a high current driving force, i.e., a large on-current, is required in the transistor's on state. Furthermore, high field-effect mobility can be obtained.

[0178] In other words, CAC-OS or CAC-metal oxide is a matrix composite Material (matrix composite), or metal matrix composite material (metal It can also be called a matrix composite.

[0179] [Structure of metal oxides] Oxide semiconductors are divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. It is possible. As a non-single-crystal oxide semiconductor, for example, CAAC-OS (c-axis al igned crystalline oxide semiconductor), Crystalline oxide semiconductor, nc-OS (nanocrystalline oxide sem iconductor), pseudo-amorphous oxide semiconductor (a-like OS: amorph (Amorphous-like oxide semiconductor) and amorphous oxide semiconductor It has a body, etc.

[0180] CAAC-OS has c-axis orientation and multiple nanocrystals are linked in the ab-plane direction. It has a crystalline structure that is linked and distorted. Note that distortion refers to the linkage between multiple nanocrystals. Within a region, between a region with a aligned grid arrangement and another region with a aligned grid arrangement, the grid arrangement This refers to the point where the orientation has changed.

[0181] Nanocrystals are based on a hexagonal shape, but they are not necessarily regular hexagons; they can also be non-regular hexagonal. There are also cases where the distortion has a grid arrangement such as pentagons and heptagons. Furthermore, in CAAC-OS, even near strain, clear grain boundaries (grain bows) are present. It is not possible to confirm (also called 'ndary') crystal grains. In other words, due to the distortion of the lattice arrangement, It can be seen that the formation of the boundary is suppressed. This is because CAAC-OS is in the ab-plane direction. The oxygen atoms are not densely arranged, and the substitution of metal elements reduces the bond distance between atoms. This is thought to be because the distortion can be tolerated through changes and other processes.

[0182] Furthermore, CAAC-OS consists of a layer containing indium and oxygen (hereinafter referred to as the In layer), and A layered crystal in which layers containing element M, zinc, and oxygen (hereinafter referred to as (M,Zn) layers) are stacked. It tends to have a structure (also called a layered structure). Note that indium and element M are relative to each other. It is interchangeable, and if element M in the (M,Zn) layer is replaced with indium, then (In,M,Zn It can also be represented as a layer. Furthermore, if the indium in the In layer is replaced by element M, (In, It can also be represented as layer M.

[0183] CAAC-OS is a highly crystalline oxide semiconductor. On the other hand, CAAC-OS has a clear Since grain boundaries cannot be identified, a decrease in electron mobility caused by grain boundaries occurs. It can be said that it is difficult. Also, the crystallinity of oxide semiconductors is affected by the inclusion of impurities and the formation of defects. Because it may decrease, CAAC-OS is an oxidation product with fewer impurities and defects (such as oxygen deficiencies). It can also be called a material semiconductor. Therefore, oxide semiconductors containing CAAC-OS have stable physical properties. Therefore, oxide semiconductors containing CAAC-OS are heat-resistant and highly reliable.

[0184] nc-OS is used in minute regions (for example, regions between 1 nm and 10 nm, especially regions larger than 1 nm). It has periodicity in the atomic arrangement in the region of 3 nm or less. Also, nc-OS has different na No regularity is observed in the crystal orientation between the crystals. Therefore, no orientation is observed throughout the entire film. Therefore, depending on the analytical method, nc-OS may be a-like OS or amorphous oxide semiconductor. It can sometimes be indistinguishable from the body.

[0185] a-like OS is an oxide having a structure between nc-OS and amorphous oxide semiconductors. It is a semiconductor. an a-like OS has porous or low-density regions. That is, a-lik e OS has lower crystallinity compared to nc-OS and CAAC-OS.

[0186] Oxide semiconductors can take on diverse structures, each possessing different properties. One embodiment of the present invention Oxide semiconductors include amorphous oxide semiconductors, polycrystalline oxide semiconductors, a-like OS, and n It may have two or more types of c-OS and CAAC-OS.

[0187] [Transistors with oxide semiconductors] Next, we will explain the case where the above oxide semiconductor is used in a transistor.

[0188] Furthermore, by using the above oxide semiconductor in transistors, transistors with high field-effect mobility can be produced. It is possible to realize a zista. Furthermore, it is possible to realize a highly reliable transistor. ru.

[0189] Furthermore, it is preferable to use an oxide semiconductor with a low carrier density for the transistor. When lowering the carrier density of an oxide semiconductor film, the impurity concentration in the oxide semiconductor film is The degree should be lowered, and the defect level density should be lowered. In this specification, etc., when the impurity concentration is low, A low defect level density is referred to as high-purity intrinsic or substantially high-purity intrinsic. For example, oxides. Semiconductors have a carrier density of 8 × 10⁻¹⁰ 11 / cm 3 Less than 1 × 10 11 / cm 3 Less than 1 × 10 10 / cm 3 It is less than 1 × 10 -9 / cm 3 The above and That's all you need to do.

[0190] Furthermore, oxide semiconductor films that are high-purity intrinsic or substantially high-purity intrinsic have a defect level density of Because the level is low, the trap level density may also be low.

[0191] Furthermore, the time required for charges trapped in the trap levels of an oxide semiconductor to disappear is... It can persist for a long time, behaving almost like a fixed charge. Therefore, the trap level density is high. Transistors in which a channel formation region is formed in an oxide semiconductor have unstable electrical properties. There are cases where this occurs.

[0192] Therefore, in order to stabilize the electrical characteristics of a transistor, the impurity concentration in the oxide semiconductor is Reducing it is effective. Furthermore, in order to reduce the impurity concentration in oxide semiconductors, It is also preferable to reduce the concentration of impurities in the adjacent membrane. Examples of impurities include hydrogen, nitrogen, and Examples include potassium metals, alkaline earth metals, iron, nickel, and silicon.

[0193] [impurities] Here, we will explain the effects of various impurities in oxide semiconductors.

[0194] In oxide semiconductors, if silicon or carbon, which are among the Group 14 elements, are present, oxidation occurs. Defect levels are formed in silicon semiconductors. Therefore, in oxide semiconductors, silicon and carbon The concentration of the element and the concentrations of silicon and carbon near the interface with the oxide semiconductor (secondary ion mass spectrometry) (SIMS: Secondary Ion Mass Spectrometry) The concentration obtained is 2 × 10 18 atoms / cm 3 The following is preferably 2 × 10 17 a toms / cm 3 The following applies:

[0195] Furthermore, if an alkali metal or alkaline earth metal is present in the oxide semiconductor, the defect levels will be They may form and generate carriers. Therefore, alkali metals or alkaline earth metals Transistors using oxide semiconductors containing this material tend to exhibit normally-on characteristics. Therefore, the concentration of alkali metals or alkaline earth metals in oxide semiconductors is reduced. This is preferable. Specifically, alkali metals in oxide semiconductors obtained by SIMS or The concentration of alkaline earth metals is 1 × 10⁻⁶. 18 atoms / cm 3 The following is preferably 2 × 10 16 atoms / cm 3 Do the following:

[0196] Furthermore, in oxide semiconductors, when nitrogen is present, electrons, which are carriers, are generated. The density increases, making it easier to convert to n-type semiconductors. As a result, oxide semiconductors containing nitrogen become semiconductors. The transistors used in the layer tend to exhibit normally-on characteristics. Therefore, in the oxide semiconductor... In this context, it is preferable that nitrogen is reduced as much as possible, for example, nitrogen in oxide semiconductors The elementary cardinality in SIMS is 5 × 10⁻⁶. 19 atoms / cm 3 Less than 5 × 1 0 18 atoms / cm 3 More preferably 1 × 10 18 atoms / cm 3 below, More preferably 5 × 10 17 atoms / cm 3 The following applies:

[0197] Furthermore, the hydrogen contained in oxide semiconductors reacts with the oxygen bonded to the metal atoms to form water. Therefore, an oxygen deficiency may form. When hydrogen enters this oxygen deficiency, the carrier electrons In some cases, a child may be produced. Also, some of the hydrogen combines with the metal atom and oxygen, resulting in a crystal. It can generate electrons that act as carriers. Therefore, an oxide semiconductor containing hydrogen is used. Transistors with this characteristic tend to exhibit normally-on properties. Therefore, hydrogen in oxide semiconductors It is preferable that the SI is reduced as much as possible. Specifically, in oxide semiconductors, The hydrogen concentration obtained by MS is 1 × 10 20 atoms / cm 3 Less than 1x 10 19 atoms / cm 3 Less than 5x10 18 atoms / cm 3 less than More preferably 1 × 10 18 atoms / cm 3 Less than.

[0198] Using an oxide semiconductor with sufficiently reduced impurities in the channel formation region of a transistor. This allows for the provision of stable electrical characteristics.

[0199] [Effects of vacuum baking] This section explains the weak Zn-O bond contained in metal oxides and the components of this bond. An example of a method for reducing the amount of oxygen and zinc atoms is shown.

[0200] In transistors using metal oxides, defects that lead to poor electrical characteristics of the transistor One example of a defect is oxygen deficiency. For example, using a metal oxide that contains oxygen deficiencies in its film. The transistor has a threshold voltage that tends to fluctuate in the negative direction, resulting in normally-on characteristics. It is easy. This is because donors are generated due to oxygen deficiencies in the metal oxide, and carrier This is because the concentration increases. When a transistor has normally-on characteristics, Various problems can arise, such as increased susceptibility to malfunctions or higher power consumption when not in use. This occurs.

[0201] Furthermore, the thermal history (thermal) in the process of forming the connecting wiring for manufacturing the module. The budget affects the electrical characteristics of the transistor, such as fluctuations in threshold voltage and increased parasitic resistance. There are problems such as deterioration of the electrical properties, and increased variation in electrical properties due to the deterioration of the electrical properties. This problem directly leads to a decrease in manufacturing yield, so it is important to consider countermeasures. Also, over the long term... It is possible to quickly evaluate the changes in transistor characteristics (aging) that occur due to use. Stress tests also cause deterioration of electrical properties. This deterioration of electrical properties occurs during the manufacturing process. High-temperature treatment or electrical stress applied during stress testing can cause damage to metal oxides. It is presumed that this is caused by a lack of oxygen.

[0202] Metal oxides contain oxygen atoms that are weakly bonded to metal atoms and prone to oxygen deficiency. In particular, when the metal oxide is an In-Ga-Zn oxide, the zinc atom and the oxygen atom It readily forms weak bonds (also called weak Zn-O bonds). Here, weak Zn-O bonds and This refers to high-temperature processing performed during the manufacturing process, or electrical stress applied during stress testing. This is a bond that forms between zinc atoms and oxygen atoms, with a strength that allows it to be broken by a sulphuration. When a weak Zn-O bond is present in a metal oxide, thermal or electric stress causes it to break down. The bond is broken, and an oxygen deficiency is formed. As a result of the formation of the oxygen deficiency, heat and stress Transistor stability, such as resistance to stress, decreases.

[0203] The bond that forms between the oxygen atom that is heavily bonded to the zinc atom and the zinc atom is weak. It may be an O bond. Compared to gallium atoms, zinc atoms have weaker bonds with oxygen atoms. Therefore, oxygen atoms that are heavily bonded to zinc atoms are prone to being lost. The bond formed between the atom and the oxygen atom is presumed to be weaker than the bond with other metals.

[0204] Furthermore, it is presumed that when impurities are present in the metal oxide, weak Zn-O bonds are more likely to form. It is measured. Impurities in metal oxides include, for example, water molecules and hydrogen. The presence of water molecules and hydrogen allows hydrogen atoms to bond with oxygen atoms that make up the metal oxide. In some cases, this occurs (also called an OH bond). The oxygen atoms that make up metal oxides are In-Ga- When Zn oxide is a single crystal, it is bonded to the four metal atoms that make up the metal oxide. However, the oxygen atom bonded to the hydrogen atom is bonded to two or three metal atoms. In some cases, the number of metal atoms bonded to an oxygen atom decreases, resulting in a defect in that oxygen atom. It becomes easier. Furthermore, if a zinc atom is bonded to the oxygen atom forming the OH bond, The bond between the oxygen atom and the zinc atom is presumed to be weak.

[0205] Furthermore, weak Zn-O bonds are formed in the strain present in the region where multiple nanocrystals are connected. In some cases, nanocrystals are based on a hexagonal structure, but in this strain, pentagonal and heptagonal structures may also be present. It has a lattice arrangement such as shape. In this strain, the bond distance between atoms is not uniform, resulting in weak Zn It is presumed that an O bond has been formed.

[0206] Furthermore, it is hypothesized that weak Zn-O bonds are more likely to form when the crystallinity of the metal oxide is low. When the crystallinity of a metal oxide is high, the zinc atoms that make up the metal oxide are four oxygen atoms. Or it is bonded to five atoms. However, when the crystallinity of the metal oxide decreases, it bonds with zinc atoms. The number of oxygen atoms tends to decrease. When the number of oxygen atoms bonded to a zinc atom decreases, The zinc atom becomes prone to deficiency. That is, the bond formed between the zinc atom and the oxygen atom It is presumed that the bonds are weaker than those formed in single crystals.

[0207] The reduction in the oxygen and zinc atoms constituting the weak Zn-O bond mentioned above leads to a decrease in thermal history. Alternatively, it can suppress the formation of oxygen deficiencies due to current stress, thereby improving transistor stability. This can be achieved. Furthermore, only the oxygen atoms constituting the weak Zn-O bond are reduced, resulting in a weak Zn-O If the zinc atoms constituting the bond do not decrease, supplying oxygen atoms near those zinc atoms results in a weak In some cases, the Zn-O bond may be reformed. Therefore, the sub-bonds that constitute the weak Zn-O bond It is preferable to reduce the amount of lead and oxygen atoms.

[0208] One method to reduce the number of oxygen and zinc atoms that make up the weak Zn-O bond is, One method involves forming a metal oxide film and then performing vacuum baking. Vacuum baking is a process that involves vacuum baking. This refers to a heat treatment performed in an air atmosphere. The vacuum atmosphere is created by exhausting the air using a turbomolecular pump or similar device. This is maintained. The pressure in the processing chamber is 1 × 10⁻⁶ -2 Pa or less, preferably 1 × 1 0 -3 It should be kept below Pa. Furthermore, the substrate temperature during heat treatment should preferably be 300°C or higher. The temperature should be 400℃ or higher.

[0209] Vacuum baking is performed to remove the oxygen and zinc atoms that make up the weak Zn-O bond. It can be reduced. Also, because heat is applied to the metal oxide by vacuum baking, After the reduction of oxygen and zinc atoms constituting the weak Zn-O bond, the metal oxide is formed. As the atoms rearrange, the number of oxygen atoms bonded to the four metal atoms increases. As a result, the oxygen and zinc atoms constituting the weak Zn-O bond are reduced, and the weak Zn This can suppress the reformation of the -O bond.

[0210] Furthermore, if impurities are present in the metal oxide, vacuum baking can be performed to remove the metal oxide. It can release water molecules or hydrogen from a substance and reduce OH bonds. O in metal oxides As the number of H bonds decreases, the proportion of oxygen atoms bonded to the four metal atoms increases. When water molecules or hydrogen are released, the atoms constituting the metal oxide rearrange themselves, resulting in 4 The number of oxygen atoms bonded to one metal atom increases. Therefore, the weak Zn-O bond is reformed. It can be prevented from happening.

[0211] As described above, by performing vacuum baking after depositing a metal oxide film, a weak Zn-O The oxygen and zinc atoms constituting the bond can be reduced. Therefore, in this process This can further improve the stability of the transistor. This increases the degree of freedom in selecting materials and formation methods.

[0212] <Method for fabricating semiconductor devices> Next, regarding the semiconductor device having a transistor 200 according to one aspect of the present invention, as shown in Figure 1... The manufacturing method will be explained using Figures 5 to 14. Figure (A) shows a top view. Also, (B) in each figure shows the dashed line A1-A2 shown in (A). This is a cross-sectional view corresponding to the part indicated, and is also a cross-sectional view of transistor 200 in the channel length direction. Yes. Also, (C) in each figure is a cross-section corresponding to the area shown by the dashed line A3-A4 in (A). This is a diagram, and it is also a cross-sectional view of transistor 200 in the channel width direction. Also, (D) in each diagram This is a cross-sectional view corresponding to the area shown by the dashed line A5-A6 in (A). Note that each figure ( In the top view (A), some elements have been omitted for clarity.

[0213] First, a substrate (not shown) is prepared, and an insulator 214 is deposited on the substrate. The 214 film was deposited using sputtering and chemical vapor deposition (CVD). or Deposition) method, Molecular beam epitaxy (MBE) Beam Epitaxy (PLD) method, Pulsed Laser Deposition (PLD) Deposition method, or ALD (Atomic Layer Deposition) This can be done using methods such as the tion method.

[0214] Furthermore, the CVD method is a type of plasma CVD (PECVD) that utilizes plasma. Enhanced CVD (Enhanced CVD), Thermal CVD (TCVD: Thermal CCVD) which utilizes heat. It can be classified into methods such as the VD method and the photoCVD method which utilizes light. Depending on the source gas used, the process can be metal CVD (MCVD) or organometallic CVD. It can be divided into (MOCVD: Metal Organic CVD) methods.

[0215] Plasma CVD can produce high-quality films at relatively low temperatures. Thermal CVD, on the other hand, is a method that can produce high-quality films at low temperatures. A film deposition method that does not use Zuma, thus minimizing plasma damage to the workpiece. For example, wiring, electrodes, and elements (transistors, capacitive elements, etc.) included in semiconductor devices. ) and others can be charged up by receiving an electric charge from the plasma. In cases where the accumulated charge destroys the wiring, electrodes, and elements contained in the semiconductor device. On the other hand, in the case of thermal CVD methods that do not use plasma, such plasma damage occurs. Therefore, the yield of semiconductor devices can be increased. Also, in the thermal CVD method, Because plasma damage does not occur within the film, a film with fewer defects can be obtained.

[0216] Furthermore, the ALD method utilizes the self-regulating properties of atoms to deposit atoms layer by layer. This allows for the deposition of extremely thin films, enabling film deposition on structures with high aspect ratios, and pinholes. It enables film formation with fewer defects such as blemishes, allows for film formation with excellent coverage, and enables film formation at low temperatures. It has effects such as [effects]. In addition, the ALD method includes the plasma-based film deposition method PEALD ( This also includes the Plasma Enhanced Algal Drying (ALD) method. By utilizing plasma, This allows for film deposition at lower temperatures, which can be preferable in some cases. Some contain impurities such as carbon. Therefore, the film created by the ALD method is different from others. Compared to films formed by the aforementioned film formation method, this method may contain more impurities such as carbon. The quantitative determination of impurities is performed using X-ray photoelectron spectroscopy (XPS). This can be done using Spectroscopy.

[0217] CVD and ALD are film deposition methods in which particles emitted from a target or other source are deposited. Unlike other methods, this is a film-forming method in which a film is formed by a reaction on the surface of the object being treated. This film-forming method is less affected by the shape of the workpiece and has good step-level coverage. Furthermore, the ALD method has excellent step coverage and excellent thickness uniformity, thus aspect ratio This method is suitable for coating the surface of high-aperture openings, etc. However, the ALD method is relatively suitable for film formation. Because of its slow rate, it should be used in combination with other film deposition methods that have a faster deposition rate, such as CVD. In some cases, this may be preferable.

[0218] The CVD and ALD methods control the composition of the resulting film by adjusting the flow rate ratio of the source gases. This is possible. For example, in the CVD method and ALD method, the flow rate ratio of the raw material gas can be adjusted as needed. A film with the following composition can be formed. Furthermore, for example, in the CVD method and ALD method, film formation can be performed. By changing the flow rate ratio of the raw material gas while simultaneously depositing a film with a continuously changing composition. This is possible. When forming a film while changing the flow rate ratio of the raw material gas, multiple deposition chambers can be used. Compared to the method of film deposition using a conveyor belt, it eliminates the time required for transport and pressure adjustment, thus reducing the time required for film deposition. The interval can be shortened. Therefore, the productivity of semiconductor devices can be increased. There is.

[0219] In this embodiment, aluminum oxide is used as the insulator 214 by sputtering. A film is formed. The insulator 214 may also have a multilayer structure. For example, by sputtering. Aluminum oxide is formed by this method, and then oxidation is performed on the aluminum oxide by the ALD method. A structure in which aluminum is deposited may also be used. Alternatively, aluminum oxide may be deposited by the ALD method. A film is formed, and aluminum oxide is formed on the aluminum oxide by sputtering. It may also be a membrane structure.

[0220] Next, an insulator 216 is deposited on the insulator 214. The insulator 216 is deposited by sputtering. This can be done using methods such as the galvanic filtration method, CVD method, MBE method, PLD method, or ALD method. In this embodiment, silicon oxide is deposited as the insulator 216 by CVD.

[0221] Next, using lithography, an opening is formed in the insulator 216 that reaches the insulator 214. Openings include, for example, grooves and slits. Also, the area in which an opening is formed Sometimes, this is referred to as an opening. Wet etching may be used to form the opening. Furthermore, using the dry etching method is preferable for microfabrication. Also, the insulator 214 is an insulator. Insulator that functions as an etching stopper when etching the edge 216 to form an opening. It is preferable to select a material. For example, silicon oxide is used for the insulator 216 that forms the opening. If so, insulator 214 acts as an insulator that functions as an etching stopper, and nitride Licon, aluminum oxide, and hafnium oxide are good choices to use.

[0222] In lithography, the resist is first exposed through a mask. Next, exposure... The selected area is removed or left intact using a developer to form a resist mask. Next, By etching through the resist mask, conductors, semiconductors, or insulators, etc. It can be processed into the desired shape. For example, KrF excimer laser light, ArF excimer Using malea light, EUV (Extreme Ultraviolet) light, etc., A resist mask can be formed by exposing the resist. Also, between the substrate and the projection lens Alternatively, an immersion technique may be used, in which a liquid (e.g., water) is filled into the container and exposed to light. Alternatively, electron beams or ion beams may be used. If used, a mask is not required. Note that to remove the resist mask, an ashing process is necessary. Which dry etching process, which wet etching process, dry etching process After processing, wet etching is performed, or dry etching is performed after wet etching. It can perform a processing step.

[0223] Alternatively, a hard mask made of an insulator or conductor may be used instead of a resist mask. When using a hard mask, the insulating film that will become the insulator 216 will be made of an insulating film that will become the hard mask material. A border film or conductive film is formed, a resist mask is formed on top of it, and the hard mask material is etched. By doing this, a hard mask of the desired shape can be formed. The etching of the border film can be done after removing the resist mask, or the resist mask can be removed. You can leave it as is. In the latter case, the resist mask may disappear during etching. Yes. After etching the insulating film that will become insulator 216, the hard mask is removed by etching. It is permissible to do so. On the other hand, if the hard mask material does not affect subsequent processes, or can be used in subsequent processes In such cases, it is not always necessary to remove the hard mask.

[0224] As a dry etching apparatus, a capacitively coupled plasma (CCP) system with parallel plate electrodes is used. (Capacitively Coupled Plasma) Etching apparatus is used. Capacitively coupled plasma etching apparatus having parallel plate electrodes can be used. Alternatively, a high-frequency power supply may be applied to one electrode of the type electrode. Or, one of the parallel plate type electrodes. Alternatively, a configuration in which multiple different high-frequency power supplies are applied to the electrodes may be used. Or a parallel plate type electrode Alternatively, a configuration in which a high-frequency power supply of the same frequency is applied to each of them may be used. Alternatively, a configuration in which high-frequency power supplies of different frequencies are applied may be used. Or, a high-density plasma source may be used. A dry etching apparatus can be used. Dry etching with a high-density plasma source. The device is, for example, an inductively coupled plasma (ICP) device. Etching equipment such as an ed Plasma etching device can be used.

[0225] After the opening is formed, a conductive film is formed to become the first conductor of the conductor 205. It is preferable to use a conductive barrier film that has the function of suppressing the permeation of impurities and oxygen. For example, tantalum nitride, tungsten nitride, titanium nitride, etc. can be used. Tantalum, tungsten, titanium, molybdenum, aluminum, copper, molybdenum tungsten It can be a laminated film with a stainless steel alloy. The conductive film that becomes the first conductor of the conductor 205 Thin film deposition is performed using methods such as sputtering, CVD, MBE, PLD, or ALD. It can be done by doing so.

[0226] In this embodiment, as the conductive film that becomes the first conductor of the conductor 205, tantalum nitride, Alternatively, a film is formed by laminating titanium nitride on tantalum nitride. The first of the conductor 205 By using such metal nitrides as conductors, the second conductor of conductor 205 Even when using easily diffusive metals such as copper, the metal does not spread out from the first conductor of the conductor 205. This can suppress the scattering of particles.

[0227] Next, on the conductive film which will be the first conductive layer of the conductor 205, the second conductive layer of the conductor 205 and A conductive film is formed. The formation of the conductive film is carried out by sputtering, CVD, MBE, This can be carried out using the PLD method or the ALD method, etc. In this embodiment, conductor 2 As the second conductive layer of 05, low-resistance materials such as tungsten, copper, and aluminum are used as conductive films. A conductive material is deposited into the film.

[0228] Next, the CMP (Chemical Mechanical Polishing) process. By doing this, a conductive film that becomes the first conductor of the conductor 205, and a second conductor of the conductor 205 A portion of the conductive film that forms the conductor is removed by polishing, exposing the insulator 216. As a result, Only at the opening, a conductive film which becomes the first conductor of the conductor 205, and a second conductive film which becomes the second conductor of the conductor 205 A conductive film that acts as an electric body remains. As a result, the first conductor of the conductor 205 has a flat upper surface. , and a conductor 205 including a second conductor of the conductor 205 can be formed (Figure 5) (See reference.) Note that a portion of the insulator 216 may be removed as a result of this CMP treatment.

[0229] The method for producing the insulator 216 and the conductor 205 is not limited to the above. For example, a conductive film that will become a conductor 205 is deposited on an insulator 214, and a lithography method is used Then, the conductive film is processed to form the conductive body 205. Next, so that the conductive body 205 is covered An insulating film that will become an insulator 216 is provided, and a part of the insulating film is treated with CMP to become a conductor 205 The conductive 205 and the insulator 216 may be formed by removing the material until a portion of it is exposed. stomach.

[0230] As described above, by using CMP treatment to form the conductor 205 and the insulator 216, This improves the flatness of the upper surfaces of the conductor 205 and the insulator 216, and prevents oxidation in subsequent processes. The crystallinity of CAAC-OS constituting material 230a, oxide 230b, and oxide 230c It can be improved.

[0231] Next, an insulator 222 is formed on the insulator 216 and the conductor 205. As such, an insulating film containing an oxide of aluminum and / or hafnium is formed. It is desirable to do so. Furthermore, an insulator containing an oxide of either aluminum or hafnium or both. Examples include aluminum oxide, hafnium oxide, and aluminum and hafnium oxides. It is preferable to use materials such as aluminum and hafnium aluminate. Insulators containing oxides of one or both of the elements provide a barrier against oxygen, hydrogen, and water. It has. The insulator 222 has barrier properties against hydrogen and water, so the transient Hydrogen and water contained in the structure surrounding Ta 200 are transmitted through the insulator 222. Diffusion into the transistor 200 is suppressed, and the formation of oxygen vacancies in the oxide 230 is inhibited. It can be suppressed.

[0232] The insulator 222 is deposited by sputtering, CVD, MBE, PLD, or A This can be done using methods such as the LD method.

[0233] Next, an insulator 224 is deposited on the insulator 222. The insulator 224 is deposited by sputtering. This can be done using methods such as the kerning method, CVD method, MBE method, PLD method, or ALD method. .

[0234] Next, it is preferable to perform a heat treatment. The heat treatment is preferably performed at a temperature of 250°C to 650°C. It is preferable to carry it out at a temperature of 300°C to 500°C, and more preferably at 320°C to 450°C. The heat treatment should be performed in a nitrogen or inert gas atmosphere, or with an oxidizing gas at a concentration of 10 ppm or less. Furthermore, the process should be carried out in an atmosphere containing 1% or more, or 10% or more, of the above. Also, the heat treatment should be performed under reduced pressure. Alternatively, the heat treatment may be performed in a nitrogen or inert gas atmosphere, followed by desorption. An atmosphere containing oxidizing gas at a concentration of 10 ppm or more, 1% or more, or 10% or more to replenish the oxygen. Heat treatment may be performed in an open atmosphere.

[0235] In this embodiment, as a heat treatment, after the insulator 224 is formed, it is heated in a nitrogen atmosphere at 400°C. The process is carried out at this temperature for 1 hour. This heat treatment removes the water and hydrogen contained in the insulator 224. It can remove impurities such as those mentioned above. In addition, heat treatment is performed after film formation of the insulator 222, etc. It can also be done via mingling.

[0236] Here, in order to form an excess oxygen region in the insulator 224, a plasma containing oxygen is used under reduced pressure. Plasma treatment may be performed. Oxygen-containing plasma treatment can be performed, for example, using high-density microwaves. It is preferable to use a device that has a power supply for generating rasma. Alternatively, RF( It may have a power supply that applies radio frequency. By doing so, high-density oxygen radicals can be generated, and RF can be applied to the substrate side. This efficiently guides the oxygen radicals generated by the high-density plasma into the insulator 224. This is possible. Alternatively, after performing plasma treatment with an inert gas using this device, Plasma treatment containing oxygen may be performed to replenish the desorbed oxygen. By appropriately selecting the processing conditions, impurities such as water and hydrogen contained in the insulator 224 can be removed. It can be removed. In that case, heat treatment is not necessary.

[0237] Next, oxide films 230A and 230B are sequentially deposited on the insulator 224 (Figure See 5. It is preferable to continuously form the oxide film without exposing it to the atmospheric environment. By forming the film without opening it to the atmosphere, the oxide film 230A and oxide film 230B are protected from the atmospheric environment. This prevents impurities or moisture from adhering to the oxide film 230A and oxide film 23 The area near the interface with 0B can be kept clean.

[0238] The oxide films 230A and 230B were deposited by sputtering, CVD, and MBE. This can be done using methods such as the PLD method or the ALD method.

[0239] For example, oxide film 230A and oxide film 230B are deposited by sputtering. In this case, oxygen or a mixture of oxygen and a noble gas is used as the sputtering gas. By increasing the proportion of oxygen in the puttering gas, excess oxygen in the formed oxide film... This can increase the amount. Also, when the above oxide film is deposited by sputtering: The above-mentioned In-M-Zn oxide target can be used. A direct current (DC) power supply or an alternating current (AC) power supply such as a radio frequency (RF) power supply is connected to it. The required power can be applied according to the electrical conductivity of the target.

[0240] In particular, during the deposition of oxide film 230A, some of the oxygen contained in the sputtering gas acts as an insulator. It may be supplied to 224. Therefore, it is included in the sputtering gas of oxide film 230A. The proportion of oxygen present should be 70% or more, preferably 80% or more, and more preferably 100%. Yes.

[0241] Furthermore, when forming oxide film 230B by sputtering, the sputtering gas contains When the oxygen content is set to 1% or more and 30% or less, preferably 5% or more and 20% or less, the film is formed. Oxygen-deficient oxide semiconductors are formed. The transistor used in this region provides relatively high field-effect mobility. Also, when the substrate is heated... By performing film formation while simultaneously depositing the oxide film, the crystallinity of the oxide film can be improved. However, one aspect of the present invention is not limited thereto. Sputtering an oxide film that becomes oxide 230b When forming by law, the proportion of oxygen in the sputtering gas should exceed 30% and reach 100%. When a film is formed with an oxygen-rich oxide semiconductor, preferably with an oxygen content of 70% or more and 100% or less, A body is formed. Transistors that use oxygen-rich oxide semiconductors in the channel formation region are This provides relatively high reliability.

[0242] In this embodiment, as the oxide film 230A, by sputtering method, In:Ga: Zn = 1:1:0.5 [atomic ratio] (2:2:1 [atomic ratio]), or 1:3:4 atomic ratio], a target is used for film formation. Also, as the oxide film 230B, by sputtering method, a target of In:Ga:Zn = 4:2:4.1 [atomic ratio] is used for film formation. Note that each oxide film may be formed in accordance with the characteristics required for oxide 2 30 by appropriately selecting the film formation conditions and the atomic ratio.

[0243] Here, it is preferable to form the insulator 222, the insulator 224, the oxide film 230A, and the oxide film 230B without exposing them to the atmosphere. For example, a multi-chamber type film formation device may be used.

[0244] Next, heat treatment may be performed. The heat treatment can be performed using the above-described heat treatment conditions. By the heat treatment, impurities such as water and hydrogen in the oxide film 230A and the oxide film 230B can be removed. In this embodiment, after performing a treatment at a temperature of 400°C for 1 hour in a nitrogen atmosphere, a treatment at a temperature of 400°C for 1 hour is continuously performed in an oxygen atmosphere

[0245] Next, the oxide film 230A and the oxide film 230B are processed into an island shape to form the oxide 230a and the oxide 230b (see FIG. 6). Note that in this step, the film thickness of the region of the insulator 224 that does not overlap with the oxide 230a may become thin. Also, in this step, the insulator 224 may be processed into an island shape that overlaps with the oxide 230a, and a part of the insulator 222 may be exposed.

[0246] ​​​​​​​Here, oxide 230a and oxide 230b are at least partially connected to the conductor 205. They are formed to overlap. Also, the sides of oxide 230a and oxide 230b and insulator 2 The angle formed by the upper surface of 22 may be made smaller. In that case, oxide 230a and The angle between the side surface of oxide 230b and the top surface of insulator 222 is preferably 60° or more and less than 70°. By adopting this shape, the coating properties of the insulator 256 and other materials in subsequent processes will be improved. It can be improved and defects such as porosity can be reduced. Alternatively, the sides of oxide 230b are insulating. The oxide 230a and oxide 230b may be positioned approximately perpendicular to the upper surface of body 222. The side of the transistor 20 is approximately perpendicular to the upper surface of the insulator 222, which allows multiple transistors 20 to be connected. When creating a zero-point structure, it becomes possible to reduce the area and increase the density.

[0247] Furthermore, there is a curved surface between the side surface of oxide 230b and the top surface of oxide 230b. Furthermore, the edges of the sides and the edges of the top surface are preferably curved (hereinafter also referred to as rounded). (u) The curved surface, for example, at the edge of the oxide 230b layer, has a radius of curvature of 3 nm or more. The wavelength should be 0 nm or less, preferably 5 nm to 6 nm. By not having corners at the ends, The film's coverage in subsequent film formation processes is improved.

[0248] Furthermore, the processing of oxide film 230A and oxide film 230B can be performed using lithography. That's fine. Furthermore, this process can be carried out using either a dry etching method or a wet etching method. Yes, it is possible. Dry etching is suitable for microfabrication.

[0249] Furthermore, by performing processes such as dry etching, etching gases and other factors can be used. The impurities adhere to or spread within the surface or interior of oxide 230a and oxide 230b. It may disperse. Impurities include, for example, fluorine or chlorine.

[0250] To remove the above-mentioned impurities, washing is performed. The washing method involves using a washing solution, etc. These include wet cleaning, plasma treatment using plasma, or cleaning by heat treatment. The above cleaning methods may be combined as appropriate.

[0251] For wet cleaning, use oxalic acid, phosphoric acid, or hydrofluoric acid in carbonated water or pure water. The washing treatment may be carried out using an aqueous solution diluted with water. Alternatively, distilled water or carbonated water may be used. Ultrasonic cleaning may also be performed. In this embodiment, ultrasonic cleaning using pure water or carbonated water is performed. To do so.

[0252] Next, heat treatment may be performed. The conditions for heat treatment shall be the same as those described above. This is possible. Alternatively, it is preferable to perform a heat treatment before forming the insulating film 256A. The process should be carried out at a temperature between 100°C and 400°C, for example, at 200°C. It is preferable to carry out this process at the same temperature as the deposition temperature of the insulating film 256A. Here, the deposition temperature is defined as This includes not only the substrate temperature during film formation, but also the set temperature of the film formation apparatus. For example, insulating film 256 When forming a film of A at 200°C, it is preferable to perform the heat treatment at 200°C. The process is preferably carried out under reduced pressure, for example, in a vacuum atmosphere. This is maintained by exhausting using a turbomolecular pump or the like. In a vacuum atmosphere, the pressure of the processing chamber is 1 × 10 -2 Pa or less, preferably 1 × 10⁻⁶ -3 It should be less than or equal to Pa.

[0253] Next, insulating film 256A is formed over oxide 230a and oxide 230b. (See Figure 6.) The insulating film 256A was deposited by sputtering, CVD, MBE, and PL. The film can be deposited using methods such as the D method or the ALD method.

[0254] The insulating film 256A is an insulating film that has the function of suppressing the diffusion of impurities such as hydrogen and oxygen. It is preferable to use this method. For example, an aluminum oxide film can be formed by sputtering. It is preferable to do so. By sputtering, using an oxygen-containing gas, aluminum oxide By forming a um film, oxygen can be injected into the insulator 224. The insulator 224 may have excess oxygen. Also, as the insulating film 256A, Humium, aluminum, and oxides containing hafnium (hafnium aluminate), nitrogen Insulators containing aluminum oxide, titanium aluminum nitride, titanium nitride, silicon oxide, acid Silicon nitride, silicon nitride oxide, silicon nitride, fluorine-added silicon oxide, carbon silicon oxide with added elements, silicon oxide with added carbon and nitrogen, or silicon oxide having voids Silicon oxide and the like can be used.

[0255] Furthermore, as the insulating film 256A, aluminum oxide is deposited while heating the substrate at a high temperature. This may be done. The substrate heating temperature during the deposition of the insulating film 256A is 200°C or higher, preferably 250°C. The temperature should be above ℃, more preferably above 350℃.

[0256] Furthermore, the insulating film 256A may have a multilayer structure.

[0257] Next, a dummy gate film, which will become the dummy gate 262A, is deposited on the insulating film 256A. .

[0258] The dummy gate film, which will become dummy gate 262A, is processed and used as a dummy gate. A dummy gate is a temporary gate electrode. In other words, dummy gate 262A A dummy gate film is processed to form a temporary gate, and in a later process the dummy - The gate is removed and replaced with a gate electrode made of a conductive film or the like. Therefore, the dummy gate The dummy gate film, designated as T262A, is made of a film that is easy to microfabricate and easy to remove. It is preferable to do so.

[0259] The dummy gate film, which will become dummy gate 262A, is deposited using sputtering, CVD, This can be done using methods such as MBE, PLD, or ALD. For example, insulators, semiconductors Conductors or conductive materials can be used. Specifically, polysilicon, microcrystalline silicon. , silicon such as amorphous silicon, aluminum, titanium, gold such as tungsten A genus film or similar can be used. Alternatively, a coating method can be used to create a carbon-containing film, SOG (Spin On Glass, a resin film may be formed. For example, photoresist, polyester Polyethylene, polyolefin, polyamide (nylon, aramid, etc.), polyimide, polycarbonate These include vinyl or acrylic. SOG is formed by coating a resin film. The surface of the dummy gate film can be made flat. In this way, the surface of the dummy gate film can be made flat. Making the surface flat facilitates microfabrication and also makes removal easier.

[0260] The dummy gate, in the addition of the dopant described later, contains oxide 230 in the dopant. It needs to be protected from this. For this reason, the dummy gate film that will become the dummy gate 262A is sufficient It is preferable that it has a certain hardness. For example, carbon A film containing is preferred.

[0261] Furthermore, the dummy gate film, which will become dummy gate 262A, is made into a multilayer film using different film types. It is also possible to use a dummy gate film that will become the dummy gate 262A as a conductive film and the conductive film A two-layer film can be formed in which a resin film is formed on top of the film. A dummy gate film can be made in this way. By adopting such a structure, for example, in the subsequent CMP process, the conductive film will stop the CMP treatment. It may function as a CMP film. Alternatively, it may enable endpoint detection of the CMP process. This may allow for a reduction in processing variations.

[0262] Next, the dummy gate film that will become dummy gate 262A is created using lithography. This is done to form a dummy gate 262A (see Figure 7). The dummy gate 262A is At least a portion of it is formed to overlap with the conductor 205 and the oxide 230.

[0263] Furthermore, heat treatment is performed after the formation of the dummy gate 262A to harden it. This is permissible, especially when the shape of the dummy gate 262A is to have a high aspect ratio. By hardening the dummy gate 262A, deformation of the dummy gate 262A is prevented. It is possible to do so.

[0264] Next, using dummy gate 262A as a mask, dopant 257 is added to oxide 230b. Add (see Figure 7). This superimposes the dummy gate 262A of oxide 230b. In the region where there is no dopant, layers 253a and 253b containing dopant 257 are formed. As shown above, the length of the dummy gate 262A in the channel length direction determines the layer 253a and layer 25 The distance between 3b can be controlled.

[0265] The method for adding dopant 257 involves mass-separating the ionized source gas and then adding it. Ion implantation method, ion doping method in which ionized source gas is added without mass separation. Plasma immersion ion implantation method and other methods can be used. When performing separation, the species of ions added and their concentrations can be precisely controlled. If mass separation is not performed, high concentrations of ions can be added in a short time. Ion doping methods may be used to generate clusters of individual molecules or molecules and then ionize them. The term "dopant" can also be rephrased as an ion, donor, acceptor, impurity, or element. That's fine.

[0266] Dopant 257 is an element that forms the aforementioned oxygen vacancy, or an element that binds to the oxygen vacancy. You can use elements such as boron or phosphorus. Typical examples of such elements are boron or phosphorus. These include hydrogen, carbon, nitrogen, fluorine, sulfur, chlorine, titanium, and noble gases. It is also acceptable. Furthermore, typical examples of noble gases include helium, neon, argon, and krypton. And xenon, etc. Also, aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel Titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese Magnesium, Zirconium, Beryllium, Indium, Ruthenium, Iridium, One or more gold elements selected from among metallic elements such as strontium and lanthanum. Group elements may be added. Among those mentioned above, dopant 257 may include boron and phosphorus. This is preferable. When boron and phosphorus are used as dopant 257, amorphous silicon Alternatively, equipment from a low-temperature polysilicon manufacturing line can be used, thus reducing capital investment. It can be suppressed.

[0267] In particular, it is preferable to use an element that readily forms oxides as dopant 257. Typical examples of such elements include boron, phosphorus, aluminum, and magnesium. ru.

[0268] The raw material gas used when adding dopant 257 is a gas containing the above-mentioned impurity elements. When supplying boron, B2H6 gas or BF3 gas can be used. These can be used. Also, when supplying phosphorus, pH3 gas is typically used. This can be done. Alternatively, a mixed gas obtained by diluting these source gases with a noble gas may be used.

[0269] Other raw material gases include CH4, N2, NH3, AlH3, AlCl3, SiH4, Si2H6, F2, HF, H2, and noble gases can be used. Furthermore, the ion source is gas The ion source is not limited to S; a vaporized liquid or solid may also be used.

[0270] The addition of dopant 257 affects the composition, density, and thickness of insulating film 256A and oxide 230b. By taking these factors into consideration and setting conditions such as acceleration voltage and dose amount, it is possible to control the system. In particular, dopant 257 is not in contact with the dummy gate 262A of insulating film 256A. It is preferable to provide sufficient energy so that the portion can be penetrated.

[0271] The amount of dopant 257 added should be greater than the amount of dopant 258 added, as will be discussed later. This is because it allows for the formation of layer 253, in which elements are injected at a higher concentration than in layer 252. This can be done. Also, the addition of dopant 257 is performed at a higher acceleration voltage than dopant 258. This is also acceptable. This will form layer 253 in which the elements are distributed deeper than in layer 252. It is possible.

[0272] Furthermore, in Figure 7, dopant 257 is added approximately perpendicularly to the upper surface of insulator 214, This is not limited to the above, but the addition of dopant 257 is performed at an angle relative to the upper surface of the insulator 214. This may also be done by adding the dopant at an angle to the upper surface of the insulator 214. Layers 253a and 253b are formed in a portion of the region that overlaps with the dummy gate 262A. This makes it easier.

[0273] Furthermore, in the manufacturing method of this embodiment, the dopant 257 is acid via the insulating film 256A. It is added to compound 230. By using this manufacturing method, dopant 2 is also added to insulating film 256A. 57 is added. That is, both oxide 230 and insulating film 256A are dopant 2 It contains elements included in 57. Also, if the insulating film 256A has excess oxygen, dopan In some cases, the diffusion of excess oxygen to the outside can be suppressed by T257. Also, oxide 23 The oxide 230a, insulator 224 and are located beneath 0b and insulating film 256A. Insulator 222 may also be dopant 257 added. Therefore, oxide 230a, Insulators 224 and 222 may contain elements included in dopant 257. .

[0274] Next, a portion of the dummy gate 262A is removed (hereinafter referred to as the slimming process). In some cases, this may form a dummy gate 262B (see Figure 8). Dummy gate 262B It has a shape similar to a scaled-down dummy gate 262A. Therefore, as shown in Figure 8(B) In the region where the oxide layer 230b 253 is not formed, a dummy gate 262B This can be exposed from the region where the oxide 230b layer 253 is not formed. A portion of it is converted to layer 252 by adding dopant 258 in a later step. In other words, oxidation The region where the dummy gate 262B of object 230b is superimposed functions as a channel-forming region. This results in area 234.

[0275] One example of a slimming process is using oxygen in a radical state (oxygen radical). A slimming process can be applied. However, the slimming process is performed on the dummy gate 262A. If the process can be used to create a finer pattern, then it is necessary to limit it to the ashing process described above. There are no such methods. For example, plasma treatment or heat treatment in an oxygen-containing atmosphere, or ozone treatment. Treatment involving irradiation with ultraviolet light while exposed to an atmosphere, dry etching, or wet etching. Transition processing can be used. Since the channel length of ST200 is determined, the slimming process is one that offers good controllability. It is desirable to apply the process.

[0276] The slimming process reduces the length of the dummy gate 262A in the A1-A2 direction to the exposure apparatus Fine detail to below the resolution limit, for example, to a line width of 1 / 2 or less of the resolution limit, preferably 1 / 3 or less. It is possible to modify this. For example, the channel length of transistor 200 can be changed to 1 The wavelength can be between 60 nm and 60 nm, more preferably between 15 nm and 40 nm. In this way, by shortening the channel length, the on-current of transistor 200 can be increased. This improves the S-value and enhances the frequency response.

[0277] Next, using dummy gate 262B as a mask, dopant 258 is added to oxide 230b. Add (see Figure 9). This superimposes the dummy gate 262B of oxide 230b. In a region where no dopant is present and layer 253 is not formed, layer 252a contains dopant 258. And layer 252b is formed. In this way, the A1-A2 direction of the dummy gate 262B The width determines the distance between layer 252a and layer 252b, i.e., the channel of transistor 200. The length can be controlled.

[0278] The method for adding dopant 258 is the same as the method for adding dopant 257 described above. It is possible. At this time, dopant 258 is the dummy gate 26 of insulating film 256A It is preferable to provide sufficient energy so that it can penetrate the portion that is not in contact with 2B. Furthermore, dopant 258, like dopant 257, forms the aforementioned oxygen deficiency. You can use elements that do this, or elements that bond with oxygen vacancies. However, dopant 25 The amount of 8 added is preferably less than the amount of dopant 257 added.

[0279] Furthermore, in Figure 9, dopant 258 is added approximately perpendicularly to the upper surface of insulator 214, This is not limited to the above, but the addition of dopant 258 is performed at an angle to the upper surface of the insulator 214. This may also be done by adding the dopant at an angle to the upper surface of the insulator 214. Layers 252a and 252b are also formed in a portion of the region that overlaps with the dummy gate 262B. It is sometimes possible.

[0280] Furthermore, in the manufacturing method of this embodiment, the dopant 258 is acid through the insulating film 256A. It is added to compound 230. By using this manufacturing method, dopant 2 is also added to insulating film 256A. 58 is added. That is, both oxide 230b and insulating film 256A are dopants It contains elements included in 258. Also, if the insulating film 256A has excess oxygen, dopamine In some cases, dopant 258 can suppress the diffusion of excess oxygen to the outside. Since dopant 258 is also added to layer 253, layer 253 contains the elements contained in dopant 258. It may have the oxide 230b and insulating film 256A. Dopant 258 is also added to oxide 230a, insulator 224, and insulator 222. In some cases, oxide 230a, insulator 224 and insulator 222 are dopant 2 It may contain elements included in 58.

[0281] As described above, using dummy gates 262A and 262B as masks, the layer By forming layers 252 and 253, the conductive material 260 to be formed in a later step is formed in layer 2 It is arranged in a self-aligned manner between 53a and layer 253b, and on top of layers 252a and 252b They can be superimposed in a self-sustaining manner.

[0282] Furthermore, heat treatment is performed after the addition of dopant 257 or dopant 258. Alternatively, the heat treatment may result in the hydrogen contained in the region 234 that functions as a channel-forming region. In some cases, this can be captured by oxygen vacancies contained in layer 253. This allows transistor 2 This provides stable electrical properties to 00, thereby improving reliability. Furthermore, this heat treatment is... This can be done in a later step.

[0283] Next, the insulating film 266A is deposited over the insulating film 256A and the dummy gate 262B. (See Figure 10.) The insulating film 266A is deposited by sputtering, CVD, and MBE. The film can be deposited using methods such as the PLD method or the ALD method.

[0284] The insulating film 266A is an insulating film that has the function of suppressing the diffusion of impurities such as hydrogen and oxygen. It is preferable to use this method. For example, an aluminum oxide film can be formed by sputtering. It is preferable to do so. By sputtering, using an oxygen-containing gas, aluminum oxide By forming a um film, oxygen can be injected into the insulator 224. The insulator 224 may have excess oxygen.

[0285] Furthermore, as the insulating film 266A, aluminum oxide is deposited while heating the substrate at a high temperature. This may be done. The substrate heating temperature during the deposition of the insulating film 266A is 200°C or higher, preferably 250°C. The temperature should be above ℃, more preferably above 350℃. At this time, the insulating film 266A is formed. Before that, by depositing an aluminum oxide film using the ALD method, the above temperature can be used to create an insulating film. When the edge film 266A is formed, deformation of the dummy gate 262B can be prevented. ru.

[0286] In a later process, the dummy gate 262B and the insulating film 266A are connected to the dummy gate 262B. The contact portion is removed to form the opening 263. In other words, the thickness of the insulating film 266A This allows us to control the size of the opening 263. Here, layers 252 and 253 are , is formed in a self-aligned manner with respect to the arrangement of the dummy gate 262B. The opening 263 is da The size can be controlled around the position of the Meegate 262B. Therefore, the opening By increasing the size of 263, the conductor 260 can be superimposed on the layer 252. By increasing the size of the opening 263, the conductor 260 can also be superimposed on the layer 253. As shown, between the channel-forming region of oxide 230 and the source or drain region, This prevents the formation of an offset region and ensures that the effective channel length is greater than the width of the conductor 260. This can suppress the increase in the on-current of transistor 200. This improves the S value and enhances the frequency response. In other words, the size of the overlap region of transistor 200 is the size of the overlap region of transistor 200. It can be set appropriately according to the required electrical characteristics.

[0287] Next, insulating film 2 80A is deposited (see Figure 10). The insulating film 280A is deposited by sputtering, CV This can be performed using methods such as the D method, MBE method, PLD method, or ALD method.

[0288] Next, the insulating film 280A, insulating film 266A, and a portion of the dummy gate 262B are dummy Remove until a portion of gate 262B is exposed, then remove insulator 280, insulator 266B, and A dummy gate 262 is formed (see Figure 11). Insulator 280, insulator 266B, and It is preferable to use CMP treatment for the formation of the dummy gate 262.

[0289] Furthermore, as described above, the dummy gate 262B is made of, for example, a conductive film and a resin film on the conductive film. By forming a two-layer film, the conductive film undergoes the CMP process. It may function as a pacing film. Alternatively, the conductive film may enable endpoint detection of the CMP process. This may be possible, and it may be possible to reduce variations in the height of the dummy gate 262. (Figure) As shown in 11(B), the top surface of the dummy gate 262 and the insulator 266B and insulator 2 The top surface of 80 roughly matches.

[0290] Next, the dummy gate 262 and the insulating film 256A and the insulator 280 of the insulating film 266A Then, the exposed portion is removed to form an opening 263 (see Figure 12). Dummy gate 262 The removal of insulating film 256A and insulating film 266A is done by using insulator 280 as a mask. This can be done using methods such as etching, dry etching, or ashing. Alternatively, the above processes may be combined as appropriate. For example, the ashing process Later, wet etching may be performed to remove a portion of the insulating film 266A. By doing so, an insulator 266 is formed, and by removing a part of the insulating film 256A, an insulator 2 56 is formed. Dummy gate 262, part of insulating film 256A and part of insulating film 266A By removing the portion, a part of the surface of the oxide 230b (layer 252 and (Including layer 253.) is exposed.

[0291] Furthermore, the dummy gate 262 and the insulating film 256A and the insulator 280 of the insulating film 266A The removal of the exposed portion does not necessarily have to be done all at once. For example, the insulating film 256A As a tipping stopper, the dummy gate 262 and the insulating film 266A are exposed to the insulator 280. Remove the exposed portion, and then remove the portion of the insulating film 256A that is exposed from the insulator 280. That's fine.

[0292] Next, heat treatment may be performed. The heat treatment can be carried out using the heat treatment conditions described above. The heat treatment allows oxide 230a and oxide 230b to pass through the opening 263. It can remove impurities such as water and hydrogen from inside. For example, in a nitrogen atmosphere at 600°C The heat treatment should be performed at a temperature of °C.

[0293] Furthermore, before the deposition of the 230C oxide film, ion implantation, ion doping, and plasma treatment were performed. One of the following methods, selected from the plasma immersion ion implantation method, Oxygen may be added to oxide 230b and insulator 280 using multiple methods. At that time, by using an ion implantation method in which ionized raw material gas is mass-separated and added, acid This is preferable because oxygen can be added to the compound 230b and the insulator 280 with good control.

[0294] Next, it is preferable to perform a heat treatment before forming the oxide film 230C. The heat treatment is 100 The process can be carried out at temperatures between ℃ and 400℃, for example, at 200℃. Alternatively, oxide film 23 It is preferable to carry out the process at the same temperature as the film deposition temperature at 0°C. Here, the film deposition temperature is the temperature at which the film is deposited on the substrate during film deposition. This includes not only temperature but also the set temperature of the film deposition apparatus. For example, when depositing an oxide film of 230C at 300°C... When forming a film, the heat treatment is preferably performed at 300°C. The heat treatment is performed under reduced pressure. It is preferable to carry out the process in a vacuum atmosphere, for example. A vacuum atmosphere is preferable for turbo molecules It is maintained by exhausting with a pump or similar device. In a vacuum atmosphere, the pressure in the processing chamber is 1 × 10⁻⁶ - 2 Pa or less, preferably 1 × 10⁻⁶ -3 It should be less than or equal to Pa.

[0295] Next, an oxide film 230C is deposited so as to be embedded in the opening 263 (see Figure 13). Furthermore, after the above heat treatment, the oxide film 230C is continuously deposited without exposure to the atmosphere. It is preferable to use a multi-chamber type film deposition apparatus, as described later. It is preferable to perform the heat treatment and film deposition process in separate chambers, in succession. By doing so, the water adsorbed on the surfaces of oxide 230a and oxide 230b can be removed. Impurities such as ions, hydrogen, and carbon are removed, and further, oxides 230a and 230b are removed. The moisture and hydrogen concentrations can be reduced. Impurities are removed by this heat treatment. The substance also contains impurities that have hydrogen-carbon bonds, as well as impurities that have hydrogen-oxygen bonds. Furthermore, by performing continuous heat treatment and film formation without exposure to the outside air, impurities such as hydrogen are removed. This prevents re-entry into oxide 230.

[0296] The deposition of oxide film 230C is performed by sputtering, CVD, MBE, PLD, or A This can be done using methods such as LD. The oxide film can be prepared according to the desired properties of the 230C oxide film. Using the same film formation method as for 230A or oxide film 230B, the oxide film 230C is formed. A film should be formed. As the oxide film 230C, In-Ga-Zn oxide or In-free... In oxides can be used. As oxides that do not contain In, Ga-Zn oxide and acid Gallium oxide can be used. In addition, In-Ga-Zn can be used as the oxide film 230C. A layered structure of oxide and an in-free oxide may be used. As the oxide film 230C, spa By the tarring method, In:Ga:Zn = 1:3:4 [atomic ratio], 4:2:4.1 [ Atomic ratio], Ga:Zn=2:1 [Atomic ratio], or Ga:Zn=2:5 [Atomic ratio] The film is formed using the target of ]. In this embodiment, the oxide film 230C is sputtered. The ring method is used to obtain oxide 230c using a target with an atomic ratio of 1:3:4. An oxide film is formed.

[0297] Furthermore, the oxide film 230C is composed of a first oxide film and a second oxide film on the first oxide film. It may have a layered structure, and the target may be the same as the target used to form the oxide film 230B. Using a target, the first oxide film was formed, and a target similar to the one used to form oxide film 230A was used. A second oxide film may be formed using -get.

[0298] The deposition of the oxide film 230C is preferably carried out while heating the substrate. At this time, the substrate temperature By raising the temperature to 300°C or higher, oxide 230a, oxide 230b, and oxide film 230 This can reduce oxygen deficiencies in C. Furthermore, for example, the deposition of the insulating film 250A described later. The film may be deposited at the same temperature as the substrate. Furthermore, it is also possible to improve the crystallinity of oxide 230a, oxide 230b, and oxide film 230C. can.

[0299] In particular, during the deposition of the 230C oxide film, some of the oxygen contained in the sputtering gas becomes oxide It may be supplied to 230a and oxide 230b. Therefore, the oxide film 230C The proportion of oxygen in the sputtering gas should be 70% or more, preferably 80% or more, more preferably It should be set to 100%. Also, by performing film deposition while heating the substrate, The crystallinity of the oxide film can be improved.

[0300] Next, it is preferable to perform a heat treatment before forming the insulating film 250A. The heat treatment is performed at 100 The process can be carried out at temperatures between 20°C and 400°C, for example, at 200°C. Alternatively, insulating film 25 It is preferable to perform the process at the same temperature as the film deposition temperature for 0A. Here, the film deposition temperature refers to the temperature at which the film is deposited on the substrate during film deposition. This includes not only temperature but also the set temperature of the film deposition apparatus. For example, insulating film 250A at 350°C When forming a film, the heat treatment is preferably performed at 350°C. The heat treatment is performed under reduced pressure. It is preferable to carry out the process in a vacuum atmosphere, for example. A vacuum atmosphere is preferable for turbo molecules It is maintained by exhausting with a pump or similar device. In a vacuum atmosphere, the pressure in the processing chamber is 1 × 10⁻⁶ - 2 Pa or less, preferably 1 × 10⁻⁶ -3 It should be less than or equal to Pa.

[0301] Next, insulating film 250A is deposited. Insulating film 250A is deposited by sputtering, CVD, The film can be deposited using methods such as MBE, PLD, or ALD. Insulating film 250 A uses the ALD method to produce silicon oxide, hafnium oxide, or gallium oxide. It is preferable to form a film such as the following. For example, as the insulating film 250A, silicon oxide and silicon oxide A gallium oxide multilayer film on a ricon can be used. Note that when forming the insulating film 250A... The film deposition temperature is 300°C or higher and less than 450°C, preferably 300°C or higher and less than 400°C, particularly 3 It is preferable to set the temperature to around 50°C. For example, the insulating film 250A is deposited at 350°C. This allows for the formation of insulating films with fewer impurities.

[0302] Furthermore, by exciting oxygen with microwaves, a high-density oxygen plasma is generated, and the oxygen plasma By exposing the insulating film 250A to the material, oxygen can be introduced into the insulating film 250A.

[0303] Furthermore, heat treatment may be performed. The heat treatment can be carried out using the heat treatment conditions described above. The heat treatment reduces the moisture and hydrogen concentrations in the insulating film 250A. It is possible.

[0304] Next, conductive films 260Aa and 260Ab are deposited (see Figure 13). The deposition of 260Aa and conductive film 260Ab is performed by sputtering, CVD, MBE, This can be done using methods such as the PLD method or the ALD method. For example, the CVD method can be used. This is preferable. In this embodiment, a conductive film 260Aa is formed using the ALD method, and then CVD. A conductive film 260Ab is deposited using the following method.

[0305] Next, by CMP treatment, an oxide film 230C, an insulating film 250A, and a conductive film 260Aa are formed. By polishing the conductive film 260Ab until the insulator 280 is exposed, the oxide 230 c. Form an insulator 250 and a conductor 260 (conductor 260a and conductor 260b) (See Figure 14.)

[0306] Next, a heat treatment may be performed. The heat treatment conditions described above can be used. This heat treatment reduces the moisture and hydrogen concentrations in the insulator 280. Alternatively, it is preferable to perform a heat treatment before forming the insulating film that will become the insulator 274. The heat treatment should be carried out at a temperature between 100°C and 400°C; for example, at 200°C. It is preferable to carry out this process at the same temperature as the film deposition temperature of the insulating film. Here, the film deposition temperature is the same temperature as the film deposition temperature. This includes not only the substrate temperature within the film, but also the set temperature of the film deposition apparatus. For example, the insulating film is 250 When forming a film at °C, it is preferable to perform the heat treatment at 250°C. It is preferable to carry out the process under pressure, for example, in a vacuum atmosphere. A vacuum atmosphere is a turbo It is maintained by exhausting using molecular pumps, etc. In a vacuum atmosphere, the pressure in the processing chamber is 1 × 1 0 -2 Pa or less, preferably 1 × 10⁻⁶ -3 It should be less than or equal to Pa.

[0307] Next, an insulating film, which will become an insulating film 274, is formed on the insulating film 280 (see Figure 14). The insulating film that forms the edge 274 is deposited using sputtering, CVD, MBE, PLD, Alternatively, this can be done using methods such as ALD. Examples of insulating films that become insulator 274 include For example, it is preferable to deposit an aluminum oxide film by sputtering. By forming an aluminum oxide film using the dermating method, an insulator 280 is formed. In some cases, it may be possible to suppress the diffusion of hydrogen into oxide 230.

[0308] By using the sputtering method to deposit the insulator 274 in an oxygen-containing atmosphere, While forming the film, oxygen may be added to the insulator 280. Here, the oxygen is, for example, oxygen radiophosphate. Although it is added as CAL, the state in which oxygen is added is not limited to this. Oxygen is, It may be added in the form of oxygen atoms or oxygen ions. Further heat treatment in a later step will... Oxygen can be diffused to effectively supply oxygen to oxide 230.

[0309] Furthermore, it is preferable to heat the substrate when forming the insulator 274. Substrate heating is performed as follows: Preferably, the temperature is higher than 00°C and 300°C or lower. More preferably, it is 120°C or higher. It is sufficient to perform the process at temperatures below 250°C. By raising the substrate temperature above 100°C, oxide 230 It can remove the water inside. Furthermore, it prevents surface-adsorbed water from adhering to the formed film. It can be stopped.

[0310] Furthermore, the transistor 200 is sandwiched between insulators 274 and 222. By doing so, oxygen is not diffused outward, and the insulator 280, insulator 224, and oxide 23 It is possible to include a large amount of oxygen in 0. Furthermore, above the insulator 274 and the insulator To prevent impurities such as water or hydrogen from entering from below 222, insulator 280, insulator The concentration of impurities in 224 and oxide 230 can be reduced.

[0311] Next, a heat treatment may be performed. The heat treatment conditions described above can be used. This heat treatment reduces the moisture and hydrogen concentrations in the insulator 280. Furthermore, this heat treatment allows the oxygen contained in the insulator 280 to diffuse. can.

[0312] As described above, in this embodiment, the oxide 230b is covered with the insulator 256 and the insulator Because 266 is provided, in the heat treatment, the oxygen added to the insulator 280 is It does not directly penetrate oxide 230b. Also, it is in contact with the upper surfaces of conductor 260 and insulator 280. Since an insulator 274 is provided, in the heat treatment, the insulator 280 is added Oxygen does not diffuse outward. Here, in the heat treatment, the oxygen added to the insulator 280 This is the field where the oxide 230b is diffused via the oxide 230c in contact with the side surface of the insulator 280. There is a combination. In particular, when CAAC-OS is used as oxide 230c, oxide 2 Layered crystals in 30c may be arranged along the sides and bottom of the opening 263. Therefore, the oxygen diffused into oxide 230c flows along the layered crystal to oxide 230b. It can spread in that way.

[0313] Furthermore, when the substrate is heated during the deposition of the insulator 274, the substrate heating will cause the following: In some cases, oxygen can be diffused from the insulator 280 to the oxide 230. In this case, The above heat treatment is not required.

[0314] Furthermore, in the above procedure, oxygen was added to the insulator 280 at the same time as the deposition of the insulator 274. This embodiment is not limited to this. For example, before forming the insulator 274, ions Injection method, ion doping method, plasma treatment method, and plasma immersion ion injection Oxygen is added to the insulator 280 using one or more methods selected from the plantation method. It may also be added. In this case, an ion implantation method is used in which the ionized source gas is separated by mass and added. Using this method allows for controlled addition of oxygen to the insulator 280, which is preferable. Ion injection method, ion doping method, plasma treatment method, and plasma immersion ion injection Using one or more methods selected from the plantation method, oxygen is supplied to the insulator 280. It may be added, and oxygen may also be added at the same time as the film formation of the insulator 274.

[0315] Next, an insulating film that will become an insulating film 281 may be formed on the insulating film 274. The deposition of the insulating film can be done by sputtering, CVD, MBE, PLD, or ALD. This can be done using laws and regulations (see Figure 14).

[0316] Next, insulators 256, 266, 280, 274 and 281 An opening is formed that reaches layers 253a and 253b. The formation of this opening is done by lithography. This can be done using the fee method.

[0317] Next, an insulating film to become an insulator 241 is formed, and the insulating film is anisotropically etched to form an insulator. Form 241. The insulating film is deposited by sputtering, CVD, MBE, PL This can be done using the D method or the ALD method, etc. It is preferable to use an insulating film that has the function of suppressing oxygen permeation. For example, ALD It is preferable to deposit an aluminum oxide film by a method such as ALD or CVD. A silicon nitride film may be formed using the ALD method. In such cases, precursors containing silicon and halogens, or precursors of aminosilanes are used. It can be present. As a precursor containing silicon and halogen, SiCl4, Si H2Cl2, Si2Cl6, Si3Cl8, etc. can be used. Also, aminosilanes can be used. Monovalent, divalent, or trivalent aminosilanes can be used as precursors. Furthermore, ammonia or hydrazine can be used as the nitride gas. Also, anisotropy Etching can be done using methods such as dry etching. The side walls of the opening can be treated in this way. This configuration suppresses the permeation of oxygen from the outside, and the conductor 240a and that are formed next This prevents oxidation of conductor 240b. Also, conductor 240a and conductor 24 From 0b, it is possible to prevent impurities such as water and hydrogen from diffusing to the outside.

[0318] Next, conductive films that will become conductor 240a and conductor 240b are formed. Conductive 240a The conductive film that forms the conductor 240b has the function of suppressing the diffusion of impurities such as water and hydrogen. It is desirable to have a laminated structure that includes a conductive material. For example, tantalum nitride, titanium nitride, etc. It can be made into a laminate of materials such as tungsten, molybdenum, and copper. Conductor 24 The deposition of conductive films with a conductivity of 0 can be done by sputtering, CVD, MBE, PLD, or AL. This can be done using methods such as the D method.

[0319] Next, by performing CMP treatment, the conductive films that become conductor 240a and conductor 240b are formed. A portion is removed to expose the insulator 281. As a result, the conductive film remains only in the aforementioned opening. This makes it possible to form conductors 240a and 240b with flat upper surfaces. See Figure 1. Note that this CMP treatment may remove a portion of the insulator 281. ru.

[0320] Based on the above, a semiconductor device having the transistor 200 shown in Figure 1 can be fabricated. As shown in Figures 5 to 14, the method for manufacturing the semiconductor device shown in this embodiment is used. Thus, transistor 200 can be manufactured.

[0321] According to one aspect of the present invention, a semiconductor device with a large on-current can be provided. According to one aspect of the present invention, a semiconductor device having high frequency characteristics can be provided. Alternatively, according to one aspect of the present invention, a semiconductor device with good reliability can be provided. Alternatively, to provide a semiconductor device that can be miniaturized or highly integrated according to one aspect of the present invention. This is possible. Alternatively, according to one aspect of the present invention, a semiconductor device having good electrical characteristics is provided. This is possible. Alternatively, according to one aspect of the present invention, a semiconductor device with a small off-current is provided. This is possible. Alternatively, according to one aspect of the present invention, a semiconductor device with reduced power consumption is provided. It can be provided. Or, according to one aspect of the present invention, a highly productive semiconductor device can be provided. It is possible.

[0322] <Modified examples of semiconductor devices> In the following sections, using Figures 15 to 19, we will explain how the configuration of the semiconductor device differs from that shown in the previous <Example of Semiconductor Device Configuration>. A semiconductor device having a transistor 200 according to one aspect of the present invention, and the semiconductor An example of a method for fabricating a device will be described.

[0323] Furthermore, in Figures 15 to 19, (A) in each figure indicates a top view. Also, (B) in each figure This is a cross-sectional view corresponding to the area shown by the dashed line A1-A2 in (A) of each figure, and This is also a cross-sectional view of the channel length direction of the 200. Also, (C) in each figure is (A) in each figure. This is a cross-sectional view corresponding to the area indicated by the dashed line A3-A4 in the diagram, and shows the cross-section of transistor 200. This is also a cross-sectional view in the channel width direction. In addition, (D) in each figure is a section A5-A6 of (A) in each figure. The dotted line indicates a cross-sectional view corresponding to the area, showing the cross-section of transistor 200 in the channel width direction. This is also a diagram. In the top view (A) of each diagram, some elements have been omitted for clarity. It is.

[0324] Furthermore, in the semiconductor device shown in Figures 15 to 19, the configuration shown in <Example of semiconductor device configuration> is as follows. Structures that have the same function as the structures constituting the semiconductor device (see Figure 1) are denoted by the same reference numeral. Note that in this section, the constituent materials of transistor 200 are as follows: <Construction of semiconductor device The materials described in detail in the example can be used.

[0325] The transistor 200 shown in Figure 15 does not have an insulator 266 and is insulated from the insulator 280. It differs from the transistor 200 shown in Figure 1 in that the edge 256 is in contact with the transistor.

[0326] The semiconductor device shown in Figure 15 has a dummy gate 262B and a dopant 258 added. Up to this point, the method is the same as the semiconductor device fabrication method shown in Figure 1. Therefore, the method described in Figures 5 to 9 Methods for manufacturing semiconductor devices can be considered.

[0327] Next, the insulating film 256A and the dummy gate 262B are covered to form the dummy film 267A. A film is formed. The film that will become the dummy film 267A is formed by sputtering, CVD, and M The film can be deposited using methods such as the BE method, PLD method, or ALD method. Here, a dummy film The 267A film is ultimately removed, making microfabrication easy, and removal is also possible. It is preferable to use an easily formed film. For example, an insulator that can be used for the insulator 266 It is fine to use it. However, when removing it in a later step, the insulator 280 and insulating film 256A On the other hand, it is preferable to use a device that can achieve a sufficiently large etching rate.

[0328] Next, anisotropic etching is performed on the film that will become the dummy film 267A, and the dummy gate 262B Dummy film 267A is formed by leaving only the portion in contact with the side wall intact. (See Figure 16.) For directional etching, methods such as dry etching can be used.

[0329] In a later step, the dummy gate 262B and dummy film 267A are removed to form the opening 263 This forms the opening 263, which means the size of the opening 263 is controlled by the thickness of the dummy film 267A. This is possible. Here, layers 252 and 253 are relative to the arrangement of dummy gate 262B. It is formed in a self-aligning manner. The opening 263 is centered on the position of the dummy gate 262B. Therefore, the size can be controlled. By making the opening 263 larger, the conductor 2 Layer 60 can be superimposed with layer 252. Furthermore, by enlarging the opening 263, the conductivity Body 260 can also be superimposed on layer 253. In this way, the channel shape of oxide 230 This prevents the formation of an offset region between the production region and the source or drain region. This makes it possible to suppress the effective channel length from becoming larger than the width of the conductor 260. This increases the on-current of transistor 200, improves the S value, and improves the frequency characteristics. The upper part can be measured. Note that the size of the aperture 263, that is, the over of transistor 200 The size of the wrap region is set appropriately according to the electrical characteristics required of transistor 200. It is possible.

[0330] Next, the same process as in Figure 10 is performed to create the insulating film 256A, the dummy film 267A, and An insulating film 280A is deposited on the dummy gate 262B.

[0331] Next, the same process as shown in Figure 11 is performed to obtain the insulating film 280A, the dummy film 267A, and Remove a portion of the dummy gate 262B until a portion of the dummy gate 262B is exposed. , an insulator 280, a dummy film 267, and a dummy gate 262 are formed (see Figure 17). ). CMP treatment is used to form the insulator 280, dummy film 267, and dummy gate 262. It is preferable to use it.

[0332] Next, from the dummy gate 262, the dummy film 267, and the insulator 280 of the insulating film 256A Remove the exposed portion to form opening 263 (see Figure 18). Dummy gate 262, The removal of the dummy film 267 and insulating film 256A is done by using the insulator 280 as a mask. This can be done using methods such as etching, dry etching, or ashing. Alternatively, the above processes may be combined as appropriate. For example, after the ashing process... This includes wet etching. Here, a portion of the insulating film 256A is removed. By doing so, an insulator 256 is formed. Dummy gate 262, dummy film 267 and insulation By removing a portion of the edge film 256A, a portion of the surface of the oxide 230b is removed from the opening 263. (Including layers 252 and 253) is exposed.

[0333] Here, the insulator 280 and the insulating film 256A are used as etching stoppers, and a dummy game Remove the film 262 and dummy film 267, then use the insulator 280 as a mask for insulating film 256 It is preferable to remove the portion exposed from the insulator 280 of A. The gate 262, the dummy film 267, and the portion of the insulating film 256A that is exposed from the insulator 280 By removing it, the side walls of the opening 263 are not excessively etched, and the opening 263 is removed. It can be formed.

[0334] The subsequent steps in the method for fabricating the semiconductor device shown in Figure 15 are as follows: The manufacturing method is the same as that of the previous model. Therefore, refer to the manufacturing method of the semiconductor device shown in Figures 13 and 14. It is possible to pour drinks.

[0335] The transistor 200 shown in Figure 19 has insulators 256, 266, and 28 At the point where the angle between the side surface of 0 and the top surface of oxide 230b is greater than 90°, as shown in Figure 1, It is different from the Ranjista 200.

[0336] In the description of the semiconductor device manufacturing method shown in Figure 7, the side surface of the dummy gate 262A is , was approximately perpendicular to the top surface of oxide 230b. In contrast, dummy gate 262A The angle between the side surface and the top surface of oxide 230b is less than 90°, in other words, dummy gate 262 If the cross-sectional shape of A has a forward taper shape, then insulator 256, insulator 266, and The cross-sectional shape of the insulator 280 is an inverse taper shape, as shown in Figure 19. Also, oxide 2 The cross-sectional shapes of 30c, the insulator 250, and the conductor 260 are forward tapered.

[0337] The configurations and methods described in this embodiment are similar to those described in other embodiments. They can be used in combination as appropriate.

[0338] (Embodiment 2) In this embodiment, one form of a semiconductor device will be described using Figures 20 and 21.

[0339] [Storage device 1] Figure 20 shows an example of a semiconductor device (memory device) using a capacitive element, which is one aspect of the present invention. As shown, in a semiconductor device according to one aspect of the present invention, transistor 200 is transistor 300 It is located above the transistor 300 and the transistor 200, and the capacitive element 100 is located above the transistor 300 and the transistor 200. It is located at the top. Note that the transistor 200 is the same as the one described in the previous embodiment. You can use a Rangista 200 or similar.

[0340] Transistor 200 is a transistor in which a channel is formed in a semiconductor layer having an oxide semiconductor. It is a transistor. Transistor 200 is used in memory devices because it has a low off-current. This makes it possible to retain memory content for a long period of time. In other words, refresh Because it does not require any operation, or because the refresh operation is performed very infrequently, the memory Power consumption can be significantly reduced.

[0341] In the semiconductor device shown in Figure 20, wiring 1001 is connected to the source and electrical source of transistor 300. The wiring 1002 is electrically connected to the drain of transistor 300. Furthermore, wiring 1003 is electrically connected to either the source or the drain of transistor 200. The wiring 1004 is then electrically connected to the first gate of transistor 200, and the wiring 1 006 is electrically connected to the second gate of transistor 200. And, The gate of transistor 300, and the other of the source and drain of transistor 200, The wiring 1005 is electrically connected to one of the electrodes of the capacitance element 100, and the wiring 1005 is connected to the electrode of the capacitance element 100. It is electrically connected to the other side.

[0342] Furthermore, the memory device shown in Figure 20 is arranged in a matrix, thereby creating a memory cell array. It can be configured.

[0343] <Transistor 300> The transistor 300 is provided on the substrate 311 and has a conductor 3 that functions as a gate electrode. 16. Semiconductor region consisting of an insulator 315 that functions as a gate insulator and a part of the substrate 311. 313, and a low-resistance region 314a that functions as a source region or drain region, and It also has a low-resistance region 314b. Transistor 300 is p-channel type or n-channel type. Any type of flannel filter is acceptable.

[0344] Here, the transistor 300 shown in Figure 20 is in the semiconductor region 313 where the channel is formed. A portion of the substrate 311 has a convex shape. In addition, the side and top surfaces of the semiconductor region 313 are made of an insulating material. The conductor 316 is provided to cover the edge 315. Materials that adjust the work function may also be used. Such a transistor 300 is on a semiconductor substrate. It is also called a FIN type transistor because it utilizes the protrusion. It may also have an insulator that contacts and functions as a mask for forming a protrusion. Here, we have shown a case where a protrusion is formed by processing a part of a semiconductor substrate, but when processing an SOI substrate... A semiconductor film having a convex shape may be formed in this manner.

[0345] Note that the transistor 300 shown in Figure 20 is just one example, and its structure is not limited to that example. A suitable transistor should be used depending on the configuration and driving method.

[0346] <Capacitive element 100> The capacitive element 100 is located above the transistor 200. The capacitive element 100 is the first A conductor 110 that functions as an electrode, a conductor 120 that functions as a second electrode, and It has an insulator 130 that functions as a dielectric.

[0347] Furthermore, for example, the conductor 112 provided on the conductor 240 and the conductor 110 are formed simultaneously. This is possible. Furthermore, the conductor 112 is connected to the capacitive element 100, the transistor 200, and It functions as a plug or wire that electrically connects to transistor 300.

[0348] In Figure 20, the conductors 112 and 110 are shown as having a single-layer structure, but this configuration is not limited to this. It is not specified, and may be a laminated structure of two or more layers. For example, a conductor with barrier properties and a highly conductive material A conductor with barrier properties and a conductor with high conductivity are bonded to each other. A highly conductive material may be formed.

[0349] Furthermore, the insulator 130 may be, for example, silicon oxide, silicon oxide nitride, or silicon oxide nitride. Silicon nitride, aluminum oxide, aluminum oxide nitride, aluminum oxide nitride, nitrile Aluminum oxide, hafnium oxide, hafnium oxide nitride, hafnium oxide nitride, hafnium nitride It can be made using materials such as nium, and can be constructed in layers or as a single layer.

[0350] For example, the insulator 130 may contain a material with high dielectric strength, such as silicon oxynitride, and a high dielectric strength material. It is preferable to use a laminated structure with a high-k material. With this configuration, the capacity element Child 100 has a high dielectric constant (high-k) insulator, which ensures sufficient capacitance. By having an insulator with high dielectric strength, the dielectric strength is improved, and the electrostatic discharge of the capacitive element 100 is reduced. It can suppress damage.

[0351] Furthermore, as an insulator of high-dielectric constant (high-k) materials (materials with a high relative permittivity), Having gallium, hafnium oxide, zirconium oxide, aluminum and hafnium Oxides, aluminum and hafnium-containing oxides and nitrides, silicon and hafnium Oxides having silicon and hafnium, or silicon and ha Examples include nitrides containing humium.

[0352] On the other hand, materials with high dielectric strength (materials with low dielectric constant) include silicon oxide and nitrogen oxide. Silicon oxide, silicon nitride, silicon nitride, silicon oxide with added fluorine, carbon Silicon oxide with added carbon and nitrogen, silicon oxide with voids It may be made of concrete or resin.

[0353] <Wiring layer> Between each structure, there is a wiring layer containing interlayer membranes, wiring, and plugs. This is also possible. Furthermore, multiple wiring layers can be provided depending on the design. Here, the plug A conductor that functions as wiring is assigned the same code to multiple structures grouped together. In some cases, the wiring and the plug that electrically connects to the wiring are considered to be one. It may also be a physical object. That is, when a part of the conductor functions as wiring, and the conductor In some cases, a part of it may function as a plug.

[0354] For example, on transistor 300, there are insulators 320, 322, and an insulator as interlayer films. The edge body 324 and the insulator 326 are arranged in order in stacked layers. Also, the insulator 320, Insulators 322, 324, and 326 contain capacitive elements 100 or transients Conductors 328 and 330, etc., which are electrically connected to the sta 200, are embedded within. Furthermore, conductors 328 and 330 function as plugs or wiring.

[0355] Furthermore, the insulator, which functions as an interlayer film, acts as a planarizing film that covers the uneven shape beneath it. It may function. For example, the upper surface of the insulator 322 may be chemically and mechanically polished to improve flatness. The surface may be flattened by a flattening treatment such as the CMP method.

[0356] A wiring layer may be provided on the insulator 326 and the conductor 330. For example, as shown in Figure 20. Insulators 350, 352, and 354 are arranged in a stacked manner. Furthermore, a conductor 356 is formed on insulators 350, 352, and 354. Conductor 356 functions as a plug or wiring.

[0357] Similarly, insulators 210, 212, 214, and 216 are conductive Body 218 and the conductor (conductor 205) that constitutes the transistor 200 are embedded. It is present. Furthermore, the conductor 218 is electrically connected to the capacitive element 100 or the transistor 300. It functions as a connecting plug or wiring. Furthermore, the conductor 120 and the insulator An insulator 150 is provided above 130.

[0358] Insulators that can be used as interlayer films include insulating oxides, nitrides, and acids. Examples include nitrides, nitride oxides, metal oxides, metal oxide nitrides, and metal nitride oxides.

[0359] For example, by using a material with a low dielectric constant for the insulator that functions as an interlayer film, wiring The parasitic capacitance that occurs between them can be reduced. Therefore, depending on the function of the insulator, the material You should choose this option.

[0360] For example, insulators 150, 212, 352, and 354 have a ratio It is preferable to have an insulator with a low dielectric constant. For example, the insulator may be silicon oxide, acid Silicon nitride, silicon nitride oxide, silicon nitride, fluorine-added silicon oxide, carbon silicon oxide with added elements, silicon oxide with added carbon and nitrogen, porous silicon oxide It is preferable that the insulator has silicon or resin. Alternatively, the insulator may be silicon oxide. Silicon oxide nitride, silicon nitride, silicon nitride, fluorine-added silicon oxide , silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, or having vacancies It is preferable to have a laminated structure of silicon oxide and resin. Because silicon oxide-nitride is thermally stable, when combined with resin, it becomes thermally stable. A laminated structure with a low dielectric constant can be formed. Examples of resins include polyester. Polyolefins, polyamides (nylon, aramid, etc.), polyimides, polycarbonates Materials include acrylic or similar.

[0361] Furthermore, an insulator 130 provided on the conductor 112 or the conductor 120, and an insulator 150, or one or both, with a resistivity of 1.0 × 10 12 Ωcm or greater: 1.0 × 10 15 Ωc m or less, preferably 5.0 × 10 12 Ωcm or greater: 1.0 × 10 14 Ωcm or less, more preferably Or 1.0 × 10 13 Ωcm or more, 5.0 × 10 13 It is preferable to use an insulator with a value of Ωcm or less. It seems that one or both of insulators 130 and 150 have the resistivity described above. By making it an insulator, the insulator maintains its insulating properties while providing insulation to the transistor 200. Between the transistor 300, the capacitive element 100, and the wiring of the conductor 112 and conductor 120, Disperse the accumulated charge, and the charge is used to create a transistor, a memory device having the transistor It is preferable because it can suppress defects in the characteristics of the material and electrostatic discharge. As such an insulator, nitrogen Silicon oxide or silicon nitride can be used.

[0362] Furthermore, as an insulator having the resistivity described above, the insulator 140 is placed in the lower layer of the conductor 112. It may also be provided as follows. In this case, an insulator 140 is formed on the insulator 281, and the insulator 140, Edge 281, insulator 274, insulator 280, insulator 266, insulator 256, insulator 224 ..., an opening is formed in the insulator 222, and an insulator 241 is formed in the opening, or a transient The conductor 240 should be formed to electrically connect with the sta 200, conductor 218, etc. The edge 140 can be made of the same material as the insulator 130 or the insulator 150.

[0363] Furthermore, transistors using oxide semiconductors suppress the permeation of impurities such as hydrogen and oxygen. By surrounding the transistor with an insulator that has a controlling function, the electrical characteristics of the transistor are stabilized. Therefore, the insulator 210 and the insulator 350, etc., are free of impurities such as hydrogen. An insulator that has the function of suppressing oxygen permeation should be used.

[0364] Examples of insulators that have the function of suppressing the permeation of impurities such as hydrogen and oxygen include, Boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, salt Element, argon, gallium, germanium, yttrium, zirconium, lanthanum, neo An insulator containing zym, hafnium, or tantalum may be used in a single layer or in a multilayer configuration. Specifically, as an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen, Aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide Umium, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, or tan oxide Metal oxides such as tar, silicon nitride, or silicon nitride can be used. .

[0365] Conductors that can be used in wiring and plugs include aluminum, chromium, copper, and silver. Gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanilla Dium, niobium, manganese, magnesium, zirconium, beryllium, indium, Materials containing one or more metallic elements selected from thenium and others can be used. Semiconductors with high electrical conductivity, such as polycrystalline silicon containing impurity elements like nitrates, Silicides such as nickel silicide may also be used.

[0366] For example, conductor 328, conductor 330, conductor 356, conductor 218, and conductor 1 12, etc., are metal materials, alloy materials, metal nitride materials, or formed from the above materials. Conductive materials such as metal oxide materials can be used in a single layer or in a laminated form. Heat resistance and It is preferable to use high-melting-point materials such as tungsten or molybdenum that can achieve both conductivity and electrical conductivity. Tungsten is particularly preferred. Alternatively, low-resistance conductive materials such as aluminum or copper are also preferable. It is preferable to form it with a conductive material. Using a low-resistance conductive material reduces the wiring resistance. It is possible.

[0367] <<Wiring or plugs in layers containing oxide semiconductors>> Furthermore, when an oxide semiconductor is used for transistor 200, excess near the oxide semiconductor An insulator having an oxygen region may be provided. In that case, the insulator having the excess oxygen region A barrier-type insulator is provided between the insulator having the excess oxygen region and the conductor. It is preferable to provide one.

[0368] For example, in Figure 20, an insulator 241 is provided between the insulator 224 and the conductor 240. This is good. In particular, the insulator 241 sandwiches the insulator 224 which has an excess oxygen region. It is preferable that the insulator 256 and the insulator 266 are provided in contact with each other. Insulator 241 The insulators 222, 256, and 266 are provided in contact with each other, thus providing an insulating The edge body 224 can be sealed with a barrier-type insulator. Furthermore, it is preferable that the insulator 241 also be in contact with the insulator 280 and a portion of the insulator 281. i. The insulator 241 extends to the insulator 280 and the insulator 281, thus oxygen This can further suppress the diffusion of impurities.

[0369] In other words, by providing the insulator 241, the excess oxygen in the insulator 224 is absorbed by the conductor 24 Absorption to 0 can be suppressed. Also, by having an insulator 241, impurities can be suppressed. This suppresses the diffusion of hydrogen, which is a substance, into the transistor 200 via the conductor 240. It is possible.

[0370] Furthermore, the insulator 241 is designed to suppress the diffusion of impurities such as water or hydrogen, and oxygen. It is preferable to use an insulating material that has the function of [insulating]. For example, aluminum oxide or hafni oxide. It is preferable to use materials such as um. In addition, other materials such as magnesium oxide and gallium oxide can also be used. Um, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, nexite oxide Metal oxides such as odium or tantalum oxide, silicon nitride or silicon nitride, etc. You can use it.

[0371] The above is a description of the example configuration. By using this configuration, a tortoise having an oxide semiconductor can be constructed. In semiconductor devices using transistors, the aim is to suppress fluctuations in electrical characteristics and improve reliability. It can be increased. Alternatively, a transistor having an oxide semiconductor with a large on-current can be used. It can be provided. Or, a transistor having an oxide semiconductor with a low off-current. We can provide it. Or, we can provide a semiconductor device with reduced power consumption. ru.

[0372] [Storage device 2] Figure 21 shows an example of a storage device using a semiconductor device according to one aspect of the present invention. The memory device shown is transistor 200, transistor 300, and shown in Figure 20. In addition to a semiconductor device having a quantitative element 100, it also has a transistor 400.

[0373] Transistor 400 can control the second gate voltage of transistor 200. For example, the first gate and second gate of transistor 400 are connected to the source and diode. Connect the source of transistor 400 to the second gate of transistor 200. The configuration is as follows. When the negative potential of the second gate of transistor 200 is maintained in this configuration, The voltage between the first gate and source of the transistor 400 and the voltage between the second gate and source The voltage becomes 0V. In transistor 400, the second gate voltage and the first gate voltage Because the drain current is very small when the voltage is 0V, transistor 200 and transistor Even without supplying power to transistor 400, the negative potential of the second gate of transistor 200 can be maintained for an extended period. This can be maintained for a period of time. This allows transistors 200 and 400 A storage device having this feature can retain its contents for a long period of time.

[0374] Therefore, in Figure 21, wiring 1001 is electrically connected to the source of transistor 300. Furthermore, wiring 1002 is electrically connected to the drain of transistor 300. Wiring 1003 is electrically connected to either the source or drain of transistor 200. Wire 1004 is electrically connected to the gate of transistor 200, and wire 1006 is connected to the transistor It is electrically connected to the second gate of transistor 200. And transistor 300 The gate, and the other of the source and drain of transistor 200, are of the capacitive element 100. The wiring 1005 is electrically connected to one electrode and to the other electrode of the capacitive element 100. It is connected. Wiring 1007 is electrically connected to the source of transistor 400, and wiring 1008 is electrically connected to the first gate of transistor 400, and wiring 1009 is connected to the transistor The wiring 1010 is electrically connected to the second gate of transistor 400. It is electrically connected to the drain. Here, wiring 1006, wiring 1007, wiring 10 Wiring 08 and wiring 1009 are electrically connected.

[0375] Furthermore, the storage device shown in Figure 21 is arranged in a matrix, similar to the storage device shown in Figure 20. This allows for the construction of a memory cell array. Note that one transistor 40 0 can control the second gate voltage of multiple transistors 200. Therefore, it is preferable to use fewer transistors 400 than transistors 200.

[0376] <Transistor 400> Transistor 400 is formed on the same layer as transistor 200 and is manufactured in parallel. It is a transistor that can be manufactured. Transistor 400 is the first gate. Conductive conductors 460 (conductors 460a and 460b), and a second gate The functional conductor 405 (conductor 405a and conductor 405b) and the gate insulating layer Insulators 222, 224, and 450 function together, and a channel is formed. Oxide 430c having a region, and layer 453a, oxide 431a, which function as a source, and oxide 431b, and layer 453b, oxide 432a, which functions as a drain, and acid Having a compound 432b and a conductor 440 (conductor 440a and conductor 440b), .

[0377] In transistor 400, conductor 405 is in the same layer as conductor 205. Material 431a, oxide 432a, and oxide 230a are the same layer, and oxide 43 Layer 1b, and oxide 432b and oxide 230b are the same layer. Layer 453a and Layer 453b is a layer formed by the same process as layers 253a and 253b. Oxide 4 30c is the same layer as oxide 230c. Insulator 450 is the same layer as insulator 250. Conductor 460 is in the same layer as conductor 260.

[0378] Furthermore, structures formed in the same layer can be formed simultaneously. For example, oxide 4 30c can be formed by processing an oxide film that becomes oxide 230c.

[0379] Oxide 430c, which functions as the active layer of transistor 400, is the same as oxide 230, etc. Thus, oxygen deficiency is reduced, and impurities such as hydrogen or water are reduced. The threshold voltage of transistor 400 is set to greater than 0V, reducing the off-current and the second gate The drain current can be made very small when the gate voltage and the first gate voltage are 0V. ru.

[0380] <<Dicing Line>> In the following, by dividing a large-area substrate into semiconductor elements, multiple semiconductor devices are created. Dicing lines (scribe lines, division lines) are provided when extracting chips. This explains the cutting line (which may also be called the cutting line). For example, the method of division is... First, grooves (dicing lines) are formed in the substrate to divide the semiconductor elements, In some cases, the semiconductor device may be cut during grinding, resulting in its division into multiple semiconductor devices.

[0381] Here, for example, as shown in Figure 21, the region where the insulator 256 and the insulator 222 are in contact. It is preferable to design it so that it becomes a dicing line. In other words, multiple transistors A memory cell having 200, and a dicing laser provided on the outer edge of the transistor 400 An opening is provided in the insulator 224 near the region that will be in. Also, the side of the insulator 224 Insulators 256 and 266 are provided to cover the insulators.

[0382] In other words, at the opening provided in the insulator 224, the insulator 222 and the insulator 254 They come into contact. For example, in this case, the insulator 222 and the insulator 254 are made of the same material and using the same method. They may be formed by the same material and method. Insulators 222 and 254 are provided by the same material and method. This can improve adhesion. For example, aluminum oxide is preferred. It's nice.

[0383] With this structure, the insulator 222 and the insulator 254, the insulator 224, the transistor It can enclose transistors 200 and 400. Insulator 222, and insulation Body 254 has the function of suppressing the diffusion of oxygen, hydrogen, and water, therefore, in this embodiment By dividing the substrate for each circuit region where the semiconductor element shown is formed, multiple chips can be formed. Even after processing, impurities such as hydrogen or water can enter from the side of the divided substrate, causing problems. This prevents the substance from spreading to transistor 200 and transistor 400.

[0384] Furthermore, due to this structure, excess oxygen in the insulator 224 is transferred to the insulator 254 and the insulator 222 This prevents it from diffusing to the outside. Therefore, excess oxygen in the insulator 224 is efficiently The oxide in which the channel in transistor 200 or transistor 400 is formed It is supplied to transistor 200 or transistor 400. This reduces the oxygen vacancy in oxides where channels are formed. In the zista 200 or transistor 400, the oxide in which the channel is formed is a defect criterion. It is possible to obtain an oxide semiconductor with low transient density and stable properties. In other words, transient This suppresses fluctuations in the electrical characteristics of the 200 or 400 transistor, while also improving reliability. It can be raised.

[0385] This embodiment may be implemented in appropriate combination with the configurations described in other embodiments. This is possible.

[0386] (Embodiment 3) In this embodiment, using Figures 22 and 23, we will explain one aspect of the present invention in which an oxide is semi-oxidized. The transistor used as the conductor (hereinafter sometimes referred to as the OS transistor), and the capacitance This section describes the memory device to which the element is applied (hereinafter sometimes referred to as the OS memory device). To clarify, the OS memory device includes at least a capacitive element and an OS that controls the charging and discharging of the capacitive element. It is a memory device that has a transistor. The off-current of the OS transistor is extremely small, OS memory devices have excellent retention characteristics and can function as non-volatile memory. .

[0387] <Example of storage device configuration> Figure 22(A) shows an example of the configuration of the OS memory device. The storage device 1400 is connected to peripheral circuit 1 It has 411 and a memory cell array 1470. Peripheral circuit 1411 is row circuit 142 It has a 0, a column circuit 1430, an output circuit 1440, and a control logic circuit 1460.

[0388] The column circuit 1430 includes, for example, a column decoder, a precharge circuit, a sense amplifier, and a writing It has a power supply circuit, etc. The precharge circuit has the function of precharging the wiring. The amplification amplifier has the function of amplifying the data signal read from the memory cell. The above wiring is connected to the memory cells of the memory cell array 1470. More details will be provided later. The amplified data signal is output via the output circuit 1440. It is output to the outside of the storage device 1400 as RDATA. Also, the row circuit 1420 is, for example It has a row decoder, a word line driver circuit, etc., and can select the row to access. ru.

[0389] The storage device 1400 receives a low power supply voltage (VSS) from an external source as the power supply voltage, and peripheral circuits 14 The high power supply voltage (VDD) for 11 and the high power supply voltage (VIL) for the memory cell array 1470 are It is supplied. In addition, the storage device 1400 contains control signals (CE, WE, RE) and address signals. The address signal ADDR and the data signal WDATA are input from an external source. The address signal ADDR is the line The WDATA signal is input to the decoder and column decoder, and then input to the writing circuit.

[0390] The control logic circuit 1460 processes external input signals (CE, WE, RE). It processes and generates control signals for row decoders or column decoders. CE enables chip enable WE is the write enable signal, and RE is the read enable signal. This is the number. The signals processed by the control logic circuit 1460 are not limited to this. Instead, if necessary, other input signals are processed to control the row decoder or column decoder. You just need to generate the signal.

[0391] The memory cell array 1470 consists of multiple memory cells MC arranged in a matrix, and multiple It has the wiring. Note that the wiring connecting the memory cell array 1470 and the row circuit 1420 The number of lines is determined by the configuration of the memory cell MC, the number of memory cell MCs in a single row, and other factors. Also, the number of wires connecting the memory cell array 1470 and the column circuit 1430 is noted. This is determined by factors such as the configuration of the recell MC and the number of memory cell MCs in each row.

[0392] In Figure 22(A), the peripheral circuit 1411 and the memory cell array 1470 are on the same plane. Although an example of formation on a surface has been shown, this embodiment is not limited to this. As shown in Figure 22(B), a memory cell array 14 is placed on top of a portion of the peripheral circuit 1411. 70 may be provided so as to overlap. For example, it may overlap below the memory cell array 1470. Therefore, a configuration that includes a sense amplifier may also be used.

[0393] Figure 23 illustrates an example of a memory cell configuration that can be applied to the above-mentioned memory cell MC.

[0394] [DOSRAM] Figures 23(A) to (C) show examples of circuit configurations for DRAM memory cells. In this context, DRAM using a 1OS transistor 1 capacitance element type memory cell is used in DOSRA M(Dynamic Oxide Semiconductor Random Acc It is sometimes called a memory cell. As shown in Figure 23(A), memory cell 1471 is It has a transistor M1 and a capacitive element CA. Note that transistor M1 is a gate It has a front gate (sometimes called a front gate) and a rear gate.

[0395] The first terminal of transistor M1 is connected to the first terminal of capacitive element CA, and transistor M The second terminal of 1 is connected to wiring BIL, and the gate of transistor M1 is connected to wiring WOL. Next, the back gate of transistor M1 is connected to wiring BGL. Capacitive element C The second terminal of A is connected to wiring CAL.

[0396] Wiring BIL functions as a bit line, and wiring WOL functions as a word line. CAL functions as wiring for applying a predetermined potential to the second terminal of the capacitive element CA. During data writing and reading, a low-level potential is applied to the wiring CAL. It is preferable to do so. Wiring BGL is used to apply potential to the back gate of transistor M1. It functions as wiring. By applying an arbitrary potential to wiring BGL, the transistor The threshold voltage of M1 can be increased or decreased.

[0397] Furthermore, the memory cell MC is not limited to memory cell 1471, and the circuit configuration can be changed. This is possible. For example, the memory cell MC is like the memory cell 1472 shown in Figure 23(B) In this configuration, the back gate of transistor M1 is connected to the WOL wiring instead of the BGL wiring. It may also be made into a memory cell MC, as shown in Figure 23(C) As shown in 73, a single-gate transistor, that is, a transistor without a back gate, It may also be a memory cell composed of ZISTA M1.

[0398] When the semiconductor device shown in the above embodiment is used as a memory cell 1471, etc., a transistor Transistor 200 is used as M1, and capacitive element 100 is used as capacitive element CA. This can be done. By using an OS transistor as transistor M1, the transistor The leakage current of the M1 can be made very low. In other words, the written data can be transmitted Because it can be retained for a long time by ZISTA M1, the frequency of memory cell refresh is reduced. This can reduce the amount of memory required. Furthermore, it eliminates the need for memory cell refresh operations. It can be done. Also, because the leakage current is very low, memory cell 1471, memory cell 1472, The memory cell 1473 can hold multi-level data or analog data.

[0399] Furthermore, in DOSRAM, as described above, overlaps below the memory cell array 1470 As shown, by using a configuration that includes a sense amplifier, the bit line can be shortened. This reduces the bit line capacitance and thus the memory cell retention capacity.

[0400] [NOSRAM] Figures 23(D) to (G) show a gain cell type memory cell with two transistors and one capacitance element. An example of a circuit configuration is shown. As shown in Figure 23(D), the memory cell 1474 is connected to transistor M2, It has a transistor M3 and a capacitive element CB. Transistor M2 is the front It has a gate (sometimes simply called a gate) and a back gate. Furthermore, it has a gain cell type memory cell with an OS transistor in transistor M2. The memory device is NOSRAM (Nonvolatile Oxide Semiconductor). It is sometimes referred to as (Voctor RAM).

[0401] The first terminal of transistor M2 is connected to the first terminal of the capacitive element CB, and transistor M The second terminal of 2 is connected to the wiring WBL, and the gate of transistor M2 is connected to the wiring WOL. Next, the back gate of transistor M2 is connected to wiring BGL. Capacitive element C The second terminal of B is connected to wiring CAL. The first terminal of transistor M3 is connected to wiring R. The second terminal of transistor M3 is connected to BL, and the wiring SL is connected to transistor M The gate of 3 is connected to the first terminal of the capacitive element CB.

[0402] Wiring WBL functions as the write bit line, and wiring RBL functions as the read bit line. The wiring WOL functions as a word line. The wiring CAL is the second of the capacitive element CB. It functions as wiring to apply a predetermined potential to the terminal. When writing data, data retention During the process, when reading data, a low-level potential is applied to the wiring CAL. Preferred. Wiring BGL is wiring for applying potential to the back gate of transistor M2. It functions as follows: By applying an arbitrary potential to the wiring BGL, the transistor M2 The threshold voltage can be increased or decreased.

[0403] Furthermore, the memory cell MC is not limited to memory cell 1474, and the circuit configuration can be changed as appropriate. This is possible. For example, the memory cell MC is a memory cell 1475 shown in Figure 23(E) As shown, the back gate of transistor M2 is connected to the WOL wiring instead of the BGL wiring. It may also be configured as follows. For example, the memory cell MC is the memory cell shown in Figure 23(F). Like the 1476, it is a single-gate transistor, meaning it does not have a back gate. A memory cell composed of transistors M2 may also be used. Alternatively, for example, a memory cell MC As shown in Figure 23(G) for memory cell 1477, the wiring WBL and wiring RBL are connected in a single unit. It is also acceptable to configure it as a wiring BIL (Building Inspection Unit).

[0404] When the semiconductor device shown in the above embodiment is used as a memory cell 1474, etc., a transistor Transistor 200 is used as M2, and transistor 300 is used as transistor M3. Capacitive element 100 can be used as the capacitive element CB. Transistor M2 By using an OS transistor, the leakage current of transistor M2 can be made very low. This allows the written data to be retained for a long time by transistor M2. This allows for a reduction in the frequency of memory cell refreshes. Furthermore, it eliminates the need for memory cell refresh operations. Also, the leakage current is very low. Because the temperature is low, the memory cell 1474 can store multi-level data or analog data. The same applies to memory cells 1475 to 1477.

[0405] Note that transistor M3 is a transistor having silicon in the channel formation region (hereinafter (Sometimes called Si transistors) The conductivity type of Si transistor is It may be an n-channel type or a p-channel type. Si transistors are OS transistors In some cases, the field-effect mobility is higher than that of a transistor. Therefore, readout transistor A Si transistor may be used as transistor M3, which functions as a transistor. By using a Si transistor for transistor M3, a transistor can be stacked on top of transistor M3. Since a converter M2 can be provided, the occupied area of ​​the memory cell is reduced, and the storage device is high It is possible to integrate the resources.

[0406] Also, transistor M3 may be an OS transistor. Transistors M2, M3 When OS transistors are used, the memory cell array 1470 uses only n-type transistors. It can be used to construct a circuit.

[0407] Furthermore, Figure 23(H) shows an example of a gain cell type memory cell with 3 transistors and 1 capacitance element. As shown in Figure 23(H), the memory cell 1478 consists of transistors M4 to M6, and It has a capacitance element CC. Capacitance elements CC are provided as appropriate. Memory cell 1478 is connected to wiring BI Electrically connected to L, RWL, WWL, BGL, and GNDL. Wiring GNDL This is a wiring that provides a low-level potential. Furthermore, memory cell 1478 is replaced with wiring BIL. The wiring may also be electrically connected to RBL and WBL.

[0408] Transistor M4 is an OS transistor with a back gate, and the back gate is It is electrically connected to wiring BGL. Note that the back gate and gate of transistor M4 They may be electrically connected to each other. Alternatively, transistor M4 may have a back gate. It's not necessary.

[0409] Note that transistors M5 and M6 are either n-channel Si transistors or p-channel Si transistors, respectively. A channel-type Si transistor is also acceptable. Alternatively, transistors M4 to M6 can be OS transistors. It can also be a stapler; in this case, the memory cell array 1470 is rotated using only n-type transistors. A path can be constructed.

[0410] When the semiconductor device shown in the above embodiment is used as the memory cell 1478, transistor M Transistor 200 is used as transistor 4, and transistors M5 and M6 are transistor 300. Using this, the capacitive element 100 can be used as the capacitive element CC. Transistor M4 and By using an OS transistor, the leakage current of transistor M4 is reduced to a very low level. It can be done.

[0411] Note that the peripheral circuit 1411 and memory cell array 1470 shown in this embodiment, etc. The configuration is not limited to those described above. These circuits, and the connections to them The arrangement or function of lines, circuit elements, etc., may be changed, deleted, or added as needed. stomach.

[0412] The configuration shown in this embodiment can be used in appropriate combination with the configurations shown in other embodiments. It is possible.

[0413] (Embodiment 4) In this embodiment, using Figure 24, the semiconductor device of the present invention is mounted on a chip 1200. Here is an example. Chip 1200 has multiple circuits (systems) mounted on it. Uni, the technology of integrating multiple circuits (systems) onto a single chip is called system-on-chip ( It is sometimes referred to as a System on Chip (SoC).

[0414] As shown in Figure 24(A), the chip 1200 is a CPU (Central Processor). ssing Unit) 1211, GPU (Graphics Processing Unit) 1212, one or more analog processing units 1213, one or more memory units Controller 1214, one or more interfaces 1215, one or more networks It has a work circuit 1216, etc.

[0415] The chip 1200 is provided with bumps (not shown), as shown in Figure 24(B), The first part of Printed Circuit Board (PCB) 1201 It connects to the surface. Also, on the back surface of the first surface of PCB1201, there are multiple bumps 1202. It is provided and connects to the motherboard 1203.

[0416] Motherboard 1203 includes memory devices such as DRAM 1221 and flash memory 1222. A place may be provided. For example, the DOSR shown in the previous embodiment may be placed in the DRAM1221. AM can be used. Also, for example, in the flash memory 1222, the above embodiment The NOSRAM shown can be used.

[0417] CPU1211 preferably has multiple CPU cores. Also, GPU1212 It is preferable that it has multiple GPU cores. Also, CPU1211 and GPU1 Each of 212 may have memory to temporarily store data. Or, CP The memory common to both U1211 and GPU1212 is provided on chip 1200. Alternatively, the aforementioned NOSRAM or DOSRAM can be used for this memory. Furthermore, the GPU1212 is suitable for parallel computation of large amounts of data, and is ideal for image processing and multiply-accumulate operations. It can be used. The GPU1212 can be used with an image processing circuit using the oxide semiconductor of the present invention. By providing a multiply-accumulate circuit, image processing and multiply-accumulate operations can be performed with low power consumption. This will become possible.

[0418] Furthermore, because the CPU1211 and GPU1212 are located on the same chip, The wiring between CPU1211 and GPU1212 can be shortened, and CPU1211 or Data transfer to GPU1212, and notes held by CPU1211 and GPU1212. Data transfer between the two systems, and after calculations on GPU1212, data transfer from GPU1212 to CPU12 The transfer of calculation results to 11 can be done at high speed.

[0419] The analog processing unit 1213 includes an A / D (analog / digital) conversion circuit and a D / A (digital / digital) conversion circuit. It has one or both of the digital / analog conversion circuits. Also, analog arithmetic unit 1213 The above-mentioned sum-of-accumulate circuit may be provided.

[0420] The memory controller 1214 is a circuit that functions as a controller for the DRAM 1221. It also has a circuit that functions as an interface for the flash memory 1222.

[0421] Interface 1215 is for display devices, speakers, microphones, cameras, and controllers. It has an interface circuit for connecting to external devices such as a torpedo. A controller is a motor This includes mice, keyboards, game controllers, etc. USB (Universal Serial Bus), HDMI (registered trademark) (H (using igh-Definition Multimedia Interface, etc.) It is possible to be there.

[0422] The network circuit 1216 is a LAN (Local Area Network), etc. It has a network circuit. It may also have a circuit for network security. stomach.

[0423] The above circuit (system) can be formed on chip 1200 using the same manufacturing process. It is possible. Therefore, even if the number of circuits required for chip 1200 increases, the manufacturing process does not need to be increased. This eliminates the need for additional processing, allowing for the low-cost manufacturing of the Chip 1200.

[0424] PCB1201 equipped with chip 1200 having GPU1212, DRAM122 1, and the motherboard 1203 equipped with flash memory 1222, GPU module It can be called Lure 1204.

[0425] The GPU module 1204 has a chip 1200 that uses SoC technology, Its size can be reduced. Also, because it excels at image processing, smart Phones, tablet devices, laptop PCs, portable (take-out) game consoles, etc. It is suitable for use in portable electronic devices. Also, a multiply-accumulate circuit using the GPU1212. This leads to the development of deep neural networks (DNNs) and convolutional neural networks. (CNN), Recurrent Neural Network (RNN), Autoencoder, Deep Boltzmann It can perform calculations such as those for machine learning (DBM) and deep belief networks (DBN). Therefore, the chip 1200 is the AI ​​chip, or the GPU module 1204 is the AI ​​system module. It can be used as a joule.

[0426] The configuration shown in this embodiment may be used in appropriate combination with the configurations shown in other embodiments. It is possible.

[0427] (Embodiment 5) In this embodiment, regarding the application example of a memory device using the semiconductor device shown in the previous embodiment, Let me explain. The semiconductor device shown in the above embodiment is, for example, used in various electronic devices (for example, information Terminals, computers, smartphones, e-readers, digital cameras (including video cameras) This can be applied to storage devices (including recording and playback devices, navigation systems, etc.). Secondly, computers include tablet computers, notebook computers, and This includes not only desktop computers but also large computers such as server systems. Alternatively, the semiconductor device shown in the previous embodiment may be a memory card (for example, S Various types of removable media such as D cards, USB memory sticks, and SSDs (Solid State Drives) This applies to bubble storage devices. Figure 25 schematically shows several configuration examples of removable storage devices. As shown above, for example, the semiconductor device shown in the above embodiment is a packaged memory chip It is processed into plastic and used in various storage devices and removable memory.

[0428] Figure 25(A) is a schematic diagram of a USB memory device. The USB memory device 1100 is housed in a casing 1101 It has a cap 1102, a USB connector 1103, and a circuit board 1104. Circuit board 110 4 is housed in the casing 1101. For example, the circuit board 1104 contains the memory chip 110 5. Controller chip 1106 is installed. Memory chip 1 on board 1104 The semiconductor device shown in the above embodiment can be incorporated into 105, etc.

[0429] Figure 25(B) is a schematic diagram of the external appearance of an SD card, and Figure 25(C) shows the internal structure of an SD card. This is a schematic diagram of the structure. The SD card 1110 consists of a housing 1111, a connector 1112 and a base It has a board 1113. The circuit board 1113 is housed in the housing 1111. For example, circuit board 11 The memory chip 1114 and the controller chip 1115 are mounted on component 13. By also providing a memory chip 1114 on the back side of the circuit board 1113, the SD card 1110 The capacity can be increased. Also, a wireless chip with wireless communication capabilities is provided on the circuit board 1113. This may be done. This allows wireless communication between the host device and the SD card 1110 to be performed. Data can be read from and written to the Mori chip 1114. (Memory on board 1113) The semiconductor device shown in the above embodiment can be incorporated into chip 1114 or the like.

[0430] Figure 25(D) is a schematic diagram of the external appearance of an SSD, and Figure 25(E) is a schematic diagram of the internal structure of an SSD. This is a diagram of the equation. The SSD1150 consists of a housing 1151, a connector 1152, and a circuit board 1153. It has. The circuit board 1153 is housed in the casing 1151. For example, the circuit board 1153 has The memory chip 1154, memory chip 1155, and controller chip 1156 are installed. The memory chip 1155 is the work memory of the controller chip 1156. For example, a DOSRAM chip can be used. There is also a memory chip 11 on the back side of the circuit board 1153. By adding 54, the capacity of SSD1150 can be increased. (Note on board 1153) The semiconductor device shown in the above embodiment can be incorporated into a rechip 1154 or the like.

[0431] This embodiment may be implemented in appropriate combination with the configurations described in other embodiments. This is possible.

[0432] (Embodiment 6) A semiconductor device according to one aspect of the present invention includes a processor such as a CPU or GPU, or a chip. It can be used for this purpose. Figure 26 shows a processor such as a CPU or GPU according to one aspect of the present invention. The following are specific examples of electronic devices equipped with a chip.

[0433] <Electronic Equipment and Systems> A GPU or chip according to one aspect of the present invention can be mounted in various electronic devices. Examples of electronic devices include, for instance, television equipment, desktop or notebook computers. Personal computers, computer monitors, digital signage (Digi Digital signage (electronic billboards), large game machines such as pachinko machines, and other relatively large devices. In addition to electronic devices with screens, digital cameras, digital video cameras, and digital photo Examples include frames, mobile phones, portable game consoles, personal digital assistants, and audio playback devices. Furthermore, by providing an integrated circuit or chip according to one aspect of the present invention in an electronic device, Artificial intelligence can be incorporated into electronic devices.

[0434] An electronic device according to one aspect of the present invention may have an antenna. The antenna receives a signal. This allows the display unit to show images, information, etc. Also, the electronic device acts as an antenna. Furthermore, if a secondary battery is present, the antenna may be used for contactless power transmission.

[0435] An electronic device according to one aspect of the present invention includes a sensor (force, displacement, position, velocity, acceleration, angular velocity, rotation). Number, distance, light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, electric current, voltage, power (including functions for measuring radiation, flow rate, humidity, gradient, vibration, odor, or infrared radiation) It is acceptable to have it.

[0436] An electronic device according to one aspect of the present invention can have various functions. For example, various information Functions to display (still images, videos, text images, etc.) on the display unit, touch panel function, calendar Functions to display the date or time, and to run various software (programs). Functions include: wireless communication, and reading programs or data recorded on a recording medium. It can have functions, etc. Figure 26 shows an example of an electronic device.

[0437] [mobile phone] Figure 26(A) illustrates a mobile phone (smartphone), which is a type of information terminal. The information terminal 5500 has a housing 5510 and a display unit 5511, and inputs As an interface, a touch panel is provided on the display unit 5511, and buttons are located on the housing 551 It is set up for 0.

[0438] The information terminal 5500 utilizes artificial intelligence by applying a chip according to one embodiment of the present invention. The application can be run. As an application utilizing artificial intelligence. For example, an application that recognizes a conversation and displays the content of that conversation on the display unit 5511. The display unit 5511 recognizes characters, shapes, etc., entered by the user on the touch panel. The application to be displayed on the display unit 5511, and the biometric authentication such as fingerprints and voiceprints. Applications are one example.

[0439] [Information Terminal 1] Figure 26(B) shows a desktop information terminal 5300. The 5300 type information terminal consists of the main unit 5301, the display 5302, and a keyboard. It has 5303.

[0440] The desktop information terminal 5300, like the information terminal 5500 described above, is based on the first part of the present invention. By applying a chip of this type, it is possible to run applications that utilize artificial intelligence. Yes, it is possible. Examples of applications that utilize artificial intelligence include design support software. Examples include document editing software and automatic menu generation software. By using the 5300 top-type information terminal, it is possible to develop new artificial intelligence.

[0441] In the above, smartphones and desktop information terminals were used as examples of electronic devices. As shown in Figures 26(A) and (B), these are smartphones and desktops, respectively. Information terminals other than dedicated information terminals can be used. This includes smartphones and desktop computers. Other information terminals besides those used for general information are, for example, PDAs (Personal Digital Devices). Examples include (i) Assistants, notebook computers, and workstations.

[0442] [electric appliances] Figure 26(C) shows an example of an electrical appliance, the electric refrigerator-freezer 5800. The 5800 freezer includes a casing 5801, a door for the refrigerator compartment 5802, a door for the freezer compartment 5803, etc. ru.

[0443] By applying a chip according to one aspect of the present invention to an electric refrigerator 5800, artificial intelligence An electric refrigerator-freezer 5800 with the following features can be realized. By utilizing artificial intelligence... The electric refrigerator-freezer 5800 is used to store food items, and the food It has a function that automatically generates menus based on the expiration dates of ingredients, and the menus are stored in the 5800 electric refrigerator / freezer. It can have features such as automatically adjusting the temperature to suit the ingredients being used.

[0444] In this example, we have described electric refrigerators and freezers as electrical appliances, but other electrical appliances and For example, vacuum cleaners, microwave ovens, electric ovens, rice cookers, water heaters, induction cooktops , water dispensers, heating and cooling appliances including air conditioners, washing machines, dryers, etc. Examples include audiovisual equipment.

[0445] [Game console] Figure 26(D) shows the portable game console 5200, which is an example of a game console. The machine 5200 includes a housing 5201, a display unit 5202, buttons 5203, etc.

[0446] By applying a GPU or chip according to one aspect of the present invention to a portable game console 5200, This makes it possible to create a low-power portable game console, the 5200. Furthermore, due to its low power consumption, Because it can reduce heat generation from the circuit, the heat generated by the circuit itself, the surrounding circuits, and This can minimize the impact on the module.

[0447] Furthermore, by applying a GPU or chip according to one aspect of the present invention to the portable game console 5200... This makes it possible to realize the 5200, a portable game console equipped with artificial intelligence.

[0448] Originally, the progression of the game, the behavior of creatures appearing in the game, and the phenomena that occur in the game, etc. The expression is determined by the program of the game, but the handheld game console 520 By applying artificial intelligence to 0, it becomes possible to create expressions that are not limited to game programs. For example, the questions the player asks, the game's progress, the time, and the characters that appear in the game. This allows for expressions that describe a change in a person's words and actions.

[0449] Furthermore, when playing games that require multiple players on the 5200 handheld game console, artificial intelligence is used. This allows for the creation of anthropomorphic game players, thus enabling the opponent to be represented by artificial intelligence. By making it a night game, it's possible to play the game even by yourself.

[0450] Figure 26(D) shows a portable game console as an example of a game console, but one aspect of the present invention is Game consoles to which the GPU or chip of this embodiment is applied are not limited thereto. Examples of game machines to which the PU or chip is applied include home consoles and entertainment machines. Arcade game machines installed in entertainment facilities (game centers, amusement parks, etc.), sports facilities Examples include pitching machines installed for batting practice.

[0451] [Mobile] A GPU or chip according to one aspect of the present invention is used in a mobile vehicle and the area around the driver's seat of the vehicle. It can be applied to this.

[0452] Figure 26(E1) shows an example of a mobile vehicle, automobile 5700, and Figure 26(E2) shows an automatic This diagram shows the area around the windshield inside a car. In Figure 26(E2), the dashboard... Display panels 5701, 5702, and 5703 attached to the cord Additionally, a display panel 5704 mounted on the pillar is illustrated.

[0453] Display panels 5701 to 5703 display the speedometer, tachometer, and It provides various information by displaying mileage, fuel gauge, gear status, air conditioning settings, etc. It is possible to do so. Furthermore, the display items and layout shown on the display panel can be customized by the user. It can be modified as needed to suit your preferences, and the design can be enhanced. The panel 5701 to the display panel 5703 can also be used as a lighting device.

[0454] Display panel 5704 displays images from an imaging device (not shown) installed in the automobile 5700. By displaying this image, it is possible to compensate for the blind spots (views obstructed by the pillars). In other words, by displaying an image from an imaging device installed on the outside of the automobile 5700 This can compensate for blind spots and enhance safety. Furthermore, it provides video to fill in the gaps in what is not visible. By displaying the image, safety checks can be performed more naturally and without any sense of unease. (Display panel 57) Unit 04 can also be used as a lighting device.

[0455] A GPU or chip according to one aspect of the present invention can be applied as a component of artificial intelligence, for example If so, the chip can be used in the autonomous driving system of the automobile 5700. The chip can be used in systems for road guidance, hazard prediction, and other purposes. (Display panel 57) Panels 01 through 5704 are configured to display information such as road guidance and hazard predictions. That's good too.

[0456] In the above, an automobile was described as an example of a moving object, but the moving object is an automobile. It is not limited to these. For example, examples of moving objects include trains, monorails, ships, and aircraft (helicopters). Other examples include unmanned aerial vehicles (drones), airplanes, and rockets, and these can be moved Applying a chip according to one aspect of the present invention to a moving object to provide it with a system utilizing artificial intelligence. It is possible.

[0457] [Broadcasting System] A GPU or chip according to one aspect of the present invention can be applied to a broadcasting system.

[0458] Figure 26(F) schematically illustrates data transmission in a broadcasting system. Specifically, Figure 26(F) shows that radio waves (broadcast signals) transmitted from broadcasting station 5680 are being received by televisions in each household. This shows the path to the John receiving device (TV) 5600. TV5600 is the receiving device. The receiving device (not shown) receives the broadcast signal received by antenna 5650. It is transmitted to TV5600 via [this method].

[0459] In Figure 26(F), antenna 5650 is UHF (Ultra High Frequency). The diagram shows an antenna, but the antenna 5650 is for BS / 110°CS Antennas, including CS antennas, can also be used.

[0460] Radio waves 5675A and 5675B are broadcast signals for terrestrial broadcasting, and radio tower 5670 is The received radio wave 5675A is amplified and used to transmit radio wave 5675B. In each household, the antenna By receiving radio wave 5675B with the NA5650, you can watch terrestrial TV broadcasts with the TV5600. It is possible. Furthermore, the broadcasting system is not limited to terrestrial broadcasting as shown in Figure 26(F). This could also include satellite broadcasting using artificial satellites, or data broadcasting via fiber optic lines.

[0461] The broadcasting system described above applies a chip according to one aspect of the present invention and utilizes artificial intelligence for broadcasting. It can also be used as a transmission system. Broadcast data is transmitted from broadcast station 5680 to TVs 5600 in each home. At that time, the encoder compresses the broadcast data, and the antenna 5650 receives the broadcast When data is received, the decoder of the receiving device included in the TV5600 processes the broadcast data Data recovery is performed. By using artificial intelligence, for example, the compression method of the encoder is restored. In motion compensation prediction, which is one aspect of the law, the recognition of display patterns contained in the displayed image. It can do this. It can also perform in-frame predictions using artificial intelligence. Also, for example... For example, receiving low-resolution broadcast data and using the high-resolution TV5600 to view the same broadcast data When displaying the data, the decoder performs upconversion and other processes during the restoration of the broadcast data. It can perform image interpolation.

[0462] The broadcasting system using artificial intelligence described above is designed to handle the increasing volume of broadcast data in ultra-high-definition television. It is suitable for revision (UHDTV: 4K, 8K) broadcasting.

[0463] Furthermore, as an application of artificial intelligence on the TV5600 side, for example, the TV5600 can be equipped with artificial intelligence A recording device having the capability may be provided. By having such a configuration, the recording device By having artificial intelligence learn the user's preferences, the system automatically records programs that match the user's taste. It can be drawn.

[0464] The electronic device described in this embodiment, its functions, examples of artificial intelligence applications, and their effects. These can be combined as appropriate with descriptions of other electronic devices.

[0465] This embodiment may be implemented in appropriate combination with the configurations described in other embodiments. This is possible. [Explanation of Symbols]

[0466] 200: Transistor, 205: Conductor, 210: Insulator, 212: Insulator, 214: Insulator Edge material, 216: insulator, 218: conductor, 222: insulator, 224: insulator, 230: acid compound, 230a: oxide, 230A: oxide film, 230b: oxide, 230B: oxide film, 2 30c: oxide, 230c1: oxide, 230c2: oxide, 230C: oxide film, 231 :Area, 231a:Area, 231b:Area, 232:Area, 232a:Area, 232b: region, 234: region, 240: conductor, 240a: conductor, 240b: conductor, 241: Insulator, 241a: Insulator, 241b: Insulator, 244: Insulator, 250: Insulator, 25 0A: insulating film, 252: layer, 252a: layer, 252b: layer, 253: layer, 253a: layer, 253b: layer, 254: insulator, 256: insulator, 256a: insulator, 256A: insulating film , 256b: insulator, 257: dopant, 258: dopant, 260: conductor, 26 0a: Conductor, 260Aa: Conductive film, 260Ab: Conductive film, 260b: Conductor, 262: Dummy gate, 262A: Dummy gate, 262B: Dummy gate, 263: Opening, 26 6: Insulator, 266A: Insulator, 266B: Insulator, 267: Dummy film, 267A: Dummy - Film, 274: Insulator, 274a: Insulator, 274b: Insulator, 280: Insulator, 280 A: insulating film, 281: insulator

Claims

[Claim 1] The first oxide and, The second oxide on the first oxide, The third oxide on the second oxide, The first insulator on the third oxide, The conductor on the first insulator, A second insulator in contact with a portion of the upper surface of the second oxide, a portion of the side surface of the second oxide, and a portion of the side surface of the third oxide, The third insulator on the second insulator, The material comprises the upper surface of the third oxide, the upper surface of the first insulator, the upper surface of the conductor, and a fourth insulator in contact with the upper surface of the third insulator. The second oxide has a first region, a second region, a third region located between the first and second regions, a fourth region located between the first and third regions, and a fifth region located between the second and third regions. The resistances of the first region and the second region are lower than the resistance of the third region. The resistances of the fourth region and the fifth region are lower than the resistance of the third region, and higher than the resistances of the first region and the second region. The conductor is provided above the third region, the fourth region, and the fifth region so as to overlap with the third region, the fourth region, and the fifth region. A portion of the third oxide and a portion of the first insulator are provided between the side surface of the conductor and the side surface of the third insulator. The second insulator is a semiconductor device in contact with the first region and the second region.

Images