Oxide semiconductor film

Abstract

One of the objectives is to provide oxide semiconductor films with more stable electrical conductivity. Furthermore, by using the oxide semiconductor film, stable electrical characteristics can be imparted to semiconductor devices. One of our objectives is to provide highly reliable semiconductor devices. [Solution] The film includes a crystalline region, and the ab-plane of the crystalline region is the film surface. An oxide semiconductor film made of crystals that are roughly parallel to the surface and whose c-axis is roughly perpendicular to the film surface is electrically... It has stable conductivity and a more electrically stable structure even when exposed to visible light and ultraviolet light. It possesses. By using such oxide semiconductor films in transistors, stable electricity can be obtained. This enables the provision of highly reliable semiconductor devices with specific characteristics.

Description

[Technical Field]

[0001] This invention relates to an oxide semiconductor film and a semiconductor device using the oxide semiconductor film.

[0002] In this specification, a semiconductor device refers to a device that can function by utilizing semiconductor properties. This refers to all types of equipment, and electro-optical devices, semiconductor circuits, and electronic devices are all semiconductor equipment. [Background technology]

[0003] Transistors formed on glass substrates, as exemplified by liquid crystal displays, are amorphous. It is composed of amorphous silicon, polycrystalline silicon, etc. Amorphous silicon is used Transistors can easily accommodate large-area glass substrates. However, Transistors using morphous silicon have the disadvantage of low field-effect mobility. Also, transistors using polycrystalline silicon have high field-effect mobility, but glass substrate It has the disadvantage of not being suitable for large-area board applications.

[0004] In contrast to transistors using silicon, which have these drawbacks, oxide semiconductors are used... The technology of fabricating transistors and applying them to electronic and optical devices is attracting attention. For example, using amorphous oxides containing In, Zn, Ga, Sn, etc. as oxide semiconductors A technique for fabricating a transistor is disclosed in Patent Document 1. Furthermore, a similar transistor is also disclosed. Patent document 2 discloses a technology for fabricating and using the resulting device as a switching element for pixels in a display device. Yes, they are.

[0005] Furthermore, regarding oxide semiconductors used in such transistors, "Oxide semiconductors are impure." It is insensitive to substances, and even if the film contains a considerable amount of metal impurities, it is not a problem, and sodium "Inexpensive soda-lime glass containing large amounts of alkali metals like lium can also be used," he said. It has also been stated that (see Non-Patent Document 1). [Prior art documents] [Patent Documents]

[0006] [Patent Document 1] Japanese Patent Publication No. 2006-165529 [Patent Document 2] Japanese Patent Publication No. 2006-165528 [Non-patent literature]

[0007] [Non-Patent Document 1] Kamiya, Nomura, Hosono, "Physical Properties of Amorphous Oxide Semiconductors and Current Status of Device Development," Solid State Physics, September 2009, Vol. 44, pp. 621-633. [Overview of the Initiative] [Problems that the invention aims to solve]

[0008] However, in the process of manufacturing oxide semiconductor films and semiconductor devices using said oxide semiconductor films Furthermore, defects such as oxygen vacancies occur in oxide semiconductor films, and carrier sources... If hydrogen contamination occurs, the electrical conductivity of the oxide semiconductor film may change. Such phenomena are essential for variations in electrical characteristics in transistors using oxide semiconductor films. This can lead to a decrease in the reliability of semiconductor devices.

[0009] Such oxide semiconductor films, when irradiated with visible light or ultraviolet light, particularly exhibit electrical conductivity. The degree may change. This phenomenon also occurs in transistors using oxide semiconductor films. This can lead to fluctuations in electrical characteristics, reducing the reliability of semiconductor devices.

[0010] In light of these problems, the objective is to provide oxide semiconductor films with more stable electrical conductivity. This is one of the topics. Furthermore, by using this oxide semiconductor film, stable electricity can be supplied to semiconductor devices. One of the objectives is to provide highly reliable semiconductor devices by imparting gaseous properties. [Means for solving the problem]

[0011] One aspect of the disclosed invention includes a crystalline region, the crystalline region being a -Oxide semiconductor crystals in which the b-plane is approximately parallel to the film surface and the c-axis is approximately perpendicular to the film surface. It is a conductive film. In other words, the crystalline regions contained in the oxide semiconductor film are c-axis oriented. It is being done. Furthermore, the oxide semiconductor film in question is non-single crystal. Also, the entire oxide semiconductor film It will never be in an amorphous state.

[0012] One aspect of the disclosed invention includes a crystalline region, the crystalline region being ab It consists of crystals in which the plane is approximately parallel to the film surface and the c-axis is approximately perpendicular to the film surface, and in the c-axis direction In electron diffraction intensity measurements using an electron beam, the magnitude of the scattering vector was 3.3 nm. - 1 Above 4.1nm -1 The full width at half maximum and the magnitude of the scattering vector at the following peaks are 5.5 nm -1 Above 7.1nm -1 The full width at half maximum at the following peak is 0.2 nm. -1 That's all. It is an oxide semiconductor film.

[0013] In the above, the magnitude of the scattering vector is 3.3 nm. -1 Above 4.1nm-1 The following peak has a full width at half maximum of 0.4 nm -1 or more and 0.7 nm -1 or less, and the magnitude of the scattering vector is 5.5 nm -1 or more and 7.1 nm -1 or less. The full width at half maximum of the peak is preferably 0.45 nm -1 or more and 1.4 nm -1 or less. Also, the spin density of the peak near g = 1. 93 in the ESR measurement is preferably less than 1.3×10 18 (spins / cm 3 ). Further, the oxide semiconductor film includes a plurality of crystalline regions, and the directions of the a axis or b axis of the crystals may be different from each other. Also, it preferably has a structure represented by InGaO3(ZnO) (m is a non-natural number). m (m is a non-natural number).

[0014] Another aspect of the disclosed invention is a semiconductor device having a first insulating film, an oxide semiconductor film provided on the first insulating film and including a crystalline region, source electrodes and drain electrodes provided so as to be in contact with the oxide semiconductor film, a second insulating film provided on the oxide semiconductor film, and a gate electrode provided on the second insulating film. The crystalline region is composed of crystals in which the a-b plane is substantially parallel to the film surface and the c axis is substantially perpendicular to the film surface. Another aspect of the disclosed invention is a semiconductor device having a gate electrode, a first insulating film provided on the gate electrode, an oxide semiconductor film provided on the first insulating film and including a crystalline region, source electrodes and drain electrodes provided so as to be in contact with the oxide semiconductor film, and a second insulating film provided on the oxide semiconductor film. The crystalline region has an a-b plane that is substantially parallel to the film surface and a c axis that is substantially perpendicular to the film surface. It is a semiconductor device composed of crystals.

[0015] Another aspect of the disclosed invention is a semiconductor device having a gate electrode, a first insulating film provided on the gate electrode, an oxide semiconductor film provided on the first insulating film and including a crystalline region, source electrodes and drain electrodes provided so as to be in contact with the oxide semiconductor film, and a second insulating film provided on the oxide semiconductor film. The crystalline region has an a-b plane that is substantially parallel to the film surface and a c axis that is substantially perpendicular to the film surface. substantially parallel to the film surface This semiconductor device is made of a crystal that is roughly parallel to the surface and whose c-axis is roughly perpendicular to the film surface.

[0016] In the above, a first metal oxide film is provided between the first insulating film and the oxide semiconductor film, and the first The metal oxide film comprises gallium oxide and zinc oxide, and includes crystalline regions. In the crystalline region, the ab plane is approximately parallel to the film surface, and the c axis is approximately perpendicular to the film surface. It is preferable that the first metal oxide film is made of a certain crystal. Also, in the first metal oxide film, the zinc oxide material The amount is preferably less than 25% of the amount of gallium oxide. Also, the oxide semiconductor film and The second insulating film has a second metal oxide film between the second insulating films, and the second metal oxide film is made of gallium oxide and It contains zinc oxide and includes a crystalline region, the crystalline region having an ab plane It is preferable that the crystals be approximately parallel to the film surface and have a c-axis approximately perpendicular to the film surface. Furthermore, in the second metal oxide film, the amount of zinc oxide is 25% of the amount of gallium oxide. It is preferable that it be less than [a certain value].

[0017] In this specification, etc., "plane A is approximately parallel to plane B" means that the normals of plane A and plane B form a line. This refers to a state where the angle is between 0° and 20°. Furthermore, in this specification, etc., if line C is "Approximately perpendicular to plane B" refers to a state where the angle between line C and the normal to plane B is between 0° and 20°. Let's assume that. [Effects of the Invention]

[0018] The film includes a crystalline region, in which the ab plane is approximately parallel to the film surface. Therefore, oxide semiconductor films in which the c-axis is approximately perpendicular to the film surface have stable electrical conductivity. It has a more electrically stable structure even when exposed to visible light and ultraviolet light. By using a solid semiconductor film in a transistor, stable electrical characteristics and reliability are achieved. We can provide high-performance semiconductor devices. [Brief explanation of the drawing]

[0019] [Figure 1] Cross-sectional TEM image according to one aspect of the present invention. [Figure 2] A plan view and a cross-sectional view of a crystal structure according to one aspect of the present invention. [Figure 3] A figure showing the results of the electronic density of states calculation. [Figure 4] Band diagram of an amorphous oxide semiconductor with oxygen vacancies. [Figure 5] A recombination model for amorphous oxide semiconductors with oxygen vacancies. [Figure 6] A cross-sectional view illustrating the manufacturing process of a semiconductor device according to one aspect of the present invention. [Figure 7] This is a schematic diagram illustrating a sputtering apparatus. [Figure 8] This is a schematic diagram illustrating the crystal structure of a seed crystal. [Figure 9] A cross-sectional view illustrating the manufacturing process of a semiconductor device according to one aspect of the present invention. [Figure 10] A cross-sectional view illustrating a semiconductor device according to one aspect of the present invention. [Figure 11] A cross-sectional view illustrating a semiconductor device according to one aspect of the present invention. [Figure 12] A diagram illustrating the band structure of a semiconductor device according to one aspect of the present invention. [Figure 13] Cross-sectional TEM image according to one embodiment of the present invention. [Figure 14] A planar TEM image according to one embodiment of the present invention. [Figure 15] An electron diffraction pattern according to one embodiment of the present invention. [Figure 16] Planar TEM image and electron diffraction pattern according to one embodiment of the present invention. [Figure 17] A graph of electron diffraction intensity according to one embodiment of the present invention. [Figure 18] A graph of the full width at half maximum of the first peak of electron diffraction intensity according to one embodiment of the present invention. [Figure 19] A graph of the full width at half maximum of the second peak of electron diffraction intensity according to one embodiment of the present invention. [Figure 20] XRD spectrum according to one embodiment of the present invention. [Figure 21] XRD spectrum according to one embodiment of the present invention. [Figure 22] A graph showing the results of an ESR measurement according to one embodiment of the present invention. [Figure 23] A model of oxygen vacancies used in quantum chemical calculations according to one embodiment of the present invention. [Figure 24] A graph showing the results of low-temperature PL measurement according to one embodiment of the present invention. [Figure 25] A graph showing the results of a photo-negative bias degradation measurement according to one embodiment of the present invention. [Figure 26] A graph of the photocurrent in a photoresponse defect evaluation method according to one embodiment of the present invention. [Figure 27] Results of TDS analysis according to one embodiment of the present invention. [Figure 28] Results of SIMS analysis according to one embodiment of the present invention. [Figure 29] A block diagram and an equivalent circuit diagram showing one aspect of the present invention. [Figure 30] An external view of an electronic device showing one aspect of the present invention. [Figure 31] Cross-sectional TEM image according to one aspect of the present invention. [Modes for carrying out the invention]

[0020] Embodiments and examples of the present invention will be described in detail with reference to the drawings. However, the present invention The present invention is not limited to the following description, and its form and scope may not depart from the spirit and scope of the present invention. Those skilled in the art will readily understand that the details can be modified in various ways. Therefore, the present invention is The descriptions of the embodiments and examples shown below are not to be interpreted as being limited to those provided. In the configuration of the present invention described below, identical parts or parts having similar functions are identical The same symbols are used across different drawings, and explanations of their repetition are omitted.

[0021] In each figure described herein, the size, layer thickness, or area of ​​each component is as follows: It may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale. stomach.

[0022] Furthermore, the terms "first," "second," "third," etc. used in this specification are used to avoid confusion of constituent elements. This is a selection and not a numerical limit. Therefore, for example, "the first" This can be explained by substituting "the second" or "the third" as appropriate.

[0023] (Embodiment 1) In this embodiment, as one aspect of the present invention, an oxide semiconductor film is shown in Figures 1 to 1. I will explain using number 5.

[0024] The oxide semiconductor film according to this embodiment includes a crystalline region. The region is formed from a crystal in which the ab plane is approximately parallel to the film surface and the c axis is approximately perpendicular to the film surface. Therefore, the crystalline regions contained in the oxide semiconductor film are c-axis oriented. When the cross-section of the crystalline region is observed, the atoms arranged in layers are directed from the substrate toward the surface. It is a layered structure, and the c-axis of the crystal is roughly perpendicular to the surface. Since it includes a region having crystalline properties with the c axis oriented, the oxide semiconductor film is called C Axis Aligned Crystalline Oxide Semiconductor Also called CAAC-OS membrane.

[0025] Here, we show a cross-sectional TEM image of an oxide semiconductor film containing a crystalline region that was actually fabricated. This is shown in Figure 1. As indicated by the arrows in Figure 1, the atoms are oriented in layers, that is, the c-axis is oriented. A region 21 possessing crystalline properties is clearly observed in the oxide semiconductor film.

[0026] Similarly, a region 22 having crystalline properties was observed in the oxide semiconductor film, and it possesses crystalline properties. Region 21 and the crystalline region 22 are three-dimensionally surrounded by the region having an amorphous structure. Thus, although there are multiple crystalline regions in the oxide semiconductor film, No grain boundaries are observed in Figure 1, and no grain boundaries are observed throughout the entire oxide semiconductor film. I couldn't do it.

[0027] Furthermore, in Figure 1, the crystalline region 21 and the crystalline region 22 have an amorphous structure. Although separated by a region, crystalline region 21 and crystalline region 2 The atoms in the layered structure appear to be stacked at roughly equal intervals, and the region of the amorphous structure It appears to form continuous layers that extend beyond a given region.

[0028] Furthermore, in Figure 1, the size of the crystalline region 21 and the crystalline region 22 is 3 The crystalline structure formed in the oxide semiconductor film shown in this embodiment is approximately nm to 7 nm. The size of the region having this can be approximately 1 nm to 1000 nm. As shown in Figure 31, the crystalline region of the oxide semiconductor film is made to be several tens of nanometers or more. It's also possible.

[0029] Furthermore, when the crystalline region is observed from a direction perpendicular to the film surface, a hexagonal lattice pattern is observed. It is preferable that the atoms are arranged in such a structure. By adopting such a structure, the crystal The region possessing this property can easily adopt a hexagonal crystal structure with triple symmetry. In the specification, the hexagonal crystal structure is defined as belonging to the hexacrystalline system (Crystal family). This refers to crystal systems, including the trigonal and hexagonal crystal systems of the heptagonal crystal system.

[0030] Furthermore, even if the oxide semiconductor film according to this embodiment includes multiple crystalline regions Often, within individual crystalline regions, the directions of the a-axis or b-axis of the crystal are different from each other. It is also acceptable. That is, the oxide semiconductor film according to this embodiment has individual crystallinity. In the region, crystallization occurs along the c-axis, but not necessarily along the ab-plane. No. However, ensure that regions with different a-axis or b-axis directions do not touch each other. Therefore, it is preferable to avoid forming grain boundaries at the interface where the regions meet. an oxide semiconductor film having an amorphous structure region that three-dimensionally surrounds a crystalline region. It is preferable that the oxide semiconductor film containing the region having the crystalline properties is non-single-layered. It is crystalline, and the entire film is not in an amorphous state.

[0031] The oxide semiconductor film contains an In-Sn-Ga-Zn-O metal oxide, which is a quaternary metal oxide. Oxides, and ternary metal oxides such as In-Ga-Zn-O metal oxides and In-Sn-Z nO-based metal oxides, In-Al-Zn-O-based metal oxides, Sn-Ga-Zn-O-based metals Oxides, Al-Ga-Zn-O metal oxides, Sn-Al-Zn-O metal oxides, and two In-Zn-O metal oxides and Sn-Zn-O metal oxides are examples of the original metal oxides. It is used.

[0032] Among them, In-Ga-Zn-O metal oxides have an energy gap of 2 eV or more, More preferably, a wide energy gap of 2.5 eV or more, and more preferably 3 eV or more. Often, when transistors are made using these materials, the resistance in the off state is sufficiently high. It is possible to reduce the current to a sufficiently small amount. Crystals in In-Ga-Zn-O metal oxides The regions exhibiting this property often adopt crystal structures that are not primarily hexagonal wurtzite-type, for example. It can take on structures such as YbFe2O4 type, Yb2Fe3O7 type, and modified forms thereof. M. Nakamura, N. Kimizuka, and T. Mohri , “The Phase Relations in the In2O3-Ga2Zn "O4-ZnO System at 1350℃", J. Solid State C (hem., 1991, Vol.93, pp.298-315). Note: YbFe2O4 type The structure is ABB|ABB|ABB, where Yb is the Yb-containing layer and Fe is the Fe-containing layer. It has a repeating structure of |, and its variant structure is, for example, a repeating ABBB|ABBB|. A return structure can be cited. Also, the Yb2Fe3O7 type structure is ABB|AB|AB It has a repeating structure B|AB|, and a variation of this structure is, for example, ABBB|ABB| We can give a repeating structure of ABBB|ABB|ABBB|ABB|. When the amount of ZnO in the metal oxide is high, it may adopt a wurtzite-type crystal structure.

[0033] A typical example of an In-Ga-Zn-O metal oxide is InGaO3(ZnO). m (m Some are denoted as >0). Here, as an example of an In-Ga-Zn-O metal oxide, For example, gold with a composition ratio of In2O3:Ga2O3:ZnO=1:1:1 [molar ratio] It is a group oxide with a composition ratio of In2O3:Ga2O3:ZnO = 1:1:2 [molar ratio]. The metal oxide has a composition ratio of In2O3:Ga2O3:ZnO = 1:1:4 [molar ratio]. Examples of metal oxides that possess this property can be listed. Here, it is more preferable that m is a non-natural number. The above composition is derived from the crystal structure and is merely one example. The following is added: For example, as an In-Ga-Zn-O metal oxide, In2O3:Ga2 Metal oxides with a composition ratio of O3:ZnO=2:1:8 [molar ratio], In2O3:G A metal oxide having a composition ratio of a2O3:ZnO=3:1:4 [molar ratio], or In A metal oxide having a composition ratio of 2O3:Ga2O3:ZnO = 2:1:6 [molar ratio] You may use it.

[0034] An example of the structure of a crystalline region contained in an oxide semiconductor film, having the structure described above. The crystal structure of In2Ga2ZnO7 is shown in Figure 2. The crystal structure of 7 is shown using a plan view parallel to the a-axis and b-axis, and a cross-sectional view parallel to the c-axis. Furthermore, the c-axis is perpendicular to the a-axis and b-axis, and the angle between the a-axis and b-axis is 120°. (Figure) In the In2Ga2ZnO7 shown in 2, the plan view shows the sites 11 that the In atoms can occupy, and the cross-section The figure shows 12 In atoms, 13 Ga atoms, 14 Ga or Zn atoms, and 15 O atoms.

[0035] As shown in the cross-sectional view in Figure 2, In2Ga2ZnO7 is a single layer between the In oxide layers. The Ga oxide layer and the In oxide layer are two oxide layers located between them, the Ga oxide layer and the Zn oxide layer. The structure consists of layers containing one of each element, stacked alternately in the c-axis direction. As shown in Plan View 2, In2Ga2ZnO7 has a hexagonal crystal structure with triple symmetry. .

[0036] The oxide semiconductor film shown in this embodiment, which includes a crystalline region, has a certain level of crystallinity. It is preferable that the region exhibits the crystalline properties of the oxide semiconductor film. This is different from a single crystal. Thus, an oxide semiconductor film containing crystalline regions is, overall Because it has good crystallinity compared to an amorphous oxide semiconductor film, it is characterized by oxygen vacancies. Defects such as those that cause dangling bonds, and impurities such as hydrogen that bind to dangling bonds, have been reduced. In particular, oxygen bonded to metal atoms in crystals is different from oxygen bonded to metal atoms in amorphous materials. Compared to the element, the bonding strength is higher and the reactivity with impurities such as hydrogen is lower, thus eliminating defects. Generation is reduced.

[0037] For example, an oxide composed of an In-Ga-Zn-O system, including a crystalline region. In the measurement of electron diffraction intensity when an electron beam is irradiated from the c-axis direction, the scattering vector of the semiconductor film The size of the sphere is 3.3 nm -1 Above 4.1nm -1 The full width at half maximum and scattering at the following peaks. The magnitude of the vector is 5.5 nm -1 Above 7.1nm -1 The full width at half maximum at the following peaks is 0.2nm -1 It exhibits crystallinity as described above. Preferably, the magnitude of the scattering vector 3.3nm -1 Above 4.1nm -1 The full width at half maximum at the following peak is 0.4 nm.-1 Below Upper 0.7nm -1 The following applies, and the magnitude of the scattering vector is 5.5 nm. -1 Above 7.1nm - 1 The full width at half maximum at the following peak is 0.45 nm. -1 Above 1.4nm -1 The following applies: It exhibits crystallinity.

[0038] As described above, the oxide semiconductor film including a crystalline region shown in this embodiment is acid It is preferable that defects in the film, such as elementary defects, are reduced. Such defects act as carrier sources in oxide semiconductor films, therefore the oxide This can cause fluctuations in the electrical conductivity of semiconductor films. Therefore, these are reduced, Oxide semiconductor films containing crystalline regions have stable electrical conductivity and are resistant to visible light and ultraviolet light. It has a more electrically stable structure even when subjected to irradiation such as these.

[0039] Furthermore, the ESR (Electron Spinning Rate) of an oxide semiconductor film containing a crystalline region is... By performing n Resonance (N) measurements, the amount of lone electrons in the film can be measured. This allows us to estimate the amount of oxygen vacancies. For example, In-Ga-Zn -Oxide semiconductor films containing crystalline regions made of O-based metal oxides are suitable for ESR measurements. The spin density of the peak near g=1.93 is 1.3 × 10⁻⁶. 18 (spins / cm 3 ) Smaller, preferably 5 × 10 17 (spins / cm 3 ) More preferably 5× 10 16 (spins / cm 3 ), more preferably 1 × 10 16(spins / cm 3 )

[0040] As described above, hydrogen, water, hydroxyl groups, and other elements in an oxide semiconductor film containing crystalline regions. Preferably, impurities containing hydrogen, such as hydrides, are reduced, and the region has crystalline properties. The hydrogen concentration in the oxide semiconductor film containing is 1 × 10⁻¹⁰ 19 atoms / cm 3 The following This is preferable. Hydrogen, water, hydroxyl groups, or hydrides that are bonded to dangling bonds, etc. Because hydrogen-containing impurities function as a carrier source in oxide semiconductor films, This can cause fluctuations in the electrical conductivity of oxide semiconductor films. Furthermore, it can be a contributing factor to the inclusion of certain substances in oxide semiconductor films. The hydrogen reacts with the oxygen bonded to the metal atom to form water, and the oxygen is removed from the lattice ( Defects are formed in areas where oxygen has been removed. Therefore, these are reduced. Oxide semiconductor films containing crystalline regions have stable electrical conductivity and are visible light It also has a more electrically stable structure against irradiation such as ultraviolet light.

[0041] Furthermore, impurities such as alkali metals in oxide semiconductor films containing crystalline regions are reduced. It is preferable that it is such that, for example, in an oxide semiconductor film containing a crystalline region, Lithium concentration is 5 × 10 15 cm -3 The following is preferably 1 × 10 15 cm -3 The following, Na Thorium concentration 5 × 10 16 cm -3 The following is preferably 1 × 10 16 cm -3 The following, More preferably 1 × 10 15 cm -3 Below, the potassium concentration is 5 × 1015 cm -3 below Preferably 1 × 10 15 cm -3 The following applies:

[0042] Alkali metals and alkaline earth metals are oxide semiconductors that contain crystalline regions. These are harmful impurities, and it is better to have fewer of them. In particular, when the oxide semiconductor film in question is used in transistors... When used in this context, sodium, among the alkali metals, is an oxide semiconductor containing a crystalline region. It can diffuse into the insulating film in contact with the film and supply carriers. Furthermore, it can contain crystalline regions. Within the ionized semiconductor film, the bond between metal and oxygen is broken or interrupted. As a result, the transistor characteristics deteriorate (for example, normalization (shift of the threshold to a negative value)). This can lead to a decrease in mobility, etc. In addition, it can cause variability in characteristics.

[0043] Such problems arise, in particular, when the hydrogen concentration in an oxide semiconductor film containing crystalline regions is high. This becomes particularly noticeable when the temperature is low. Therefore, oxide semiconductors containing crystalline regions. The hydrogen concentration in the membrane is 5 × 10 19 cm -3 The following, especially 5x10 18 cm -3 The following For this mixture, it is strongly required that the alkali metal concentration be set to the above value. Therefore, crystallinity Impurities in oxide semiconductor films containing the region are extremely reduced, and the alkali metal concentration is 5× 10 16 atoms / cm 3 Below, the hydrogen concentration is 5 × 10 19 atoms / cm 3 The following and It is preferable to do so.

[0044] As described above, an oxide semiconductor film containing crystalline regions is an oxide semiconductor film with an overall amorphous structure. Because it has better crystallinity compared to monocrystalline semiconductor films, it is less prone to defects such as oxygen vacancies, The amount of impurities such as hydrogen that bind to dangling bonds has been reduced. Defects such as pits, and hydrogen atoms bonded to dangling bonds, are examples of oxide semiconductors. Because it functions like a carrier source in the conductive film, the electrical conductivity of the oxide semiconductor film is This can cause fluctuations. Therefore, it includes a crystalline region where these are reduced. Oxide semiconductor films have stable electrical conductivity and are resistant to irradiation with visible light and ultraviolet light. It has an electrically stable structure. An oxide semiconductor film containing such a crystalline region When used in transistors, it provides a highly reliable semiconductor with stable electrical characteristics. We can provide the device.

[0045] Next, how oxygen vacancies in an oxide semiconductor film affect the electrical conductivity of the said oxide semiconductor film Regarding whether it has an impact, we have considered the results using first-principles calculations based on density functional theory. I will explain this. Note that the following first-principles calculations use first-principles calculation software from Accelrys. The "CASTEP" function was used. Furthermore, the functional was GGA-PBE, and the pseudopotential was U. A soft-type design was used.

[0046] In this calculation, amorphous InGaZnO4 is used as the model for oxide semiconductor films. Then, a model was created in which one oxygen atom was removed, leaving a vacancy (oxygen defect) in that area. The calculation was performed using the following method: The number of atoms in this model is 12 for In, 12 for Ga, and 12 for Zn. The number of oxygen atoms was set to 47. For InGaZnO4 with this structure, the structural configuration regarding atomic arrangement is as follows: Optimization was performed and the density of electronic states was calculated. At this time, the cutoff energy was 300 eV. did.

[0047] Figure 3 shows the results of the electronic density of states calculation. Figure 3 shows the density of states (DOS:Densi) on the vertical axis. Let the number of states be [states / eV] and the horizontal axis be energy [eV]. The horizontal axis of the graph shows the origin of energy, which represents the Fermi energy. Figure 3 shows... As shown, the upper valence band of InGaZnO4 is -0.74 eV, and the lower conduction band is 0.56 eV. The value is eV. The band gap value is compared to the experimental value of 3.15 eV for InGaZnO4. Then, although very small, first-principles calculations based on density functional theory show that the band gap is actually It is well known that the result will be smaller than the experimental value, indicating that this calculation is inappropriate. That's not the case.

[0048] From Figure 3, amorphous InGaZnO4 with oxygen vacancies is within the band gap. It can be seen that it has deep energy levels. In other words, amorphous oxide semiconducting oxygen vacancies In the band structure of a conductor, trap levels caused by oxygen vacancies are deep within the band gap. It is presumed that this will be represented as a level.

[0049] Based on the above considerations, the band diagram of amorphous oxide semiconductors with oxygen vacancies Gram is shown in Figure 4. Figure 4 has energy on the vertical axis and DOS on the horizontal axis, and the valence band (VB From the upper energy level Ev of the Valence Band to the conduction band (CB:Cond The energy gap to the lower energy level Ec of the uction band is, Based on the test values, the value was set to 3.15 eV.

[0050] The band diagram shown in Figure 4 shows the amorphous properties of the oxide semiconductor. The tail state is represented near the lower edge of the conduction band. Furthermore, approximately 0.1 eV from the lower edge of the conduction band Shallow energy levels include dangling bonds within the amorphous oxide semiconductor, etc. This assumes a hydrogen donor level caused by the hydrogen bonded to it. And, from the lower edge of the conduction band, approximately 1 At a deep energy level of 0.8 eV, the oxygen in the amorphous oxide semiconductor described above is located. This represents the trap level caused by the defect. Note that the trap level caused by the oxygen defect is The values ​​of the energy levels will be explained in detail in the examples described later.

[0051] Furthermore, based on the above considerations, such energy levels exist within the band gap, especially for oxygen. In the case of amorphous oxide semiconductors with deep trap levels due to defects The recombination models of electrons and holes in the band structure are shown in Figures 5(A) and 5(B).

[0052] The recombination model shown in Figure 5(A) assumes that there are a sufficient number of holes in the valence band and in the conduction band. This is a recombination model in the case where a sufficient number of electrons are present. When the body membrane is exposed to a light-irradiated environment, a sufficient number of electron-hole pairs are generated, and the oxidation occurs. The band structure of a semiconductor is represented by a recombination model as shown in Figure 5(A). In Dell, holes are located not only at the upper end of the valence band, but also in deep trap levels caused by oxygen vacancies. It is also generated in [location].

[0053] The recombination model shown in Figure 5(A) assumes that two types of recombination processes occur in parallel. One recombination process is the interband recombination of electrons in the conduction band with holes in the valence band. This is a recombination process called recombination. Another recombination process is when electrons in the conduction band are acid This is a recombination process in which holes in trap levels caused by elementary defects recombine. Here, between bands Recombination occurs more frequently in the valence band than in the trap levels caused by oxygen vacancies. When the number of holes becomes sufficiently small, interband recombination is completed first. This is shown in Figure 5. The recombination model shown in (A) is that electrons at the lower end of the conduction band are positively trapped at levels caused by oxygen vacancies. The process then transitions to the recombination model shown in Figure 5(B), where only the recombination process involving recombination with the pore remains.

[0054] Furthermore, there must be a sufficient number of holes in the valence band and a sufficient number of electrons in the conduction band. To achieve this, the oxide semiconductor should be sufficiently irradiated with light, and then the light irradiation should be stopped. As a result, recombination between electrons and holes occurs, as shown in the recombination model in Figure 5(A). The time required for the current (also called photocurrent) flowing through the oxide semiconductor in question to decay at that time The time (relaxation time) is compared with the relaxation time of the photocurrent in the recombination model shown in Figure 5(B). This shortens the length. For further details, please refer to the examples described later.

[0055] Next, the recombination model shown in Figure 5(B) proceeds as follows: This is a recombination model after the number of holes in the electron band has been sufficiently reduced. Recombination shown in Figure 5(B) In the model, the recombination process is almost entirely due to recombination at trap levels caused by oxygen vacancies. Therefore, compared to the recombination model shown in Figure 5(A), the number of electrons in the conduction band is slower. The electrons decrease significantly. Of course, during this recombination process, the electrons present in the conduction band are in the oxide semiconductor film. This contributes to electrical conduction. As a result, interband recombination is the main recombination process, as shown in Figure 5(A Compared to the recombination model shown in Figure 5(B), the recombination model shown in Figure 5(B) has a photocurrent relaxation time. This will be lengthy. For further details, please refer to the examples described below.

[0056] Thus, amorphous oxide semiconductors with deep trap levels due to oxygen vacancies The conductor has two types of electron-hole pair recombination models in its band structure, and the relaxation time of the photocurrent These can also be divided into two types. Here, in particular, the light in the recombination model shown in Figure 5(B) The delay in current relaxation occurs when the oxide semiconductor film is used in transistors and the like under light irradiation to form a gate. When a negative bias is applied to the electrode, a fixed charge is formed on the oxide semiconductor film or its interface. This can be a cause. In this way, oxygen vacancies in an oxide semiconductor film can cause electrical defects in the oxide semiconductor film. It is thought that this may have a negative impact on air conductivity.

[0057] However, according to one aspect of the present invention, an oxide semiconductor film including a crystalline region is entirely Because it has good crystallinity compared to amorphous oxide semiconductor films, it is characterized by oxygen vacancies. Such defects are reduced. Therefore, according to one aspect of the present invention, the crystalline region The oxide semiconductor film containing it has stable electrical conductivity and is resistant to irradiation with visible light and ultraviolet light. It has a more electrically stable structure. Oxide semiconductor containing such crystalline regions. By using films in transistors, a highly reliable semiconductor with stable electrical characteristics can be achieved. A conductive device can be provided.

[0058] The configurations shown in this embodiment can be appropriately combined with the configurations and methods shown in other embodiments. They can be used together.

[0059] (Embodiment 2) In this embodiment, the oxide semiconductor film including a crystalline region as shown in Embodiment 1 is Figures 6 to 10 illustrate the transistors used and the method of fabricating them. Let me explain. Figure 6 shows a top-gate transistor, which is one configuration of a semiconductor device. This is a cross-sectional view showing the 120 manufacturing steps.

[0060] First, before depositing the oxide semiconductor film containing crystalline regions, as shown in Figure 6(A) Therefore, it is preferable to form an underlayer insulating film 53 on the substrate 51.

[0061] The substrate 51 must have at least enough heat resistance to withstand subsequent heat treatment. This is crucial. When using a glass substrate as substrate 51, use one with a strain point of 730°C or higher. It is preferable to do so. For example, the glass substrate may be aluminosilicate glass, aluminobole Glass materials such as silicate glass and barium borosilicate glass are used. It is preferable to use a glass substrate containing more BaO than 3. The substrate 51 is mother glass In this case, the size of the circuit board is 1st generation (320mm x 400mm), 2nd generation (400mm x 500mm), 3rd generation (550mm x 650mm), 4th generation (680mm x 880mm) m, or 730mm x 920mm), 5th generation (1000mm x 1200mm or 1 100mm x 1250mm), 6th generation (1500mm x 1800mm), 7th generation (1 900mm x 2200mm), 8th generation (2160mm x 2460mm), 9th generation (2 400mm x 2800mm, or 2450mm x 3050mm), 10th generation (295 (0mm x 3400mm) etc. can be used. Mother glass requires a high processing temperature and processing Because it shrinks significantly with longer processing times, when mass production is carried out using mother glass, The heat treatment in the process should preferably be 600°C or lower, and more preferably 450°C or lower.

[0062] In addition, ceramic substrates, quartz substrates, sapphire substrates, etc. can be used instead of the glass substrates mentioned above. An insulating substrate can be used. Other materials such as crystallized glass can also be used. Furthermore, the surface of semiconductor substrates such as silicon wafers and conductive substrates made of metal materials It is also possible to use a material with an insulating layer formed on its surface.

[0063] The underlayer insulating film 53 is formed using an oxide insulating film that releases some of its oxygen upon heating. This is preferable. As an oxide insulating film that releases some oxygen upon heating, it satisfies the stoichiometric ratio. It is preferable to use an oxide insulating film that contains more oxygen than the oxygen to be added. Heating causes oxygen By using an oxide insulating film that emits a portion of the oxides as the underlying insulating film 53, heat treatment in a later process is possible. During this process, oxygen can be diffused into the oxide semiconductor film. Some of the oxygen is released upon heating. Typical oxide insulating films include silicon oxide, silicon oxide nitride, and aluminum oxide. Aluminum oxide, aluminum nitride, gallium oxide, hafnium oxide, yttrium oxide, etc. It can be used.

[0064] The underlying insulating film 53 has a thickness of 50 nm or more, preferably 200 nm or more and 500 nm or less. By increasing the thickness of the underlayer insulating film 53, the amount of oxygen released from the underlayer insulating film 53 can be increased. This is possible, and the increase in this film also affects the relationship between the underlying insulating film 53 and the oxide semiconductor film that is formed later. It is possible to reduce defects at the interface.

[0065] The underlying insulating film 53 is formed by sputtering, CVD, etc. Oxide insulating films, which release some of the oxygen, can be easily formed using the sputtering method. This is possible. An oxide insulating film, which releases some of its oxygen upon heating, can be processed by sputtering. When forming the film, it is preferable that the amount of oxygen in the film-forming gas is high, and oxygen, or oxygen and dilute gas A mixed gas such as 1 can be used. Typically, the oxygen concentration in the film-forming gas is 6% or higher. It is preferable to set it to 0% or less.

[0066] Furthermore, the underlying insulating film 53 is not necessarily an oxide insulating film that releases some oxygen when heated. It is not necessary to form it by hand, and silicon nitride, silicon oxide nitride, aluminum nitride, etc. are used. A nitride insulating film may be formed by combining the above oxide insulating film and a nitride film. A laminated structure of oxide insulating films is also possible, in which case an oxide insulating film is provided on top of a nitride insulating film. It is preferable to use a nitride insulating film as the underlayer insulating film 53, which allows alkali gold When using a glass substrate containing impurities such as alkali metals, It can prevent intrusion. Alkali metals such as lithium, sodium, and potassium are oxide semiconductors. Because it is a harmful impurity, it is preferable to reduce its content in oxide semiconductor films. Nitride insulating films can be formed by methods such as CVD and sputtering.

[0067] Next, as shown in Figure 6(B), by sputtering using a sputtering apparatus an oxide containing a crystalline region with a thickness of 30 nm to 50 μm on the underlying insulating film 53. A semiconductor film 55 is deposited.

[0068] Here, the processing chamber of the sputtering apparatus will be explained using Figure 7(A). Processing Chamber 31 is connected to an exhaust means 33 and a gas supply means 35. Also, inside the processing chamber 31, A substrate support 40 and a target 41 are provided. The target 41 is in contact with the power supply unit 37. It will continue.

[0069] Processing chamber 31 is connected to GND. Also, the leak rate of processing chamber 31 is set to 1 × 10⁻¹⁶. -10 Pa·m 3 By setting the time to less than / second, impurities in the film deposited by the sputtering method are reduced. This can reduce contamination.

[0070] To reduce the leak rate, it is necessary to reduce not only external leaks but also internal leaks. External leakage refers to the inflow of gas from outside the vacuum system due to tiny holes or faulty seals. Internal leaks refer to leaks from partitions such as valves within a vacuum system or leaks from internal components. This is due to the released gas. The leak rate is 1 × 10⁻⁶. -10 Pa·m 3 To make it less than / second Therefore, countermeasures must be taken from both external and internal leakage perspectives.

[0071] To reduce external leaks, the opening and closing parts of the processing chamber should be sealed with metal gaskets. Metal gaskets are coated with iron fluoride, aluminum oxide, or chromium oxide. It is preferable to use a metal material. Metal gaskets have better adhesion than O-rings, and external Leakage can be reduced. Also, by passivating iron fluoride, aluminum oxide, chromium oxide, etc. By using a metal material coated with this material, the hydrogen-containing gas released from the metal gasket can be released. This suppresses leakage and reduces internal leakage.

[0072] As a component of the inner wall of the processing chamber 31, aluminum, which emits less hydrogen-containing gas, Chromium, titanium, zirconium, nickel, or vanadium are used. It may also be used by coating an alloy material containing iron, chromium, and nickel. Alloy materials containing nickel, etc., are rigid, heat-resistant, and easy to process. By reducing the surface irregularities of the material through polishing or other means to minimize the surface area, the emission gas This can reduce sputtering. Alternatively, the components of the aforementioned sputtering apparatus can be changed to iron fluoride, aluminum oxide, etc. It may also be coated with a passivation agent such as um or chromium oxide.

[0073] The components installed inside the processing chamber 31 are preferably made of metal materials as much as possible, for example Even when installing viewing windows made of quartz or similar materials, the surface should be treated to suppress the release of gases. It is best to coat it thinly with a passivation agent such as iron fluoride, aluminum oxide, or chromium oxide.

[0074] Furthermore, a sputtering gas purification machine is installed immediately before introducing the sputtering gas into the processing chamber 31. Preferably, the length of the piping from the purifier to the processing chamber should be 5m or less. The length should be 1m or less. By making the length of the piping 5m or less or 1m or less, the discharge gas from the piping can be reduced. The effect of the slash can be reduced according to its length.

[0075] The piping for transporting sputter gas from the cylinder to the processing chamber 31 is lined with iron fluoride and iron oxide. It is preferable to use metal piping with an internally coated passive layer such as luminium or chromium oxide. The aforementioned piping, compared to, for example, SUS316L-EP piping, releases a larger amount of hydrogen-containing gas. This reduces the amount of impurities mixed into the film-forming gas. Furthermore, the pipe fittings are high-performance, ultra-compact. It is recommended to use metal gasket fittings (UPG fittings). Also, use metal materials for all piping. By using this construction, the effects of emitted gas and external leakage are reduced compared to cases where resins, etc. This is preferable because it can reduce the risk.

[0076] The exhaust from processing chamber 31 is provided by roughing pumps such as dry pumps, sputter ion pumps, and This can be done by appropriately combining a high vacuum pump such as a molecular pump or cryopump. Turbomolecular pumps are excellent at pumping large molecules, but have low pumping capacity for hydrogen and water. Therefore, a cryopump with high water exhaust capacity and a spatula with high hydrogen exhaust capacity are used. Combining it with a pump would be effective.

[0077] The adsorbed material present inside the processing chamber 31 is adsorbed to the inner wall and therefore affects the pressure in the processing chamber. However, this does not cause gas release when the processing room is vented. Therefore, the leak rate and exhaust Although there is no correlation with speed, using a pump with high exhaust capacity can remove adsorbed material present in the processing chamber. It is important to desorb as much as possible and ventilate beforehand. In addition, to promote the desorption of adsorbed substances, The laboratory can be baked. Baking increases the desorption rate of adsorbed substances by about 10 times. This can be done. Baking should be done at a temperature between 100°C and 450°C. At this time, When adsorbent substances are removed while introducing an inert gas, water and other substances that are difficult to remove by exhaust alone can be removed. The detachment rate can be further increased.

[0078] The exhaust means 33 exhausts impurities from the processing chamber 31 and controls the pressure inside the processing chamber 31. It is possible. The exhaust means 33 preferably uses an adsorption-type vacuum pump. For example, In that case, it is preferable to use a cryopump, ion pump, or titanium sublimation pump. It is possible to reduce the amount of hydrogen contained in the oxide semiconductor film by using the above-mentioned adsorption-type vacuum pump. It can be reduced.

[0079] Furthermore, the hydrogen contained in the oxide semiconductor film includes not only hydrogen atoms, but also hydrogen molecules, water, hydroxyl groups, and It may also be included as a hydride.

[0080] The gas supply means 35 supplies gas for sputtering the target into the processing chamber 31. It is a means of supplying gas. The gas supply means 35 includes a gas-filled cylinder, a pressure regulating valve, and a gas supply. It consists of a top valve, a mass flow controller, etc. Furthermore, the gas supply means 35 is precisely... By installing a processing machine, it is possible to reduce the amount of impurities contained in the gas introduced into the processing chamber 31. It is possible. The gases used for sputtering the target include helium, neon, argon, and ki. Use noble gases such as cenon or krypton. Alternatively, use a mixed gas of one of the above noble gases and oxygen. You can use it.

[0081] The power supply unit 37 can use an RF power supply unit, an AC power supply unit, a DC power supply unit, etc. as appropriate. It can be done. Note that, although not shown in the diagram, a mark is placed inside or outside the target support that supports the target. By providing a gnet, high-density plasma can be confined around the target, allowing for film deposition. This method can improve speed and reduce plasma damage to the substrate. This is called the sputtering method. Furthermore, in the magnetron sputtering method, Making it rotatable reduces the bias of the magnetic field, thus increasing the efficiency of using the target. This reduces variations in film quality within the plane of the substrate.

[0082] The substrate support 40 is connected to GND. A heater is provided on the substrate support 40. As a heater, heat is conducted or radiated from a heat source such as a resistance heating element. A device for heating the material being processed can be used.

[0083] It is preferable to use a zinc-containing metal oxide target as the target 41. A typical example of target 41 is the quaternary metal oxide In-Sn-Ga-Zn-O In-Ga-Zn-O metal oxides, which are ternary metal oxides, and In-S n-Zn-O metal oxide, In-Al-Zn-O metal oxide, Sn-Ga-Zn-O Metal oxides, Al-Ga-Zn-O metal oxides, Sn-Al-Zn-O metal oxides or binary metal oxides such as In-Zn-O metal oxides and Sn-Zn-O metal oxides. Targets such as the following can be used.

[0084] As an example of target 41, a metal oxide target containing In, Ga, and Zn is used. The composition ratio is In2O3:Ga2O3:ZnO = 1:1:1 [molar ratio]. Also, I A target with a composition ratio of n2O3:Ga2O3:ZnO = 1:1:2 [molar ratio] , or having a composition ratio of In2O3:Ga2O3:ZnO=1:1:4 [molar ratio] The target has a composition ratio of In2O3:Ga2O3:ZnO = 2:1:8 [molar ratio]. You can also use a target that does this.

[0085] The distance between the target 41 and the substrate 51 (TS distance) is determined by the atomic weight of the atoms. It is preferable to set the spacing so that the film can preferentially reach the underlying insulating film 53 on the substrate 51. .

[0086] As shown in Figure 7(A), a substrate 51 on which an underlayer insulating film 53 is formed on a substrate support 40 Next, it is installed inside the processing chamber 31 of the sputtering apparatus. Next, the gas supply means 35 is supplied to the processing chamber 3 1. Introduce the gas used to sputter target 41. The purity of target 41 is 9. Use a material with a concentration of 9.9% or higher, preferably 99.99% or higher. Next, contact the target 41. Power is supplied to the connected power supply unit 37. As a result, gas is supplied from the gas supply means 35 to the processing chamber 31. The ions 43 and electrons of the introduced sputtering gas sputter the target 41. To do it.

[0087] Here, the distance between target 41 and substrate 51 is set such that atoms with smaller atomic weights are preferentially placed on substrate 5 1. By setting the interval to allow it to reach and deposit on the upper underlayer insulating film 53, Figure 7( As shown in B), among the atoms included in target 41, the atom with the smallest atomic weight 45 Therefore, atoms with larger atomic weights (atom 47) can preferentially move towards the substrate.

[0088] In target 41, zinc has a smaller atomic weight than indium, etc. Therefore, Zinc is preferentially deposited on the underlying insulating film 53. Also, the atmosphere during film formation contains oxygen, and the substrate The support 40 is provided with a heater that heats the substrate and the deposited film during film formation, thus providing insulation for the substrate. The zinc deposited on the film 53 is oxidized, resulting in a seed crystal 55a containing zinc with a hexagonal crystal structure. Typically, a seed crystal having a hexagonal zinc oxide structure is formed. (Note: Target 41) If it contains atoms with a smaller atomic weight than zinc, such as aluminum, then together with zinc, aluminum Atoms with smaller atomic weights than zinc, such as um, are preferentially deposited on the underlying insulating film 53.

[0089] The seed crystal 55a has bonds with a hexagonal lattice on the a-b plane, and the a-b plane is substantially parallel to the film surface and includes zinc with a wurtzite structure of a hexagonal crystal in which the c-axis is substantially perpendicular to the film surface. It has a crystal. Here, regarding a crystal including zinc with a hexagonal crystal structure that has bonds with a hexagonal lattice on the a-b plane, the a-b plane is substantially parallel to the film surface and the c-axis is substantially perpendicular to the film surface, it will be described using FIG. 8. Here, as a representative example of a crystal including zinc with a hexagonal crystal structure zinc oxide is used for the description, and black circles indicate zinc and white circles indicate oxygen. FIG. 8(A) is a schematic diagram of zinc oxide with a hexagonal crystal structure on the a-b plane, and FIG. 8(B) is a schematic diagram of zinc oxide with a hexagonal crystal structure with the longitudinal direction of the paper as the c-axis direction . As shown in FIG. 8(A), on the upper plane on the a-b plane, zinc and oxygen form bonds in a hexagonal shape. Also, as shown in FIG. 8(B), layers having bonds with a hexagonal lattice formed by zinc and oxygen are stacked, and the c-axis direction is perpendicular to the a-b plane. The seed crystal 55a has one or more atomic layers in the c-axis direction of a layer having bonds with a hexagonal lattice on the a-b plane. Continuously, by sputtering the target 41 with a sputtering gas, atoms contained in the target are deposited on the seed crystal 55a. At this time, since crystal growth occurs with the seed crystal 55a as a nucleus, an oxide semiconductor film 55b including a region having crystallinity of a hexagonal crystal structure can be formed on the seed crystal 55a. Note that the substrate 51 is heated by a heater provided on the substrate support 40, so crystal growth occurs with the seed crystal 55a as a nucleus and the atoms deposited on the surface to be oxidized.

[0090] 55a, and at this time, crystal growth occurs with the seed crystal 55a as a nucleus, so an oxide semiconductor film 55b including a region having crystallinity of a hexagonal crystal structure can be formed on the seed crystal 55a. Since the substrate 51 is heated by a heater provided on the substrate support 40, crystal growth occurs with the seed crystal 55a as a nucleus and the atoms deposited on the surface to be oxidized.

[0091] ​​​​​The oxide semiconductor film 55b is nucleated on the seed crystal 55a, and the heavy atoms with a large atomic amount on the surface of the target 41 and the light atoms with a small atomic amount sputtered after the formation of the seed crystal 55a are oxidized while growing crystals. Therefore, similar to the seed crystal 55a, it has bonds with a hexagonal lattice on the a-b plane, the a-b plane is substantially parallel to the film surface, and the c-axis is substantially perpendicular to the film surface It has a region with a crystalline hexagonal structure. That is, the oxide semiconductor film 55 composed of the seed crystal 55a and the oxide semiconductor film 55 b has bonds with a hexagonal lattice on the a-b plane substantially parallel to the surface of the underlying insulating film 53, and has a region with a crystalline hexagonal structure where the c-axis is substantially perpendicular to the film surface It contains. That is, the region having the crystalline hexagonal structure included in the oxide semiconductor film 55 is c-axis oriented. In FIG. 6(B), the interface between the seed crystal 55a and the oxide semiconductor film 55 b is shown by a dotted line and is described as a laminate of the oxide semiconductor films, but there is no clear interface, and it is shown only for easy understanding. The heating temperature of the substrate by the heater at this time is greater than 200°C and 400°C or less, preferably 250°C or more and 350°C or less. By forming the film while heating the substrate to a temperature greater than 200°C and 400°C or less, preferably 25 0°C or more and 350°C or less, a heat treatment is performed simultaneously with the film formation, so that an oxide semiconductor film including a region having good crystallinity can be formed. Note that the temperature of the film formation surface during sputtering is 250°C or more and the upper limit temperature of the heat treatment of the substrate is less than or equal to.

[0092] The sputtering gas is a noble gas (typically argon), oxygen, a noble gas and oxygen Note that the temperature of the film formation surface during sputtering is 250°C or more and the upper limit temperature of the heat treatment of the substrate is less than or equal to. By forming the film while heating the substrate to a temperature greater than 200°C and 400°C or less, preferably 25 0°C or more and 350°C or less, a heat treatment is performed simultaneously with the film formation, so that an oxide semiconductor film including a region having good crystallinity can be formed. is less than or equal to.

[0093] Note that the sputtering gas is a noble gas (typically argon), oxygen, a noble gas and oxygen A mixed gas of the following is used as appropriate. In addition, the sputtering gas may contain hydrogen, water, hydroxyl groups or hydrogen It is preferable to use a high-purity gas from which impurities such as monoxides have been removed.

[0094] Furthermore, the pressure in the processing chamber containing the substrate support 40 and the target 41 shall be 0.4 Pa or less. By doing so, alkali metals are introduced into the surface and within the oxide semiconductor film containing crystalline regions. This reduces the inclusion of impurities such as hydrogen.

[0095] Furthermore, the leak rate of the processing chamber of the sputtering device is set to 1 × 10⁻⁶. -10 Pa·m 3 / seconds or more By setting it to the bottom, the acid containing crystalline regions during film formation by sputtering is The contamination of alkali metals, hydrogen, water, hydroxyl groups, or hydrides into the ionized semiconductor film. It can be reduced. Also, by using an adsorption-type vacuum pump as the exhaust system, the exhaust system This reduces the backflow of impurities such as alkali metals, hydrogen, water, hydroxyl groups, or hydrides. can.

[0096] Furthermore, by making the purity of target 41 99.99% or higher, a crystalline region can be created. The alkali metals, hydrogen, water, hydroxyl groups, or hydrides that are mixed into oxide semiconductor films containing these materials are reduced. It can be reduced. Also, by using this target, the oxide semiconductor film 55 can be reduced. Then, the lithium concentration was set to 5 × 10 15 cm -3 The following is preferably 1 × 10 15 cm -3 below , the sodium concentration was 5 × 10 16 cm -3 The following is preferably 1 × 10 16 cm -3 below More preferably 1 × 10 15 cm-3 Hereinafter, the potassium concentration is 5×10 15 cm -3 Hereinafter, preferably 1×10 15 cm -3 It can be set to the following.

[0097] In the above-described film formation method, in the same sputtering process, by utilizing the difference in the amount of atoms contained in the target, zinc with a small atomic weight is preferentially deposited on the oxide insulating film to form a seed crystal and, while crystal-growing indium etc. with a large atomic weight on the seed crystal and depositing it, it is possible to form an oxide semiconductor film including a crystalline region without going through a plurality of steps.

[0098] In the method for forming the above-described oxide semiconductor film 55, by film formation using the sputtering method, the seed crystal 55a and the oxide semiconductor film 55b were crystallized while being formed in a batch, but the oxide semiconductor film according to this embodiment does not necessarily need to be formed in this way. For example, the formation and crystallization of the seed crystal and the oxide semiconductor film may be performed separately.

[0099] Hereinafter, using FIG. 9, a method of separately performing the formation and crystallization of the seed crystal and the oxide semiconductor film will be described. Further, a method of forming an oxide semiconductor film including a crystalline region as follows may be referred to as a 2step method in this specification. Note that the oxide semiconductor film including a crystalline region shown in the cross-sectional TEM image of FIG. 1 was formed using the 2step method.

[0100] First, a first oxide semiconductor film having a film thickness of 1 nm or more and 10 nm or less is formed on the base insulating film 53. The formation of the first oxide semiconductor film uses the sputtering method, and the sputtering method The substrate temperature during film formation is preferably 200°C to 400°C. The film conditions are the same as those for the oxide semiconductor film deposition method described above.

[0101] Next, the chamber atmosphere in which the substrate is placed is changed to nitrogen or dry air, and the first heating treatment is performed. The process is carried out. The temperature of the first heat treatment shall be between 400°C and 750°C. First heat treatment This crystallizes the first oxide semiconductor film and forms a seed crystal 56a (see Figure 9(A)). ).

[0102] Depending on the temperature of the first heat treatment, crystallization occurs from the film surface as a result of the first heat treatment. Then, crystal growth occurs from the surface of the film toward the interior, and c-axis oriented crystals are obtained. First heating The process causes zinc and oxygen to accumulate in large quantities on the film surface, and the upper plane forms a hexagonal structure from the zinc and oxygen. A graphene-type two-dimensional crystal is formed in one or more layers on the outermost surface, and this is the thickness It grows in that direction and overlaps to form layers. When the heat treatment temperature is increased, it moves from the surface to the inside, and then from the inside. Crystal growth progresses from the bottom.

[0103] Furthermore, the underlying insulating film 53 is made of an oxide insulating film from which some of the oxygen is released by heating. As a result, the first heat treatment removes oxygen from the underlying insulating film 53 to the interface with the seed crystal 56a. Then, diffuse it in its vicinity (plus or minus 5 nm from the interface) to form oxygen vacancies in seed crystal 56a. This can be reduced.

[0104] Next, a second oxide semiconductor film thicker than 10 nm is formed on the seed crystal 56a. The oxide semiconductor film is formed using the sputtering method, and the substrate temperature during film formation is 2 The temperature should be between 00°C and 400°C. For other film deposition conditions, see the above-mentioned oxide semiconductor film conditions. The method is the same as the film deposition method.

[0105] Next, the atmosphere in the chamber where the substrate is placed is changed to nitrogen or dry air, and the second heating treatment is performed. Perform the following. The temperature for the second heat treatment shall be between 400°C and 750°C. Second heat treatment This crystallizes the second oxide semiconductor film, forming the oxide semiconductor film 56b (Figure 9). See B). The second heat treatment is performed under a nitrogen atmosphere, an oxygen atmosphere, or a mixture of nitrogen and oxygen. By performing the process under atmospheric conditions, the density of the oxide semiconductor film 56b is increased and the number of defects is reduced. The second heat treatment causes crystallization to occur in the film thickness direction, i.e., from the bottom inward, with the seed crystal 56a as the nucleus. As the lengthening progresses, an oxide semiconductor film 56b containing a crystalline region is formed. Thus, an oxide semiconductor film 56 is formed, consisting of a seed crystal 56a and an oxide semiconductor film 56b. In Figure 9(B), the interface between the seed crystal 56a and the oxide semiconductor film 56b is shown by a dotted line. Although it is described as a conductive laminate, there is no clear interface; it is merely a simplified representation. The diagram is provided to illustrate the point.

[0106] Furthermore, the process from the formation of the underlay insulating film 53 to the second heat treatment is carried out without contact with the atmosphere. It is preferable to carry out the process continuously. The steps from the formation of the underlay insulating film 53 to the second heat treatment are performed with water An atmosphere containing little to no elements or moisture (such as an inert atmosphere, a reduced pressure atmosphere, or a dry air atmosphere) It is preferable to control the moisture content below a certain level, for example, the dew point for moisture should be -40°C or lower, preferably. It is preferable to use a dry nitrogen atmosphere with a dew point of -50°C or lower.

[0107] The above film deposition method is a method in which atoms with smaller atomic weights are preferentially deposited on the oxide insulating film. In comparison, even at lower substrate temperatures during film formation, oxide semiconductors containing regions with good crystallinity... A film can be formed. Furthermore, oxide semiconductors deposited using the above two-step method... The body film 56 was also formed using a film deposition method that preferentially deposits atoms with smaller atomic weights onto the oxide insulating film. It has crystallinity comparable to that of the deposited oxide semiconductor film 55, and its electrical conductivity is also stable. Regardless of which method is used to deposit the oxide semiconductor film, it will have stable electrical properties. This enables the provision of highly reliable semiconductor devices. Furthermore, in the following process, oxide semiconductors are used. The process for fabricating the transistor 120 using the conductive film 55 will be explained, but of course, the same process applies to oxides. A semiconductor film 56 can also be used.

[0108] Through the above process, the seed crystal 55a and oxide semiconductor film 55b are stacked on the underlying insulating film 53. A suitable oxide semiconductor film 55 can be formed. Next, the substrate 51 is subjected to a heat treatment. In addition, hydrogen is released from the oxide semiconductor film 55, and one of the oxygen contained in the underlying insulating film 53 is released. The part is extended to the vicinity of the interface between the oxide semiconductor film 55, the underlying insulating film 53, and the oxide semiconductor film 55. It is preferable to scatter them.

[0109] The heat treatment temperature is set to release hydrogen from the oxide semiconductor film 55 and also to the underlying insulating film 53. A temperature that releases some of the contained oxygen and further diffuses it into the oxide semiconductor film 55 is preferred. Typically, the temperature should be between 150°C and the strain point of the substrate 51, preferably between 250°C and 450°C. The following applies. Note that the heat treatment temperature is the deposition temperature of the oxide semiconductor film including the crystalline region. By raising the temperature above a certain level, a larger portion of the oxygen contained in the underlying insulating film 53 is released. It is possible.

[0110] The heat treatment is performed in an inert gas atmosphere, oxygen atmosphere, or nitrogen atmosphere, which contains little to no hydrogen or moisture. It is preferable to carry out the process in an atmosphere such as a mixed atmosphere of oxygen and nitrogen. Typically, in a noble gas atmosphere such as helium, neon, argon, xenon, or krypton. It is preferable to do so. Furthermore, the heating time for the heat treatment should be between 1 minute and 24 hours.

[0111] This heat treatment releases hydrogen from the oxide semiconductor film 55, and also the underlying insulating film 5 A portion of the oxygen contained in 3 is absorbed by the oxide semiconductor film 55, the underlying insulating film 53 and the oxide semiconductor film 5 It can be diffused near the interface of 5. Through this process, the oxide semiconductor film 55 The oxygen vacancies can be reduced. As a result, the hydrogen concentration and oxygen vacancies are reduced. It is possible to form an oxide semiconductor film that includes regions having crystalline properties.

[0112] Next, as shown in Figure 6(C), a mask is formed on the oxide semiconductor film 55, and the mask The oxide semiconductor film 55 is selectively etched using this method to form an oxide semiconductor film 59. After this, the mask will be removed.

[0113] The mask for etching the oxide semiconductor film 55 is used in the photolithography process, It can be fabricated using methods such as the stencil method and printing method as appropriate. Also, oxide semiconductor film 55 Etching can be performed using either wet etching or dry etching as appropriate.

[0114] Next, as shown in Figure 6(D), the source electrode 61a and that are in contact with the oxide semiconductor film 59 A drain electrode 61b is formed.

[0115] The source electrode 61a and drain electrode 61b are made of aluminum, chromium, copper, and tantalum. Metal elements selected from titanium, molybdenum, tungsten, manganese, and zirconium, Alternatively, an alloy containing the aforementioned metal elements, or an alloy combining the aforementioned metal elements, etc. It can be formed using titanium, tantalum, and tungsten. Selected metallic elements from chromium, molybdenum, neodymium, and scandium, either individually or in combination. A combination of alloy films or nitride films may be used. Also, source electrode 61a and The drain electrode 61b may have a single-layer structure or a multilayer structure of two or more layers. For example, sil A single-layer structure of an aluminum film containing copper, and a two-layer structure of a copper film laminated on a Cu-Mg-Al alloy film. Structure: A two-layer structure in which a titanium film is laminated on an aluminum film, and a titanium film is laminated on a titanium nitride film. Layered two-layer structure, two-layer structure with a tungsten film laminated on a titanium nitride film, tantalum nitride film A two-layer structure with a tungsten film laminated on top, a titanium film, and an aluminum film on top of the titanium film. Examples include a three-layer structure in which layers are stacked and then a titanium film is formed on top of them.

[0116] Furthermore, the source electrode 61a and drain electrode 61b are made of indium tin oxide and tarn oxide. Indium oxide containing tungsten, indium zinc oxide containing tungsten oxide, oxide Titanium-containing indium oxide, titanium oxide-containing indium tin oxide, indium zinc Transparent conductive materials such as oxides and indium tin oxide with added silicon dioxide are suitable. It can also be used. Furthermore, a laminated structure of the above-mentioned light-transmitting conductive material and the above-mentioned metal element. It can also be done this way.

[0117] The source electrode 61a and drain electrode 61b are manufactured by sputtering, CVD, and vapor deposition. After forming a conductive film using the method described above, a mask is formed on the conductive film and the conductive film is etched to form the conductive film. The mask formed on the conductive film can be created using printing, inkjet, or photolithography methods. It can be used as is. Also, the source electrode 61a and drain electrode 61b are printed by a printing method. Alternatively, it can be formed directly using an inkjet method.

[0118] Here, after forming a conductive film on the oxide semiconductor film 59 and the underlying insulating film 53, the conductive film The material is etched into a predetermined shape to form the source electrode 61a and the drain electrode 61b.

[0119] Furthermore, after forming a conductive film on the oxide semiconductor film 55, an acid is used with a multi-gradation photomask. Etching of the oxide semiconductor film 55 and the conductive film is performed to form the oxide semiconductor film 59 and the source electrode. 61a and drain electrode 61b may be formed. A mask with uneven surfaces may be formed, and the mass After etching the oxide semiconductor film 55 and the conductive film using a tool, the surface is roughened by ashing. The mask is separated, and the conductive film is selectively etched using the separated mask. Then, the oxide semiconductor film 59, source electrode 61a and drain electrode 61b are formed. Yes, it is possible. This process reduces the number of photomasks and photolithography steps. It is possible.

[0120] Next, the oxide semiconductor film 59 and the source electrode 61a and drain electrode 61b are placed on the gas A dielectric film 63 is formed.

[0121] The gate insulating film 63 is silicon oxide, silicon oxide nitride, silicon nitride, silicon oxide nitride A single layer or a stack of silicon, aluminum oxide, aluminum oxynitride, or gallium oxide can be formed. Note that it is preferable that the portion of the gate insulating film 63 in contact with the oxide semiconductor film 59 contains oxygen, and particularly preferably, it is formed using an oxide insulating film that releases oxygen by heating, similar to the underlying insulating film 53. By using a silicon oxide film as the oxide insulating film that releases oxygen, oxygen can be diffused into the oxide semiconductor film 59 during the heat treatment in a later process, and the characteristics of the transistor 120 can be improved. In addition, the portion of the gate insulating film 63 in contact with the oxide semiconductor film 59 preferably contains oxygen, and particularly preferably, it is formed using an oxide insulating film that releases oxygen by heating, similar to the underlying insulating film 53. Specifically, it is formed using an oxide insulating film that releases oxygen by heating, similar to the underlying insulating film 53. By using a silicon oxide film as the oxide insulating film that releases oxygen, oxygen can be diffused into the oxide semiconductor film 59 during the heat treatment in a later process, and the characteristics of the transistor 120 can be improved. By using a silicon oxide film as the oxide insulating film that releases oxygen, oxygen can be diffused into the oxide semiconductor film 59 during the heat treatment in a later process, and the characteristics of the transistor 120 can be improved. By using a silicon oxide film as the oxide insulating film that releases oxygen, oxygen can be diffused into the oxide semiconductor film 59 during the heat treatment in a later process, and the characteristics of the transistor 120 can be improved.

[0122] Also, as the gate insulating film 63, hafnium silicate (HfSiO x ), hafnium silicate with nitrogen added (HfSi O x O y N z ), hafnium aluminate with nitrogen added (HfAl O x O y N z ), hafnium oxide, yttrium oxide, or other high- k materials can be used to reduce gate leakage. Furthermore, a stacked structure of a high-k material and one or more of silicon oxide, silicon oxynitride, silicon nitride, silicon oxynitride, aluminum oxide, aluminum oxynitride, and gallium oxide can be adopted. The thickness of the gate insulating film 63 is preferably 1 nm or more and 300 nm or less, more preferably 5 nm or more and 50 nm or less. By setting the thickness of the gate insulating film 63 to 5 nm or more, the gate leakage current can be reduced. Specifically, a stacked structure of a high-k material and one or more of silicon oxide, silicon oxynitride, silicon nitride, silicon oxynitride, aluminum oxide, aluminum oxynitride, and gallium oxide can be adopted. The thickness of the gate insulating film 63 is preferably 1 nm or more and 300 nm or less, more preferably 5 nm or more and 50 nm or less. By setting the thickness of the gate insulating film 63 to 5 nm or more, the gate leakage current for the gate can be reduced. Specifically, a stacked structure of a high-k material and one or more of silicon oxide, silicon oxynitride, silicon nitride, silicon oxynitride, aluminum oxide, aluminum oxynitride,, and gallium oxide can be adopted. The thickness of the gate insulating film 63 is preferably 1 nm or more and 300 nm or less, more preferably 5 nm or more and 50 nm or less. By setting the thickness of the gate insulating film 63 to 5 nm or more, the gate leakage current for the gate can be reduced. Specifically, a stacked structure of a high-k material and one or more of silicon oxide, silicon oxynitride, silicon nitride, silicon oxynitride, aluminum oxide, aluminum oxynitride, and gallium oxide can be adopted. The thickness of the gate insulating film 63 is preferably 1 nm or more and 300 nm or less, more preferably 5 nm or more and 50 nm or less. By setting the thickness of the gate insulating film 63 to 5 nm or more, the gate leakage current for the gate can be reduced. Specifically, a stacked structure of a high-k material and one or more of silicon oxide, silicon oxynitride, silicon nitride, silicon oxynitride, aluminum oxide, aluminum oxynitride, and gallium oxide can be adopted. The thickness of the gate insulating film 63 is preferably 1 nm or more and 300 nm or less, more preferably 5 nm or more and 50 nm or less. By setting the thickness of the gate insulating film 63 to 5 nm or more, the gate leakage current for the gate can be reduced. Specifically, a stacked structure of a high-k material and one or more of silicon oxide, silicon oxynitride, silicon nitride, silicon oxynitride, aluminum oxide, aluminum oxynitride, and gallium oxide can be adopted. The thickness of the gate insulating film 63 is preferably 1 nm or more and 300 nm or less, more preferably 5 nm or more and 50 nm or less. By setting the thickness of the gate insulating film 63 to 5 nm or more, the gate leakage current for the gate can be reduced.

[0123] Before forming the gate insulating film 63, the surface of the oxide semiconductor film 59 is exposed to the plasma of an oxidizing gas such as oxygen, ozone, or nitrous oxide to oxidize the surface of the oxide semiconductor film 59. Oxygen deficiency may be reduced.

[0124] Next, on the gate insulating film 63, in a region superimposed with the oxide semiconductor film 59, Forms 65.

[0125] The gate electrode 65 is made of aluminum, chromium, copper, tantalum, titanium, molybdenum, and tan. Metal elements selected from gusten, manganese, and zirconium, or a mixture of the above metal elements. It can be formed using an alloy consisting of the aforementioned elements, or an alloy combining the aforementioned metal elements. In addition, aluminum is combined with titanium, tantalum, tungsten, molybdenum, chromium, and An alloy film made by combining one or more metallic elements selected from odymium, scandium, etc. A nitride film may also be used. Furthermore, the gate electrode 65 may be a single layer structure or a stacked structure of two or more layers. It may also be called a structure. For example, a single layer structure of an aluminum film containing silicon, on an aluminum film A two-layer structure in which a titanium film is laminated on top of a titanium nitride film, a two-layer structure in which a titanium film is laminated on top of a titanium nitride film, A two-layer structure in which a tungsten film is stacked on top of a tungsten film, and a tungsten film is stacked on top of a tantalum nitride film. A layered two-layer structure, a titanium film, and an aluminum film laminated on top of that titanium film, and further on top of that This includes a three-layer structure that forms a titanium film.

[0126] Furthermore, the gate electrode 65 contains indium tin oxide and indium acid containing tungsten oxide. Indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide The material contains indium tin oxide, indium zinc oxide, and silicon oxide, which are added to the substance. It is also possible to apply transparent conductive materials such as indium tin oxide. In-Ga-Zn-O based metal oxides are targeted, and sputtering is performed in a nitrogen-containing atmosphere. A compound conductor obtained by ferring may also be used. Alternatively, the above-mentioned light-transmitting conductor may be used. A layered structure of an electrochemical material and the above-mentioned metallic element can also be used.

[0127] Furthermore, an insulating film 69 may be formed on the gate electrode 65 as a protective film (see Figure 6(E)). Illuminate. ) Also, after forming contact holes in the gate insulating film 63 and insulating film 69, Wiring may be formed to connect the drain electrode 61a and the drain electrode 61b.

[0128] The insulating film 69 can be formed using an insulating film similar to the gate insulating film 63 as appropriate. Furthermore, if a silicon nitride film obtained by the sputtering method is formed as the insulating film 69, the external It is possible to prevent the intrusion of moisture and alkali metals from the oxide semiconductor film 59. The content of pure substances can be reduced.

[0129] Furthermore, after the formation of the gate insulating film 63, or after the formation of the insulating film 69, heat treatment is performed. This is also acceptable. This heat treatment releases hydrogen from the oxide semiconductor film 59, and the substrate A portion of the oxygen contained in the insulating film 53, gate insulating film 63, or insulating film 69 is used in an oxide semiconductor. The vicinity of the interface between the film 59, the underlying insulating film 53, and the oxide semiconductor film 59, and the gate insulating film 63 and the oxide It can be diffused near the interface of the material semiconductor film 59. Through this process, oxide semiconductor This can reduce oxygen vacancies contained in the body membrane 59, and also the oxide semiconductor film 59 and below Reduces defects at the interface between the ground insulating film 53 or the oxide semiconductor film 59 and the gate insulating film 63. This can be achieved. As a result, an oxide semiconductor film 59 with reduced hydrogen concentration and oxygen vacancies can be obtained. It can be formed in this way. With this high purity, it is limited to type i (intrinsic semiconductor) or type i only. By forming an oxide semiconductor film that is nearly identical in thickness, transistors with extremely superior characteristics can be realized. It is possible.

[0130] Through the above process, an oxide semiconductor film having a channel region containing a crystalline region is obtained. Transistor 120 can be fabricated. As shown in Figure 6(E), transistor 1 20 is an underlayer insulating film 53 provided on the substrate 51 and an oxide layer provided on the underlayer insulating film 53 A material semiconductor film 59 and a saw provided so as to be in contact with the upper and side surfaces of the oxide semiconductor film 59 The drain electrode 61a and the drain electrode 61b, and the gate insulating plate provided on the oxide semiconductor film 59 The gate electrode is provided on the gate insulating film 63, superimposed with the edge film 63 and the oxide semiconductor film 59. It has a gate electrode 65 and an insulating film 69 provided on the gate electrode 65.

[0131] The oxide semiconductor film containing crystalline regions used in transistor 120 is Because the body has good crystallinity compared to an amorphous oxide semiconductor film, it is representative of oxygen vacancies. Defects such as those that cause dangling bonds, and impurities such as hydrogen that bind to dangling bonds, are reduced. These bonds form defects such as oxygen vacancies and dangling bonds. Hydrogen and other elements function as carrier sources in oxide semiconductor films, therefore, in the oxide semiconductor film This can cause fluctuations in the electrical conductivity of the conductive film. Therefore, crystals that reduce these fluctuations are important. Oxide semiconductor films containing regions with properties have stable electrical conductivity and are resistant to visible light and ultraviolet light. It has a more electrically stable structure against any type of irradiation. By using an oxide semiconductor film containing this material in a transistor, stable electrical characteristics can be achieved. This enables us to provide highly reliable semiconductor devices.

[0132] Furthermore, the semiconductor device according to the present invention is not limited to the transistor 120 shown in Figure 6. No. For example, a structure like the transistor 130 shown in Figure 10(A) is also acceptable. The inverter 130 is provided on the substrate 51 and on the substrate 53 Source electrode 61a and drain electrode 61b, and source electrode 61a and drain An oxide semiconductor film 59 is provided so as to be in contact with the upper and side surfaces of the electrode 61b, and an oxide semiconductor film 59 is provided so as to be in contact with the upper and side surfaces of the electrode 61b, and The gate insulating film 63 provided on the conductive film 59 is superimposed with the oxide semiconductor film 59 to form a gate insulating film. A gate electrode 65 provided on the edge film 63, and an insulating film 69 provided on the gate electrode 65 It has that, in other words, the transistor 130 has an oxide semiconductor film 59 on the source electrode 61a and In that it is provided so as to be in contact with the upper and side surfaces of the drain electrode 61b, It is different from the 'njista 120'.

[0133] Alternatively, a structure like transistor 140 shown in Figure 10(B) may be used. Ta 140 is an underlayer insulating film 53 provided on the substrate 51 and provided on the underlayer insulating film 53 A gate electrode 65, a gate insulating film 63 provided on the gate electrode 65, and a gate insulating film 6 3 provides an oxide semiconductor film 59 and contacts the upper surface and side surface of the oxide semiconductor film 59 Source electrode 61a and drain electrode 61b are provided as shown, and on the oxide semiconductor film 59 It has an insulating film 69 provided therein. In other words, transistor 140 has a gate electrode 65 and The gate insulating film 63 is located beneath the oxide semiconductor film 59, making it a bottom gate structure. In this respect, it differs from transistor 120.

[0134] Alternatively, a structure like transistor 150 shown in Figure 10(C) may be used. Ta 150 consists of an underlay insulating film 53 provided on the substrate 51 and provided on the underlay insulating film 53 A gate electrode 65, a gate insulating film 63 provided on the gate electrode 65, and a gate insulating film 6 3 A source electrode 61a and a drain electrode 61b are provided on the source electrode 61a and and an oxide semiconductor film 59 provided so as to be in contact with the upper and side surfaces of the drain electrode 61b It has an insulating film 69 provided on an oxide semiconductor film 59. In other words, transistor 15 0 is a bottom gate electrode 65 and gate insulating film 63 provided beneath an oxide semiconductor film 59. It differs from transistor 130 in that it has a luminous gate structure.

[0135] The configurations and methods described in this embodiment are similar to those described in other embodiments. They can be used in combination as appropriate.

[0136] (Embodiment 3) In this embodiment, an oxide semiconductor film including a crystalline region as shown in the previous embodiment. Figures 11 and 12 show transistors with a different structure from transistors using the above method. I will explain.

[0137] The top-gate transistor 160 shown in Figure 11(A) is mounted on the substrate 351. A base insulating film 353, a metal oxide film 371 provided on the base insulating film 353, and metal An oxide semiconductor film 359 provided on the oxide film 371, and the upper surface of the oxide semiconductor film 359 Source electrode 361a and drain electrode 361b are provided so as to be in contact with the side surface, A metal oxide film 373 provided on the oxide semiconductor film 359, and a metal oxide film 373 provided on the metal oxide film 373 The gate insulating film 363 is superimposed with the oxide semiconductor film 359 on the gate insulating film 363. It has a gate electrode 365 provided thereon and an insulating film 369 provided on the gate electrode 365. do.

[0138] In other words, transistor 160 has gold between the underlying insulating film 353 and the oxide semiconductor film 359. A metal oxide film 371 is provided, and a metal is placed between the oxide semiconductor film 359 and the gate insulating film 363. In that an oxide film 373 is provided, the transistor 120 shown in the previous embodiment This differs from the above. Note that the other configurations of transistor 160 are as shown in the previous embodiment. It is the same as Zista 120. In other words, for details of circuit board 351, see the description of circuit board 51 below. For details on the base insulating film 353, please refer to the description of the base insulating film 53, and for details on the oxide semiconductor film 359... Regarding the oxide semiconductor film 59, see the source electrode 361a and drain electrode 361 For details of b, see the description of source electrode 61a and drain electrode 61b, and gate insulating film. For details on 363, see the description of gate insulating film 63, and for details on gate electrode 365, see the description. The description of gate electrode 65 can be taken into consideration.

[0139] The metal oxide film 371 and the metal oxide film 373 contain the same type of material as the oxide semiconductor film 359. It is desirable to use a metal oxide that is composed of the same components as an oxide semiconductor film. This means that it contains one or more atoms selected from the constituent metal atoms of the oxide semiconductor film. In particular, a crystal structure similar to the crystal structure of the crystalline region of the oxide semiconductor film 359. It is preferable to use constituent atoms that can form structures. In this way, the same type as oxide semiconductor film 359 Metal oxide films 371 and 373 are formed using metal oxides composed of the following components. It is preferable that the film includes regions that have crystalline properties similar to the oxide semiconductor film 359. In the crystalline region, the ab plane is approximately parallel to the film surface, and the c axis is approximately perpendicular to the film surface. It is preferable that the crystals are straight. That is, the region having the crystallization is c-axis oriented. It is preferable that the crystalline region is observed from a direction perpendicular to the film surface. This results in a structure in which atoms are arranged in a hexagonal lattice.

[0140] By providing a metal oxide film 371 that includes the region having the above-described crystalline properties, gold At the interface between the oxide film 371 and the oxide semiconductor film 359, and in its vicinity, the c-axis orientation is continuous. A region having crystalline properties can be formed. This allows the metal oxide film 371 and the oxide semiconductor to be formed. At the interface with the body membrane 359 and in its vicinity, defects such as oxygen vacancies and dumbbells are present. Impurities such as hydrogen that bond to the ging bond can be reduced. Also, the metal oxide film 3 Similarly, the orientation of the c axis is continuous at the interface between 73 and the oxide semiconductor film 359 and its vicinity. A region with continuous crystallinity may be formed.

[0141] As mentioned above, defects such as oxygen vacancies and dangling bonds, etc. The hydrogen atoms that bond to it function like a carrier source, thus affecting the electrical charge of the oxide semiconductor film. This can cause fluctuations in conductivity. Therefore, the oxide semiconductor film 359 is different from the metal oxide film 37 These effects are also reduced at the interface between 1 and the metal oxide film 373 and in its vicinity. Furthermore, the oxide semiconductor film 359 has stable electrical conductivity and is resistant to irradiation with visible light and ultraviolet light. Even if it is not electrically stable, it has a more stable structure. Such oxide semiconductor film 359, metal oxide By using film 371 and metal oxide film 373 in a transistor, stable electricity This enables the provision of highly reliable semiconductor devices with specific characteristics.

[0142] Examples of metal oxide films 371 and 373 include oxide semiconductor film 35 When using an In-Ga-Zn-O type metal oxide in 9, a metal acid containing gallium oxide is used. Metal oxides, particularly Ga-Zn-O type metal oxides obtained by adding zinc oxide to gallium oxide, are used. It should be formed by doing so. Ga-Zn-O metal oxides are zinc oxide relative to gallium oxide. The amount of substance should be less than 50%, and more preferably less than 25%. Oh, Ga-Zn-O based metal oxides and In-Ga-Zn-O based metal oxides were brought into contact. In this case, the energy barrier is approximately 0.5 eV on the conduction band side and approximately 0.7 eV on the valence band side. It is possible.

[0143] Furthermore, since the oxide semiconductor film 359 is used as the active layer, the metal oxide film 371 and metal The energy gap of the oxide film 373 is greater than the energy gap of the oxide semiconductor film 359. It is required to be larger. Also, between the metal oxide film 371 and the oxide semiconductor film 359, Alternatively, between the metal oxide film 373 and the oxide semiconductor film 359, there is at least room temperature (20°C). In this case, the formation of an energy barrier that prevents carriers from flowing out of the oxide semiconductor film 359. For example, the lower end of the conduction band of metal oxide film 371 or metal oxide film 373 and acid The energy difference with the lower end of the conduction band of the oxide semiconductor film 359, or the metal oxide film 371 or The upper end of the valence band of the metal oxide film 373 and the upper end of the valence band of the oxide semiconductor film 359 An energy difference of 0.5 eV or more is desirable, and 0.7 eV or more is more desirable. Furthermore, a voltage of 1.5 eV or less is desirable.

[0144] Furthermore, the energy gap of the metal oxide film 371 is the energy gap of the underlying insulating film 353. Smaller than the top, the energy gap of the metal oxide film 373 is smaller than the energy gap of the gate insulating film 363. It is preferable that it be smaller than the energy gap.

[0145] Here, in Figure 12, transistor 160, that is, gate isolation from the gate electrode 365 side, Edge film 363, metal oxide film 373, oxide semiconductor film 359, metal oxide film 371 and below Figure 12 shows an energy band diagram (schematic diagram) for a structure in which the earth insulating film 353 is joined. From the gate electrode 365 side, the gate insulating film 363, metal oxide film 373, oxide semiconductor film 359, the ideal is that all of the metal oxide film 371 and the underlying insulating film 353 are intrinsic. Assuming a typical situation, silicon oxide (band) is used as the gate insulating film 363 and the under insulating film 353. The gap (Eg 8eV~9eV) is used as a metal oxide film, and Ga-Zn-O based metal oxides ( A band gap (Eg 4.4eV) is used for the In-Ga-Zn-O system gold oxide semiconductor film. This shows the case using a group oxide (band gap Eg 3.2eV). The energy difference between the vacuum level and the lower end of the conduction band of silicon dioxide is 0.95 eV, and Ga-Zn- The energy difference between the vacuum level and the lower edge of the conduction band of O-based metal oxides is 4.1 eV, and In-G The energy difference between the vacuum level and the lower edge of the conduction band for α-Zn-O metal oxides is 4.6 eV. .

[0146] As shown in Figure 12, the gate electrode side (channel side) of the oxide semiconductor film 359 has an oxide Evidence of approximately 0.5 eV and approximately 0.7 eV is present at the interface between the semiconductor film 359 and the metal oxide film 373. An energy barrier exists. Similarly, on the back channel side (gate current) of the oxide semiconductor film 359 On the opposite side from the pole, there is also approximately 0.5e at the interface between the oxide semiconductor film 359 and the metal oxide film 371. Energy barriers of V and approximately 0.7 eV exist at the interface between the oxide semiconductor and the metal oxide. In this context, the presence of such an energy barrier means that carriers at the interface Because the movement of the carriers is hindered, the carriers move from the oxide semiconductor film 359 to the metal oxide film 371. It moves through the oxide semiconductor without moving to the metal oxide film 373. In other words, it moves through the oxide. The semiconductor film 359 is made of a material whose band gap increases in steps compared to oxide semiconductors (here Therefore, by sandwiching the carrier between a metal oxide film and an insulating film, the carrier is located in the oxide semiconductor. It moves through the membrane.

[0147] There are no particular limitations on the method for producing the metal oxide film 371 and the metal oxide film 373. For example, Metal oxide film 371 and A metal oxide film 373 can be fabricated. Furthermore, it is said to be resistant to contamination by hydrogen, water, etc. In terms of performance, sputtering is a suitable method. On the other hand, in terms of improving film quality, Plasma CVD is suitable. Also, metal oxide film 371 and metal oxide film 37 3. When using a Ga-Zn-O based metal oxide film, by using zinc, the Since the conductivity of metal oxides has improved, they can be fabricated using the DC sputtering method. can.

[0148] Furthermore, the semiconductor device according to the present invention is limited to the transistor 160 shown in Figure 11(A). It is not that. For example, a structure like transistor 170 shown in Figure 11(B) is also acceptable. The transistor 170 is provided with an underlayer insulating film 353 on the substrate 351, and the underlayer insulating film A metal oxide film 371 provided on 353, and an oxide provided on the metal oxide film 371 A semiconductor film 359 and a so that is in contact with the upper and side surfaces of the oxide semiconductor film 359 - Electrode 361a and drain electrode 361b, and provided on the oxide semiconductor film 359 The gate insulating film 363 and the oxide semiconductor film 359 are superimposed on the gate insulating film 363. It has a gate electrode 365 and an insulating film 369 provided on the gate electrode 365. In other words, transistor 170 has a metal between the oxide semiconductor film 359 and the gate insulating film 363. It differs from transistor 160 in that it does not have an oxide film 373.

[0149] Alternatively, a structure like transistor 180 shown in Figure 11(C) may be used. Ta 180 is provided on the substrate 351 and on the substrate 353 The oxide semiconductor film 359 is made, and the upper surface and side surface of the oxide semiconductor film 359 are in contact with each other. The provided source electrode 361a and drain electrode 361b, and the oxide semiconductor film 359 A metal oxide film 373 is provided on the metal oxide film 373, and a gate insulating film 3 is provided on the metal oxide film 373. 63 and the gate electrode provided on the gate insulating film 363 superimposed on the oxide semiconductor film 359 It has a 365 and an insulating film 369 provided on the gate electrode 365. In the STA 180, a metal oxide film 371 is placed between the underlying insulating film 353 and the oxide semiconductor film 359. It differs from transistor 160 in that it does not have this feature.

[0150] Furthermore, in this embodiment, the transistors shown in Figures 11(A) to 11(C) are , it has a top gate structure, and the source electrode 361a and drain electrode 361b are made of oxide The structure is such that it is in contact with the upper and side surfaces of the semiconductor film 359, but the semiconductor device according to the present invention This is not limited to the above. In the above embodiment, Figures 10(A) to 10(C) Similar to the transistor shown in ), it may have a bottom gate structure, or an oxide semiconductor The body membrane 359 is in contact with the upper and side surfaces of the source electrode 361a and the drain electrode 361b. The structure may be designed in such a way.

[0151] The configurations and methods described in this embodiment are similar to those described in other embodiments. They can be used in combination as appropriate.

[0152] (Embodiment 4) In this embodiment, at least a part of the drive circuit and a tracer placed in the pixel area are placed on the same substrate. An example of how to manufacture a generator is described below.

[0153] The transistors placed in the pixel area are formed according to Embodiment 2 or 3. Since the transistor can easily be made into an n-channel type, the drive circuit is an n-channel type. A portion of the drive circuit, which can be constructed using transistors, is on the same substrate as the transistors in the pixel section. Formed on top. Thus, the transistors shown in the previous embodiment are used for the pixel section and the driving circuit. This allows us to provide a highly reliable display device.

[0154] An example of a block diagram of an active-matrix display device is shown in Figure 29(A). On the substrate 500 are a pixel section 501, a first scan line drive circuit 502, and a second scan line drive circuit. It has a path 503 and a signal line drive circuit 504. Multiple signal lines are driven by the signal line drive circuit in the pixel section 501. Extending from the drive circuit 504, multiple scan lines are arranged in the first scan line drive circuit 502, It is arranged as an extension from the scan line drive circuit 503. In the intersection region of the scan line and the signal line Each of these has pixels, each containing a display element, arranged in a matrix. Board 500 has connection parts for FPC (Flexible Printed Circuit), etc. It is connected to a timing control circuit (also called a controller or control IC) via this.

[0155] Figure 29(A) shows the first scan line drive circuit 502, the second scan line drive circuit 503, and the signal The line drive circuit 504 is formed on the same substrate 500 as the pixel unit 501. Therefore, externally Since the number of components such as drive circuits is reduced, costs can be lowered. 500 If an external drive circuit is installed, it becomes necessary to extend the wiring, increasing the number of connections between wires. It is possible to reduce the number of connections between the wiring when the drive circuit is placed on the same circuit board 500. This can lead to improved reliability or increased yield.

[0156] Furthermore, an example of the circuit configuration of the pixel section is shown in Figure 29(B). Here, a VA-type liquid crystal display panel This shows the pixel structure of the element.

[0157] This pixel structure has multiple pixel electrode layers in a single pixel, and each pixel electrode layer has a tracer The transistors are connected. Each transistor is configured to be driven by a different gate signal. This is achieved. In other words, in a multi-domain designed pixel, each pixel electrode layer It has a configuration that allows for independent control of the applied signal.

[0158] The gate wiring 512 of transistor 516 and the gate wiring 513 of transistor 517 These are separated so that different gate signals can be applied. On the other hand, the data line is The source electrode layer or drain electrode layer 514 that functions is connected to the transistor 516. It is commonly used in transistor 517. Transistors 516 and 517 were implemented in the previous implementation. Transistors shown in the form can be used as appropriate. This allows for a highly reliable liquid crystal display. A display panel can be provided.

[0159] A first pixel electrode layer electrically connected to transistor 516, and a transistor 517 and an electric The shape of the second pixel electrode layer, which is electrically connected, is different and separated by a slit. The second pixel electrode layer is formed so as to surround the outside of the first pixel electrode layer, which spreads out in a V-shape. The timing of the voltage applied to the first and second pixel electrode layers is controlled by the transistor. The orientation of the liquid crystal is controlled by varying the properties of transistors 516 and 517. Transistor 516 is connected to gate wiring 512, and transistor 517 is connected to gate wiring 51 It is connected to 3. Gate wiring 512 and gate wiring 513 provide different gate signals. This allows the operating timing of transistors 516 and 517 to be different. Cut.

[0160] Furthermore, the capacitive wiring 510, the gate insulating film which functions as a dielectric, and the first pixel electrode layer Alternatively, a retained capacitance is formed by a capacitive electrode electrically connected to the second pixel electrode layer.

[0161] The first pixel electrode layer, the liquid crystal layer, and the counter electrode layer overlap, so that the first liquid crystal element 518 It is formed. Furthermore, the second pixel electrode layer, the liquid crystal layer and the counter electrode layer overlap, Two liquid crystal elements 519 are formed. Also, one pixel contains a first liquid crystal element 518 and a second liquid crystal element. It is a multi-domain structure in which a crystal element 519 is provided.

[0162] Note that the pixel configuration shown in Figure 29(B) is not limited to this. For example, in Figure 29(B) A new switch, resistor, capacitive element, transistor, sensor, or logic circuit is added to the indicated pixel. You may add things like this.

[0163] Furthermore, an example of the circuit configuration of the pixel section is shown in Figure 29(C). Here, an organic EL element is used. This shows the pixel structure of the display panel.

[0164] Organic EL elements emit electrons and positive voltages from a pair of electrodes when a voltage is applied to the light-emitting element. Each pore is injected into a layer containing a luminescent organic compound, and an electric current flows through it. The recombination of carriers (electrons and holes) causes the luminescent organic compound to form an excited state. It then emits light when the excited state returns to the ground state. From this mechanism, These light-emitting elements are called current-excited light-emitting elements.

[0165] Figure 29(C) shows an example of a semiconductor device with a pixel configuration to which digital time-gradation driving can be applied. This is a diagram showing an example.

[0166] This section describes the pixel configuration and operation to which digital time-based grayscale driving can be applied. So, an n-channel transistor that uses an oxide semiconductor layer as the channel formation region is one example. Here's an example of using two of them directly.

[0167] Pixel 520 includes a switching transistor 521, a driving transistor 522, and a light emitter. It has element 524 and capacitive element 523. The switching transistor 521 is The source electrode layer is connected to scan line 526, and the first electrode (source electrode layer and drain electrode layer) is connected to scan line 526. The other side is connected to the signal line 525, and the second electrode (the other side of the source electrode layer and drain electrode layer) It is connected to the gate electrode layer of the drive transistor 522. In this configuration, the gate electrode layer is connected to the power line 527 via a capacitive element 523, and the first electrode is connected to the power line It is connected to 527, and the second electrode is connected to the first electrode (pixel electrode) of the light-emitting element 524. The second electrode of the light-emitting element 524 corresponds to the common electrode 528. The common electrode 528 is on the same substrate. It is electrically connected to the common potential line formed above.

[0168] The switching transistor 521 and the driving transistor 522 are as described in the previous embodiment. The transistors shown can be used as appropriate. This allows for highly reliable organic EL elements. A display panel using this method can be provided.

[0169] Furthermore, a low power supply potential is set for the second electrode (common electrode 528) of the light-emitting element 524. Note that the low power supply potential is defined as the low power supply potential relative to the high power supply potential set on power line 527. <This is a potential that satisfies the high power supply potential, and low power supply potentials such as GND and 0V are set. It is acceptable if it is. The potential difference between this high power supply potential and the low power supply potential is applied to the light-emitting element 524. In order to make the light-emitting element 524 emit light by passing current through it, high power supply potential and low power supply potential The potential difference between each position is set to be greater than or equal to the forward threshold voltage of the light-emitting element 524. Set it.

[0170] Note that the capacitive element 523 can be omitted by substituting the gate capacitance of the drive transistor 522. It is also possible. Regarding the gate capacitance of the drive transistor 522, the channel formation region A capacitance may be formed between the gate electrode layer and the gate electrode layer.

[0171] In the case of a voltage input voltage drive method, the gate electrode layer of the drive transistor 522 This results in two states: the drive transistor 522 is either fully on or completely off. A video signal is input. In other words, the driver transistor 522 operates in the linear region. The driver transistor 522 operates in the linear region, so the voltage is higher than that of the power supply line 527. A voltage is applied to the gate electrode layer of the drive transistor 522. The signal line 525 is connected to... Apply a voltage equal to or greater than (power line voltage + Vth of drive transistor 522).

[0172] Furthermore, when using analog gradation drive instead of digital time gradation drive, the signal input is different. By doing so, the same pixel configuration as in Figure 29(C) can be used.

[0173] When performing analog grayscale driving, the gate electrode layer of the driving transistor 522 is equipped with an luminescent element 5 Apply a forward voltage of 24 + a voltage greater than or equal to the Vth of the drive transistor 522. (Light-emitting element 5) The forward voltage of 24 refers to the voltage required to achieve the desired brightness, and at least the forward voltage is This includes key voltages. Note that the video will be in a state where the drive transistor 522 operates in the saturation region. By inputting a signal, current can be supplied to the light-emitting element 524. (Driver transistor) To operate 522 in the saturation region, the potential of the power line 527 is set to the drive transistor 522 The gate potential is made higher than the gate potential. By making the video signal analog, the light-emitting element 524 is made higher. By supplying current according to the audio signal, analog grayscale driving can be performed.

[0174] Note that the pixel configuration shown in Figure 29(C) is not limited to this. For example, in Figure 29(C) A new switch, resistor, capacitive element, sensor, transistor, or logic circuit may be added to the indicated pixel. You can add any of these.

[0175] (Embodiment 5) The semiconductor devices disclosed herein are applicable to a variety of electronic devices (including gaming machines). This can be done. As for electronic devices, for example, television equipment (television, or television) (Also called a receiver), computer monitors, digital cameras, digital video cameras Cameras such as Mera, digital photo frames, mobile phones (also known as mobile phones or mobile phone devices) (u) Portable game consoles, personal information terminals, sound playback devices, and large game machines such as pachinko machines. Examples include the above. An example of an electronic device equipped with the display device described in the above embodiment will be explained. I will reveal it.

[0176] Figure 30(A) shows a portable information terminal, consisting of a main unit 1001, a housing 1002, and a display unit 10 It consists of 03a, 1003b, etc. The display unit 1003b is a touch panel. The screen is accessible by touching the keyboard buttons 1004 displayed on the display unit 1003b. It can be operated and text can be entered. Of course, the display unit 1003a can be configured as a touch panel. It may be done. The transistor shown in the previous embodiment can be used as a switching element for a liquid crystal panel. By fabricating a light or organic light-emitting panel and applying it to the display units 1003a and 1003b, It can be used as a highly reliable portable information terminal.

[0177] The portable information terminal shown in Figure 30(A) can display various types of information (still images, videos, text images, etc.). Functions to display (date, time, etc.), a calendar, a function to display the date or time on the display unit, Functions to manipulate or edit displayed information, and processing by various software (programs). It can have functions to control, etc. Furthermore, external connection terminals can be located on the back or sides of the housing. The system may also include features such as an earphone jack, a USB port, and a recording medium insertion slot.

[0178] Furthermore, the portable information terminal shown in Figure 30(A) is configured to send and receive information wirelessly. This is also good. You can purchase desired book data, etc., from an e-book server wirelessly and download it. It is also possible to configure it as follows.

[0179] Figure 30(B) shows a portable music player, the main unit 1021 having a display unit 1023 and earpieces. A fixing part 1022 for mounting, a speaker, an operation button 1024, and an external memory slot. The transistor shown in the previous embodiment is used as a switching element. By manufacturing liquid crystal panels and organic light-emitting panels as sub-units and applying them to the display unit 1023, This can make it a more reliable portable music player.

[0180] Furthermore, the portable music player shown in Figure 30(B) includes an antenna, microphone function, and wireless function. By having the user hold it and connecting it to their mobile phone, they can wirelessly control their hands while driving a car or other vehicle. Conversations in Lee are also possible.

[0181] Figure 30(C) shows a mobile phone, which consists of two housings, housing 1030 and housing 1031. The enclosure 1031 contains a display panel 1032, a speaker 1033, and a microphone. Phone 1034, pointing device 1036, camera lens 1037, external connection terminal It is equipped with components such as the sub-component 1038. Additionally, the housing 1030 contains a solar cell for charging mobile phones. It is equipped with cell 1040, external memory slot 1041, etc. The antenna is located on the housing 1 031 is built into the interior. The transistor shown in the previous embodiment is displayed on the display panel 103 By applying method 2, a highly reliable mobile phone can be created.

[0182] Furthermore, the display panel 1032 is equipped with a touch panel, and Figure 30(C) shows an image display. Multiple operation keys 1035 are shown with dotted lines. Note that the solar cell 1040 A boost circuit is also implemented to increase the applied voltage to the voltage required for each circuit.

[0183] For example, power transistors used in power supply circuits such as boost converters are also in the above embodiment. The transistor shown is formed by setting the thickness of the oxide semiconductor film to between 2 μm and 50 μm. It is possible.

[0184] The display panel 1032 changes its orientation as appropriate depending on the usage mode. Since the camera lens 1037 is located on the same plane as the 1032, video calls are possible. Yes. Speaker 1033 and microphone 1034 are not limited to voice calls, but also to video calls. It can record, play back, and more. Furthermore, housings 1030 and 1031 slide apart. As shown in Figure 30(C), it can be changed from an unfolded state to an overlapping state, and can be used on a mobile phone. Suitable miniaturization is possible.

[0185] External connection terminal 1038 can be connected to various cables such as AC adapters and USB cables. It is capable of charging and data communication with personal computers, etc. By inserting a recording medium into the memory slot 1041, it is possible to store and move larger amounts of data. Cut.

[0186] Furthermore, in addition to the above functions, it is equipped with infrared communication functions, television reception functions, etc. That's good too.

[0187] Figure 30(D) shows an example of a television system. The television system 1050 is The display unit 1053 is incorporated into the housing 1051. The display unit 1053 displays images. It is possible to demonstrate this. Also, here, the enclosure is enclosed by a stand 1055 with a built-in CPU. This shows the configuration supporting the body 1051. The transistor shown in the previous embodiment is used for the display unit. By applying this to 1053, a highly reliable television device 1050 can be made. Cut.

[0188] The television device 1050 is operated using the control switches on the housing 1051, or a separate control unit. This can be done using the remote control unit. Alternatively, the remote control unit can be connected to the remote control unit. The system may also be configured to include a display unit that shows the output information.

[0189] The television system 1050 will be configured to include a receiver, modem, and other components. This allows for the reception of regular television broadcasts, and furthermore, wired or wireless connections are available via the modem. By connecting to a communication network, one-way (sender to receiver) or two-way communication is possible. It is also possible to perform two-way information communication (between a sender and receiver, or between receivers, etc.). .

[0190] Furthermore, the television device 1050 also has an external connection terminal 1054 and a storage medium playback and recording unit 1 052, It has an external memory slot. External connection terminal 1054 is a USB cable. It can be connected to various types of cables and enables data communication with personal computers and other devices. In the storage medium playback recording unit 1052, a disc-shaped recording medium is inserted, and the recording medium It is possible to read stored data and write to the storage medium. Also, external memory Images, videos, etc., stored in the external memory 1056 inserted into the reslot. It is also possible to display the information on the display unit 1053.

[0191] Furthermore, the semiconductor device shown in the previous embodiment can be applied to the external memory 1056 and the CPU. This results in a highly reliable television device 1050 with significantly reduced power consumption. It is possible. [Examples]

[0192] In this embodiment, various measurement methods are used to determine the oxide semiconductor film or the acid according to the present invention. This section describes the results of measurements performed on semiconductor devices using ionized semiconductor films.

[0193] <1. Observation of TEM images using TEM, measurement of electron diffraction intensity, and XRD measurement> In this section, an oxide semiconductor film is fabricated according to the previously described embodiment, and the oxide semiconductor film is... Transmission electron microscope (TEM) The results of observations using a scope will be explained.

[0194] In this section, an oxide semiconductor film is deposited on a quartz substrate using the sputtering method, and a sample is generated. Samples A, B, C, D, and E were prepared. The substrate temperatures during film deposition for samples B, C, D, and E were, respectively, The temperatures used were room temperature, 200°C, 250°C, 300°C, and 400°C. In other words, Sample A and Sample B was obtained by lowering the substrate temperature during film formation compared to the film formation method shown in Embodiment 2, and Sample C For sample E, the substrate temperature was within the range described in the film deposition method shown in Embodiment 2. The target for semiconductor film deposition is In2O3:Ga2O3:ZnO=1:1:2 [number of moles] A material with the following composition ratio was used. Other film deposition conditions included setting the deposition gas flow rate to argon gas 30 The mixture consisted of sccm of gas and 15 sccm of oxygen, at a pressure of 0.4 Pa, with a substrate-target distance of 6. The device was set to 0 mm and the radio frequency (RF) power supply to 0.5 kW. Note that Sample A, Sample B, and S Sample E was deposited with a target film thickness of 50 nm, while Samples C and D were deposited with a film thickness of 100 nm. The film was deposited with that goal in mind.

[0195] Furthermore, after the oxide semiconductor film is formed, the quartz substrate on which the oxide semiconductor film is formed is subjected to heat treatment. The heat treatment was carried out in a dry atmosphere with a dew point of -24°C, at a heating temperature of 450°C. The process was carried out over a one-hour interval. In this way, an oxide semiconductor film was deposited on a quartz substrate, and the sample was prepared. Samples A, B, C, D, and E were prepared.

[0196] Furthermore, unlike samples A through E, the two-step method shown in Embodiment 2 is used. Sample F was prepared by depositing an oxide semiconductor film. Sample F was first prepared with a film thickness of 5 nm. A first oxide semiconductor film is formed, the first oxide semiconductor film is subjected to a first heat treatment, and the first acid A second oxide semiconductor film with a thickness of 30 nm is deposited on the oxide semiconductor film, and the first oxide semiconductor film The second oxide semiconductor film was then subjected to a second heat treatment to create the second film.

[0197] Here, the target for depositing the first oxide semiconductor film is In2O3:Ga2O3:ZnO A composition ratio of 1:1:2 [molar ratio] was used. Other film deposition conditions included the deposition gas. The flow rates were set to 30 sccm of argon gas and 15 sccm of oxygen gas, with a pressure of 0.4 Pa. The distance between the plate and target was set to 60 mm, and the radio frequency (RF) power supply to 0.5 kW. In addition, the first addition The heat treatment conditions were a nitrogen atmosphere, a heating temperature of 650°C, and a heating time of 1 hour.

[0198] Furthermore, the deposition target for the second oxide semiconductor film is In2O3:Ga2O3:ZnO= A composition ratio of 1:1:2 [molar ratio] was used. Other film deposition conditions included the deposition gas flow. The quantities were 30 sccm of argon gas and 15 sccm of oxygen gas, at a pressure of 0.4 Pa, and the substrate... - The target distance was set to 60 mm, and the radio frequency (RF) power supply to 0.5 kW. Also, the second heating... The processing conditions were: heating temperature 650°C for 1 hour in a dry atmosphere with a dew point of -24°C. Ta.

[0199] In this way, an oxide semiconductor film was deposited on a silica substrate using the two-step method. I built the Pull F.

[0200] Furthermore, as a comparison target for samples A through F, yttria-stabilized zirconia (Y Sample G was prepared by depositing an IGZO single crystal film with a thickness of 150 nm on a substrate (SZ). .

[0201] For the above samples A through G, oxide semiconductor films were deposited using TEM. The electron beam is irradiated perpendicularly to the substrate, that is, parallel to the c-axis direction in the previous embodiment. TEM images and electron diffraction patterns were then captured. Figures 13(A) to 13(E) The cross-sectional TEM images of samples A to E are shown below. Here, the cross shown in Figure 13 In a surface TEM image, the top of the paper plane is the surface direction of the sample, so the vertical direction of the paper plane is the c-axis direction and In addition, Figures 14(A) to 14(E) show planar TEM images of samples A to E. These are shown below. Here, in the planar TEM image shown in Figure 14, the front side of the paper is the surface of the sample. Since it is the direction, the direction perpendicular to the plane of the paper becomes the c-axis direction. Also, Figures 15(A) to 15( Figure E) shows the electron diffraction patterns of samples A through E, respectively. Here, Figure 1 In the electron diffraction pattern shown in 5, the front side of the paper faces the surface direction of the sample, so the vertical side of the paper is perpendicular to the surface. The straight direction is the c-axis direction. Also, in Figures 16(A) and 16(B), sample F and The planar TEM images of sample G are shown. Figure 16(C) shows the electron diffraction pattern of sample F. The turn is shown. Figures 16(D) and 16(E) show the electron diffraction patterns of sample G. Here, the planar TEM image and electron diffraction pattern shown in Figure 16 are obtained when the front side of the paper is sun Since the direction of the pull is the surface direction, the direction perpendicular to the paper surface becomes the c-axis direction.

[0202] Note that in this section, the cross-sectional TEM images, planar TEM images, and electron diffraction patterns are provided by [company name / organization name]. Using the H-9000NAR manufactured by Hitachi High-Technologies Corporation, the spot diameter of the electron beam was adjusted. The image was taken with a 1nm size and an acceleration voltage of 300kV.

[0203] The cross-sectional TEM images shown in Figures 13(C) to 13(E) show that the c-axis is oriented, indicating crystalline properties. A region was observed, but in the cross-sectional TEM images shown in Figures 13(A) and 13(B), A region exhibiting crystalline properties with a c-axis orientation was not clearly observed. Therefore, it is not an oxide semiconductor. By setting the substrate temperature during film deposition to more than 200°C, preferably 250°C or higher, the c-axis It can be seen that a region with oriented crystallinity is formed in the oxide semiconductor film. Regions with crystalline properties where the c-axis is oriented are clearly visible in the order of 13(C) to 13(E) in Figure 13. Therefore, the higher the substrate temperature during the deposition of the oxide semiconductor film, the higher the crystallinity of the oxide semiconductor film. It is presumed that it will decrease.

[0204] In the planar TEM image shown in Figure 14(E), atoms arranged in a hexagonal lattice were observed. Furthermore, the hexagonal grid is also visible in the planar TEM images shown in Figures 14(C) and 14(D). A faint arrangement of atoms was observed. Planar TE shown in Figures 14(A) and 14(B). In the M image, atoms arranged in a hexagonal lattice were not clearly observed. Furthermore, In the planar TEM images shown in Figures 16(A) and 16(B), the arrangement is also hexagonal in a grid pattern. Atoms were observed. This indicates a region in the oxide semiconductor film where the c-axis is oriented and crystalline. It is presumed that it readily adopts a hexagonal crystal structure with triple symmetry, as shown in Figure 2. Furthermore, sample F, prepared using the two-step method, is similar to samples C through E. It was found that crystalline regions were formed within the oxide semiconductor film. (See Figure 13) Similar to the observation results of the cross-sectional TEM image, the higher the substrate temperature during deposition of the oxide semiconductor film, It is presumed that the crystallinity of the oxide semiconductor film will increase. Observations of Figures 13 and 14 above. Therefore, samples A and B are oxidation of an amorphous structure with almost no crystalline properties. These are semiconductor films, and samples C to F contain regions with crystalline properties where the c axis is oriented. It can be seen that it is an oxide semiconductor film.

[0205] The electron diffraction patterns shown in Figures 15(A) to 15(E) have a wide diffraction pattern width. It has a blurred, concentric circle halo pattern, and the outer part is more blurred than the inner halo pattern. The halo pattern shows a weaker electron diffraction intensity. Furthermore, Figures 15(A) to 1 A trend was observed where the electron diffraction intensity of the outer halo pattern increased in the order of 5(E). Furthermore, the electron diffraction pattern shown in Figure 16(C) also forms a concentric halo pattern. However, compared to Figures 15(A) to 15(E), the width of the halo pattern is narrower, and the inner halo The electron diffraction intensities of the low pattern and the outer halo pattern are almost identical.

[0206] Furthermore, the electron diffraction pattern shown in Figure 16(D) is similar to those in Figures 15(A) to 15(E). Unlike Figure 16(C), a spot-like electron diffraction pattern appears. Figure 16(D) Figure 16(E) shows the electron diffraction pattern after image processing to create a concentric circular pattern. However, unlike Figures 15(A) to 15(E) and 16(C), the concentric circles The turn is too narrow to form a halo. Also, the outer part is outside the inner concentric pattern. In addition to the fact that the concentric circular pattern shows a stronger electron diffraction intensity, Figure 15(A ) This differs from the electron diffraction patterns shown in Figures 15(E) and 16(C).

[0207] Figure 17 shows graphs of the electron diffraction intensity of samples A to G. Rough plots electron diffraction intensity (in arbitrary units) on the vertical axis and the magnitude of the sample's scattering vector on the horizontal axis. The size is taken as (1 / d [1 / nm]). Note that the magnitude of the scattering vector is (1 / d [1 / nm]). ) where d corresponds to the interplanar spacing of the crystal in the crystal. Here the magnitude of the scattering vector (1 / d) shows the concentricity of the diffracted waves from the central transmitted wave spot in the electron diffraction pattern film. The distance r to the circular pattern and the distance between the sample and the film in TEM are given by r and kame. It can be expressed using the following formula, where L is the length of the electron beam and λ is the wavelength of the electron beam irradiated by TEM.

[0208]

number

[0209] In other words, the magnitude (1 / d) of the scattering vector shown on the horizontal axis of Figure 17 is the same as in Figures 15(A) to Figure 17. In the electron diffraction patterns shown in Figures 15(E), 16(C), and 16(E), the center It is a quantity proportional to the distance r from the spot of the transmitted wave to the concentric pattern of the diffracted wave.

[0210] In other words, in the graph shown in Figure 17, Figures 15(A) to 15(E) and 16(C) and corresponds to the inner halo pattern in the electron diffraction pattern shown in Figure 16(E). The peak is at 3.3nm. -1 ≤1 / d ≤4.1nm -1 This is the first peak in the region, and on the outside The peak corresponding to the halo pattern is 5.5nm. -1 ≤1 / d ≤7.1nm -1 in This is the second peak.

[0211] Figures 18 and 19 show the half-values ​​of the first and second peaks of samples A through G. The graph shows the full width. The graph shown in Figure 18 has the full width at half maximum (FWHM) of the first peak on the vertical axis. m -1 The horizontal axis of the graph shows the substrate temperature (°C) during film deposition for samples A through E. Also, the dotted lines in the graph of FIG. 18 respectively represent the first peaks of Sample F and Sample G. The values of the full width at half maximum of these peaks are shown. Similarly to FIG. 18, the graph shown in FIG. 19 also represents the full width at half maximum of the second peak. In addition, Table 1 shows a summary of the peak positions (nm ) and the full width at half maximum (nm -1 ) of the first peak and the second peak shown in FIGS. 18 and 19. -1 )

[0212]

Table 1

[0213] From FIGS. 18 and 19, it was shown that for both the first peak and the second peak, as the substrate temperature during the formation of the oxide semiconductor film increases, the full width at half maximum of the peak decreases and the peak position tends to decrease. Also, it was shown that for both the first peak and the second peak, the full width at half maximum of the peak does not change significantly when the substrate temperature during film formation ranges from 300°C to 400 °C. Furthermore, for both the first peak and the second peak, the full width at half maximum and the peak position of Sample F formed using the 2-step method were smaller than those of Samples A to E and larger than those of Sample G which is a single crystal. Since the oxide semiconductor film including a region having c-axis oriented crystallinity has different crystallinity from Sample G having a single crystal structure, in the electron diffraction intensity measurement by irradiating an electron beam from the c-axis direction, the full width at half maximum at the first peak and the second peak is 0.2 nm or more, preferably the full width at half maximum of the first peak is 0.4 nm

[0214] or more, and the full width at half maximum of the second peak is 0.45 nm or more. It can be said that -1 -1 -1 ​​​​

[0215] Furthermore, Figures 13 and 14 show the substrate temperature during film formation for Sample A and Sample B. Considering that oxide semiconductor films at temperatures below 200°C did not exhibit clear crystallinity, An oxide semiconductor film containing a region having crystalline properties with the c axis oriented is irradiated with an electron beam from the c axis direction. In the electron diffraction intensity measurement, the full width at half maximum of the first peak was 0.7 nm. -1 The following is the second part The full width at half maximum of the shadow is 1.4 nm. -1 It is preferable that the following conditions are met.

[0216] Furthermore, X-ray diffraction (XRD:X) was performed on samples A, E, and G. -ray diffraction) measurements were performed to supplement the TEM measurement results mentioned above. The following measurement results were obtained.

[0217] Figure 20 shows the results for samples A and E using the out-of-plane method. The results of measuring the XRD spectrum are shown. Figure 20 shows the X-ray diffraction intensity (in arbitrary units) on the vertical axis. Next, we take a rotation angle of 2θ (deg.) on the horizontal axis.

[0218] As shown in Figure 20, a strong peak is observed near 2θ=30° in sample E, whereas In Sample A, it can be seen that there is almost no peak near 2θ = 30°. This is due to diffraction in the (009) plane of the IGZO crystal. Sample E is an oxide semiconductor film containing a region having crystalline properties with the c axis oriented, and amorphous It is clear that this is distinctly different from sample A, which has a s-structure.

[0219] Furthermore, Figure 21(A) shows the XRD spectrum of sample E obtained using the in-plane method. The results of the measurement are shown. Similarly, the in-plane method for sample G is shown in Figure 21(B). The results of measuring the XRD spectrum using [the specified method] are shown. Figures 21(A) and 21(B) are shown below. The vertical axis represents X-ray diffraction intensity (in arbitrary units), and the horizontal axis represents the rotation angle φ (degrees). In the in-plane method used in the example, the c-axis direction of the sample is used as the axis of rotation. XRD measurements were performed while the sample was rotated at a rotation angle of φ.

[0220] The XRD spectrum of sample G shown in Figure 21(B) is equal at exactly 60° rotation intervals. The presence of interval peaks indicates that sample G is a single crystal film with six-fold symmetry. In contrast, the XRD spectrum of sample E shown in Figure 21(A) is regular. It was found that there are no peaks, and no orientation in the ab-plane direction is observed in the crystalline region. In other words, sample E exhibits crystallinity with respect to the c-axis in each crystalline region. Although it is transformed, it is not necessarily aligned with respect to the ab plane. From this, the sample E is an oxide semiconductor film containing a region with crystalline properties oriented along the c axis, but it has a single-crystal structure. It is clear that this is distinctly different from sample G.

[0221] Based on the above, the oxide semiconductor film according to the present invention, which includes a region having crystalline properties with the c axis oriented, is It is clearly different from both amorphous oxide semiconductor films and single-crystal oxide semiconductor films. It can be said that it possesses crystalline properties.

[0222] The oxide semiconductor film containing a region having crystalline properties with the c axis oriented as described above is entirely Because it has good crystallinity compared to amorphous oxide semiconductor films, it is characterized by oxygen vacancies. Defects such as those mentioned above, and impurities such as hydrogen that bind to dangling bonds, have been reduced. These are defects such as oxygen vacancies, and hydrogen atoms that bond to dangling bonds, etc. These, for example, function as carrier sources in oxide semiconductor films, and therefore the oxide semiconductor... This can cause fluctuations in the electrical conductivity of the film. Therefore, reducing these factors and improving crystallinity is important. Oxide semiconductor films containing regions exhibit stable electrical conductivity, such as visible light and ultraviolet light. It has a more electrically stable structure even when exposed to irradiation. It includes regions with such crystalline properties. By using oxide semiconductor films in transistors, a transistor with stable electrical characteristics can be produced. We can provide highly reliable semiconductor devices.

[0223] <2. ESR Measurement> In this section, an oxide semiconductor film is fabricated according to the previously described embodiment, and the oxide semiconductor film is... Using the electron spin resonance (ESR) method I will now explain the results of the evaluation.

[0224] This section describes a sample obtained by depositing an oxide semiconductor film on a quartz substrate using the sputtering method. Sample I, which is a quartz substrate on which the oxide semiconductor film has been deposited, has been subjected to heat treatment. The following was fabricated: The target for deposition of the oxide semiconductor film was In2O3:Ga2O3:ZnO=1 A composition ratio of 1:2 [molar ratio] was used. Other film deposition conditions included the deposition gas flow rate. The gases used were 30 sccm of argon and 15 sccm of oxygen, and the substrate temperature during film deposition was 400°C. Pressure 0.4 Pa, substrate-target distance 60 mm, radio frequency (RF) power supply 0.5 kW, The film thickness was set to 100 nm.

[0225] For sample I, after further deposition of the oxide semiconductor film, the oxide semiconductor film was deposited... A quartz substrate was subjected to heat treatment. The heat treatment was carried out in a dry atmosphere with a dew point of -24°C. The process was carried out at a temperature of 450°C for 1 hour. In this way, the oxide semiconductor film was laid on a quartz substrate. Samples H and I were prepared by depositing a film on top of the above.

[0226] In this section, ESR measurements will be performed on samples H and I. ESR measurement is a method for measuring lone electrons in a material that utilizes the Zeeman effect. By sweeping the magnetic field H applied to the sample while irradiating it with microwaves of a constant frequency ν, In a specific magnetic field H, lone electrons in the sample absorb microwaves and move parallel to the magnetic field. It transitions from an energy level of spin that is parallel to the magnetic field to an energy level of spin that is antiparallel to the magnetic field. The frequency ν of the microwave absorbed by the lone electron in the sample and the magnetic field H acting on the sample. The relationship can be expressed by the following equation.

[0227]

number

[0228] Here, h is Planck's constant, μ B This is a Bohr magneton. And g is a coefficient called the g-value. Therefore, the g value changes depending on the local magnetic field acting on an isolated electron in the material, that is, from the above equation, the g value By doing so, we can learn about the environment of lone electrons, such as dangling bonds.

[0229] In this embodiment, ESR measurement was performed using a Bruker E500, and the measurement conditions were as follows: The constant temperature was set to room temperature, the microwave frequency to 9.5 GHz, and the microwave power to 0.2 mW.

[0230] The results of ESR measurements performed on samples H and I are shown in Figure 22. As shown in Figure 22, the graph has the first derivative of the microwave absorption intensity on the vertical axis and the horizontal axis The g-value is taken.

[0231] As shown in the graph in Figure 22, in sample I, the signal corresponding to microwave absorption is Although not observed, sample H corresponds to microwave absorption near g=1.93. A signal was observed. By calculating the integral value of the signal in the vicinity of g=1.93, The spin density of the isolated electron corresponding to the absorption of the microwave is 1.3 × 10⁻¹⁰. 18 (spins / cm 3 ) is required. Note that in Sample I, microwave absorption is below the detection limit. Therefore, the spin density of the lone electron in sample I is 1 × 10⁻¹⁶. 16 (spin s / cm 3 ) The result will be as follows:

[0232] Here, in the In-Ga-Zn-O oxide semiconductor film, the sigma near g=1.93 Quantum chemical calculations were performed to determine which dangling bond the nal belongs to. The specific calculation method involves assuming that metal atoms have dangling bonds corresponding to oxygen vacancies. We create a cluster model like that and perform structural optimization, and then we look at the structurally optimized model. The g-value was calculated.

[0233] Model structural optimization and calculation of the g-value of the structurally optimized model are performed using ADF(Amst We used Erdam Density Functional software. Furthermore, both the structural optimization of the model and the calculation of the g-value of the structurally optimized model involve the functional G. GA:BP was used, with TZ2P as the basis function. Also, the Core Type was set to Mode Large is used for structural optimization of the log, and None is used for calculating the g-value.

[0234] The above quantum chemical calculations revealed that in an In-Ga-Zn-O oxide semiconductor film... A model of the dangling bond is shown in Figure 23. Figure 23 shows the oxygen of the indium-oxygen bond. Dangling bonds due to defects (g=1.984) and oxygen vacancies in gallium-oxygen bonds Dangling bond (g=1.995) and dangling due to oxygen vacancies in zinc-oxygen bond This shows a ring bond (g=1.996). The g values ​​of these dangling bonds are... The signal g corresponding to microwave absorption in sample H is relatively close to 1.93. In other words, in sample H, one of indium, gallium, or zinc Alternatively, it has been suggested that oxygen vacancies may have occurred in the bonding between multiple molecules and oxygen.

[0235] However, in sample I, a signal corresponding to microwave absorption is present near g=1.93. No marks are visible. This is because the oxide semiconductor film is subjected to heat treatment in a dry atmosphere after deposition. This suggests that oxygen has been replenished to the oxygen vacancy. As mentioned above, oxygen vacancies in oxide semiconductor films are carriers that change electrical conductivity. Therefore, by reducing the oxygen vacancies, the use of oxide semiconductor films can be achieved. This can improve the reliability of the generator.

[0236] Therefore, according to one aspect of the present invention, an oxide semiconductor containing a region having c-axis orientation and crystalline properties The body membrane is preferably subjected to heat treatment after deposition to replenish oxygen vacancies, and ESR measurement The spin density near g=1.93 at constant values ​​is 1.3 × 10⁻⁶. 18 (spins / cm 3 )Yo It is preferable that the size be small, and furthermore, that the spin density be 1 × 10⁻⁶ 16 (spins / cm 3 ) or more It is more preferable for it to be lower.

[0237] <3. Low-temperature PL measurement> In this section, an oxide semiconductor film is fabricated according to the previously described embodiment, and the oxide semiconductor film is... Using low-temperature photoluminescence (PL) measurements I will now explain the results of the evaluation.

[0238] In this section, we describe how to deposit an acid film onto a quartz substrate using the sputtering method at a substrate temperature of 200°C. Sample J, on which an oxide semiconductor film was deposited, and a sample on which an oxide semiconductor film was deposited at a substrate temperature of 400°C during film formation. A film-forming sample K was prepared. In other words, sample J is a region with crystalline properties where the c axis is oriented. It is an oxide semiconductor film that does not contain [unclear], and sample K contains a region with crystalline properties where the c axis is oriented. It is an oxide semiconductor film. The target for deposition of oxide semiconductor films is In2O3:Ga2O3 A material with a composition ratio of ZnO = 1:1:2 [molar ratio] was used. Other film deposition conditions were as follows: The film deposition gas flow rates were set to 30 sccm of argon gas and 15 sccm of oxygen gas, and the pressure was 0.4 Pa, substrate-target distance 60mm, radio frequency (RF) power supply 0.5kW, film thickness 100n Let's call it m.

[0239] Furthermore, after the deposition of the oxide semiconductor film, both sample J and sample K were subjected to the deposition of the oxide semiconductor film. A quartz substrate with a film-forming layer was subjected to heat treatment. The heat treatment was carried out in a dry atmosphere with a dew point of -24°C. In this process, the heating temperature was 450°C and the heating time was 1 hour. Samples J and K were prepared by depositing films onto a quartz substrate.

[0240] In this section, low-temperature PL measurements will be performed on samples J and K. In low-temperature PL measurements, the sample is irradiated with excitation light under an extremely low-temperature atmosphere to provide energy. While generating electrons and holes in the sample, the irradiation of the excitation light is stopped, and the excitation light irradiation causes The light emitted by the recombination of electrons and holes is called CCD (Charge Coupled Detection is performed using devices such as [device name].

[0241] In this embodiment, low-temperature PL measurement is performed in a helium gas atmosphere with a measurement temperature of 10K. The excitation light was supplied using a He-Cd gas laser oscillator, irradiating with light of a wavelength of 325 nm. A CCD was used to detect the light emission.

[0242] Figure 2 shows the emission spectra detected by low-temperature PL measurement for samples J and K. This is shown in graph 4. The graph shown in Figure 24 has the PL emission detection count (counts) on the vertical axis. The x-axis represents the detected luminescence energy (eV), and the x-axis represents the luminescence energy (eV).

[0243] From the graph in Figure 24, both sample J and sample K have an emission energy of around 1.8 eV. Although both samples have peaks, sample K has a PL emission detection count of approximately 100 more than sample J. It can be seen that the amount is small. Furthermore, the emission energies of samples J and K are approximately 3.2 eV. The nearby peak originates from the quartz window of the low-temperature PL measuring device.

[0244] Here, the peak near 1.8 eV shown in the graph of Figure 24 represents the vanishing of the oxide semiconductor film. In the conduction band structure, energy levels exist at a depth of approximately 1.8 eV from the lower end of the conduction band. This suggests that the deep energy levels within this band gap correspond to the electronic density of states in Figure 3. The calculation results show that this is consistent with the trap level caused by oxygen vacancies. Therefore, Figure 24 The emission peak near 1.8 eV shown in the graph corresponds to the oxygen deficiency in the band diagram shown in Figure 4. It can be thought of as representing the energy level of the trap level caused by the depression. If the number of emission detection counts near 1.8 eV in sample K is lower than that in sample J, This means that oxide semiconductor films containing regions with c-axis orientation and crystalline properties are more likely to have oxygen vacancies. The number of trap levels causing this is reduced, meaning the number of oxygen vacancies is reduced. This is a possible explanation.

[0245] <4. Measurement of Photographic Negative Bias Degradation> In this embodiment, a transistor using an oxide semiconductor film is fabricated according to the previous embodiment. By applying a negative voltage to the gate while irradiating the transistor with light, stress is applied, and the transistor Results of evaluating the threshold voltage of a transistor, which changes depending on the time of response. Let me explain. Note that this type of stress can change the threshold voltage of a transistor, etc. This is called optical negative bias degradation.

[0246] In this section, the region having crystalline properties with the c axis oriented, as shown in the previous embodiment, is formed. A transistor with an oxide semiconductor film (Sample L) and, as a comparative example, a transistor similar to Sample L. An oxide semiconductor made of the material, but in which a region with c-axis orientation and crystalline properties is not formed. A transistor with a film (sample M) was fabricated. Then sample L and sample When light is shone on the M and a negative voltage is applied to the gate to create stress, The threshold voltages Vth of samples L and M, which vary depending on the interval, were evaluated. Next, we will explain how to prepare samples L and M.

[0247] First, using the plasma CVD method, a silicon nitride film with a thickness of 100 nm was used as the undercoat, A silicon oxide nitride film with a thickness of 150 nm is continuously deposited on a glass substrate, followed by oxidation A tungsten film with a thickness of 100 nm was deposited on a silicon nitride film using the sputtering method. Here, by selectively etching the tungsten film, a tapered shape is obtained. A gate electrode was formed. Then, a gate electrode was formed on the gate electrode using plasma CVD. A silicon oxidoxide-nitride film with a thickness of 100 nm was deposited as an insulating film.

[0248] Next, an oxide semiconductor film was deposited on the gate insulating film using the sputtering method. The oxide semiconductor film of sample L is a 5 nm thick oxide semiconductor film that functions as a seed crystal. A 30 nm thick oxide semiconductor film is stacked on top of it to form a region with crystalline properties where the c axis is oriented. It is formed by heat treatment as described above. The oxide semiconductor film of sample M has a thickness of 25n It is formed by heat treatment of an oxide semiconductor film of size m.

[0249] First, we will explain the method for fabricating the oxide semiconductor film of sample L. The seed crystal functions as... The oxide semiconductor film is deposited using the sputtering method, and the deposition target is In2O A material with a composition ratio of 3:Ga2O3:ZnO = 1:1:2 [molar ratio] was used. The film deposition conditions were: substrate temperature 200°C during deposition, deposition gas flow rate ratio of 50% oxygen gas, and aluminum With a gas concentration of 50%, a pressure of 0.6 Pa, a substrate-to-target distance of 100 mm, and direct current (DC). The power supply was set to 5kW and the film thickness to 5nm. After film formation, the film was heated in a nitrogen atmosphere at a temperature of 450°C for a certain amount of time. The oxide semiconductor film, which functions as a seed crystal, was subjected to a heat treatment for one hour to induce crystallization. Therefore, a sputtering method is used to create a film thickness of 30n on an oxide semiconductor film that functions as a seed crystal. A film of type m, an oxide semiconductor film, is deposited under the same deposition conditions as the oxide semiconductor film that functions as a seed crystal. The heat treatment was performed using an oven under a nitrogen atmosphere at a heating temperature of 450°C for 1 hour. Furthermore, the material was heat-treated in a mixed atmosphere of nitrogen and oxygen at a heating temperature of 450°C for 1 hour. Then, an oxide semiconductor film was formed in which a region having crystalline properties with the c axis oriented was created.

[0250] Furthermore, the oxide semiconductor film of sample M was also deposited using the sputtering method, and the deposition target was... As a result, it has a composition ratio of In2O3:Ga2O3:ZnO = 1:1:2 [molar ratio]. We used the following: Other film deposition conditions included a substrate temperature of 200°C during film deposition and a ratio of acid deposition gas flow rate. The mixture consisted of 50% elemental gas and 50% argon gas, with a pressure of 0.6 Pa and a substrate-target distance of 10°. The film thickness was set to 0 mm, DC power supply 5 kW, and film thickness 25 nm. After film deposition, RTA (Rapid Attenuation) was performed. Using the Thermal Annealing method, heating at a temperature of 650°C under a nitrogen atmosphere. The product is heat-treated for 6 minutes, and then further processed in an oven under a mixed atmosphere of nitrogen and oxygen. Heat treatment is performed at a temperature of 450°C for 1 hour to obtain a region with crystalline properties where the c axis is oriented. An oxide semiconductor film without a defined region was deposited.

[0251] Next, a conductive film is created by stacking a titanium film, an aluminum film, and another titanium film on an oxide semiconductor film. The film is deposited using a sputtering method, and the conductive film is selectively etched to form the source electrode. Then a drain electrode was formed. Next, a 400 nm thick oxide film was applied as the first interlayer insulating film. A acrylic resin film with a thickness of 1.5 μm was deposited as a second interlayer insulating film. The following insulating films were deposited. Finally, under a nitrogen atmosphere, the film was heated at a temperature of 250°C for 1 hour. Samples L and M were prepared by heat treatment.

[0252] For samples L and M described above, a negative voltage was applied to the gate while irradiating it with light. The Id-Vg characteristics of sample L and sample M were determined according to the stress duration. We measured the stress level and determined the change in threshold voltage before and after applying stress.

[0253] The above stress was applied under ambient air at room temperature, with a gate voltage of -20V and a drain voltage of The voltage was set to 0.1V, the source voltage to 0V, and the illuminance of the irradiated light to 36000 (lx). Stress The time intervals are 100 seconds, 300 seconds, 600 seconds, 1000 seconds, 1800 seconds, 3600 seconds, and 720 seconds. Sample L and The Id-Vg characteristics of sample M were measured. When measuring the Id-Vg characteristics, the drain... With a voltage of +10V, the gate voltage is swept from -10V to +10V, and other conditions are as follows: I did the same thing as when I was stressing him.

[0254] Figure 25 shows graphs of the change in threshold voltage for sample L and sample M. The graph shown has the change in threshold voltage ΔVth(V) on the vertical axis and the stress time on the horizontal axis. Take a pause (sec).

[0255] From Figure 25, the change in the threshold voltage ΔVth of sample L is approximately -1V at most. In contrast, the change in threshold voltage ΔVth of sample M can vary by up to approximately -2V. The change in threshold voltage ΔVth for sample L is reduced to approximately half that of sample M.

[0256] This results in an oxide semiconductor film in which a region having crystalline properties with the c axis oriented is formed within the film. The transistor used exhibits more stable electrical characteristics against light irradiation and gate voltage stress. It was shown that it possesses and has improved reliability.

[0257] <5. Measurement using the photoresponse defect evaluation method> In this section, a transistor using an oxide semiconductor film is fabricated according to the previously described embodiment. The photoresponse defect evaluation method was used to assess the stability of the oxide semiconductor film in the transistor against light irradiation. I will now explain the results of the evaluation.

[0258] In this section, sample N was prepared using the same method as sample L and sample M. A photoresponse defect evaluation method was performed using sample O. Photoresponse defect evaluation is a method that evaluates defects in semiconductor films. The relaxation of the electric current (photocurrent) that flows when light is irradiated is measured, and a graph of the photocurrent relaxation is obtained. The relaxation time τ is determined by fitting it to an equation that can be expressed as a linear combination of exponential functions, and the relaxation time τ is This is a method for evaluating defects in the semiconductor film.

[0259] Here, there is a relaxation time τ1 corresponding to a fast response and a relaxation time τ2(τ2) corresponding to a slow response. Using >τ1), the current ID can be expressed as a linear combination of two exponential functions, resulting in the following equation.

[0260]

number

[0261] In the photoresponse defect evaluation method described in this section, after a 60-second dark state, the irradiation light is applied for 600 seconds. The photocurrent was relaxed for 3000 seconds after the irradiation light was stopped. The irradiation light had a wavelength of 400 nm. Intensity 3.5mW / cm 2 The gate electrodes and source electrodes of sample N and sample O are used. The electrodes were fixed at 0V, and a small voltage of 0.1V was applied to the drain electrode to measure the current value of the photocurrent. The channel length L and channel width W of sample N and sample O are L / W = 3. The ratio was set to 0 μm / 10000 μm.

[0262] Figures 26(A) and 26(B) show the photoresponse defect evaluation method for sample N and sample O. The graphs of the change in photocurrent are shown. The graphs shown in Figures 26(A) and 26(B) are: The vertical axis represents the photocurrent ID, and the horizontal axis represents the elapsed time t (sec). Also, Figure 26(A) If we fit the graph shown in Figure 26(B) with an equation that can be expressed as a linear combination of exponential functions, It can be expressed by the following formula.

[0263]

number

[0264]

number

[0265] Figures 26(A) and 26(B) show an oxidation region containing a crystalline area with the c axis oriented. Sample N, which has a monosemiconductor film, has a smaller maximum photocurrent than sample O, and during relaxation... The interval τ1 and relaxation time τ2 were also short. Here, the maximum value Imax of the photocurrent of sample N is 6. 2 x 10 -11A was obtained, and the relaxation time τ1 was 0.3 seconds, and the relaxation time τ2 was 39 seconds. In contrast, the maximum value Imax of the photocurrent of sample O is 8.0 × 10⁻⁶. -9 A, during relaxation The interval τ1 was 3.9 seconds, and the relaxation time τ2 was 98 seconds.

[0266] Both sample N and sample O are linear solutions of exponential functions consisting of at least two types of relaxation times. This demonstrated that the relaxation of the photocurrent ID could be fitted. The relaxation of the photocurrent ID in both N and sample O suggests that there are two or more relaxation processes. This is due to the photoelectric recombination model, as shown in Figures 5(A) and 5(B). This corresponds to the relaxation process of the flow. In other words, as shown in the band diagram in Figure 5 in the previous embodiment, acid It has been suggested that trap levels exist within the band gap of monized semiconductors.

[0267] Furthermore, sample N, which is an oxide semiconductor film containing a region having crystalline properties with the c axis oriented, The relaxation time τ1 and relaxation time τ2 were shorter in sample O. This is shown in Figure 5(A). In the recombination model shown in Figure 5(B) and Figure 5(B), the trap level caused by the oxygen vacancy is This suggests that the amount of sample N has decreased. In other words, it has crystallinity with the c axis oriented. The inclusion of such regions allows defects in the oxide semiconductor film to function as trap levels. This can be attributed to a decrease in the number of cases.

[0268] From the above, it is found that a region having crystalline properties with the c axis oriented is formed in the oxide semiconductor film. It was found that this leads to a structure that is more stable against light irradiation. By using oxide semiconductor films in transistors, stable electrical characteristics are achieved, reliability It can provide high-performance transistors.

[0269] <6.TDS analysis> In this section, an oxide semiconductor film is fabricated according to the previously described embodiment, and the oxide semiconductor film is... Using TDS (Thermal Desorption Spectroscopy) analysis I will now explain the results of the evaluation.

[0270] In this section, we will describe how to deposit an oxide semiconductor film on a quartz substrate using the sputtering method, and when the film is deposited... Sample P1 had a substrate temperature of room temperature, and Sample P2 had a substrate temperature of 100°C during film deposition. Sample P3, with a substrate temperature of 200°C at the time of film formation, and Sample P4, with a substrate temperature of 300°C at the time of film formation, Sample P5 was prepared with a substrate temperature of 400°C during film deposition. Here, sample P1, sample Samples P2 and P3 are oxide semiconductors that do not contain regions with c-axis oriented crystalline properties. The film contains regions with c-axis orientation and crystalline properties, as shown in samples P4 and P5. It is an oxide semiconductor film. The target for deposition of oxide semiconductor films is In2O3:Ga2O3 A material with a composition ratio of ZnO = 1:1:2 [molar ratio] was used. Other film deposition conditions were as follows: The film deposition gas flow rates were set to 30 sccm of argon gas and 15 sccm of oxygen gas, and the pressure was 0.4 Pa, substrate-target distance 60mm, radio frequency (RF) power supply 0.5kW, film thickness 50nm This was done. Furthermore, for quartz substrates, the factors contributing to desorption of gases from the substrate during TDS analysis were reduced. To achieve this, the material was pre-treated with heat treatment at 850°C in a dry atmosphere.

[0271] TDS analysis involves heating a sample in a vacuum chamber with a halogen lamp, and during the temperature rise, the sample... The gaseous components generated from the whole are analyzed using a quadrupole mass spectrometer (QMS). This is an analytical method that detects gas components using an SS Spectrometer. They are distinguished by / z (mass / charge) and detected as a mass spectrum.

[0272] In this embodiment, TDS analysis was performed using a WA1000S manufactured by Denshi Kagaku Co., Ltd. The measurement conditions were: SEM voltage 1500V, substrate surface temperature from room temperature to 400°C, and vacuum degree 1.5×. 10 -7 Below Pa, Dwell Time 0.2 (sec / U), Heating Rate 30 (°C / As a min (minute), a mass spectrum corresponding to H2O with M / z=18 was detected.

[0273] The results of the TDS analysis performed on samples P1 through P5 are shown in the graph in Figure 27. As shown in Figure 27, the graph on the vertical axis is the molecular weight of desorbed water (M / z=18) [molecule s / cm 3 The x-axis is plotted as the substrate temperature (°C) during film deposition, with the x-axis representing the counts. The molecular weight of desorbed water is calculated by taking the integral value of the mass spectrum with M / z=18 near the heating temperature of 300°C. This is the amount obtained by doing so, and it is the molecular weight of water that is released from the oxide semiconductor film. The mass spectrum at / z=18 shows a peak near the heating temperature of 100°C, which is This is thought to be the amount of water adsorbed on the surface of the oxide semiconductor film, so it is counted as the molecular weight of desorbed water. I haven't done that.

[0274] As shown in the graph in Figure 27, the higher the substrate temperature during film formation, the greater the amount of moisture released from each sample. It can be seen that the amount of particles decreases. Therefore, the substrate temperature during film formation is increased, that is, oxidation By forming a region having crystalline properties with the c axis oriented within a material semiconductor film, the oxide semiconductor The conductive film contains molecules containing hydrogen atoms (H), such as H2O (water) molecules, and ions. It can be said that it can reduce the amount of noise.

[0275] Based on the above, it is possible to form an oxide semiconductor film containing a region having crystalline properties with the c axis oriented. More specifically, H2O (water) molecules, which can serve as a carrier source in oxide semiconductor films, This can reduce impurities such as molecules and ions containing hydrogen atoms (H). To prevent changes in the electrical conductivity of the oxide semiconductor film, and to enable the use of the oxide semiconductor film in transit This can improve the reliability of the ZISTA.

[0276] <7. Secondary Ion Mass Spectrometry> In this section, an oxide semiconductor film is fabricated according to the previously described embodiment, and the oxide semiconductor film is... Secondary Ion Mass Spectroscopy (SIMS) We will now explain the results of the evaluation using geometry.

[0277] In this section, we will describe how to deposit an oxide semiconductor film on a quartz substrate using the sputtering method, and when the film is deposited... Samples Q1 to Q7 had substrate temperatures at room temperature, while samples Q7 had substrate temperatures of 400°C during film formation. Pull samples R1 to R7 were prepared. Here, samples Q1 to Q7 are c-axis This oxide semiconductor film does not contain regions having oriented crystalline properties, and samples R1 to Sun Pull R7 is an oxide semiconductor film containing a region with crystalline properties where the c axis is oriented. The target for depositing conductive films is In2O3:Ga2O3:ZnO=1:1:2 [molar ratio]. A film with the following composition ratio was used. Other film deposition conditions included a film deposition gas flow rate of argon gas at 30 s. ccm and 15 sccm of oxygen gas, pressure 0.4 Pa, substrate-target distance 60 The specifications were: mm, high-frequency (RF) power supply 0.5kW, film thickness 300nm. Note: Regarding the quartz substrate... The material was pre-treated by heat treatment at 850°C in a nitrogen atmosphere for 1 hour.

[0278] Furthermore, regarding samples Q2 through Q7 and samples R2 through R7, After depositing the oxide semiconductor film, the quartz substrate on which the oxide semiconductor film was deposited was subjected to heat treatment. The heat treatment involves raising the temperature to a predetermined level in a nitrogen atmosphere, then switching to an oxygen atmosphere and maintaining that temperature. The samples were held for 1 hour, then cooled in an oxygen atmosphere. The specified temperatures were used for samples Q2 and Sun. Pull R2 was 200°C, sample Q3 and sample R3 were 250°C, sample Q4 and Sample R4 was heated to 350°C, Sample Q5 and Sample R5 were heated to 450°C, and Sample Q6 was heated to 350°C. Sample R6 will be heated to 550°C, and samples Q7 and R7 will be heated to 650°C. Samples Q1 to Q7, in which oxide semiconductor films were deposited on a quartz substrate, Samples R1 through R7 were prepared.

[0279] In this section, the above samples Q1 to Q7, and samples R1 to Sample SIMS analysis was performed on R7. SIMS analysis of samples Q1 to Q7 was performed. The results are shown in Figure 28(A), which shows the SIMS analysis results for samples R1 to R7. The results are shown in the graph in Figure 28(B). The vertical axis of the graphs in Figures 28(A) and 28(B) is water. Concentration of element (H) (atoms / cm³) 3 ) and the horizontal axis represents the oxide from the surface of the oxide semiconductor film. The depth (nm) of the semiconductor film and the quartz substrate is measured.

[0280] From the graphs in Figures 28(A) and 28(B), the oxides of sample Q1 and sample R1 can be seen. The hydrogen concentration in the semiconductor film is almost the same, but the oxide semiconductors of samples R2 to R7 The hydrogen concentration in the body membrane tends to be lower than that of samples Q2 through Q7. This means that the higher the substrate temperature during oxide semiconductor film deposition, the less likely hydrogen contamination will occur during subsequent heat treatment. This indicates that it is difficult to add. In particular, looking at the graphs for samples Q3 to Q5, As the temperature rises during heat treatment, hydrogen penetrates from the surface side of the oxide semiconductor film, and the oxide semiconductor... A layer with a high hydrogen concentration extends deep into the film, and when the temperature is further increased, the surface side of the oxide semiconductor film... This shows that hydrogen is being removed. In this way, the c axis is oriented within the oxide semiconductor film. If a crystalline region is not formed, hydrogen contamination or desorption occurs during heat treatment. Furthermore, a region with crystalline properties and c-axis orientation was formed in the oxide semiconductor film, as shown in sample R2. This behavior is not observed in sample R7.

[0281] This is achieved by increasing the substrate temperature during oxide semiconductor film deposition, which causes the c-axis to be oriented within the oxide semiconductor film. By forming regions with crystalline properties, hydrogen can easily bond from within the oxide semiconductor film. This can be attributed to a reduction in dangling bonds and other related factors.

[0282] Therefore, by increasing the substrate temperature during oxide semiconductor film deposition, the c-axis is oriented within the oxide semiconductor film. By forming a region with crystalline properties, it becomes a carrier source in the oxide semiconductor film. This prevents the amount of hydrogen that can be present from increasing due to heat treatment. To suppress changes in the electrical conductivity of the body membrane, and to enable transistors using the oxide semiconductor film Reliability can be improved. [Explanation of Symbols]

[0283] 11 sites 12 In atom 13Ga atom 14 Zn atoms 15 O atoms 31 Processing Room 33 Exhaust means 35 Gas supply means 37 Power supply 40 Substrate support 41 Target 43 Ion 45 atoms 47 atoms 51 circuit boards 53 Undercoat Insulating Film 55 Oxide semiconductor film 56 Oxide semiconductor film 59 Oxide semiconductor film 63 Gate insulating film 65 Gateway 69 Insulating film 120 transistors 130 transistors 140 transistors 150 transistors 160 transistors 170 transistors 180 transistors 351 circuit board 353 Undercoat Insulating Film 359 Oxide semiconductor film 363 Gate insulating film 365 Shuttle Bus Stop 369 Insulating film 371 Metal oxide film 373 Metal oxide film 55a seed crystal 55b Oxide semiconductor film 56a Seed Crystal 56b Oxide semiconductor film 61a Source electrode 61b Drain electrode 361a Source electrode 361b Drain electrode 500 circuit boards 501 pixel section 502 Scan Line Drive Circuit 503 Scan line drive circuit 504 Signal Line Drive Circuit 510 Capacitance wiring 512 Gate Wiring 513 Gate wiring 514 Drain electrode layer 516 transistors 517 Transistors 518 liquid crystal elements 519 Liquid crystal elements 520 pixels 521 Switching Transistors 522 Driver transistors 523 Capacitive element 524 Light-emitting element 525 Signal Line 526 scan lines 527 Power line 528 Common electrode 1001 Main Unit 1002 enclosure 1004 Keyboard Buttons 1021 Main Unit 1022 Fixed part 1023 Display section 1024 Operation Buttons 1025 External memory slots 1030 cabinet 1031 Casing 1032 Display Panel 1033 Speakers 1034 Microphone 1035 Operation Keys 1036 Pointing device 1037 Camera Lenses 1038 External connection terminal 1040 solar cells 1041 External memory slots 1050 Television equipment 1051 enclosure 1052 Storage medium playback and recording unit 1053 Display section 1054 External connection terminal 1055 Stand 1056 External memory 1003a Display section 1003b Display section

Claims

1. An oxide semiconductor film having In, Ga, and Zn, The crystal has multiple layers in which layers parallel to the a-b plane are stacked in the thickness direction of the oxide semiconductor film, In the electron diffraction intensity measurement performed by irradiating with an electron beam from the thickness direction, when the magnitude of the scattering vector is plotted on the horizontal axis, the first peak is at 3.3 nm on the horizontal axis. －１ 4.1nm or more －１ The following measurements were taken, and the full width at half maximum of the first peak was 0.2 nm. －１ An oxide semiconductor film having the above-mentioned region.

2. An oxide semiconductor film having In, Ga, and Zn, The crystal has multiple layers in which layers parallel to the a-b plane are stacked in the thickness direction of the oxide semiconductor film, In the electron diffraction intensity measurement performed by irradiating with an electron beam from the thickness direction, when the magnitude of the scattering vector is plotted on the horizontal axis, the first peak is at 3.3 nm on the horizontal axis. －１ 4.1nm or more －１ The following measurements were taken, and the full width at half maximum of the first peak was 0.4 nm. －１ 0.7nm or more －１ An oxide semiconductor film having the following region.

Images