Manufacturing method of laminated structures

Abstract

The present invention provides a method for manufacturing a laminated structure in which an insulating layer made of an oxygen-containing insulating film is laminated on a gallium oxide-based single crystal layer, and that even when using a film deposition method that is excellent in mass production, the method can improve the CV characteristics of the laminated structure while suppressing fluctuations in the effective donor concentration in the gallium oxide single crystal layer. [Solution] As one embodiment, a method for manufacturing a laminated structure 1 is provided, which includes a lamination step of laminating a silicon oxide layer 11 on a gallium oxide single crystal layer 10 to form a laminated structure 1; an oxygen annealing step of performing an annealing treatment on the laminated structure 1 in an oxygen atmosphere after the lamination step; and a nitrogen annealing step of performing an annealing treatment on the laminated structure 1 in a nitrogen atmosphere after the oxygen annealing step.

Description

[Technical Field]

[0001] This invention relates to a method for manufacturing a laminated structure. [Background technology]

[0002] Conventionally, a technique has been known in which a silicon oxide film is deposited on a gallium oxide wafer to form a laminated structure, and then an annealing process (oxygen annealing) is performed in an oxygen atmosphere to improve the electrical characteristics of a MOS capacitor (see Non-Patent Document 1).

[0003] According to the technology described in Non-Patent Document 1, a silicon oxide film is deposited using an electron beam deposition method that causes less damage to the wafer, and it is said that oxygen annealing after film deposition results in a laminated structure with good CV (capacitance-voltage) characteristics without hysteresis. [Prior art documents] [Non-patent literature]

[0004] [Non-Patent Document 1] "Investigation of Technical Challenges for the Practical Application of Next-Generation Wide-Bandgap Semiconductor Gallium Oxide Devices," Proposal for Innovation Policy Planning Based on Quantitative Scenarios of Technology, Economy, and Society Towards the Realization of a Low-Carbon Society, Japan Science and Technology Agency, Low-Carbon Society Strategy Center, February 2020, pp. 1-8 [Overview of the project] [Problems that the invention aims to solve]

[0005] However, since electron beam deposition is a specialized method for forming silicon oxide films, the manufacturing method of the laminated structure described in Non-Patent Document 1 is not suitable for mass production.

[0006] On the other hand, when silicon oxide films are deposited using common methods such as CVD and PVD, which are suitable for mass production, the damage to the wafer due to the deposition of the silicon oxide film is greater compared to electron beam evaporation. As a result, although the CV properties of the stacked structure are improved by oxygen annealing after deposition, it is not sufficient. Furthermore, there is a problem that the effective donor concentration of the gallium oxide wafer fluctuates due to the oxygen introduced into the gallium oxide wafer during oxygen annealing after deposition.

[0007] The object of the present invention is to provide a method for manufacturing a laminated structure in which an insulating layer made of an oxygen-containing insulating film is laminated on a gallium oxide-based single crystal layer, and that even when using a film deposition method that is excellent in mass production, the method can improve the CV characteristics of the laminated structure while suppressing fluctuations in the effective donor concentration in the gallium oxide single crystal layer. [Means for solving the problem]

[0008] One aspect of the present invention provides a method for manufacturing the following laminated structure in order to achieve the above objective.

[0009] [1] A method for manufacturing a laminated structure, comprising: a lamination step of laminating an insulating layer made of an insulating film containing oxygen on a gallium oxide-based single crystal layer to form a laminated structure; an oxygen annealing step of performing an annealing treatment on the laminated structure in an oxygen atmosphere after the lamination step; and a nitrogen annealing step of performing an annealing treatment on the laminated structure in a nitrogen atmosphere after the oxygen annealing step. [2] The method for manufacturing a laminated structure according to [1] above, wherein in the nitrogen annealing step, the temperature of the annealing treatment is 950°C or higher. [3] The method for manufacturing a laminated structure according to [2] above, wherein in the nitrogen annealing step, the temperature of the annealing treatment is 1050°C or lower. [4] The method for manufacturing the laminated structure according to [1] above, wherein the insulating layer is a silicon oxide layer. [5] In the lamination process, the insulating film is formed on the gallium oxide single crystal layer by CVD or PVD, and the method for manufacturing a laminated structure according to any one of the above [1] to [4].

Advantages of the Invention

[0010] According to the present invention, there is provided a method for manufacturing a laminated structure in which an insulating layer made of an insulating film containing oxygen is laminated on a gallium oxide single crystal layer. Even when a film formation method excellent in mass productivity is used, it is possible to provide a method for manufacturing a laminated structure that can suppress fluctuations in the effective donor concentration in the gallium oxide single crystal layer and improve the C-V characteristics of the laminated structure.

Brief Description of the Drawings

[0011] [Figure 1] FIG. 1 is a vertical cross-sectional view of a laminated structure according to an embodiment of the present invention. [Figure 2] FIG. 2 is a vertical cross-sectional view of a MOS capacitor formed using the laminated structure. [Figure 3] FIGS. 3(a) and (b) are graphs showing C-V curves of sample A and sample E as laminated structures. [Figure 4] FIGS. 4(a) and (b) are graphs showing C-V curves of sample F and sample G as laminated structures. [Figure 5] FIG. 5 is a graph showing the hysteresis width Vhys of the C-V curves of samples A to G as laminated structures. [Figure 6] FIG. 6 is a graph showing the effective donor concentration distribution in the β-Ga2O3 wafers of samples A to F and H.

Embodiments for Carrying Out the Invention

[0012] (Characteristics of the laminated structure) FIG. 1 is a vertical cross-sectional view of a laminated structure 1 according to an embodiment of the present invention. The laminated structure 1 includes a gallium oxide single crystal layer 10 and a silicon oxide layer 11 laminated on the gallium oxide single crystal layer 10.

[0013] The gallium oxide single crystal layer 10 is a layer composed of a single crystal of gallium oxide (Ga2O3). Typically, as shown in FIG. 1, it is a gallium oxide wafer composed of a substrate 10a made of a single crystal of gallium oxide and an epitaxial film 10b made of a single crystal of gallium oxide formed thereon by HVPE (Halide Vapor Phase Epitaxy) or the like. The gallium oxide single crystal layer 10, for example, one or both of the substrate 10a and the epitaxial film 10b may contain donor impurities such as Si and Sn.

[0014] The silicon oxide layer 11 is a layer composed of an amorphous silicon oxide (SiO2) film formed by a film formation method excellent in mass productivity such as CVD or PVD.

[0015] The thicknesses of the gallium oxide single crystal layer 10 and the silicon oxide layer 11 are not particularly limited. For example, when the laminated structure 1 is applied to a MOS capacitor, the thickness of the substrate 10a is set to 50 to 700 μm, the thickness of the epitaxial film 10b is set to 5 to 100 μm, and the thickness of the silicon oxide layer 11 is set to 30 to 100 nm, respectively.

[0016] Further, the laminated structure 1 is characterized by a manufacturing method in which oxygen annealing and nitrogen annealing are performed as PDA (post-deposition annealing, post-film formation annealing for improving characteristics) after the formation of the silicon oxide layer 11, and the decrease in the uniformity of the effective donor concentration in the depth direction of the gallium oxide single crystal layer 10 due to the introduction of oxygen into the gallium oxide single crystal layer 10 is suppressed.

[0017] For example, the effective donor concentration of the gallium oxide single crystal layer 10 is 1.0×10 A cm -3 or more and 1.0×10 17 cm -3 or less. Here, the effective donor concentration means the value N D obtained by subtracting the acceptor concentration N A from the donor concentration N D -N A .

[0018] The stacked structure 1 has a feature that the hysteresis width V in the hysteresis appearing in the C-V curve is smaller than that of the one subjected only to oxygen annealing as PDA. Here, the hysteresis width V hys is defined as the width of the hysteresis (the potential difference between the C-V curve when the applied voltage is increased and the C-V curve when the applied voltage is decreased) when the capacitance is half of the maximum value. The C-V curve of the stacked structure 1 can be measured by forming a MOS capacitor 2 described later using the stacked structure 1. hys

[0019] (Manufacture of Stacked Structure) The manufacturing method of the stacked structure 1 includes a stacking process of stacking a silicon oxide layer 11 on a gallium oxide single crystal layer 10 to form the stacked structure 1, an oxygen annealing process of performing an annealing treatment (oxygen annealing) on the stacked structure 1 in an oxygen atmosphere after the stacking process, and a nitrogen annealing process of performing an annealing treatment (nitrogen annealing) on the stacked structure 1 in a nitrogen atmosphere after the oxygen annealing process.

[0020] Oxygen annealing is a PDA performed for improving the C-V characteristics (reducing hysteresis) of the stacked structure 1, and is performed, for example, at a temperature of 800 °C or higher and 1050 °C or lower.

[0021] Nitrogen annealing is a PDA performed for recovering the variation in the effective donor concentration in the gallium oxide single crystal layer 10 caused by oxygen introduced into the gallium oxide single crystal layer 10 by oxygen annealing, and for further improving the C-V characteristics of the stacked structure 1.

[0022] In order to particularly effectively recover the variation in the effective donor concentration in the gallium oxide single crystal layer 10, it is preferable that the temperature of nitrogen annealing is 950 °C or higher. On the other hand, if the temperature of nitrogen annealing is too high, deterioration (change) in the characteristics of the silicon oxide layer 11 or the interface between the silicon oxide layer 11 and the gallium oxide single crystal layer 10 may occur, so the temperature of the annealing treatment is preferably 1050 °C or lower.

[0023] ​(Evaluation of the properties of laminated structures) The following describes the evaluation method and results of the characteristics of the laminated structure 1 that was implemented.

[0024] First, the gallium oxide single crystal layer 10 is composed of a substrate 10a and an epitaxial film 10b, with the (001) plane as the main plane, and has an effective donor concentration of 1.0 × 10⁻¹⁰ 16 cm- 3 A β-Ga2O3 wafer was prepared. Although no donor impurities were intentionally added to this β-Ga2O3 wafer, it is thought that Si and Cl introduced during the manufacturing process act as donors.

[0025] Next, the β-Ga2O3 wafer was subjected to the following processes in order: methanol ultrasonic cleaning for 3 minutes, acetone ultrasonic cleaning for 3 minutes, methanol ultrasonic cleaning for 3 minutes, ultrapure water ultrasonic cleaning for 3 minutes, ultrapure water rinsing for 5 minutes, piranha cleaning for 5 minutes, and ultrapure water rinsing for 15 minutes.

[0026] Next, a SiO2 film with a thickness of approximately 40 nm was formed on the main surface of a β-Ga2O3 wafer as a silicon oxide layer 11 using PECVD, a type of CVD, to obtain a laminated structure 1. This PECVD was performed under the following conditions: temperature of 400°C, pressure of 79 Pa, flow rates of O2 gas and TEOS gas of 250 sccm and 1 sccm, respectively, and power output of 30 W.

[0027] Next, PDA was applied to the laminated structure 1 under the seven conditions shown in Table 1. The laminated structures 1 treated with PDA under these six conditions are called Samples A to G, and the laminated structure 1 without PDA treatment is called Sample H.

[0028] [Table 1]

[0029] Figure 2 is a vertical cross-sectional view of a MOS capacitor 2 formed using a laminated structure 1 consisting of a β-Ga2O3 wafer composed of a substrate 10a as a gallium oxide single crystal layer 10 and an epitaxial film 10b, and an SiO2 film as a silicon oxide layer 11. The MOS capacitor 2 was obtained by forming a Ni electrode 21 on the upper surface of the silicon oxide layer 11 of the laminated structure 1 and an Al electrode 22 on the lower surface of the gallium oxide single crystal layer 10 (the lower surface of the substrate 10a).

[0030] Next, the CV characteristics of the multilayer structure 1 were measured using MOS capacitor 2. The CV characteristics of the multilayer structure 1 were measured by connecting a semiconductor parameter analyzer to 21 and 22 of MOS capacitor 2, under conditions where the temperature of the substrate 10a was room temperature (25°C) and the measurement frequency was 1 MHz, and sweeping the applied voltage from -20V to 20V and from 20V to -20V.

[0031] Figures 3(a), (b) and 4(a), (b) are graphs showing a portion of the CV curve of the obtained laminated structure 1. Figures 3(a), (b) and 4(a), (b) show the CV curves of sample A, sample E, sample F, and sample G, respectively.

[0032] Figure 5 shows the hysteresis width V of the CV curves for samples A to G as the laminated structure 1. hys This graph illustrates the situation. In Figure 5, "w / o" on the horizontal axis indicates that nitrogen annealing was not performed.

[0033] Note that in Figures 3(a), (b), 4(a), (b), and 5, "O2-PDA" refers to oxygen annealing as PDA, and "N2-PDA" refers to nitrogen annealing as PDA.

[0034] Figure 5 shows that when the temperature of nitrogen annealing, which is performed in addition to oxygen annealing as a PDA, is somewhat high, for example, approximately 950°C or higher, the hysteresis width V hys This indicates that the hysteresis width V becomes smaller. Also, Figure 5 shows that when nitrogen annealing is performed after oxygen annealing, the hysteresis width V is smaller than when nitrogen annealing is performed alone as the PDA. hysThis indicates that it will become smaller.

[0035] Figure 6 is a graph showing the effective donor concentration distribution in β-Ga2O3 wafers for samples A-F and H. The horizontal axis of Figure 6 represents the depth from the interface between the β-Ga2O3 wafer and the SiO2 film, and the vertical axis represents the effective donor concentration N in the β-Ga2O3 wafer. D -N A The effective donor concentration distribution shown in Figure 6 was calculated using the relationship between the measured capacitance C and voltage V from Equation 1 below. In Equation 1, q is the charge, ε is the dielectric constant, C is the capacitance per unit area, and V is the voltage.

[0036]

number

[0037] In Figure 6, "as-depo." indicates the impurity distribution of samples that have not undergone PDA, "w / o" indicates the impurity distribution of samples that have undergone only oxygen annealing at 1000°C for 30 minutes as PDA, and "600°C" to "1000°C" indicates the impurity distribution of samples that have undergone oxygen annealing at 1000°C for 30 minutes followed by nitrogen annealing at 600-1000°C for 30 minutes as PDA.

[0038] Figure 6 shows that oxygen annealing at 1000°C as a PDA reduces the effective donor concentration in the β-Ga2O3 wafer, and consequently, the uniformity of the effective donor concentration in the depth direction decreases. This phenomenon is thought to be due to the introduction of oxygen between the lattice of the gallium oxide single crystal during oxygen annealing.

[0039] Furthermore, Figure 6 shows that by applying nitrogen annealing in addition to oxygen annealing as a PDA, the effective donor concentration and the uniformity of the effective donor concentration in the depth direction, which had decreased due to oxygen annealing, are restored. It also shows that the degree of recovery increases as the nitrogen annealing temperature approaches 1000°C from 600°C, and at 1000°C, it is restored to almost the same level as before oxygen annealing.

[0040] This phenomenon is thought to be due to the removal of oxygen introduced between the lattice layers of gallium oxide single crystals by nitrogen annealing, which was the cause of the fluctuation in the effective donor concentration distribution of gallium oxide single crystals.

[0041] (Effects of the embodiment) According to the manufacturing method of the laminated structure 1 in the embodiment of the present invention described above, by performing oxygen annealing and subsequent nitrogen annealing as PDA, even when using film deposition methods with excellent mass-productivity such as CVD and PVD, it is possible to suppress fluctuations in the effective donor concentration in the gallium oxide single crystal layer 10 while improving the electrical characteristics when applied to devices such as MOS capacitors.

[0042] Furthermore, by using the manufacturing method for the laminated structure 1 according to the embodiment of the present invention, it is possible to obtain a laminated structure 1 having an effective donor distribution with a small difference from before PDA was performed. This means that the laminated structure 1 can be manufactured according to its design, which is a very excellent feature.

[0043] Although embodiments of the present invention have been described above, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the spirit of the invention. Modifications are described below, but even when using these modifications, the same effects as those of the embodiments of the present invention described above can be obtained.

[0044] For example, instead of the gallium oxide single crystal layer 10 in the above embodiment, a gallium oxide single crystal layer made of a gallium oxide semiconductor single crystal may be used. The gallium oxide semiconductor is Ga2O3, or Ga2O3 to which Al, In, or both are added, and ideally (Ga x Al y In (1-x-y)) It has a composition represented by 2O3 (0 < x ≤ 1, 0 ≤ y < 1, 0 < x + y ≤ 1). When Al is added to Ga2O3, the bandgap widens, and when In is added, the bandgap narrows. The gallium oxide-based single crystal layer typically consists of a wafer composed of a substrate made of a gallium oxide-based single crystal and an epitaxial film made of a gallium oxide-based single crystal formed thereon.

[0045] Also, instead of the silicon oxide layer 11 in the above embodiment, an insulating layer made of a film of other oxygen-containing insulators such as Al2O3, AlSiO, ZrO2, SiON, AlON, etc. may be used. These oxygen-containing insulating films are amorphous if they do not crystallize at the annealing temperature in oxygen annealing and nitrogen annealing, and are crystalline if they crystallize. However, SiO2 has a large bandgap compared to other oxygen-containing insulators and is a stable material with little long-term variation in electrical characteristics, so it is particularly preferable to use the silicon oxide layer 11.

[0046] Also, the components of the above embodiment can be arbitrarily combined within the scope not departing from the gist of the invention. Also, the above-described embodiment does not limit the invention according to the claims. It should also be noted that not all combinations of the features described in the embodiment are essential means for solving the problems of the invention.

Explanation of Reference Numerals

[0047] 1... Stacked structure, 10... Gallium oxide single crystal layer, 11... Silicon oxide layer, 2... MOS capacitor, 21... Ni electrode, 22... Al electrode

Claims

1. A lamination process involves laminating an insulating layer made of an oxygen-containing insulating film onto a gallium oxide-based single crystal layer to form a laminated structure. After the lamination process, an oxygen annealing process is performed on the laminated structure under an oxygen atmosphere. Following the oxygen annealing step, a nitrogen annealing step is performed on the laminated structure under a nitrogen atmosphere. A method for manufacturing a laminated structure, including [the specified element].

2. In the nitrogen annealing process, the temperature of the annealing treatment is 950°C or higher. A method for manufacturing a laminated structure according to claim 1.

3. In the nitrogen annealing process, the temperature of the annealing treatment is 1050°C or lower. A method for manufacturing a laminated structure according to claim 2.

4. The insulating layer is a silicon oxide layer. A method for manufacturing a laminated structure according to claim 1.

5. In the lamination process, the insulating film is formed on the gallium oxide-based single crystal layer by CVD or PVD. A method for manufacturing a laminated structure according to any one of claims 1 to 4.

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