Semiconductor device manufacturing methods

Abstract

The present invention provides a method for manufacturing a semiconductor device that can reduce or remove Si atoms at the interface between a substrate or semiconductor layer made of InP or InGaAsP and another semiconductor layer grown thereon. [Solution] This manufacturing method is a method for manufacturing a semiconductor device 1 comprising a first semiconductor 2 made of InP or InGaAsP and a second semiconductor 3 provided on the first semiconductor 2. This manufacturing method comprises a first step and a second step. In the first step, thermal cleaning is performed on the surface of the first semiconductor 2 in a growth furnace C with an atmosphere containing arsine. In the second step, the second semiconductor 3 is grown on the surface of the first semiconductor 2 in the growth furnace C. The set temperature in the growth furnace C during thermal cleaning is lower than the set temperature in the growth furnace C when growing the second semiconductor 3.

Description

[Technical Field]

[0001] This disclosure relates to a method for manufacturing semiconductor devices. [Background technology]

[0002] Patent Document 1 discloses a vapor phase growth method for growing crystals on an InP substrate. In this method, before starting crystal growth, phosphine (PH3) gas is introduced in a quantity of 5 × 10⁻¹⁰ units. -3 While supplying at a rate of mol / min or higher, the InP substrate is heated to over 700°C. [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. Hei 1-197398 [Patent Document 2] Japanese Patent Publication No. 2000-124138 [Patent Document 3] Japanese Patent Application Publication No. 11-204877 [Overview of the project] [Problems that the invention aims to solve]

[0004] Generally, in semiconductor devices such as high-electron-mobility transistors (HEMTs) made from GaAs-based semiconductors, an undoped epitaxial layer is grown on the substrate. However, if silicon (Si) impurities are present at the interface between the epitaxial layer and the substrate, the epitaxial layer becomes conductive, leading to current leakage and other degradations of the semiconductor device's electrical properties. Various studies have been conducted on semiconductor devices made from GaAs-based semiconductors to address these issues.

[0005] On the other hand, when growing another semiconductor layer on a substrate or semiconductor layer made of InP or InGaAsP, unintended incorporation of Si atoms occurs at the interface between the substrate or semiconductor layer and the other semiconductor layer. For example, when fabricating a photodiode made of InP-based semiconductor, the incorporation of Si atoms can lead to problems such as an unintended increase in device capacitance. Therefore, it is desirable to reduce or remove Si atoms at the interface between the substrate or semiconductor layer and the other semiconductor layer. Generally, when growing a semiconductor on an InP substrate, heat treatment is performed in an atmosphere of phosphine (PH3), a group V raw material gas of the substrate material, in order to remove the native oxide film on the InP substrate. However, it is difficult to remove Si atoms with heat treatment in a PH3 atmosphere.

[0006] The present disclosure aims to provide a method for manufacturing a semiconductor device that can reduce or remove Si atoms at the interface between a substrate or semiconductor layer made of InP or InGaAsP and another semiconductor layer grown thereon. [Means for solving the problem]

[0007] [1] A method for manufacturing a semiconductor device relating to one aspect of the present disclosure is a method for manufacturing a semiconductor device comprising a first semiconductor made of InP or InGaAsP and a second semiconductor provided on the first semiconductor. This manufacturing method comprises a first step and a second step. In the first step, thermal cleaning is performed on the surface of the first semiconductor in a growth furnace with an atmosphere containing arsine. In the second step, the second semiconductor is grown on the surface of the first semiconductor in a growth furnace. The set temperature in the growth furnace during thermal cleaning is lower than the set temperature in the growth furnace when growing the second semiconductor.

[0008] The inventors have discovered that Si atoms present on the surface of a substrate or semiconductor layer made of InP or InGaAsP can be removed by performing thermal cleaning in an arsine (AsH3) atmosphere. Furthermore, when performing thermal cleaning on the surface of a semiconductor made of InP or InGaAsP, if the substrate temperature is increased, P atoms are removed due to thermal degradation of InP or InGaAsP, and In atoms are deposited. When thermal cleaning is performed in an AsH3 atmosphere, P atoms are removed and replaced by As atoms, causing As atoms to bond to In atoms and generating foreign matter on the surface. Therefore, the set temperature in the growth furnace during thermal cleaning is lower than the set temperature in the growth furnace when growing the second semiconductor. This prevents thermal degradation of InP or InGaAsP, reduces the removal of P atoms, and reduces the generation of foreign matter. From the above, the manufacturing method of [1] described above makes it possible to reduce or remove Si atoms while reducing the generation of foreign matter at the interface between the substrate or semiconductor layer made of InP or InGaAsP, i.e., the first semiconductor, and another semiconductor layer grown on it, i.e., the second semiconductor.

[0009] [2] In the manufacturing method described in [1] above, the temperature of the first semiconductor during thermal cleaning may be lower than 534°C. In this case, thermal degradation of InP or InGaAsP can be reliably prevented.

[0010] [3] In the manufacturing method described in [1] above, the temperature of the first semiconductor during thermal cleaning may be set to 476°C or lower. In this case, thermal degradation of InP or InGaAsP can be prevented more reliably.

[0011] [4] In the manufacturing method of [1] or [2] above, the temperature of the first semiconductor in thermal cleaning may be set to 417°C or higher. In this case, the number of Si atoms can be further reduced.

[0012] [5] In the manufacturing method of [1] above, the temperature of the first semiconductor in thermal cleaning may be 417 °C or higher and 476 °C or lower. In this case, it is possible to achieve both further reduction of Si atoms and more reliable prevention of thermal degradation of InP or InGaAsP.

[0013] [6] In the manufacturing methods of [1] to [5] above, the processing time in thermal cleaning may be 30 minutes or longer. In this case, Si atoms can be further reduced.

[0014] [7] In the thermal cleaning of the manufacturing methods of [1] to [6] above, the total supply amount of arsine may be 50% or more with respect to the volume of the growth furnace. In this case, Si atoms can be further reduced.

[0015] [8] In the manufacturing methods of [1] to [7] above, the root mean square roughness of the surface of the first semiconductor after thermal cleaning may be 0.3 nm or less. According to the manufacturing methods of [1] to [6], in this way, a semiconductor device with less damage to the surface of the first semiconductor can be obtained.

[0016] [9] In the manufacturing methods of [1] to [8] above, the time of thermal cleaning may be longer than the growth time of the second semiconductor. In this case, Si atoms can be further reduced.

[0017]

[10] The manufacturing methods of [1] to [9] above may further include a step of raising the temperature in the growth furnace as an atmosphere containing phosphine instead of arsine between the step of performing thermal cleaning and the step of growing the second semiconductor. And the flow rate of arsine in thermal cleaning may be made larger than the flow rate of phosphine in the step of raising the temperature. In this way, by making the flow rate of arsine larger than the subsequent flow rate of phosphine, Si atoms can be further reduced.

[0018]

[11] In the manufacturing methods of [1] to

[10] above, the first semiconductor is (InP) 1-z(In 0.53 Ga 0.47 As) z (0 ≦ z < 1) may be formed. In this case, a semiconductor device including a first semiconductor lattice-matched with InP can be obtained.

Advantages of the Invention

[0019] According to the present disclosure, a method for manufacturing a semiconductor device capable of reducing or removing Si atoms at an interface between a substrate or a semiconductor layer made of InP or InGaAsP and another semiconductor layer grown thereon can be provided.

Brief Description of the Drawings

[0020] [Figure 1] FIG. 1 is a side view showing a part of the configuration of a semiconductor device manufactured by the manufacturing method according to an embodiment. [Figure 2] FIG. 2 is a diagram showing the manufacturing method according to an embodiment. [Figure 3] FIG. 3 is a diagram showing the time change of the set temperature in the growth furnace. [Figure 4] FIG. 4 is a diagram showing the time change of the set temperature in the growth furnace in the comparative example. [Figure 5] FIG. 5 is a graph showing the distribution of Si concentration in the thickness direction of four samples manufactured in the comparative example. [Figure 6] FIG. 6 shows a micrograph of the surface of an InP substrate after thermal cleaning. [Figure 7] FIG. 7 is a diagram showing the time change of the set temperature in the growth furnace in the comparative example. [Figure 8] FIG. 8 is a diagram showing a photograph of the surface of an InP substrate taken with a microscope. [Figure 9] FIG. 9 is a diagram showing a photograph of the surface of an InP substrate taken with a microscope. [Figure 10] FIG. 10 is a diagram showing a photograph of the surface of an InP substrate taken with a microscope. [Figure 11]Figure 11 shows a microscopic photograph of the surface of an InP substrate after thermal cleaning in a reference example. [Figure 12] Figure 12 shows a microscopic photograph of the surface of an InP substrate after thermal cleaning in a reference example. [Figure 13] Part (a) of Figure 13 shows a magnified view of the foreign substance. Part (b) of Figure 13 is a graph showing the results of analyzing the foreign substance using energy-dispersive X-ray spectroscopy. [Figure 14] Figure 14 is a graph showing the distribution of Si concentration in the thickness direction for the three groups of samples prepared in the example. [Figure 15] Figure 15 shows a micrograph of the surface of the InP substrate after thermal cleaning. [Figure 16] Figure 16 is a graph showing the distribution of Si concentration in the thickness direction for the five groups of samples prepared in the examples. [Figure 17] Figure 17 is a chart showing the ratio of the total supply of AsH3 to the volume of the growth furnace and the amount of Si atoms incorporated (Si concentration) for four samples that underwent thermal cleaning. [Figure 18] Figure 18 is a graph showing the distribution of Si concentration in the thickness direction for the five groups of samples prepared in the examples. [Figure 19] Figure 19 is a graph showing the concentration distribution of oxygen (O) atoms in the thickness direction. [Figure 20] Figure 20 is a graph showing the concentration distribution of carbon (C) atoms in the thickness direction. [Modes for carrying out the invention]

[0021] Specific examples of this disclosure will be described below with reference to the drawings. However, the present invention is not limited to these examples, and is intended to include all modifications within the meaning and scope of the claims, as defined by the claims. In the following description, identical elements in the drawings are denoted by the same reference numerals, and redundant descriptions are omitted.

[0022] FIG. 1 is a side view showing a part of the configuration of a semiconductor device 1 manufactured by a manufacturing method according to an embodiment of the present disclosure. The semiconductor device 1 is, for example, a photodiode, and in one example, is a waveguide type photodiode monolithically formed on a waveguide substrate. Alternatively, the semiconductor device 1 may be a transistor such as, for example, a HEMT. The semiconductor device 1 includes at least a first semiconductor 2 and a second semiconductor 3. The semiconductor device 1 may further include another semiconductor layer (not shown) on the second semiconductor 3. The first semiconductor 2 is a substrate or a semiconductor layer formed on a substrate. The first semiconductor 2 is made of InP or InGaAsP. InGaAsP is, for example, (InP) 1-z (In 0.53 Ga 0.47 As) z (0 ≦ z < 1). The first semiconductor 2 necessarily contains both indium (In) and phosphorus (P) in its composition. The first semiconductor 2 may contain arsenic (As) in its composition, or may not contain As in its composition. The second semiconductor 3 is a semiconductor layer epitaxially grown on the first semiconductor 2 and is in contact with the first semiconductor 2. The second semiconductor 3 mainly contains an InP-based semiconductor lattice-matched with the first semiconductor 2. The semiconductor device 1 has an interface 4 between the first semiconductor 2 and the second semiconductor 3.

[0023] FIG. 2 is a diagram showing a manufacturing method according to an embodiment of the present disclosure. The manufacturing method of the present embodiment includes a first step and a second step. In the first step, as shown in FIG. 2(a), thermal cleaning is performed on the surface of the first semiconductor 2 in a growth furnace C maintained in an atmosphere containing arsine (AsH3). Subsequently, in the second step, as shown in FIG. 2(b), the second semiconductor 3 is grown on the surface of the first semiconductor 2 in the same growth furnace C.

[0024] FIG. 3 is a diagram showing the time change of the set temperature in the growth furnace C. In FIG. 3, the vertical axis represents temperature (°C), and the horizontal axis represents time (minutes). FIG. 3 also shows the type of gas supplied at each time.

[0025] As shown in Figure 3, this manufacturing method includes at least six steps P1 to P6. Through steps P1 to P6, a carrier gas (e.g., H2) is supplied into the growth furnace C. In step P1, the first semiconductor 2 is preheated. The set temperature T1 in the growth furnace C in step P1 is, for example, 200°C. In the subsequent step P2, the set temperature in the growth furnace C is raised from set temperature T1 to a set temperature T2 which is higher than set temperature T1.

[0026] The subsequent process P3 is the first process described above. In process P3, AsH3 is supplied into the growth furnace C to create an atmosphere containing AsH3. For example, the atmosphere inside the growth furnace C contains only AsH3 and carrier gas. In other words, the atmosphere inside the growth furnace C does not contain any other III-V semiconductor source gases except AsH3. The amount of AsH3 supplied is, for example, 1 slm. Note that 1 slm is equal to 1.67 × 10⁻¹⁶ -5 m 3 This is equal to / s. Then, by maintaining the set temperature in the growth furnace C at the set temperature T2, thermal cleaning is performed on the surface of the first semiconductor 2. The set temperature T2 is, for example, lower than 650°C or 595°C or lower. Alternatively, the set temperature T2 is, for example, 540°C or higher. In one embodiment, the set temperature T2 is 585°C. The processing time for thermal cleaning, i.e., the time for maintaining the set temperature in the growth furnace C at the set temperature T2, is, for example, 30 minutes or more, or 60 minutes or more. In step P3, the total amount of AsH3 supplied is, for example, 50% or more, or 100% or more, relative to the volume of the growth furnace C. The total amount of AsH3 supplied is the product of the amount of AsH3 supplied (flow rate) and time. The root mean square roughness (RMS) of the surface of the first semiconductor 2 after thermal cleaning is, for example, 0.3 nm or less.

[0027] Typically, the temperature of an object placed inside the growth furnace C deviates from the set temperature inside the growth furnace C. In the growth furnace used by the present inventor, when the set temperature inside the growth furnace C was 650°C, 595°C, and 540°C, the temperatures of the objects placed inside the growth furnace C were 534°C, 476°C, and 417°C, respectively. Therefore, the temperature of the first semiconductor 2 during thermal cleaning is, for example, lower than 534°C or 476°C or lower. Alternatively, the temperature of the first semiconductor 2 during thermal cleaning is, for example, 417°C or higher. In one embodiment, the temperature of the first semiconductor 2 during thermal cleaning is 417°C or higher and 476°C or lower.

[0028] Furthermore, the temperature of the installed object relative to the set temperature inside growth furnace C was measured in a hydrogen atmosphere inside growth furnace C using the following method: The thermocouple was raised to each target temperature, and the thermocouple temperature was allowed to stabilize. After confirming that the thermocouple temperature had stabilized, the temperature of the substrate installation area during growth inside growth furnace C was measured using a radiation thermometer. At this time, the temperature of multiple locations within the substrate installation area was measured while rotating the susceptor. Subsequently, the average value of the measured temperatures was calculated. These average values ​​are the aforementioned 534°C, 476°C, and 417°C.

[0029] The relationship between the temperature of an object placed inside growth furnace C and the set temperature inside growth furnace C varies depending on the growth furnace used. Therefore, it is advisable to determine the set temperature inside growth furnace C by investigating the relationship between the temperature of an object placed inside growth furnace C and the set temperature inside growth furnace C, and then applying the temperature range of the first semiconductor 2 described above to that relationship.

[0030] Next, in step P4, the supply of AsH3 is stopped and the supply of PH3 is started, thereby creating an atmosphere in the growth furnace C that contains PH3 instead of AsH3. For example, the atmosphere in the growth furnace C contains only PH3 and carrier gas. Then, the temperature inside the growth furnace C is raised from the set temperature T2 to a set temperature T3, which is higher than the set temperature T2. In the thermal cleaning of step P3 described above, it is preferable to make the flow rate of AsH3 greater than the flow rate of PH3 in step P4.

[0031] Step P5 is the second step described above. Subsequently, in step P5, while maintaining the set temperature in the growth furnace C at the set temperature T3, the second semiconductor 3 is grown on the first semiconductor 2 by supplying PH3 in addition to other group V raw material gases and group III raw material gases. If necessary, other semiconductor layers are also grown continuously on the second semiconductor 3. The other group V raw material gases and group III raw material gases are selected according to the composition of the second semiconductor 3. If the second semiconductor 3 consists of InP, the group III raw material gas is, for example, trimethylindium (TMI). The set temperature T3 is determined according to the composition of the second semiconductor 3. The set temperature T3 is, for example, 775°C or higher. The thermal cleaning time in step P3 described above is set to be longer than the growth time of the second semiconductor 3 in step P5. Finally, in step P6, the supply of PH3, other group V raw material gases and group III raw material gases is stopped, the set temperature in the growth furnace C is lowered, and then the semiconductor device 1 is removed from the growth furnace C.

[0032] The effects obtained by the method for manufacturing the semiconductor device 1 according to this embodiment, as described above, will now be explained. The inventors have found that Si atoms present on the surface of a substrate or semiconductor layer made of InP or InGaAsP can be removed by performing thermal cleaning in an AsH3 atmosphere. Furthermore, when performing thermal cleaning on the surface of a semiconductor made of InP or InGaAsP, if the substrate temperature is increased, P atoms will be removed due to thermal degradation of InP or InGaAsP, and In atoms will precipitate. When thermal cleaning is performed in an AsH3 atmosphere, As atoms will bond to these In atoms, and foreign matter will be generated on the surface. Therefore, the set temperature T2 in the growth furnace C during thermal cleaning is set lower than the set temperature T3 in the growth furnace C when growing the second semiconductor 3. This prevents thermal degradation of InP or InGaAsP, reduces the removal of P atoms, and reduces the generation of foreign matter. From the above, according to the manufacturing method of this embodiment, at the interface 4 between the substrate or semiconductor layer made of InP or InGaAsP, i.e., the first semiconductor 2, and another semiconductor layer grown thereon, i.e., the second semiconductor 3, it is possible to reduce or remove Si atoms while reducing the generation of foreign matter. Furthermore, according to the method of this embodiment, it is also possible to reduce or remove the native oxide film on the first semiconductor 2 by thermal cleaning.

[0033] As mentioned above, the temperature of the first semiconductor 2 during thermal cleaning may be lower than 534°C. In this case, as shown in the examples described later, thermal degradation of InP or InGaAsP can be reliably prevented. Alternatively, the temperature of the first semiconductor 2 during thermal cleaning may be 476°C or lower. In this case, thermal degradation of InP or InGaAsP can be prevented even more reliably.

[0034] As mentioned above, the temperature of the first semiconductor 2 during thermal cleaning may be set to 417°C or higher. In this case, as shown in the examples described later, the number of Si atoms can be further reduced.

[0035] As mentioned above, the temperature of the first semiconductor 2 during thermal cleaning may be set to 417°C or higher and 476°C or lower. In this case, it is possible to achieve both a further reduction in Si atoms and a more reliable prevention of thermal degradation of InP or InGaAsP.

[0036] As mentioned above, the processing time in thermal cleaning may be 30 minutes or longer. In this case, as shown in the examples described later, the number of Si atoms can be further reduced. If the processing time is 60 minutes or longer, the number of Si atoms can be significantly reduced.

[0037] As mentioned above, in thermal cleaning, the total supply of AsH3 may be set to 50% or more of the volume of the growth furnace C. In this case, as shown in the examples described later, the amount of Si atoms can be further reduced. If the total supply of AsH3 is set to 100% or more of the volume of the growth furnace C, the amount of Si atoms can be significantly reduced.

[0038] As mentioned above, the root mean square roughness of the surface of the first semiconductor 2 after thermal cleaning may be 0.3 nm or less. According to the manufacturing method of this embodiment, a semiconductor device 1 with less damage to the surface of the first semiconductor 2 can be obtained.

[0039] As mentioned above, the thermal cleaning time may be longer than the growth time of the second semiconductor 3. In this case, since the thermal cleaning time is longer, the number of Si atoms can be further reduced.

[0040] As mentioned above, the manufacturing method may further include a step P4 between the thermal cleaning step P3 and the second semiconductor 3 growth step P5, in which the growth furnace C is heated by replacing the AsH3 atmosphere with a phosphine atmosphere. Furthermore, the flow rate of AsH3 in the thermal cleaning may be greater than the flow rate of phosphine in the heating step P4. By making the flow rate of AsH3 greater than the subsequent flow rate of phosphine in this way, the flow rate of AsH3 increases, and therefore the number of Si atoms can be further reduced.

[0041] As mentioned above, the first semiconductor 2 is (InP) 1-z (In 0.53 Ga 0.47 As) z The case may be (0≦z<1). In this case, a semiconductor device 1 can be obtained that includes a first semiconductor 2 that is lattice-matched with InP.

[0042] [Comparative Example 1] First, as a first comparative example, an InP substrate (corresponding to the first semiconductor 2 described above) was subjected to thermal cleaning with PH3, and then an InP layer (corresponding to the second semiconductor 3 described above) was grown on the InP substrate. Figure 4 shows the change in the set temperature inside the growth furnace over time in this comparative example. In Figure 4, the vertical axis represents temperature (°C), and the horizontal axis represents time (minutes). As shown in Figure 4, the manufacturing method according to this comparative example includes at least two steps, P5 and P7. Step P5 is the same as step P5 in the above embodiment. In step P5, while maintaining the set temperature inside the growth furnace at the set temperature T3, an In raw material gas (trimethylindium) was supplied in addition to PH3 to grow an InP layer on the InP substrate.

[0043] Process P7 was performed before process P5. In process P7, PH3 was supplied into the growth furnace to create an atmosphere containing only PH3 and carrier gas. The flow rate of PH3 was 1500 sccm. Then, by maintaining the set temperature inside the growth furnace at set temperature T4, thermal cleaning was performed on the surface of the InP substrate. For three InP substrates, the set temperature T4 and processing time for thermal cleaning were set to 800°C for 15 minutes, 830°C for 5 minutes, and 830°C for 15 minutes, respectively. In addition, an InP substrate that was not subjected to thermal cleaning was also prepared.

[0044] Figure 5 is a graph showing the distribution of Si concentration in the thickness direction, obtained by performing secondary ion mass spectrometry on the four samples prepared in the comparative example. In Figure 5, the vertical axis represents the Si concentration (atoms / cm³). 3 The horizontal axis represents the position in the thickness direction, i.e., the depth (μm). In Figure 5, curve G11 shows the case where thermal cleaning is not performed. Curve G12 shows the case where the set temperature T4 for thermal cleaning and the processing time are 800°C for 15 minutes. Curve G13 shows the case where the set temperature T4 for thermal cleaning and the processing time are 830°C for 5 minutes. Curve G14 shows the case where the set temperature T4 for thermal cleaning and the processing time are 830°C for 15 minutes.

[0045] Referring to Figure 5, in all samples, a peak in Si concentration exists in the range of 0.4 μm to 0.7 μm depth, i.e., near the interface between the InP substrate and the InP layer. Furthermore, compared to the sample without thermal cleaning (curve G11), the samples with thermal cleaning (curves G12 to G14) show a slight reduction in Si concentration. Moreover, the higher the set temperature T4 and the longer the processing time, the greater the reduction in Si concentration. From this, it can be seen that even with thermal cleaning using PH3, the number of Si atoms present at the interface between the InP substrate and the InP layer is slightly reduced.

[0046] Figure 6 shows micrographs of the surface of an InP substrate after thermal cleaning. In Figure 6, photographs A1 to A4 show the results for set temperatures T4 and processing times of 800°C for 15 minutes, 815°C for 15 minutes, 830°C for 5 minutes, and 830°C for 15 minutes, respectively. Referring to Figure 6, it can be seen that the surface flatness deteriorates as the set temperature T4 increases and the processing time increases. When the surface roughness, an indicator of surface flatness, was measured, the surface roughness was 0.1856 nm at 800°C for 15 minutes, 1.745 nm at 815°C for 15 minutes, 0.1877 nm at 830°C for 5 minutes, and 3.141 nm at 830°C for 15 minutes. Thus, high temperature or long processing time significantly deteriorates the surface flatness of the InP substrate.

[0047] Based on the comparative examples described above, when PH3 is used for thermal cleaning, the effect of reducing Si atoms is small. Furthermore, if the processing temperature is increased and the processing time is extended to reduce Si atoms more, the flatness of the InP substrate surface is impaired, making it difficult to apply to practical devices.

[0048] [Comparative Example 2] Next, as a second comparative example, an InP substrate was subjected to thermal cleaning in an AsH3 atmosphere. Figure 7 shows the change in the set temperature inside the growth furnace over time in this comparative example. In Figure 7, the vertical axis represents temperature (°C) and the horizontal axis represents time (minutes). As shown in Figure 7, in this example, after the InP substrate was placed inside the growth furnace, the set temperature inside the growth furnace was first maintained at 200°C, then the set temperature inside the growth furnace was raised to 800°C, and thermal cleaning of the InP substrate was performed at a furnace temperature of 800°C. In this comparative example, multiple InP substrates were divided into two groups: Group 1 and Group 2. Group 1 is the group to which AsH3 is supplied only for the period P10 (5 minutes) during which the furnace temperature is maintained at 800°C. Group 2 is the group to which AsH3 is supplied for the period P11 (15 minutes) which includes the period during which the furnace temperature rises from 200°C to 800°C and the period during which the furnace temperature is maintained at 800°C. For some of the InP substrates in Group 1, the supply of AsH3 was set to 100 sccm. For the remaining InP substrates in Group 1, the supply of AsH3 was set to 400 sccm. For the InP substrates in Group 2, the supply of AsH3 was set to 100 sccm. Note that 1 sccm is equal to 1.67 × 10⁻⁶. -8 m 3 Equivalent to / s

[0049] Figures 8 to 10 show microscopic images of the surface of an InP substrate. Figure 8 shows the surface of an InP substrate in the first group with an AsH3 supply of 400 sccm. Figure 9 shows the surface of an InP substrate in the first group with an AsH3 supply of 100 sccm. Figure 10 shows the surface of an InP substrate in the second group. In Figures 8 to 10, the image in section (b) is an enlarged view of the image in section (a). Referring to Figures 8 to 10, it can be seen that when AsH3 is supplied to the surface of an InP substrate at high temperatures such as 800°C, P atoms are removed due to thermal degradation of InP, and the resulting precipitated In atoms combine with As atoms, generating a large number of foreign substances F on the surface.

[0050] Based on the comparative examples described above, even when AsH3 is used for thermal cleaning, increasing the processing temperature generates foreign matter F on the surface of the InP substrate, making it difficult to apply to practical devices.

[0051] [Reference example] Next, as a reference example, thermal cleaning was performed on InP substrates without supplying either AsH3 or PH3 into the growth furnace (while supplying only carrier gas). In this reference example, multiple InP substrates were divided into four groups, and only the set temperature for thermal cleaning (800°C in Figure 7) was set to 590°C, 595°C, 600°C, and 620°C for the four groups, respectively, as shown in the time variation of the set temperature in Figure 7.

[0052] Figures 11 and 12 show microscopic photographs of the InP substrate surface after thermal cleaning in this reference example. Sections (a) and (b) of Figure 11 show the case where the set temperature for thermal cleaning was 590°C and 595°C, respectively. Sections (a) and (b) of Figure 12 show the case where the set temperature for thermal cleaning was 600°C and 620°C, respectively. As shown in Figure 12, when the set temperature for thermal cleaning was 600°C or higher, the occurrence of foreign matter D was confirmed on the surface of the InP substrate. As shown in Figure 11, when the set temperature for thermal cleaning was 595°C or lower, the occurrence of foreign matter D was not confirmed on the surface of the InP substrate.

[0053] Part (a) of Figure 13 is a magnified view of the foreign substance D shown in Part (b) of Figure 12. Part (b) of Figure 13 is a graph showing the results of analyzing the foreign substance D along the line L using energy-dispersive X-ray spectroscopy (EDS). In Part (b) of Figure 13, line G21 represents the X-ray intensity due to In, i.e., the In concentration, and line G22 represents the X-ray intensity due to P, i.e., the P concentration. From these analysis results, it was found that the foreign substance D is formed when P is removed at high temperatures and In precipitates. Therefore, it is more preferable to set the thermal cleaning temperature to 595°C or lower, which is equivalent to 476°C or lower for the InP substrate temperature, because no In will precipitate at all.

[0054] [First Embodiment] Next, as the first embodiment, an InP substrate was subjected to thermal cleaning in an AsH3 atmosphere, and then an InP layer was grown on the InP substrate. In this embodiment, the time variation of the set temperature shown in Figure 3 was applied, with the set temperature T2 for thermal cleaning set to 585°C and the set temperature T3 for growing the InP layer set to 775°C. Multiple InP substrates were then divided into three groups, and the processing time for thermal cleaning (the length of the period during which AsH3 was supplied while maintaining the set temperature T2) was set to 0 minutes, 30 minutes, and 60 minutes for the three groups, respectively. The amount of AsH3 supplied during thermal cleaning was 1 slm.

[0055] Figure 14 is a graph showing the distribution of Si concentration in the thickness direction, obtained by performing secondary ion mass spectrometry on three groups of samples prepared in this example. In Figure 14, the vertical axis represents the Si concentration (atoms / cm³). 3 The horizontal axis represents the position in the thickness direction, i.e., the depth (μm). In Figure 14, curve G31 shows the case where the thermal cleaning processing time is 0 minutes, i.e., no thermal cleaning was performed. Curve G32 shows the case where the thermal cleaning processing time is 30 minutes. Curve G33 shows the case where the thermal cleaning processing time is 60 minutes.

[0056] Referring to Figure 14, in all samples, a peak in Si concentration exists in the range of 0.4 μm to 0.7 μm in depth, i.e., near the interface between the InP substrate and the InP layer. Furthermore, compared to the sample without thermal cleaning (curve G31), the samples with thermal cleaning (curves G32, G33) show a significant reduction in Si concentration. Moreover, the longer the thermal cleaning processing time, the greater the reduction in Si concentration. Also, compared to the graph shown in Figure 5, the Si concentration is reduced by about an order of magnitude. From this, it can be seen that thermal cleaning at a temperature lower than the growth temperature of the InP layer and in an AsH3 atmosphere can significantly reduce the number of Si atoms present at the interface between the InP substrate and the InP layer.

[0057] Figure 15 shows micrographs of the surface of an InP substrate after thermal cleaning. In Figure 15, photographs A5 to A7 show the results for processing times of 0 minutes, 30 minutes, and 60 minutes, respectively. Referring to Figure 15, it can be seen that the surface flatness is maintained regardless of the processing time. When the surface roughness, an indicator of surface flatness, was measured, the surface roughness of the sample processed for 0 minutes was 0.1781 nm, the sample processed for 30 minutes was 0.1583 nm, and the sample processed for 60 minutes was 0.1822 nm. Thus, in all samples, the surface roughness was below 0.3 nm, which is considered a good indicator of flatness. In this way, thermal cleaning at a temperature lower than the growth temperature of the InP layer and in an AsH3 atmosphere can maintain good surface flatness of the InP substrate even with longer processing times. Therefore, the effect of reducing Si atoms can be enhanced by increasing the processing time. Furthermore, in this embodiment, the foreign matter F (see Figures 8-10) that was detected during high-temperature thermal cleaning was not detected at all in Dynamic Force Mode (DFM) of the scanning probe microscope.

[0058] [Second Example] Next, as a second embodiment, an InP substrate was subjected to thermal cleaning in an AsH3 atmosphere, and then an InP layer was grown on the InP substrate. In this embodiment as well, the time variation of the set temperature shown in Figure 3 was applied, with the set temperature T2 during thermal cleaning set to 585°C and the set temperature T3 during InP layer growth set to 775°C. Multiple InP substrates were then divided into five groups, and the supply amount and supply time of AsH3 during thermal cleaning were set to 0 slm·0 min, 0.5 slm·30 min, 1.0 slm·15 min, 1.0 slm·30 min, and 1.0 slm·60 min for each of the five groups. The volume of the growth furnace used was approximately 50265 cm³. 3 That was the case.

[0059] Figure 16 is a graph showing the distribution of Si concentration in the thickness direction, obtained by performing secondary ion mass spectrometry on five groups of samples prepared in this example. In Figure 16, the vertical axis represents the Si concentration (atoms / cm³). 3 The horizontal axis represents the position in the thickness direction, i.e., the depth (μm). In Figure 16, curve G41 shows the case where the thermal cleaning processing time is 0 minutes, i.e., no thermal cleaning is performed. Curve G42 shows the case where the supply amount and supply time of AsH3 is 0.5 slm and 30 minutes. Curve G43 shows the case where the supply amount and supply time of AsH3 is 1.0 slm and 15 minutes. Curve G44 shows the case where the supply amount and supply time of AsH3 is 1.0 slm and 30 minutes. Curve G45 shows the case where the supply amount and supply time of AsH3 is 1.0 slm and 60 minutes.

[0060] Referring to Figure 16, the Si concentration is significantly reduced in the samples that underwent thermal cleaning (curves G42-G45) compared to the sample that did not undergo thermal cleaning (curve G41). Furthermore, the Si concentration is reduced more as the total supply amount of AsH3 (product of supply amount and supply time) increases. From this, it can be seen that thermal cleaning at a temperature lower than the growth temperature of the InP layer and in an AsH3 atmosphere can significantly reduce the number of Si atoms present at the interface between the InP substrate and the InP layer.

[0061] Figure 17 is a chart showing the ratio (S / M) of the total supply amount S of AsH3 to the growth furnace volume M, and the amount of Si atoms incorporated (Si concentration) for four samples that underwent thermal cleaning. The ratio (S / M) is shown as a percentage. The amount of Si atoms incorporated is calculated with the case without thermal cleaning set to 1. Referring to Figure 17, it can be seen that when the ratio (S / M) is 50% or more, in other words, when the total supply amount of AsH3 is 50% or more of the growth furnace volume, the amount of Si atoms incorporated is significantly reduced (by more than an order of magnitude).

[0062] [Third Embodiment] Next, as a third embodiment, an InP substrate was subjected to thermal cleaning in an AsH3 atmosphere, and then an InP layer was grown on the InP substrate. In this embodiment as well, the time variation of the set temperature shown in Figure 3 was applied. However, multiple InP substrates were divided into five groups, and the set temperature T2 for thermal cleaning was set to 450°C, 500°C, 540°C, and 585°C for four of the groups, respectively. The remaining group was not subjected to thermal cleaning. The set temperature T3 for growing the InP layer was 775°C. The supply amount and supply time of AsH3 were 1.0 slm and 30 minutes.

[0063] Figure 18 is a graph showing the distribution of Si concentration in the thickness direction, obtained by performing secondary ion mass spectrometry on five groups of samples prepared in this example. In Figure 18, the vertical axis represents the Si concentration (atoms / cm³). 3 The horizontal axis represents the position in the thickness direction, i.e., the depth (μm). In Figure 18, curve G51 shows the case where thermal cleaning is not performed. Curve G52 shows the case where the set temperature T2 is 450°C. Curve G53 shows the case where the set temperature T2 is 500°C. Curve G54 shows the case where the set temperature T2 is 540°C. Curve G55 shows the case where the set temperature T2 is 585°C.

[0064] Referring to Figure 18, the Si concentration is reduced in the samples that underwent thermal cleaning (curves G52-G55) compared to the sample that did not undergo thermal cleaning (curve G51). In particular, when the set temperature T2 was 540°C or higher (equivalent to 417°C or higher in terms of the temperature of the InP substrate), the Si concentration was significantly reduced (by more than an order of magnitude). From this, it can be seen that thermal cleaning at a temperature lower than the growth temperature of the InP layer and in an AsH3 atmosphere can significantly reduce the number of Si atoms present at the interface between the InP substrate and the InP layer.

[0065] Figure 19 is a graph showing the concentration distribution of oxygen (O) atoms in the thickness direction in this embodiment. Figure 20 is a graph showing the concentration distribution of carbon (C) atoms in the thickness direction in this embodiment. In Figures 19 and 20, curves G61 and G71 show the case without thermal cleaning. Curves G62 and G72 show the case when the set temperature T2 is 450°C. Curves G63 and G73 show the case when the set temperature T2 is 500°C. Curves G64 and G74 show the case when the set temperature T2 is 540°C. Curves G65 and G75 show the case when the set temperature T2 is 585°C. As shown in Figures 19 and 20, thermal cleaning at a temperature lower than the growth temperature of the InP layer and in an AsH3 atmosphere reduces not only Si atoms but also O atoms and C atoms at the interface between the InP substrate and the InP layer.

[0066] The semiconductor device manufacturing method according to this disclosure is not limited to the embodiments described above, and various other modifications are possible. For example, the set temperature for thermal cleaning and the temperature of the first semiconductor are not limited to the temperatures shown in the above embodiments and examples, and various temperatures can be used as long as they are lower than the set temperature for growing the second semiconductor and the temperature of the first semiconductor. [Explanation of Symbols]

[0067] 1...Semiconductor device, 2...First semiconductor, 3...Second semiconductor, 4...Interface, A1~A7...Photograph, C...Growth furnace, D,F...Foreign matter, L...Linear, T1~T4...Set temperature.

Claims

1. A method for manufacturing a semiconductor device comprising a first semiconductor made of InP or InGaAsP and a second semiconductor provided on the first semiconductor, A step of performing thermal cleaning on the surface of the first semiconductor in a growth furnace with an atmosphere containing arsine, The process involves growing the second semiconductor on the surface of the first semiconductor within the growth furnace, Equipped with, A method for manufacturing a semiconductor device, wherein the set temperature in the growth furnace during thermal cleaning is lower than the set temperature in the growth furnace when growing the second semiconductor.

2. The method for manufacturing a semiconductor device according to claim 1, wherein the temperature of the first semiconductor in the thermal cleaning is lower than 534°C.

3. The method for manufacturing a semiconductor device according to claim 1, wherein the temperature of the first semiconductor in the thermal cleaning is 476°C or lower.

4. A method for manufacturing a semiconductor device according to claim 1 or 2, wherein the temperature of the first semiconductor in the thermal cleaning is 417°C or higher.

5. The method for manufacturing a semiconductor device according to claim 1, wherein the temperature of the first semiconductor in the thermal cleaning is 417°C or higher and 476°C or lower.

6. A method for manufacturing a semiconductor device according to any one of claims 1 to 3, wherein the processing time in the thermal cleaning is 30 minutes or more.

7. A method for manufacturing a semiconductor device according to any one of claims 1 to 3, wherein in the thermal cleaning, the total amount of arsine supplied is 50% or more of the volume of the growth furnace.

8. A method for manufacturing a semiconductor device according to any one of claims 1 to 3, wherein the root mean square roughness of the surface of the first semiconductor after the thermal cleaning is 0.3 nm or less.

9. The method for manufacturing a semiconductor device according to any one of claims 1 to 3, wherein the thermal cleaning time is longer than the growth time of the second semiconductor.

10. Between the step of performing the thermal cleaning and the step of growing the second semiconductor, The process further includes replacing the arsine atmosphere with a phosphine atmosphere inside the growth furnace and raising the temperature inside the growth furnace, A method for manufacturing a semiconductor device according to any one of claims 1 to 3, wherein the flow rate of arsine in the thermal cleaning is greater than the flow rate of phosphine in the heating step.

11. The first semiconductor is (InP) １－ｚ (In ０．５３ Ga ０．４７ As) ｚ A method for manufacturing a semiconductor device according to any one of claims 1 to 3, wherein (0 ≤ z < 1).

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