Silicon carbide metal oxide film semiconductor field-effect transistor and method for manufacturing the same

Abstract

The present invention provides a method for manufacturing a silicon carbide metal oxide film semiconductor field-effect transistor and a transistor said thereto, which improves the interface quality and channel mobility. [Solution] The method involves preparing a silicon carbide substrate 10, forming an N-type silicon carbide epitaxial layer 20 having an upper surface on the silicon carbide substrate, and forming two doping structures 30 adjacent to the upper surface within the N-type silicon carbide epitaxial layer. Each doping structure includes a P-type well 31, an N-type doped region 32, and a P-type doped region 33, with the N-type doped region located within the P-type well. The P-type doped region is located within the P-type well and adjacent to the N-type doped region. The method also involves depositing a silicon-rich nitride film 40 on the upper surface to isolate the gate oxide film 50 from the silicon carbide substrate, depositing the gate oxide film on the silicon-rich nitride film, performing a post-oxidation annealing process on the gate oxide film, and forming a gate structure 60 on the gate oxide film.

Description

Technical Field

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[0001] The present invention relates to a silicon carbide metal oxide semiconductor field effect transistor and a manufacturing method thereof, and particularly to a silicon carbide metal oxide semiconductor field effect transistor and a manufacturing method thereof that improve interface quality and enhance channel mobility.

Background Art

[0002] A silicon carbide metal oxide semiconductor field effect transistor (Silicon Carbide Metal Oxide Semiconductor Field Effect Transistor, abbreviated as SiC MOSFET) has characteristics of high temperature resistance, high voltage resistance, and low on-resistance. This transistor is suitable for high-speed power devices. This transistor provides high electron mobility and switching speed. However, oxygen vacancy defects are likely to occur at the interface between the silicon carbide substrate and the gate oxide film. Oxygen vacancy defects increase the interface trap density. Electrons are trapped when flowing through the interface. The trapping of electrons reduces the channel mobility. Accordingly, the channel resistance increases. The channel resistance occupies a large proportion of the on-resistance. The increase in the channel resistance causes the on-resistance to rise. The increase in the on-resistance increases the power loss of the device. The increase in the power loss causes serious reliability problems.

[0003] Therefore, how to design a silicon carbide metal oxide semiconductor field effect transistor and a manufacturing method thereof that can improve the above problems is an issue worthy of research.

Summary of the Invention

[0004] An object of the present invention is to provide a manufacturing method of a silicon carbide metal oxide semiconductor field effect transistor that improves interface quality and enhances channel mobility.

[0005] To achieve the above objective, the present invention discloses a method for manufacturing a silicon carbide metal oxide film semiconductor field-effect transistor. The present invention includes the following steps: A silicon carbide substrate is prepared. An N-type silicon carbide epitaxial layer having an upper surface is formed on the silicon carbide substrate. Two doping structures are formed near the upper surface within the N-type silicon carbide epitaxial layer. Each doping structure consists of a P-type well, an N-type doped region, and a P-type doped region. The N-type doped region is located within the P-type well. The P-type doped region is located within the P-type well and is adjacent to the N-type doped region. A silicon-rich nitride film is deposited on the upper surface. A gate oxide film is deposited on the silicon-rich nitride film. The silicon-rich nitride film isolates the gate oxide film from the N-type silicon carbide epitaxial layer. A post-oxidation annealing process is performed on the gate oxide film. A gate structure is formed on the gate oxide film.

[0006] In the embodiments of the present invention, the thickness of the silicon-rich nitride film is 50 Å to 150 Å.

[0007] In the embodiments of the present invention, the silicon-rich nitride film is deposited on the upper surface by an atomic layer deposition process.

[0008] In the embodiments of the present invention, the post-oxidation annealing step is performed by carrying out high-temperature annealing in a nitric oxide or nitrous oxide environment.

[0009] In embodiments of the present invention, the gate structure is made of polycrystalline silicon or metal.

[0010] The present invention further provides a silicon carbide metal oxide film semiconductor field-effect transistor. The silicon carbide metal oxide film semiconductor field-effect transistor of the present invention comprises a silicon carbide substrate, an N-type silicon carbide epitaxial layer, two doping structures, a silicon-rich nitride film, a gate oxide film, and a gate structure. The N-type silicon carbide epitaxial layer has an upper surface. The two doping structures are formed within the N-type silicon carbide epitaxial layer and adjacent to the upper surface. Each doping structure comprises a P-type well, an N-type doped region, and a P-type doped region. The N-type doped region is located within the P-type well. The P-type doped region is located within the P-type well and adjacent to the N-type doped region. The silicon-rich nitride film is located on the upper surface. The gate oxide film is located on the silicon-rich nitride film. The silicon-rich nitride film isolates the gate oxide film from the N-type silicon carbide epitaxial layer. The gate structure is located on the gate oxide film. [Brief explanation of the drawing]

[0011] [Figure 1] Schematic diagram showing the structure of the silicon carbide metal oxide film semiconductor field-effect transistor of the present invention. [Figure 2] Flowchart of the method for manufacturing a silicon carbide metal oxide film semiconductor field-effect transistor of the present invention [Modes for carrying out the invention]

[0012] Each aspect and embodiment is merely illustrative and not limiting; other aspects and embodiments can be made by a person of ordinary skill after referring to this specification without departing from the scope of the invention. The features and advantages of embodiments of the invention will become more apparent from the following detailed description and the scope of the patent application.

[0013] In this specification, the terms “one” or “one” are used to describe the elements and components described herein. This is for convenience and to give a general meaning to the scope of the invention. Thus, unless otherwise intended, such descriptions are understood to include one or at least one, and the singular form also includes the plural form.

[0014] In this specification, “includes,” “companies,” “has,” “possesses,” or other similar terms refer to non-exclusive inclusion. For example, a component or structure containing multiple elements is not limited to the elements listed herein, and may include other elements that are not explicitly listed but are inherent to the component or structure.

[0015] In the following description, the silicon carbide metal oxide semiconductor field-effect transistor will be described using an N-type MOSFET as an example. Its internal structure corresponds to that of an N-type MOSFET, but the present invention is not limited to this. For example, the silicon carbide metal oxide semiconductor field-effect transistor of the present invention can be designed as a P-type MOSFET. The conductivity type of all related internal structures will be the opposite of that of an N-type MOSFET.

[0016] Figure 1 is a schematic diagram showing the structure of a silicon carbide metal oxide film semiconductor field-effect transistor. As shown in Figure 1, the silicon carbide metal oxide film semiconductor field-effect transistor 1 includes a silicon carbide substrate 10, an N-type silicon carbide epitaxial layer 20, two doping structures 30, a silicon-rich nitride film 40, a gate oxide film 50, and a gate structure 60. The silicon carbide substrate 10 and the N-type silicon carbide epitaxial layer 20 are the basic structure of the silicon carbide metal oxide film semiconductor field-effect transistor 1. The N-type silicon carbide epitaxial layer 20 is located on the silicon carbide substrate 10. The N-type silicon carbide epitaxial layer 20 has an upper surface 21. In the embodiment of the present invention, the silicon carbide substrate 10 is made of an N-type silicon carbide material.

[0017] The two doping structures 30 are formed within the N-type silicon carbide epitaxial layer 20 and are adjacent to the upper surface 21. The two doping structures 30 are positioned opposite each other with a gap between them. Each doping structure 30 includes a P-type well 31, an N-type (N+) doped region 32, and a P-type (P+) doped region 33. The P-type well 31 is adjacent to the upper surface 21 and extends downward from the upper surface 21. The conductivity type of the P-type well 31 is the opposite of that of the N-type silicon carbide epitaxial layer 20. The N-type doped region 32 is located within the P-type well 31. The N-type doped region 32 is adjacent to the upper surface 21 and extends downward from the upper surface 21. The conductivity type of the N-type doped region 32 is the same as that of the N-type silicon carbide epitaxial layer 20 and the silicon carbide substrate 10. The P-type doped region 33 is located within the P-type well 31. The P-type doped region 33 is adjacent to the upper surface 21 and the N-type doped region 32, and extends downward from the upper surface 21. The conductivity type of the P-type doped region 33 is the opposite of that of the N-type silicon carbide epitaxial layer 20 and the silicon carbide substrate 10.

[0018] The silicon-rich nitride film 40 is located on the upper surface 21. This film functions as an interfacial passivation layer. In the embodiments of the present invention, the silicon-rich nitride film 40 is formed by an atomic layer deposition process. This process deposits the silicon-rich nitride on the upper surface 21. In the embodiments of the present invention, the thickness of the silicon-rich nitride film 40 is 50 Å to 150 Å.

[0019] The gate oxide film 50 is located on the silicon-rich nitride film 40. The silicon-rich nitride film 40 isolates the gate oxide film 50 from the N-type silicon carbide epitaxial layer 20. After the formation of the gate oxide film 50, a post-oxidation annealing process is performed. This process reduces the defect density. In the embodiment of the present invention, the gate oxide film 50 is made of silicon dioxide (SiO2).

[0020] The gate structure 60 is located on the gate oxide film 50. In an embodiment of the present invention, the gate structure 60 is made of a polycrystalline silicon material. The present invention is not limited to this. The gate structure 60 can also be made of a metal material.

[0021] In a conventional silicon carbide metal oxide semiconductor field effect transistor, a gate oxide film is formed on an N-type silicon carbide epitaxial layer. Carbon atoms in the N-type silicon carbide epitaxial layer diffuse into the gate oxide film and react with oxygen atoms. This reaction generates carbon by-products and increases the number of interface defects. In contrast, in the silicon carbide metal oxide semiconductor field effect transistor 1, the silicon-rich nitride film 40 is used to isolate the gate oxide film 50 and the N-type silicon carbide epitaxial layer 20. The silicon-rich nitride film 40 prevents carbon atoms in the N-type silicon carbide epitaxial layer 20 from diffusing into the gate oxide film 50. A post-oxidation annealing process is performed on the gate oxide film 50. After annealing, nitrogen atoms in the silicon-rich nitride film 40 diffuse to the interface. Carbon atoms become less likely to react with oxygen atoms. Therefore, the generation of carbon by-products due to the reaction is reduced. The number of interface defects is reduced and the interface quality is improved.

[0022] This will be described with reference to FIGS. 1 and 2. FIG. 2 is a flowchart of a method for manufacturing a silicon carbide metal oxide semiconductor field effect transistor. The method for manufacturing a silicon carbide metal oxide semiconductor field effect transistor includes the following steps.

[0023] Step S1: Prepare a silicon carbide substrate.

[0024] First, the present invention prepares a silicon carbide substrate 10. This substrate mounts other structures and components of the silicon carbide metal oxide semiconductor field effect transistor 1.

[0025] Step S2: Form an N-type silicon carbide epitaxial layer on the silicon carbide substrate.

[0026] After preparing the silicon carbide substrate 10 in step S1, an N-type silicon carbide epitaxial layer 20 is formed on the silicon carbide substrate 10 by a chemical vapor deposition process. The silicon carbide substrate 10 and the N-type silicon carbide epitaxial layer 20 are the basic structure of the silicon carbide metal oxide semiconductor field effect transistor 1. The N-type silicon carbide epitaxial layer 20 has an upper surface 21. The upper surface 21 is located on the side opposite to the silicon carbide substrate 10 of the N-type silicon carbide epitaxial layer 20.

[0027] Step S3: Two doping structures are formed at positions adjacent to the upper surface 21 within the N-type silicon carbide epitaxial layer 20.

[0028] After forming the N-type silicon carbide epitaxial layer 20 in step S2, the present invention forms two doping structures 30 near the upper surface 21 within the N-type silicon carbide epitaxial layer 20 by an ion implantation process. As shown in FIG. 1, each doping structure 30 is composed of a P-type well 31, an N-type doped region 32, and a P-type doped region 33. The N-type doped region 32 is located within the P-type well 31. The P-type doped region 33 is located within the P-type well 31 and is adjacent to the N-type doped region 32.

[0029] Step S4: Deposit a silicon-rich nitride film on the upper surface.

[0030] After forming the two doping structures 30 in step S3, the present invention forms a silicon-rich nitride film 40 on the upper surface 21 of the N-type silicon carbide epitaxial layer 20 by an atomic layer deposition process. This film is made of silicon-rich nitride and functions as an interface passivation layer between the N-type silicon carbide epitaxial layer 20 and the gate oxide film 50.

[0031] Step S5: Deposit a gate oxide film on the silicon-rich nitride film.

[0032] After forming the silicon-rich nitride film 40 in step S4, the present invention forms a gate oxide film 50 on the silicon-rich nitride film 40 by a deposition process. The gate oxide film 50 and the N-type silicon carbide epitaxial layer 20 are isolated by the silicon-rich nitride film 40.

[0033] Step S6: A post-oxidation annealing process is performed on the gate oxide film.

[0034] After forming the gate oxide film 50 in step S5, the present invention performs a post-oxidation annealing step on the gate oxide film 50. This step reduces the defect density of the interface. In embodiments of the present invention, the post-oxidation annealing step involves high-temperature annealing of the incomplete structure of the silicon carbide metal oxide film semiconductor field-effect transistor 1 in a nitric oxide (NO) or nitrous oxide (N2O) environment.

[0035] Step S7: Form a gate structure on the gate oxide film.

[0036] After performing the post-oxidation annealing process in step S6, the present invention forms a gate structure 60 on the gate oxide film 50 by the manufacturing process.

[0037] Thus, the silicon carbide metal oxide film semiconductor field-effect transistor 1 of the present invention is formed by the method for manufacturing a silicon carbide metal oxide film semiconductor field-effect transistor of the present invention.

[0038] As described above, the silicon carbide metal oxide film semiconductor field-effect transistor 1 of the present invention improves the interface quality between the gate oxide film 50 and the N-type silicon carbide epitaxial layer 20 by arranging the silicon-rich nitride film 40. This improvement in interface quality enhances channel mobility, which in turn reduces channel resistance and on-resistance. Therefore, the silicon carbide metal oxide film semiconductor field-effect transistor 1 of the present invention can not only reduce device power loss but also provide stable reliability.

[0039] The embodiments described above are illustrative and not intended to limit the embodiments or uses of the present invention. Furthermore, while the embodiments described above show at least one exemplary example, it should be understood that numerous variations of the invention are possible. Also, the embodiments described herein are not intended to limit the claims, uses, or configurations in any way. Rather, the embodiments described above provide a guide for a person ordinary skill in the art to carry out one or more embodiments. Furthermore, changes can be made to the function and arrangement of the elements without departing from the claims, and the claims include all known and foreseeable equivalents at the time of filing of this patent application. [Explanation of Symbols]

[0040] 1. Silicon carbide metal oxide film semiconductor field-effect transistor 10 Silicon carbide substrate 20 N-type silicon carbide epitaxial layer 21 Top side 30 Doping Structures 31 P-type wells 32 N-type doped region 33 P-type doped region 40 Silicon-rich nitride film 50 Gate oxide film 60 gate structure S1~S7 process

Claims

1. A method for manufacturing a silicon carbide metal oxide film semiconductor field-effect transistor, The process of preparing a silicon carbide substrate, The process of forming an N-type silicon carbide epitaxial layer having an upper surface on the silicon carbide substrate, The process of forming two doping structures near the upper surface within the N-type silicon carbide epitaxial layer, each consisting of a P-type well, an N-type doped region located within the P-type well, and a P-type doped region located within the P-type well and adjacent to the N-type doped region, The process involves depositing a silicon-rich nitride film on the upper surface, A step of depositing a gate oxide film on the silicon-rich nitride film, and isolating the gate oxide film from the N-type silicon carbide epitaxial layer with the silicon-rich nitride film, A step of performing a post-oxidation annealing process on the gate oxide film, A method for manufacturing a silicon carbide metal oxide film semiconductor field-effect transistor, comprising the step of forming a gate structure on the gate oxide film.

2. The method for manufacturing a silicon carbide metal oxide film semiconductor field-effect transistor according to claim 1, characterized in that the thickness of the silicon-rich nitride film is 50 Å to 150 Å.

3. The method for manufacturing a silicon carbide metal oxide film semiconductor field-effect transistor according to claim 1, characterized in that the silicon-rich nitride film is deposited on the upper surface by an atomic layer deposition process.

4. The method for manufacturing a silicon carbide metal oxide film semiconductor field-effect transistor according to claim 1, characterized in that the post-oxidation annealing step is carried out at high temperature in a nitric oxide or nitrous oxide environment.

5. The method for manufacturing a silicon carbide metal oxide film semiconductor field-effect transistor according to claim 1, characterized in that the gate structure is made of polycrystalline silicon or metal.

6. A silicon carbide metal oxide film semiconductor field-effect transistor, Silicon carbide substrate and An N-type silicon carbide epitaxial layer having an upper surface is formed on the silicon carbide substrate, Near the upper surface of the N-type silicon carbide epitaxial layer, there are two doping structures comprising a P-type well, an N-type doped region located within the P-type well, and a P-type doped region located within the P-type well and adjacent to the N-type doped region. The silicon-rich nitride film located on the upper surface, A gate oxide film located on the silicon-rich nitride film and isolated from the N-type silicon carbide epitaxial layer by the silicon-rich nitride film, A silicon carbide metal oxide film semiconductor field-effect transistor comprising a gate structure located on the aforementioned gate oxide film.

7. The silicon carbide metal oxide film semiconductor field-effect transistor according to claim 6, characterized in that the thickness of the silicon-rich nitride film is 50 Å to 150 Å.

8. The silicon-rich nitride film is deposited on the upper surface by an atomic layer deposition process, as described in claim 6, for a silicon carbide metal oxide film semiconductor field-effect transistor.

9. The silicon carbide metal oxide film semiconductor field-effect transistor according to claim 6, wherein the gate oxide film is subjected to a post-oxidation annealing process, and the post-oxidation annealing process is characterized by carrying out high-temperature annealing in a nitric oxide or nitrous oxide environment.

10. The silicon carbide metal oxide film semiconductor field-effect transistor according to claim 6, characterized in that the gate structure is made of polycrystalline silicon or metal.

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