Amplifier and its operating method

Abstract

This application provides an amplifier that rapidly transitions from a transient state to a steady state and a method for operating the same. [Solution] The amplifier 200 includes a signal input terminal NIN, a signal output terminal NOUT, an amplification circuit 201, and at least one variable voltage generation circuit. The signal input terminal receives an input signal, and the signal output terminal outputs an amplified signal. Transistor T1 of the amplification circuit includes a first terminal, a second terminal, a control terminal, and a body terminal, the control terminal being connected to the signal input terminal, the second terminal being connected to a second node N2, and the body terminal being floating. At least one variable voltage generation circuit is connected to transistor T2 of the amplification circuit. During the transition period, a first voltage difference occurs between the second terminal and the first terminal of transistor T1, and during the steady-state period, a second voltage difference occurs between the second terminal and the first terminal of transistor T1. The first voltage difference is greater than the second voltage difference.

Description

Technical Field

[0001] This disclosure relates to an amplifier and a method of operating the same, and more particularly, to an amplifier that can quickly transition from a transient state to a steady state and a method of operating the same.

Background Art

[0002] Amplifiers are important components of radio-frequency (RF) transceiver circuits and are used to amplify RF signals. For example, an amplifier may include power amplifiers (PAs) and low noise amplifiers (LNAs). In a communication system, an amplifier may be disposed near an antenna and used to amplify a received signal. The performance of an amplifier may be evaluated by various parameters such as gain, noise figure, linearity, power consumption, stability, etc.

[0003] In amplifiers, floating-body transistors, where the body terminal is floating, may be used to achieve a good noise figure. In practical applications, amplifiers may be switched between various operating states. During these transitions, the threshold voltage of the floating-body transistor may be less stable, leading to slower stabilization of the transistor's current (e.g., drain-source current) and a slower amplifier transition response. Multiple observations suggest that increasing the voltage difference between the transistor's drain and source may help stabilize the transistor more quickly, leading to faster stabilization of the drain-source current and improved amplifier transition response. Therefore, there is a need for amplifiers that can rapidly switch between multiple different operating modes while maintaining desirable performance parameters such as noise figure. [Overview of the project]

[0004] One embodiment provides an amplifier comprising a signal input terminal, a signal output terminal, an amplification circuit, and at least one variable voltage generation circuit. The signal input terminal is used to receive an input signal. The signal output terminal is used to output an amplified signal. The amplification circuit is connected between the signal input terminal and the signal output terminal. The amplification circuit includes a first transistor, which comprises a first terminal, a second terminal, a control terminal, and a body terminal. The first terminal of the first transistor is connected to a first node, the second terminal is connected to a second node, the control terminal of the first transistor is connected to the signal input terminal, and the body terminal of the first transistor is floating. At least one variable voltage generator is connected to an amplifier circuit. During a transition period, at least one variable voltage generator provides a first voltage difference between the second terminal and the first terminal of the first transistor. During a steady period, at least one variable voltage generator provides a second voltage difference between the second terminal and the first terminal of the first transistor. The first voltage difference is greater than the second voltage difference.

[0005] Another embodiment provides a method of operating an amplifier. The amplifier includes a signal input terminal, a signal output terminal, an amplification circuit, and at least one variable voltage generating circuit. The signal input terminal is used to receive an input signal. The signal output terminal is used to output an amplified signal. The amplification circuit is connected between the signal input terminal and the signal output terminal. The amplification circuit includes a first transistor. The first transistor includes a first terminal, a second terminal, a control terminal, and a body terminal. The first terminal of the first transistor is connected to a first node, the second terminal of the first transistor is connected to a second node, the control terminal of the first transistor is connected to the signal input terminal, and the body terminal of the first transistor is floating. At least one variable voltage generating circuit is connected to the amplification circuit. The method of operation includes the following steps: During a transition period, at least one variable voltage generating circuit provides a first voltage difference between the second terminal and the first terminal of the first transistor. During the steady-state period, at least one variable voltage generating circuit provides a second voltage difference between the second terminal and the first terminal of the first transistor. The first voltage difference is greater than the second voltage difference. [Brief explanation of the drawing]

[0006] [Figure 1] An amplifier according to one embodiment of this disclosure is schematically shown. [Figure 2] An amplifier according to another embodiment of this disclosure is schematically shown. [Figure 3] A schematic diagram of the voltage levels at several nodes of an amplifier according to one embodiment of this disclosure is shown. [Figure 4] A schematic diagram of the voltage levels at several nodes of an amplifier according to one embodiment of this disclosure is shown. [Figure 5] An amplifier according to another embodiment of this disclosure is schematically shown. [Figure 6] An amplifier according to another embodiment of this disclosure is schematically shown. [Figure 7] A schematic diagram of the voltage levels at several nodes of an amplifier according to one embodiment of this disclosure is shown. [Figure 8] An amplifier according to another embodiment of this disclosure is schematically shown. [Figure 9] An amplifier according to another embodiment of this disclosure is schematically shown. [Figure 10] A schematic diagram of the voltage levels at several nodes of an amplifier according to one embodiment of this disclosure is shown. [Figure 11] A schematic flowchart illustrating the operation method of an amplifier according to one embodiment of this disclosure is shown. [Modes for carrying out the invention]

[0007] Hereinafter, several exemplary embodiments will be described in detail with reference to several accompanying drawings, so that those skilled in the art can easily implement them. The inventive concept may be embodied in various forms, but is not limited to those exemplary embodiments described herein. Descriptions of well-known parts are omitted for clarity, and similar reference numerals indicate similar elements consistently.

[0008] The present invention can be understood by referring to the following detailed description together with the accompanying drawings. For the sake of readability and simplification of the drawings, only parts of the electronic equipment are shown in the drawings of the present invention, and certain elements in those drawings are not depicted to their actual dimensions. Furthermore, the number and size of elements in the drawings are purely illustrative and are not intended to limit the scope of the present invention. In those drawings, elements marked with the same reference numeral have the same or similar attributes or functions in context.

[0009] In the following specification and claims, the words "comprise," "include," and "have" are non-restrictive and should therefore be interpreted as "comprise, but not limited to." Accordingly, when the words "comprise," "include," and / or "have" are used in the description of the present invention, they identify the presence of corresponding features, regions, steps, operations, and / or components, but do not exclude the presence of one or more corresponding features, regions, steps, operations, and / or components.

[0010] Figure 1 schematically shows an amplifier 100 according to one embodiment of the present disclosure. As shown, the amplifier 100 may include a signal input terminal NIN, a signal output terminal NOUT, and an amplification circuit 101 connected between them. For example, the signal input terminal NIN may be connected to a preceding circuit (e.g., an antenna) used to receive a signal SIN. The amplification circuit 101 may, for example, amplify the signal SIN, and the signal output terminal NOUT may output the amplified signal SOUT to a subsequent circuit, which may be used for further processing of the amplified signal.

[0011] In one embodiment, the amplification circuit 101 may include a first transistor T1. The first transistor T1 may include, for example, a metal-oxide-semiconductor field-effect transistor (MOSFET) or a bipolar junction transistor (BJT). The first transistor T1 may include a first terminal, a second terminal, and a control terminal. For example, in the case of an N-type MOSFET, the first terminal of the first transistor T1 may be either the source or the drain terminal, the second terminal may be the other terminal of the source or the drain, and the control terminal may be the gate. Alternatively, in the case of a BJT, the first terminal of the first transistor T1 may be either the emitter or the collector terminal, the second terminal may be the other terminal of the emitter or the collector, and the control terminal may be the base. In some embodiments, the first terminal of the first transistor T1 may be connected to a first node N1, and the second terminal may be connected to a second node N2. Specifically, the first node N1 may be further connected to a reference voltage terminal such as ground via other components (e.g., an inductor). The second node N2 may be further connected to an operation voltage terminal VDD, such as a system voltage terminal or a battery voltage terminal. Additionally, the second node N2 may be further connected to a signal output terminal NOUT. The control terminal of the first transistor T1 may be connected to a signal input terminal NIN for receiving radio frequency (RF) signals.

[0012] In some embodiments, the amplifier 100 may further include at least one variable voltage generating circuit 110, as will be further described below, and the at least one variable voltage generating circuit 110 may be connected to the amplification circuit 101.

[0013] Figure 2 schematically shows an amplifier 200 according to another embodiment of this disclosure. Amplifier 200 may be similar to amplifier 100 in Figure 1. Similarities do not need to be repeated, and only the main differences will be described below. As shown, the amplification circuit 201 of amplifier 200 may further include a second transistor T2.

[0014] In some embodiments, the second transistor T2, like the first transistor T1, may include a metal-oxide-semiconductor field-effect transistor (MOSFET), a bipolar junction transistor (BJT), and the like. The second transistor T2 may include a first terminal, a second terminal, and a control terminal. For example, the second transistor T2 may be an N-type MOSFET, which may have a source as the first terminal, a drain as the second terminal, and a gate as the control terminal. Alternatively, the second transistor T2 may be a P-type MOSFET, which may have a drain as the first terminal, a source as the second terminal, and a gate as the control terminal. These examples are illustrative and do not limit the disclosure. In other embodiments, the first transistor T1 and / or the second transistor T2 may be other suitable types of transistors and may be connected in other suitable ways.

[0015] As shown, the first terminal of the second transistor T2 may be connected to the second node N2, the second terminal may be connected to the signal output terminal NOUT, and the control terminal may be connected to the third node N3. In other words, the first transistor T1 and the second transistor T2 may be cascode-connected. Furthermore, the first transistor T1 and the second transistor T2 may be directly cascode-connected or indirectly cascode-connected. For example, in the case of a direct cascode connection, the first terminal of the second transistor T2 may be directly connected to the second terminal of the first transistor T1, with no other active or passive components in between. Additionally, in the case of an indirect cascode connection, an additional component, such as a third transistor (not shown), may be placed between the first terminal of the second transistor T2 and the second terminal of the first transistor T1.

[0016] In some embodiments, the first transistor T1 and / or the second transistor T2 may be manufactured using a process such as a silicon-on-insulator (SOI) process or a GaAs-related process. For example, in the manufacturing process of an integrated circuit (IC) device, multiple transistors may be formed on a substrate. Each unit of these multiple transistors may include, for example, a gate electrode. A gate dielectric may be placed between the gate electrode and the substrate. Furthermore, the manufacturing process may include, but is not limited to, ion implantation, wafer bonding, grinding, ion splitting, etc.

[0017] In further embodiments, each of the first transistor T1 and / or the second transistor T2 may include a body terminal (also known as a bulk terminal), which may be floating or contacted. For example, a floating body terminal indicates that it does not have a predetermined voltage, which may be advantageous in achieving a more desirable noise figure (NF). On the other hand, because the body terminal does not have a definite voltage level, the transistor's threshold voltage stability is reduced, leading to slower current stabilization and, consequently, a slower response of the amplification circuit. Furthermore, the body terminal of the first transistor T1 may preferably be floating. Multiple experiments have shown that increasing the voltage difference (VDS) between the second and first terminals of the first transistor T1 during switching between multiple different operating states can accelerate the stabilization of the threshold voltage of the first transistor T1. This accelerated threshold voltage stabilization allows the current to stabilize more quickly, resulting in a rapid transition response. A rapid transition response contributes to achieving a good noise figure for the amplifier.In some embodiments, after the first transistor T1 reaches a steady state, a normal voltage difference VDS or a lower voltage difference VDS may be provided between the second terminal and the first terminal of the first transistor T1 for normal operation or power-saving operation of the circuit. In some embodiments, a connected body terminal may indicate that the body terminal has a predetermined voltage. The body terminal of the second transistor T2 is preferably floating or connected.

[0018] As shown in Figure 2, a voltage difference, hereafter referred to as VDS(T1), may exist between the second terminal and the first terminal of the first transistor T1. In the case of the first transistor T1, the first terminal is connected to the first node N1, and the second terminal is connected to the second node N2. Therefore, the voltage difference VDS(T1) between the second terminal and the first terminal of the first transistor T1 may substantially be determined by the difference between the voltage level V2 at the second node N2 and the voltage level V1 at the first node N1. This may be expressed as VDS = V2 - V1. For example, if the first transistor T1 is an N-type MOSFET, the voltage difference VDS may be the voltage difference between the drain and the source, i.e., the drain-source voltage.

[0019] In some embodiments, when switching between a plurality of different operating states, there may be a transition period PT, and during that transition period PT, the current flowing through the first transistor T1 (e.g., the drain-source current, etc.) may become substantially unstable. Following the transition period PT, a steady period PS can be reached, and during that steady period PS, the current flowing through the first transistor T1 can become substantially stable. For example, during the steady period PS, the variation in the current flowing through the first transistor T1 is less than ±10%. Generally, the transition period PT may correspond to a short transient state when the amplifier is powered on. In some embodiments, the duration of the transition period PT may be substantially between 360 nanoseconds and 440 nanoseconds.

[0020] In some embodiments, the first variable voltage generation circuit 210 may be connected to a third node N3, thereby to the control terminal of the second transistor T2. The first variable voltage generation circuit 210 is used to supply a pulse voltage signal VPS1 to the third node N3, the pulse voltage signal VPS1 may have a variable voltage level. The voltage level of the pulse voltage signal VPS1 may be configured to determine the voltage level at the control terminal of the second transistor T2, and therefore the voltage level at the first terminal of the second transistor T2. In the embodiment shown in Figure 2, the second terminal of the first transistor T1 may be connected to the first terminal of the second transistor T2 via a second node N2. Therefore, the voltage level at the second terminal of the first transistor T1 may be determined by the voltage level of the pulse voltage signal VPS1. Specifically, during the transition period PT, the pulsed voltage signal VPS1 may have a first voltage level L1, and the voltage level at the second terminal of the first transistor T1 may be determined by the first voltage level L1. During the steady-state period PS following the transition period PT, the pulsed voltage signal VPS1 may have a second voltage level L2, and the voltage level at the second terminal of the first transistor T1 may be determined by the second voltage level L2. For example, the first voltage level L1 may be different from the second voltage level L2.

[0021] Figures 3 and 4 schematically show waveforms of voltage levels of some nodes of an amplifier according to one embodiment of the present disclosure. FIG. 3 schematically shows a waveform of a pulse voltage signal VPS1 during a transition period PT and a steady state period PS. FIG. 4 schematically shows a waveform of a voltage difference VDS(T1) between a second terminal and a first terminal of a first transistor T1 during the transition period PT and the steady state period PS. In some embodiments, at a first node N1, the voltage levels during the transition period PT and the steady state period PS may be substantially the same (such as, for example, kept in a non-changing state). For example, the voltage levels during the transition period PT and the steady state period PS may be a ground voltage. Accordingly, the voltage level at the first terminal of the first transistor T1 may be kept in a substantially same state. In some embodiments, the first voltage level L1 may be higher than the second voltage level L2.

[0022] As shown in Figure 3, during the transition period PT, the pulsed voltage signal VPS1 may have a higher first voltage level L1, which can raise the voltage level at the second terminal of the first transistor T1, thereby providing a larger voltage difference, such as a first voltage difference VDS1, between the second and first terminals of the first transistor T1. During the steady-state period PS following the transition period PT, the pulsed voltage signal VPS1 may have a lower second voltage level L2, which can pull the voltage level at the second terminal of the first transistor T1 back down to a normal level or a lower level, thereby providing a normal voltage difference, such as a second voltage difference VDS2, or a smaller voltage difference, between the second and first terminals of the first transistor T1. As shown in Figure 4, during the transition period PT, the voltage difference VDS(T1) between the second terminal and the first terminal of the first transistor T1 may be the first voltage difference VDS1, and during the steady-state period PS, the voltage difference VDS(T1) between the second terminal and the first terminal of the first transistor T1 may be the second voltage difference VDS2. Furthermore, the first voltage difference VDS1 may be greater than the second voltage difference VDS2. For example, the first voltage difference VDS1 may be 1.0 volts, and the second voltage difference VDS2 may be 0.6 volts.

[0023] In the embodiments described above, during the transition period PT, a larger voltage difference VDS1, such as 1.0 volt, may exist between the second and first terminals of the first transistor T1. Therefore, the threshold voltage of the first transistor T1 can stabilize more quickly, allowing the current (e.g., drain-source current) of the first transistor T1 to stabilize more quickly, thereby accelerating the transition response of amplifiers 100 and 200. During the steady-state period PS, a normal voltage difference VDS2, such as 0.6 volt, or a lower voltage difference VDS2, may exist between the second and first terminals of the first transistor T1. Therefore, the first transistor T1 may operate in a normal mode or a power-saving mode.

[0024] In some embodiments, the second terminal of the second transistor T2 may be connected to the operating voltage terminal VDD. A voltage difference referred to as VDS(T2) may exist between the second and first terminals of the second transistor T2. The voltage difference VDS(T2) between the second and first terminals of the second transistor T2 may substantially be determined by the difference between the operating voltage terminal VDD and the voltage level V2 at the second node N2. During the transition period PT, in response to a pulsed voltage signal VPS1 having a higher voltage level L1, the operating voltage terminal VDD may supply a first operating voltage. During the steady-state period PS following the transition period PT, in response to a pulsed voltage signal VPS1 having a normal voltage level L2 or a lower voltage level L2, the operating voltage terminal VDD may supply a second operating voltage, the first operating voltage may be higher than the second operating voltage.

[0025] Furthermore, during the transition period PT, the voltage difference VDS1(T1) between the second and first terminals of the first transistor T1 may become larger (for example, a larger first voltage difference VDS1). In this case, the higher first operating voltage makes it possible to ensure that the voltage difference VDS(T2) between the second and first terminals of the second transistor T2 is maintained at an appropriate level, such as not being reduced by a larger first voltage difference VDS1. In a specific embodiment, the voltage difference VDS(T2) between the second and first terminals of the second transistor T2 may remain substantially the same during both the transition period PT and the steady-state period PS, allowing the amplifier to operate normally during both periods.

[0026] In the embodiments described above, the waveform diagram of the pulse voltage signal VPS1 is merely illustrative and may be adjusted based on the requirements and characteristics of the components. For example, in other embodiments, the pulse voltage signal VPS1 may exhibit other waveform variations. For instance, if the second transistor T2 is a P-type transistor, the first voltage level L1 may be lower than the second voltage level L2.

[0027] Figure 5 schematically shows an amplifier 500 according to another embodiment of this disclosure. Figure 6 schematically shows an amplifier 600 according to another embodiment of this disclosure, and further shows the internal structure of a variable voltage generation circuit 620. Figure 7 schematically shows the voltage levels at several nodes of an amplifier according to one embodiment of this disclosure, and in Figure 7, the waveform diagram of the pulse voltage signal VPS2 between the transition period PT and the steady period PS is shown.

[0028] As shown in Figure 5, the amplifier 500 may include an amplification circuit 501, which may be similar to the amplification circuit 201 in Figure 2. Similarities will not be repeated, and only the main differences will be described below. The amplifier 500 may also include a second variable voltage generation circuit 520, which may be one embodiment of the variable voltage generation circuit 110 in Figure 1. The second variable voltage generation circuit 520 may be connected to a second node N2, which may further be connected to a second terminal of the first transistor T1. The second variable voltage generation circuit 520 may provide a pulsed voltage signal VPS2 at the second node N2, which may have a variable voltage level. The voltage level of the pulsed voltage signal VPS2 may be configured to determine the voltage level at the second node N2, which may determine the voltage level at the second terminal of the first transistor T1. In some embodiments, referring to Figure 7, during the transition period PT, the pulsed voltage signal VPS2 may have a third voltage level L3, and the voltage level at the second terminal of the first transistor T1 may be determined by the third voltage level L3. During the steady-state period PS following the transition period PT, the pulsed voltage signal VPS2 may have a fourth voltage level L4, and the voltage level at the second terminal of the first transistor T1 may be determined by the fourth voltage level L4.

[0029] As shown in Figure 6, the amplifier 600 may include an amplification circuit 601 and a variable voltage generation circuit 620. The variable voltage generation circuit 620 may be one embodiment of the second variable voltage generation circuit 520. The variable voltage generation circuit 620 may include a switch SW1. The switch SW1 may include a first terminal, a second terminal, and a control terminal. The first terminal of the switch SW1 may be connected to a reference voltage terminal to receive a first reference voltage VREF1. The second terminal of the switch SW1 may be connected to a second node N2. The control terminal of the switch SW1 may be used to receive a control signal VCTRL1.

[0030] As shown in Figure 7, with respect to the voltage level of the pulse voltage signal VPS2, the third voltage level L3 during the transition period PT may differ from the fourth voltage level L4 during the steady-state period PS. In a specific embodiment, the third voltage level L3 may be higher than the fourth voltage level L4. Therefore, during the transition period PT, the first voltage difference VDS1 between the second terminal and the first terminal of the first transistor T1 may be greater than the second voltage difference VDS2 during the steady-state period PS. During the transition period PT, the switch SW1 may be turned on according to the control signal VCTRL1, thereby the first reference voltage VREF1 is received at the second node N2. In this case, the voltage level of the first reference voltage VREF1 may correspond to the third voltage level L3. During the steady-state period PS, switch SW1 may be turned off according to the control signal VCTRL1, thereby preventing the first reference voltage VREF1 from being received at the second node N2. In this case, the voltage level at the second node N2 may correspond to the fourth voltage level L4.

[0031] Figure 8 schematically shows an amplifier 800 according to another embodiment of this disclosure. Figure 9 schematically shows an amplifier 900 according to another embodiment of this disclosure and further illustrates the internal structure of a variable voltage generation circuit 930. Figure 10 schematically shows the voltage levels at several nodes of an amplifier according to one embodiment of this disclosure, and in Figure 10, the waveform diagram of the pulse voltage signal VPS3 between the transition period PT and the steady period PS is shown.

[0032] As shown in Figure 8, the amplifier 800 may include an amplification circuit 801, which may be similar to the amplification circuit 201 in Figure 2. Similarities do not need to be repeated, and only the main differences will be described below. The amplifier 800 may also include a third variable voltage generation circuit 830, which may be one embodiment of the variable voltage generation circuit 110 in Figure 1. The third variable voltage generation circuit 830 may be connected to a first node N1, which may further be connected to a first terminal of a first transistor T1. The third variable voltage generation circuit 830 may supply a pulse voltage signal VPS3 to the first node N1, which may have a variable voltage level. The voltage level of the pulse voltage signal VPS3 may be configured to determine the voltage level at the first node N1, thereby determining the voltage level at the first terminal of the first transistor T1. In some embodiments, referring to Figure 10, during the transition period PT, the pulse voltage signal VPS3 may have a fifth voltage level L5, and the voltage level at the first terminal of the first transistor T1 may be determined by the fifth voltage level L5. During the steady-state period PS following the transition period PT, the pulse voltage signal VPS3 may have a sixth voltage level L6, and the voltage level at the first terminal of the first transistor T1 may be determined by the sixth voltage level L6.

[0033] As shown in Figure 9, the amplifier 900 may include an amplification circuit 901 and a variable voltage generation circuit 930. The variable voltage generation circuit 930 may be one embodiment of the variable voltage generation circuit 830. The variable voltage generation circuit 930 may include switches SW2 and SW3. Switch SW2 may include a first terminal, a second terminal, and a control terminal. The first terminal of switch SW2 may be connected to a reference voltage terminal to receive a second reference voltage VREF2. The second terminal of switch SW2 may be connected to a first node N1. The control terminal of switch SW2 may be used to receive a control signal VCTRL2. Similarly, switch SW3 may include a first terminal, a second terminal, and a control terminal. The first terminal of switch SW3 may be connected to a reference voltage terminal to receive a third reference voltage VREF3. The second terminal of switch SW3 may be connected to a first node N1. The control terminal of switch SW3 may be used to receive the control signal VCTRL3. In some embodiments, the voltage levels of the second reference voltage VREF2 and the third reference voltage VREF3 may be different or the same. For example, the second reference voltage VREF2 may be a negative voltage level, and the third reference voltage VREF3 may be a zero voltage level.

[0034] As shown in Figure 10, with respect to the voltage level of the pulse voltage signal VPS3, the fifth voltage level L5 during the transition period PT may be different from the sixth voltage level L6 during the steady-state period PS. In a specific embodiment, the fifth voltage level L5 may be lower than the sixth voltage level L6. Furthermore, during the transition period PT, switch SW2 may be turned on according to the control signal VCTRL2, and switch SW3 may be turned off according to the control signal VCTRL3, thereby the second reference voltage VREF2 is received at the first node N1. In this case, the voltage level of the second reference voltage VREF2 may correspond to, for example, a fifth voltage level L5 which is a negative voltage level. During the steady-state period PS, switch SW2 may be turned off according to the control signal VCTRL2, and switch SW3 may be turned on according to the control signal VCTRL3, thereby the third reference voltage VREF3 is received at the first node N1. In this case, the voltage level of the third reference voltage VREF3 may correspond to, for example, a sixth voltage level L6 which is a zero voltage level.

[0035] In this embodiment, the voltage level at the second node N1 may be substantially the same during both the transition period PT and the steady-state period PS (for example, remaining unchanged). Therefore, the voltage level at the second terminal of the first transistor T1 may also remain substantially the same. Since the voltage level at the first node N1 may be lower during the transition period PT (compared to the voltage level during the steady-state period PS), the voltage level at the first terminal of the first transistor T1 may also be lower during the transition period PT. As a result, the first voltage difference VDS1 between the second and first terminals of the first transistor T1 during the transition period PT may be larger than the second voltage difference VDS2 during the steady-state period PS.

[0036] Figure 11 schematically shows a flowchart of an amplifier operation method 1100 according to one embodiment of this disclosure. The amplifier operation method 1100 may be used to operate at least one of the amplifiers mentioned above. For example, the amplifier operation method 1100 may include the following steps:

[0037] Step 1110: During the transition period PT, at least one variable voltage generating circuit provides a first voltage difference VDS1 between the second terminal and the first terminal of the first transistor T1.

[0038] Step 1120: During the steady-state period PS following the transition period PT, at least one variable voltage generating circuit provides a second voltage difference VDS2 between the second terminal and the first terminal of the first transistor T1, the first voltage difference VDS1 may be greater than the second voltage difference VDS2.

[0039] In some embodiments, at least one variable voltage generating circuit may be connected to at least one node of an amplification circuit, which may be directly or indirectly connected to a transistor of the amplification circuit. For example, the variable voltage generating circuit may supply a pulsed voltage signal to that node. During several different states of the transistor (e.g., a transition period or a steady-state period), the pulsed voltage signal may have several different voltage levels, changing the voltage difference between two terminals of the transistor (e.g., between a second terminal and a first terminal). For example, the voltage difference between the two terminals of the transistor may be larger during the transition period and normal or smaller during the steady-state period.

[0040] In summary, during the transition period PT, the voltage difference VDS1 between the first and second terminals of the transistor (e.g., the drain and source terminals) may be larger. This allows the transistor's threshold voltage to stabilize quickly, and similarly, the transistor's current to stabilize quickly, accelerating the amplifier's transition response. During the steady-state period PS following the transition period PT, the voltage difference between the first and second terminals of the transistor may be the normal voltage difference or a smaller voltage difference, allowing the transistor to operate in normal mode or low-power mode.

[0041] In at least one embodiment described above, for example, the voltage levels of the operating voltage terminal, at least one reference voltage terminal, and at least one pulse voltage signal (e.g., pulse voltage signals VPS1, VPS2, or VPS3) may be set according to requirements and semiconductor processes. With respect to the multiple embodiments cited, it should be noted that features of multiple different embodiments may be swapped, rearranged, and mixed with each other to realize other embodiments without departing from the spirit of this disclosure. The features of multiple different embodiments may be used individually or in combination and still remain within the scope of this disclosure, provided that they do not contradict the spirit of this disclosure or conflict with each other. For example, according to one embodiment, at least two of the first variable voltage generation circuit, the second variable voltage generation circuit, and the third variable voltage generation circuit described herein may be used in combination.

[0042] In at least one embodiment of this disclosure, when it is described that one element is connected to another element, that element may be directly connected or indirectly connected via the other element. The reference voltage terminals described herein may provide a substantially stable reference voltage. The reference voltage terminals described herein may also be, but are not limited to, a ground terminal. The multiple reference voltage terminals described herein may be the same reference voltage terminal or different reference voltage terminals. The switches described herein may be on or off. When the switch is on, a signal may pass through the switch, and when the switch is off, a signal may be blocked by the switch. The signals described herein may be current signals and / or voltage signals. The switches described herein may be made using a transistor or other suitable electronic component. For example, when the switch includes a field-effect transistor, the first terminal of the switch may be either a drain terminal or a source terminal, the second terminal of the switch may be the other either a drain terminal or a source terminal, and the switch may be controlled via a gate terminal. For example, when the switch includes a bipolar transistor, the first terminal of the switch may be either the collector terminal or the emitter terminal, the second terminal of the switch may be the other of the collector terminal or the emitter terminal, and the switch may be controlled via a base terminal. Wherever it is stated herein that an element is optionally provided or optionally configured, the statement means that the element may or may not be provided on a matter of requirement, and the element still falls within the scope of the embodiment.

[0043] Those skilled in the art will readily realize that various modifications and changes to the devices and methods are possible while maintaining the teachings of the present invention. Therefore, the above disclosure should be construed as being limited only by the boundaries of the appended claims.

Claims

1. An amplifier, said amplifier is A signal input terminal configured to receive an input signal, A signal output terminal configured to output an amplified signal, An amplification circuit connected between the signal input terminal and the signal output terminal, the amplification circuit including a first transistor, the first transistor including a first terminal, a second terminal, a control terminal, and a body terminal, the first terminal of the first transistor being connected to a first node, the second terminal of the first transistor being connected to a second node, the control terminal of the first transistor being connected to the signal input terminal, and the body terminal of the first transistor being floating, At least one variable voltage generating circuit connected to the amplification circuit, During the transition period, the at least one variable voltage generating circuit provides a first voltage difference between the second terminal and the first terminal of the first transistor. During the steady-state period, the at least one variable voltage generating circuit provides a second voltage difference between the second terminal and the first terminal of the first transistor. The first voltage difference is greater than the second voltage difference. Including at least one variable voltage generating circuit, amplifier.

2. The aforementioned amplification circuit is A second transistor comprising a first terminal, a second terminal, and a control terminal, wherein the first terminal of the second transistor is connected to the second node, the second terminal of the second transistor is connected to the signal output terminal, and the control terminal of the second transistor is connected to the third node, further comprising a second transistor. The amplifier according to claim 1.

3. The at least one variable voltage generating circuit includes a first variable voltage generating circuit, which is connected to the third node and configured to supply a first pulse voltage signal to the third node. During the transition period, the first pulse voltage signal has a first voltage level. During the steady-state period, the first pulse voltage signal has a second voltage level. The amplifier according to claim 2.

4. During the transition period, the voltage level at the second terminal of the first transistor is determined by the first voltage level of the first pulse voltage signal. During the steady-state period, the voltage level at the second terminal of the first transistor is determined by the second voltage level of the first pulse voltage signal. During both the transition period and the steady-state period, the voltage level at the first terminal of the first transistor is maintained substantially unchanged. The amplifier according to claim 3.

5. The amplifier according to claim 3, wherein the first voltage level is different from the second voltage level.

6. The second transistor further includes body terminals, the body terminals of the second transistor being either floating or connected. The amplifier according to claim 2.

7. The second terminal of the second transistor is further connected to the operating voltage terminal. During the transition period, the operating voltage terminal is supplied with a first operating voltage. During the steady-state period, the operating voltage terminal is supplied with a second operating voltage. The first operating voltage is higher than the second operating voltage. The amplifier according to claim 2.

8. The at least one variable voltage generating circuit includes a second variable voltage generating circuit, the second variable voltage generating circuit being connected to the second node and configured to supply a second pulse voltage signal to the second node. During the transition period, the second pulse voltage signal has a third voltage level. During the steady-state period, the second pulse voltage signal has a fourth voltage level. The amplifier according to claim 2.

9. The third voltage level is higher than the fourth voltage level. The amplifier according to claim 8.

10. The second variable voltage generation circuit includes a first switch, the first switch includes a first terminal, a second terminal, and a control terminal, the first terminal of the first switch is configured to receive a first reference voltage, the second terminal of the first switch is connected to the second node, and the control terminal of the first switch is configured to receive a first control signal. During the transition period, the first switch is turned on according to the first control signal, thereby the first reference voltage is received at the second node. During the steady-state period, the first switch is turned off according to the first control signal. The amplifier according to claim 8.

11. The at least one variable voltage generating circuit includes a third variable voltage generating circuit, which is connected to the first node and configured to supply a third pulse voltage signal to the first node. During the transition period, the third pulse voltage signal has a fifth voltage level. During the steady-state period, the third pulse voltage signal has a sixth voltage level. The amplifier according to claim 2.

12. The fifth voltage level is lower than the sixth voltage level. The amplifier according to claim 11.

13. The third variable voltage generation circuit includes a second switch, the second switch includes a first terminal, a second terminal, and a control terminal, the first terminal of the second switch is connected to the first node, the second terminal of the second switch is connected to a second reference voltage terminal, and the control terminal of the second switch is configured to receive a second control signal. The amplifier according to claim 11.

14. The third variable voltage generation circuit includes a third switch, the third switch includes a first terminal, a second terminal, and a control terminal, the first terminal of the third switch is connected to the first node, the second terminal of the third switch is connected to a third reference voltage terminal, and the control terminal of the third switch is configured to receive a third control signal. The voltage level at the second reference voltage terminal is lower than the voltage level at the third reference voltage terminal. During the transition period, the second switch turns on according to the second control signal, and the third switch turns off according to the third control signal, thereby the voltage supplied by the second reference voltage terminal is received at the first node. During the steady-state period, the second switch turns off according to the second control signal, and the third switch turns on according to the third control signal, thereby the voltage supplied by the third reference voltage terminal is received at the first node. The amplifier according to claim 13.

15. The duration of the transition period is between 360 nanoseconds and 440 nanoseconds. The amplifier according to claim 1.

16. During the transition period, the current flowing through the first transistor is unstable. During the steady-state period, the current flowing through the first transistor is stable. The amplifier according to claim 1.

17. A method for operating an amplifier, The aforementioned amplifier, A signal input terminal configured to receive an input signal, A signal output terminal configured to output an amplified signal, An amplification circuit connected between the signal input terminal and the signal output terminal, the amplification circuit including a first transistor, the first transistor including a first terminal, a second terminal, a control terminal, and a body terminal, the first terminal of the first transistor being connected to a first node, the second terminal of the first transistor being connected to a second node, the control terminal of the first transistor being connected to the signal input terminal, and the body terminal of the first transistor being floating, At least one variable voltage generating circuit connected to the amplification circuit, Includes, The operation method is, During the transition period, the at least one variable voltage generating circuit provides a first voltage difference between the second terminal and the first terminal of the first transistor, The process includes the step of providing a second voltage difference between the second terminal and the first terminal of the first transistor during a steady-state period, The first voltage difference is greater than the second voltage difference. How it works.

18. The aforementioned amplification circuit is A second transistor comprising a first terminal, a second terminal, and a control terminal, wherein the first terminal of the second transistor is connected to the second node, the second terminal of the second transistor is connected to the signal output terminal, and the control terminal of the second transistor is connected to the third node, The at least one variable voltage generating circuit includes a first variable voltage generating circuit connected to the third node, The operation method is, The first variable voltage generation circuit further includes the step of supplying a first pulse voltage signal to the third node, During the transition period, the first pulse voltage signal has a first voltage level. During the steady-state period, the first pulse voltage signal has a second voltage level. The operating method described in claim 17.

19. The at least one variable voltage generating circuit includes a second variable voltage generating circuit connected to the second node, The operation method is, The second variable voltage generation circuit further includes the step of supplying a second pulse voltage signal to the second node, During the transition period, the second pulse voltage signal has a third voltage level. During the steady-state period, the second pulse voltage signal has a fourth voltage level. The operating method described in claim 17.

20. The at least one variable voltage generating circuit includes a third variable voltage generating circuit connected to the first node, The operation method is, The third variable voltage generation circuit further includes the step of supplying a third pulse voltage signal to the first node, During the transition period, the third pulse voltage signal has a fifth voltage level. During the steady-state period, the third pulse voltage signal has a sixth voltage level. The operating method described in claim 17.

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