Semiconductor equipment

Abstract

To provide transistors with high on-current and semiconductor devices with high productivity. [Solution] The semiconductor device includes an insulator 212 on a substrate, an insulator 214 on the insulator 212, a transistor 200 on the transistor, an insulator 280 on the transistor, an insulator 282 on the transistor, and an insulator 283 on the transistor. Each of the insulators functions as an interlayer film. The transistor includes a conductor 205 and oxides 230, 243a, and 243b. The semiconductor device also has conductors 240a and 240b that are electrically connected to the transistor and function as plugs. Insulators 241a and 241b are provided in contact with the sides of the conductors that function as plugs. In addition, conductors 246a and 246b are provided on the insulator 283 and on the conductors, respectively, that are electrically connected to the conductors and function as wiring. In addition, an insulator 286 is provided on the conductors and insulator 283.

Description

[Technical Field]

[0001] One aspect of the present invention relates to a transistor, a semiconductor device, and electronic equipment. One aspect of the present invention relates to a method for manufacturing a semiconductor device. Another aspect of the present invention relates to a semiconductor wafer , and regarding modules.

[0002] In this specification, a semiconductor device refers to a device that can function by utilizing semiconductor properties. This refers to semiconductor devices in general, including semiconductor elements such as transistors, semiconductor circuits, computing devices, and memory devices. A device is one form of a semiconductor device. Display devices (liquid crystal display devices, light-emitting display devices, etc.), projection Devices, lighting devices, electro-optical devices, energy storage devices, memory devices, semiconductor circuits, imaging devices, electronic equipment Some devices, such as those mentioned above, can be said to possess semiconductor devices.

[0003] Furthermore, one aspect of the present invention is not limited to the above-mentioned technical field. One aspect of the present invention relates to a product, method, or method of manufacture. Another aspect of the present invention is , process, machine, manufacture, or composition of matter This concerns (—). [Background technology]

[0004] A technology for constructing transistors using semiconductor thin films formed on a substrate having an insulating surface. This is attracting attention. The transistor in question is used in integrated circuits (ICs) and image display devices (simply display devices). It is also written as ). It is widely applied to electronic devices such as ). Applicable to transistors. Silicon-based semiconductor materials are widely known as semiconductor thin films, but other materials include acid Monster semiconductors are attracting attention.

[0005] In oxide semiconductors, there are those that are neither single crystal nor amorphous, such as CAAC (c-axis ali gned crystalline) structure and nc (nanocrystalline) structure A structure has been found (see Non-Patent Documents 1 and 2).

[0006] Non-patent documents 1 and 2 describe using an oxide semiconductor having a CAAC structure. The technology for manufacturing a lunger has been disclosed. [Prior art documents] [Non-patent literature]

[0007] [Non-Patent Document 1] S. Yamazaki et al., “SID Symposium Digest of Technical Papers”, 2012, volume 43, issue 1, p.183-186 [Non-Patent Document 2] S. Yamazaki et al., “Japanese Journal of Applied Physics”, 2014, volume 53, Number 4S, p.04ED18-1-04ED18-10 [Overview of the Initiative] [Problems that the invention aims to solve]

[0008] One aspect of the present invention provides a semiconductor device with less variation in transistor characteristics. This is one of the challenges. Furthermore, one aspect of the present invention provides a semiconductor device with good reliability. This is one of the challenges. Furthermore, one aspect of the present invention provides a semiconductor device having good electrical characteristics. One of the objectives is to provide a semiconductor device with a large on-current. One of the objectives is to provide a solution. Furthermore, one aspect of the present invention provides a solution that enables miniaturization or high integration. One of the objectives is to provide a semiconductor device that can do this. Another aspect of the present invention is low power consumption. One of our objectives is to provide semiconductor equipment for power generation.

[0009] Furthermore, the description of these problems does not preclude the existence of other problems. One approach does not require that all of these issues be resolved. The title will become clear from the description in the specification, drawings, claims, etc. It is possible to extract other issues from the descriptions in the drawings, claims, etc. [Means for solving the problem]

[0010] One aspect of the present invention comprises a first insulator, a second insulator on the first insulator, and a second insulator The third insulator and the first conductor on the third insulator and the first conductor A fourth insulator, a fifth insulator on the fourth insulator, a first oxide on the fifth insulator, and A second oxide on oxide 1, a third oxide on oxide 2, and a fourth oxide , a second conductor on a third oxide, a third conductor on a fourth oxide, and on the second conductor The sixth insulator, the seventh insulator on the third conductor, and the fifth to seventh insulators The eighth insulator is located on the second oxide and is positioned between the second and third conductors. A fifth oxide, a ninth insulator on the fifth oxide, and a fourth conductive material on the ninth insulator The first conductor has a region that overlaps with the second oxide, and the fourth conductor has a region that overlaps with the second oxide. The fifth oxide has a region that overlaps with the second oxide, and the second oxide is the first to fourth oxides, and the second The conductor, the third conductor, and the fifth to eighth insulators, and the areas in contact with each other The region has a hydrogen concentration in the first conductor that is lower than the hydrogen concentration in the fourth conductor, and the first insulation The hydrogen concentration in the body is lower than that of the ninth insulator, and the hydrogen concentration in the second insulator is lower than that of the ninth insulator. The hydrogen concentration of the third insulator is lower than that of the ninth insulator. It is a semiconductor device with a very low level of performance.

[0011] Furthermore, in the above, the first to fifth oxides are each composed of indium and Element M (M is aluminum, gallium, yttrium, tin, copper, vanadium, beryllium, Boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, Cerium, neodymium, hafnium, tantalum, tungsten, or magnesium, etc. It is preferable that the material has one or more selected elements, zinc, and

[0012] Furthermore, in the above, it is preferable that the first conductor has tantalum and nitrogen. .

[0013] Furthermore, in one aspect of the present invention, a first insulator to a third insulator are sequentially formed, and the third insulator An opening is formed that reaches the second insulator, and the first conductive material is placed in the opening and on the third insulator. A film is formed, and the first conductive film is polished using the CMP method until it reaches the third insulator. Then, a first conductor is formed in the opening, and a fourth is placed on the third insulator and on the first conductor. Insulator, first oxide film, second oxide film, third oxide film, second conductive film, first insulating film, The conductive film is formed in the following order: first oxide film, second oxide film, third oxide film, second conductive film. The first insulating film and the third conductive film are processed into island shapes to form the first oxide and the second oxide. , a first oxide layer, a first conductive layer, a first insulating layer, and a second conductive layer are formed, and the second conductive layer Remove the fourth insulator, the first oxide, the second oxide, the first oxide layer, and the first conductive layer. and a fifth insulator is formed on the first insulating layer, and a sixth insulator is formed on the fifth insulator. The film consists of a first oxide layer, a first conductive layer, a first insulating layer, a fifth insulator, and a sixth insulating layer. An opening is formed in the body that reaches the second oxide, and in the formation of the opening, the first oxide layer Then, a third oxide and a fourth oxide are formed, and the second conductor is formed from the first conductive layer. A third conductor is formed, and a seventh insulator and an eighth insulator are formed from the first insulating layer. This is done, and in the opening, a fifth oxide, a ninth insulator on the fifth oxide, and on the ninth insulator A third conductor is formed, and the first and second conductive films are formed using the sputtering method. This is a method for fabricating semiconductor devices by forming a thin film.

[0014] In the above, the first to third insulators are processed using an apparatus having multiple processing chambers. It is preferable to deposit the film continuously under reduced pressure.

[0015] Furthermore, in the above, the first to third oxide films are processed using an apparatus having multiple processing chambers. It is preferable to use this method and continuously deposit the film under reduced pressure.

[0016] Furthermore, in the above, the second conductive film, the first insulating film, and the third conductive film are multiple treatments It is preferable to continuously deposit the film under reduced pressure using an apparatus equipped with a processing chamber.

[0017] Furthermore, in the above, the first to third insulators, the first to third oxide films The first to third conductive films, the first insulating film, and the fifth oxide are sputtering. It is preferable to deposit the film using the blotting method. [Effects of the Invention]

[0018] According to one aspect of the present invention, a semiconductor device with less variation in transistor characteristics is provided. This can be achieved. Furthermore, according to one aspect of the present invention, a semiconductor device with good reliability can be provided. It is possible. Furthermore, according to one aspect of the present invention, a semiconductor device having good electrical characteristics can be provided. This is possible. Furthermore, according to one aspect of the present invention, a semiconductor device with a large on-current is provided. This is possible. Furthermore, according to one aspect of the present invention, a semiconductor device that can be miniaturized or highly integrated is provided. It can be provided. Furthermore, according to one aspect of the present invention, a low-power semiconductor device can be provided. It is possible.

[0019] Furthermore, the description of these effects does not preclude the existence of other effects. One embodiment does not need to have all of these effects. Other effects are described in the specification. This will become clear from the description in the drawings, claims, etc., and the specification, drawings, claims From descriptions such as these, it is possible to extract other effects. [Brief explanation of the drawing]

[0020] [Figure 1] Figure 1A is a top view of a semiconductor device according to one embodiment of the present invention. Figures 1B to 1D are cross-sectional views of a semiconductor device according to one embodiment of the present invention. [Figure 2] Figure 2A is a top view of a semiconductor device according to one embodiment of the present invention. Figures 2B to 2D are cross-sectional views of a semiconductor device according to one embodiment of the present invention. [Figure 3] Figure 3A is a top view of a semiconductor device according to one embodiment of the present invention. Figures 3B to 3D are cross-sectional views of a semiconductor device according to one embodiment of the present invention. [Figure 4]Figure 4A is a top view of a semiconductor device according to one embodiment of the present invention. Figures 4B to 4D are cross-sectional views of a semiconductor device according to one embodiment of the present invention. [Figure 5] Figure 5A is a top view of a semiconductor device according to one embodiment of the present invention. Figures 5B to 5D are cross-sectional views of a semiconductor device according to one embodiment of the present invention. [Figure 6] Figure 6A is a top view of a semiconductor device according to one embodiment of the present invention. Figures 6B to 6D are cross-sectional views of a semiconductor device according to one embodiment of the present invention. [Figure 7] Figure 7A is a top view of a semiconductor device according to one embodiment of the present invention. Figures 7B to 7D are cross-sectional views of a semiconductor device according to one embodiment of the present invention. [Figure 8] Figure 8A is a top view of a semiconductor device according to one embodiment of the present invention. Figures 8B to 8D are cross-sectional views of a semiconductor device according to one embodiment of the present invention. [Figure 9] Figure 9A illustrates the classification of IGZO crystal structures. Figure 9B illustrates the XRD spectrum of a CAAC-IGZO film. Figure 9C illustrates the micro-electron diffraction pattern of a CAAC-IGZO film. [Figure 10] Figures 10A to 10D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 11] Figures 11A to 11D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 12] Figures 12A to 12C are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 13] Figure 13A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 13B to 13D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 14] Figure 14A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 14B to 14D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 15]Figure 15A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 15B to 15D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 16] Figure 16A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 16B to 16D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 17] Figure 17A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 17B to 17D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 18] Figure 18A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 18B to 18D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 19] Figure 19A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 19B to 19D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 20] Figure 20A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 20B to 20D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 21] Figure 21A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 21B to 21D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 22] Figure 22A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 22B to 22D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 23] Figure 23A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 23B to 23D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 24] Figure 24A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 24B to 24D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 25] Figure 25A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 25B to 25D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 26] Figure 26A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 26B to 26D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 27] Figure 27A is a top view showing a method for manufacturing a semiconductor device according to one aspect of the present invention. Figures 27B to 27D are cross-sectional views showing a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 28] Figures 28A and 28B are cross-sectional views of a semiconductor device according to one aspect of the present invention. [Figure 29] Figure 29 is a cross-sectional view showing the configuration of a storage device according to one aspect of the present invention. [Figure 30] Figure 30 is a cross-sectional view showing the configuration of a storage device according to one aspect of the present invention. [Figure 31] Figure 31 is a cross-sectional view of a semiconductor device according to one aspect of the present invention. [Figure 32] Figures 32A and 32B are cross-sectional views of a semiconductor device according to one embodiment of the present invention. [Figure 33] Figure 33 is a cross-sectional view of a semiconductor device according to one aspect of the present invention. [Figure 34] Figure 34 is a cross-sectional view of a semiconductor device according to one aspect of the present invention. [Figure 35] Figure 35 is a top view illustrating an apparatus for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 36] Figure 36 is a schematic diagram illustrating an apparatus for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 37] Figure 37 is a schematic diagram illustrating an apparatus for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 38] Figures 38A and 38B are block diagrams showing an example of the configuration of a storage device according to one aspect of the present invention. [Figure 39]Figures 39A to 39H are circuit diagrams showing an example of the configuration of a storage device according to one aspect of the present invention. [Figure 40] Figure 40 is a diagram showing various types of storage devices in a hierarchical structure. [Figure 41] Figures 41A and 41B are schematic diagrams of a semiconductor device according to one aspect of the present invention. [Figure 42] Figures 42A and 42B illustrate an example of an electronic component according to one aspect of the present invention. [Figure 43] Figures 43A to 43E are schematic diagrams of a storage device according to one aspect of the present invention. [Figure 44] Figures 44A to 44H show an electronic device according to one aspect of the present invention. [Figure 45] Figure 45 shows the SIMS analysis results of an embodiment according to one aspect of the present invention. [Figure 46] Figure 46 shows the SIMS analysis results of an embodiment according to one aspect of the present invention. [Modes for carrying out the invention]

[0021] The embodiments will be described below with reference to the drawings. However, many embodiments are described. It can be implemented in different ways, without deviating from its purpose and scope. It will be readily apparent to those skilled in the art that the form and details can be varied in various ways. Therefore, the present invention shall not be construed as being limited to the contents described in the following embodiments.

[0022] Furthermore, in the drawings, the size, layer thickness, or area may be exaggerated for clarity. This may be the case. Therefore, it is not necessarily limited to that scale. Note that the drawing is an ideal This is a schematic example and is not limited to the shapes or values ​​shown in the diagram. For example, In the actual manufacturing process, processes such as etching can cause layers and resist masks to be altered as intended. Although there may be some reduction in volume, this may not be reflected in the diagram for the sake of easier understanding. In drawings, the same reference numeral is used for identical parts or parts having similar functions across different drawings. It is used in common, and explanations of its repetition may be omitted. Also, in cases where similar functions are referred to... In some cases, the hatch patterns are the same, and no specific designation is assigned.

[0023] Furthermore, the invention is made easier to understand, especially in top views (also called "plan views") and perspective views. Therefore, the description of some components may be omitted. Also, some hidden lines and other markings may be omitted. The word "included" may be omitted in some cases.

[0024] Furthermore, the ordinal numbers used in this specification, etc., as "1st," "2nd," etc., are used for convenience only. It does not indicate the order of processes or stacking order. Therefore, for example, "the first" should be written as "the second". This can be explained by appropriately replacing it with "of" or "the third of," etc. The ordinal numbers described herein do not correspond to the ordinal numbers used to specify one aspect of the present invention. There are cases where this is the case.

[0025] Furthermore, in this specification, phrases indicating placement such as "above" and "below" refer to the relative positions of the components. The positional relationships are used for convenience in explaining them by referring to the diagram. Also, the positions of the components are shown. The relationships change as appropriate depending on the direction in which each component is described. Therefore, in the specification... The terms explained are not limited to those used in the text; they can be appropriately rephrased depending on the context.

[0026] For example, in this specification, it is explicitly stated that X and Y are connected. In this case, X and Y are electrically connected, and X and Y are functionally connected. The cases disclosed in this specification, etc., include cases where X and Y are directly connected. Therefore, it is limited to predetermined connection relationships, for example, connection relationships shown in a diagram or text. Furthermore, connections other than those shown in the diagram or text are also disclosed in the diagram or text. Let X and Y be the objects (e.g., devices, elements, circuits, wiring, electrodes, terminals). (Conductive film, layer, etc.)

[0027] Furthermore, in this specification, the term "transistor" includes a gate, a drain, and a source. It is an element having at least three terminals. And, drain (drain terminal, drain Between the drain region (or drain electrode) and the source (source terminal, source region, or source electrode) It has a region where channels are formed (hereinafter also called the channel-forming region), This design allows current to flow between the source and drain through a flannel-formed region. In this specification, the channel-forming region refers to the region through which electric current primarily flows.

[0028] Furthermore, the source and drain functions may differ when using transistors with different polarities, or when the circuit The direction of the current may change during operation, which can cause the current to switch positions. In detailed documents, the terms "source" and "drain" may be used interchangeably. ru.

[0029] Note that channel length refers to, for example, the length of the semiconductor (or transistor) in a top view of a transistor. When the inverter is ON, the part of the semiconductor through which current flows and the gate electrode overlap each other. In the region or channel-forming region, the source (source region or source electrode) and This refers to the distance between the drain (drain region or drain electrode) and the other element. In a zista, the channel length is not necessarily the same across all regions. That is, one The channel length of the transistor may not be fixed to a single value. Therefore, this specification So, the channel length is any one value, maximum value, minimum value, or This will be the average value.

[0030] Channel width refers to, for example, the top view of a transistor, the semiconductor (or transistor) The region where the gate electrode and the part of the semiconductor through which current flows when the gate electrode is ON overlap each other. Channels in a region or channel-forming region, perpendicular to the channel length direction. This refers to the length of the formation region. Note that in a single transistor, the channel width encompasses the entire region. They do not necessarily take the same value. In other words, the channel width of a single transistor is a single value. It may not be fixed. Therefore, in this specification, the channel width is defined as the channel formation region. This is one of the values, the maximum value, the minimum value, or the average value.

[0031] In this specification, depending on the transistor structure, channel formation may actually occur. The channel width in the region (hereinafter also referred to as the "effective channel width") and the transition The channel width shown in the top view of the stylus (hereinafter also referred to as the "apparent channel width") is as follows. ) and may differ. For example, when the gate electrode covers the side of the semiconductor, the effective ch When the channel width becomes larger than the apparent channel width, and its effect can no longer be ignored. For example, in a transistor that is very small and whose gate electrode covers the side of the semiconductor, the semiconductor In some cases, the proportion of channel-forming regions formed on the sides may increase. In such cases, the apparent The effective channel width will be larger than the channel width shown above.

[0032] In such cases, it can be difficult to estimate the effective channel width through actual measurements. For example, in order to estimate the effective channel width from the design value, the shape of the semiconductor is known. A certain assumption is necessary. Therefore, if the shape of the semiconductor is not precisely known, the effective It is difficult to accurately measure channel width.

[0033] In this specification, when simply referred to as "channel width," it refers to the apparent channel width. There is. Or, in this specification, when simply referred to as channel width, it means effective channel It can refer to width. Note that it can also refer to channel length, channel width, effective channel width, or apparent width. Channel width and other parameters can be determined by analyzing cross-sectional TEM images, etc. can.

[0034] Furthermore, semiconductor impurities refer to components other than the main components that make up the semiconductor, for example, concentrated Elements with a concentration of less than 0.1 atomic percent can be considered impurities. The presence of impurities can, for example, In some cases, this can lead to an increase in the defect level density of semiconductors or a decrease in crystallinity. If the semiconductor is an oxide semiconductor, impurities that change the properties of the semiconductor include, for example, Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, oxide semiconductors Other components besides the main component include transition metals, such as hydrogen, lithium, sodium, silicon, These include boron, phosphorus, carbon, and nitrogen. Note that water can also function as an impurity. For example, the inclusion of impurities can cause oxygen vacancies (V) in oxide semiconductors. O :oxygen va In some cases, cancy (also known as cancy) may form.

[0035] In this specification, an oxidized nitride is defined as a compound whose composition contains more oxygen than nitrogen. It is present in large quantities. Also, nitride oxides, in terms of their composition, have a nitrogen content that is higher than oxygen content. It is a large amount of nitrogen. Therefore, for example, silicon oxidnitride, in terms of its composition, is more than nitrogen. It also has a high oxygen content. Furthermore, silicon nitride oxide, in terms of its composition, contains oxygen It has a higher nitrogen content than [another substance].

[0036] Furthermore, in this specification, the term "insulator" shall be replaced with "insulating film" or "insulating layer." It is possible to replace the term "conductor" with "conductive film" or "conductive layer." This is possible. Also, the term "semiconductor" can be replaced with "semiconductor film" or "semiconductor layer." can.

[0037] Furthermore, in this specification, "parallel" means that two straight lines have an angle of -10 degrees or more and 10 degrees or less. This refers to a state where objects are arranged in degrees. Therefore, it also includes cases where the angle is between -5 degrees and 5 degrees. Furthermore, "approximately parallel" means that two straight lines are positioned at an angle of -30 degrees or more and 30 degrees or less. It refers to a state or condition. Also, "perpendicular" means that two straight lines are positioned at an angle of 80 degrees or more and 100 degrees or less. This refers to a state in which the temperature is between 85 and 95 degrees. Therefore, it also includes cases between 85 and 95 degrees. "Perpendicular" refers to a state where two straight lines are positioned at an angle between 60 degrees and 120 degrees.

[0038] In this specification, metal oxide refers to metal in a broad sense. It is an oxide. Metal oxides are oxide insulators and oxide conductors (including transparent oxide conductors). . ), oxide semiconductor (also called Oxide Semiconductor or simply OS) They are classified into categories such as . ) For example, when a metal oxide is used in the semiconductor layer of a transistor, The metal oxide in question is sometimes referred to as an oxide semiconductor. Therefore, it is sometimes described as an OS transistor. In such cases, it can be rephrased as a transistor having a metal oxide or oxide semiconductor. It is possible.

[0039] Furthermore, in this specification, normally off means not applying a potential to the gate, or When the gate is given a ground potential, the amount of drape flowing through the transistor per 1 μm of channel width is The current is 1 × 10 at room temperature. -20 A or less, 1 × 10 at 85℃ -18 Below A , or 1 × 10 at 125℃ -16 This means being less than or equal to A.

[0040] (Embodiment 1) In this embodiment, using Figures 1 to 19, a transistor 20 according to one aspect of the present invention An example of a semiconductor device having a value of 0, and a method for manufacturing the same, will be described.

[0041] <Example of semiconductor device configuration> An example of the configuration of a semiconductor device having transistor 200 is explained using Figures 1A to 1D. To clarify, Figure 1A is a top view of a semiconductor device having transistor 200. Figure 1B is Figure 1A is a cross-sectional view of the area indicated by the dashed line A1-A2. Figure 1C is a cross-sectional view of the area indicated by the dashed line A1-A2 in Figure 1A. This is a cross-sectional view of the area indicated by the dashed line in 3-A4. Figure 1D is a cross-sectional view of the area in A5-A6 of Figure 1A. This is a cross-sectional view of the area indicated by the dashed line. Note that in the top view of Figure 1A, for clarity of the diagram, The "part" element has been omitted.

[0042] A semiconductor device according to one aspect of the present invention comprises an insulator 212 on a substrate (not shown) and an insulator 212 The insulator 214 above, the transistor 200 on the insulator 214, and the transistor 200 above Insulator 280, insulator 282 on insulator 280, insulator 283 on insulator 282, It has: Insulator 212, Insulator 214, Insulator 280, Insulator 282, and Insulator 2 83 functions as an interlayer film. It is also electrically connected to transistor 200 and acts as a plug. It has a conductor 240 (conductor 240a and conductor 240b) that functions in conjunction with the conductor. Insulator 241 (insulator 241a, and) is in contact with the side surface of conductor 240 which functions as a lug. An insulator 241b) is provided. Also, on the insulator 283 and on the conductor 240, Conductors 246 (conductors 246a, and 246a) are electrically connected to the electric body 240 and function as wiring. A conductor 246b is provided. Also, on the conductor 246 and on the insulator 283, An insulator 286 is provided.

[0043] Insulator 241 is in contact with the inner wall of the opening of insulator 280, insulator 282, and insulator 283. a is provided, and the first conductor of the conductor 240a is provided in contact with the side surface of the insulator 241a. Furthermore, a second conductor, conductor 240a, is provided inside. Also, an insulator 280, An insulator 241b is provided in contact with the inner wall of the opening of insulators 282 and 283, A first conductor of the conductor 240b is provided in contact with the side surface of the edge body 241b, and further inward A second conductor is provided in the electric body 240b. Here, the height of the upper surface of the conductor 240 and The height of the upper surface of the insulator 283 in the region overlapping with the conductor 246 can be made to be approximately the same. In transistor 200, the first conductor of conductor 240 and the second conductor of conductor 240 Although this invention describes a configuration in which bodies are stacked, it is not limited to this. For example, The conductor 240 may be provided as a single layer or as a laminated structure of three or more layers. When a body has a layered structure, ordinal numbers may be assigned to distinguish it based on the order of its formation.

[0044] [Transistor 200] As shown in Figures 1A to 1D, the transistor 200 is located on the insulator 214. 6 and a conductor 205 arranged to be embedded in the insulator 214 or insulator 216 , on the insulator 216, and on the conductor 205, and on the insulator 2 24, oxide 230a on the insulator 224, oxide 230b on oxide 230a, and acid On oxide 230b, oxide 243 (oxide 243a and oxide 243b) and oxide Material 230c, conductor 242a on oxide 243a, and insulator 271 on conductor 242a a, conductor 242b on oxide 243b, insulator 271b on conductor 242b, acid Oxide 230d on oxide 230c, insulator 250 on oxide 230d, and insulator 250 Located above and overlapping with a portion of oxide 230c is the conductor 260 (conductor 260a, and conductive Body 260b), a part of the insulator 224, the side surface of oxide 230a, the side surface of oxide 230b, Side of oxide 243a, side of conductor 242a, side of insulator 271a, insulator 271a The insulator 272 is in contact with the upper surface, the side surface of the insulator 271b, and the side surface of the conductor 242b, It has the following characteristics. In addition, oxide 230c has the side surface of oxide 243a, the side surface of oxide 243b, and the lead The sides of the electric body 242a, the sides of the conductor 242b, and the sides of the insulator 272 are in contact with each other. Here, as shown in Figures 1B and 1C, the upper surface of the conductor 260 is the same as the insulator 250. It is positioned approximately in conjunction with the top surface, the top surface of oxide 230d, and the top surface of oxide 230c. Furthermore, the insulator 282 consists of conductor 260, insulator 250, oxide 230d, oxide 230c, and contact the upper surfaces of the insulator 280.

[0045] In the following, insulators 271a and 271b will be collectively referred to as insulator 271. There are cases where conductors 242a and conductors 242b are collectively referred to as conductor 242. There is.

[0046] The insulator 280 is provided with an opening that reaches the oxide 230b. 230d, oxide 230c, insulator 250, and conductor 260 are arranged. In the channel length direction of transistor 200, conductor 242a and oxide 243a Between the conductor 242b and oxide 243b, there is a conductor 260, an insulator 250, and an acid A phosphate 230d and an oxide 230c are provided. The insulator 250 is a conductor 260 It has a region that is in contact with the side surface and a region that is in contact with the bottom surface of the conductor 260. Also, oxide 2 In the region overlapping with 30b, oxide 230c is in contact with oxide 230b, and oxidation The region overlapping with the side surface of the conductor 260 via material 230d and insulator 250, and oxide 23 It has a region that overlaps with the bottom surface of the conductor 260 via the insulator 250 and 0d.

[0047] Oxide 230 consists of oxide 230a placed on the insulator 224 and oxide 230a The oxide 230b is placed on top, and the oxide 230b is placed on top of the oxide 230b, and at least a portion of it is acid Oxide 230c in contact with oxide 230b, and oxide 230 placed on top of oxide 230c It is preferable to have d and . Having oxide 230a below oxide 230b, acid The diffusion of impurities from the structure formed below oxide 230a to oxide 230b is suppressed. It can be controlled. Also, by having oxide 230d on oxide 230c, the oxide The diffusion of impurities from structures formed above 230d to oxide 230c is suppressed. It is possible.

[0048] In transistor 200, oxide 230 consists of oxide 230a, oxide 230b, This shows a configuration in which four layers of oxide 230c and oxide 230d are stacked, The invention is not limited to this. For example, a single layer of oxide 230b, oxide 230a and Two-layer structure of oxide 230b, two-layer structure of oxide 230b and oxide 230c, oxide 230 A three-layer structure of a, oxide 230b, and oxide 230c, or a laminated structure of five or more layers, is provided. The configuration may be such that oxide 230a, oxide 230b, oxide 230c, and acid Each of the compost 230d may have a layered structure.

[0049] Conductor 260 functions as the first gate (also called the top gate) electrode, and conductor 205 functions as a second gate (also called a back gate) electrode. It is also an insulator. 250 functions as the first gate insulator, and insulator 224 functions as the second gate insulator. It functions as such. Also, the conductor 242a functions as either a source or a drain, and is conductive. Body 242b functions as either a source or a drain. Also, the conductivity of oxide 230 At least a portion of the region overlapping with body 260 functions as a channel-forming region.

[0050] Transistor 200 contains an oxide 230 (oxide 230a, oxide) including a channel formation region. In substance 230b, oxide 230c, and oxide 230d), a metallic acid acts as a semiconductor. It is preferable to use an oxide semiconductor (hereinafter also referred to as an oxide semiconductor).

[0051] Furthermore, metal oxides that function as semiconductors have a band gap of 2 eV or more, preferably It is preferable to use gold with a band gap of 2.5 eV or higher. By using a specific oxide, the off-current of the transistor can be reduced.

[0052] For example, In-M-Zn, which has indium, element M, and zinc as oxide 230. Oxides (elements M include aluminum, gallium, yttrium, tin, copper, vanadium, and beryllium) Rium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, ra Tantalum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium It is preferable to use one or more metal oxides selected from among others. For 230, In-Ga oxide, In-Zn oxide, or indium oxide may be used. .

[0053] Here, in the metal oxide used for oxide 230b or oxide 230c, element M The atomic ratio of In in relation to the metal oxide used in oxide 230a or oxide 230d is Preferably, the atomic ratio of In to element M is greater than that of In.

[0054] Thus, oxide 230a is placed beneath oxide 230b or oxide 230c. As a result, oxide 230b or acid from the structure formed below oxide 230a This can suppress the diffusion of impurities and oxygen into the compound 230c.

[0055] Furthermore, by placing oxide 230d on top of oxide 230b or oxide 230c , oxide 230b or oxide 2 from structures formed above oxide 230d The diffusion of impurities into 30c can be suppressed. Also, oxide 230b or oxidation By placing oxide 230d on top of substance 230c, oxide 230b or oxide 23 This can suppress the upward diffusion of oxygen from 0°C.

[0056] Furthermore, oxides 230a to 230d have a common element other than oxygen (main component) By doing so, oxides 230a, 230b, 230c, and 23 The defect level density at each interface of 0d can be reduced. At this time, carrier The main pathway of A is oxide 230b, oxide 230c or its vicinity, for example, oxide 23 This is the interface between 0b and oxide 230c. Because the defect level density can be reduced, the influence of interfacial scattering on carrier conduction is small. This allows for a high on-current.

[0057] Preferably, oxides 230b and 230c are crystalline. Furthermore, as oxide 230b and oxide 230c, CAAC-OS(c-axis al Using igned crystalline oxide semiconductor It is preferable that this is present. Furthermore, the oxide 230d may be configured to have crystalline properties.

[0058] CAAC-OS has c-axis orientation and multiple nanocrystals are linked in the ab-plane direction. It has a crystalline structure that is linked and distorted. Note that distortion refers to the linkage between multiple nanocrystals. Within a region, between a region with a aligned grid arrangement and another region with a aligned grid arrangement, the grid arrangement This refers to the point where the orientation has changed.

[0059] Nanocrystals are based on a hexagonal shape, but they are not necessarily regular hexagons; they can also be non-regular hexagonal. There are also cases where the distortion has a grid arrangement such as pentagons and heptagons. Furthermore, in CAAC-OS, even near strain, clear grain boundaries (grain bows) are present. It is difficult to confirm that it is also called a lattice. That is, due to the distortion of the lattice arrangement, It can be seen that the formation of grain boundaries is suppressed. This is because CAAC-OS is in the ab plane direction. In this case, the arrangement of oxygen atoms is not dense, and the substitution of metal elements increases the interatomic bond distance. This is because distortion can be tolerated due to changes in the distance between the elements.

[0060] Furthermore, crystal structures in which clear grain boundaries can be observed are known as multi-grain structures. It is called a polycrystal. The grain boundaries become recombination centers and carriers. This can lead to a decrease in the transistor's on-current or a decrease in its field-effect mobility. The possibility is high. Therefore, CAAC-OS, in which no clear grain boundaries can be confirmed, is a transistor. It is one of the crystalline oxides having a crystal structure suitable for semiconductor layers. (Note: CAAC-OS) A configuration having Zn is preferred for the structure. For example, In-Zn oxide and In- Ga-Zn oxide is preferred because it can suppress the generation of grain boundaries more effectively than In oxide.

[0061] Furthermore, CAAC-OS consists of a layer containing indium and oxygen (hereinafter referred to as the In layer), and A layered crystal in which layers containing element M, zinc, and oxygen (hereinafter referred to as (M,Zn) layers) are stacked. It tends to have a structure (also called a layered structure). Note that indium and element M are relative to each other. It is interchangeable, and if element M in the (M,Zn) layer is replaced with indium, then (In,M,Zn It can also be represented as a layer. Furthermore, if the indium in the In layer is replaced by element M, (In, It can also be represented as layer M.

[0062] As described above, CAAC-OS has a highly crystalline, dense structure, and is free from impurities and It is a metal oxide with few defects (such as oxygen deficiencies Vo). In particular, after the formation of the metal oxide, gold Heat treatment at a temperature that does not cause polycrystalline formation of the group oxides (for example, between 400°C and 600°C). This allows CAAC-OS to have a more crystalline and dense structure. In this way, the density of CAAC-OS is increased, thereby reducing the impurities in the CAAC-OS. Alternatively, it can further reduce oxygen diffusion.

[0063] On the other hand, CAAC-OS is difficult to identify clear grain boundaries, so it is difficult to identify grain boundaries. It can be said that a decrease in electron mobility due to CAAC-OS is less likely to occur. Metal oxides have stable physical properties. Therefore, metal oxides containing CAAC-OS are It is heat-resistant and highly reliable.

[0064] Furthermore, in a cross-sectional view of the transistor in the channel length direction, grooves are provided in the oxide 230b. It is preferable to embed oxide 230c in the groove. At this time, oxide 230c is It is positioned to cover the inner wall (sides and bottom) of the groove. Also, oxide 230c The film thickness is preferably about the same as the depth of the groove.

[0065] This configuration allows for the formation of an opening for embedding the conductor 260, etc. Even if a damaged area is formed on the surface of oxide 230b at the bottom of the opening, the damaged area This allows for the removal of the electrical characteristics of transistor 200 caused by the damaged area. This can suppress defects.

[0066] In Figure 1, etc., the side surface of the opening into which the conductor 260 etc. is embedded is made of oxide 230b Including the grooves, the shape is roughly perpendicular to the surface on which oxide 230b is formed, but in this embodiment The form is not limited to this. For example, the bottom of the opening has a gently curved surface, U The shape may be U-shaped. Also, for example, the side surface of the opening may be the surface to which oxide 230b is formed. It may be inclined in relation to [something].

[0067] Furthermore, as shown in Figure 1C, in a cross-sectional view of transistor 200 in the channel width direction, A curved surface may be present between the side surface of oxide 230b and the top surface of oxide 230b. The edges of the side surface and the edges of the top surface may be curved (hereinafter also referred to as rounded). .

[0068] The radius of curvature on the above curved surface is greater than 0 nm, and the oxide 2 in the region overlapping with conductor 242. A thickness smaller than 30b, or smaller than half the length of the region that does not have the curved surface. This is preferable. Specifically, the radius of curvature of the curved surface is greater than 0 nm and less than or equal to 20 nm. Preferably, the wavelength is 1 nm to 15 nm, and more preferably 2 nm to 10 nm. By creating this shape, the insulator 250 and conductor 260 formed in a later process This improves the coverage of the groove. Also, the length of the region that does not have a curved surface This prevents a decrease and suppresses the reduction in the on-current and mobility of transistor 200. Therefore, it is possible to provide a semiconductor device with good electrical characteristics.

[0069] It is preferable that the oxide 230 has a laminated structure of multiple oxide layers with different chemical compositions. Specifically, in the metal oxide used in oxide 230a, the main component is the metal element. The atomic ratio of element M is the main component of the metal oxide used in oxide 230b. It is preferable that the atomic ratio of element M to the group elements is greater. Also, in oxide 230a In the metal oxide used, the atomic ratio of element M to In is used in oxide 230b. It is preferable that the atomic ratio of element M to In in the metal oxide is greater than that of In. In the metal oxide used in oxide 230b, the atomic ratio of In to element M is, The ratio of the number of atoms of In to element M in the metal oxide used in 230a is greater than the atomic ratio of In in the element M. preferable.

[0070] Furthermore, in order to use oxide 230c as the primary carrier pathway, in oxide 230c, The atomic ratio of indium to the main metal element in oxide 230b is the main component It is preferable that the atomic ratio of indium to the metal element is greater than that of indium. By using a metal oxide with a high content in the channel formation region, the on-current of the transistor can be increased. This can increase the amount of metal elements that are the main components of oxide 230c. The atomic ratio of indium in oxide 230b relative to the main component metal element is as follows: By making the atomic ratio greater than that of indium, oxide 230c becomes the primary carrier pathway. It can be done this way.

[0071] Furthermore, the lower end of the conduction band of oxide 230c is the conduction band of oxide 230a and oxide 230b. It is preferable that the lower end is further away from the vacuum level. In other words, the electrons of oxide 230c The affinity is preferably greater than the electron affinity of oxides 230a and 230b. In this case, the main carrier pathway is oxide 230c.

[0072] Specifically, as oxide 230c, In:M:Zn = 4:2:3 [atomic ratio] or This refers to compositions in the vicinity of that, In:M:Zn=5:1:3 [atomic ratio] or compositions in the vicinity of that, Alternatively, metal oxides with a composition of In:M:Zn = 10:1:3 [atomic ratio] or close to that. Using indium oxide or similar materials is recommended.

[0073] Furthermore, parameters used to evaluate the reliability of a transistor include, for example, the + of the transistor. The sif measured in the GBT (Gate Bias Temperature) stress test There is a shift voltage (Vsh). The shift voltage (Vsh) is the drain current (Id) of the transistor. )- In the gate voltage (Vg) curve, the tangent line at the point on the curve where the slope is maximum is Vg is defined as the point where it intersects the line Id=1pA. Also, the change in Vsh is defined as ΔVsh. To express it as follows.

[0074] In the +GBT stress test of a transistor, ΔVsh becomes negative over time. It may shift. Also, ΔVsh may fluctuate in one direction (for example, in the negative direction). It may exhibit behavior that fluctuates in both the negative and positive directions. In the context of the above behavior, we refer to it as the jagged behavior of ΔVsh in the +GBT stress test. There is a match.

[0075] Oxide 230c includes metal oxides that do not contain element M as the main component, or those with a low proportion of element M. By using a metal oxide, for example, ΔVsh can be reduced and the jagged behavior of ΔVsh can be suppressed. This allows for improved reliability of transistors.

[0076] Furthermore, oxides 230b and 230c have crystalline properties such as CAAC-OS. It is preferable that it be an oxide. Crystalline oxides such as CAAC-OS contain impurities and It has few defects (such as oxygen deficiencies), is highly crystalline, and has a dense structure. Therefore, To suppress the extraction of oxygen from oxide 230b by the drain electrode or the drain electrode. This makes it possible to remove oxygen from oxide 230b even after heat treatment. Because it can reduce the high temperatures (so-called thermal bursts) in the manufacturing process, transistor 200 can reduce the high temperatures (so-called thermal bursts) It is stable against jets.

[0077] Furthermore, it is preferable to use CAAC-OS as oxide 230c, and oxide 230 The c-axis of the crystal of c is oriented in a direction approximately perpendicular to the surface or top surface of the oxide 230c. It is preferable that CAAC-OS has the property of easily moving oxygen in the direction perpendicular to the c-axis. It has such properties. Therefore, it efficiently supplies the oxygen contained in oxide 230c to oxide 230b. It is possible.

[0078] Furthermore, oxide 230d is a metal element that makes up the metal oxide used in oxide 230c. Preferably, it contains at least one of the metal elements, and more preferably, it contains all of them. For example, as oxide 230c, In-M-Zn oxide, In-Zn oxide, or In Using zinc oxide, as oxide 230d, In-M-Zn oxide, M-Zn oxide, Alternatively, an oxide of element M may be used. This will produce oxide 230c and oxide 230d. The defect level density at the interface can be reduced.

[0079] Furthermore, the lower end of the conduction band of oxide 230d is closer to the vacuum level than the lower end of the conduction band of oxide 230c. It is preferable that the electron affinity of oxide 230d is equal to the electron affinity of oxide 230c. It is preferable that it is smaller than the affinity of the offspring. In this case, oxide 230d is also oxide 230a It is preferable to use a metal oxide that can be used for oxide 230b. The primary carrier pathway is oxide 230c.

[0080] Specifically, as oxide 230c, In:M:Zn = 4:2:3 [atomic ratio] or This refers to compositions in the vicinity of that, In:M:Zn=5:1:3 [atomic ratio] or compositions in the vicinity of that, Alternatively, metal oxides with a composition of In:M:Zn = 10:1:3 [atomic ratio] or close to that. Alternatively, using indium oxide, as oxide 230d, In:M:Zn=1:3: 4 [atomic ratio] or near that composition, M:Zn=2:1 [atomic ratio] or near that. Metal oxides with a composition in the vicinity of, or M:Zn=2:5 [atomic ratio] or a composition in the vicinity thereof, Alternatively, an oxide of element M can be used.

[0081] Furthermore, oxide 230d is a metal that suppresses oxygen diffusion or permeation more effectively than oxide 230c. It is preferable that it be an oxide. Oxide 230d is placed between the insulator 250 and oxide 230c. By providing this, the diffusion of oxygen contained in the insulator 280 into the insulator 250 is suppressed. Therefore, the oxygen can efficiently react with oxide 230b via oxide 230c. It can be supplied to a specific target.

[0082] Furthermore, in the metal oxide used in oxide 230d, the I250 is the main component of the metal element. The atomic ratio of n is determined based on the main metal element in the metal oxide used in oxide 230c. By making the atomic ratio of In smaller than that of In, the diffusion of In towards the insulator 250 is suppressed. It is possible. Insulator 250 functions as a gate insulator, so In is insulator 2 If it is mixed in with 50 or other materials, it will cause transistor characteristics to deteriorate. Therefore, oxide 230c By providing oxide 230d between the insulator 250 and the semiconductor material, a highly reliable semiconductor device is provided. It becomes possible to do so.

[0083] Here, oxides 230a, 230b, 230c, and 230d At the junction, the lower end of the conduction band changes smoothly. In other words, oxide 230a, oxide The lower end of the conduction band at the junction of material 230b, oxide 230c, and oxide 230d is connected This can also be described as a continuous change or continuous bonding. To achieve this, oxides are used. The interface between 230a and oxide 230b, the interface between oxide 230b and oxide 230c, and To reduce the defect level density of the mixed layer formed at the interface between oxide 230c and oxide 230d. That's good.

[0084] Specifically, oxide 230a and oxide 230b, oxide 230b and oxide 230c, acid The oxide 230c and oxide 230d share a common element other than oxygen as their main component, A mixed layer with a low defect level density can be formed. For example, oxide 230b is In-M -In the case of Zn oxide, the oxides are 230a, 230c, and 230d, In-M-Zn oxide, M-Zn oxide, oxide of element M, In-Zn oxide, indiu You may also use oxides or other materials.

[0085] Specifically, for oxide 230a, In:M:Zn = 1:3:4 [atomic ratio] or This refers to the composition in its vicinity, or In:M:Zn=1:1:0.5 [atomic ratio] or its vicinity. A metal oxide with a similar composition can be used. Also, as oxide 230b, In:M:Zn = A composition of 1:1:1 [atomic ratio] or close to it, or In:M:Zn=4:2:3 [ A metal oxide with an atomic ratio of [230c] or a composition close to it may be used. For example, a composition of In:M:Zn=4:2:3 [atomic ratio] or close to that, In:M: Zn=5:1:3 [atomic ratio] or a composition close to that, or In:M:Zn=10: Metal oxides or indium oxides with a composition of 1:3 [atomic ratio] or close to that ratio. It can be used as is. Note that "nearby composition" includes a range of ±30% of the desired atomic ratio. Also, It is preferable to use gallium as element M. Also, as oxide 230d, In: M:Zn = 1:3:4 [atomic ratio] or a composition close to that, M:Zn = 2:1 [atomic ratio] [Ratio] or a composition close to that, or M:Zn=2:5 [atomic ratio] or close to that A metal oxide of a certain composition, or an oxide of element M, may be used.

[0086] Furthermore, when depositing metal oxides by sputtering, the above atomic ratio is used for the deposition of the film. Not limited to the atomic ratio of the metal oxides, the sputtering target used for depositing metal oxide films The atomic ratio of the set may also be acceptable.

[0087] Oxide 230a, oxide 230b, oxide 230c, and oxide 230d are used in the above configuration By forming this, the interface between oxide 230a and oxide 230b, and oxide 230b and oxide 2 Defect level density at the interface with 30c and at the interface between oxide 230c and oxide 230d This can be made lower. Therefore, the influence of interfacial scattering on carrier conduction becomes smaller. Transistor 200 can achieve a large on-current and high frequency characteristics.

[0088] Note that oxide 230c may be provided for each transistor 200. The oxide 230c of transistor 200 and the adjacent transistor 200 It is not necessary for the oxide 230c to come into contact with the transistor 200. And, the oxide 230c of the transistor 200 adjacent to the transistor 200, They may be separated. In other words, oxide 230c is connected to transistor 200 and the transistor It is also possible to configure it so that it is not placed between transistor 200 and an adjacent transistor 200.

[0089] In a semiconductor device in which multiple transistors 200 are arranged in the channel width direction, With this configuration, oxide 230c is provided independently for each transistor 200. Therefore, transistor 200 and transistor 2 adjacent to transistor 200. This suppresses the formation of parasitic transistors between 00 and 00, and prevents the formation of the above-mentioned leakage path. Therefore, it is possible to have good electrical properties and miniaturize or highly integrate it. A possible semiconductor device can be provided.

[0090] For example, in the channel width direction of the transistor 200, facing each other, the side end portions of the oxide 230c of the transistor 200 and the side end portions of the oxide 230c of the transistor 200 adjacent to the transistor 200 are defined as the distance L1. Then, L1 is made larger than 0 nm. Also, in the channel width direction of the transistor 200, when the distance between the side end portions of the oxide 230a of the transistor 200 facing each other and the side end portions of the oxide 230a of the transistor 200 adjacent to the transistor 200 is represented as L2, the value of the ratio (L1 / L2) of L1 to L2 is preferably greater than 0 and less than 1, more preferably 0.1 or more and 0.9 or less, and still more preferably 0.2 or more and 0.8 or less. Here, L2 may be the distance between the side end portions of the oxide 230b of the transistor 200 facing each other and the side end portions of the oxide 230b of the transistor 200 adjacent to the transistor 200. By making the ratio (L1 / L2) of L1 to L2 smaller as described above, even if there is a misalignment in the position of the region where the oxide 230c is not disposed between the transistor 200 and the transistor 200 adjacent to the transistor 200, the oxide 230c of the transistor 200 and the oxide 230c of the transistor 200 adjacent to the transistor 200 can be separated from each other. Also, by making the ratio (L1 / L2) of L1 to L2 larger as described above, even if the interval between the transistor 200 and the transistor 200 adjacent to the transistor 200 is narrowed,

[0091]

[0092] ​​​​​​​​​​​​This ensures the minimum processing width, enabling further miniaturization or high integration of semiconductor devices. It can be measured.

[0093] Furthermore, the conductor 260 and the insulator 250 are shared between adjacent transistors 200. It may be used throughout. That is, the conductor 260 of transistor 200 The conductor 260 of the transistor 200 adjacent to the st 200 is provided in a continuous region with respect to the conductor 260 of the transistor 200. In addition, the insulator 250 of transistor 200 is adjacent to the transistor 200. It has a region that is provided in continuous with the insulator 250 of the transistor 200.

[0094] Furthermore, with the above configuration, the oxide 230d is connected to the transistor 200 and the transistor Between the zista 200 and the adjacent transistor 200, there is a region that is in contact with the insulator 224. Furthermore, the oxides 230c and 230d of transistor 200 are said to be The oxides 230c and 230d of transistor 200 adjacent to sta 200, and They can also be configured to be separated from each other.

[0095] Insulator 212, Insulator 214, Insulator 271, Insulator 272, Insulator 282, Insulator 2 83, and the insulator 286, are protected from impurities such as water and hydrogen entering from the substrate side or from the transient side. As a barrier insulating film that suppresses diffusion from above to transistor 200, It is preferable that this is possible. Therefore, insulator 212, insulator 214, insulator 271, insulation Body 272, insulator 282, insulator 283, and insulator 286 contain hydrogen atoms, hydrogen molecules, Water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), copper atoms, etc. It is preferable to use an insulating material having a function of suppressing the diffusion of impurities (the above impurities are difficult to permeate). Or, it is preferable to use an insulating material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.) (the above oxygen is difficult to permeate). In the present specification, a barrier insulating film refers to an insulating film having barrier properties. In the present specification, barrier property means a function of suppressing the diffusion of the corresponding substance (also referred to as low permeability). Or, it means a function of capturing and fixing the corresponding substance (also referred to as gettering). For example, it is preferable to use silicon nitride or the like as the insulator 212, the insulator 283, and the insulator 286, and to use aluminum oxide or the like as the insulator 214, the insulator 271, the insulator 272, and the insulator 282. Thereby, it is possible to suppress the diffusion of impurities such as water and hydrogen from the substrate side to the transistor 200 side through the insulator 212 and the insulator 214. Or, it is possible to suppress the diffusion of oxygen contained in the insulator 224 or the like to the substrate side through the insulator 212 and the insulator 214. Also, it is possible to suppress the diffusion of impurities such as water and hydrogen from the insulator 280, the conductor 246, etc. to the oxide 230. In this way, it is preferable to configure the transistor 200 to be surrounded by insulators 212, 214, 271, 272, 282, and 283 having a function of suppressing the diffusion of impurities such as water and hydrogen and oxygen.

[0096] It is also preferable to lower the resistivity of the insulator 212, the insulator 283, and the insulator 286. In the present specification, a barrier insulating film refers to an insulating film having barrier properties. In the present specification, barrier property means a function of suppressing the diffusion of the corresponding substance (also referred to as low permeability). Or, it means a function of capturing and fixing the corresponding substance (also referred to as gettering). For example, it is preferable to use silicon nitride or the like as the insulator 212, the insulator 283, and the insulator 286, and to use aluminum oxide or the like as the insulator 214, the insulator 271, the insulator 272, and the insulator 282. Thereby, it is possible to suppress the diffusion of impurities such as water and hydrogen from the substrate side to the transistor 200 side through the insulator 212 and the insulator 214. Or, it is possible to suppress the diffusion of oxygen contained in the insulator 224 or the like to the substrate side through the insulator 212 and the insulator 214. Also, it is possible to suppress the diffusion of impurities such as water and hydrogen from the insulator 280, the conductor 246, etc. to the oxide 230. In this way, it is preferable to configure the transistor 200 to be surrounded by insulators 212, 214, 271, 272, 282, and 283 having a function of suppressing the diffusion of impurities such as water and hydrogen and oxygen.

[0097] For example, it is preferable to use silicon nitride or the like as the insulator 212, the insulator 283, and the insulator 286, and to use aluminum oxide or the like as the insulator 214, the insulator 271, the insulator 272, and the insulator 282. Thereby, it is possible to suppress the diffusion of impurities such as water and hydrogen from the substrate side to the transistor 200 side through the insulator 212 and the insulator 214. Or, it is possible to suppress the diffusion of oxygen contained in the insulator 224 or the like to the substrate side through the insulator 212 and the insulator 214. Also, it is possible to suppress the diffusion of impurities such as water and hydrogen from the insulator 280, the conductor 246, etc. to the oxide 230. In this way, it is preferable to configure the transistor 200 to be surrounded by insulators 212, 214, 271, 272, 282, and 283 having a function of suppressing the diffusion of impurities such as water and hydrogen and oxygen. For example, it is preferable to use silicon nitride or the like as the insulator 212, the insulator 283, and the insulator 286, and to use aluminum oxide or the like as the insulator 214, the insulator 271, the insulator 272, and the insulator 282. Thereby, it is possible to suppress the diffusion of impurities such as water and hydrogen from the substrate side to the transistor 200 side through the insulator 212 and the insulator 214. Or, it is possible to suppress the diffusion of oxygen contained in the insulator 224 or the like to the substrate side through the insulator 212 and the insulator 214. Also, it is possible to suppress the diffusion of impurities such as water and hydrogen from the insulator 280, the conductor 246, etc. to the oxide 230. In this way, it is preferable to configure the transistor 200 to be surrounded by insulators 212, 214, 271, 272, 282, and 283 having a function of suppressing the diffusion of impurities such as water and hydrogen and oxygen. For example, it is preferable to use silicon nitride or the like as the insulator 212, the insulator 283, and the insulator 286, and to use aluminum oxide or the like as the insulator 214, the insulator 271, the insulator 272, and the insulator 282. Thereby, it is possible to suppress the diffusion of impurities such as water and hydrogen from the substrate side to the transistor 200 side through the insulator 212 and the insulator 214. Or, it is possible to suppress the diffusion of oxygen contained in the insulator 224 or the like to the substrate side through the insulator 212 and the insulator 214. Also, it is possible to suppress the diffusion of impurities such as water and hydrogen from the insulator 280, the conductor 246, etc. to the oxide 230. In this way, it is preferable to configure the transistor 200 to be surrounded by insulators 212, 214, 271, 272, 282, and 283 having a function of suppressing the diffusion of impurities such as water and hydrogen and oxygen. For example, it is preferable to use silicon nitride or the like as the insulator 212, the insulator 283, and the insulator 286, and to use aluminum oxide or the like as the insulator 214, the insulator 271, the insulator 272, and the insulator 282. Thereby, it is possible to suppress the diffusion of impurities such as water and hydrogen from the substrate side to the transistor 200 side through the insulator 212 and the insulator 214. Or, it is possible to suppress the diffusion of oxygen contained in the insulator 224 or the like to the substrate side through the insulator 212 and the insulator 214. Also, it is possible to suppress the diffusion of impurities such as water and hydrogen from the insulator 280, the conductor 246, etc. to the oxide 230. In this way, it is preferable to configure the transistor 200 to be surrounded by insulators 212, 214, 271, 272, 282, and 283 having a function of suppressing the diffusion of impurities such as water and hydrogen and oxygen. For example, it is preferable to use silicon nitride or the like as the insulator 212, the insulator 283, and the insulator 286, and to use aluminum oxide or the like as the insulator 214, the insulator 271, the insulator 272, and the insulator 282. Thereby, it is possible to suppress the diffusion of impurities such as water and hydrogen from the substrate side to the transistor 200 side through the insulator 212 and the insulator 214. Or, it is possible to suppress the diffusion of oxygen contained in the insulator 224 or the like to the substrate side through the insulator 212 and the insulator 214. Also, it is possible to suppress the diffusion of impurities such as water and hydrogen from the insulator 280, the conductor 246, etc. to the oxide 230. In this way, it is preferable to configure the transistor 200 to be surrounded by insulators 212, 214, 271, 272, 282, and 283 having a function of suppressing the diffusion of impurities such as water and hydrogen and oxygen. For example, it is preferable to use silicon nitride or the like as the insulator 212, the insulator 283, and the insulator 286, and to use aluminum oxide or the like as the insulator 214, the insulator 271, the insulator 272, and the insulator 282. Thereby, it is possible to suppress the diffusion of impurities such as water and hydrogen from the substrate side to the transistor 200 side through the insulator 212 and the insulator 214. Or, it is possible to suppress the diffusion of oxygen contained in the insulator 224 or the like to the substrate side through the insulator 212 and the insulator 214. Also, it is possible to suppress the diffusion of impurities such as water and hydrogen from the insulator 280, the conductor 246, etc. to the oxide 230. In this way, it is preferable to configure the transistor 200 to be surrounded by insulators 212, 214, 271, 272, 282, and 283 having a function of suppressing the diffusion of impurities such as water and hydrogen and oxygen. For example, it is preferable to use silicon nitride or the like as the insulator 212, the insulator 283, and the insulator 286, and to use aluminum oxide or the like as the insulator 214, the insulator 271, the insulator 272, and the insulator 282. Thereby, it is possible to suppress the diffusion of impurities such as water and hydrogen from the substrate side to the transistor 200 side through the insulator 212 and the insulator 214. Or, it is possible to suppress the diffusion of oxygen contained in the insulator 224 or the like to the substrate side through the insulator 212 and the insulator 214. Also, it is possible to suppress the diffusion of impurities such as water and hydrogen from the insulator 280, the conductor 246, etc. to the oxide 230. In this way, it is preferable to configure the transistor 200 to be surrounded by insulators 212, 214, 271, 272, 282, and 283 having a function of suppressing the diffusion of impurities such as water and hydrogen and oxygen. For example, it is preferable to use silicon nitride or the like as the insulator 212, the insulator 283, and the insulator 286, and to use aluminum oxide or the like as the insulator 214, the insulator 271, the insulator 272, and the insulator 282. Thereby, it is possible to suppress the diffusion of impurities such as water and hydrogen from the substrate side to the transistor 200 side through the insulator 212 and the insulator 214. Or, it is possible to suppress the diffusion of oxygen contained in the insulator 224 or the like to the substrate side through the insulator 212 and the insulator 214. Also, it is possible to suppress the diffusion of impurities such as water and hydrogen from the insulator 280, the conductor 246, etc. to the oxide 230. In this way, it is preferable to configure the transistor 200 to be surrounded by insulators 212, 214, 271, 272, 282, and 283 having a function of suppressing the diffusion of impurities such as water and hydrogen and oxygen. For example, it is preferable to use silicon nitride or the like as the insulator 212, the insulator 283, and the insulator 286, and to use aluminum oxide or the like as the insulator 214, the insulator 271, the insulator 272, and the insulator 282. Thereby, it is possible to suppress the diffusion of impurities such as water and hydrogen from the substrate side to the transistor 200 side through the insulator 212 and the insulator 214. Or, it is possible to suppress the diffusion of oxygen contained in the insulator 224 or the like to the substrate side through the insulator 212 and the insulator 214. Also, it is possible to suppress the diffusion of impurities such as water and hydrogen from the insulator 280, the conductor 246, etc. to the oxide 230. In this way, it is preferable to configure the transistor 200 to be surrounded by insulators 212, 214, 271, 272, 282, and 283 having a function of suppressing the diffusion of impurities such as water and hydrogen and oxygen. For example, it is preferable to use silicon nitride or the like as the insulator 212, the insulator 283, and the insulator 286, and to use aluminum oxide or the like as the insulator 214, the insulator 271, the insulator 272, and the insulator 282. Thereby, it is possible to suppress the diffusion of impurities such as water and hydrogen from the substrate side to the transistor 200 side through the insulator 212 and the insulator 214. Or, it is possible to suppress the diffusion of oxygen contained in the insulator 224 or the like to the substrate side through the insulator 212 and the insulator 214. Also, it is possible to suppress the diffusion of impurities such as water and hydrogen from the insulator 280, the conductor 246, etc. to the oxide 230. In this way, it is preferable to configure the transistor 200 to be surrounded by insulators 212, 214, 271, 272, 282, and 283 having a function of suppressing the diffusion of impurities such as water and hydrogen and oxygen.

[0098] It is also preferable to lower the resistivity of the insulator 2 There are cases where this is difficult. For example, the resistivity of insulators 212, 283, and 286. Approximately 1 × 10 13 By setting it to Ωcm, processing using plasma, etc. in semiconductor device manufacturing processes. In this configuration, the conductor 205 is provided by insulators 212, 283, and 286. The charge-up of conductor 242, conductor 260, or conductor 246 can be mitigated. In some cases, this may be possible. The resistivity of insulators 212, 283, and 286 is preferable. ku is 1 x 10 10 Ωcm or more, 1 × 10 15 The density should be less than or equal to Ωcm.

[0099] Furthermore, insulators 216 and 280 have a lower dielectric constant than insulator 214. This is preferable. By using a material with a low dielectric constant as the interlayer film, parasitic capacitance between wirings is reduced. For example, silicon oxide, oxide, silicon oxide can be used as insulator 216 and insulator 280. Silicon nitride, silicon nitride oxide, silicon nitride, fluorine-added silicon oxide, carbon Silicon oxide with added carbon and nitrogen, silicon oxide with added carbon and nitrogen, porous silicon oxide You can use reconnaissance or similar methods as appropriate.

[0100] Furthermore, insulators 212, 214, and 216 were manufactured using the sputtering method. It is preferable to form the film by sputtering. Insulator 212, insulator formed by sputtering Insulators 214 and 216 are preferred because they have a low hydrogen concentration in the film. 2. The insulators 214 and 216 are deposited continuously without exposure to the atmospheric environment. It is preferable to do so. By forming the film without opening to the atmosphere, the insulator 212, insulator 214, and Furthermore, it is possible to prevent impurities or moisture from the atmospheric environment from adhering to the insulator 216. The interface between insulator 212 and insulator 214 and the vicinity of the interface, and between insulator 214 and insulator 216 It is preferable because it can keep the interface and the vicinity of the interface clean. Continuous film deposition is possible. The device will be described later.

[0101] Conductor 205 may function as a second gate electrode. In that case, conductor 20 The potential applied to 5 is changed independently of the potential applied to the conductor 260, without being linked to it. This allows us to control the threshold voltage (Vth) of transistor 200. In particular, By applying a negative potential to the conductor 205, the Vth of transistor 200 can be increased. Therefore, it becomes possible to reduce the off-current. Thus, a negative potential is applied to the conductor 205. When applied, the voltage applied to the conductor 260 is greater than when not applied. The inductive current can be reduced.

[0102] The conductor 205 is arranged to overlap with the oxide 230 and the conductor 260. The conductor 205 is preferably provided embedded in the insulator 214 or insulator 216. stomach.

[0103] Furthermore, as shown in Figure 1A, the conductor 205 is made of oxide 230a and oxide 230b If the area is made larger than the area that does not overlap with conductors 242a and 242b, Good. In particular, as shown in Figure 1C, the conductor 205 is oxide 230a and oxide 230 It is preferable that the region outside the ends of channel b in the channel width direction is also extended. In other words, on the outer side of the side surface in the channel width direction of oxide 230a and oxide 230b Furthermore, it is preferable that the conductor 205 and the conductor 260 are superimposed with an insulator in between. Having this configuration, the electric field of the conductor 260 which functions as the first gate electrode, and the The electric field of conductor 205, which functions as the gate electrode, causes the channel shape of oxide 230 The formed region can be electrically enclosed. In this specification, a first gate and a second The gate's electric field electrically surrounds the channel formation region, creating a transistor structure. This is called a surrounded channel (S-channel) structure.

[0104] In this specification, etc., an S-channel transistor refers to a pair of gates. The electric fields of one and the other electrodes electrically surround the channel formation region. This represents the structure of the sta. Furthermore, the S-channel structure disclosed in this specification is a Fin-type structure. It differs from conventional and planar structures. By adopting an S-channel structure, short channels A transistor that is less susceptible to the Nell effect, or in other words, a transistor that is less prone to short-channel effects. It is possible.

[0105] Furthermore, as shown in Figure 1C, the conductor 205 is extended to function as wiring. However, this is not limited to the case where a conductor that functions as wiring is placed beneath the conductor 205. It is also possible to configure it in such a way. Furthermore, the conductor 205 is not necessarily provided one per transistor. There is no need to do so. For example, you can configure it so that the conductor 205 is shared by multiple transistors. stomach.

[0106] As shown in Figures 1B and 1C, the conductor 205 is configured as a single layer. However, the present invention is not limited thereto. For example, the conductor 205 may be a laminated structure of two or more layers. It may also be called a structure. When a structure has a layered structure, an ordinal number is assigned to distinguish it according to the order of formation. There is. In Figures 2B and 2C, the conductor 205 is arranged in three layers (conductor 205a, conductor 205b, An example of a configuration using conductor 205c) is shown.

[0107] When the conductor 205 is in three layers, conductors 205a and 205c contain oxygen (e.g. For example, a conductive material that has the function of suppressing the diffusion of at least one of the following: an oxygen atom, an oxygen molecule, etc. It is preferable to use materials such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, and nitrogen molecules. It suppresses the diffusion of impurities such as nitrates, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms. It is preferable to use a conductive material with functional properties.

[0108] Conductors 205a and 205c are conductive materials having a function of suppressing oxygen diffusion. By using this material, the oxidation of the conductor 205b and the resulting decrease in conductivity can be suppressed. This is possible. Examples of conductive materials that have the function of suppressing oxygen diffusion include tantalum. It is preferable to use tantalum nitride, ruthenium, ruthenium oxide, etc. Therefore The conductive material 205a and 205c are provided as a single layer or laminate of the conductive material. For example, conductor 205a and conductor 205c are tantalum, tantalum nitride. It may also be a laminate of ruthenium, ruthenium oxide, or ruthenium oxide with titanium or titanium nitride. stomach.

[0109] Furthermore, the conductor 205b is mainly composed of tantalum, tungsten, or aluminum. It is preferable to use a conductive material.

[0110] When the conductor 205 is a single layer, the conductor 205 consists of conductor 205a and conductor It is preferable to use a conductor similar to that of 205c.

[0111] Also, the hydrogen concentration contained in the conductor 205 is preferably reduced. The hydrogen concentration By using the conductor 205 with reduced hydrogen concentration, the amount of hydrogen diffusing into the oxide 230 through the insulator 222 and the insulator 224 can be reduced. The hydrogen concentration contained in the conductor 205 is preferably 1×10 (atoms / cm 20 (atoms / cm 3 ) or less. The hydrogen concentration contained in the conductor 205 can be measured by secondary ion mass spectrometry (SIMS: Secondary Ion Mass Spectrometry).

[0112] Therefore, the conductor 205 (conductor 205a, conductor 205b, and conductor 205c) is preferably formed by sputtering. By forming the conductor 205 by sputtering, the hydrogen concentration contained in the conductor 205 can be reduced compared to that formed by chemical vapor deposition (CVD : Chemical Vapor Deposition) method or atomic layer deposition (ALD : Atomic Layer Deposition) method, which is preferable. The CVD method and the ALD method will be described later. D: Atomic Layer Deposition) method, which is preferable. The CVD method and the ALD method will be described later. The first ion sputtering method and the second sputtering method can be used in the method for manufacturing a conductor or the like of the semiconductor device according to an aspect of the present invention. Details of each will be described later. In particular, the conductor 205 can be formed using various methods including such methods. In particular, it is preferably formed using the second sputtering method.

[0113] Also, the first ion sputtering method and the second sputtering method can be used in the method for manufacturing a conductor or the like of the semiconductor device according to an aspect of the present invention. Details of each will be described later. In particular, the conductor 205 can be formed using various methods including such methods. In particular, it is preferably formed using the second sputtering method. The insulator 222 and the insulator 224 function as a gate insulator. 詳細は後述する。特に、導電体205はこのような方法を含め、様々な方法を用いて形成 できる。特に、第2のスパッタリング法を用いて形成することが好ましい。

[0114] The insulator 222 and the insulator 224 function as a gate insulator.

[0115] The insulator 222 allows for the diffusion of hydrogen (for example, at least one hydrogen atom or hydrogen molecule). It is preferable that the insulator 222 has a function to suppress oxygen (for example, oxygen atoms). It is preferable that it has the function of suppressing the diffusion of at least one of the molecules, such as oxygen molecules. Insulator 222 suppresses the diffusion of hydrogen and / or oxygen more effectively than insulator 224. It is preferable that it has the function of doing so.

[0116] The insulator 222 uses an insulator containing either or both aluminum and hafnium. It is preferable to use an acid containing either aluminum or hafnium as the insulator. Can be used as nitrides, oxidized nitrides, or nitride oxides. For example, aluminum oxide Aluminum oxide nitride, aluminum nitride, hafnium oxide, hafnium oxide nitride Hafnium nitride oxide, aluminum, and oxides containing hafnium (hafnium aluminum (laminated), oxidized nitrides containing aluminum and hafnium, aluminum and haf It is preferable to use a nitride oxide containing nium. Using such a material, an insulator 2 When 22 is formed, the insulator 222 prevents the release of oxygen from the oxide 230 to the substrate side, and also prevents tragus. As a layer to suppress the diffusion of impurities such as hydrogen from the peripheral area of ​​the inverter 200 to the oxide 230 It functions. Therefore, by providing the insulator 222, impurities such as hydrogen are contained within the transistor 20 This suppresses diffusion into the interior of 0 and inhibits the formation of oxygen vacancies in oxide 230. Furthermore, the conductor 205 reacts with the oxygen present in the insulator 224 and the oxide 230. This can be suppressed.

[0117] Alternatively, the above insulator may contain, for example, aluminum oxide, bismuth oxide, or germanium oxide. Niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, oxide Zirconium may be added. Alternatively, these insulators may be nitrided. Also, Insulator 222 contains silicon oxide, silicon oxide nitride, or silicon nitride in these insulators. The materials may be stacked and used together.

[0118] Furthermore, the insulator 222 may be, for example, aluminum oxide, hafnium oxide, tantalum oxide, Zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrT) Insulated materials including so-called high-k materials such as iO3 and (Ba,Sr)TiO3 (BST) The edge material may be used in a single layer or in a stacked configuration. As transistors become smaller and more integrated... Thinning the gate insulator can sometimes lead to problems such as leakage current. By using a high-k material as an insulator that functions as a body, the physical film thickness is maintained while... This makes it possible to reduce the gate potential during transistor operation.

[0119] It is preferable that the insulator 224 in contact with the oxide 230 deoxygenates upon heating. For example, the insulator 224 may be silicon oxide, silicon oxide nitride, silicon nitride oxide, etc., as appropriate. It is sufficient to use it. By providing an oxygen-containing insulator in contact with the oxide 230, the oxide 23 This can reduce oxygen deficiency in transistor 200 and improve its reliability.

[0120] As for the insulator 224, specifically, an oxide material from which some oxygen is removed by heating, or alternatively, Therefore, it is preferable to use an insulating material that has an excess oxygen region. Oxygen is removed by heating. The oxides that are released are TDS (Thermal Desorption Spectroscopy). (copy) Analysis showed that the amount of oxygen molecules removed was 1.0 × 10⁻⁶. 18 molecular / cm² 3 Preferably 1.0 × 10 19 molecular / cm² 3 More preferably 2.0×10 19 molecular / cm² 3 Above, or 3.0 × 10 20 molc ules / cm 3 The above describes the oxide film. Note that the surface temperature of the film during the above TDS analysis was The preferred temperature range is between 100°C and 700°C, or between 100°C and 400°C. stomach.

[0121] Furthermore, the insulator having the above excess oxygen region and the oxide 230 are brought into contact and heat treated, One or more of the following processes may be performed: Kuroh wave processing or RF processing. By doing so, water or hydrogen can be removed from oxide 230. For example, oxide In 230, a defect (V) is formed when hydrogen is placed in an oxygen vacancy. O A reaction occurs in which the bond of H is broken. In other words, "V O H→V O The reaction "+H" occurs, allowing for dehydrogenation. Some of the hydrogen generated at this time combines with oxygen to form H2O, which is an oxide 230, or an acid It may be removed from the insulator near the ion 230. Also, some of the hydrogen is removed from the conductor 242. It may be dispersed or captured (also known as gettering).

[0122] The above microwave processing is, for example, an apparatus having a power supply for generating high-density plasma, It is preferable to use a device that has a power supply that applies RF to the substrate side. For example, oxygen-containing By using a gas and a high-density plasma, high-density oxygen radicals can be generated. This can be achieved by applying RF to the substrate side, and by generating oxygen in the high-density plasma. The ability to efficiently introduce dical into oxide 230 or the insulator near oxide 230 is Yes, it is possible. Furthermore, the above microwave treatment is performed at a pressure of 133 Pa or higher, preferably 200 Pa or higher. Furthermore, it is preferable to set it to 400 Pa or higher. Also, within the apparatus that performs microwave processing For example, oxygen and argon are used as the gases introduced, with an oxygen flow rate ratio of (O2 / (O2). The process should be carried out with 2+Ar) at a concentration of 50% or less, preferably between 10% and 30%.

[0123] Furthermore, during the manufacturing process of transistor 200, the surface of oxide 230 is exposed. Therefore, heat treatment is preferable. This heat treatment is, for example, performed at a temperature of 100°C to 600°C. More preferably, the heating should be carried out at a temperature of 350°C to 400°C. The heat treatment is performed using nitrogen gas. Alternatively, an inert gas atmosphere, or an oxidizing gas at 10 ppm or more, 1% or more, The procedure should be carried out in an atmosphere containing 10% or more of the substance. For example, heat treatment is preferably carried out in an oxygen atmosphere. This supplies oxygen to oxide 230, thus eliminating oxygen deficiency (V O This can help reduce ) Furthermore, the heat treatment may be carried out under reduced pressure. Alternatively, the heat treatment may be carried out under nitrogen gas or After heat treatment in an active gas atmosphere, an oxidizing gas is added at 10 pJ to replenish the desorbed oxygen. The procedure may be carried out in an atmosphere containing 1% or more of the substance, or 10% or more of the substance. Alternatively, an oxidizing gas may be used. After heat treatment in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more, then continuously The heat treatment may be carried out in a nitrogen gas or inert gas atmosphere.

[0124] Furthermore, by performing an oxygenation treatment on oxide 230, the oxygen deficiencies in oxide 230 are supplied. It is repaired by the oxygen that is used, in other words, "V O This promotes the reaction "+O → null". Furthermore, the oxygen supplied reacts with the hydrogen remaining in oxide 230. This allows the hydrogen to be removed as H2O (dehydrated). This eliminates oxidation. The hydrogen remaining in substance 230 recombines with the oxygen vacancy and V O Suppresses the formation of H It is possible.

[0125] The insulators 222 and 224 may have a laminated structure of two or more layers. In that case, it is not limited to laminated structures made of the same material, but also applies to laminated structures made of different materials. good.

[0126] Oxide 243 (oxide 243a and oxide 243b) is provided on oxide 230b. That's fine.

[0127] Oxide 243 (oxide 243a and oxide 243b) is a material that suppresses oxygen permeation. It is preferable that it has the ability. Conductor 242 that functions as a source electrode and drain electrode and acid By placing an oxide 243, which has the function of suppressing oxygen permeation, between the oxide 230b and the oxide 230b, This is preferable because it reduces the electrical resistance between the conductor 242 and the oxide 230b. This configuration improves the electrical characteristics and reliability of transistor 200. This can improve the electrical resistance between the conductor 242 and the oxide 230b. If possible, a configuration without oxide 243 may be used.

[0128] As oxide 243, a metal oxide containing element M may be used. In particular, element M is A Aluminum, gallium, yttrium, tin, copper, vanadium, beryllium, boron, titanium Iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, One of the following, selected from odymium, hafnium, tantalum, tungsten, or magnesium. It is good to use one or more species. Oxide 243 has a higher concentration of element M than oxide 230b. A high value is preferable. Also, gallium oxide may be used as oxide 243. As oxide 243, metal oxides such as In-M-Zn oxide may be used. Specifically In the metal oxide used in oxide 243, the atomic ratio of element M to In is, The atomic ratio of element M to In in the metal oxide used in material 230b is greater than that of In. This is preferable. Furthermore, the film thickness of oxide 243 is preferably 0.5 nm or more and 5 nm or less, and more Preferably, the wavelength is 1 nm to 3 nm, and more preferably 1 nm to 2 nm. Preferably, oxide 243 is crystalline. If oxide 243 is crystalline, acid The release of oxygen in oxide 230 can be suitably suppressed. For example, as oxide 243 In some cases, if the crystal structure is hexagonal, the release of oxygen from oxide 230 can be suppressed. ru.

[0129] Note that the oxide film that becomes oxide 230a, the oxide film that becomes oxide 230b, and oxide 24 It is preferable to continuously deposit the oxide film (step 3) without exposing it to the atmospheric environment. By forming the film without opening it, an oxide film that becomes oxide 230a and an oxide film that becomes oxide 230b are formed. , and impurities or moisture from the atmospheric environment adhering to the oxide film that becomes oxide 243. This can prevent the interface between the oxide film that becomes oxide 230a and the oxide film that becomes oxide 230b. and near the interface, the interface between the oxide film that becomes oxide 230b and the oxide film that becomes oxide 243 This is preferable because it allows for keeping the vicinity of the interface clean. Akira will be discussed later.

[0130] The conductor 242a is provided on the oxide 243a, and the conductor 242b is provided on the oxide 243b It is provided in the transistor 200. Conductors 242a and 242b are respectively provided in the transistor 200 It functions as either a source electrode or a drain electrode.

[0131] Examples of conductors 242 (conductors 242a and 242b) include tantalum. Nitrides containing titanium, nitrides containing molybdenum, nitrides containing tungsten Materials, nitrides containing tantalum and aluminum, nitrides containing titanium and aluminum It is preferable to use such materials. In one embodiment of the present invention, a nitride containing tantalum is particularly Preferred. Also, for example, ruthenium oxide, ruthenium nitride, strontium and ruthenium Oxides containing lanthanum, oxides containing lanthanum and nickel, etc., may also be used. These materials Because it is a conductive material that is resistant to oxidation, or a material that maintains its conductivity even when it absorbs oxygen. ,preferable.

[0132] As the conductor 242, the conductor deposited by the first ionization sputtering method is It is preferable to use it. In this embodiment, tantalum nitride is used as the conductor 242. The film is deposited by the first ionization sputtering method. The filmed conductor 242 can be made into a dense conductor with high film density and excellent oxidation resistance. Therefore, the objective is to manufacture a transistor 200 with excellent electrical characteristics and high reliability. This can be done. The first ionization sputtering method will be described later.

[0133] Note that if oxide 243 is not provided, the conductor 242 and oxide 230b or oxide 2 When 30c comes into contact with the conductor 242, the oxygen in oxide 230b or oxide 230c enters the conductor 242. It diffuses into and the conductor 242 may oxidize. When the conductor 242 oxidizes, the conductor There is a high probability that the conductivity of 242 will decrease. Note that in oxide 230b or oxide 230c The oxygen diffuses into the conductor 242, and the conductor 242 is oxide 230b or oxide 2 This can be rephrased as "absorbing oxygen in 30°C."

[0134] Furthermore, oxygen in oxide 230b or oxide 230c is present in conductor 242a and conductor 2 By diffusing into 42b, the conductor 242a and oxide 230b, and the conductor 24 Between 2b and oxide 230b, or between conductor 242a and oxide 230c, and A layer may be formed between the conductor 242b and the oxide 230c. This layer is conductive. Because it contains more oxygen than body 242a or conductor 242b, the layer has insulating properties. It is estimated that at this time, the conductor 242a or conductor 242b, the layer, and the oxide 23 The three-layer structure with 0b or oxide 230c is considered to be a three-layer structure consisting of metal-insulator-semiconductor. It is possible to do this, MIS (Metal-Insulator-Semiconductor r) It can be seen as a diode junction structure mainly consisting of a structure or an MIS structure.

[0135] Furthermore, hydrogen contained in oxide 230b, oxide 230c, etc., is conductor 242a or It may diffuse into conductor 242b. In particular, into conductors 242a and conductor 242b, By using a nitride containing tantalum, the oxides contained in oxide 230b, oxide 230c, etc. Hydrogen readily diffuses into conductor 242a or conductor 242b, and the diffused hydrogen then enters the conductor. It may combine with nitrogen present in 242a or conductor 242b. In other words, oxide 23 Hydrogen contained in 0b, oxide 230c, etc., is absorbed by conductor 242a or conductor 242b. It may be stolen.

[0136] Furthermore, there may be a curved surface between the side surface of the conductor 242 and the top surface of the conductor 242. In other words, the edges of the sides and the edges of the top surface may be curved. Curved surfaces are, for example, guide At the end of the electric body 242, the radius of curvature is 3 nm or more and 10 nm or less, preferably 5 nm. The above is 6 nm or less. By not having corners at the edges, the film coverage in subsequent film deposition processes is improved. It will improve.

[0137] Insulator 272 consists of oxide 230a, oxide 230b, oxide 243, conductor 242, and insulating It is provided covering the side surface of the edge 271 and serves as at least a barrier insulating film against oxygen. It is preferable that it functions. Therefore, the insulator 272 has the function of suppressing the diffusion of oxygen. It is preferable to do so. For example, the insulator 272 suppresses oxygen diffusion more effectively than the insulator 280. It is preferable that the insulator 272 has the function of being used in the insulator 222. A suitable insulator can be used.

[0138] In particular, insulator 272 was oxidized in an oxygen-containing atmosphere by bias sputtering. It is preferable to form a film of aluminum or hafnium oxide. Alternatively, oxygen and nitrogen Aluminum oxide nitride or hafnium oxide nitride may be deposited in an atmosphere containing an element. Bias sputtering is a method of sputtering a substrate while applying RF power to it. This is the method. By applying RF power to the substrate, the potential of the substrate becomes negative relative to the plasma potential. (This is called the bias potential.) And the positive ions in the plasma are accelerated by this bias potential. It is then injected into the substrate. The bias potential is controlled by the magnitude of the RF power applied to the substrate. It is possible.

[0139] Therefore, aluminum oxide is produced by bias sputtering in an oxygen-containing atmosphere. Alternatively, oxygen can be injected into the insulator 224 by forming a hafnium oxide film. Furthermore, by adjusting the RF power applied to the substrate, the amount of oxygen injected into the insulator 224 can be controlled. This allows for optimization of the amount of oxygen injected into the insulator 224.

[0140] Furthermore, the insulator 271 is provided in contact with the upper surface of the conductor 242, and the insulator 272 and Similarly, it is preferable that it functions as a barrier insulating film against oxygen. Preferably, the insulator 271 also has a function to suppress the diffusion of oxygen. For example, an insulator Preferably, 271 has a function that suppresses oxygen diffusion more effectively than the insulator 280. For body 271, an insulating material that can be used for the insulator 222 can be deposited as a film. As the insulator 271, for example, an insulator containing silicon nitride may be used.

[0141] By providing the insulators 271 and 272 described above, oxide 230a, oxidation The material 230b, oxide 243, and conductor 242 can be separated from the insulator 280. Therefore, oxide 230a, oxide 230b, oxide 243, and conductor 242 This suppresses the direct diffusion of oxygen from the insulator 280. Excess oxygen is supplied to the source and drain regions of 230, and the source and drain regions This prevents a decrease in carrier density in the rain region. Also, excess conductor 242 This can suppress the increase in resistivity and reduction in on-current that can occur due to oxidation.

[0142] Insulator 250 functions as a gate insulator. Insulator 250 is on top of oxide 230c It is preferable to arrange them in contact with the surface. The insulator 250 is silicon oxide, silicon oxide and nitride. silicon nitride oxide, silicon nitride, silicon oxide with added fluorine, carbon-added acid Silicon oxide, silicon oxide with added carbon and nitrogen, porous silicon oxide, etc. It can be used. In particular, silicon oxide and silicon oxide-nitride are stable to heat. Therefore, it is preferable.

[0143] Insulator 250, like insulator 224, uses an insulator that releases oxygen when heated. It is preferable to form an insulator that releases oxygen upon heating, as insulator 250. By providing it in contact with the upper surface of oxide 230c, the channel formation region of oxide 230b This effectively supplies oxygen and reduces oxygen deficiency in the channel formation region of oxide 230b. Yes, it is possible. Therefore, it suppresses fluctuations in electrical characteristics and has stable electrical characteristics, and reliable It is possible to provide a transistor with improved reliability. Also, similar to insulator 224, It is preferable that the concentration of impurities such as water and hydrogen in the insulator 250 is reduced. The film thickness of 50 is preferably between 1 nm and 20 nm.

[0144] Note that in Figures 1B and 1C, the insulator 250 is shown as a single layer, but a laminated structure of two or more layers is also shown. It may also be constructed as follows. When the insulator 250 has a two-layer laminated structure, the lower layer of the insulator 250 is added It is formed using an insulator that releases oxygen due to heat, and the upper layer of the insulator 250 allows for oxygen diffusion. It is preferable to form it using an insulator that has a suppressive function. This suppresses the diffusion of oxygen contained in the lower layer of the insulator 250 into the conductor 260. This is possible. In other words, it is possible to suppress the decrease in the amount of oxygen supplied to oxide 230. This makes it possible to suppress the oxidation of the conductor 260 by oxygen contained in the lower layer of the insulator 250. For example, the lower layer of the insulator 250 may be made of a material that can be used for the insulator 250 as described above. The upper layer of the insulator 250 can be provided using the same material as the insulator 222. ru.

[0145] Furthermore, when silicon oxide or silicon oxide nitride is used as the lower layer of the insulator 250, The upper layer of body 250 may be made of an insulating material, which is a high-k material with a high dielectric constant. The gate insulator is constructed with a laminated structure consisting of a lower layer of insulator 250 and an upper layer of insulator 250. A layered structure that is stable against heat and has a high dielectric constant can be created. Therefore, the gate The gate potential applied during transistor operation can be reduced while maintaining the physical thickness of the insulator. This becomes possible. Also, a thin film of equivalent oxide film thickness (EOT) of an insulator that functions as a gate insulator. This makes transformation possible.

[0146] Specifically, the upper layer of insulator 250 is made of hafnium, aluminum, gallium, and Thorium, zirconium, tungsten, titanium, tantalum, nickel, germanium, Metal oxides containing one or more selected types, such as magnesium. Using a nitride, metal nitride oxide, or metal oxide that can be used as oxide 230 This is possible, in particular, with oxides containing aluminum and hafnium (aluminum hafnium). (Nate), oxidized nitrides containing aluminum and hafnium, aluminum and hafnium It is preferable to use nitride oxides containing um.

[0147] Furthermore, a metal oxide may be provided between the insulator 250 and the conductor 260. The material preferably suppresses the diffusion of oxygen from the insulator 250 to the conductor 260. By providing a metal oxide that suppresses diffusion, the diffusion of oxygen from the insulator 250 to the conductor 260 is reduced. Dispersion is suppressed. In other words, the decrease in the amount of oxygen supplied to oxide 230 can be suppressed. Furthermore, the oxidation of the conductor 260 by oxygen in the insulator 250 can be suppressed.

[0148] Furthermore, it is preferable that the above metal oxide functions as part of the first gate electrode. For example, a metal oxide that can be used as oxide 230 is the above metal oxide. It can be used in this way. In that case, the conductive material 260a is deposited by sputtering. The electrical resistance of the above metal oxide can be reduced to make it a conductor. This is called OC(O It can be called an xide conductor electrode.

[0149] Having the above metal oxide, the influence of the electric field from the conductor 260 is not weakened. The on-current of the transistor 200 can be improved. Also, the insulator 250 and the above metal The physical thickness of the group oxide maintains the distance between the conductor 260 and the oxide 230. This makes it possible to suppress the leakage current between the conductor 260 and the oxide 230. Also, By providing a laminated structure of the insulator 250 and the metal oxide, the conductor 260 and the oxide The physical distance between object 230 and the conductor 260, and the electric field strength from the conductor 260 to the oxide 230. This can be easily adjusted as needed.

[0150] Conductor 260 functions as the first gate electrode of transistor 200. Conductor 26 0 comprises a conductor 260a and a conductor 260b disposed on top of the conductor 260a. Preferably, the conductor 260a encloses the bottom and sides of the conductor 260b. It is preferable to arrange them in this manner. Also, as shown in Figures 1B and 1C, the conductor 260 The upper surface of the oxide 230c is approximately the same as the upper surface of the insulator 250 and the upper surface of the oxide 230c. In Figures 1B and 1C, the conductor 260 has a two-layer structure consisting of conductor 260a and conductor 260b. As shown, it may be a single-layer structure or a laminated structure of three or more layers.

[0151] Conductor 260a contains hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, and nitrogen oxide molecules. It is preferable to use a conductive material that has the function of suppressing the diffusion of impurities such as copper atoms. Alternatively, inhibit the diffusion of oxygen (e.g., at least one oxygen atom, oxygen molecule, etc.). It is preferable to use a conductive material with functional properties.

[0152] Furthermore, because the conductor 260a has the function of suppressing oxygen diffusion, the insulator 250 The oxygen contained in the material suppresses the oxidation of the conductor 260b, which reduces its conductivity. Yes, it is possible. Examples of conductive materials that have the function of suppressing oxygen diffusion include tantalum and nitrogen. It is preferable to use tantalum oxide, ruthenium oxide, or the like.

[0153] Furthermore, since the conductor 260 also functions as wiring, a highly conductive material should be used. This is preferable. For example, the conductor 260b is mainly composed of tungsten, copper, or aluminum. A conductive material can be used. Furthermore, the conductor 260b may also be in a laminated structure. For example, a laminated structure of titanium or titanium nitride and the above-mentioned conductive material may be used.

[0154] Furthermore, in transistor 200, the conductor 260 is formed on an insulator 280 or the like. The conductor 260 is formed in a self-aligning manner to fill the opening. Therefore, the conductor 260 is positioned in the region between the conductor 242a and the conductor 242b. It can be positioned reliably without any problems.

[0155] Furthermore, as shown in Figure 1C, in the channel width direction of transistor 200, insulator 2 When the bottom surface of 22 is used as a reference, the conductor 260 and the oxide 230b overlap. The height of the bottom surface of the region that does not undergo this process is preferably lower than the height of the bottom surface of oxide 230b. The conductor 260, which functions as a electrode, transmits oxide 230b via an insulator 250, etc. By configuring the channel formation region to cover the sides and top surface, the electric field of the conductor 260 is oxidized. This makes it easier to apply the effect to the entire channel formation region of component 230b. Therefore, transistor 200 The on-current can be increased and the frequency characteristics can be improved. Based on the bottom surface of the insulator 222 When considered as a standard, the oxides 230a and 230b and the conductor 260 do not overlap. The difference between the height of the bottom surface of the conductor 260 and the height of the bottom surface of the oxide 230b in region i is, 0 nm to 100 nm, preferably 3 nm to 50 nm, more preferably 5 The range should be between 20 nm and 20 nm.

[0156] Insulator 280 is on insulator 224, oxide 230, conductor 242, and insulator 271. It is provided therein. The upper surface of the insulator 280 may also be flattened.

[0157] The insulator 280, which functions as an interlayer film, preferably has a low dielectric constant. By using the material as an interlayer film, parasitic capacitance occurring between wiring can be reduced. Insulator 28 It is preferable that 0 be provided using a material similar to that of the insulator 216, for example. In particular, oxide Silicon oxide and silicon nitride are preferred because they are thermally stable. In particular, silicon oxide Materials such as silicon oxidnitride and silicon oxide with voids release oxygen upon heating. This is preferable because it allows for the easy formation of a region containing [the specified element].

[0158] Furthermore, it is preferable that the concentration of impurities such as water and hydrogen in the insulator 280 is reduced. Furthermore, it is preferable that the insulator 280 has a low hydrogen concentration and is in the excess oxygen region or contains excess oxygen. For example, it may be provided using the same material as the insulator 216. Also, insulator 280 This can also be a structure in which the above materials are stacked, for example, an oxide film deposited by sputtering. Recon and chemical vapor deposition (CVD) applied on top of it. A layered structure of silicon oxide nitride deposited by the deposition method can be used. Furthermore, silicon nitride may be laminated on top of it.

[0159] Insulator 282 or insulator 283 is susceptible to impurities such as water and hydrogen from above. It is preferable that it functions as a barrier insulating film that suppresses diffusion. Also, insulator 28 2 or insulator 283 is preferred to function as a barrier insulating film that suppresses oxygen permeation. For example, insulators 282 and 283 may be aluminum oxide, silica nitride, etc. An insulator such as silicon nitride can be used. For example, as insulator 282, acid Aluminum oxide, which has high blocking properties against the element, is used as the insulator 283, and hydrogen Alternatively, silicon nitride, which has high blocking properties, can be used.

[0160] Conductors 240a and 240b are primarily composed of tungsten, copper, or aluminum. It is preferable to use conductive materials as components. Also, conductor 240a and conductor 24 0b may be a laminated structure. Note that in Figure 1A, conductors 240a and 240b are While it is shown as circular in top view, it is not limited to this. For example, conductor 24 0a and the conductor 240b, when viewed from above, have a roughly circular shape such as an ellipse, a polygon such as a quadrilateral, and The shape may be a polygon with rounded corners, such as a quadrilateral.

[0161] Furthermore, when the conductor 240 is made into a laminated structure, the insulator 283, insulator 282, insulator 28 The conductor in contact with insulator 272 and insulator 271 is permeable to impurities such as water and hydrogen. It is preferable to use a conductive material that has a function to suppress overheating. For example, tantalum, nitride It is preferable to use tantalum, titanium, titanium nitride, ruthenium, ruthenium oxide, etc. Furthermore, conductive materials that have the function of suppressing the permeation of impurities such as water and hydrogen are single-layer or It may also be used in a laminated form. Furthermore, impurities such as water and hydrogen contained in the layer above the insulator 283 This suppresses the mixing of conductors 240a and 240b into the oxide 230. It is possible.

[0162] Conductors 240a and 240b are primarily composed of tungsten, copper, or aluminum. It is preferable to use conductive materials as components. Also, conductor 240a and conductor 24 0b may be a laminated structure. Note that in Figure 1A, conductors 240a and 240b are While it is shown as circular in top view, it is not limited to this. For example, conductor 24 0a and the conductor 240b, when viewed from above, have a roughly circular shape such as an ellipse, a polygon such as a quadrilateral, and The shape may be a polygon with rounded corners, such as a quadrilateral.

[0163] When the conductor 240 is in a layered structure, the lower layer contains impurities such as water or hydrogen, and oxygen. It is preferable to use a conductive material that has the function of suppressing the transmission of [unclear]. For example, tantalum, Using tantalum nitride, titanium, titanium nitride, ruthenium, or ruthenium oxide, etc. This is preferable. By using the conductive material as a lower layer of the conductor 240, the insulator 280 and the like can be used. Impurities such as water or hydrogen diffusing from the conductor 240 are mixed into the oxide 230. This can further reduce the amount of oxygen added to the insulator 280. This prevents absorption by the conductive material on top of 0. The top layer is made of tungsten, copper, Alternatively, it is preferable to use a conductive material whose main component is aluminum.

[0164] Furthermore, the conductor layer beneath the conductor 240 is deposited by a second ionization sputtering method. It is preferable to use a conductor. In this embodiment, the conductor in the lower layer of the conductor 240 and Then, tantalum nitride or titanium nitride is deposited by a second ionization sputtering method. The second ionization sputtering method will be described later.

[0165] Examples of insulators 241a and 241b include silicon nitride and aluminum oxide. Insulators such as um and silicon nitride can be used. Insulator 241a and Insulator 24 Since 1b is provided in contact with the insulator 271, water contained in the insulator 280, Impurities such as hydrogen are mixed into the oxide 230 through the conductors 240a and 240b. This can suppress the process. In particular, silicon nitride has high blocking properties for hydrogen. Therefore, it is suitable. Also, the oxygen contained in the insulator 280 is suitable for conductor 240a and conductor 2 This prevents absorption by 40b.

[0166] Furthermore, the upper surfaces of the conductor 240a and the upper surfaces of the conductor 240b function as wiring. Conductors 246 (conductors 246a and conductors 246b) may be arranged. 46 uses a conductive material whose main component is tungsten, copper, or aluminum. This is preferable. The conductor may also be in a laminated structure, for example, titanium or titanium nitride. The tan and the conductive material may be laminated. The conductor is provided on the insulator. It may be formed to be embedded in the opening.

[0167] The insulator 286 is provided on the conductor 246 and on the insulator 283. This allows, The top surface and side surface of the conductor 246 are in contact with the insulator 286, and the conductor 246 The lower surface is in contact with the insulator 283. In other words, the conductor 246 is in contact with the insulator 283 and the insulating It can be configured to be enclosed by body 286. With such a configuration, acid from the outside This suppresses the transmission of the element and prevents oxidation of the conductor 246. Furthermore, it is preferable because it can prevent impurities such as water and hydrogen from diffusing to the outside.

[0168] <Component materials for semiconductor devices> The following describes the constituent materials that can be used in semiconductor devices.

[0169] <<Substrate>> Examples of substrates for forming the transistor 200 include an insulating substrate, a semiconductor substrate, and A conductive substrate can be used. Examples of insulating substrates include glass substrates, quartz substrates, and Fire substrate, stabilized zirconia substrate (such as yttria-stabilized zirconia substrate), resin substrate There are plates and the like. Also, semiconductor substrates are made of materials such as silicon and germanium. Semiconductor substrates, or silicon carbide, silicon germanium, gallium arsenide, phosphate Examples include compound semiconductor substrates composed of zinc, zinc oxide, and gallium oxide. Furthermore, as mentioned above... A semiconductor substrate having an insulating region inside the semiconductor substrate, for example, SOI (Silicon Examples include on-insulator substrates. Conductive substrates include graphite substrates and metal substrates. These include alloy substrates, conductive resin substrates, etc. Alternatively, substrates containing metal nitrides, metal acids There are substrates containing monoxides, etc. Furthermore, there are substrates on which a conductor or semiconductor is provided on an insulating substrate. A substrate, a semiconductor substrate provided with a conductor or insulator, a conductive substrate provided with a semiconductor or insulator There are substrates with edges provided. Alternatively, substrates on which elements are provided can be used. This may also be done. The elements provided on the substrate may include capacitive elements, resistive elements, switching elements, and light-emitting elements. These include children, memory elements, etc.

[0170] <<Insulator>> Insulators include insulating oxides, nitrides, oxidized nitrides, nitride oxides, and metal oxides. Examples include metal oxides, metal nitrides, and metal nitride oxides.

[0171] For example, as transistors become smaller and more integrated, the gate insulator can be made thinner. This can lead to problems such as leakage current. By using high-k materials, the physical film thickness is maintained while lowering the voltage during transistor operation. This becomes possible. On the other hand, for the insulator that functions as an interlayer film, a material with a low dielectric constant is used. This reduces parasitic capacitance between wires. Therefore, it is possible to reduce the parasitic capacitance that occurs between wires. Then, you should select the materials.

[0172] Furthermore, insulators with high dielectric constants include gallium oxide, hafnium oxide, and hafnium oxide-nitride. It contains nium, hafnium nitride oxide, zirconium oxide, aluminum, and hafnium. Oxides, aluminum and hafnium-containing oxides, aluminum and hafnium Nitride oxides containing nium, silicon and oxides containing hafnium, silicon and Hafnium-containing oxide nitrides, silicon and hafnium-containing nitride oxides, silico Examples include nitrides containing ammonium compounds and hafnium.

[0173] Furthermore, as insulators with low dielectric constant, silicon oxide, silicon oxide nitride, and fluorine are used. Silicon oxide with added carbon, silicon oxide with added carbon and nitrogen Examples include silicon oxide with voids, or resins.

[0174] Furthermore, transistors using metal oxides suppress the permeation of impurities such as hydrogen and oxygen. By surrounding it with an insulator that has the function of stabilizing the electrical characteristics of the transistor. This is possible. As an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen, For example, boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, Phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum An insulator containing fluorine, neodymium, hafnium, or tantalum is used in a single layer or in a multilayer structure. That's all that's needed. Specifically, an insulating material that has the function of suppressing the permeation of impurities such as hydrogen and oxygen. As a body, aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, acid Yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, acid Metal oxides such as tantalum oxide, aluminum nitride, silicon nitride, silicon nitride, etc. Metal nitrides can be used.

[0175] Furthermore, the insulator that functions as a gate insulator has regions containing oxygen that is released by heating. It is preferable that the insulator has a region containing oxygen that is desorbed by heating. By creating a structure in which silicon oxide or silicon oxide nitride is in contact with oxide 230, This can compensate for the oxygen deficiency present in 230.

[0176] <<Conductive material>> Examples of conductive materials include aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, and crystalline silver. Tun, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium Zium, zirconium, beryllium, indium, ruthenium, iridium, strontium A metallic element selected from um, lanthanum, etc., or an alloy containing the aforementioned metallic elements. It is preferable to use an alloy or the like that which combines the above-mentioned metal elements. For example, tantalum nitride Titanium nitride, tungsten, nitrides containing titanium and aluminum, tantalum and aluminum Nitrides containing ruthenium, ruthenium oxide, ruthenium nitride, strontium and ruthenium It is preferable to use oxides containing lanthanum and nickel. Tantalum, titanium nitride, titanium and aluminum nitrides, tantalum and aluminum Includes nitrides, ruthenium oxide, ruthenium nitride, strontium and ruthenium oxides Oxides containing lanthanum and nickel are conductive materials that are resistant to oxidation, or that absorb oxygen. It is preferable because it is a material that maintains conductivity even when subjected to certain conditions. Furthermore, it does not contain impurity elements such as phosphorus. Highly electrically conductive semiconductors such as polycrystalline silicon and nickel silicides. Silicide may also be used.

[0177] Furthermore, multiple conductive layers formed from the above materials may be stacked and used. For example, as described above. A laminated structure may be formed by combining a material containing a metallic element with a conductive material containing oxygen. Furthermore, a laminate combining the aforementioned metal element-containing material and a nitrogen-containing conductive material is also used. It may also be used as a structure. Furthermore, a material containing the aforementioned metal element, a conductive material containing oxygen, and nitrogen A laminated structure combining conductive materials containing elements may also be used.

[0178] Furthermore, when an oxide is used in the channel formation region of a transistor, the gate electrode and A conductor that functions as such includes a material containing the aforementioned metal element and a conductive material containing oxygen. It is preferable to use a combined laminated structure. In this case, an oxygen-containing conductive material is used. It is preferable to place it on the channel formation region side. A conductive material containing oxygen should be placed on the channel formation region side. This makes it easier for oxygen released from the conductive material to be supplied to the channel-forming region.

[0179] In particular, as a conductor that functions as a gate electrode, it is included in the metal oxide in which the channel is formed. It is preferable to use a conductive material containing metallic elements and oxygen. Conductive materials containing group elements and nitrogen may be used. For example, titanium nitride, tantalum nitride Conductive materials containing nitrogen, such as indium tin oxide and tungsten oxide, may also be used. Indium oxide containing tungsten, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide containing titanium dioxide, indium tin oxide containing titanium dioxide, indium zinc oxide Indium tin oxide with added silicon may also be used. Moogarium zinc oxide may also be used. Using such a material allows for channel formation. In some cases, hydrogen contained in the metal oxide can be captured. Alternatively, the outer atmosphere In some cases, it may be possible to capture hydrogen that has been introduced from surrounding materials.

[0180] <<Metal Oxides>> As oxide 230, a metal oxide (oxide semiconductor) that functions as a semiconductor is used. This is preferable. Below, metal oxides applicable to the oxide 230 according to the present invention will be described. do.

[0181] The metal oxide preferably contains at least indium or zinc. In particular, indium It is preferable to include aluminum and zinc. In addition to these, aluminum, gallium, It is preferable that it contains yttrium, tin, etc. Also, boron, silicon, titanium Iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, Selected from odymium, hafnium, tantalum, tungsten, magnesium, cobalt, etc. It may contain one or more types.

[0182] <Classification of crystal structures> First, we will explain the classification of crystal structures in oxide semiconductors using Figure 9A. Figure 9A shows an oxide semiconductor, typically IGZO (containing metal acids such as In, Ga, and Zn). This is a diagram illustrating the classification of the crystal structures of ionized compounds.

[0183] As shown in Figure 9A, oxide semiconductors can be broadly classified into "Amorphous" It is divided into "Crystalline (crystalline)" and "Crystal (crystal)". They are classified as such. Also, among "Amorphous," there are completely amorp It includes hous. Also, within "Crystalline" there is CAAC(c-ax is-aligned crystalline), nc(nanocrystalli ne), and CAC (cloud-aligned composite) are included. excluding single crystal and poly crystal l). Note that the classification of "Crystalline" includes single crystal, Polycrystalline and completely amorphous materials are excluded. Furthermore, within "Crystal," there are single crystals and poly crystals. It contains crystal.

[0184] The structures within the thick border shown in Figure 9A are "Amorphous" and "Cry It is an intermediate state between "stal (crystal)" and a new boundary region (New crystal This structure belongs to the line phase. In other words, this structure is energetically in It is completely different from the stable "Amorphous" or "Crystal" forms. This can be rephrased as a structure.

[0185] The crystal structure of the film or substrate can be determined by X-ray diffraction (XRD). It can be evaluated using the ion spectrum. Here, "Crystalline GIXD (Grazing-Incidence) of CAAC-IGZO film, which is classified as " The XRD spectrum obtained by the XRD measurement is shown in Figure 9B. Note that the GIXD method is used for thin films. This method is also called the Seemann-Bohlin method. Hereafter, the GIXD measurement shown in Figure 9B will be used. The resulting XRD spectrum will simply be referred to as the XRD spectrum. Note that the CAA shown in Figure 9B The composition of the C-IGZO film is approximately In:Ga:Zn = 4:2:3 [atomic ratio]. The thickness of the CAAC-IGZO film shown in Figure 9B is 500 nm.

[0186] As shown in Figure 9B, the XRD spectrum of the CAAC-IGZO film clearly shows crystallinity. The peak shown is detected. Specifically, in the XRD spectrum of the CAAC-IGZO film, A peak indicating c-axis orientation is detected near 2θ = 31°. Furthermore, as shown in Figure 9B, The peak near 2θ=31° is located at the angle where the peak intensity was detected. It is asymmetrical.

[0187] Furthermore, the crystal structure of the film or substrate is determined by nano-beam diffraction (NBED). Diffraction patterns observed by electron diffraction (extremely small) It can be evaluated by (also called electron diffraction pattern). The folding pattern is shown in Figure 9C. Figure 9C shows an NBED with an electron beam incident parallel to the substrate. This is the diffraction pattern observed by the CAAC-IGZO film shown in Figure 9C. The composition is approximately In:Ga:Zn=4:2:3 [atomic ratio]. Furthermore, micro-electron diffraction... Next, electron diffraction is performed with a probe diameter of 1 nm.

[0188] As shown in Figure 9C, the diffraction pattern of the CAAC-IGZO film shows multiple c-axis orientations. Spots of this nature can be observed.

[0189] <<Oxide semiconductor structure>> Note that oxide semiconductors may be classified differently from those shown in Figure 9A when considering their crystal structure. Yes, there are. For example, oxide semiconductors include single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. It can be divided into two parts. Examples of non-single-crystal oxide semiconductors include the aforementioned CAAC-OS. And there is nc-OS. In addition, non-single-crystal oxide semiconductors include polycrystalline oxide semiconductors and pseudo-non-crystalline oxide semiconductors. crystalline oxide semiconductor (a-like OS: amorphous-like oxide) This includes semiconductors, amorphous oxide semiconductors, and so on.

[0190] Here, we will provide details on the CAAC-OS, nc-OS, and a-like OS mentioned above. Then, I will give an explanation.

[0191] [CAAC-OS] CAAC-OS has multiple crystalline regions, and the c-axis of these crystalline regions is oriented in a specific direction. It is an oriented oxide semiconductor. The specific direction refers to the thickness direction of the CAAC-OS film. , in the direction normal to the surface on which the CAAC-OS film is formed, or in the direction normal to the surface of the CAAC-OS film Yes, there is. Furthermore, a crystalline region is a region in which the atomic arrangement has periodicity. Note that the atomic arrangement is categorized If considered as a child arrangement, a crystalline region is also a region with a aligned lattice arrangement. Furthermore, CAAC- OS has a region in which multiple crystal regions are connected in the ab-plane direction, and this region is strained It may have strain. Note that strain refers to the lattice arrangement in a region where multiple crystal regions are connected. The orientation of the grid arrangement changes between a region with aligned grids and another region with aligned grids. This refers to the location. In other words, CAAC-OS is c-axis oriented and has a clear orientation in the ab-plane direction. It is an oxide semiconductor that does not exist.

[0192] Each of the above multiple crystalline regions is composed of one or more minute crystals (with a maximum diameter of 10 It is composed of crystals smaller than nm. Furthermore, the maximum diameter of the crystalline region is less than 10 nm. If this occurs, the size of the crystalline region may be around several tens of nanometers.

[0193] Also, In-M-Zn oxide (element M is aluminum, gallium, yttrium, tin, Copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium Umium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten In one or more types selected from , such as , or magnesium, CAAC-O S consists of a layer containing indium (In) and oxygen (hereinafter referred to as the In layer), and elements M and zinc (Z n), and an oxygen-containing layer (hereinafter referred to as the (M,Zn) layer) are stacked to form a layered crystalline structure (layer It tends to have a (also called a morphological structure). Note that indium and element M are mutually substitutable. Yes. Therefore, the (M,Zn) layer may contain indium. Also, the In layer contains The element M may be present. Furthermore, the In layer may also contain Zn. The structure is observed, for example, as a grid pattern in high-resolution TEM images.

[0194] For example, when structural analysis of a CAAC-OS film is performed using an XRD device, the θ / 2θ scale is obtained. Out-of-plane XRD measurements using the CANR showed two peaks indicating c-axis orientation. It is detected at θ=31° or nearby. Note that the position of the peak indicating c-axis orientation (value of 2θ) ) may vary depending on the type and composition of the metal elements that make up CAAC-OS.

[0195] Furthermore, for example, in the electron diffraction pattern of a CAAC-OS film, multiple bright spots (spots) (T) is observed. Note that one spot and another spot are separated by the incident electron beam that has passed through the sample. With the spot (also called the direct spot) as the center of symmetry, observations are made at point-symmetric positions. It can be done.

[0196] When the crystal region is observed from the specific direction described above, the lattice arrangement within that crystal region is a hexagonal lattice. While this is the basic principle, the unit cell is not necessarily a regular hexagon and may be a non-regular hexagon. Also, The above distortion may have a grid arrangement such as a pentagon or heptagon. -In OS, clear grain boundaries were confirmed even near the strain. This is not possible. In other words, the formation of grain boundaries is suppressed by the distortion of the lattice arrangement. This indicates that CAAC-OS has a dense arrangement of oxygen atoms in the ab-plane direction. This is because, for example, the substitution of metal atoms changes the bond distance between atoms. This is thought to be because it allows for distortion to be tolerated.

[0197] Furthermore, a crystal structure in which clear grain boundaries can be observed is known as a polycrystalline structure. It is called al(al). The grain boundaries become recombination centers, trapping carriers and forming transistors. This is likely to cause a decrease in on-current and a decrease in field-effect mobility. CAAC-OS, which lacks visible grain boundaries, has a crystal structure suitable for the semiconductor layer of transistors. It is one of the crystalline oxides that possesses Zn. Furthermore, CAAC-OS requires the presence of Zn. A configuration in which In-Zn oxide and In-Ga-Zn oxide are made of In acid It is preferable because it can suppress the generation of grain boundaries more effectively than oxidized materials.

[0198] CAAC-OS is an oxide semiconductor with high crystallinity and no clearly defined grain boundaries. Therefore, CAAC-OS is less prone to a decrease in electron mobility caused by grain boundaries. Furthermore, the crystallinity of oxide semiconductors can decrease due to impurities and the formation of defects. Because of this, CAAC-OS is an oxide semiconductor with few impurities and defects (such as oxygen vacancies) It can also be said that oxide semiconductors containing CAAC-OS have stable physical properties. Therefore, oxide semiconductors containing CAAC-OS are heat-resistant and highly reliable. C-OS is stable even at high temperatures (so-called thermal budget) during the manufacturing process. Therefore, using CAAC-OS in OS transistors expands the degree of freedom in the manufacturing process. It becomes possible to increase the risk.

[0199] [nc-OS] nc-OS is used in minute regions (for example, regions between 1 nm and 10 nm, especially regions larger than 1 nm). It has periodicity in the atomic arrangement in the region of 3 nm or less. In other words, nc-OS is micro It has small crystals. The size of these minute crystals is, for example, between 1 nm and 10 nm. In particular, because they are between 1 nm and 3 nm in size, these minute crystals are also called nanocrystals. Furthermore, nc-OS shows no regularity in crystal orientation between different nanocrystals. Therefore, the entire film... No orientation is observed. Therefore, nc-OS is a-like depending on the analytical method. It can sometimes be indistinguishable from OS or amorphous oxide semiconductors. For example, compared to nc-OS films When performing structural analysis using an XRD device, out-of-pl using θ / 2θ scans is obtained. In ane XRD measurements, no peak indicating crystallinity was detected. Furthermore, for nc-OS films... Furthermore, electron beam blasts using electron beams with probe diameters larger than those of nanocrystals (e.g., 50 nm or more) When diffraction (also called limited-field electron diffraction) is performed, a diffraction pattern similar to a halo pattern is obtained. Observed. On the other hand, for nc-OS films, the size is close to or smaller than that of nanocrystals. Electron diffraction (nanobi) is a method that uses electron beams with a probe diameter (e.g., 1 nm to 30 nm). Also called electron diffraction. When this is performed, a ring-shaped region is formed around the direct spot. In some cases, an electron diffraction pattern may be obtained in which multiple spots are observed within the same area.

[0200] [a-like OS] a-like OS is an oxide having a structure between nc-OS and amorphous oxide semiconductors. It is a semiconductor. an a-like OS has porous or low-density regions. That is, a-like OS has lower crystallinity compared to nc-OS and CAAC-OS. Also, it has a-like properties. OS has a higher hydrogen concentration in the membrane compared to nc-OS and CAAC-OS.

[0201] <Example of oxide semiconductor configuration> Next, we will explain the details of CAC-OS mentioned above. Note that CAC-OS is a material composition. Regarding achievement.

[0202] [CAC-OS] CAC-OS refers to, for example, metal oxides in which the elements constituting the metal oxide are between 0.5 nm and 10 nm. Below, preferably, a structure of material that is unevenly distributed with a size of 1 nm to 3 nm or near that size. It is formed. Furthermore, in the following, in metal oxides, one or more metal elements are unevenly distributed. The region containing the metal element is 0.5 nm to 10 nm, preferably 1 nm to 3 nm. A mixture of particles smaller than or near a m in size is also called a mosaic or patchy appearance. .

[0203] Furthermore, CAC-OS is a material that separates into a first region and a second region. This results in a zigzag-like structure, where the first region is distributed within the film (hereinafter also referred to as a cloud-like structure). ) In other words, CAC-OS is a mixture of the first region and the second region. It is a composite metal oxide having the following composition.

[0204] Here, I for the metal elements constituting CAC-OS in In-Ga-Zn oxide The atomic ratios of n, Ga, and Zn are given as [In], [Ga], and [Zn] respectively. To be expressed. For example, in CAC-OS in In-Ga-Zn oxide, the first region This is the region where [In] is greater than the [In] in the composition of the CAC-OS film. The second region is the region where [Ga] is greater than the [Ga] in the composition of the CAC-OS film. That is. Or, for example, in the first region, [In] is greater than [In] in the second region. It is also a region where the [Ga] is large, and the [Ga] is smaller than the [Ga] in the second region. Furthermore, in the second region, [Ga] is greater than [Ga] in the first region, and [I n] is a region where n is smaller than [In] in the first region.

[0205] Specifically, the first region mentioned above mainly consists of indium oxide, indium zinc oxide, etc. This is a region of minutes. Furthermore, the second region mentioned above is gallium oxide, gallium zinc oxide, etc. This is the region in which In is the main component. In other words, the first region described above can be said to be the region in which In is the main component. It can be replaced. Furthermore, the second region described above can be rephrased as the region with Ga as the main component. It is possible.

[0206] Note that a clear boundary may not be observed between the first region and the second region described above. .

[0207] For example, in CAC-OS in In-Ga-Zn oxide, the energy-dispersive X-ray segment Optical method (EDX:Energy Dispersive X-ray spectrosc) EDX mapping obtained using opy revealed the region with In as its main component (the first region) It has a structure in which a region (the second region) and a region mainly composed of Ga are unevenly distributed and mixed. This can be confirmed.

[0208] When CAC-OS is used in a transistor, the conductivity is due to the first region and the second region The insulating properties due to the region work complementarily to enable the switching function (On The function to turn off CAC-OS can be added to it. In other words, CAC-OS and The material has both conductive and insulating properties in parts, and the entire material Then it has the function of a semiconductor. By separating the conductive function and the insulating function, This allows for the maximum enhancement of both functions. Therefore, CAC-OS is used in transistors. This results in high on-current (Ion), high field-effect mobility (μ), and good switching. This enables smooth operation.

[0209] Oxide semiconductors can take on diverse structures, each possessing different properties. One embodiment of the present invention Oxide semiconductors include amorphous oxide semiconductors, polycrystalline oxide semiconductors, a-like OS, and C It may have two or more of the following: AC-OS, nc-OS, and CAAC-OS.

[0210] <Transistors containing oxide semiconductors> Next, we will explain the case where the above oxide semiconductor is used in a transistor.

[0211] By using the above oxide semiconductor in a transistor, a transistor with high field-effect mobility is obtained. This can be achieved. Furthermore, highly reliable transistors can be realized.

[0212] It is preferable to use an oxide semiconductor with a low carrier concentration for the transistor. The carrier concentration of oxide semiconductors is 1 × 10⁻⁶ 17 cm -3 The following is preferably 1 × 1015 c m -3 More preferably 1 × 10 13 cm -3 More preferably 1 × 10 11 cm -3 More preferably 1 × 10 10 cm -3 It is less than 1 × 10 -9 cm - 3 That concludes the explanation. Furthermore, when lowering the carrier concentration of the oxide semiconductor film, the oxide... The impurity concentration in the semiconductor film can be reduced to lower the defect level density. High-purity intrinsic or substantially high-purity intrinsic refers to a product with a low impurity concentration and a low defect level density. Furthermore, an oxide semiconductor with a low carrier concentration is subjected to high-purity intrinsic or substantially high-purity intrinsic acid. They are sometimes called monstrous semiconductors.

[0213] Furthermore, oxide semiconductor films that are high-purity intrinsic or substantially high-purity intrinsic have a low defect level density. Therefore, the trap level density may also be low.

[0214] Furthermore, the time required for charges trapped in the trap levels of an oxide semiconductor to disappear is... It can behave for a long time, almost like a fixed charge. Therefore, the trap level density is high. Transistors in which a channel formation region is formed in an oxide semiconductor have unstable electrical properties. There are cases where this occurs.

[0215] Therefore, in order to stabilize the electrical characteristics of a transistor, the impurity concentration in the oxide semiconductor is Reducing it is effective. Furthermore, in order to reduce the impurity concentration in oxide semiconductors, It is also preferable to reduce the concentration of impurities in the adjacent membrane. Examples of impurities include hydrogen, nitrogen, and Examples include potassium metals, alkaline earth metals, iron, nickel, and silicon.

[0216] <Impurities> Here, we will explain the effects of various impurities in oxide semiconductors.

[0217] In oxide semiconductors, if silicon or carbon, which are among the Group 14 elements, are present, oxidation occurs. Defect levels are formed in silicon semiconductors. Therefore, in oxide semiconductors, silicon and carbon The concentration of the element and the concentrations of silicon and carbon near the interface with the oxide semiconductor (secondary ion mass spectrometry) (SIMS: Secondary Ion Mass Spectrometry) The concentration obtained is 2 × 10 18 atoms / cm 3 The following is preferably 2 × 10 17 a toms / cm 3 The following applies:

[0218] Furthermore, if alkali metals or alkaline earth metals are present in the oxide semiconductor, defect levels are formed. This can result in the generation of carriers. Therefore, alkali metals or alkaline earth metals may be present. Transistors using oxide semiconductors tend to exhibit normally-on characteristics. Therefore, the concentration of alkali metals or alkaline earth metals in oxide semiconductors obtained by SIMS Degrees, 1 x 10 18 atoms / cm 3 The following is preferably 2 × 10 16 atoms / cm 3 Do the following:

[0219] Furthermore, in oxide semiconductors, when nitrogen is present, electrons, which are carriers, are generated. As the nitrogen concentration increases, it becomes easier to convert to n-type semiconductors. As a result, oxide semiconductors containing nitrogen become semiconductors. The transistor used tends to exhibit normally-on characteristics. Alternatively, oxide semiconductors Furthermore, when nitrogen is present, trap levels may be formed. As a result, transistor The electrical properties of the oxide semiconductor obtained by SIMS may become unstable. The nitrogen concentration inside is 5 × 10 19 atoms / cm 3 Less than 5 × 10 18 ato ms / cm 3 More preferably 1 × 10 18 atoms / cm 3 The following are even more preferable kuha 5×10 17 atoms / cm 3 Do the following:

[0220] Furthermore, the hydrogen contained in oxide semiconductors reacts with the oxygen bonded to the metal atoms to form water. Therefore, an oxygen deficiency may form. When hydrogen enters this oxygen deficiency, the carrier electrons In some cases, a child may be produced. Also, some of the hydrogen combines with the metal atom and oxygen, resulting in a crystal. It can generate electrons that act as carriers. Therefore, an oxide semiconductor containing hydrogen is used. Transistors with this characteristic tend to exhibit normally-on properties. Therefore, hydrogen in oxide semiconductors It is preferable that the SI is reduced as much as possible. Specifically, in oxide semiconductors, The hydrogen concentration obtained by MS is 1 × 10 20 atoms / cm 3 Less than 1x 10 19 atoms / cm 3 Less than 5x10 18 atoms / cm 3 less than More preferably 1 × 10 18 atoms / cm 3 Make it less than.

[0221] Using an oxide semiconductor with sufficiently reduced impurities in the channel formation region of a transistor. This allows for the provision of stable electrical characteristics.

[0222] <<Other Semiconductor Materials>> The semiconductor materials that can be used for oxide 230 are not limited to the metal oxides mentioned above. As monster 230, semiconductor materials with a band gap (not zero-gap semiconductors) Conductive materials may be used. For example, semiconductors of elemental silicon, gallium arsenide, etc. Which compound semiconductors, layered materials that function as semiconductors (also known as atomic layer materials, two-dimensional materials, etc.) It is preferable to use materials such as (u) as semiconductor materials. In particular, layered materials that function as semiconductors It is preferable to use this as a semiconductor material.

[0223] Here, in this specification, etc., "layered material" is a general term for a group of materials having a layered crystalline structure. Yes, it exists. Layered crystal structures are formed by layers created by covalent or ionic bonds, such as van der Wa. It is a structure in which layers are attached via weaker bonds than covalent or ionic bonds, such as the Ruhls force. Layered materials have high electrical conductivity within a single layer, meaning they have high two-dimensional electrical conductivity. A material that functions as a semiconductor and has high two-dimensional electrical conductivity is used in the channel formation region. This makes it possible to provide transistors with a large on-current.

[0224] Examples of layered materials include graphene, silicene, and chalcogenides. It is a compound containing chalcogens. Furthermore, chalcogens are a general term for elements belonging to Group 16. It contains oxygen, sulfur, selenium, tellurium, polonium, and livermorium. Examples of chalcogenides include transition metal chalcogenides and group 13 chalcogenides. .

[0225] For example, a transition metal chalcogenide that functions as a semiconductor can be used as oxide 230. Preferably, a transition metal chalcogenide applicable as oxide 230 is specified. These include molybdenum sulfide (typically MoS2) and molybdenum selenide (typically MoS2) e2), molybdenum tellurium (typically MoTe2), tungsten sulfide (typically W S2), tungsten selenide (typically WSe2), tungsten tellurium (typically (WTe2), hafnium sulfide (typically HfS2), hafnium selenide (typically (HfSe2), zirconium sulfide (typically ZrS2), zirconium selenide (alternative) Examples include ZrSe2).

[0226] <Example 1 of a semiconductor device> In the following, using Figures 3A to 3D and Figures 4A to 4D, we will explain transistor 200. An example of the configuration of a semiconductor device having [a certain feature] is described below.

[0227] Figure 3A is a top view of a semiconductor device having transistor 200. Figure 3B is a top view of a semiconductor device having transistor 200. Figure 3A is a cross-sectional view corresponding to the area shown by the dashed line A1-A2. Also, Figure 3C is a cross-sectional view of Figure 3 Figure A is a cross-sectional view corresponding to the area indicated by the dashed line A3-A4. Also, Figure 3D is Figure 3A This is a cross-sectional view corresponding to the area indicated by the dashed line A5-A6. In the top view of Figure 3A, the figure Some elements have been omitted for clarity.

[0228] Figure 4A is a top view of a semiconductor device having transistor 200. Figure 4B This is a cross-sectional view corresponding to the area shown by the dashed line A1-A2 in Figure 4A. Also, Figure 4C is Figure 4A shows a cross-sectional view corresponding to the area indicated by the dashed line A3-A4. Figure 4D also shows... Figure 4A shows a cross-sectional view corresponding to the area indicated by the dashed line A5-A6. In the top view of Figure 4A, Some elements have been omitted for clarity in the diagram.

[0229] Furthermore, in the semiconductor devices shown in Figures 3A to 3D and Figures 4A to 4D, <semiconductor The structure of the semiconductor device shown in <Example of device configuration> and <Modified example of semiconductor device 1> Structures having the same function shall be denoted by the same reference numeral. In addition, in this section as well, the structure of semiconductor devices The materials used are explained in detail in <Example of Semiconductor Device Configuration> and <Modified Example of Semiconductor Device 1>. The materials used can be used.

[0230] The semiconductor devices shown in Figures 3A to 3D are modified examples of the semiconductor devices shown in Figures 1A to 1D. The semiconductor device shown in Figures 3A to 3D is the same as the semiconductor device shown in Figures 1A to 1D. It differs in that it does not contain oxide 230c and oxide 230d.

[0231] By creating a configuration that does not include oxide 230c and oxide 230d, transistor 2 Between 00 and the transistor 200 adjacent to the transistor 200, a parasitic transistor This suppresses the formation of stasis and prevents the formation of leak paths along the conductor 260. Yes, it is possible. Therefore, semiconductors that have good electrical properties and can be miniaturized or highly integrated are possible. We can provide a body device.

[0232] Furthermore, the semiconductor devices shown in Figures 4A to 4D are the same as the semiconductor devices shown in Figures 3A to 3D. The difference lies in the fact that the conductor 205 has a three-layer structure. In other words, conductor 205b The bottom and sides of the conductor 205a are in contact with the conductor 205c It has a structure that is in contact with it.

[0233] <Modified example of a semiconductor device 2> In the following sections, using Figures 5A to 5D and Figures 6A to 6D, we will explain transistor 200. An example of a semiconductor device having the following features will be described.

[0234] Figure 5A shows a top view of the semiconductor device. Figure 5B shows a point A1-A2 as shown in Figure 5A. This is a cross-sectional view corresponding to the area indicated by the dashed line. Figure 5C is a cross-sectional view of Figure 5A with a dashed line at A3-A4. This is a cross-sectional view corresponding to the area indicated by the line. Also, Figure 5D is a cross-sectional view of Figure 5A with the dashed line A5-A6. This is a cross-sectional view corresponding to the area indicated by the arrow. In the top view of Figure 5A, some elements are shown for clarity. It omits the essentials.

[0235] Figure 6A shows a top view of the semiconductor device. Figure 6B shows a point A1-A2 as shown in Figure 6A. This is a cross-sectional view corresponding to the area indicated by the dashed line. Figure 6C is a cross-sectional view of Figure 6A with a dashed line at A3-A4. This is a cross-sectional view corresponding to the area indicated by the line. Figure 6D is a cross-sectional view of Figure 6A with the dashed line A5-A6. This is a cross-sectional view corresponding to the area indicated by the arrow. In the top view of Figure 6A, some elements are shown for clarity. It omits the essentials.

[0236] Furthermore, in the semiconductor devices shown in Figures 5A to 5D and Figures 6A to 6D, <semiconductor The structure of the semiconductor device shown in <Example of device configuration> and <Modified example of semiconductor device 2> Structures having the same function shall be denoted by the same reference numeral. In addition, in this section as well, the structure of semiconductor devices The materials used are explained in detail in <Example of Semiconductor Device Configuration> and <Modified Semiconductor Device 2>. The materials used can be used.

[0237] The semiconductor devices shown in Figures 5A to 5D are modified examples of the semiconductor devices shown in Figures 1A to 1D. The semiconductor devices shown in Figures 5A to 5D are the same as the semiconductor devices shown in Figures 1A to 1D. The other differs in the shape of the insulator 283. It also differs in having an insulator 274.

[0238] In the semiconductor device shown in Figures 5A to 5D, insulator 214, insulator 216, insulator 222 Insulators 224, 272, 280, and 282 are patterned. In addition, insulator 283 is insulator 214, insulator 216, insulator 222, insulator 2 24, insulator 272, insulator 280, and insulator 282 are covered in this structure. The insulator 283 is in contact with the top and side surfaces of the insulator 282 and the top surface of the insulator 212. As a result, insulators 214, 216, 222, and oxides 230 are included. Edge body 224, insulator 272, insulator 280, and insulator 282 are insulator 283 and It is isolated from the outside by the edge 212. In other words, transistor 200 is an insulator. It is placed within a region sealed by the body 283 and the insulator 212.

[0239] For example, the insulators 214 and 282 have the function of capturing hydrogen and fixing hydrogen. Formed using a material having the properties of, insulator 212 and insulator 283 are opposed to hydrogen and oxygen. It is preferable to form it using a material that has the function of suppressing diffusion. Typically, an insulator Aluminum oxide can be used as 214 and the insulator 282. Typically, silicon nitride is used as the insulator 212 and insulator 283. can.

[0240] With the above configuration, hydrogen contained outside the sealed region will enter the sealed region This can prevent contamination inside the container.

[0241] Furthermore, in the transistor 200 shown in Figures 5A to 5D, the insulator 212 and the insulator Although the present invention shows a configuration in which 283 is provided as a single layer, the present invention is not limited to this. There is no such thing. For example, if the insulator 212 and the insulator 283 each have a laminated structure of two or more layers It may also be configured to include such a setup.

[0242] Insulator 274 functions as an interlayer film. Insulator 274 has a higher dielectric constant than insulator 214. A low dielectric constant is preferable. By using a material with a low dielectric constant as the interlayer film, parasitic volumes that form between wiring are reduced. The amount can be reduced. The insulator 274 can be made of the same material as the insulator 280, for example. It can be established.

[0243] Furthermore, the semiconductor devices shown in Figures 6A to 6D are the same as the semiconductor devices shown in Figures 5A to 5D. The difference lies in the fact that the conductor 205 has a three-layer structure. In other words, conductor 205b The bottom and sides of the conductor 205a are in contact with the conductor 205c It has a structure that is in contact with it.

[0244] <Modified example of semiconductor device 3> In the following, using Figures 7A to 7D and Figures 8A to 8D, we will explain transistor 200. An example of the configuration of a semiconductor device having [a certain feature] is described below.

[0245] Figure 7A is a top view of a semiconductor device having transistor 200. Figure 7B is a top view of a semiconductor device having transistor 200. Figure 7A is a cross-sectional view corresponding to the area indicated by the dashed line A1-A2. Also, Figure 7C is a cross-sectional view of Figure 7. Figure A is a cross-sectional view corresponding to the area indicated by the dashed line A3-A4. Also, Figure 7D is a cross-sectional view of Figure 7A. This is a cross-sectional view corresponding to the area indicated by the dashed line A5-A6. In the top view of Figure 7A, the figure Some elements have been omitted for clarity.

[0246] Figure 8A is a top view of a semiconductor device having transistor 200. Figure 8B This is a cross-sectional view corresponding to the area shown by the dashed line A1-A2 in Figure 8A. Also, Figure 8C is Figure 8A shows a cross-sectional view corresponding to the area indicated by the dashed line A3-A4. Figure 8D also shows... Figure 8A shows a cross-sectional view corresponding to the area indicated by the dashed line A5-A6. In the top view of Figure 8A, Some elements have been omitted for clarity in the diagram.

[0247] Furthermore, in the semiconductor devices shown in Figures 7A to 7D and Figures 8A to 8D, <semiconductor The structure of the semiconductor device shown in <Example of device configuration> and <Modified example of semiconductor device 3> Structures having the same function shall be denoted by the same reference numeral. In addition, in this section as well, the structure of semiconductor devices The materials used are explained in detail in <Example of Semiconductor Device Configuration> and <Modified Semiconductor Device 3>. The materials used can be used.

[0248] The semiconductor devices shown in Figures 7A to 7D are modified examples of the semiconductor devices shown in Figures 6A to 6D. The semiconductor device shown in Figures 7A to 7D is the same as the semiconductor device shown in Figures 6A to 6D. It differs in that it does not contain oxide 230c and oxide 230d.

[0249] By creating a configuration that does not include oxide 230c and oxide 230d, transistor 2 Between 00 and the transistor 200 adjacent to the transistor 200, a parasitic transistor This suppresses the formation of stasis and prevents the formation of leak paths along the conductor 260. Yes, it is possible. Therefore, semiconductors that have good electrical properties and can be miniaturized or highly integrated are possible. We can provide a body device.

[0250] Furthermore, the semiconductor devices shown in Figures 8A to 8D are the same as the semiconductor devices shown in Figures 7A to 7D. The difference lies in the fact that the conductor 205 has a three-layer structure. In other words, conductor 205b The bottom and sides of the conductor 205a are in contact with the conductor 205c It has a structure that is in contact with it.

[0251] <First Ionization Sputtering Method> The following describes the film deposition method using the first ionization sputtering method, with reference to Figure 36. Figure 36 shows the film that can be deposited by the first ionization sputtering method. This is an example of the apparatus, a cross-sectional view of the film deposition apparatus 4100. Note that the film deposition apparatus 41 shown in Figure 36 The schematic cross-sectional diagram of 00 omits some elements to make the diagram clearer.

[0252] As shown in Figure 36, the film deposition apparatus 4100 has a film deposition chamber 4102, and the film deposition chamber Inside the member 4102, there is a backing plate 4108 and attached to the backing plate 4108. The attached target 4110 and the base positioned opposite the target 4110 It has a board holder 4112. The board holder 4112 heats the board 4200. It may also have the function of having a magnetic unit 4106 outside the film deposition chamber 4102. And, a DC power supply 4115 electrically connected to the backing plate, and a circuit board holder 411 The RF power supply 4116 is electrically connected to 2, and the outer wall of the film deposition chamber 4102 is surrounded by A coil unit 4114 is positioned, and the coil unit 4114 is electrically connected It has an RF power supply 4117. Although not shown in the figure, the film deposition apparatus 4100 has a film deposition chamber. - An exhaust system having a vacuum pump to exhaust the inside of 4102, and a film deposition chamber 410 2 has a gas supply system for introducing gas. Also, inside the film deposition chamber 4102 A configuration in which an anti-adhesion plate is placed on the side is also possible. Film deposition by the first ionization sputtering method. The apparatus that can perform this operation preferably uses a deposition chamber with a high vacuum to deposit the film. To reduce the hydrogen concentration in the film, a vacuum pump is used to evacuate the inside of the film deposition chamber 4102. The pump is exhausted using a cryopump or a turbomolecular pump with an H2O trap. This is preferable.

[0253] First, maintain the deposition chamber 4102 in a low-pressure gas atmosphere, and power the DC power supply 4115 to... DC power is applied to the target 4110 via the rocking plate 4108, and the plasma To generate. Also, the area around target 4110 is located near target 4110. The magnetic field of the magnet unit 4106 confines electrons in the plasma, and gas molecules and The probability of collisions with electrons increases, resulting in a high-density plasma. This high-density plasma allows for... -GET 4110 can efficiently generate sputtered metal atoms. .

[0254] The RF power supply 4117 to the coil unit 4114 delivers the sputtered metal atoms mentioned above. By applying RF power via this, the sputtered metal atoms are ionized. It is possible to do so. Also, the RF power supply 4116 can be used to power the substrate 420 via the substrate holder 4112. RF power is applied to 0. The ionized metal atoms are ionized by the application of RF power to the substrate 42 It is accelerated by the bias voltage generated on 00. In other words, to the ionized metal atoms Energy can be imparted. By adjusting the amount of energy imparted as appropriate, the metal element can be modified. The material can diffuse across the surface of the substrate 4200, allowing for seamless film formation. Therefore, it is possible to form a dense membrane with high membrane density.

[0255] In this embodiment, tantalum nitride is used as the conductor 242 in the first ionization sputtering described above. The film is deposited by the ring method. Conductive film deposited by the first ionization sputtering method. 242 can be made into a dense conductor with high film density and has excellent oxidation resistance. Therefore, it is excellent A transistor 200 with excellent electrical characteristics and high reliability can be fabricated.

[0256] <Second Ionization Sputtering Method> The following describes the formation of conductor 205 using the second ionization sputtering method. Figure 37 shows the materials that can be deposited by the second ionization sputtering method. This is an example of a film deposition apparatus, and is a cross-sectional view of the film deposition apparatus 4101. Note that the film deposition apparatus 4 shown in Figure 37 In the cross-sectional view 101, some elements have been omitted to make the diagram clearer. Also, Figures 10A to 10A 10D uses a second ionization sputtering method to create a single-layer structure of the conductor 205. This is a cross-sectional view illustrating an example of a method for forming the electrolytic body 205. Also, see Figures 11A to 11D. Figures 12A to 12C show the conductor 205 using the second ionization sputtering method. This is a cross-sectional view illustrating an example of a method for forming a conductor 205 having a three-layer structure.

[0257] As shown in Figure 37, the film deposition apparatus 4101 has a film deposition chamber 4102, and Inside the member 4102, there is a backing plate 4108 and attached to the backing plate 4108. The attached target 4110 and the base positioned opposite the target 4110 It has a board holder 4112. The board holder 4112 heats the board 4200. It may also have the function of having a magnetic unit 4106 outside the film deposition chamber 4102. And the DC power supply 4115 electrically connected to the backing plate, and the backing plate The RF power supply 4118 is electrically connected to the board holder 4112. It has an RF power supply 4116. Although not shown in the figure, the film deposition apparatus 4101 has a film deposition chamber. An exhaust system having a vacuum pump for exhausting the inside of 4102, and a film deposition chamber 4102 It has a gas supply system for introducing gas inside. Also, inside the film deposition chamber 4102 A configuration in which an anti-adhesion plate is placed is also possible. The film is formed by a second ionization sputtering method. The apparatus can deposit films by a first ionization sputtering method. Similar to the apparatus, it is preferable to deposit the film using a deposition chamber with a high vacuum. To reduce the hydrogen concentration, a vacuum pump is used to evacuate the inside of the film deposition chamber 4102. It is preferable to exhaust the system using an iodine pump or a turbomolecular pump with an H2O trap. stomach.

[0258] First, as the first film deposition step, the film deposition chamber 4102 is kept in a low-pressure gas atmosphere. The RF power supply 4118 is transmitted to the target 4110 via the backing plate 4108. Apply RF power 1. Plasma is generated by applying RF power 1. The frequency of RF power 1 is preferably 13.56 MHz or higher, and more preferably It is 40MHz or higher. The higher the frequency of the first RF power, the denser the plasma that is generated. It is possible to do so. Also, the area around target 4110 is located near target 4110. The magnetic field of the magnet unit 4106 encapsulates electrons in the plasma, and gases The probability of collisions between electrons and particles increases, allowing for the creation of a higher-density plasma. Furthermore, the DC power supply 4115 is supplied to the target 4110 via the backing plate 4108. By applying a first DC power, ionized gas atoms or many ionized Since gas molecules can be made to collide with target 4110, from target 4110 This can increase the deposition rate of sputtered metal atoms onto the substrate 4200.

[0259] Furthermore, a second RF signal is transmitted from the RF power supply 4116 to the substrate 4200 via the substrate holder 4112. By applying electric power, the aforementioned sputtered metal atoms are ionized. This is possible. The frequency of the second RF power must be between 400 kHz and 30 MHz. Preferably, it is 13.56 MHz. Also, the ionized metal atom is second The RF power applied to the substrate 4200 accelerates the bias voltage generated on the substrate 4 The temperature reaches 200, and a metal film is deposited.

[0260] Figure 10A is a cross-sectional view of the insulator 216 after an opening has been formed that reaches the insulator 214.

[0261] Figure 10B is a cross-section showing the deposition of the metal film 205A during the first deposition step. This is a view. As shown in Figure 10B, the metal film 205A is mainly at the bottom of the opening and the insulator The thickness of the metal film 205A formed on 216 and on the side surface of the opening is such that the thickness This is thinner than the thickness of the metal film 205A formed on the upper surface of the insulator 216. This is because the ionized metal atoms are accelerated in a roughly vertical direction with respect to the bottom surface of the opening. .

[0262] Figure 10C shows that in the first film deposition step, the metal film 205A is formed to a depth greater than the opening. This is a cross-sectional view showing the process. In this way, the first process in the second ionization sputtering method By using a membrane step, the metal film 205A can be embedded in the opening.

[0263] Next, the metal film 205A on the insulator 216 is treated by the CMP method until it reaches the insulator 216. By polishing, the conductive material 205 embedded in the opening can be formed (see Figure 10D). (See reference). The height of the top surface of the conductor 205 and the height of the top surface of the insulator 216 are approximately equal. Also, Although not shown in the diagram, a portion of the upper surface of the insulator 216 is polished by the CMP method, and the insulator 216 The film thickness may become thinner. Thus, lithography is used for processing metal film 205A. Since the conductive material 205 can be formed without using any other materials, processing accuracy is improved and the process is simplified. It can be achieved.

[0264] Below, an example of a method for forming a conductive material 205 having a three-layer structure will be described. Figure 11A is a cross-sectional view of the insulator 216 after an opening has been formed that reaches the insulator 214.

[0265] Figure 11B shows the second film deposition chamber capable of depositing a metal film 205a1. This is a cross-sectional view after the first film deposition step in the ionization sputtering method. Figure 11B As shown, the metal film 205a1 is formed mainly at the bottom of the opening and on the upper surface of the insulator 216. The thickness of the metal film 205a1 formed on the side surface of the opening is such that it is less thick at the bottom of the opening and less thick at the insulator 2 The thickness of the metal film 205a1 formed on the upper surface of 16 will be thinner than the film thickness of the metal film 205a1 formed on the upper surface of 16.

[0266] Next, as the second film deposition step, the RF power supply 4116 is used via the substrate holder 4112. The RF power applied to the substrate 4200 is set to a third RF power that is greater than the second RF power. This causes ionized gas atoms or ionized gas molecules to collide with the substrate. In other words, ionized gas atoms or ionized gas molecules are shown in Figure 11B. The metal film 205a1 and insulator 2 at the bottom of the opening formed in the first film deposition step are shown. 16 collides with the metal film 205a1 on top, causing the metal film to sputter and reach the side of the opening. It is redistributed. Figure 11C shows the formation state of the metal film 205a1 after the second film deposition step. Furthermore, the third RF power is between twice and five times the second RF power.

[0267] Next, as the third film deposition step, the RF power supply 4118 is used to transfer the backing plate 4108 The RF power applied to target 4110 via is a fourth RF power that is smaller than the first RF power. Convert to RF power. Also, the RF power supply 4116 is connected to the circuit board 420 via the circuit board holder 4112. By making the RF power applied to 0 a fifth RF power that is smaller than the third RF power, The amount of ionized metal atoms, and the amount of ionized gas atoms directed toward the substrate 4200. Alternatively, reduce the amount of ionized gas molecules. Meanwhile, from target 4110, The number of metal atoms can be increased. These metal atoms are electrically neutral. Therefore, random corners are hardly affected by the bias voltage generated on the board 4200. Since it reaches the substrate 4200 in degrees, a uniform metal film can be formed on the side of the opening. Furthermore, the fourth RF power is between 0.5 and 1 times the first RF power. The power is between 0.25 and 1 times the third RF power.

[0268] As described above, the processing time for each of the first to third film formation steps is determined by the size of the aperture, and the aperture By adjusting as appropriate according to the depth, a metal film 205a1 with excellent coverage can be formed. It is possible (see Figure 11D).

[0269] Next, using a deposition chamber capable of depositing the metal film 205b1, the first deposition The step is performed, and the height of the upper surface of the metal film 205b1 in the opening is approximately 3 / 4 of the depth of the opening. A metal film 205b1 is formed in such a manner (see Figure 12A).

[0270] Next, using a deposition chamber capable of depositing a metal film 205c1, the first deposition The step is performed, and the height of the upper surface of the metal film 205c1 at the opening is equal to the height of the upper surface of the insulator 216. A metal film 205c1 is formed so that it is greater than or equal to (see Figure 12B).

[0271] Next, the metal film 205b1 and the metal film 205c1 are subjected to the CMP method, and the insulator 216 By polishing until it reaches a certain point, the conductor 205 (conductor 205a, conductive) embedded in the opening is polished. Body 205b and conductor 205c) can be formed (see Figure 12C). Conductor The height of the top surface of 205c and the height of the top surface of the insulator 216 are approximately equal. However, the CMP method polishes a portion of the upper surface of the insulator 216, and the film thickness of the insulator 216 is thinned. It can get worse.

[0272] As described above, the conductor 205 is arranged with the highly conductive conductor 205b at the center, and the conductor 20 The bottom, top, and sides of 5b are designed to suppress the diffusion of impurities such as water and hydrogen, as well as oxygen. The structure can be made by enclosing the material with conductive material 205a and conductive material 205c. In this configuration, the conductor 205b is tantalum, and the conductors 205a and 205b Let it be tantalum nitride.

[0273] Furthermore, in actual film deposition using the second ionization sputtering method, the first film deposition step The effects of the second and third film deposition steps may be mixed during the process. The effects of the first and third film deposition steps are mixed during the second film deposition step. In some cases, this may occur. Also, during the third film deposition step, the first film deposition step and the second film deposition step The effects of the top may be mixed.

[0274] The formation of such a conductive 205 with a three-layer structure involves the continuous formation of different film types. It is preferable to use a so-called multi-chamber apparatus that has multiple processing chambers capable of film formation. The multi-chamber device will be described later.

[0275] In this embodiment, as an example of the second ionization sputtering method, the shape of the conductor 205 is used. I have explained the formation, but it is not limited to this. For example, the shape of the conductor in the lower layer of the conductor 240 It can be used in construction. Also, for example, TSV (Through Silicon V This can be applied to the formation of seed layers in ia).

[0276] <Method for fabricating semiconductor devices> Next, a method for manufacturing a semiconductor device, which is one embodiment of the present invention, as shown in Figures 5A to 5D, is shown in Figure 1. This will be explained using Figures 3A through 27D.

[0277] In each figure, A represents the top view. Also, B represents the dashed line A1-A2 shown in A of each figure. This is a cross-sectional view corresponding to the indicated area. Also, C in each figure is the dashed line A3-A4 on A in each figure. This is a cross-sectional view corresponding to the area indicated by the arrow. Also, D in each figure is a single chain of A5-A6 in A of each figure. This is a cross-sectional view of the area indicated by the line. Note that in the top view A of each figure, some parts are shown for clarity. Elements have been omitted.

[0278] First, a substrate (not shown) is prepared, and an insulator 212 is deposited on the substrate. The deposition of 212 can be done by sputtering, CVD, or molecular beam epitaxy (MBE). cular beam epitaxy (PLD) method, pulsed laser deposition (PLD) Atomic Layer Deposition (ALD) This can be done using methods such as the (ER Deposition) method.

[0279] Furthermore, the CVD method is a type of plasma CVD (PECVD) that utilizes plasma. Enhanced CVD (Enhanced CVD), Thermal CVD (TCVD: Thermal CCVD) which utilizes heat. It can be classified into methods such as the VD method and the photoCVD method which utilizes light. Depending on the source gas used, the process can be metal CVD (MCVD) or organometallic CVD. It can be divided into (MOCVD: Metal Organic CVD) methods.

[0280] Plasma CVD can produce high-quality films at relatively low temperatures. Thermal CVD, on the other hand, is a method that can produce high-quality films at low temperatures. A film deposition method that does not use Zuma, thus minimizing plasma damage to the workpiece. For example, wiring, electrodes, and elements (transistors, capacitive elements, etc.) included in semiconductor devices. ) and others can be charged up by receiving an electric charge from the plasma. In cases where the accumulated charge destroys the wiring, electrodes, and elements contained in the semiconductor device. On the other hand, in the case of thermal CVD methods that do not use plasma, such plasma damage occurs. Therefore, the yield of semiconductor devices can be increased. Also, in the thermal CVD method, Because plasma damage does not occur within the film, a film with fewer defects can be obtained.

[0281] Furthermore, in the ALD method, the reaction between the precursor and reactant is carried out using only thermal energy. Thermal ALD (Thermal Altode Discharge) method, using plasma-excited reactants. Methods such as EALD (Plasma Enhanced Alopecia) can be used.

[0282] Furthermore, the ALD method utilizes the self-regulating properties of atoms to deposit atoms layer by layer. This allows for the deposition of extremely thin films, enabling film deposition on structures with high aspect ratios, and pinholes. It enables film formation with fewer defects such as blemishes, enables film formation with excellent coverage, and enables film formation at low temperatures. What are the effects? In the PEALD (Plasma Enhanced ALD) method, Using Zuma can enable film deposition at lower temperatures, which is preferable in some cases. Some precursors used in the D method contain impurities such as carbon. Therefore, the ALD method... The film formed by this method contains more impurities such as carbon compared to films formed by other film formation methods. It may contain [unclear]. Furthermore, the quantitative determination of impurities is performed by X-ray photoelectron spectroscopy (XPS). This can be done using hotoelectron Spectroscopy.

[0283] CVD and ALD are film deposition methods in which particles emitted from a target or other source are deposited. Unlike other methods, this is a film-forming method in which a film is formed by a reaction on the surface of the object being treated. This film-forming method is less affected by the shape of the workpiece and has good step-level coverage. Furthermore, the ALD method has excellent step coverage and excellent thickness uniformity, thus aspect ratio This method is suitable for coating the surface of high-aperture openings, etc. However, the ALD method is relatively suitable for film formation. Because of its slow rate, it should be used in combination with other film deposition methods that have a faster deposition rate, such as CVD. In some cases, this may be preferable.

[0284] The CVD and ALD methods control the composition of the resulting film by adjusting the flow rate ratio of the source gases. This is possible. For example, in the CVD method and ALD method, the flow rate ratio of the raw material gas can be adjusted as needed. A film with the following composition can be formed. Furthermore, for example, in the CVD method and ALD method, film formation can be performed. By changing the flow rate ratio of the raw material gas while simultaneously depositing a film with a continuously changing composition. This is possible. When forming a film while changing the flow rate ratio of the raw material gas, multiple deposition chambers can be used. Compared to the method of film deposition using a conveyor belt, it eliminates the time required for transport and pressure adjustment, thus reducing the time required for film deposition. The interval can be shortened. Therefore, the productivity of semiconductor devices can be increased. There is.

[0285] In this embodiment, silicon nitride is formed as the insulator 212 by sputtering. To form a membrane.

[0286] Thus, as the insulator 212, an insulator that is impermeable to copper, such as silicon nitride, is used. By doing so, easily diffusible metals such as copper can be introduced into the conductor layer (not shown) below the insulator 212. Even when using this method, it is possible to suppress the upward diffusion of the metal through the insulator 212. Furthermore, using an insulator that is resistant to the permeability of impurities such as water and hydrogen, such as silicon nitride. This suppresses the diffusion of impurities such as water and hydrogen contained in the layer below the insulator 212. can.

[0287] Next, an insulator 214 is deposited on the insulator 212. The insulator 214 is deposited by sputtering. This can be performed using methods such as the kerning method, CVD method, MBE method, PLD method, and ALD method. In this application, aluminum oxide is deposited as the insulator 214 by sputtering. do.

[0288] The hydrogen concentration of insulator 214 is preferably lower than the hydrogen concentration of insulator 212. By depositing silicon nitride film as 212 using the sputtering method, the hydrogen concentration is low. Silicon nitride can be formed. Also, by using aluminum oxide for the insulator 214... Therefore, the hydrogen concentration can be lower than that of insulator 212.

[0289] In the following step, a transistor 200 is formed on the insulator 214, For membranes close to 200, it is preferable to have a relatively low hydrogen concentration, and for membranes with a relatively high hydrogen concentration... It is preferable to position it remotely from transistor 200.

[0290] Next, an insulator 216 is deposited on the insulator 214. The insulator 216 is deposited by sputtering. This can be performed using methods such as the kerning method, CVD method, MBE method, PLD method, and ALD method. In the application method, the insulator 216 is made of silicon oxide or oxide by sputtering. A silicon nitride film is deposited.

[0291] Furthermore, insulators 212, 214, and 216 are reduced without being exposed to the atmospheric environment. It is preferable to deposit the film continuously under pressure. By depositing the film without opening to the atmosphere, the insulator 212 Impurities or moisture from the atmospheric environment may adhere to the insulator 214 and the insulator 216. This can prevent the interface between insulator 212 and insulator 214 and the vicinity of the interface, insulator 21 This is preferable because it allows the interface between 4 and the insulator 216, and the vicinity of the interface, to be kept clean. For film deposition, for example, a multi-chamber type deposition apparatus can be used. By continuously depositing films... This is preferable because it allows for a reduction in the manufacturing process time for semiconductor devices.

[0292] Next, an opening is formed in the insulator 216 that reaches the insulator 214. An opening is, for example, a groove or This also includes slits, etc. Furthermore, the term "opening" can sometimes refer to the area where an opening has been formed. The opening can be formed using wet etching, but dry etching is preferable. This is preferable for microfabrication. In addition, the insulator 214 forms grooves by etching the insulator 216. It is preferable to select an insulator that functions as an etching stopper film during the etching process. When silicon oxide or silicon oxide nitride is used for the insulator 216 that forms the groove, The edge material 214 may be silicon nitride, aluminum oxide, or hafnium oxide.

[0293] As a dry etching apparatus, a capacitively coupled plasma (CCP) system with parallel plate electrodes is used. (Capacitively Coupled Plasma) Etching apparatus is used. Capacitively coupled plasma etching apparatus having parallel plate electrodes can be used. Alternatively, a high-frequency voltage may be applied to one electrode of the type electrode. Or, one of the parallel plate type electrodes. Alternatively, a configuration in which multiple different high-frequency voltages are applied to the electrodes may be used. Or a parallel plate type electrode Alternatively, a configuration in which the same high-frequency voltage is applied to each of them is also possible. Alternatively, a configuration in which high-frequency voltages of different frequencies are applied may be used. Or, a high-density plasma source may be used. A dry etching apparatus can be used. Dry etching with a high-density plasma source. The device is, for example, an inductively coupled plasma (ICP) device. Etching equipment such as an ed Plasma etching device can be used.

[0294] After the opening is formed, the <second ionization sputtering method> described above is performed as shown in Figures 10A to The conductive material 205 is formed by the manufacturing method described using Figure 10D (Figures 13A to 13A). (See 3D).

[0295] As the conductor 205, tantalum nitride, tungsten nitride, titanium nitride, etc. can be used. It is possible.

[0296] Next, an insulator 222 is formed on the insulator 216 and the conductor 205. For this purpose, an insulator containing either or both aluminum and hafnium may be used. The insulator may be an oxide or nitride containing either or both aluminum and hafnium. Aluminum oxide, oxidized nitrides, and nitride oxides can be used. For example, aluminum oxide, nitride oxide. Aluminum oxide, aluminum nitride, hafnium oxide, hafnium oxide nitride, nitriding acid Hafnium oxide, aluminum, and hafnium-containing oxides (hafnium aluminate) , oxide nitrides containing aluminum and hafnium, containing aluminum and hafnium It is preferable to deposit an insulating film such as a nitride oxide. Such an insulating film contains oxygen, hydrogen, and It has barrier properties against water. The insulator 222 has barrier properties against hydrogen and water. As a result, hydrogen and water contained in the structure surrounding transistor 200 become saturates. Diffusion into the inside of the transistor 200 through the edge 222 is suppressed, and oxide 230 This can suppress the formation of oxygen deficiencies inside.

[0297] The insulator 222 was deposited using sputtering, CVD, MBE, PLD, and ALD methods. This can be done using methods such as [mention specific methods].

[0298] Next, it is preferable to perform a heat treatment. The heat treatment is preferably performed at a temperature of 250°C to 650°C. It is preferable to carry it out at a temperature of 300°C to 500°C, and more preferably at 320°C to 450°C. The heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, or with an oxidizing gas for 10 minutes. The procedure should be carried out in an atmosphere containing ppm or more, 1% or more, or 10% or more. For example, nitrogen gas and oxygen. When performing heat treatment in a gas mixture atmosphere, it is sufficient to use about 20% oxygen gas. The heat treatment may be carried out under reduced pressure. Alternatively, the heat treatment may be carried out under nitrogen gas or an inert gas. After heat treatment in an atmosphere, an oxidizing gas of 10 ppm or more is added to replenish the desorbed oxygen. Heat treatment may be carried out in an atmosphere containing % or more, or 10% or more.

[0299] Furthermore, it is preferable that the gas used in the above heat treatment is highly purified. For example, The amount of moisture contained in the gas used in the heat treatment described above is 1 ppb or less, preferably 0.1 ppb or less. More preferably, the level should be 0.05 ppb or less. Heat treatment using highly purified gas. By performing this process, it is possible to prevent moisture and other substances from being absorbed into the insulator 222, etc., as much as possible. can.

[0300] In this embodiment, as a heat treatment, after the film formation of the insulator 222, nitrogen gas and oxygen gas are used. The treatment is performed at a temperature of 400°C for 1 hour with a flow rate ratio of 4 slm: 1 slm. This method allows for the removal of impurities such as water and hydrogen contained in the insulator 222. Furthermore, the heat treatment can also be performed at a later stage, such as after the deposition of the insulator 224.

[0301] Next, an insulator 224 is deposited on the insulator 222. The insulator 224 is deposited by sputtering. This can be performed using methods such as the kerning method, CVD method, MBE method, PLD method, and ALD method. In the application method, the insulator 224 is made of silicon oxide or oxide by sputtering. A silicon nitride film is formed. By using the sputtering method, the water insulator 224 is deposited. The elemental concentration can be reduced. The insulator 224 comes into contact with the oxide 230a in a later process. Therefore, it is preferable that the hydrogen concentration is reduced in this way.

[0302] Here, in order to form an excess oxygen region in the insulator 224, a plasma containing oxygen is used under reduced pressure. Plasma treatment may be performed. Oxygen-containing plasma treatment can be performed, for example, using high-density microwaves. It is preferable to use a device that has a power supply for generating rasma. Alternatively, RF( It may have a power supply that applies radio frequency. By doing so, high-density oxygen radicals can be generated, and RF can be applied to the substrate side. This efficiently guides the oxygen radicals generated by the high-density plasma into the insulator 224. This is possible. Alternatively, after performing plasma treatment with an inert gas using this device, Plasma treatment containing oxygen may be performed to replenish the desorbed oxygen. By appropriately selecting the processing conditions, impurities such as water and hydrogen contained in the insulator 224 can be removed. It can be removed. In that case, heat treatment is not necessary.

[0303] Here, aluminum oxide is applied to the insulator 224, for example, by sputtering. After film formation, CMP treatment may be performed until the insulator 224 is reached. This process allows for the planarization and smoothing of the surface of the insulator 224. By placing nium on the insulator 224 and performing CMP processing, the endpoint detection of the CMP processing can be easily performed. It becomes easy. Also, due to the CMP treatment, a part of the insulator 224 is polished, and the insulator 224 The film thickness may become thin, but this can be corrected by adjusting the film thickness during the deposition of the insulator 224. 224 Planarizing and smoothing the surface prevents deterioration of the coverage of the oxide film that will be deposited later. This can sometimes prevent a decrease in the yield of semiconductor devices. Also, on the insulator 224 Then, by forming an aluminum oxide film using the sputtering method, an insulator 224 It is preferable because oxygen can be added to it.

[0304] Next, oxide film 230A and oxide film 230B are deposited sequentially on the insulator 224 (Figure 13A). (See Figure 13D).

[0305] The oxide films 230A and 230B were deposited by sputtering, CVD, and MBE. This can be done using methods such as the PLD method and the ALD method.

[0306] For example, oxide film 230A and oxide film 230B are deposited by sputtering. In this case, oxygen or a mixture of oxygen and a noble gas is used as the sputtering gas. By increasing the proportion of oxygen in the puttering gas, excess oxygen in the formed oxide film... This can increase the amount. Also, when the above oxide film is deposited by sputtering: The above-mentioned In-M-Zn oxide targets can be used.

[0307] In particular, during the deposition of oxide film 230A, some of the oxygen contained in the sputtering gas acts as an insulator. It may be supplied to 224. Therefore, the oxygen contained in the sputtering gas The percentage should be 70% or more, preferably 80% or more, and more preferably 100%.

[0308] Furthermore, when forming oxide film 230B by sputtering, the sputtering gas contains The proportion of oxygen is greater than 30% and less than or equal to 100%, preferably between 70% and 100%. When a film is formed using this method, an oxygen-rich oxide semiconductor is created. The transistors used in the channel formation region offer relatively high reliability. However, this generation One aspect of the present invention is not limited thereto. When the oxide film 230B is formed by sputtering, The proportion of oxygen in the sputtering gas should be 1% or more and 30% or less, preferably 5% or more. When the film is deposited with an oxygen content of 0% or less, an oxygen-deficient oxide semiconductor is formed. Transistors using a monocrystalline semiconductor in the channel formation region can achieve relatively high field-effect mobility. Furthermore, by performing film formation while heating the substrate, the crystallinity of the oxide film can be improved. It can be done.

[0309] In this embodiment, the oxide film 230A is formed by sputtering, using the In:Ga: The film is deposited using an oxide target with a Zn = 1:3:4 [atomic ratio]. Also, oxide film 23 As 0B, by sputtering, In:Ga:Zn=4:2:4.1 [atomic ratio] The film is deposited using the oxide target of ]. Note that each oxide film is formed under different deposition conditions and atomic ratios. By selecting appropriately, the desired properties for oxide 230a and oxide 230b can be determined. It is good to form it.

[0310] Next, an oxide film 243A is deposited on the oxide film 230B (see Figures 13A to 13D). The 243A oxide film can be deposited using sputtering, CVD, MBE, PLD, and ALD methods. This can be done using the following methods. The oxide film 243A has an atomic ratio of Ga to In, which is oxidative. It is preferable that the atomic ratio of Ga to In in film 230B is greater than that of film 230B. , as oxide film 243A, by sputtering method, In:Ga:Zn=1:3:4[ The film is deposited using an oxide target with an atomic ratio of [number of atoms].

[0311] Furthermore, oxide films 230A, 230B, and 243A are exposed to the atmospheric environment. It is preferable to continuously deposit the film under reduced pressure without opening to the atmosphere. Impurities or moisture from the atmospheric environment are present on 230A, oxide film 230B, and oxide film 243A. This prevents adhesion, and the interface between oxide film 230A and oxide film 230B and the interface The vicinity, the interface between oxide film 230B and oxide film 243A, and the vicinity of the interface can be kept clean. Therefore, it is preferable. For example, a multi-chamber type film deposition apparatus can be used. Continuous film deposition is This is preferable because it makes it possible to shorten the manufacturing process time for semiconductor devices.

[0312] Next, it is preferable to perform a heat treatment. The heat treatment is performed on oxide film 230A and oxide film 230B. The process should be carried out within a temperature range in which the oxide film 243A does not undergo polycrystallization, which is between 250°C and 650°C. The following steps should preferably be performed at a temperature of 400°C to 600°C. Note that the heat treatment is performed using nitrogen gas. Alternatively, an inert gas atmosphere, or an oxidizing gas at 10 ppm or more, 1% or more, The process should be carried out in an atmosphere containing 10% or more of the substance. For example, heat treatment should be performed in a mixed atmosphere of nitrogen and oxygen gas. In this case, the oxygen gas concentration should be around 20%. Also, the heat treatment can be performed under reduced pressure. Alternatively, the heat treatment may involve heating in a nitrogen or inert gas atmosphere followed by desorption. An atmosphere containing oxidizing gas at a concentration of 10 ppm or more, 1% or more, or 10% or more to replenish the oxygen. Heat treatment may be performed in an open atmosphere.

[0313] Furthermore, it is preferable that the gas used in the above heat treatment is highly purified. For example, The amount of moisture contained in the gas used in the heat treatment described above is 1 ppb or less, preferably 0.1 ppb or less. More preferably, the level should be 0.05 ppb or less. Heat treatment using highly purified gas. By performing this process, moisture, etc., is removed from oxide film 230A, oxide film 230B, and oxide film 243A. This can prevent it from being absorbed as much as possible.

[0314] In this embodiment, the heat treatment is performed at a temperature of 550°C for 1 hour in a nitrogen atmosphere. After this, the process is carried out continuously in an oxygen atmosphere at a temperature of 550°C for 1 hour. According to the principle, water, hydrogen, etc. in oxide film 230A, oxide film 230B, and oxide film 243A This allows for the removal of impurities, etc. Furthermore, this heat treatment results in the oxide film 230B This improves the crystallinity and creates a denser, more compact structure. The diffusion of oxygen or impurities within the film 230B can be reduced.

[0315] Next, a conductive film 242A is deposited on the oxide film 243A (see Figures 13A to 13D). The conductive film 242A is deposited using sputtering, CVD, MBE, PLD, and ALD methods. This can be done using methods such as the first ionization sputtering method. For example, as the conductive film 242A, the first ionization sputtering method Tantalum nitride can be deposited using the ring method. The resulting conductor can be a dense conductor with high film density and excellent oxidation resistance. Therefore, it is preferable. Furthermore, a heat treatment may be performed before the formation of the conductive film 242A. The process is carried out under reduced pressure, and the conductive film 242A can be deposited continuously without exposure to the atmosphere. i. By performing this process, the moisture adsorbed on the surface of the oxide film 243A can be removed. And hydrogen is removed, and further in oxide film 230A, oxide film 230B, and oxide film 243A The moisture and hydrogen concentrations can be reduced. The heat treatment temperature is 100°C or higher. A temperature of 400°C or lower is preferred. In this embodiment, the heat treatment temperature is set to 200°C.

[0316] Next, an insulating film 271A is deposited on the conductive film 242A (see Figures 13A to 13D). The insulating film 271A is deposited by sputtering, CVD, MBE, PLD, or A This can be done using methods such as the LD method. The insulating film 271A has a function to suppress oxygen permeation. It is preferable to use an insulating film having sputtering. For example, as insulating film 271A, sputtering An insulator that can be used on the insulator 222 can be deposited by the method or the ALD method. .

[0317] Next, a conductive film 248A is deposited on the insulating film 271A (see Figure 13A to Figure 13D). The conductive film 248A is deposited by sputtering, CVD, MBE, PLD, or A This can be done using methods such as the LD method. Conductive film 248A is, for example, the same as conductive film 242A. A conductive film of a certain type should be used.

[0318] In this embodiment, the conductive film 242A, insulating film 271A, and conductive film 248A are as follows: By sputtering, the conductive film 242A is made of tantalum nitride, and the insulating film 271A is made of aluminum oxide. Luminium is deposited as the base layer, and tantalum nitride is deposited as the conductive film 248A.

[0319] Furthermore, conductive film 242A, insulating film 271A, and conductive film 248A are exposed to the atmospheric environment. It is preferable to continuously deposit the film under reduced pressure without opening to the atmosphere. Impurities or moisture from the atmospheric environment are deposited on 242A, insulating film 271A, and conductive film 248A. This prevents adhesion, and the interface between the conductive film 242A and the insulating film 271A and the interface The interface between the insulating film 271A and the conductive film 248A, as well as the vicinity of the interface, can be kept clean. Therefore, it is preferable. For example, a multi-chamber type film deposition apparatus can be used. Continuous film deposition is This is preferable because it makes it possible to shorten the manufacturing process time for semiconductor devices.

[0320] Next, using lithography, oxide film 230A, oxide film 230B, and oxide film 243A were obtained. The conductive film 242A, insulating film 271A, and conductive film 248A are processed into island shapes, and oxide 2 30a, oxide 230b, oxide layer 243B, conductive layer 242B, insulating layer 271B, and A conductive layer 248 is formed (see Figures 14A to 14D). Furthermore, this process is performed using dry etching. The etching method and the wet etching method can be used. Processing by the dry etching method. It is suitable for microfabrication. Also, oxide film 230A, oxide film 230B, oxide film 243A, conductor The processing of the dielectric film 242A, the insulating film 271A, and the conductive film 248A was carried out under different conditions. Processing may be performed. Note that in this process, the oxide 230a of the insulator 224 must not overlap. The film thickness in that region may become thinner.

[0321] In lithography, the resist is first exposed through a mask. The selected area is removed or left intact using a developer to form a resist mask. Next, By etching through the resist mask, conductors, semiconductors, or insulators can be etched. These can be processed into desired shapes. For example, KrF excimer laser light, ArF excimer laser light Using sima laser light, EUV (Extreme Ultraviolet) light, etc., A resist mask can be formed by exposing the dyst. Also, the relationship between the substrate and the projection lens An immersion technique may be used, in which a liquid (e.g., water) is filled in between and then exposed. Alternatively, the aforementioned light Alternatively, electron beams or ion beams may be used. When using this method, a mask is not required. Note that a resist mask is used in processes such as ashing. After performing dry etching, wet etching, and dry etching Perform wet etching, or dry etching after wet etching. It can be removed by performing the necessary procedures.

[0322] Furthermore, a hard mask made of an insulator or conductor may be used beneath the resist mask. When using a hard mask, an insulating film or conductive film that will serve as the hard mask material will be placed on the conductive film 242A. By forming a hard mask, then forming a resist mask on top of it, and etching the hard mask material... A hard mask of the desired shape can be formed. Etching of conductive film 242A, etc. You can either remove the resist mask before proceeding, or you can proceed with the resist mask still in place. Good. In the latter case, the resist mask may disappear during etching. Conductive film 242 After etching A, the hard mask may be removed by etching. If the mask material does not affect subsequent processes, or can be used in subsequent processes, then it is not necessarily hard. There is no need to remove the mask. In this embodiment, the insulating layer 271B and the conductive layer 248 Use this as a hard mask.

[0323] Here, the insulating layer 271B and the conductive layer 248 function as masks for the conductive layer 242B. Therefore, as shown in Figures 14B to 14D, the conductive layer 242B has a curved surface between the side and the top surface. It does not have conductors 242a and conductors 242 shown in Figures 5B and 5D. b has a corner-shaped end where the side and top surfaces meet. The end where the side and top surfaces of the conductor 242 meet is By becoming angular, the cross-sectional area of ​​the conductor 242 is larger compared to when the end has a curved surface. This reduces the resistance of conductor 242, thus turning on transistor 200. The current can be increased.

[0324] Also, oxide 230a, oxide 230b, oxide layer 243B, conductive layer 242B, insulating layer 271B and the conductive layer 248 are formed such that at least a portion of them overlaps with the conductor 205. Also, oxide 230a, oxide 230b, oxide layer 243B, conductive layer 242B, insulating The sides of layer 271B and the conductive layer 248 are approximately perpendicular to the top surface of the insulator 222. Preferably, oxide 230a, oxide 230b, oxide layer 243B, conductive layer 242B The sides of the insulating layer 271B and the conductive layer 248 are approximately perpendicular to the upper surface of the insulator 222. This makes it possible to reduce the area and increase the density when providing multiple transistors 200. Alternatively, oxide 230a, oxide 230b, oxide layer 243B, conductive layer 242B, insulating The angle between the edge layer 271B and the side surface of the conductive layer 248 and the upper surface of the insulator 222 is low. The configuration may be as follows: oxide 230a, oxide 230b, oxide layer 243 B, the conductive layer 242B, the insulating layer 271B, and the sides of the conductive layer 248, and on the insulator 222 The angle with the surface is preferably 60 degrees or more and less than 70 degrees. By adopting such a shape, In subsequent processes, the coating properties of the insulator 272 and other materials are improved, reducing defects such as porosity. can.

[0325] Next, the conductive layer 248 is removed. Dry etching is used to remove the conductive layer 248. (See Figures 15A to 15D).

[0326] Next, insulator 224, oxide 230a, oxide 230b, oxide layer 243B, conductive layer 2 An insulator 272 is formed on 42B and the insulating layer 271B (Figures 16A to 16D (See reference). The deposition of insulator 272 is performed by sputtering, CVD, MBE, PLD, A This can be done using methods such as the LD method. In this embodiment, the insulator 272 is a spade Aluminum oxide is deposited using the taring method. In particular, insulator 272 is biased It is preferable to deposit the film using the puttering method. In the bias sputtering method, applied to the substrate Depending on the magnitude of the RF power, the amount of oxygen injected into the insulator 224 that forms the base of the insulator 272 is determined. The quantity can be controlled. For example, the RF power can be 0.31 W / cm². 2 That's all good The current level is 0.62 W / cm². 2 More preferably 1.86 W / cm² 2 The above biases The RF power applied to the substrate is sufficient. In other words, the RF power used during the formation of the insulator 272 causes the transistor to... The amount of oxygen injected can be varied to suit the characteristics of the transistor. It is possible to inject an amount of oxygen suitable for improving reliability. The RF frequency is 10MHz. The above is preferable. Typically, it is 13.56 MHz. The higher the RF frequency, the better the substrate It can reduce the damage dealt.

[0327] As described above, the insulator 272 has the function of injecting oxygen into the underlying film, Body 272 itself has the function of suppressing oxygen permeation. Therefore, in a later process, the insulator 27 When an insulator 280 is formed on 2 and oxygen is diffused from the insulator 280, the insulator 280 From there, oxide 230a, oxide 230b, oxide layer 243B, and conductive layer 242B, This prevents oxygen from diffusing directly.

[0328] Next, an insulating film, which will become an insulator 280, is formed on the insulators 224 and 272. Insulating film deposition is carried out using methods such as sputtering, CVD, MBE, PLD, and ALD. This can be done by sputtering. For example, as the insulating film, silica oxide can be used A film is formed, and then a silicon oxide film is formed on top of it using the PEALD method or the thermal ALD method. This should be done. Furthermore, the insulating film is deposited using a gas in which hydrogen atoms have been reduced or removed. It is preferable to form the film using this method. This makes it possible to reduce the hydrogen concentration of the insulator 280. It is possible. Furthermore, a heat treatment may be performed before the deposition of the insulating film. The heat treatment should be performed under reduced pressure. The insulating film may be deposited continuously without exposure to the atmosphere. By doing so, moisture and water adsorbed on the surfaces of the insulator 224 and insulator 272 can be removed. The element is removed, and further oxide 230a, oxide 230b, oxide layer 243B, and insulator The water and hydrogen concentrations in 224 can be reduced. The heat treatment described above The following heat treatment conditions can be used.

[0329] Next, the insulating film is subjected to CMP treatment to form an insulator 280 with a flat top surface (Figure 17). (See A to Figure 17D). In addition, similar to the insulator 224, for example, spa Aluminum oxide is deposited by the tarring method, and the aluminum oxide is used as an insulator 280 CMP may be performed until it reaches [a certain value].

[0330] Microwave treatment may be performed here. Microwave treatment is performed in an oxygen-containing atmosphere. It is preferable to perform the process under reduced pressure. By performing microwave processing, the microwaves The electric field is applied to the insulator 280, oxide 230b, oxide 230a, etc. b, and V in oxide 230a O H is oxygen-deficient (V O ) and hydrogen (H) can be separated. Yes, it is possible. At this time, some of the hydrogen that is separated combines with the oxygen contained in the insulator 280 to form water molecules. It may be removed as follows. Also, some of the hydrogen is absorbed by the insulator 272 and the insulating layer 271 The conductor 242 may be gettered via B.

[0331] Alternatively, heat treatment may be performed while maintaining a reduced pressure state after microwave treatment. By performing this treatment, hydrogen in the insulator 280, oxide 230b, and oxide 230a is removed. It can efficiently remove [unclear / unclear]. The heat treatment temperature is between 300°C and 500°C. It is preferable to do so.

[0332] Furthermore, by performing microwave treatment, the film quality of the insulator 280 is modified, and hydrogen Therefore, the diffusion of water, impurities, etc. can be suppressed after the formation of the insulator 280. Subsequent processes, such as heat treatment, allow hydrogen, water, and impurities to enter through the insulator 280, which can lead to acid This can suppress the diffusion to the monster 230.

[0333] Next, a portion of the insulator 280, a portion of the insulator 272, a portion of the insulating layer 271B, and the conductive layer 24 Part of 2B, part of oxide layer 243B, and part of oxide 230b are processed to obtain oxide 230 An opening is formed that reaches b. It is preferable that this opening be formed so as to overlap with the conductor 205. It is clear that the formation of the opening allows the insulator 271a, insulator 271b, and conductor 242a to be separated. Conductor 242b, oxide 243a, and oxide 243b are formed (Figures 18A to 1 (see 8D).

[0334] When forming the above opening, the upper part of oxide 230b is removed. By removing it, grooves are formed in the oxide 230b. Depending on the depth of these grooves, The groove may be formed in the opening formation step described above, or in a step different from the opening formation step described above. It may be formed as follows.

[0335] Also, a portion of the insulator 280, a portion of the insulator 272, a portion of the insulating layer 271B, and the conductive layer 24 Processing of part of 2B, part of oxide layer 243B, and part of oxide 230b is performed by dryer. The etching method or the wet etching method can be used. This type of machining is suitable for micro-machining. Furthermore, this machining can be performed under different conditions. Good. For example, a portion of the insulator 280 is processed by a dry etching method, and a portion of the insulator 272 is processed. A portion of the insulating layer 271B was processed by a wet etching method, and a portion of the oxide layer 243B was processed by a conductive A portion of the electrode layer 242B and a portion of the oxide 230b may be processed by dry etching. i. Also, processing of a portion of the oxide layer 243B and a portion of the conductive layer 242B, and oxide 230 The processing in part of b may be carried out under different conditions.

[0336] Here, a portion of oxide 230b is removed using a dry etching method to form grooves. In doing so, it is preferable to process with a strong bias power. For example, the bias power is The force density is 0.02 W / cm². 2 The above should suffice, resulting in 0.03 W / cm². 2 It is better to do the above. It is 0.06 W / cm². 2 The above is preferable. Also, dry etching treatment The time should be set appropriately according to the depth of the groove.

[0337] Here, impurities such as oxide 230a and oxide 230b that are attached to the surface or diffused into the interior are considered. It is preferable to remove the material formed on the oxide 230b surface by the above dry etching. It is preferable to remove the damaged area. The impurities include insulator 280, insulating Components contained in part of body 272, part of insulating layer 271B and conductive layer 242B, and the above opening Components contained in the materials used in the equipment used to form the product, and the materials used for etching. Examples include those caused by components contained in the gas or liquid. Examples include aluminum, silicon, tantalum, fluorine, and chlorine.

[0338] In particular, impurities such as aluminum or silicon contribute to oxide 230b, or later It inhibits the CAAC-OS formation of oxide 230c during the process. Therefore, aluminum, Alternatively, impurity elements that inhibit CAAC-OS formation, such as silicon, are reduced or removed. It is preferable that the interface between oxide 230b and oxide 230c, and its vicinity, be such as the interface between oxide 230b and oxide 230c. The concentration of aluminum atoms in the vicinity should be 5.0 atomic percent or less, and 2.0 atomic percent The following are preferred, more preferably 1.5 atomic% or less, and even more preferably 1.0 atomic% or less. A percentage of less than 0.3 atomic percent is even more preferable.

[0339] Furthermore, impurities such as aluminum or silicon can inhibit the formation of CAAC-OS. , pseudo-amorphous oxide semiconductor (a-like OS: amorphous-like ox The region of the metal oxide that has become an ide semiconductor is considered a non-CAAC region. It may be called that. In the non-CAAC region, the density of the crystal structure is reduced, so V O H It forms in large quantities, making it easier for transistors to become normally-on. Therefore, oxide 230 b, and the non-CAAC region of oxide 230c are preferably reduced or removed. It's nice.

[0340] In contrast, oxides 230b and 230c have a layered CAAC structure. It is preferable to extend the C to the lower end of the drain of oxide 230b and oxide 230c. It is preferable that an AAC structure is formed. Here, in transistor 200, conductor 242a or conductor 242b, and its vicinity, function as a drain. Near the lower end of the electric body 242a (conductor 242b), oxide 230b and oxide 230 It is preferable that one or both of c have a CAAC structure. Even at the drain end, which significantly affects rain pressure resistance, the damaged area of ​​oxide 230b was removed. Furthermore, the CAAC structure further suppresses fluctuations in the electrical characteristics of transistor 200. This can be done. Furthermore, the reliability of transistor 200 can be improved.

[0341] To remove the above-mentioned impurities, a cleaning process is performed. The cleaning method involves using a cleaning solution, etc. These include wet cleaning, plasma treatment using plasma, and cleaning by heat treatment. The cleaning process may be combined as appropriate. Note that this cleaning process will deepen the grooves. This can happen.

[0342] For wet cleaning, use ammonia water, oxalic acid, phosphoric acid, hydrofluoric acid, etc., with carbonated water. Alternatively, the cleaning process may be carried out using an aqueous solution diluted with pure water, pure water, carbonated water, etc. Ultrasonic cleaning may be performed using these aqueous solutions, pure water, or carbonated water. Alternatively, These cleaning methods may be combined as appropriate.

[0343] In this specification, etc., an aqueous solution obtained by diluting commercially available hydrofluoric acid with pure water is referred to as diluted hydrofluoric acid. It is called an acid, and a solution obtained by diluting commercially available ammonia water with pure water is sometimes called diluted ammonia water. Yes. Furthermore, the concentration and temperature of the aqueous solution depend on the impurities to be removed and the semiconductor device being cleaned. The composition should be adjusted as appropriate. The ammonia concentration of the diluted ammonia solution should be 0.0 The concentration should be between 1% and 5%, preferably between 0.1% and 0.5%. The hydrogen fluoride concentration of the hydrochloric acid is 0.01 ppm to 100 ppm, preferably 0.1 ppm. It should be between 10 ppm and 10 ppm.

[0344] For ultrasonic cleaning, a frequency of 200 kHz or higher, preferably 900 kHz or higher, is used. It is preferable to have this. By using this frequency, damage to oxides such as 230b is reduced. It can be reduced.

[0345] Furthermore, the above cleaning process may be performed multiple times, and the cleaning solution may be changed each time the cleaning process is performed. Example For example, the first cleaning treatment involves using diluted hydrofluoric acid or diluted ammonia water. In addition, a second washing treatment using pure water or carbonated water may be performed.

[0346] In this embodiment, as the above cleaning process, wet cleaning is performed using diluted hydrofluoric acid. Next, wet cleaning is performed using purified water or carbonated water. Removes impurities such as oxide 230a and oxide 230b that are attached to the surface or diffused into the interior. Furthermore, the crystallinity of the oxide 230c formed on the oxide 230b can be improved. It is possible to do so.

[0347] Previously, processing such as dry etching or the above-mentioned cleaning treatment overlapped with the above-mentioned opening. Furthermore, the thickness of the insulator 224 in the region that does not overlap with the oxide 230b and the insulator 272 is In some cases, the thickness of the insulator 224 may be thinner in the region overlapping with oxide 230b.

[0348] Heat treatment may be performed after the etching or cleaning described above. The heat treatment is 100 The heating process should be carried out at a temperature between 450°C and 450°C, preferably between 350°C and 400°C. The procedure involves an atmosphere of nitrogen gas or an inert gas, or an oxidizing gas at a concentration of 10 ppm or more, or 1%. The procedure should be carried out in an atmosphere containing the above amount, or 10% or more. For example, heat treatment should be performed in an oxygen atmosphere. This is preferable. This supplies oxygen to oxide 230a and oxide 230b, and oxygen V missing O This can reduce oxide 23. The crystallinity of 0b is improved, and the crystallinity of oxide 230c formed in the grooves of oxide 230b is also improved. It can be improved. Also, the heat treatment may be carried out under reduced pressure. Alternatively, in an oxygen atmosphere After heat treatment with gas, continuous heat treatment in a nitrogen atmosphere may be performed without exposure to the atmosphere. .

[0349] Next, the oxide film 230C is formed (see Figures 19A to 19D). A heat treatment may be performed before film formation, and this heat treatment should be carried out under reduced pressure and without exposure to the atmosphere. Furthermore, it is preferable to continuously form an oxide film 230C. In addition, this heat treatment is performed using oxygen. It is preferable to carry out the process in an atmosphere containing oxide 230b. It removes moisture and hydrogen adsorbed on the surface, and further removes oxide 230a and oxide The water and hydrogen concentrations in 230b can be reduced. The heat treatment temperature is 1 A temperature of 00°C to 400°C is preferred. In this embodiment, the heat treatment temperature is set to 200°C. ru.

[0350] Here, the oxide film 230C is formed on the inner wall of the groove in the oxide 230b, A portion of the side of object 243, a portion of the side of conductor 242, a portion of the side of insulator 271, insulator It is provided so as to be in contact with a portion of the side surface of 272 and a portion of the side surface of the insulator 280. Preferred. Conductor 242 is oxide 243, insulator 272, insulator 271 and oxide film 2 Being surrounded by 30C prevents the decrease in conductivity due to oxidation of conductor 242 in subsequent processes. It can be suppressed.

[0351] The 230C oxide film can be deposited using sputtering, CVD, MBE, PLD, or ALD methods. This can be done using the following methods. Depending on the desired properties of the oxide film 230C, the oxide film 230 The oxide film 230C can be formed using the same film formation method as A or oxide film 230B. In this embodiment, the oxide film 230C is formed by sputtering using In:Ga: Oxide target with Zn=4:2:3 [atomic ratio], In:Ga:Zn=5:1:3 [atomic ratio] Oxide targets with atomic ratio, In:Ga:Zn=10:1:3 [atomic ratio] oxide targets The film is deposited using a target or an indium oxide target.

[0352] During the deposition of oxide film 230C, some of the oxygen contained in the sputtering gas becomes oxide 230 a and oxide 230b may be supplied. Alternatively, during the formation of oxide film 230C, In some cases, some of the oxygen contained in the sputtering gas may be supplied to the insulator 280. Therefore, the proportion of oxygen in the sputtering gas of oxide film 230C is preferably 70% or more. It should be 80% or more, more preferably 100%. Also, if you add a lot of oxygen in this way... By forming an oxide film 230C in an atmosphere containing it, the oxide film 230C can be converted to CAAC-OS. It will decrease.

[0353] The deposition of the oxide film 230C is preferably carried out while heating the substrate. At this time, the substrate temperature By raising the temperature to 200°C or higher, oxygen vacancies in the oxide film 230C and oxide 230b are reduced. It can be reduced. By forming a film while heating the substrate, the oxide film 230C and oxide This can improve the crystallinity of 230b.

[0354] Next, an oxide film 230D is formed (see Figures 19A to 19D). The film formation process is preferably carried out continuously from the deposition of the oxide film 230C without exposure to the atmosphere. stomach.

[0355] The 230D oxide film can be deposited using sputtering, CVD, MBE, PLD, or ALD methods. This can be done using the following methods. Depending on the desired characteristics of the oxide film 230D, the oxide film 230 The oxide film 230D can be formed using the same film formation method as A or oxide film 230B. In this embodiment, the oxide film 230D is formed by sputtering using the In:Ga: The film is deposited using an oxide target with a Zn = 1:3:4 [atomic ratio].

[0356] During the deposition of oxide film 230D, some of the oxygen contained in the sputtering gas is deposited into oxide film 230 It may be supplied to C. Alternatively, when depositing oxide film 230D, it may be used as a sputtering gas. Some of the oxygen contained may be supplied to the insulator 280. Therefore, the oxide film 230 The proportion of oxygen in the sputtering gas D is 70% or more, preferably 80% or more. Preferably, it should be 100%.

[0357] Next, the insulating film 250A is deposited (see Figures 19A to 19D). Deposition of insulating film 250A A heat treatment may be performed beforehand, and this heat treatment should be carried out under reduced pressure and without exposure to the atmosphere. The insulating film 250A may be deposited continuously. Furthermore, the heat treatment may be carried out in an oxygen-containing atmosphere. It is preferable to carry this out. By performing such a treatment, the surface of the oxide film 230C and other surfaces It removes the water and hydrogen adsorbed on it, and further removes oxide 230a, oxide 230b, and Furthermore, the moisture and hydrogen concentrations in the oxide film 230C can be reduced. The temperature is preferably between 100°C and 400°C.

[0358] Insulating film 250A can be produced using methods such as sputtering, CVD, MBE, PLD, and ALD. It can be formed using [a specific method]. In addition, the insulating film 250A has reduced or removed hydrogen atoms. It is preferable to deposit the film using a film deposition method that utilizes a gas. This allows the water in the insulating film 250A to be deposited. The elemental concentration can be reduced. The insulating film 250A comes into contact with the oxide 230d in a later process. Since it becomes an insulator 250, it is preferable that the hydrogen concentration is reduced in this way.

[0359] Furthermore, when the insulator 250 has a two-layer laminated structure, the insulating film that is the lower layer of the insulator 250 The insulating film that forms the upper layer of the insulator 250 can be continuously deposited without exposure to the atmospheric environment. Preferably. By forming the film without opening to the atmosphere, an insulating film that becomes the lower layer of the insulator 250, and an insulating film that becomes the lower layer of the insulator 250, and This prevents impurities or moisture from the atmospheric environment from adhering to the insulating film that forms the upper layer of the edge body 250. This allows for the insulating film that forms the lower layer of the insulator 250 and the insulating film that forms the upper layer of the insulator 250 to be separated. The vicinity of the interface can be kept clean.

[0360] Here, after the insulating film 250A is formed, the microphone is subjected to an oxygen-containing atmosphere and under reduced pressure. Microwave processing may be performed. By performing microwave processing, the electric field due to microwaves is eliminated. Edge film 250A, oxide film 230D, oxide film 230C, oxide 230b, oxide 230a, etc. Provided in oxide film 230D, oxide film 230C, oxide 230b, and oxide 2 V in 30a O H to V O It can be separated into hydrogen and hydrogen. At this time, part of the separated hydrogen It combines with oxygen to form H2O, forming insulating film 250A, oxide film 230D, oxide film 230C, It may be removed from oxide 230b and oxide 230a. Also, some of the hydrogen When gettering occurs in the conductor 242 (conductor 242a and conductor 242b) Yes. In this way, by performing microwave processing, the insulating film 250A and the oxide film 230D , reducing the hydrogen concentration in oxide film 230C, oxide 230b, and oxide 230a. It is possible. Also, in oxide 230a, in oxide 230b, in oxide film 230C, and V in oxide film 230D O H to V O V that can exist after being separated into hydrogen O Oxygen is supplied to it newV O It can be repaired or compensated for.

[0361] Alternatively, heat treatment may be performed while maintaining a reduced pressure state after microwave treatment. By performing this treatment, oxidation occurs in the insulating film 250A, the oxide film 230D, and the oxide film 230C. Hydrogen can be efficiently removed from substance 230b and oxide 230a. Furthermore, Some of the hydrogen is gettered into conductor 242 (conductors 242a and 242b). In some cases, this may be done. Alternatively, heat treatment may be performed while maintaining a reduced pressure state after microwave treatment. Step 2 may be repeated multiple times. By repeatedly performing the heat treatment, the insulating film 2 In 50A, in oxide film 230D, in oxide film 230C, in oxide 230b, and in oxide 23 This allows for even more efficient removal of hydrogen from 0a. The heat treatment temperature is 300°C. It is preferable to keep the temperature below 500°C.

[0362] Furthermore, by performing microwave processing, the film quality of the insulating film 250A is modified, water The diffusion of elements, water, impurities, etc. can be suppressed. Therefore, the conductive film that becomes the conductor 260 Hydrogen and water are introduced through post-processing such as film formation or heat treatment via the insulator 250. This suppresses the diffusion of impurities into oxide 230b, oxide 230a, etc. Cut.

[0363] Next, conductive film 260A and conductive film 260B are deposited in sequence (see Figures 20A to 20D). The conductive films 260A and 260B were deposited using sputtering, CVD, and MBE. This can be done using methods such as the PLD method and the ALD method. In this embodiment, the ALD method is used. Using this method, a conductive film 260A was deposited, and under reduced pressure without opening to the atmosphere, the CVD method was continuously applied. Then, a conductive film 260B is formed.

[0364] Next, CMP treatment is performed to create oxide film 230C, oxide film 230D, insulating film 250A, and conductive film. By polishing film 260A and conductive film 260B until the insulator 280 is exposed , oxide 230c, oxide 230d, insulator 250, and conductor 260 (conductor 260 a) and conductor 260b) are formed (see Figures 21A to 21D). This allows acid The oxide 230c has openings that reach oxide 230b and inner walls (sides) of grooves in oxide 230b. It is positioned to cover the bottom surface, and the sides. In addition, oxide 230d is positioned over oxide 230c. The insulator 250 is positioned to cover the inner walls of the opening and groove. The oxide 230d is arranged to cover the inner walls of the opening and the groove. The conductor 260 is connected to the oxide 230c, oxide 230d, and insulator 250. It is positioned to fill the opening and the groove.

[0365] Next, a heat treatment may be performed under the same conditions as the heat treatment described above. In this embodiment, nitrogen The process is carried out at a temperature of 400°C for 1 hour in a plain atmosphere. This heat treatment causes the insulator 250 Furthermore, the moisture and hydrogen concentrations in the insulator 280 can be reduced. After heat treatment, the insulator 282 may be deposited continuously without exposure to the atmosphere.

[0366] Next, on oxide 230d, on oxide 230c, on insulator 250, on conductor 260, and An insulator 282 is formed on the insulator 280 (see Figures 22A to 22D). Insulator 2 The film deposition of 82 was carried out using sputtering, CVD, MBE, PLD, ALD, etc. This can be done by oxidizing the insulator 282, for example by sputtering. It is preferable to deposit an aluminum film using a sputtering method in an oxygen-containing atmosphere. By forming the insulator 282, oxygen is added to the insulator 280 while the film is being formed. This can be done. This makes it possible to include excess oxygen in the insulator 280. At this time, the base It is preferable to form the insulator 282 while heating the plate. Also, on the conductor 260 By forming an insulator 282 in contact with the surface, the insulator 280 will be in contact with the surface during the subsequent heat treatment. This is preferable because it can suppress the absorption of oxygen present in the material into the conductor 260.

[0367] Next, a portion of insulator 282, a portion of insulator 280, a portion of insulator 272, and insulator 224 A portion of the insulator 222, a portion of the insulator 216, and a portion of the insulator 214 are processed. This forms an opening that reaches the insulator 212 (see Figures 23A to 23D). The opening is The transistor 200 may be formed to surround the opening. Alternatively, the opening may be formed to surround multiple The lunger 200 may be formed to surround it. Therefore, in the opening, A portion of the side surface of the edge body 282, a portion of the side surface of the insulator 280, a portion of the side surface of the insulator 272, insulation A portion of the side of body 224, a portion of the side of insulator 222, a portion of the side of insulator 216, and A portion of the side surface of the insulator 214 is exposed.

[0368] Part of insulator 282, part of insulator 280, part of insulator 272, part of insulator 224 The processing of a portion of insulator 222, a portion of insulator 216, and a portion of insulator 214 is carried out by a drill. Dry etching or wet etching can be used. The machining method is suitable for micro-machining. Furthermore, the machining can be performed under different conditions. That's fine.

[0369] Next, insulator 282, insulator 280, insulator 224, insulator 222, insulator 216, The insulator 283 is formed by covering the insulator 214 (see Figures 24A to 24D). The edge body 283 is deposited using sputtering, CVD, MBE, PLD, or ALD. This can be done using methods such as sputtering. In this embodiment, nitriding is performed using the sputtering method. A silicon film is formed. As shown in Figures 24B to 24D, the insulator 283 is the opening At the bottom surface, it is in contact with the insulator 212. In other words, the top and sides of the transistor 200 are The bottom surface of the insulator 283 is enclosed by the insulator 212. In this way, barrier properties By encasing the transistor 200 in highly insulating materials 283 and 212, externally... This prevents moisture and hydrogen from entering.

[0370] Next, an insulating film that will become an insulator 274 is formed on the insulator 283. The edge film is deposited using methods such as sputtering, CVD, MBE, PLD, or ALD. This can be done using [a specific method]. For example, silicon oxide can be deposited using the CVD method. Furthermore, the insulating film that becomes the insulator 274 is made using a gas in which the hydrogen atoms described above have been reduced or removed. It is preferable to form the film using a film formation method. This results in a higher hydrogen concentration of the insulating film that becomes the insulator 274. The degree can be reduced.

[0371] Next, the insulating film that will become the insulator 274 is subjected to CMP treatment, and the insulator 274 with a flat top surface is formed. Form (see Figures 25A to 25D).

[0372] Next, insulator 271, insulator 272, insulator 280, insulator 282, and insulator 28 3. An opening is formed that reaches the conductor 242 (see Figures 26A to 26D). The formation can be performed using lithography. Note that in Figure 26A, the shape of the opening is as follows: While the opening is circular in surface view, it is not limited to this. For example, if the opening is circular, In a top view, approximately circular shapes such as ellipses, polygonal shapes such as quadrilaterals, and the corners of polygonal shapes such as quadrilaterals It may be in a rolled-up shape.

[0373] Next, an insulating film to become an insulator 241 is formed, and the insulating film is anisotropically etched to form an insulator. Form 241 (see Figure 26B). The insulating film that will become the insulator 241 is deposited by sputtering. This can be done using methods such as the kerning method, CVD method, MBE method, PLD method, or ALD method. As the insulating film that will become the insulator 241, an insulating film having the function of suppressing oxygen permeation is used. It is preferable to do so. For example, it is preferable to deposit aluminum oxide using the ALD method. Alternatively, it is preferable to deposit silicon nitride using the PEALD method. Recon is preferable because it has high blocking properties for hydrogen.

[0374] Furthermore, as an anisotropic etching of the insulating film that becomes the insulator 241, for example, dry etching Methods such as the G method can be used. By providing an insulator 241 on the side of the opening, oxygen from the outside can be blocked. To suppress transmission and prevent oxidation of the conductors 240a and 240b that are to be formed next. This can be done. Also, impurities such as water and hydrogen can be removed from conductors 240a and 240b. This can prevent it from spreading to other parts of the body.

[0375] Next, a conductive film that will become conductor 240 is formed. The conductive film that will become conductor 240 is made of water and hydrogen It is desirable to have a laminated structure that includes a conductor that has the function of suppressing the transmission of impurities. When the conductive film that becomes the conductor 240 is made into a laminated structure, the lower layer film may be, for example, tung nitride. Tal, titanium nitride, etc. can be used as the upper layer film. Ten, molybdenum, copper, etc. can be used. The deposition of the conductive film that will become the conductor 240 is as follows: This is done using methods such as sputtering, CVD, MBE, PLD, or ALD. It is possible.

[0376] In particular, the deposition of the underlying conductive film that becomes conductor 240 is carried out using a second ionization sputtering method. It is preferable to use this method. By forming the film using the second ionization sputtering method... This allows for uniform film formation on the bottom and sides of the opening.

[0377] By uniformly forming a conductive film beneath the conductive film that will become the conductor 240, the conductive film that will become the conductor 240 The lower layer is preferable because it functions well as a seed layer for the upper layer of the conductive film that will become the conductor 240. stomach.

[0378] Next, by performing CMP treatment, the conductive films that become conductor 240a and conductor 240b are formed. A portion is removed, exposing the upper surfaces of insulators 283 and 274. As a result, only the opening remains. The remaining conductive film forms conductors 240a and 240b with flat upper surfaces. This can be achieved (see Figure 26B). Furthermore, this CMP treatment can be performed on the insulator 283. A portion of the surface and a portion of the upper surface of the insulator 274 may be removed.

[0379] Next, a conductive film that will become conductor 246 is formed. The formation of the conductive film that will become conductor 246 is performed by This can be done using methods such as puttering, CVD, MBE, PLD, or ALD. can.

[0380] Next, a conductive film to become conductor 246 is processed by lithography, resulting in conductor 240a. The conductor 246a that is in contact with the upper surface of the conductor 240b, and the conductor 246b that is in contact with the upper surface of the conductor 240b Form (see Figures 27A and 27B). At this time, although not shown, the conductor 246a In the region where the conductor 246b and the insulator 283 do not overlap, a portion of the insulator 283 is removed. It can happen.

[0381] Next, an insulating film 286 is formed on the conductive material 246 and the insulating material 283 (Figure 5B). (See Figure 5D.) The insulator 286 was deposited by sputtering, CVD, MBE, and P This can be done using methods such as the LD method or ALD method. In addition, the insulator 286 is multilayered. For example, silicon nitride may be deposited using a sputtering method, and the silicon nitride A silicon nitride film may be deposited on the surface using the CVD method.

[0382] Based on the above, a semiconductor device having the transistor 200 shown in Figures 5A to 5D is fabricated. This is possible. As shown in Figures 13A to 27D, the semiconductor device shown in this embodiment By using the fabrication method, transistor 200 can be manufactured. Note that Figure 1A When fabricating a semiconductor device having the transistor 200 shown in Figure 1D, see Figures 23 to Figure 1D. The semiconductor device can be manufactured without performing the steps shown in 25.

[0383] <Examples of semiconductor device applications> In the following sections, using Figures 28A and 28B, we will explain the above <Example of Semiconductor Device Configuration> and the above A transistor 2 according to one aspect of the present invention, which differs from the one shown in <Modification of Semiconductor Device>. An example of a semiconductor device having 00 will be described. Note that this is shown in Figures 28A and 28B. In semiconductor devices, the semiconductor device shown in <Example of Semiconductor Device Configuration> (see Figures 1A to 1D) Structures that have the same function as the structure constituting the (illumination) shall be denoted with the same reference numeral. Regarding the constituent materials of transistor 200, please refer to <Example of semiconductor device configuration> and <Semiconductor equipment The materials described in detail in Modification Example 3 can be used.

[0384] Figures 28A and 28B show multiple transistors 200_1 to 200_ The configuration in which n is enclosed and sealed by insulators 283 and 212 is shown. Note: Figure 2 In 8A and Figure 28B, transistors 200_1 to 200_n are, They appear to be aligned along the channel length, but this is not the only arrangement. Transition The transistors 200_1 through 200_n may be arranged in the channel width direction, They may be arranged in a matrix. Alternatively, they may be arranged without any regularity, depending on the design. It's fine if you do that.

[0385] As shown in Figure 28A, multiple transistors 200_1 to 200_n On the outside, the portion where the insulator 283 and the insulator 212 are in contact (hereinafter referred to as the sealing portion 265) There is a combination.) is formed. The sealing portion 265 is formed by multiple transistors 200_1 to It is formed to surround the transistor 200_n. By using this structure, multiple The transistors 200_1 through 200_n are connected by insulators 283 and 212. It can be enclosed. Therefore, multiple transistor groups surrounded by the sealing portion 265 can be placed on the substrate. It will be established.

[0386] Also, a dicing line (scribe line, division line, or A cutting line may be provided. The above substrate is divided at the dicing line. Because it is disconnected, the group of transistors surrounded by the sealing portion 265 can be extracted as a single chip. It will become that.

[0387] Furthermore, in Figure 28A, multiple transistors 200_1 to 200_n are connected. An example of surrounding with two sealing portions 265 has been shown, but it is not limited to this. Figure 28B shows As shown, multiple transistors 200_1 to 200_n are connected to multiple sealing parts It may also be configured to enclose it. In Figure 28B, multiple transistors 200_1 or to The structure is such that the 200_n is surrounded by the sealing part 265a, and further surrounded by the outer sealing part 265b. Yes, they are.

[0388] In this way, multiple transistors 200_1 to transistor 200_ are enclosed in multiple sealing portions. By creating a configuration that surrounds n, the area where insulator 283 and insulator 212 are in contact increases, so The adhesion between the edge body 283 and the insulator 212 can be further improved. This makes it more reliable. In fact, multiple transistors 200_1 through 200_n can be sealed. .

[0389] In this case, even if a dicing line is provided overlapping the sealing portion 265a or the sealing portion 265b Alternatively, a dicing line may be provided between the sealing portion 265a and the sealing portion 265b.

[0390] According to one aspect of the present invention, a semiconductor device with less variation in transistor characteristics is provided. This can be achieved. Furthermore, according to one aspect of the present invention, a semiconductor device with good reliability can be provided. It is possible. Furthermore, according to one aspect of the present invention, a semiconductor device having good electrical characteristics can be provided. This is possible. Furthermore, according to one aspect of the present invention, a semiconductor device with a large on-current is provided. This is possible. Furthermore, according to one aspect of the present invention, a semiconductor device that can be miniaturized or highly integrated is provided. It can be provided. Furthermore, according to one aspect of the present invention, a low-power semiconductor device can be provided. It is possible.

[0391] The configurations and methods described in this embodiment are similar to those described in other embodiments and examples. It can be used in appropriate combination with other methods, etc.

[0392] (Embodiment 2) In this embodiment, one form of a semiconductor device will be described using Figures 29 to 33.

[0393] [Storage device 1] Figure 29 shows an example of a semiconductor device (memory device) according to one aspect of the present invention. The semiconductor device comprises transistor 200, transistor 300, and capacitive element 100. Transistor 200 is located above transistor 300, and capacitive element 100 is It is located above the transistor 300 and the transistor 200. As sta 200, the transistor 200 described in the previous embodiment can be used. .

[0394] Transistor 200 is a transistor in which a channel is formed in a semiconductor layer having an oxide semiconductor. It is a transistor. Transistor 200 is used in memory devices because it has a low off-current. This makes it possible to retain memory content for a long period of time. In other words, refresh Because it does not require any operation, or because the refresh operation is performed very infrequently, the memory Power consumption can be significantly reduced.

[0395] In the semiconductor device shown in Figure 29, wiring 1001 is connected to the source and electrical source of transistor 300. The wiring 1002 is electrically connected to the drain of transistor 300. Furthermore, wiring 1003 is electrically connected to either the source or the drain of transistor 200. The wiring 1004 is then electrically connected to the first gate of transistor 200, and the wiring 1 006 is electrically connected to the second gate of transistor 200. And, The gate of transistor 300, and the other of the source and drain of transistor 200, The wiring 1005 is electrically connected to one of the electrodes of the capacitance element 100, and the wiring 1005 is connected to the electrode of the capacitance element 100. It is electrically connected to the other side.

[0396] Furthermore, the memory device shown in Figure 29, when arranged in a matrix, allows the memory cell array to function as a matrix. It can be configured.

[0397] <Transistor 300> The transistor 300 is provided on the substrate 311 and has a conductor 316 that functions as a gate. , an insulator 315 that functions as a gate insulator, and a semiconductor region 31 which is part of the substrate 311 3, and a low-resistance region 314a that functions as a source region or drain region, and low It has a resistive region 314b. Transistor 300 is either a p-channel or n-channel type. Any type is acceptable.

[0398] Here, the transistor 300 shown in Figure 29 is in the semiconductor region 313 where the channel is formed. A portion of the substrate 311 has a convex shape. In addition, the side and top surfaces of the semiconductor region 313 are made of an insulating material. The conductive material 316 is provided so as to cover the edge 315. Materials that adjust the work function may be used. Such a transistor 300 is on a semiconductor substrate. It is also called a FIN-type transistor because it utilizes a protruding part. Furthermore, it may have an insulator that functions as a mask for forming the protrusion. This example shows a case where a protrusion is formed by processing a part of a semiconductor substrate, but when processing an SOI substrate... A semiconductor film having a convex shape may be formed.

[0399] Note that the transistor 300 shown in Figure 29 is just one example, and its structure is not limited to that example. A suitable transistor should be used depending on the configuration and driving method.

[0400] <Capacitive element 100> The capacitive element 100 is located above the transistor 200. The capacitive element 100 is the first A conductor 110 that functions as an electrode, a conductor 120 that functions as a second electrode, and It has an insulator 130 that functions as a dielectric. Here, the insulator 130 is in the form described above. It is preferable to use an insulator that can be used as the insulator 286 shown in the diagram.

[0401] Furthermore, for example, the conductor 112 and the conductor 110 provided on the conductor 246 are formed simultaneously. This is possible. Furthermore, the conductor 112 is connected to the capacitive element 100, the transistor 200, and It functions as a plug or wire that electrically connects to transistor 300.

[0402] In Figure 29, the conductors 112 and 110 are shown as single-layer structures, but this configuration is not limited to this example. It is not specified, and may be a laminated structure of two or more layers. For example, a conductor with barrier properties and a highly conductive material A conductor with barrier properties and a conductor with high conductivity are bonded to each other. A highly conductive material may be formed.

[0403] Furthermore, the insulator 130 may be, for example, silicon oxide, silicon oxide nitride, or silicon oxide nitride. Silicon nitride, aluminum oxide, aluminum oxide nitride, aluminum oxide nitride, nitrile Aluminum oxide, hafnium oxide, hafnium oxide nitride, hafnium oxide nitride, hafnium nitride It can be made using materials such as nium, and can be constructed in layers or as a single layer.

[0404] For example, the insulator 130 may contain a material with high dielectric strength, such as silicon oxynitride, and a high dielectric strength material. It is preferable to use a laminated structure with a high-k material. With this configuration, the capacity element Child 100 has a high dielectric constant (high-k) insulator, which ensures sufficient capacitance. By having an insulator with high dielectric strength, the dielectric strength is improved, and the electrostatic discharge of the capacitive element 100 is reduced. It can suppress damage.

[0405] Furthermore, as an insulator of high-dielectric constant (high-k) materials (materials with a high relative permittivity), Gallium, hafnium oxide, hafnium oxide and nitride, hafnium oxide and nitride, zirconium oxide Aluminium, an oxide containing aluminum and hafnium, an oxide containing aluminum and hafnium Nitrides containing aluminum and hafnium, silicon and ha Oxides containing hafnium, silicon and oxide nitrides containing hafnium, silicon and Examples include nitride oxides containing hafnium, silicon, and nitrides containing hafnium. .

[0406] On the other hand, materials with high dielectric strength (materials with low dielectric constant) include silicon oxide and nitrogen oxide. Silicon oxide, silicon nitride, silicon nitride, silicon oxide with added fluorine, carbon Silicon oxide with added carbon and nitrogen, silicon oxide with voids It may be made of concrete or resin.

[0407] <Wiring layer> Between each structure, there is a wiring layer containing interlayer membranes, wiring, and plugs. This is also possible. Furthermore, multiple wiring layers can be provided depending on the design. Here, the plug In the case of a conductor that functions as wiring, where multiple structures are grouped together and assigned the same code, There is a possibility of this occurring. Furthermore, in this specification, etc., the wiring and the plug that electrically connects to the wiring are integrated. It may also be an object. That is, when a part of the conductor functions as wiring, and the conductor Some parts may function as plugs.

[0408] For example, on transistor 300, there are insulators 320, 322, and an insulator as interlayer films. The edge body 324 and the insulator 326 are arranged in order in stacked layers. Also, the insulator 320, Insulators 322, 324, and 326 contain capacitive elements 100 or transients Conductors 328 and 330, etc., which are electrically connected to the sta 200, are embedded within. Furthermore, conductors 328 and 330 function as plugs or wiring.

[0409] Furthermore, the insulator, which functions as an interlayer film, acts as a planarizing film that covers the uneven shape beneath it. It may function. For example, the upper surface of the insulator 322 may be chemically and mechanically polished to improve flatness. The surface may be flattened by a flattening treatment such as the CMP method.

[0410] A wiring layer may be provided on the insulator 326 and the conductor 330. For example, as shown in Figure 29. Insulators 350, 352, and 354 are arranged in a stacked manner. Furthermore, a conductor 356 is formed on insulators 350, 352, and 354. Conductor 356 functions as a plug or wiring.

[0411] Similarly, insulators 210, 212, 214, and 216 are conductive Body 218 and the conductor (conductor 205) that constitutes the transistor 200 are embedded. It is present. Furthermore, the conductor 218 is electrically connected to the capacitive element 100 or the transistor 300. It functions as a connecting plug or wiring. Furthermore, the conductor 120 and the insulator An insulator 150 is provided above 130.

[0412] Here, similar to the insulator 241 shown in the above embodiment, a conductor 2 that functions as a plug An insulator 217 is provided in contact with the side surface of 18. The insulator 217 is in contact with the insulator 210, insulator 212, insulator 214, and insulator 216 are provided in contact with the inner wall of the opening formed therein. In other words, insulator 217 is connected to conductor 218, insulator 210, insulator 212, insulator It is provided between 214 and the insulator 216. Note that the conductor 205 is conductor 2 Since it can be formed in parallel with 18, the insulator 217 is in contact with the side surface of the conductor 205. It may also be formed.

[0413] Examples of insulators 217 include silicon nitride, aluminum oxide, or silicon nitride oxide. An insulator such as Ricon can be used. Insulator 217 is insulator 212, insulator 214, Since it is installed in contact with the insulator 222, water can enter from the insulator 210 or insulator 216, etc. Alternatively, it suppresses the incorporation of impurities such as hydrogen into the oxide 230 through the conductor 218. This is possible. In particular, silicon nitride is preferred because it has high blocking properties for hydrogen. Furthermore, oxygen contained in the insulator 210 or insulator 216 is absorbed by the conductor 218. This can prevent it.

[0414] The insulator 217 can be formed in the same manner as the insulator 241. For example, PEA A silicon nitride film is deposited using the LD method, and the conductive material 356 is reached using anisotropic etching. You just need to form an opening.

[0415] Insulators that can be used as interlayer films include insulating oxides, nitrides, and acids. Examples include nitrides, nitride oxides, metal oxides, metal oxide nitrides, and metal nitride oxides.

[0416] For example, by using a material with a low dielectric constant for the insulator that functions as an interlayer film, wiring The parasitic capacitance that occurs between them can be reduced. Therefore, depending on the function of the insulator, the material You should choose this option.

[0417] For example, insulators 150, 210, 352, and 354 have a ratio It is preferable to have an insulator with a low dielectric constant. For example, the insulator may be silicon nitride. , nitride silicon, fluorine-added silicon oxide, carbon-added silicon oxide, carbon and silicon oxide with nitrogen added, silicon oxide having voids, or resins, etc. This is preferable. Alternatively, the insulator may be silicon oxide, silicon oxide nitride, or silicon oxide nitride Cone, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, carbon Lamination of silicon oxide with added elements and nitrogen or porous silicon oxide with resin It is preferable that it has a structure. Silicon oxide and silicon oxide-nitride are thermally stable. Therefore, by combining it with resin, a thermally stable laminated structure with a low dielectric constant is achieved. This can be done. Examples of resins include polyester, polyolefin, and polyamide (nylon Examples include ramid, polyimide, polycarbonate, or acrylic.

[0418] Furthermore, transistors using oxide semiconductors suppress the permeation of impurities such as hydrogen and oxygen. By surrounding the transistor with an insulator that has a controlling function, the electrical characteristics of the transistor are stabilized. Therefore, hydrogen, etc. can be present in insulators 214, 212, and 350, etc. An insulator that has the function of suppressing the permeation of impurities and oxygen should be used.

[0419] Examples of insulators that have the function of suppressing the permeation of impurities such as hydrogen and oxygen include, Boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, salt Element, argon, gallium, germanium, yttrium, zirconium, lanthanum, neo An insulator containing zym, hafnium, or tantalum may be used in a single layer or in a multilayer configuration. Specifically, as an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen, Aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide Umium, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, or tan oxide Metal oxides such as tar, silicon nitride, or silicon nitride can be used. .

[0420] Conductors that can be used in wiring and plugs include aluminum, chromium, copper, and silver. Gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanilla Dium, niobium, manganese, magnesium, zirconium, beryllium, indium, Materials containing one or more metallic elements selected from thenium and others can be used. Semiconductors with high electrical conductivity, such as polycrystalline silicon containing impurity elements like nitrates, Silicides such as nickel silicide may also be used.

[0421] For example, conductor 328, conductor 330, conductor 356, conductor 218, and conductor 1 12, etc., are metal materials, alloy materials, metal nitride materials, or formed from the above materials. Conductive materials such as metal oxide materials can be used in a single layer or in a laminated form. Heat resistance and It is preferable to use high-melting-point materials such as tungsten or molybdenum that can achieve both conductivity and electrical conductivity. Tungsten is preferable. Alternatively, a low-resistance conductive material such as aluminum or copper may be used. It is preferable to form it with a material. By using a low-resistance conductive material, the wiring resistance can be reduced. It is possible.

[0422] <Wiring or plugs in layers containing oxide semiconductors> Furthermore, when an oxide semiconductor is used for transistor 200, excess near the oxide semiconductor An insulator having an oxygen region may be provided. In that case, the insulator having the excess oxygen region A barrier-type insulator is provided between the insulator having the excess oxygen region and the conductor. It is preferable to provide one.

[0423] For example, in Figure 29, insulators 224 and 280 have excess oxygen, and conductor 2 It is preferable to provide an insulator 241 between 40 and 40. Insulator 241, insulator 222, insulator 2 82, and the insulator 283 are provided in contact with each other, so that the insulator 224 and the transient The STA200 can be constructed to be sealed with a barrier-type insulator.

[0424] In other words, by providing the insulator 241, the excess insulation of the insulators 224 and 280 is eliminated. This can suppress the absorption of oxygen by the conductor 240. Also, the insulator 241 By having this, the impurity hydrogen diffuses to the transistor 200 via the conductor 240. This can suppress the action.

[0425] Furthermore, the insulator 241 is designed to suppress the diffusion of impurities such as water or hydrogen, and oxygen. It is preferable to use an insulating material that has the function of [doing something]. For example, silicon nitride, silicon nitride oxide, It is preferable to use aluminum oxide or hafnium oxide. In particular, silica nitride N is preferred because it has high blocking properties for hydrogen. In addition, other options include, for example, magnesium oxide. Nesium, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, acid Metal oxides such as lanthanum oxide, neodymium oxide, or tantalum oxide can be used. ru.

[0426] Furthermore, similar to the above embodiment, the transistor 200 is insulator 212, insulator 214 It is preferable that the insulators 282 and 283 are sealed. As a result, hydrogen contained in insulators 274 and 150 mixes with insulator 280 and the like. This can reduce the likelihood of this happening.

[0427] Here, the insulator 283 and insulator 282 have a conductor 240, and the insulator 214 has an insulating material. The body 212 and the insulator 210 are penetrated by the conductor 218, but as described above, the insulator The conductor 241 is provided in contact with the conductor 240, and the insulator 217 is provided in contact with the conductor 218. This allows the insulator 212 and the insulator to pass through the conductor 240 and the conductor 218. This reduces the amount of hydrogen that can be mixed inside insulators 214, 282, and 283. In this way, insulator 212, insulator 214, insulator 282, insulator 283, insulation The transistor 200 is more securely sealed with body 241 and insulator 217, and insulator 274 This can reduce the intrusion of impurities such as hydrogen contained in the material from the outside.

[0428] Also, insulators 216, 224, 280, 250, and 27 4 is a film deposition using a gas in which hydrogen atoms have been reduced or removed, as shown in the previous embodiment. It is preferable to form them by this method. This results in insulator 216, insulator 224, insulator 2 The hydrogen concentrations of 80, insulator 250, and insulator 274 can be reduced.

[0429] In this way, the hydrogen concentration of the silicon-based insulating film near transistor 200 is reduced, and acid The hydrogen concentration of compound 230 can be reduced.

[0430] <Dicing line> In the following, by dividing a large-area substrate into semiconductor elements, multiple semiconductor devices are created. Dicing lines (scribe lines, division lines) are provided when extracting chips. This explains the cutting line (which may also be called the cutting line). For example, the method of division is... First, grooves (dicing lines) are formed in the substrate to divide the semiconductor elements, In some cases, the semiconductor device may be cut during grinding, resulting in its division into multiple semiconductor devices.

[0431] Here, for example, as shown in Figure 29, the region where the insulator 283 and the insulator 212 are in contact. It is preferable to design it so that it overlaps with the dicing line. In other words, multiple transistors Near the region that will become the dicing line, which is provided on the outer edge of the memory cell having 200 And, insulator 282, insulator 280, insulator 272, insulator 224, insulator 222, insulator Openings are provided in 216 and the insulator 214.

[0432] In other words, the above insulators 282, 280, 272, 224, and 22 2. In the openings provided in the insulator 216 and the insulator 214, the insulator 212 and the insulator Insulator 212 and insulator 283 are in contact with each other. Insulator 212 and insulator 283 are provided of the same material and in the same manner. This can improve adhesion. For example, it is preferable to use silicon nitride. .

[0433] With this structure, insulators 212, 214, 282, and 283 , can enclose transistor 200. Insulator 212, insulator 214, insulator 2 82, and at least one of the insulators 283, are mechanisms that suppress the diffusion of oxygen, hydrogen, and water. Because it has the ability, for each circuit region where the semiconductor element shown in this embodiment is formed, the substrate By dividing it, even if it is processed into multiple chips, hydrogen can be released from the side of the divided substrate. Alternatively, it can prevent impurities such as water from contaminating the transistor 200 and diffusing into it.

[0434] Furthermore, this structure allows excess oxygen from the insulators 280 and 224 to diffuse to the outside. This can be prevented. Therefore, excess oxygen in insulator 280 and insulator 224 The acid is efficiently supplied to the oxide that forms the channel in transistor 200. This reduces oxygen vacancies in the oxide that form the channel in transistor 200. This allows the channel in transistor 200 to be formed in the oxide. This allows for the creation of an oxide semiconductor with a low defect level density and stable properties. In other words, This suppresses fluctuations in the electrical characteristics of transistor 200 and improves its reliability. ru.

[0435] In the memory device shown in Figure 29, the shape of the capacitive element 100 is planar, but in this actual The storage devices shown in the form of the implementation are not limited to these. For example, as shown in Figure 30. The shape of the capacitive element 100 may be cylindrical. Note that the memory device shown in Figure 30 is an absolute The configuration below the edge 150 is the same as that of the semiconductor device shown in Figure 29.

[0436] The capacitive element 100 shown in Figure 30 has an insulator 150 on top of the insulator 130 and on top of the insulator 150 The insulator 142 and the guides placed in the openings formed in the insulator 150 and the insulator 142 The electric body 115, the insulator 145 on the conductor 115 and the insulator 142, and on the insulator 145 It comprises a conductor 125 and an insulator 152 on the conductor 125 and the insulator 145. Then, the conductor 115 and the insulator 142 are placed in the openings formed in the insulator 150 and the insulator 14 5, and at least a portion of the conductor 125 are arranged.

[0437] The conductor 115 functions as the lower electrode of the capacitive element 100, and the conductor 125 functions as the lower electrode of the capacitive element 10 The insulator 145 functions as the upper electrode of 0 and as the dielectric of the capacitive element 100. The capacitive element 100 has openings in the insulators 150 and 142, not only on the bottom surface, On the side, the upper electrode and the lower electrode are arranged facing each other with a dielectric in between, The capacitance per unit area can be increased. Therefore, increasing the depth of the opening will increase the capacitance per unit area. This allows the capacitance of the capacitive element 100 to be increased. By increasing the capacitance per unit area, it is possible to miniaturize or highly integrate semiconductor devices. This can be used to advance it.

[0438] Insulator 152 may be any insulator that can be used for insulator 280. The edge 142 functions as an etching stopper when forming an opening in the insulator 150. Preferably, any insulator that can be used for the insulator 214 may be used.

[0439] The shape of the openings formed in the insulators 150 and 142, when viewed from above, is rectangular. It may be a polygon other than a quadrilateral, or a polygon with curved corners. It may be a shape, or it may be a circular shape including an ellipse. Here, in a top view, the opening It is preferable to have a large overlapping area between the port and transistor 200. This reduces the occupied area of ​​the semiconductor device having the capacitive element 100 and the transistor 200. It is possible.

[0440] The conductor 115 is positioned in contact with the openings formed in the insulator 142 and the insulator 150. The upper surface of the conductor 115 is preferably substantially the same as the upper surface of the insulator 142. The lower surface of the conductor 115 is in contact with the conductor 110 through an opening in the insulator 130. 5 is preferably formed using the ALD method or CVD method, for example, conductor 2 Any conductive material suitable for 05 should be used.

[0441] The insulator 145 is positioned to cover the conductor 115 and the insulator 142. For example, It is preferable to deposit the insulator 145 using the ALD method or CVD method. 45 is, for example, silicon oxide, silicon oxide nitride, silicon oxide nitride, silicon nitride, Zirconium oxide, aluminum oxide, aluminum oxide nitride, aluminum oxide nitride, Aluminum nitride, hafnium oxide, hafnium oxide nitride, hafnium oxide nitride, hafnium nitride A material such as humic acid can be used, and it can be provided in a laminated or single layer. For example, insulator 1 As shown in 45, the layers are stacked in the order of zirconium oxide, aluminum oxide, and zirconium oxide. An insulating film can be used.

[0442] Furthermore, the insulator 145 may be a material with high dielectric strength, such as silicon oxynitride, or a high dielectric strength material. It is preferable to use a high-k material. Alternatively, a material with high dielectric strength and high A laminated structure of high-k dielectric materials may also be used.

[0443] Furthermore, as an insulator of high-dielectric constant (high-k) materials (materials with a high relative permittivity), Having gallium, hafnium oxide, zirconium oxide, aluminum and hafnium Oxides, aluminum and hafnium-containing oxides and nitrides, aluminum and hafnium oxides containing um, silicon and hafnium, silicon and ha Humium-containing oxide nitrides, silicon, and hafnium-containing nitride oxides, silicon And nitrides containing hafnium, etc. Therefore, even if the insulator 145 is made thicker, sufficient capacitance of the capacitive element 100 can be secured. By increasing the thickness of the insulator 145, leakage current generated between the conductor 115 and the conductor 125 It can suppress the flow.

[0444] On the other hand, materials with high dielectric strength include silicon oxide, silicon oxide nitride, and silicon oxide nitride. Silicon oxide, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, Examples include silicon oxide with added carbon and nitrogen, silicon oxide with voids, and resins. For example, silicon nitride (SiN) deposited using the ALD method x ), using the PEALD method Silicon oxide film (SiO x ), silicon nitride (SiN) deposited using the ALD method x ) An insulating film can be used that is stacked in the order of these. By using this method, the dielectric strength is improved, and electrostatic discharge breakdown of the capacitive element 100 can be suppressed. .

[0445] The conductor 125 is positioned to fill the openings formed in the insulators 142 and 150. It is placed. Also, the conductor 125 is connected to the wiring 10 via the conductor 140 and the conductor 153. It is electrically connected to 05. Conductor 125 is formed using methods such as ALD or CVD. It is preferable to form a film, for example, by using a conductor that can be used for the conductor 205. stomach.

[0446] Furthermore, the conductor 153 is provided on the insulator 154 and is covered by the insulator 156. The conductor 153 can be any conductor that can be used for the conductor 112, and the insulator 156 can be any insulator that can be used for insulator 152. Here, conductor 1 53 is in contact with the upper surface of the conductor 140, and the capacitive element 100, the transistor 200, or It functions as a terminal for transistor 300.

[0447] [Storage device 2] An example of a semiconductor device (memory device) according to one aspect of the present invention is shown in Figure 31.

[0448] <Example of memory device configuration> Figure 31 is a cross-sectional view of a semiconductor device having a memory device 290. In addition to the transistor 200 shown in Figures 1A to 1D, the Mori device 290 also includes a capacitive device It has a chair 292. Figure 31 corresponds to a cross-sectional view of transistor 200 in the channel length direction. ru.

[0449] The capacitive device 292 comprises a conductor 242b and an insulator 27 provided on the conductor 242b. 1b, the top surface of the insulator 271b, the side surface of the insulator 271b, and the side surface of the conductor 242b An insulator 272 is provided in contact with the insulator 272, and a conductor 294 is provided covering the insulator 272. It has. That is, the capacitive device 292 is MIM (Metal-Insulator- The capacitive device (metal) is composed of one of the pair of electrodes of the capacitive device 292. In other words, the conductor 242b can also serve as the source electrode of the transistor. The dielectric layer of the capacitive device 292 is a protective layer provided on the transistor, i.e., an insulating layer. The edge 271 and the insulator 272 can also serve as the edge body. Therefore, capacitive device 29 In the manufacturing process of step 2, a portion of the transistor manufacturing process can be used, This allows for the creation of highly productive semiconductor devices. Furthermore, the pair of electric components of the capacitive device 292 One of the electrodes, namely the conductor 242b, also serves as the source electrode of the transistor, This makes it possible to reduce the area required for the placement of the transistor and capacitive devices.

[0450] For example, the conductor 294 may be made from a material that can be used for the conductor 242. That's all you need to do.

[0451] <Examples of memory devices> In the following sections, using Figures 32A, 32B, 33, and 34, we will explain the aforementioned <memory device A transistor 200 according to one aspect of the present invention, which differs from the example configuration shown in >. An example of a semiconductor device having a capacitance device 292 will be described. See Figures 32A and 3 In the semiconductor device shown in Figures 2B, 33, and 34, the above embodiment and <memory The semiconductor device shown in the "Example of Device Configuration" section (see Figure 31) has the same structure and function as the semiconductor device shown in Figure 31. Structures that meet the same reference numeral will be denoted accordingly. In this section, transistor 200 and capacity The constituent materials of the memory device 292 are as described in the previous embodiment and the <configuration of the memory device>. The materials described in detail in the example can be used.

[0452] <<Differential Example of Memory Device 1>> In the following, transistors 200a, 200b, and capacitance according to one aspect of the present invention are described. An example of a semiconductor device 600 having device 292a and capacitive device 292b is described below. This will be explained using Figure 32A.

[0453] Figure 32A shows transistor 200a, transistor 200b, and capacitive device 292a. and a cross-sectional view in the channel length direction of the semiconductor device 600 having a capacitive device 292b. A conductor 242b, an insulator 271b provided on the conductor 242b, and an insulator 271b Insulator provided in contact with the upper surface, the side surface of the insulator 271b, and the side surface of the conductor 242b It comprises a 272 and a conductor 294 provided covering the insulator 272. Here, the capacitive device 292a comprises a conductor 242a and an insulating material provided on the conductor 242a. Edge 271a, the upper surface of the insulator 271a, the side surface of the insulator 271a, and the conductor 242a An insulator 272 is provided in contact with the side surface of and a conductor 29 is provided covering the insulator 272. 4a and , are included. Furthermore, the capacitive device 292b has a conductor 242b and a conductor 242b The insulator 271b provided above, the upper surface of the insulator 271b, the side surface of the insulator 271b, and An insulator 272 is provided in contact with the side surface of the conductor 242b, and an insulator 272 is provided covering the insulator 272. It has a conductive material 294b.

[0454] As shown in Figure 32A, the semiconductor device 600 is symmetrical along the dashed line A3-A4. It has a symmetrical configuration. Either the source electrode or the drain electrode of transistor 200a And, one of the source or drain electrodes of transistor 200b is connected to the conductor 242c It has a dual-purpose configuration. Furthermore, an insulator 271c is provided on the conductor 242c. Furthermore, there is a conductor 246 that functions as wiring, transistor 200a, and transistor 2 The conductor 240, which also functions as a plug, is configured to connect to 00b. As described above, the connection between the two transistors, two capacitive devices, and the wiring and plug is as follows: By using this configuration, it is possible to provide a semiconductor device that enables miniaturization or high integration.

[0455] Transistor 200a, transistor 200b, capacitive device 292a, and capacitive device The configuration and effects of each part of Vice 292b are shown in Figures 1A to 1D, and Figure 3. The example configuration of the semiconductor device shown in 1 can be considered.

[0456] <<Modified Memory Device 2>> In the above, transistor 200a and transistor 20 are used as examples of semiconductor device configurations. Although capacitive devices 292a and 292b were mentioned, the embodiments are shown below. The semiconductor device is not limited to this. For example, as shown in Figure 32B, a semiconductor device 600 and a semiconductor device having the same configuration as semiconductor device 600 are connected via a capacitive unit. A configuration in which transistors 200a and 200b are used is also acceptable. In this specification, transistors 200a and 200b are used. A semiconductor device having capacitive device 292a and capacitive device 292b is referred to as a cell. Transistor 200a, transistor 200b, capacitive device 292a and capacitive device The configuration of Vice 292b is as described above: transistor 200a, transistor 200b The description relating to capacitive devices 292a and 292b can be taken into consideration. .

[0457] Figure 32B shows transistor 200a, transistor 200b, and capacitive device 292a. and a semiconductor device 600 having a capacitive device 292b, and a semiconductor device 600 having a similar configuration This is a cross-sectional view in which cells having a certain component are connected via a capacity section.

[0458] As shown in Figure 32B, one electrode of the capacitive device 292b of the semiconductor device 600 The conductor 294b, which functions as a semiconductor device 6, has a configuration similar to that of semiconductor device 600. 01 has a configuration that also serves as one of the electrodes of the capacitive device. Also, although not shown in the diagram , Conductor 2 which functions as one electrode of the capacitive device 292a of semiconductor device 600 94a is adjacent to the semiconductor device 600 on the left side, i.e., in Figure 32B, in the A1 direction. It also serves as one of the electrodes of the capacitive device of the body. Furthermore, on the right side of semiconductor device 601, Furthermore, in Figure 32B, the cells in the A2 direction have a similar configuration. An array (also called a memory device layer) can be constructed. By using this configuration, the spacing between adjacent cells can be reduced, thus improving the performance of the cell array. The shadow area can be reduced, enabling high integration. Also, as shown in Figure 32B, cell allergens By arranging the components of (i) in a matrix, a matrix-like cell array is formed. It is possible.

[0459] As described above, in the configuration shown in this embodiment, transistor 200a, transistor 20 By forming capacitive device 292a and capacitive device 292b, the cell This reduces the area and enables miniaturization or high integration of semiconductor devices having cell arrays. ru.

[0460] Furthermore, the above cell array may be configured not only as a planar array but also as a stacked array. Figure 33 shows a cell array A cross-sectional view of a configuration in which n layers of I610 are stacked is shown. As shown in Figure 33, multiple cell arrays ( By stacking cell arrays 610_1 to 610_n, the cell array Cells can be clustered and arranged without increasing the occupied area. In other words, 3D cell arrangement Rays can be constructed.

[0461] <Example 3 of a memory device> Figure 34 shows the transistor layer 41 of the memory unit 470, which has transistor 200T. 3 and 4 layers of memory device layer 415 (memory device layer 415_1 to memory device An example having layer 415_4) is shown.

[0462] Memory device layers 415_1 through 415_4 each contain multiple memory It has a redevice 420.

[0463] The memory device 420 has different memory devices via the conductor 424 and the conductor 205. The memory device 420 in the vice layer 415 and the transistor layer 413 Connect electrically to the Rangista 200T.

[0464] The memory unit 470 includes insulator 212, insulator 214, insulator 282, and insulator It is sealed by 283 (for convenience, this will be referred to as the sealing structure below). Around the insulator 283 An insulator 274 is provided. In addition, insulator 274, insulator 283, and insulator 212 A conductor 440 is provided thereto, which is electrically connected to the element layer 411.

[0465] Furthermore, an insulator 280 is provided inside the sealing structure. The insulator 280 is heated It has the function of releasing oxygen. Alternatively, the insulator 280 has an excess oxygen region.

[0466] Furthermore, insulators 212 and 283 have a function that provides high blocking properties against hydrogen. It is preferable that the material has the following properties. In addition, the insulator 214 and the insulator 282 contain hydrogen It is preferable that the material has the function of capturing or fixing hydrogen.

[0467] For example, materials that have high blocking properties for hydrogen include silicon nitride. Alternatively, silicon nitride and the like are examples. Furthermore, the above hydrogen capture or hydrogen fixation Materials that have this function include aluminum oxide, hafnium oxide, hafnium oxide nitride, and nitride Hafnium oxide, and oxides containing aluminum and hafnium (aluminum hafnium) Examples include Nate.

[0468] The materials used for insulators 212, 214, 282, and 283 There are no particular limitations on the crystal structure, but it can be amorphous or crystalline. For example, as a material that has the function of capturing or fixing hydrogen, amorphous oxide Aluminum films are preferable. Amorphous aluminum oxide is preferable to highly crystalline aluminum oxide. In some cases, it can capture and solidify hydrogen in greater quantities than aluminum.

[0469] Here, the excess oxygen in the insulator 280 is replaced by hydrogen in the oxide semiconductor in contact with the insulator 280. The following model can be considered for diffusion.

[0470] Hydrogen present in the oxide semiconductor can be transmitted to other materials via the insulator 280 in contact with the oxide semiconductor. It diffuses into the structure. This hydrogen diffusion occurs when excess oxygen in the insulator 280 is absorbed into the oxide semiconductor. It reacts with hydrogen to form an OH bond and diffuses through the insulator 280. The hydrogen atom having an OH bond , a material having the function of capturing or fixing hydrogen (typically, an insulator 282) Upon arrival, the hydrogen atom bonded with an atom in the insulator 282 (for example, a metal atom) in the acid. It reacts with elementary atoms and is captured or fixed in insulator 282. On the other hand, it had an OH bond. It is presumed that the excess oxygen atoms remain in the insulator 280 as excess oxygen. In the diffusion of hydrogen, there is a high probability that the excess oxygen in the insulator 280 plays a bridging role. stomach.

[0471] To satisfy the above model, the semiconductor device manufacturing process is one of the important elements. .

[0472] As an example, an insulator 280 having excess oxygen is formed on an oxide semiconductor, and then insulation Form body 282. After that, it is preferable to perform a heat treatment. This heat treatment is performed on the material Physically, in an atmosphere containing oxygen, an atmosphere containing nitrogen, or a mixed atmosphere of oxygen and nitrogen, The process should be carried out at a temperature of 350°C or higher, preferably 400°C or higher. ...

Claims

[Claim 1] A first insulator and The second insulator on the first insulator, The third insulator on the second insulator, and the first conductor, A fourth insulator on the third insulator and on the first conductor, The fifth insulator on the fourth insulator, The first oxide on the fifth insulator and The second oxide on the first oxide, The third oxide and the fourth oxide on the second oxide, The second conductor on the third oxide, The third conductor on the fourth oxide, The sixth insulator on the second conductor, The seventh insulator on the third conductor, The fifth to seventh insulators, and the eighth insulator on the seventh insulator, A fifth oxide located on the second oxide and positioned between the second conductor and the third conductor, The ninth insulator on the fifth oxide, The ninth insulator has a fourth conductor, The first conductor has a region that overlaps with the second oxide, The fourth conductor has a region that overlaps with the second oxide, The fifth oxide has regions that are in contact with the first to fourth oxides, the second conductor, the third conductor, and the fifth to eighth insulators, respectively. The fifth oxide overlaps with the side surface of the fourth conductor, The eighth insulator has a region that is in contact with the upper surface of the fifth insulator, the side surface of the first oxide, the side surface of the second oxide, the side surface of the third oxide, the side surface of the second conductor, the side surface of the third conductor, the side surface of the sixth insulator, the upper surface of the sixth insulator, the side surface of the seventh insulator, the upper surface of the seventh insulator, and the side surface of the fifth oxide. Semiconductor equipment.

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