Power module

The power module design with overlapping conductive layers and pins addresses inductance and compactness issues, achieving reduced inductance and a compact form factor.

JP2026096215APending Publication Date: 2026-06-15SHINKO ELECTRIC IND CO LTD

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
SHINKO ELECTRIC IND CO LTD
Filing Date
2024-12-03
Publication Date
2026-06-15

AI Technical Summary

Technical Problem

Existing power modules with overlapping semiconductor elements face challenges in reducing inductance and achieving a compact design.

Method used

A power module configuration with overlapping conductive layers and conductive pins, utilizing insulating films and flexible wiring boards to connect semiconductor elements, reducing the distance between conductive layers and minimizing inductance while maintaining a compact size.

🎯Benefits of technology

The solution effectively reduces inductance and allows for a more compact power module design, enhancing electrical performance and reliability.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 2026096215000001_ABST
    Figure 2026096215000001_ABST
Patent Text Reader

Abstract

We provide a power module that reduces inductance. [Solution] In the power module, the semiconductor package 20 includes a first semiconductor element 100, a second semiconductor element 200, a first insulating substrate 411 and a second insulating substrate 421, a first conductive member 416, a second conductive member 611, a third conductive member 426, a fourth conductive member 621, a fifth conductive member 60, an insulating film 50 provided between the first conductive member 416 and the second conductive member 611 and the third conductive member 426 and the fourth conductive member 621, a first conductive layer 121 electrically connected to the second conductive member 611, and a second conductive layer 222 electrically connected to the third conductive member 426, wherein the first conductive layer 121 and the second conductive layer 222 overlap in a plan view.
Need to check novelty before this filing date? Find Prior Art

Description

【Technical Field】 , 【0004】 , 【0006】 , , , , , , , , , , , , , , , , , 【0005】 【0001】 The present disclosure relates to a power module. 【Background Art】 【0002】 There has been proposed a power module in which two semiconductor elements overlap in a plan view. 【Prior Art Documents】 【Patent Documents】 【0003】 【Patent Document 1】 International Publication No. 2024 / 202838 【Patent Document 2】 Japanese Patent Application Laid-Open No. 2014-045010 【Patent Document 3】 Japanese Patent Application Laid-Open No.​​​​​​​​​​​​​​​​​​​​According to one embodiment of the present disclosure, a first semiconductor element having a first surface and a second surface opposite to the first surface, with a first electrode provided on the first surface and a second electrode provided on the second surface; a second semiconductor element having a third surface and a fourth surface opposite to the third surface, with a third electrode provided on the third surface and a fourth electrode provided on the fourth surface; a first insulating substrate having a fifth surface to which the first semiconductor element is bonded and a sixth surface opposite to the fifth surface; a second insulating substrate having a seventh surface to which the second semiconductor element is bonded and an eighth surface opposite to the seventh surface; a first conductive member penetrating the first insulating substrate, electrically connected to the first electrode, and laminated on the sixth surface of the first insulating substrate; a second conductive member electrically connected to the second electrode; and the second insulating substrate penetrating the first insulating substrate, A power module is provided comprising: a third conductive member electrically connected to a third electrode and laminated on the eighth surface of the second insulating substrate; a fourth conductive member electrically connected to a fourth electrode; a fifth conductive member electrically connecting the first conductive member and the fourth conductive member; an insulating film provided between the first and second conductive members and the third and fourth conductive members, having a ninth surface facing the first and second conductive members and a tenth surface facing the third and fourth conductive members; a first conductive layer provided on the ninth surface and electrically connected to the second conductive member; and a second conductive layer provided on the tenth surface and electrically connected to the third conductive member, wherein the first conductive layer and the second conductive layer overlap in a plan view. [Effects of the Invention] 【0007】 According to the disclosed technology, inductance can be reduced. [Brief explanation of the drawing] 【0008】 [Figure 1] This is a perspective view (part 1) showing a power module according to an embodiment. [Figure 2] This is a perspective view (part 2) showing a power module according to the embodiment. [Figure 3]This is a perspective view (part 1) showing a part of the power module according to the embodiment. [Figure 4] This is a perspective view (part 2) showing a part of the power module according to the embodiment. [Figure 5] This is a perspective view (part 3) showing a part of the power module according to the embodiment. [Figure 6] This is a perspective view (part 4) showing a part of the power module according to the embodiment. [Figure 7] This is a perspective view (part 5) showing a part of the power module according to the embodiment. [Figure 8] This is a perspective view (part 6) showing a part of the power module according to the embodiment. [Figure 9] This is a perspective view (part 7) showing a part of the power module according to the embodiment. [Figure 10] This is a perspective view (part 8) showing a part of the power module according to the embodiment. [Figure 11] This is a schematic cross-sectional view showing a power module according to an embodiment. [Figure 12] This is a schematic cross-sectional view showing a part of the power module according to the embodiment. [Figure 13] This is a schematic top view showing a part of the power module according to the embodiment. [Figure 14] This is a schematic bottom view showing a part of the power module according to the embodiment. [Figure 15] This is a circuit diagram showing a power module according to an embodiment. [Modes for carrying out the invention] 【0009】 Hereinafter, embodiments will be specifically described with reference to the accompanying drawings. In this specification and the drawings, components having substantially the same functional configuration may be denoted by the same reference numerals to omit redundant explanations. In the present disclosure, the X-axis (X1-X2 direction), the Y-axis (Y1-Y2 direction), and the Z-axis (Z1-Z2 direction) are directions orthogonal to each other. The plane including the X-axis and the Y-axis is referred to as the XY plane, the plane including the Y-axis and the Z-axis is referred to as the YZ plane, and the plane including the Z-axis and the X-axis is referred to as the ZX plane. For convenience, the Z1-Z2 direction is taken as the vertical direction, the Z1 side is the upper side, and the Z2 side is the lower side. In addition, a plan view means viewing an object from the Z1 side, and a planar shape means the shape of an object viewed from the Z1 side. However, the power module can be used in an upside-down state or arranged at an arbitrary angle. 【0010】 Embodiments of the present disclosure will be described. The embodiments relate to a power module. FIGS. 1 and 2 are perspective views showing the power module according to the embodiment. FIGS. 3 to 10 are perspective views showing a part of the power module according to the embodiment. FIG. 11 is a cross-sectional view schematically showing the power module according to the embodiment. FIG. 12 is a cross-sectional view schematically showing a part of the power module according to the embodiment. FIG. 13 is a top view schematically showing a part of the power module according to the embodiment. FIG. 14 is a bottom view schematically showing a part of the power module according to the embodiment. 【0011】 As shown in FIGS. 1 to 14, the power module 1 according to the embodiment includes a semiconductor package 10, a semiconductor package 20, an insulating film 50, and conductive pins 6*. 【0012】 It should be noted that in the translation of the above text, the symbol "*" in "conductive pins 6*" in the original text may be incorrect. It is recommended to check the original text to ensure the accuracy of the translation content. If you have any other questions, please feel free to let me know.The insulating film 50 is provided between the semiconductor package 10 and the semiconductor package 20. The insulating film 50 has one surface 51 facing the semiconductor package 10 and the other surface 52 facing the semiconductor package 20 on the side opposite to the one surface 51. The semiconductor package 10 is on the Z2 side of the insulating film 50, and the semiconductor package 20 is on the Z1 side of the insulating film 50. The material of the insulating film 50 is, for example, polyimide. The one surface 51 is an example of the ninth surface, and the other surface 52 is an example of the tenth surface. 【0013】 As shown in FIGS. 4, 11, and 12, conductive layers 121, 122, 123, 124, and 125 are provided on one surface 51 of the insulating film 50. The conductive layer 121 is on the X1 side of the conductive layer 122. For example, the conductive layers 123 and 124 are on the Y2 side of the conductive layer 122, and the conductive layer 125 is on the Y2 side of the conductive layer 121. The conductive layer 124 is on the X1 side of the conductive layer 123, and the conductive layer 125 is on the X1 side of the conductive layer 124. The planar shapes of the conductive layers 121 and 122 are, for example, rectangular. The conductive layers 123 and 124 extend along the Y axis and have a longitudinal direction parallel to the Y axis and a short side direction parallel to the X axis. For example, the conductive layer 125 has a substantially L-shaped planar shape and has a portion extending along the X axis from the bending point of the L shape to the X1 side and a portion extending along the Y axis to the Y2 side. 【0014】 As shown in FIGS. 3, 11, and 12, conductive layers 221, 222, 223, 224, and 225 are provided on the other surface 52 of the insulating film 50. The conductive layer 221 is on the X2 side of the conductive layer 222. For example, the conductive layers 223 and 224 are on the Y2 side of the conductive layer 222, and the conductive layer 225 is on the Y2 side of the conductive layer 221. The conductive layer 224 is on the X2 side of the conductive layer 223, and the conductive layer 225 is on the X2 side of the conductive layer 224. The planar shapes of the conductive layers 221 and 222 are, for example, rectangular. The conductive layers 223 and 224 extend along the Y axis and have a longitudinal direction parallel to the Y axis and a short side direction parallel to the X axis. For example, the conductive layer 225 has a substantially L-shaped planar shape and has a portion extending along the X axis from the bending point of the L shape to the X2 side and a portion extending along the Y axis to the Y2 side. 【0015】 In a plan view, conductive layer 121 and conductive layer 222 overlap, and conductive layer 122 and conductive layer 221 overlap. Also in a plan view, the Y2 side end of conductive layer 123 and the X2 side end of conductive layer 225 overlap, the Y2 side end of conductive layer 124 and the Y2 side end of conductive layer 225 overlap, the Y2 side end of conductive layer 223 and the X1 side end of conductive layer 125 overlap, and the Y2 side end of conductive layer 224 and the Y2 side end of conductive layer 125 overlap. Conductive layer 121 is an example of a first conductive layer, conductive layer 222 is an example of a second conductive layer, and conductive layers 122 and 221 are examples of a third conductive layer. 【0016】 As shown in Figures 5 to 7, Figure 11 and Figure 13, the semiconductor package 10 includes two semiconductor elements 100, a flexible wiring board 410, two shims 510, lead terminals 611 and 612, conductive pins 171 and 172, and a mold 710. 【0017】 As shown in Figures 8 to 10, 11 and 14, the semiconductor package 20 includes two semiconductor elements 200, a flexible wiring board 420, two shims 520, lead terminals 621 and 622, conductive pins 271 and 272, and a mold 720. 【0018】 The semiconductor elements 100 and 200 are formed using, for example, silicon (Si) or silicon carbide (SiC). The semiconductor elements 100 and 200 may also be formed using gallium nitride (GaN) or gallium arsenide (GaAs). For example, the semiconductor elements 100 and 200 are insulated gate bipolar transistors (IGBTs) or metal-oxide-semiconductor field-effect transistors (MOSFETs). The planar shape of the semiconductor elements 100 and 200 is, for example, rectangular. The thickness of the semiconductor elements 100 and 200 is, for example, about 50 μm to 500 μm. 【0019】 As shown in Figure 11, the semiconductor element 100 has one surface 101 and another surface 102 opposite to the surface 101. The semiconductor element 100 also has a main body 110, electrodes 111, 112, and 113. Electrodes 111 and 113 are provided on one surface 101, and electrode 112 is provided on the other surface 102. For example, electrodes 111, 112, and 113 are the source electrode, drain electrode, and gate electrode, respectively. The semiconductor element 100 is an example of a first semiconductor element, one surface 101 is an example of a first surface, and the other surface 102 is an example of a second surface. Electrode 111 is an example of a first electrode, electrode 112 is an example of a second electrode, and electrode 113 is an example of a fifth electrode. 【0020】 As shown in Figure 11, the semiconductor element 200 has one surface 201 and the other surface 202 opposite to the surface 201. The semiconductor element 200 also has a main body 210, electrodes 211, 212, and 213. Electrodes 211 and 213 are provided on one surface 201, and electrode 212 is provided on the other surface 202. For example, electrodes 211, 212, and 213 are the source electrode, drain electrode, and gate electrode, respectively. The semiconductor element 200 is an example of a second semiconductor element, one surface 201 is an example of a third surface, and the other surface 202 is an example of a fourth surface. Electrode 211 is an example of a third electrode, electrode 212 is an example of a fourth electrode, and electrode 213 is an example of a sixth electrode. 【0021】 Electrodes 111, 112, 113, 211, 212, and 213 (hereinafter collectively referred to as "electrodes") can be made from materials such as aluminum (Al) or copper (Cu), or alloys containing at least one metal selected from these metals. If necessary, a surface treatment layer may be formed on the surface of the electrodes. Examples of surface treatment layers include a gold (Au) layer, a nickel (Ni) layer / Au layer (a metal layer formed by stacking Ni and Au layers in that order), and a Ni / palladium (Pd) layer / Au layer (a metal layer formed by stacking Ni, Pd, and Au layers in that order). For these Au, Ni, and Pd layers, for example, metal layers formed by electroless plating (electroless plated metal layers) can be used. Furthermore, the Au layer is a metal layer made of Au or an Au alloy, the Ni layer is a metal layer made of Ni or a Ni alloy, and the Pd layer is a metal layer made of Pd or a Pd alloy. 【0022】 Shims 510 and 520 are metal plates, such as copper plates. The thickness of shims 510 and 520 is approximately the same as the thickness of semiconductor elements 100 and 200. 【0023】 The flexible wiring board 410 comprises an insulating substrate 411, an insulating adhesive layer 412, and a wiring layer 415. The insulating substrate 411 has one surface 413 and another surface 414 opposite to the first surface 413. The adhesive layer 412 is provided on the first surface 413, and the wiring layer 415 is provided on the other surface 414. The adhesive layer 412 may be provided over the entire surface 413. The wiring layer 415 is laminated on the other surface 414. The insulating substrate 411 is an example of a first insulating substrate. The first surface 413 is an example of a fifth surface, and the other surface 414 is an example of a sixth surface. 【0024】 The insulating substrate 411 is, for example, a resin film. As the material for the resin film, insulating resins such as polyimide resins, polyethylene resins, and epoxy resins can be used. The insulating substrate 411 is, for example, flexible. Here, flexibility refers to the property of being able to be bent or flexed. The planar shape of the insulating substrate 411 is, for example, rectangular. The thickness of the insulating substrate 411 is, for example, about 50 μm to 100 μm. 【0025】 The semiconductor element 100 and the shim 510 are bonded to one surface 413 of the insulating substrate 411 by an adhesive layer 412. One surface 101 of the semiconductor element 100 faces the one surface 413 of the insulating substrate 411. Through holes 418 reaching the electrode 111 and through holes (not shown) reaching the electrode 113 are formed in the insulating substrate 411 and the adhesive layer 412. Multiple through holes 418 may be formed. The shim 510 is on the X2 side of the semiconductor element 100. 【0026】 For example, epoxy, polyimide, or silicone adhesives can be used as the material for the adhesive layer 412. The thickness of the adhesive layer 412 is, for example, about 20 μm to 40 μm. 【0027】 As shown in Figures 6 and 11, the wiring layer 415 has a wiring 416 connected to the electrode 111 through a through hole 418, a wiring 417 connected to the electrode 113 through a through hole (not shown), and a wiring 416A connected to the wiring 416. Wiring 416 is an example of a first conductive member, and wiring 417 is an example of a seventh conductive member. 【0028】 The wiring 416 includes via wiring filled in a through hole 418 and a wiring pattern formed on the other surface 414 of the insulating substrate 411. The wiring 417 includes via wiring filled in a through hole (not shown) and a wiring pattern formed on the other surface 414 of the insulating substrate 411. The wiring 416A includes a wiring pattern formed on the other surface 414 of the insulating substrate 411. 【0029】 A lead terminal 611 is bonded to the electrode 112 of the semiconductor element 100 by a conductive adhesive layer 613. A lead terminal 612 is bonded to the shim 510 by a conductive adhesive layer 614. In a plan view, the lead terminal 611 extends from the semiconductor element 100 toward X1. The lead terminals 611 and 612 are formed from, for example, lead frames made of Cu. The conductive adhesive layers 613 and 614 are, for example, solder layers or sintered metal layers. The conductive adhesive layers 613 and 614 may also be composed of conductive paste. The lead terminal 611 is an example of a second conductive member. The laminate 616 of the shim 510, conductive adhesive layer 614, and lead terminal 612 is an example of a sixth conductive member. 【0030】 As shown in Figure 6, conductive pin 171 is joined to wiring 417 by a conductive adhesive layer (not shown), and conductive pin 172 is joined to wiring 416A by a conductive adhesive layer (not shown). Conductive pin 171 is electrically connected to wiring 417, and conductive pin 172 is electrically connected to wiring 416A. Conductive pin 171 extends from wiring 417 towards Z1, and conductive pin 172 extends from wiring 416A towards Z1. Conductive pin 171 is an example of a ninth conductive member. 【0031】 As shown in Figure 11, the mold 710 seals the semiconductor element 100, the flexible wiring board 410, the shim 510, the lead terminals 611 and 612. The mold 710 has one surface 717 and the other surface 718 opposite to the surface 717. The X1 side end of the conductive layer 121 extends from the mold 710, and the X2 side end of the conductive layer 122 extends from the mold 710. One surface 717 of the mold 710 faces the insulating film 50. An opening 711 is formed on the other surface 718 of the mold 710, reaching the lower surface (Z2 side surface) of the lead terminal 611. The mold 710 is an example of a first sealing member. 【0032】 The flexible wiring board 420 comprises an insulating substrate 421, an insulating adhesive layer 422, and a wiring layer 425. The insulating substrate 421 has one surface 423 and another surface 424 opposite to the first surface 423. The adhesive layer 422 is provided on the first surface 423, and the wiring layer 425 is provided on the other surface 424. The adhesive layer 422 may be provided over the entire surface 423. The wiring layer 425 is laminated on the other surface 424. The insulating substrate 421 is an example of a second insulating substrate. The first surface 423 is an example of a seventh surface, and the other surface 424 is an example of an eighth surface. 【0033】 The semiconductor element 200 and the shim 520 are bonded to one surface 423 of the insulating substrate 421 by an adhesive layer 422. One surface 201 of the semiconductor element 200 faces the one surface 423 of the insulating substrate 421. Through holes 428 reaching the electrode 211 and through holes (not shown) reaching the electrode 213 are formed in the insulating substrate 421 and the adhesive layer 422. Multiple through holes 428 may be formed. The shim 520 is on the X1 side of the semiconductor element 200. 【0034】 The material and thickness of the insulating substrate 421 are, for example, the same as the material and thickness of the insulating substrate 411. The material and thickness of the adhesive layer 422 are, for example, the same as the material and thickness of the adhesive layer 412. 【0035】 As shown in Figures 9 and 11, the wiring layer 425 has a wiring 426 connected to the electrode 211 through a through hole 428, a wiring 427 connected to the electrode 213 through a through hole (not shown), and a wiring 426A connected to the wiring 426. Wiring 426 is an example of a third conductive member, and wiring 427 is an example of an eighth conductive member. 【0036】 The wiring 426 includes via wiring filled in a through hole 428 and a wiring pattern formed on the other surface 424 of the insulating substrate 421. The wiring 427 includes via wiring filled in a through hole (not shown) and a wiring pattern formed on the other surface 424 of the insulating substrate 421. The wiring 426A includes a wiring pattern formed on the other surface 424 of the insulating substrate 421. 【0037】 A lead terminal 621 is bonded to the electrode 212 of the semiconductor element 200 by a conductive adhesive layer 623. A lead terminal 622 is bonded to the shim 520 by a conductive adhesive layer 624. In a plan view, the lead terminal 621 extends from the semiconductor element 100 toward the X2 side. The lead terminals 621 and 622 are formed from, for example, lead frames made of Cu. The conductive adhesive layers 623 and 624 are, for example, solder layers or sintered metal layers. The conductive adhesive layers 623 and 624 may also be composed of conductive paste. The lead terminal 621 is an example of a fourth conductive member. 【0038】 As shown in Figure 9, conductive pin 271 is joined to wiring 427 by a conductive adhesive layer (not shown), and conductive pin 272 is joined to wiring 426A by a conductive adhesive layer (not shown). Conductive pin 271 is electrically connected to wiring 427, and conductive pin 272 is electrically connected to wiring 426A. Conductive pin 271 extends from wiring 427 towards Z2, and conductive pin 272 extends from wiring 426A towards Z2. Conductive pin 271 is an example of a 10th conductive member. 【0039】 As shown in Figure 11, the mold 720 seals the semiconductor element 200, the flexible wiring board 420, the shim 520, the lead terminals 621 and 622. The mold 720 has one surface 727 and the other surface 728 opposite to the surface 727. The X2 side end of the conductive layer 221 extends from the mold 720, and the X1 side end of the conductive layer 222 extends from the mold 720. One surface 727 of the mold 720 faces the insulating film 50. An opening 721 is formed on the other surface 728 of the mold 720, reaching the upper surface (Z1 side surface) of the lead terminal 621. The mold 720 is an example of a second sealing member. 【0040】 As shown in Figure 11, the laminate 616 has a surface 511 that faces the lead terminals 621 and is in contact with the adhesive layer 412. Holes 512 are formed in the surface 511. Multiple holes 512 may be formed, for example, two. For example, the holes 512 penetrate the shim 510 and the conductive adhesive layer 614 and reach partway along the thickness direction of the lead terminals 612. As shown in Figure 7, the holes 512 extend, for example, along the Y axis and have a longitudinal direction parallel to the Y axis and a short direction parallel to the X axis. Through holes 41 are formed in the flexible wiring board 410 that overlap with the holes 512. The same number of through holes 41 are formed as the number of holes 512. For example, as shown in Figure 6, the planar shape and size of the through holes 41 are the same as the planar shape and size of the holes 512. Also, as shown in Figure 5, an opening 712 that reaches the wiring 416 is formed on one surface 717 of the mold 710. The opening 712 extends, for example, along the Y-axis and has a longitudinal direction parallel to the Y-axis and a transverse direction parallel to the X-axis. For example, in a plan view, all the through holes 41 and holes 512 are located inside the opening 712. Face 511 is an example of the 11th face, hole 512 is an example of the first hole, and the Y-axis is an example of the first axis. 【0041】 As shown in Figure 11, the lead terminal 621 has a surface 627 facing the laminate 616. In a plan view of surface 627, holes 628 are formed at a position away from the flexible wiring board 420. The same number of holes 628 as holes 512 are formed. The holes 628 reach partway through the thickness direction of the lead terminal 621. As shown in Figure 10, the holes 628 extend, for example, along the X-axis and have a longitudinal direction parallel to the X-axis and a short direction parallel to the Y-axis. In a plan view, the holes 628 intersect with the holes 512. For example, in a plan view, the holes 512 and 628 are perpendicular to each other. Also, as shown in Figure 8, an opening 722 reaching the lead terminal 621 is formed on one surface 727 of the mold 720. The opening 722 extends, for example, along the Y-axis and has a longitudinal direction parallel to the Y-axis and a short direction parallel to the X-axis. For example, in a plan view, all the holes 628 are inside the opening 722. Face 627 is an example of the 12th face, hole 628 is an example of the second hole, and the X-axis is an example of the second axis. 【0042】 As shown in Figures 5 and 12, an opening 713 extending to the wiring 417 and an opening 714 extending to the wiring 416A are formed on one surface 717 of the mold 710. In addition, through holes 715 and 716 are formed in the mold 710, passing through the mold 710 along the Z axis. In a plan view, through hole 715 coincides with wiring 427, and through hole 716 coincides with wiring 426A. 【0043】 As shown in Figures 8 and 12, an opening 723 extending to the wiring 427 and an opening 724 extending to the wiring 426A are formed on one surface 727 of the mold 720. In addition, through holes 725 and 726 are formed in the mold 720, penetrating the mold 720 along the Z axis. In a plan view, through hole 725 coincides with the wiring 417, and through hole 726 coincides with the wiring 416A. In a plan view, opening 723 coincides with through hole 715, opening 724 coincides with through hole 716, through hole 725 coincides with opening 713, and through hole 726 coincides with opening 714. 【0044】 As shown in Figures 3, 4, 11, and 12, through holes 53, 54, 55, 56, and 57 are formed in the insulating film 50, penetrating the insulating film 50 along the Z-axis. In a plan view, through hole 53 overlaps with wiring 417, through hole 54 overlaps with wiring 416A, through hole 55 overlaps with wiring 427, and through hole 56 overlaps with wiring 426A. The same number of through holes 57 are formed as holes 512. In a plan view, through holes 57 overlap with holes 512, through hole 41, opening 712, opening 722, and hole 628. 【0045】 As shown in Figures 4 and 12, a through-hole 131 is formed at the Y1 end of the conductive layer 123, and a through-hole 132 is formed at the Y2 end of the conductive layer 123. A through-hole 133 is formed at the Y1 end of the conductive layer 124, and a through-hole 134 is formed at the X1 end of the conductive layer 125, and a through-hole 134 is formed at the X1 end of the conductive layer 125. The conductive pin 171 penetrates the conductive layer 123 and the insulating film 50 through through-holes 131 and 53, and extends to the inside of the through-hole 725. The conductive pin 171 is in contact with the conductive layer 123 and is electrically connected to the conductive layer 123. The conductive pin 172 penetrates the conductive layer 124 and the insulating film 50 through through-holes 133 and 54, and extends to the inside of the through-hole 726. The conductive pin 172 is in contact with the conductive layer 124 and is electrically connected to the conductive layer 124. The conductive layer 123 is electrically connected to the wiring 417 via the conductive pin 171, and the conductive layer 124 is electrically connected to the wiring 416A via the conductive pin 172. The conductive layer 123 is an example of a fourth conductive layer. 【0046】 As shown in Figures 3 and 12, a through-hole 231 is formed at the Y1 end of the conductive layer 223, and a through-hole 232 is formed at the Y2 end of the conductive layer 223. A through-hole 233 is formed at the Y1 end of the conductive layer 224, and a through-hole 234 is formed at the X2 end of the conductive layer 225, and a through-hole 234 is formed at the X2 end of the conductive layer 225. The conductive pin 271 penetrates the conductive layer 223 and the insulating film 50 through through-holes 231 and 55, and extends to the inside of the through-hole 715. The conductive pin 271 is in contact with the conductive layer 223 and is electrically connected to the conductive layer 223. The conductive pin 272 penetrates the conductive layer 224 and the insulating film 50 through through-holes 233 and 56, and extends to the inside of the through-hole 716. The conductive pin 272 is in contact with the conductive layer 224 and is electrically connected to the conductive layer 224. The conductive layer 223 is electrically connected to the wiring 427 via the conductive pin 271, and the conductive layer 224 is electrically connected to the wiring 426A via the conductive pin 272. The conductive layer 223 is an example of a fifth conductive layer. 【0047】 Furthermore, as shown in Figures 3 and 4, the through-holes 132 of the conductive layer 123 and the through-holes 234 of the conductive layer 225 overlap, and the through-holes 232 of the conductive layer 223 and the through-holes 134 of the conductive layer 125 overlap. 【0048】 As shown in Figure 4, a through-hole 135 is formed in the conductive layer 122, penetrating the conductive layer 122. As shown in Figure 3, a through-hole 235 is formed in the conductive layer 221, penetrating the conductive layer 221. In a plan view, the through-holes 135 and 235 overlap with hole 512, through-hole 41, opening 712, through-hole 57, opening 722, and hole 628. 【0049】 The conductive pin 60 can be made of a metal such as aluminum (Al) or copper (Cu), or an alloy containing at least one metal selected from these metals. The conductive pin 60 electrically connects the laminate 616 and the lead terminal 621. The conductive pin 60 may also be in contact with the laminate 616 and the lead terminal 621. The conductive pin 60 passes through the through hole 41, the opening 712, the through hole 135, the through hole 57, the through hole 235, and the opening 722, with one end of the conductive pin 60 (the Z2 side end) inserted into the hole 512 in the laminate 616 and the other end (the Z1 side end) inserted into the hole 628 in the lead terminal 621. The conductive pin 60 may be fitted into the holes 512 and 628, or it may be in contact with the inner wall surfaces of the holes 512 and 628. 【0050】 The conductive pin 60 has a shape that is, for example, substantially cylindrical with a slit formed along its longitudinal direction. In this case, the shape of the cross-section perpendicular to the longitudinal direction of the conductive pin 60 is arc-shaped. The conductive pin 60 may be cylindrical or columnar. The conductive pin 60 may be polygonal tubular or polygonal prism. When the conductive pin 60 is cylindrical, it is more elastically deformable than when it is columnar, and is easier to bring into contact with the laminate 616 and lead terminal 621. When the conductive pin 60 is cylindrical with a slit formed along its longitudinal direction, it is even more elastically deformable and easier to bring into contact with the laminate 616 and lead terminal 621. The easier the conductive pin 60 is to come into contact with the laminate 616 and lead terminal 621, the better the reliability of the connection can be obtained. The conductive pin 60 is an example of a fifth conductive member. 【0051】 Conductive bonding material 61 is provided in holes 512, through holes 41, openings 712, through holes 135, through holes 57, through holes 235, openings 722 and 628. The conductive bonding material 61 is in contact with the conductive pins 60, laminate 616, wiring 416, conductive layer 122, conductive layer 221 and lead terminals 621, and electrically connects the conductive pins 60, laminate 616, wiring 416, conductive layer 122, conductive layer 221 and lead terminals 621 to each other. The conductive bonding material 61 is, for example, a brazing material, soldering material or sintered metal material. 【0052】 As shown in Figure 11, the laminate 626 has a surface 521 facing the lead terminals 622 and in contact with the adhesive layer 422. Holes 522 may be formed in the surface 521. Multiple holes 522 may be formed, for example, two. For example, the holes 522 penetrate the shim 520 and the conductive adhesive layer 624 and reach partway along the thickness direction of the lead terminals 622. As shown in Figure 10, the holes 522 extend, for example, along the Y axis and have a longitudinal direction parallel to the Y axis and a short direction parallel to the X axis. Through holes 42 that overlap with the holes 522 may be formed in the flexible wiring board 420. The same number of through holes 42 may be formed as the number of holes 522. For example, as shown in Figure 9, the planar shape and size of the through holes 42 are the same as the planar shape and size of the holes 522. Also, as shown in Figure 8, an opening 729 reaching the wiring 426 is formed on one surface 727 of the mold 720. The opening 729 extends, for example, along the Y-axis and has a longitudinal direction parallel to the Y-axis and a transverse direction parallel to the X-axis. For example, in a plan view, all the through holes 42 and holes 522 are located inside the opening 729. 【0053】 As shown in Figure 11, the lead terminal 611 has a surface 617 facing the laminate 626. Holes 618 may be formed on the surface 617 at a position away from the flexible wiring board 410 in a plan view. The same number of holes 618 may be formed as the number of holes 522. The holes 618 reach partway along the thickness direction of the lead terminal 611. As shown in Figure 6, the holes 618 extend, for example, along the X-axis and have a longitudinal direction parallel to the X-axis and a short direction parallel to the Y-axis. In a plan view, the holes 618 intersect with the holes 522. For example, in a plan view, the holes 522 and 618 are perpendicular to each other. Also, as shown in Figure 5, an opening 719 reaching the lead terminal 611 is formed on one surface 717 of the mold 710. The opening 719 extends, for example, along the Y-axis and has a longitudinal direction parallel to the Y-axis and a short direction parallel to the X-axis. For example, in a plan view, all the holes 618 are located inside the opening 719. 【0054】 Conductive bonding material 62 is provided in the holes 618 and opening 719. The conductive bonding material 62 contacts the lead terminals 611 and the conductive layer 121, electrically connecting the lead terminals 611 and the conductive layer 121 to each other. Conductive bonding material 63 is provided in the holes 522, through holes 42 and opening 729. The conductive bonding material 63 contacts the laminate 626, wiring 426 and the conductive layer 222, electrically connecting the laminate 626, wiring 426 and the conductive layer 222 to each other. Conductive bonding materials 62 and 63 are, for example, brazing material, soldering material or sintered metal material. 【0055】 Here, the circuit configuration of the power module 1 according to the embodiment will be described. Figure 15 is a circuit diagram showing the power module according to the embodiment. For simplification, Figure 15 shows one of the two semiconductor elements 100 and one of the two semiconductor elements 200, but the two semiconductor elements 100 are connected in parallel with each other, and the two semiconductor elements 200 are connected in parallel with each other. The power module 1 has the half-bridge circuit shown in Figure 15. 【0056】 As shown in Figure 15, the electrode 112 of semiconductor element 100 is electrically connected to the conductive layer 121 as a P terminal via lead terminal 611 and conductive bonding material 62, and the electrode 211 of semiconductor element 200 is electrically connected to the conductive layer 222 as an N terminal via wiring 426 and conductive bonding material 63. In addition, the electrode 111 of semiconductor element 100 is electrically connected to the conductive layers 122 and 221 as O terminals via wiring 416 and conductive bonding material 61, and the electrode 212 of semiconductor element 200 is electrically connected to the conductive layers 122 and 221 as O terminals via lead terminal 621 and conductive bonding material 61. Furthermore, lead terminals 612 and 621 are electrically connected to each other by conductive pins 60 and conductive bonding material 61. The P terminal is the positive input terminal, the N terminal is the negative input terminal, and the O terminal is the output terminal. Therefore, currents flow in opposite directions through conductive layer 121 and conductive layer 222. 【0057】 Furthermore, the electrode 113 of semiconductor element 100 is electrically connected to the conductive layer 123, which serves as a control terminal, via wiring 417 and conductive pin 171, and the electrode 213 of semiconductor element 200 is electrically connected to the conductive layer 223, which serves as a control terminal, via wiring 427 and conductive pin 271. Therefore, the electrode 113 of semiconductor element 100 receives a control signal from the conductive layer 123, and the electrode 213 of semiconductor element 200 receives a control signal from the conductive layer 223. 【0058】 Furthermore, wiring 416 is electrically connected to conductive layer 124 as a sense source terminal via wiring 416A and conductive pin 172, and wiring 426 is electrically connected to conductive layer 224 as a sense source terminal via wiring 426A and conductive pin 272. In addition, in a plan view, conductive layer 125 overlaps with conductive layers 223 and 224, and conductive layer 225 overlaps with conductive layers 123 and 124. Therefore, conductive layer 125 functions as a shielding layer for conductive layer 223, and conductive layer 225 functions as a shielding layer for conductive layer 123. 【0059】 In this way, in the power module 1, the semiconductor element 100 is bonded to one surface 413 of the insulating substrate 411, wiring 416 is laminated on the other surface 414 of the insulating substrate 411, the electrode 111 of the semiconductor element 100 is electrically connected to the wiring 416, and the electrode 112 of the semiconductor element 100 is electrically connected to the lead terminal 611. In addition, the semiconductor element 200 is bonded to one surface 423 of the insulating substrate 421, wiring 426 is laminated on the other surface 424 of the insulating substrate 421, the electrode 211 of the semiconductor element 200 is electrically connected to the wiring 426, and the electrode 212 of the semiconductor element 200 is electrically connected to the lead terminal 621. Furthermore, the wiring 416 and the lead terminal 621 are electrically connected to each other by conductive pins 60 and conductive bonding material 61. In this way, a half-bridge circuit is configured. Furthermore, the conductive layer 121 electrically connected to the lead terminal 611 and the conductive layer 222 electrically connected to the wiring 426 overlap in a plan view. Therefore, the distance between the conductive layer 121 and the conductive layer 222, through which currents flow in opposite directions, can be reduced, significantly lowering the inductance. Also, in a plan view, the area occupied by the conductive layers 121 and 222 can be reduced compared to a configuration where the lead terminals 611 and 622 are aligned. Thus, according to this embodiment, a compact power module 1 can be obtained. Moreover, within the width range of the molds 710 and 720 in the Y1-Y2 direction, increasing the width of the lead terminals 611 and 622 in the Y1-Y2 direction has little impact on the overall size of the power module 1. Therefore, increasing the width of the lead terminals 611 and 622 in the Y1-Y2 direction can also reduce the wiring resistance of the lead terminals 611 and 622. 【0060】 Furthermore, the X-axis is inclined from the Y-axis, and in a plan view, the Y-axis along which hole 512 is aligned and the X-axis along which hole 628 is aligned intersect. Therefore, even if a misalignment occurs between semiconductor package 10 and semiconductor package 20 in the XY plane, the conductive pins 60 can easily fit into holes 512 and 628. 【0061】 Since the conductive pins 171, 172, 271, and 272 penetrate and contact the conductive layer provided on one surface 51 or the other surface 52 of the insulating film 50, it is not necessary to provide conductive material such as through-hole vias inside the through-holes 53, 54, 55, and 56 of the insulating film 50. Also, since the conductive pin 60 penetrates the conductive layers 122 and 221 of the insulating film 50 and is electrically connected to the conductive layers 122 and 221 by the conductive bonding material 61, it is not necessary to provide conductive material such as through-hole vias inside the through-hole 57. Therefore, costs can be reduced compared to the case where conductive material such as through-hole vias is provided. 【0062】 In addition, the holes 618 do not necessarily have to be formed in the semiconductor package 10, and the holes 522 and through holes 42 do not necessarily have to be formed in the semiconductor package 20. However, if these are formed, the semiconductor packages 10 and 20 can have the same configuration, which is suitable for mass production of the semiconductor packages 10 and 20. 【0063】 The openings 711 and 721 contribute to heat dissipation. For example, the power module 1 is mounted on a heatsink such that the opening 711 or 721 faces the heatsink, and a thermal interface material (TIM) is provided between the lead terminals 611 or 621 and the heatsink. 【0064】 Although preferred embodiments have been described in detail above, this disclosure is not limited to the embodiments described above, and various modifications and substitutions can be made to the embodiments described above without departing from the scope of the claims. [Explanation of symbols] 【0065】 1 Power Module 10, 20 Semiconductor packages 50 insulating film 60 conductive pins 100, 200 semiconductor devices 111, 112, 113, 211, 212, 213 electrode 121, 122, 123, 124, 125, 221, 222, 223, 224, 225 Conductive layer 410, 420 Flexible Wiring Boards 411, 421 Insulating substrate 412, 422 Adhesive layer 415, 425 wiring layer 416, 416A, 417, 426, 426A, 427 wiring 510, 520 sims 611, 612, 621, 622 lead terminals 616, 626 laminate

Claims

[Claim 1] A first semiconductor element having a first surface and a second surface opposite to the first surface, wherein a first electrode is provided on the first surface and a second electrode is provided on the second surface, A second semiconductor element having a third surface and a fourth surface opposite to the third surface, wherein a third electrode is provided on the third surface and a fourth electrode is provided on the fourth surface, A first insulating substrate having a fifth surface to which the first semiconductor element is bonded, and a sixth surface opposite to the fifth surface, A second insulating substrate having a seventh surface to which the second semiconductor element is bonded, and an eighth surface opposite to the seventh surface, A first conductive member penetrates the first insulating substrate, is electrically connected to the first electrode, and is laminated on the sixth surface of the first insulating substrate, A second conductive member electrically connected to the second electrode, A third conductive member penetrates the second insulating substrate, is electrically connected to the third electrode, and is laminated on the eighth surface of the second insulating substrate, A fourth conductive member electrically connected to the fourth electrode, A fifth conductive member electrically connects the first conductive member and the fourth conductive member, An insulating film provided between the first conductive member and the second conductive member and the third conductive member and the fourth conductive member, having a ninth surface facing the first conductive member and the second conductive member, and a tenth surface facing the third conductive member and the fourth conductive member, A first conductive layer provided on the ninth surface and electrically connected to the second conductive member, A second conductive layer is provided on the tenth surface and electrically connected to the third conductive member, It has, The first conductive layer and the second conductive layer are a power module that overlaps in a plan view. [Claim 2] Having a sixth conductive member bonded to the fifth surface, In a plan view, the first conductive member, the fourth conductive member, and the sixth conductive member overlap. The sixth conductive member has an eleventh surface facing the fourth conductive member, on which the first hole is formed. The fourth conductive member has a twelfth surface facing the sixth conductive member and having a second hole formed therein. The power module according to claim 1, wherein the fifth conductive member is inserted into the first hole and the second hole. [Claim 3] In plan view, The first hole extends along the first axis, The power module according to claim 2, wherein the second hole extends along a second axis inclined from the first axis. [Claim 4] The power module according to claim 3, wherein the first axis and the second axis are orthogonal to each other. [Claim 5] The power module according to any one of claims 2 to 4, wherein the fifth conductive member is in contact with the inner wall surface of the first hole and the inner wall surface of the second hole. [Claim 6] The power module according to any one of claims 1 to 4, further comprising a third conductive layer provided on at least one of the ninth or tenth surface and electrically connected to the first conductive member, the fourth conductive member, and the fifth conductive member. [Claim 7] The power module according to claim 6, further comprising a conductive bonding material for joining the third conductive layer with the first conductive member, the fourth conductive member, and the fifth conductive member. [Claim 8] The first semiconductor element has a fifth electrode provided on the first surface, The second semiconductor element has a sixth electrode provided on the third surface, A seventh conductive member penetrates the first insulating substrate, is electrically connected to the fifth electrode, and is laminated on the sixth surface of the first insulating substrate, An eighth conductive member penetrates the second insulating substrate, is electrically connected to the sixth electrode, and is laminated on the eighth surface of the second insulating substrate, A fourth conductive layer provided on the ninth surface and electrically connected to the seventh conductive member, A fifth conductive layer provided on the tenth surface and electrically connected to the eighth conductive member, A power module according to any one of claims 1 to 4. [Claim 9] A ninth conductive member in contact with the seventh conductive member and the fourth conductive layer, A tenth conductive member that contacts the eighth conductive member and the fifth conductive layer, A power module according to claim 8, having the following features.