Semiconductor device and method for manufacturing a semiconductor device

Abstract

To improve the adhesion of the terminal to the conductive plate. [Solution] The second connecting terminal 23b is partially fixed to the case 20, extends in an extending direction from the inner wall 21a1 toward the unit housing 21e2, and has a joint portion 23b2 which includes a lower surface 23b5 joined to the conductive circuit pattern 11b3 and an upper surface 23b6 with an indentation. The joint portion 23b2 of the second connecting terminal 23b includes an indented joint portion 23b9 on the upper surface 23b6 and a low-rigidity portion 23b7 adjacent to the inner wall 21a1 side of the joint portion 23b9. Furthermore, the thickness of the joint portion 23b2 decreases sequentially from the inner wall 21a1 toward the low-rigidity portion 23b7 and the joint portion 23b9, and in a plan view, the width of the joint portion 23b2 is greatest at the joint portion 23b9.

Description

【Technical Field】 【0001】 The present invention relates to a semiconductor device and a method for manufacturing a semiconductor device. 【Background Art】 【0002】 A semiconductor device includes a semiconductor chip, an insulating circuit board provided with the semiconductor chip, and a case that houses these and integrally forms external connection terminals. Inside the case, the external connection terminals are electrically connected to a conductive plate included in the insulating circuit board (see, for example, Patent Documents 1 and 2). 【Prior Art Documents】 【Patent Documents】 【0003】 【Patent Document 1】 Japanese Patent Application Laid-Open No. 2022-189515 【Patent Document 2】 Japanese Patent Application Laid-Open No. 2017-139304 【Summary of the Invention】 【Problems to be Solved by the Invention】 【0004】 An object of the present invention is to provide a semiconductor device and a method for manufacturing a semiconductor device in which the connectivity of terminals to a conductive plate is improved. 【Means for Solving the Problems】 【0005】 According to one aspect of the present invention, a semiconductor device is provided comprising: a conductive plate; a case having a frame shape in plan view and including an inner surface surrounding a housing area for housing the conductive plate; and a terminal having a portion fixed to the case, extending in an extension direction from the inner surface toward the housing area, and including a joint portion having a lower surface joined to the conductive plate and an upper surface with an indentation, wherein the joint portion of the terminal includes the joint portion with the indentation on the upper surface and a low-rigidity portion adjacent to the inner surface side of the joint portion, the thickness of the joint portion decreasing sequentially from the inner surface toward the extension direction, and the width of the joint portion being largest in plan view at the joint portion. 【0006】 Furthermore, in the joint, in a plan view, the width of the joint has a first width on the inner surface side and a second width on the opposite side of the inner surface, and the second width may be larger than the first width. Furthermore, the first width may be greater than the width of the main body portion excluding the joint portion of the joint, and the width of the joint portion may be smaller than the second width. 【0007】 Furthermore, the main body portion may be located above the joint portion, and the low-rigidity portion may be inclined from the main body portion toward the joint portion. Furthermore, the terminal includes the part fixed to the case, a wiring portion extending into the housing area, and a rising portion connecting the inner surface end of the joint and the extended end of the wiring portion, and the shortest distance from the inner surface to the rising portion may be 1.0 mm or more and 2.0 mm or less. 【0008】 Furthermore, the terminal includes the part fixed to the case, a wiring portion extending into the housing area, and a rising portion that connects the inner surface end of the joint and the extended end of the wiring portion, respectively, and whose upper surface forms a concave curved surface in side view. The edge of the low-rigidity portion included in the upper surface of the joint on the side of the rising portion may be located within 1 mm from the end of the curved surface in the extending direction. 【0009】 Furthermore, the region of the lower surface of the terminal that is included in the joint portion may have a gap with respect to the conductive plate. 【0010】 Furthermore, the thickness of the low-rigidity portion of the joint may be 58% or more and 83% or less of the thickness of the terminal. Furthermore, there may be a gap between the lower surface of the low-rigidity portion of the joint of the terminal and the conductive plate. 【0011】 Furthermore, the terminal may be either a positive terminal or a negative terminal. According to another aspect of the present invention, a method for manufacturing a semiconductor device is provided, comprising: a preparation step of preparing a conductive plate and a case having a frame shape in plan view and including an inner surface surrounding a housing area and terminals, wherein a portion of the terminals is fixed and extends in an extending direction from the inner surface toward the housing area, and includes a joint having a lower surface and an upper surface with a notch; and a joining step of placing the conductive plate in the housing area of ​​the case facing the lower surface of the joint and pressing the region on the extending direction side from the edge of the notch on the upper surface of the joint that is furthest from the inner surface. 【0012】 Furthermore, in the joining process, the joining portion may be pressed including the edge of the notch on the upper surface of the joining portion. It should be noted that the above summary of the invention does not enumerate all the necessary features of the present invention. Furthermore, subcombinations of these features may also constitute an invention. [Effects of the Invention] 【0013】 According to the disclosed technology, the bonding of terminals to conductive plates can be improved. [Brief explanation of the drawing] 【0014】 [Figure 1] This is a plan view of the semiconductor device according to the embodiment. [Figure 2] This is a cross-sectional view of the semiconductor device according to the embodiment. [Figure 3]It is a plan view of a semiconductor unit included in the semiconductor device of the embodiment. [Figure 4] It is a side view of a semiconductor unit included in the semiconductor device of the embodiment. [Figure 5] It is a side view of the semiconductor device of the embodiment. [Figure 6] It is a cross-sectional view of a bonding portion of a connection terminal of the semiconductor device of the embodiment. [Figure 7] It is a plan view of a bonding portion of a connection terminal of the semiconductor device of the embodiment. [Figure 8] It is a flowchart of a manufacturing method of the semiconductor device of the embodiment. [Figure 9] It is a cross-sectional view of a connection terminal included in a case of the semiconductor device of the embodiment. [Figure 10] It is a plan view of a connection terminal included in a case of the semiconductor device of the embodiment. <000​​​​​​​​​​​​​​​​​​​​​​​​The embodiments will be described below with reference to the drawings. In the following description, "front surface" and "top surface" refer to the XY plane facing upwards (+Z direction) in the semiconductor device 1 of Figures 1, 2, and 5. Similarly, "up" refers to the upward direction (+Z direction) in the semiconductor device 1 of Figures 1, 2, and 5. "Back surface" and "bottom surface" refer to the XY plane facing downwards (-Z direction) in the semiconductor device 1 of Figures 1, 2, and 5. Similarly, "down" refers to the downward direction (-Z direction) in the semiconductor device 1 of Figures 1, 2, and 5. The same directionality will be used in other drawings as needed. "High position" and "upper position" refer to the upper position (+Z direction) in the semiconductor device 1 of Figures 1, 2, and 5. Similarly, "low position" and "lower position" refer to the lower position (-Z direction) in the semiconductor device 1 of Figures 1, 2, and 5. The terms "front surface," "top surface," "top" and "back surface," "bottom surface," "bottom" and "side surface" are merely convenient expressions for specifying relative positional relationships and do not limit the technical concept of the present invention. For example, "top" and "bottom" do not necessarily mean the vertical direction with respect to the ground. In other words, the directions of "top" and "bottom" are not limited to the direction of gravity. Also, in the following explanation, "main component" refers to a case where it contains 80 vol% or more. Also, "approximately the same" means that it is within a range of ±10%. Also, "perpendicular," "orthogonal," and "parallel" mean that it is within a range of ±10°. 【0016】 The semiconductor device 1 of the embodiment will be described using Figures 1 to 5. Figure 1 is a plan view of the semiconductor device of the embodiment. Figure 2 is a cross-sectional view of the semiconductor device of the embodiment. Figure 3 is a plan view of a semiconductor unit included in the semiconductor device of the embodiment. Figure 4 is a side view of a semiconductor unit included in the semiconductor device of the embodiment. Figure 5 is a side view of the semiconductor device of the embodiment. 【0017】 Figure 2 is a cross-sectional view taken along the dashed line II in Figure 1. Figure 4 is a side view (YX plane) of the semiconductor unit 10 in Figure 3, viewed in the +Y direction. Figure 5 is a side view (YX plane) of the semiconductor device 1 in Figure 1, viewed in the +Y direction. Also, the sealing members are not shown in Figures 1 and 2. The sealing members may be filled into the unit housing sections 21e1, 21e2, and 21e3 of the case 20, respectively. 【0018】 The semiconductor device 1 includes a semiconductor module 2 and a cooling module 3. The semiconductor module 2 also includes semiconductor units 10a, 10b, and 10c and a case 20 that houses the semiconductor units 10a, 10b, and 10c. The semiconductor units 10a, 10b, and 10c housed in the case 20 are sealed by a sealing member (not shown). 【0019】 The semiconductor units 10a, 10b, and 10c all have the same configuration. Unless otherwise specified, the semiconductor units 10a, 10b, and 10c will be described simply as semiconductor unit 10. Details of semiconductor unit 10 will be described later. 【0020】 Case 20 includes a frame 21, first connection terminals 22a, 22b, 22c, second connection terminals 23a, 23b, 23c, W-phase output terminal 24a, V-phase output terminal 24b, U-phase output terminal 24c, and control terminals 25a, 25b, 25c. 【0021】 The frame portion 21 is roughly rectangular in plan view and includes outer walls 21a, 21b, 21c, 21d that surround it on all four sides in order, and inner walls 21a1, 21b1, 21c1, 21d1 that are opposite to the outer walls 21a, 21b, 21c, 21d, respectively. Furthermore, the frame portion 21 includes an upper surface 21f and a lower surface 21g that are connected to the outer walls 21a, 21b, 21c, 21d and the inner walls 21a1, 21b1, 21c1, 21d1. In addition, the outer walls 21a, 21c and the inner walls 21a1, 21c1 extend in the longitudinal direction corresponding to the long sides of the frame portion 21, and the outer walls 21b, 21d and the inner walls 21b1, 21d1 extend in the short direction corresponding to the short sides of the frame portion 21. Furthermore, the connection points of the outer walls 21a, 21b, 21c, and 21d, as well as the corners of the connection points of the inner walls 21a1, 21b1, 21c1, and 21d1, do not necessarily have to be right angles, and may be rounded off as shown in Figure 1. Fastening holes 21i that penetrate the frame 21 in the ±Z direction may be formed at the corners of the upper surface 21f and lower surface 21g of the frame 21. 【0022】 The frame portion 21 contains an opening 21e inside, which is surrounded on all four sides in order by inner walls 21a1, 21b1, 21c1, and 21d1. That is, the opening 21e is rectangular in shape in plan view and is defined by the inner walls 21a1, 21b1, 21c1, and 21d1 (inner surfaces). The opening 21e opens from the upper surface 21f to the lower surface 21g of the frame portion 21. 【0023】 The frame portion 21 further includes unit housing portions 21e1, 21e2, and 21e3 within the opening 21e, which are housing areas for semiconductor units 10a, 10b, and 10c. The unit housing portions 21e1, 21e2, and 21e3 are provided sequentially along the outer walls 21a, 21c and inner walls 21a1, 21c1 of the opening 21e, which is divided into three sections in a plan view. A step may be provided in the inner wall 21c1 on the outer wall 21c side of the unit housing portions 21e1, 21e2, and 21e3. 【0024】 The semiconductor units 10a, 10b, and 10c are each joined to the cooling surface 3a of the cooling module 3 by joining members 14a. When the frame 21 is attached to the cooling surface 3a of the cooling module 3, the semiconductor units 10a, 10b, and 10c are housed in the unit housing sections 21e1, 21e2, and 21e3 of the frame 21, respectively. The frame 21 may also be bonded to the cooling surface 3a of the cooling module 3 with an adhesive (not shown). 【0025】 In plan view, the frame portion 21 is provided with positive first connection terminals 22a, 22b, 22c and negative second connection terminals 23a, 23b, 23c on the outer wall 21a side. The first connection terminals 22a, 22b, 22c include connection portions 22a1, 22b1, 22c1 on one side and joining portions 22a2, 22b2, 22c2 on the other side. Similarly, the second connection terminals 23a, 23b, 23c include connection portions 23a1, 23b1, 23c1 on one side and joining portions 23a2, 23b2, 23c2 on the other side. 【0026】 One of the connecting parts 22a1, 22b1, 22c1 and the other connecting parts 23a1, 23b1, 23c1 are located on the upper surface 21f of the outer wall 21a. These connecting parts (not shown in numerals) may have openings. Nuts may be housed on the upper surface 21f of the frame part 21 where the connecting parts are located, facing the openings of the connecting parts. 【0027】 The other joints 22a2, 22b2, 22c2 and 23a2, 23b2, 23c2 extend into the unit housing sections 21e1, 21e2, 21e3 and are electrically connected to the semiconductor units 10a, 10b, 10c. 【0028】 Note that a portion of the intermediate parts between the connection and joint portions of the first connection terminals 22a, 22b, 22c and the second connection terminals 23a, 23b, 23c is contained within the frame 21, while the remainder is exposed in the unit housing portions 21e1, 21e2, 21e3 of the frame 21. The first connection terminals 22a, 22b, 22c and the second connection terminals 23a, 23b, 23c may have similar configurations. Details of the first connection terminals 22a, 22b, 22c and the second connection terminals 23a, 23b, 23c will be described later. 【0029】 In a plan view, the frame portion 21 is provided with W-phase output terminals 24a, V-phase output terminals 24b, and U-phase output terminals 24c on the outer wall 21c side. The W-phase output terminals 24a, V-phase output terminals 24b, and U-phase output terminals 24c are provided with connection portions 24a1, 24b1, and 24c1 on one end and joining portions 24a2, 24b2, and 24c2 on the other end. 【0030】 One of the connecting parts 24a1, 24b1, and 24c1 is located on the upper surface 21f of the outer wall 21c. These connecting parts may have openings. Nuts may be housed on the upper surface 21f of the frame part 21 where these connecting parts are located, facing the openings of the connecting parts. 【0031】 The other joints 24a2, 24b2, and 24c2 extend into the unit housing sections 21e1, 21e2, and 21e3 and are electrically connected to the semiconductor units 10a, 10b, and 10c. A portion of the intermediate part between the connection and joint between the W-phase output terminal 24a, the V-phase output terminal 24b, and the U-phase output terminal 24c is included within the frame section 21, and the remainder is exposed in the unit housing sections 21e1, 21e2, and 21e3 of the frame section 21. The W-phase output terminal 24a, the V-phase output terminal 24b, and the U-phase output terminal 24c may have similar configurations. 【0032】 Therefore, in a plan view, the frame portion 21 includes a first connection terminal 22a and a second connection terminal 23a on the outer wall 21a side, and a W-phase output terminal 24a on the outer wall 21c side, flanking the unit housing portion 21e1. Similarly, in a plan view, the frame portion 21 includes a first connection terminal 22b and a second connection terminal 23b on the outer wall 21a side, flanking the unit housing portion 21e2, and a V-phase output terminal 24b on the outer wall 21c side. Similarly, in a plan view, the frame portion 21 includes a first connection terminal 22c and a second connection terminal 23c on the outer wall 21a side, flanking the unit housing portion 21e3, and a U-phase output terminal 24c on the outer wall 21c side. 【0033】 The control terminals 25a, 25b, and 25c are provided on the upper surface 21f on the outer wall 21c side, along the outer wall 21c, for each unit housing section 21e1, 21e2, and 21e3. One end of each control terminal 25a, 25b, and 25c extends from the upper surface 21f in the +Z direction. The other end is exposed to the unit housing sections 21e1, 21e2, and 21e3 from a step in the inner wall 21c1 and is electrically connected to the control electrodes of the semiconductor chip, which will be described later, for example, via a wire 26. The wire 26 is mainly composed of a material with excellent conductivity. Such a material is, for example, gold, copper, aluminum, or an alloy containing at least one of these. Preferably, the wire 26 may be an aluminum alloy containing a small amount of silicon. 【0034】 The first connection terminals 22a, 22b, 22c, the second connection terminals 23a, 23b, 23c, the W-phase output terminal 24a, the V-phase output terminal 24b, the U-phase output terminal 24c, and the control terminals 25a, 25b, 25c are made of a metal with excellent conductivity. Such metals are, for example, copper, aluminum, or an alloy mainly composed of at least one of these. The surfaces of the first connection terminals 22a, 22b, 22c, the second connection terminals 23a, 23b, 23c, the W-phase output terminal 24a, the V-phase output terminal 24b, the U-phase output terminal 24c, and the control terminals 25a, 25b, 25c may be plated. In this case, the plating material used is, for example, nickel, nickel-phosphorus alloy, or nickel-boron alloy. 【0035】 Such a frame portion 21 includes first connection terminals 22a, 22b, 22c, second connection terminals 23a, 23b, 23c, W-phase output terminal 24a, V-phase output terminal 24b, U-phase output terminal 24c, and control terminals 25a, 25b, 25c, and is integrally molded by injection molding using a thermoplastic resin. Examples of thermoplastic resins include polyphenylene sulfide resin, polybutylene terephthalate resin, polybutylene succinate resin, polyamide resin, or acrylonitrile butadiene styrene resin. 【0036】 The sealing member that seals the unit housing sections 21e1, 21e2, and 21e3 of the frame section 21 may be a silicone gel or a thermosetting resin. Examples of thermosetting resins include epoxy resin, phenolic resin, maleimide resin, and polyester resin. The sealing member only needs to be able to seal the entire semiconductor units 10a, 10b, and 10c housed in the unit housing sections 21e1, 21e2, and 21e3, and does not need to seal the entire unit housing sections 21e1, 21e2, and 21e3. It is desirable that the portions of the first connection terminals 22a, 22b, and 22c, the second connection terminals 23a, 23b, and 23c, the W-phase output terminal 24a, the V-phase output terminal 24b, the U-phase output terminal 24c, and the control terminals 25a, 25b, and 25c that are exposed to the unit housing sections 21e1, 21e2, and 21e3 be sealed. 【0037】 The semiconductor unit 10 may be a device that constitutes a single-phase inverter circuit. Such a semiconductor unit 10 includes an insulating circuit board 11, semiconductor chips 12a and 12b, and lead frames 13a and 13b. The semiconductor chips 12a and 12b are bonded to the insulating circuit board 11 by a bonding member 14b. The lead frames 13a and 13b are bonded to the main electrodes on the upper surfaces of the semiconductor chips 12a and 12b and to the upper surface of the insulating circuit board 11 by a bonding member 14c. In addition, the lead frames 13a and 13b may be bonded to the insulating circuit board 11 by ultrasonic bonding instead of bonding member 14c. 【0038】 The insulated circuit board 11 includes an insulating plate 11a, conductive circuit patterns 11b1, 11b2, 11b3, and a metal plate 11c. The insulating plate 11a is rectangular in shape when viewed from above. The corners of the insulating plate 11a may be rounded (R-chamfered) or chamfered (C-chamfered). 【0039】 The insulating plate 11a is made of a material that has insulating properties and excellent thermal conductivity. Such an insulating plate 11a may be made of ceramics. Examples of ceramics include aluminum oxide, aluminum nitride, and silicon nitride. 【0040】 The insulating board 11a may be made of a resin. The resin may be a material with low thermal resistance and high insulating properties. Examples of such resins include thermosetting resins and thermoplastic resins. Such resins may further contain fillers. Examples of thermosetting resins include at least one of epoxy resins, cyanate resins, benzoxazine resins, unsaturated polyester resins, phenolic resins, melamine resins, silicone resins, and maleimide resins. Examples of thermoplastic resins include at least one of polyimide resins, acrylic resins, and polyamide resins. The filler is made of at least one of oxides and nitrides. Examples of oxides include silicon oxide and aluminum oxide. Examples of nitrides include silicon nitride, aluminum nitride, and boron nitride. Furthermore, hexagonal boron nitride may also be used as the filler. 【0041】 The conductive circuit patterns 11b1, 11b2, and 11b3 are examples of conductive plates and are formed on the front surface of the insulating plate 11a. The conductive circuit patterns 11b1, 11b2, and 11b3 are made of a metal with excellent conductivity. Such metals are, for example, copper, aluminum, or an alloy mainly composed of at least one of these. The surfaces of the conductive circuit patterns 11b1, 11b2, and 11b3 may be plated to improve corrosion resistance. The plating material used in this case is, for example, nickel, nickel-phosphorus alloy, or nickel-boron alloy. 【0042】 The conductive circuit pattern 11b1 occupies half of the +X-direction side of the front surface of the insulating plate 11a, and extends from the -Y-direction side to the +Y-direction side. The area enclosed by the dashed line shown in the conductive circuit pattern 11b1 is where the joints 22a2, 22b2, and 22c2 of the first connection terminals 22a, 22b, and 22c are joined. These may be joined by ultrasonic bonding. 【0043】 The conductive circuit pattern 11b2 occupies half of the front surface of the insulating plate 11a in the -X direction. Furthermore, the conductive circuit pattern 11b2 occupies the front surface of the insulating plate 11a from the -Y direction edge to just before the +Y direction edge. The conductive circuit pattern 11b2 is joined to the junctions 24a2, 24b2, and 24c2 of the W-phase output terminal 24a, V-phase output terminal 24b, and U-phase output terminal 24c, respectively. These may be joined by ultrasonic bonding. 【0044】 The conductive circuit pattern 11b3 is located on the -Y side of the -X direction edge of the front surface of the insulating plate 11a, on half of the area. That is, the conductive circuit pattern 11b3 occupies the area of ​​the upper surface of the insulating plate 11a excluding the conductive circuit patterns 11b1 and 11b2. The area enclosed by the dashed line shown in the conductive circuit pattern 11b3 is where the joints 23a2, 23b2, and 23c2 of the second connection terminals 23a, 23b, and 23c are joined. These may be joined by ultrasonic bonding. 【0045】 The metal plate 11c is formed on the lower surface of the insulating plate 11a. The metal plate 11c is rectangular in shape. The area of ​​the metal plate 11c in plan view is smaller than the area of ​​the insulating plate 11a, and larger than the area of ​​the conductive circuit patterns 11b1, 11b2, and 11b3 formed thereon. The corners of the metal plate 11c may be rounded (R-chamfered) or chamfered (C-chamfered). The metal plate 11c is formed over the entire surface of the insulating plate 11a, excluding the edges. This metal is, for example, copper, aluminum, or an alloy containing at least one of these. The surface of the metal plate 11c may be plated to improve its corrosion resistance. The plating material used in this case is, for example, nickel, nickel-phosphorus alloy, or nickel-boron alloy. 【0046】 If the insulating plate 11a is made of ceramics, for example, a DCB (Direct Copper Bonding) substrate or an AMB (Active Metal Brazed) substrate may be used as the insulating circuit board 11. The insulating circuit board 11 may be attached to the cooling surface 3a of the cooling module 3 via a bonding member 14a. The heat generated by the semiconductor chips 12a and 12b can be conducted to the cooling module 3 via the conductive circuit patterns 11b1 and 11b2, the insulating plate 11a, and the metal plate 11c to dissipate the heat. 【0047】 The joining member 14a may be a brazing material or a thermal interface material. The brazing material mainly consists of, for example, at least one of aluminum alloy, titanium alloy, magnesium alloy, zirconium alloy, or silicon alloy. The thermal interface material includes various materials such as thermally conductive grease, elastomer sheets, RTV (Room Temperature Vulcanization) rubber, gel, and phase change material. By attaching the semiconductor unit 10 to the cooling module 3 via such a brazing material or thermal interface material, the heat dissipation of the semiconductor unit 10 can be improved. 【0048】 Furthermore, the joining members 14b and 14c may be solder. Lead-free solder is used. Lead-free solder mainly consists of an alloy containing at least two of the following elements: tin, silver, copper, zinc, antimony, indium, and bismuth. In addition, the solder may contain additives. Examples of additives include nickel, germanium, cobalt, or silicon. The inclusion of additives in the solder improves wettability, gloss, and bonding strength, thereby improving reliability. In particular, the joining member 14a may be a sintered body. When joining with a sintered body, the sintered material may be, for example, powder of silver, iron, copper, aluminum, titanium, nickel, tungsten, or molybdenum. 【0049】 The semiconductor chips 12a and 12b contain power device elements primarily composed of silicon. The power device elements are RC (Reverse-Conducting)-IGBT (Insulated Gate Bipolar Transistor). The RC-IGBT combines the functions of an IGBT (switching element) and a FWD (Free Wheeling Diode). The upper surface of such semiconductor chips 12a and 12b is provided with control electrodes (gate electrodes, etc.) and output electrodes (emitter electrodes), which are the main electrodes. The lower surface of such semiconductor chips 12a and 12b is provided with input electrodes (collector electrodes), which are the main electrodes. The control electrodes may be provided along one side of the upper surface of the semiconductor chips 12a and 12b (or in the center of one side). The output electrodes may be provided in the center of the upper surface of the semiconductor chips 12a and 12b. The lead frames 13a and 13b are electrically and mechanically joined to the output electrodes of the semiconductor chips 12a and 12b. 【0050】 Furthermore, the semiconductor chips 12a and 12b may include a switching element consisting of a power MOSFET mainly composed of silicon carbide. Such semiconductor chips 12a and 12b are provided on their front surface with a control electrode (gate electrode, etc.) and a main electrode, which is an output electrode (source electrode). The semiconductor chips 12a and 12b are provided on their back surface with a main electrode, which is an input electrode (drain electrode). 【0051】 Furthermore, the semiconductor chips 12a and 12b may each use a pair of switching elements and diode elements, respectively, which are mainly composed of silicon or silicon carbide. The switching elements are, for example, IGBTs and power MOSFETs. Such semiconductor chips 12a and 12b have, for example, an input electrode (drain electrode or collector electrode) as the main electrode on the back surface, and a control electrode (gate electrode) and an output electrode (source electrode or emitter electrode), which is the main electrode, on the front surface. The diode elements are, for example, FWDs such as SBDs (Schottky Barrier Diodes) and PiN (P-intrinsic-N) diodes. Such semiconductor chips 12a and 12b have an output electrode (cathode electrode) as the main electrode on the back surface and an input electrode (anode electrode) as the main electrode on the front surface. 【0052】 The lead frames 13a and 13b electrically connect and wire the semiconductor chips 12a and 12b and the conductive circuit patterns 11b2 and 11b3. Lead frame 13a directly connects the main electrode of semiconductor chip 12b to the conductive circuit pattern 11b3 via the aforementioned bonding member 14c. Lead frame 13b directly connects the main electrode of semiconductor chip 12a to the conductive circuit pattern 11b2 via the aforementioned bonding member 14c. Lead frames 13a and 13b may be joined to the conductive circuit patterns 11b3 and 11b2 by ultrasonic bonding. 【0053】 The lead frames 13a and 13b are made of a metal with excellent conductivity. Such metals are, for example, copper, aluminum, or an alloy mainly composed of at least one of these. The surfaces of the lead frames 13a and 13b may be plated to improve corrosion resistance. The plating material used in this case is, for example, nickel, nickel-phosphorus alloy, or nickel-boron alloy. 【0054】 The cooling module 3 has a cooling surface 3a on its front side where the semiconductor module 2 is placed. Specifically, as previously described, the frame portion 21 is attached to the cooling surface 3a of the cooling module 3 on which the semiconductor units 10a, 10b, and 10c are placed. The cooling surface 3a is wider and flatter than the back surface of the semiconductor module 2. The cooling module 3 may be, for example, a heat dissipation base equipped with heat dissipation fins, or a cooling device in which a refrigerant circulates inside. 【0055】 Next, we will describe the details of the first connection terminals 22a, 22b, 22c and the second connection terminals 23a, 23b, 23c. As previously mentioned, the first connection terminals 22a, 22b, 22c and the second connection terminals 23a, 23b, 23c have similar configurations. Here (and hereafter), we will explain the second connection terminal 23b as an example, using Figures 6 and 7. 【0056】 Figure 6 is a cross-sectional view of the joint portion of the connection terminal of the semiconductor device according to the embodiment. Figure 7 is a plan view of the joint portion of the connection terminal of the semiconductor device according to the embodiment. Figure 6 shows an enlarged view of the portion of the second connection terminal 23b in Figure 2 that extends from the inner wall 21a1 of the frame portion 21 to the unit housing portion 21e2, and Figure 7 shows an enlarged plan view of the second connection terminal 23b in Figure 6. In Figures 6 and 7, the location of the notch 23b8, which will be described later, is indicated by a reference numeral corresponding to the notch. 【0057】 The second connection terminal 23b includes a connection portion 23b1 and a joint portion 23b2, and further integrally includes a wiring portion 23b3 and a rising portion 23b4. The thickness T of the second connection terminal 23b may be substantially uniform overall. The thickness T may be 1.0 mm or more and 1.4 mm or less, for example, 1.2 mm. 【0058】 As previously described, the connecting portion 23b1 is located on the upper surface 21f of the frame portion 21, adjacent to the unit housing portion 21e2, in a plan view. In this case, the lower part of the connecting portion 23b1 may be embedded in the upper surface 21f (see Figures 1 and 2). 【0059】 The joint portion 23b2 extends in the direction of extension (+Y direction) from the inner wall 21a1 (inner surface) toward the unit housing portion 21e2, and has a lower surface 23b5 (joint surface) joined to the conductive circuit pattern 11b3 and an upper surface 23b6 with an indentation. The lower surface 23b5 is joined to the conductive circuit pattern 11b3 of the insulating circuit board 11 by ultrasonic bonding in the region corresponding to the joint portion 23b9 described later. The upper surface 23b6 is formed with an indentation of uneven shape by ultrasonic bonding, which transfers multiple protrusions from the tip of the tool. 【0060】 Such a joint 23b2 includes a joint portion 23b9 with an indentation on its upper surface 23b6 and a low-rigidity portion 23b7 adjacent to the inner wall 21a1 side of the joint portion 23b9. Furthermore, the thickness of the joint 23b2 decreases sequentially from the inner wall 21a1 toward the extension direction (+Y direction) towards the low-rigidity portion 23b7 and then the joint portion 23b9. In addition, in a plan view, the width of the joint 23b2 is greatest at the joint portion 23b9. The width of the joint portion 23b9 will be described later. Incidentally, the width of the main body portion of the second connection terminal 23b excluding the joint portion 23b2 in the ±X direction (width direction) is width W0. The width of each part of the main body portion may be approximately uniform overall. 【0061】 The upper surface 23b6 is pressed, as will be described later, to form a low-rigidity portion 23b7 and a joint portion 23b9 with an indentation. Before the low-rigidity portion 23b7 and the joint portion 23b9 are formed, the upper surface 23b6 has a notch 23b8, which will be described later (see Figure 9). Before the low-rigidity portion 23b7 and the joint portion 23b9 are formed, the upper surface 23b6 includes the upper surface of the notch 23b8 and a flat surface. Furthermore, as will be described later, the joint portion 23b2 and the rising portion 23b4 are integrally connected. The upper surface of the rising portion 23b4 (the side facing the +Y and +Z directions in Figure 6) has a concave curved surface (R surface) in side view. The connection point between the upper surface 23b6 of the joint portion 23b2 and the rising portion 23b4 is the end of the curved surface of the rising portion 23b4 in side view. Regarding the thickness (height) of the joint portion 23b9 on which the indentation of the joint portion 23b2 is made, the thickness of the higher part (up to the top of the protrusion) from the lower surface 23b5 is about 0.7 mm. The thickness of the lower part (up to the bottom of the recess) is about 0.4 mm, which may be about one-third of the thickness T of the second connecting terminal 23b. 【0062】 The edge (end) of the rising portion 23b4 of the low-rigidity portion 23b7 is located within, for example, 1 mm in the extension direction (+Y direction) from the end of the curved surface of the upper surface 23b6 of the joint portion 23b2. In Figure 6, the end of the curved surface may be considered as the boundary between the joint portion 23b2 and the rising portion 23b4 (the end on the -Y direction side of length L2, which will be described later). 【0063】 Figure 6 shows the case where the low-rigidity portion 23b7 is separated in the +Y direction from the boundary between the joint portion 23b2 and the rising portion 23b4. Furthermore, the region of the upper surface 23b6 from the boundary between the joint portion 23b2 and the rising portion 23b4 to the edge of the low-rigidity portion 23b7 on the rising portion 23b4 side is a flat region before the joint portion 23b9 is provided and is not pressed when the joint portion 23b9 is provided. For this reason, this region of the upper surface 23b6 may be substantially flat. 【0064】 Furthermore, the low-rigidity portion 23b7 may be stepped relative to the flat area on the upper surface 23b6. That is, on the upper surface 23b6, the low-rigidity portion 23b7 is located lower than the flat area. In a side view, the low-rigidity portion 23b7 may be parallel (flat) to the +Y direction, or it may be inclined at an acute angle with respect to the +Y direction. Figure 6 shows the case where the upper surface of the low-rigidity portion 23b7 is inclined. As a result, there is a gap between the low-rigidity portion 23b7 of the joint 23b2 and the portion corresponding to the boundary thereof, relative to the conductive circuit pattern 11b3. This gap may be, for example, about 0.3 mm. Also, the thickness of the low-rigidity portion 23b7 is, for example, 1.0 mm. 【0065】 The joint portion 23b9 is the area on the upper surface 23b6 where an indentation is made. As will be described later, in ultrasonic bonding, an ultrasonic bonding tool presses the upper surface 23b6 of the joint portion 23b2 against the conductive circuit pattern 11b3 while vibrating ultrasonically, thereby bonding the joint portion 23b2 to the conductive circuit pattern 11b3. The tool has multiple protrusions at the tip that presses against the upper surface 23b6 of the joint portion 23b2. When the upper surface 23b6 of the joint portion 23b2 is pressed by these multiple protrusions of the tool, the uneven shape of the multiple protrusions is transferred and an indentation is made. Therefore, the indentation corresponds to the location on the upper surface 23b6 of the joint portion 23b2 that was pressed by the tool. In addition, the tool may extend beyond the notch side, as will be described later, and press against the upper surface 23b6 of the joint portion 23b2. 【0066】 Furthermore, in a plan view, the joint portion 23b9 is adjacent to the low-rigidity portion 23b7 and extends from the edge on the low-rigidity portion 23b7 side to the tip of the joint portion 23b2. On the upper surface 23b6, the joint portion 23b9 is further stepped relative to the low-rigidity portion 23b7. On the upper surface 23b6, the joint portion 23b9 (the side where the indentation is formed) is located lower than the low-rigidity portion 23b7 (the upper side). Note that the joint portion 23b9 may be separated from the low-rigidity portion 23b7 in the +Y direction (extension direction). Even in this case, the joint portion 23b9 is located lower than the low-rigidity portion 23b7. 【0067】 In this embodiment, the joint portion 23b9 extends from the edge of the low-rigidity portion 23b7 to the tip of the joint portion 23b2. On the other hand, the joint portion 23b9 does not necessarily have to extend to the tip of the joint portion 23b2. In this case, the thickness and width in the ±X direction of the tip portion of the joint portion 23b2 that is not pressed against the upper surface 23b6 may be the thickness T and width W0 of the main body portion. 【0068】 The joint portion 23b9, formed into joint portion 23b2 by being pressed by the tool, includes a first portion 23b9a that overlaps with a portion of the original notch area and a second portion 23b9b other than the first portion 23b9a. In plan view, the first portion 23b9a is adjacent to the low-rigidity portion 23b7 and is sandwiched between the low-rigidity portion 23b7 and the second portion 23b9b. The second portion 23b9b includes the tip of joint portion 23b2. 【0069】 Furthermore, the first part 23b9a and the second part 23b9b of the joint 23b9 each have different widths (first and second widths) in the ±X direction (width direction). The width of the first part 23b9a is width W1. The width of the second part 23b9b is width W2. Width W1 is greater than the width W0 of the main body, and width W2 is greater than width W1. Therefore, on the upper surface 23b6 of the joint 23b2, the width W2 of the second part 23b9b of the joint 23b9 > the width W1 of the first part 23b9a of the joint 23b9 > the width W0 of the main body, and the width W2 of the second part 23b9b of the joint 23b9 is the largest on the joint 23b2. 【0070】 The wiring section 23b3 is located above the joint section 23b2 (in the +Z direction). The wiring section 23b3 is included in the frame section 21, with one end connected to the connection section 23b1 and a portion fixed to the frame section 21. The portion of the wiring section 23b3 included in the frame section 21 may, in a side view, be hook-shaped, for example. The other end of the wiring section 23b3, opposite to one end, extends the frame section 21 in the +Y direction and protrudes from the inner wall 21a1 of the frame section 21 perpendicular to the inner wall 21a1 into the unit housing section 21e2. 【0071】 The rising portion 23b4 connects the other end (end) of the extension of the wiring portion 23b3, which is of a different height, to the end of the joint portion 23b2 on the inner wall 21a1 side. The inside and outside of the connection point between the upper end of the rising portion 23b4 and the extension of the wiring portion 23b3 are curved surfaces (R surfaces). This connection point (the surface of the rising portion 23b4 facing the inner wall 21a1) is separated from the inner wall 21a1 by a distance G. The shortest distance between this connection point and the tip of the joint portion 23b2 is length L1. The distance G may be about the thickness T of the first connection terminal 22b, and is between 1.2 mm and 1.7 mm, for example, about 1.5 mm. 【0072】 Furthermore, the inner and outer surfaces of the connection point between the lower end of the rising portion 23b4 and the end of the joint portion 23b2 on the inner wall 21a1 side are also curved (R-surface). The shortest distance between the boundary between the rising portion 23b4 and the joint portion 23b2 and the tip of the joint portion 23b2 is length L2. Also, in a plan view, the widthwise length between the rising portion 23b4 and at least the portion of the wiring portion 23b3 exposed from the inner wall 21a1 is width W0. 【0073】 Furthermore, at the connection point (corner) between the rising portion 23b4 and the joint portion 23b2, the intersection point C of a line passing through the inner wall 21a1 side surface of the rising portion 23b4 in the ±Z direction and a line passing through the lower surface 23b5 of the joint portion 23b2 in the ±Y direction is defined as a virtual intersection point, and a corner (virtual corner) is formed. In addition, the length of the rising portion 23b4 in the ±Y direction (length L1 - length L2) is, for example, 2.8 mm or more and 3.2 mm or less, and may be, for example, 3.0 mm. 【0074】 Next, the manufacturing method of the semiconductor device 1 will be explained using Figure 8. Figure 8 is a flowchart of the manufacturing method of the semiconductor device according to the embodiment. First, a preparation step is performed to prepare the components of the semiconductor device 1 (step P1 in Figure 8). Examples of components to be prepared include an insulating circuit board 11, semiconductor chips 12a and 12b, lead frames 13a and 13b, a cooling module 3, and a case 20. Other components necessary for the semiconductor device 1 may also be prepared. Manufacturing equipment used to manufacture the semiconductor device 1 may also be prepared. 【0075】 Here, the second connection terminal 23b of case 20, which is prepared in the preparation step, will be explained using Figures 9 and 10. Figure 9 is a cross-sectional view of the connection terminal included in the case of the semiconductor device of the embodiment. Figure 10 is a plan view of the connection terminal included in the case of the semiconductor device of the embodiment. Note that Figure 9 corresponds to Figure 6 of case 20. Figure 10 corresponds to Figure 7 of case 20. 【0076】 Furthermore, although the second connection terminal 23b is described here, the same applies to the first connection terminals 22a, 22b, and 22c, the second connection terminals 23a and 23c, the W-phase output terminal 24a, the V-phase output terminal 24b, and the U-phase output terminal 24c. 【0077】 As previously described, the second connection terminal 23b included in the case 20 prepared in the preparation process includes a connection portion 23b1, a joint portion 23b2, and a wiring portion 23b3 and a rising portion 23b4 integrally provided between the connection portion 23b1 and the joint portion 23b2. 【0078】 A notch 23b8 is formed on the upper surface 23b6 of the joint portion 23b2 before the second connection terminal 23b is joined to the insulating circuit board 11. The notch 23b8 is formed at a position a predetermined distance in the +Y direction from the boundary between the joint portion 23b2 and the rising portion 23b4 on the upper surface 23b6. The notch 23b8 may be provided on the joint portion 23b2 of the second connection terminal 23b by, for example, etching or machining. The notch 23b8 traverses the joint portion 23b2 parallel to the width direction of the joint portion 23b2 in the ±X direction. The width (in the ±X direction) of the notch 23b8 provided by etching or machining may be the width W0 of the joint portion 23b2 in a plan view. 【0079】 Furthermore, the depth of the notch 23b8 should be such that the strength of the second connecting terminal 23b is maintained above a certain level, for example, it may be 58% or more and 83% or less of the thickness T of the second connecting terminal 23b. The thickness of the portion of the second connecting terminal 23b in which the notch 23b8 is formed may be about 1.0 mm. The shape of the notch 23b8 in side view may be rectangular, arc-shaped, or triangular. If the notch 23b8 is rectangular or arc-shaped, the length in the ±Y direction may be, for example, 1 / 2 or more and 1 or less of the thickness T of the second connecting terminal 23b. Also, if it is rectangular, the corners of the bottom surface on the lower surface 23b5 side may be rounded off. 【0080】 Next, the semiconductor unit manufacturing process for manufacturing the semiconductor unit 10 is carried out (process P2 in Figure 8). First, semiconductor chips 12b and 12a are set on the conductive circuit patterns 11b1 and 11b2 of the insulating circuit board 11 via bonding members. Furthermore, lead frames 13b and 13a are set on the main electrode and conductive circuit pattern 11b2 on the front surface of semiconductor chip 12a, and on the main electrode and conductive circuit pattern 11b3 on the front surface of semiconductor chip 12b, via bonding members. 【0081】 The insulated circuit board 11, semiconductor chips 12a, 12b, and lead frames 13a, 13b, which are set in this manner, are heated to melt the bonding member. The melted bonding member hardens, and the semiconductor chips 12a, 12b are bonded to the conductive circuit patterns 11b1, 11b2 by the bonding member 14b. In addition, the lead frame 13a is bonded to the main electrode and conductive circuit pattern 11b3 of the semiconductor chip 12b by the bonding member 14c, and the lead frame 13b is bonded to the main electrode and conductive circuit pattern 11b2 of the semiconductor chip 12a by the bonding member 14c. As a result, the semiconductor unit 10 is obtained. 【0082】 Next, a bonding process is performed to bond the semiconductor unit 10 to the cooling module 3 (step P3 in Figure 8). The semiconductor units 10a, 10b, and 10c are bonded to the cooling surface 3a of the cooling module 3 via a bonding member 14a along the longitudinal direction of the cooling surface 3a. 【0083】 Next, a case mounting process is performed in which the case 20 is attached to the cooling module 3 (step P4 in Figure 8). The case 20 is attached to the cooling surface 3a of the cooling module 3 using adhesive (not shown). At this time, the semiconductor units 10a, 10b, and 10c on the cooling surface 3a are housed in the unit housing sections 21e1, 21e2, and 21e3 of the case 20, respectively. 【0084】 The second connection terminal 23b when the case 20 is attached in this manner will be explained with reference to Figures 11 and 12. Figure 11 is a cross-sectional view showing the case attachment process of the semiconductor device manufacturing method of the embodiment. Figure 12 is a plan view showing the case attachment process of the semiconductor device manufacturing method of the embodiment. 【0085】 When the case 20 is attached to the cooling surface 3a of the cooling module 3, as shown in Figures 11 and 12, the lower surface 23b5 of the joint 23b2 of the second connection terminal 23b faces the conductive circuit pattern 11b3 with a gap between them. The joints of the first connection terminals 22a, 22b, 22c, the second connection terminals 23a, 23c, the W-phase output terminal 24a, the V-phase output terminal 24b, and the U-phase output terminal 24c also face the conductive circuit pattern with a gap between them. 【0086】 Next, a first wiring process is performed to join the first connection terminals 22a, 22b, 22c, the second connection terminals 23a, 23b, 23c, the W-phase output terminal 24a, the V-phase output terminal 24b, and the U-phase output terminal 24c to the insulating circuit board 11 (step P5 in Figure 8). As an example, the joining of the second connection terminal 23b to the conductive circuit pattern 11b3 of the insulating circuit board 11 will be explained using Figures 13 and 14. Figure 13 is a cross-sectional view showing the first wiring process (before joining) of the semiconductor device manufacturing method of the embodiment. Figure 14 is a cross-sectional view showing the first wiring process (during joining) of the semiconductor device manufacturing method of the embodiment. 【0087】 During the case mounting process, the tool 4 of the ultrasonic bonding device is set on the upper surface 23b6 of the joint portion 23b2 of the second connection terminal 23b, whose lower surface 23b5 faces the conductive circuit pattern 11b3. For example, as shown in Figure 13, multiple protrusions at the tip of the tool 4 are positioned on the upper surface 23b6 of the joint portion 23b2 of the second connection terminal 23b. In particular, at this time, the tool 4 is positioned on the edge of the notch 23b8 that is farther from the inner wall 21a1. That is, the end of the tool 4 protrudes into the notch 23b8 and is positioned on the upper surface 23b6. 【0088】 While the tool 4 is subjected to ultrasonic vibration, the joint portion 23b2 is pressed against the conductive circuit pattern 11b3. At this time, as previously described, the distance G from the inner wall 21a1 to the rising portion 23b4 of the second connection terminal 23b is narrow, between 1.2 mm and 1.7 mm, and the rigidity of the part of the second connection terminal 23b corresponding to the distance G is high (see Figure 9). For this reason, the second connection terminal 23b, which is pressed by the tool 4 against the joint portion 23b2, is fixed to the frame portion 21 by the wiring portion 23b3, and the part of the wiring portion 23b3 corresponding to the distance G and the rising portion 23b4 hardly bend. In this embodiment, the distance G is smaller for the first connection terminals 22a, 22b, 22c and the second connection terminals 23a, 23b, 23c than for the W-phase output terminal 24a, V-phase output terminal 24b, and U-phase output terminal 24c. Therefore, the first connection terminals 22a, 22b, 22c and the second connection terminals 23a, 23b, 23c are less prone to bending than the W-phase output terminal 24a, the V-phase output terminal 24b, and the U-phase output terminal 24c. 【0089】 On the other hand, the joint portion 23b2 of the second connection terminal 23b has a notch 23b8. As a result, the thickness of the portion of the joint portion 23b2 with the notch 23b8 is reduced, and the rigidity of this portion is lower than that of other portions. Furthermore, the tool 4 is positioned on one edge of the notch 23b8 on the upper surface 23b6 of the joint portion 23b2 that is furthest from the inner wall 21a1 and applies pressure. As a result, one edge of the notch 23b8 is crushed by the tool 4, and at the same time, the portion of the joint portion 23b2 corresponding to the notch 23b8 flexes. As a result, as shown in Figure 14, the lower surface 23b5 of the joint portion 23b9 that is pressed and crushed by the tool 4 of the joint portion 23b2 comes into contact with the conductive circuit pattern 11b3 and is securely joined. 【0090】 Furthermore, the portion of the joint 23b2 pressed by tool 4 expands in the ±X direction. The joint 23b9 (second portion 23b9b in Figure 7) pressed by tool 4 also expands in the ±X direction. Since this portion is the same thickness as the second connecting terminal 23b before pressing, it expands in the ±X direction due to pressing, resulting in the widest width W2. Also, the joint 23b9 (first portion 23b9a in Figure 7) pressed by tool 4 on the notch 23b8 also expands in the ±X direction. Since this portion is thinner than the second connecting terminal 23b before pressing, it expands in the ±X direction, and due to pressing, it becomes a width W1 that is narrower than width W2. 【0091】 Furthermore, although one edge of the notch 23b8 is crushed, the other edge of the notch 23b is not crushed, and as previously described, a low-rigidity portion 23b7 is formed which has lower rigidity than the other parts. When the joint portion 23b2 is pressed against the conductive circuit pattern 11b3, the low-rigidity portion 23b7 bends, and the joint portion 23b9 comes into contact with and is pressed against the conductive circuit pattern 11b3. As previously described, the first connection terminals 22a, 22b, 22c and the second connection terminals 23a, 23b, 23c are less prone to bending than the W-phase output terminal 24a, V-phase output terminal 24b, and U-phase output terminal 24c. Therefore, in order to further reduce the rigidity of the first connection terminals 22a, 22b, 22c and the second connection terminals 23a, 23b, 23c, the depth of the notch 23b8 may be deeper than the depth of the notch 23b8 provided in the W-phase output terminal 24a, V-phase output terminal 24b, and U-phase output terminal 24c. 【0092】 When tool 4 is removed, as shown in Figure 6, an indentation is transferred to the upper surface 23b6 of the joint 23b2 of the second connection terminal 23b, and the joint portion 23b9 of the joint 23b2 corresponding to the indentation is joined to the conductive circuit pattern 11b3. The configuration of the second connection terminal 23b at this time is as previously described. Similarly, the joints of the first connection terminals 22a, 22b, 22c, the second connection terminals 23a, 23c, the W-phase output terminal 24a, the V-phase output terminal 24b, and the U-phase output terminal 24c are also joined to the conductive circuit pattern. 【0093】 Next, a second wiring process is performed using wire bonding (process P6 in Figure 8). The control electrodes of the semiconductor chips 12a and 12b and the control terminals 25a, 25b, and 25c are connected by wire 26 using bonding roots. 【0094】 Next, a sealing process is performed in which the insides of the unit housing sections 21e1, 21e2, and 21e3 are sealed with a sealing member (step P7 in Figure 8). After filling the unit housing sections 21e1, 21e2, and 21e3 with the sealing member, it is heated and hardened to seal the insulating circuit board 11, semiconductor chips 12a, 12b, lead frames 13a, 13b, and wires 26. At this time, the gap between the joint portion 23b2 of the second connection terminal 23b and the conductive circuit pattern 11b3 is also sealed with the sealing member. The semiconductor device 1 is thus obtained. 【0095】 Here, a reference example for the second connection terminal 23b will be described. In the above embodiment, a notch 23b8 is formed in the second connection terminal 23b to reduce the rigidity of that part, thereby enabling ultrasonic bonding. In the reference example, the case in which this notch 23b8 is formed in a different location than in the embodiment will be explained using Figures 15 and 16. Figure 15 is a cross-sectional view (before bonding) showing the first wiring process of the semiconductor device manufacturing method of the reference example. Figure 16 is a cross-sectional view (during bonding) showing the first wiring process of the semiconductor device manufacturing method of the reference example. 【0096】 In the reference example, the second connection terminal 23b is formed on the +Y direction side of the rising portion 23b4, close to the joint portion 23b2 (see Figure 15). In this case, the ultrasonic treatment of the conductive circuit pattern 11b3 on the second connection terminal 23b will also be described, similar to step P5 (first wiring step) in Figure 8. The semiconductor device in the reference example is also manufactured according to the manufacturing method in Figure 8. Step P5 will be described below. 【0097】 As shown in Figure 15, the tool 4 of the ultrasonic bonding device is set on the upper surface 23b6 of the joint portion 23b2 of the second connecting terminal 23b, whose lower surface 23b5 faces the conductive circuit pattern 11b3. While the tool 4 is vibrated ultrasonically, the joint portion 23b2 is pressed against the conductive circuit pattern 11b3. At this time, the rigidity of the second connecting terminal 23b is reduced in the portion with the notch 23b8 compared to other portions. As a result, the portion of the second connecting terminal 23b where the notch 23b8 is formed (corresponding to the low-rigidity portion) of the rising portion 23b4 bends. That is, as shown in Figure 16, the second connecting terminal 23b rotates with the portion with the notch 23b8 formed in the rising portion 23b4 as a fulcrum, with the portion below this point rotating towards the conductive circuit pattern 11b3, causing the joint portion 23b2 to tilt. Therefore, the +Y side of the lower surface 23b5 of the joint 23b2 comes into contact with the conductive circuit pattern 11b3. The tip portion of the lower surface 23b5 of the joint 23b2 is joined to the conductive circuit pattern 11b3, and the entire lower surface 23b5 of the joint 23b2 cannot be joined to the conductive circuit pattern 11b3. In this case, the width of the tip portion of the joint 23b2 is wider in the ±X direction than the other portions. Consequently, the joint 23b2 cannot be reliably joined to the conductive circuit pattern 11b3. 【0098】 The semiconductor device 1 described above includes a conductive circuit pattern 11b3, a case 20 that has a frame shape in plan view and includes an inner wall 21a1 surrounding a unit housing portion 21e2 (opening 21e) that houses the conductive circuit pattern 11b3, and a second connection terminal 23b that is partially fixed to the case 20, extends in an extending direction from the inner wall 21a1 toward the unit housing portion 21e2, and includes a joint portion 23b2 having a lower surface 23b5 joined to the conductive circuit pattern 11b3 and an upper surface 23b6 with an indentation. Furthermore, the joint portion 23b2 of the second connection terminal 23b includes a joint portion 23b9 with an indentation on the upper surface 23b6 and a low-rigidity portion 23b7 adjacent to the inner wall 21a1 side of the joint portion 23b9. Furthermore, the thickness of the joint portion 23b2 decreases sequentially from the inner wall 21a1 in the extension direction, with the low-rigidity portion 23b7 and the joint portion 23b9 being the smallest. In a plan view, the width of the joint portion 23b2 is largest at the joint portion 23b9. 【0099】 In such a semiconductor device 1, the joint portion 23b2 of the second connection terminal 23b has lower rigidity than other parts due to the reduced thickness of the low-rigidity portion 23b7. As a result, the joint portion 23b2 of the second connection terminal 23b is flexible in the low-rigidity portion 23b7, and the bonding performance to the conductive circuit pattern 11b3 is reliably improved. Consequently, the second connection terminal 23b is less likely to peel off from the conductive circuit pattern 11b3, and the decrease in reliability of the semiconductor device 1 is suppressed. 【0100】 In the manufacturing of the semiconductor device 1 according to the above embodiment, when pressing the joint portion 23b2 of the second connection terminal 23b with the tool 4, the tool 4 was positioned on the edge of the notch 23b8 on the upper surface 23b6 of the joint portion 23b2. This reduces the rigidity of the notch 23b8 portion of the joint portion 23b2, allowing it to be pressed. The position of the tool 4 relative to the upper surface 23b6 does not necessarily have to be on the edge of the notch 23b8; it may be positioned at a distance from the notch 23b8 in the +Y direction. Even if the tool 4 is at a certain distance from the notch 23b8, the rigidity of the notch 23b8 portion of the joint portion 23b2 is reduced, so the portion of the joint portion 23b2 pressed by the tool 4 is joined to the conductive circuit pattern 11b3. In this way, the joint portion 23b2 maintains the notch 23b8, and a joint portion 23b9 is formed at a distance from the notch 23b8 in the +Y direction. 【0101】 However, if tool 4 presses too far away from the notch 23b8, the joint 23b2 may not flex properly at the notch 23b8. For this reason, in order to ensure that the joint 23b2 flexes at the notch 23b8, it is preferable that tool 4 be positioned at a distance from the notch 23b8, for example, from the joint 23b2 to a distance equal to the thickness of the notch 23b8 portion. [Explanation of Symbols] 【0102】 1 Semiconductor device 2 Semiconductor Modules 3 Cooling Module 3a Cooling surface 4 Tools 10, 10a, 10b, 10c Semiconductor Unit 11 Insulated circuit board 11a Insulating board 11b1, 11b2, 11b3 Conductive circuit patterns 11c metal plate 12a, 12b semiconductor chips 13a, 13b Lead Frames 14a, 14b, 14c Joining members 20 cases 21 Frame section 21a, 21b, 21c, 21d Exterior walls 21a1,21b1,21c1,21d1 Inner wall (inner surface) 21e opening Unit housing section for 21e1, 21e2, and 21e3. 21f top surface 21g bottom 21i fastening hole 22a, 22b, 22c First connection terminal 22a1, 22b1, 22c1 connection section 22a2,22b2,22c2 joint 23a, 23b, 23c Second connection terminal 23a1, 23b1, 23c1 connection section 23a2,23b2,23c2 joint 23b3 Wiring section 23b4 Rising section 23b5 Bottom surface 23b6 Top 23b7 Low rigidity part 23b8 Notch 23b9 Joint part 24a W-phase output terminal 24b V phase output terminal 24c U phase output terminal 24a1, 24b1, 24c1 connection section 24a2,24b2,24c2 joint 25a, 25b, 25c control terminals 26 wires T thickness H Height G distance L1 Length L2 Length C Virtual intersection

Claims

[Claim 1] A conductive plate and A case that forms a frame shape in plan view and includes an inner surface surrounding a housing area for housing the conductive plate, A portion of the case is fixed to the aforementioned case, and the terminal includes a joint portion that extends in an extending direction from the inner surface toward the housing area and has a lower surface joined to the conductive plate and an upper surface with an indentation, It has, The joint portion of the terminal includes a joint portion on the upper surface in which the indentation is made and a low-rigidity portion adjacent to the inner surface side of the joint portion. The thickness of the joint portion decreases sequentially from the inner surface toward the stretching direction, with the low-rigidity portion and the joint portion decreasing in that order. In a plan view, the width of the joint is the largest part of the joint. Semiconductor equipment. [Claim 2] In the aforementioned joint, in a plan view, the width of the joint portion has a first width on the inner surface side and a second width on the opposite side of the inner surface, and the second width is greater than the first width. The semiconductor device according to claim 1. [Claim 3] The first width is greater than the width of the main body portion excluding the joint portion of the joint, The width of the aforementioned joint portion is smaller than the second width. The semiconductor device according to claim 2. [Claim 4] The main body portion is located above the joint portion, and the low-rigidity portion is inclined from the main body portion toward the joint portion. The semiconductor device according to claim 3. [Claim 5] The aforementioned terminal is, A wiring section, which includes the part fixed to the case and extends into the housing area, The joint portion further has a rising portion that connects the end on the inner surface side of the joint portion with the extended end of the wiring portion, The shortest distance from the inner surface to the rising portion is 1.0 mm or more and 2.0 mm or less. The semiconductor device according to claim 1. [Claim 6] The aforementioned terminal is, A wiring section, which includes the part fixed to the case and extends into the housing area, The end on the inner surface side of the joint and the extended end of the wiring portion are connected, and the rising portion further has a curved surface that is concave when viewed from the side. The edge of the low-rigidity portion included in the upper surface of the joint, on the side of the rising portion, is located within 1 mm from the end of the curved surface in the extension direction. The semiconductor device according to claim 1. [Claim 7] The region of the lower surface of the terminal included in the joint portion, corresponding to the low-rigidity portion, has a gap with respect to the conductive plate. The semiconductor device according to claim 6. [Claim 8] The thickness of the low-rigidity portion of the joint is 58% or more and 83% or less of the thickness of the terminal. The semiconductor device according to claim 1. [Claim 9] There is a gap between the lower surface of the low-rigidity portion of the joint of the terminal and the conductive plate. The semiconductor device according to claim 1. [Claim 10] The aforementioned terminal is either a positive terminal or a negative terminal. The semiconductor device according to claim 1. [Claim 11] Preparation steps include preparing a conductive plate and a case that, in plan view, forms a frame shape and includes an inner surface surrounding a housing area and terminals, wherein a portion of the terminals is fixed and extends in an extending direction from the inner surface toward the housing area, and includes a joint having a lower surface and an upper surface with a notch formed therein, A joining step comprising: positioning the conductive plate within the housing area of ​​the case facing the lower surface of the joint, and pressing the region on the extension side from the edge of the notch on the upper surface of the joint that is farther from the inner surface; A method for manufacturing a semiconductor device having [a certain feature]. [Claim 12] In the joining process, the joining portion is pressed, including the edge of the notch on the upper surface of the joining portion. A method for manufacturing a semiconductor device according to claim 11.

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