Magnetic memory element, method for manufacturing a magnetic memory element, and memory device including a magnetic memory element

Abstract

The present invention provides a magnetic memory element, a method for manufacturing a magnetic memory element, and a memory device including a magnetic memory element. [Solution] The disclosed magnetic memory element may include a spin-orbit torque generating layer that generates spin-orbit torque; a spin-current transmission layer provided on the lower surface of the spin-orbit torque generating layer; and a tunneling magnetoresistive layer provided on the lower surface of the spin-current transmission layer, the tunneling magnetoresistive layer including a free layer, a tunnel barrier layer, and a fixed layer. The spin-current transmission layer may be provided to transmit the spin current generated in the spin-orbit torque generating layer to the free layer.

Description

[Technical Field] 【0001】 The present invention relates to a magnetic memory element including a tunneling magnetoresistive layer, a method for manufacturing a magnetic memory element, and a memory device including a magnetic memory element. [Background technology] 【0002】 Magnetic memory devices, such as MRAM (magnetic random access memory), are memory devices that store data using the resistance change of a magnetic tunnel junction element. The resistance of a magnetic tunnel junction element varies depending on the magnetization direction of the free layer. For example, when the magnetization direction of the free layer is the same as that of the pinned layer, the magnetic tunnel junction element may have a relatively low resistance value, and when they are opposite, it may have a relatively high resistance value. When such characteristics are used in a memory device, for example, a magnetic tunnel junction element may indicate data "0" when it has a relatively low resistance value, and indicate data "1" when it has a relatively high resistance value. 【0003】 Such magnetic memory devices have advantages such as being non-volatile, capable of high-speed operation, and having relatively high durability. For example, STT-MRAM (spin-transfer torque-magnetic MRAM), which is currently in mass production, has an operating speed of approximately 5 to 100 nsec and can have excellent data retention for more than 10 years. Furthermore, SOT (spin-orbit torque)-MRAM can have an even faster operating speed of less than 5 nsec than STT-MRAM because the spin polarization direction is perpendicular to the magnetization direction. SOT-MRAM can have even more stable characteristics because the write current path and the read current path are different. [Overview of the Initiative] [Problems that the invention aims to solve] 【0004】 The problem that this invention aims to solve is to provide a magnetic memory element including a tunneling magnetoresistive layer and a memory device including the same. 【0005】 Furthermore, the present invention provides a method for manufacturing a magnetic memory element that includes a tunneling magnetoresistive layer. [Means for solving the problem] 【0006】 A method for manufacturing a magnetic memory element according to an embodiment may include the steps of: sequentially forming a stationary layer material, a tunnel barrier layer material, a free layer material, and a spin current transfer layer material on an electrode material; forming a mask layer on the spin current transfer layer material; removing the spin current transfer layer material, free layer material, tunnel barrier layer material, stationary layer material, and electrode material exposed by the mask layer through a first etching step to form a first electrode, a stationary layer, a tunnel barrier layer, a free layer, and a spin current transfer layer; forming an insulating layer that surrounds the sides of the first electrode, stationary layer, tunnel barrier layer, free layer, and spin current transfer layer and covers the sides and top of the mask layer; performing a second etching step until the top surface of the spin current transfer layer is exposed; and forming a spin orbit torque generating layer in contact with the top surface of the spin current transfer layer. 【0007】 The procedure may further include the step of forming a second electrode and a third electrode spaced apart from each other on the upper surface of the spin current transfer layer. 【0008】 The spin-orbit torque generating layer may include, for example, at least one material or an alloy thereof from among iridium (Ir), manganese (Mn), vanadium (V), chromium (Cr), niobium (Nb), molybdenum (Mo), ruthenium (Ru), tantalum (Ta), tungsten (W), titanium (Ti), rhenium (Re), platinum (Pt), and tungsten (W) having a beta (β) phase. 【0009】 The spin current transfer layer may include, for example, platinum (Pt). 【0010】 The first etching step can be carried out using an ion beam etching method. 【0011】 The second etching step may include the steps of: flattening the upper surface of the insulating layer until the mask layer is exposed; and removing the mask layer by a reactive ion etching method and further flattening the insulating layer. 【0012】 The magnetic memory element according to the embodiment includes a spin-orbit torque generating layer that generates spin-orbit torque; a spin-current transmission layer provided on the lower surface of the spin-orbit torque generating layer; and a tunneling magnetoresistive layer provided on the lower surface of the spin-current transmission layer, the tunneling magnetoresistive layer including a free layer, a tunnel barrier layer, and a fixed layer; wherein the spin-current transmission layer is provided to transmit the spin current generated in the spin-orbit torque generating layer to the free layer; the spin-orbit torque generating layer includes at least one material or an alloy thereof from iridium (Ir), manganese (Mn), vanadium (V), chromium (Cr), niobium (Nb), molybdenum (Mo), ruthenium (Ru), tantalum (Ta), tungsten (W), titanium (Ti), rhenium (Re), platinum (Pt), and tungsten (W) having a beta (β) phase; and the spin-current transmission layer may include platinum (Pt). 【0013】 The spin-orbit torque generating layer includes an orbital Hall conducting layer that provides an orbital Hall current due to the orbital Hall effect, and the orbital Hall conducting layer may include at least one material or an alloy thereof from among iridium (Ir), manganese (Mn), vanadium (V), chromium (Cr), niobium (Nb), molybdenum (Mo), ruthenium (Ru), tantalum (Ta), tungsten (W), titanium (Ti), and rhenium (Re). 【0014】 The orbital Hole conduction layer includes a first orbital Hole conduction layer on the spin current conduction layer and a second orbital Hole conduction layer on the first orbital Hole conduction layer, wherein the first orbital Hole conduction layer and the second orbital Hole conduction layer may contain at least one material or alloy thereof that is different from each other, selected from at least one material from iridium (Ir), manganese (Mn), vanadium (V), chromium (Cr), niobium (Nb), molybdenum (Mo), ruthenium (Ru), tantalum (Ta), tungsten (W), titanium (Ti), and rhenium (Re). 【0015】 The spin-orbit torque generating layer includes a spin-Hall conduction layer that provides a spin-Hall current due to the spin-Hall effect, and the spin-Hall conduction layer may include platinum (Pt) or tungsten (W) having a beta (β) phase. 【0016】 The thickness of the spin current transfer layer is, for example, 0.1 nm or more and 10 nm or less. 【0017】 The spin-orbit torque generating layer may include an orbital Hall conduction layer provided on the spin current transmission layer and providing an orbital Hall current due to the orbital Hall effect, and a spin Hall conduction layer provided on the orbital Hall conduction layer and providing a spin Hall current due to the spin Hall effect. 【0018】 The spin-orbit torque generating layer may include a spin-Hall conduction layer provided on the spin-current transmission layer and providing a spin-Hall current due to the spin-Hall effect, and an orbital-Hall conduction layer provided on the spin-Hall conduction layer and providing an orbital-Hall current due to the orbital-Hall effect. 【0019】 The material further includes an oxide layer provided between the free layer and the spin current transmission layer, wherein the oxide layer is made of magnesium oxide (MgO), tantalum oxide (TaO), or magnesium aluminum oxide (MgAlO x ), aluminum oxide (AlO x ), hafnium oxide (HfO x ), zirconium oxide (ZrO x) Magnesium tantalum oxide (MgTaO x ) Titanium oxide (TiO x ), and tungsten oxide (WO x ) may include at least one of them. 【0020】 The magnetic memory element further includes a diffusion barrier metal layer provided between the free layer and the spin current transmission layer, and the diffusion barrier metal layer may have a single layer or a multilayer structure including at least one metal of tantalum (Ta), tungsten (W), iridium (Ir), titanium (Ti), rhenium (Re), and cobalt (Co) or an alloy thereof. 【0021】 The fixed layer includes a first ferromagnetic layer, a second ferromagnetic layer, and an antiferromagnetic coupling layer between the first ferromagnetic layer and the second ferromagnetic layer, and the magnetization directions of the first ferromagnetic layer and the second ferromagnetic layer are opposite. [[ID=********]] 【0022】 [[ID=********]] The magnetic memory element may further include a first electrode electrically connected to the fixed layer; and a second electrode and a third electrode provided separately on the spin orbit torque generation layer. 【0023】 [[ID=********]] [[ID=********]] 【0024】 [[ID=********]] The spin orbit torque generation layer may include at least one material of, for example, platinum (Pt), iridium (Ir), ruthenium (Ru), and titanium (Ti). 【0025】 The magnetic memory element may further include a plurality of first electrodes electrically connected to the corresponding fixed layers among the plurality of fixed layers of the plurality of tunneling magnetoresistance layers; and a second electrode and a third electrode provided separately on the spin orbit torque generation layer. 【0026】 ​The memory device according to the embodiment includes a plurality of memory cells, each including a magnetic memory element and a switching element connected to the magnetic memory element, wherein the magnetic memory element includes: a spin-orbit torque generating layer that generates spin-orbit torque; a spin-current transmission layer provided on the lower surface of the spin-orbit torque generating layer; and a tunneling magnetoresistive layer provided on the lower surface of the spin-current transmission layer, the tunneling magnetoresistive layer including a free layer, a tunnel barrier layer, and a fixed layer; wherein the spin-current transmission layer is provided to transmit the spin current generated in the spin-orbit torque generating layer to the free layer, the spin-orbit torque generating layer includes at least one material or an alloy thereof from iridium (Ir), manganese (Mn), vanadium (V), chromium (Cr), niobium (Nb), molybdenum (Mo), ruthenium (Ru), tantalum (Ta), tungsten (W), titanium (Ti), rhenium (Re), platinum (Pt), and tungsten (W) having a beta (β) phase, and the spin-current transmission layer may include platinum (Pt). [Effects of the Invention] 【0027】 The magnetic memory element including the tunneling magnetoresistive layer according to the disclosed embodiment may have a relatively fast operating speed of 5 nsec or less or 1 nsec or less. Furthermore, the magnetic memory element according to the disclosed embodiment may operate at a relatively low current density while having a fast operating speed. Therefore, it is possible to realize memory devices such as SOT-MRAM that have a relatively fast operating speed and relatively low power consumption. 【0028】 Furthermore, since the fixed layer is located below the tunnel barrier layer, it is easy to ensure the perpendicular magnetic anisotropy of the fixed layer by forming the fixed layer before the tunnel barrier layer in the manufacturing process, thereby reducing the possibility of damage to the fixed layer due to high temperatures in the subsequent BEOL (Back-End-of-Line) process. 【0029】 Furthermore, in the manufacturing process, since the spin-orbit torque generation layer is formed after the etching process that forms the tunneling magnetoresistive layer, there is no risk of the spin-orbit torque generation layer undergoing a phase change due to the ion beam during the etching process that forms the tunneling magnetoresistive layer. In addition, since the substrate or insulating film placed below the tunneling magnetoresistive layer is used as an etching stop layer during the etching process that forms the tunneling magnetoresistive layer, the tunneling magnetoresistive layer can be etched to a sufficiently deep depth, which can improve the yield. [Brief explanation of the drawing] 【0030】 [Figure 1] This is a cross-sectional view illustrating the schematic configuration of a magnetic memory element according to one embodiment. [Figure 2] This is a cross-sectional view further showing an exemplary wiring structure located below the magnetic memory element shown in Figure 1. [Figure 3] This is a cross-sectional view illustrating a schematic configuration of a magnetic memory element according to another embodiment. [Figure 4A] Figure 1 is a schematic cross-sectional view illustrating a method for manufacturing the magnetic memory element shown. [Figure 4B] Figure 1 is a schematic cross-sectional view illustrating a method for manufacturing the magnetic memory element shown. [Figure 4C] Figure 1 is a schematic cross-sectional view illustrating a method for manufacturing the magnetic memory element shown. [Figure 4D] Figure 1 is a schematic cross-sectional view illustrating a method for manufacturing the magnetic memory element shown. [Figure 4E] Figure 1 is a schematic cross-sectional view illustrating a method for manufacturing the magnetic memory element shown. [Figure 4F] Figure 1 is a schematic cross-sectional view illustrating a method for manufacturing the magnetic memory element shown. [Figure 4G] Figure 1 is a schematic cross-sectional view illustrating a method for manufacturing the magnetic memory element shown. [Figure 4H] Figure 1 is a schematic cross-sectional view illustrating a method for manufacturing the magnetic memory element shown. [Figure 4I] Figure 1 is a schematic cross-sectional view illustrating a method for manufacturing the magnetic memory element shown. [Figure 5] This is a cross-sectional view illustrating a schematic configuration of a magnetic memory element according to another embodiment. [Figure 6] This cross-sectional view illustrates a schematic configuration of a magnetic memory element according to another embodiment. [Figure 7] This cross-sectional view illustrates a schematic configuration of a magnetic memory element according to another embodiment. [Figure 8] This cross-sectional view illustrates a schematic configuration of a magnetic memory element according to another embodiment. [Figure 9] This cross-sectional view illustrates a schematic configuration of a magnetic memory element according to another embodiment. [Figure 10] This cross-sectional view illustrates a schematic configuration of a magnetic memory element according to another embodiment. [Figure 11] This cross-sectional view illustrates a schematic configuration of a magnetic memory element according to another embodiment. [Figure 12] A schematic diagram of a magnetic memory cell including a magnetic memory element according to an embodiment is shown. [Figure 13] Figure 2 is a schematic circuit diagram showing the configuration of a memory device containing multiple memory cells. [Figure 14] This is a schematic cross-sectional view showing the configuration of a memory device according to another embodiment. [Figure 15] This is a conceptual diagram illustrating a schematic element architecture that can be applied to an exemplary electronic device. [Modes for carrying out the invention] 【0031】 The following description will detail a magnetic memory element, a method for manufacturing a magnetic memory element, and a memory device including a magnetic memory element, based on the attached drawings. In the following drawings, the same reference numerals refer to the same components, and the size of each component in the drawings is exaggerated for clarity and convenience of explanation. Furthermore, the embodiments described below are merely examples, and various modifications are possible from such embodiments. 【0032】 The expressions "one of ~", "one or more of ~", "any one of ~", "at least one of ~", and "one selected from ~" in the list of elements below modify the entire list of elements, not the individual elements within the list. For example, "one or more of A, B, and C" and "one or more of A, B, and C" both mean A, B, C, or any combination thereof. Similarly, A and / or B means A, B, or A and B. 【0033】 In the following explanation, the term "identical" is used, but it should be understood that there is some inaccuracy. Therefore, when one element is referred to as identical to another, it should be understood that the element is identical to the other element within the desired manufacturing tolerance range (e.g., ±10%). 【0034】 Where the terms “approximately” or “substantially” are used in relation to numerical values, those values ​​are intended to include manufacturing tolerances (e.g., ±10%) around the stated value. Similarly, where the words “generally” and “substantially” are used in relation to geometric shapes, precision of the geometric shape is not required, but the degree of freedom in shape is intended to be within the scope of this disclosure. Furthermore, it should be understood that regardless of whether numerical values ​​or shapes are transformed “approximately” or “substantially,” such numerical values ​​and shapes must be interpreted as including manufacturing or operational tolerances (e.g., ±10%) around the stated numerical value or shape. 【0035】 In the following, the terms "upper / lower" and "top / bottom" may include not only things that are directly above / below each other through contact, but also things that are above / below each other without direct contact. Singular expressions include plural expressions unless the context clearly indicates otherwise. Furthermore, when a part "contains" a certain component, this means that it includes other components, not excludes them, unless otherwise stated. 【0036】 The use of the term "the foregoing" and similar referential terms can be singular or plural. Unless otherwise explicitly stated, the steps constituting a method are performed in any order, but are not necessarily limited to the order stated. 【0037】 Furthermore, terms such as "...part" and "module" as used in the specification refer to a unit that processes at least one function or operation, which may be embodied by hardware or software, or by a combination of hardware and software. 【0038】 The lines or connecting members between components shown in the drawings exemplify functional and / or physical or circuit connections, and in actual devices, they may be substituted or represent a variety of additional functional, physical, or circuit connections. 【0039】 All use of examples or illustrative terms is solely for the purpose of detailing the technical idea and is not limited by the scope of the claims unless otherwise specified. 【0040】 Figure 1 is a cross-sectional view illustrating a schematic configuration of a magnetic memory element according to one embodiment. Referring to Figure 1, the magnetic memory element 100 according to one embodiment may include a tunneling magnetoresistance layer 120, a spin current transmission layer 131 provided on the tunneling magnetoresistance layer 120, and an orbital Hall conductance layer 132 provided on the spin current transmission layer 131. In other words, the tunneling magnetoresistance layer 120 and the orbital Hall conductance layer 132 may face each other, and the spin current transmission layer 131 may be provided between the tunneling magnetoresistance layer 120 and the orbital Hall conductance layer 132. 【0041】 The tunneling magnetoresistive layer 120 may include a pinned layer 121, a tunnel barrier layer 122 provided on the pinned layer 121, and a free layer 123 provided on the tunnel barrier layer 122. In other words, the pinned layer 121 and the free layer 123 may face each other, and the tunnel barrier layer 122 may be provided between the pinned layer 121 and the free layer 123. The spin current transfer layer 131 may be provided on the free layer 123. In other words, the orbital Hall conduction layer 132 may be provided facing the free layer 123, and the spin current transfer layer 131 may be provided between the orbital Hall conduction layer 132 and the free layer. 【0042】 If we describe the configuration of the magnetic memory element 100 from the top, the magnetic memory element 100 may include an orbital Hole conduction layer 132, a spin current transmission layer 131 provided on the lower surface of the orbital Hole conduction layer 132, and a tunneling magnetoresistive layer 120 provided on the lower surface of the spin current transmission layer 131. The tunneling magnetoresistive layer 120 may be provided on the lower side of the orbital Hole conduction layer 132, facing the lower surface of the orbital Hole conduction layer 132. The spin current transmission layer 131 may be provided between the lower surface of the orbital Hole conduction layer 132 and the upper surface of the tunneling magnetoresistive layer 120. The tunneling magnetoresistive layer 120 may sequentially include a free layer 123, a tunnel barrier layer 122, and a fixed layer 121 from top to bottom. The free layer 123 may be provided on the lower side of the orbital Hole conduction layer 132, facing the lower surface of the orbital Hole conduction layer 132. The spin current transfer layer 131 may be provided between the lower surface of the orbital Hall conduction layer 132 and the upper surface of the free layer 123. In other words, the free layer 123 may be in contact with the lower surface of the spin current transfer layer 131. 【0043】 The fixed layer 121 and the free layer 123 are made of a magnetic ferromagnetic metallic material. For example, the fixed layer 121 and the free layer 123 may include at least one ferromagnetic material selected from the group including iron (Fe), cobalt (Co), nickel (Ni), manganese (Mn), Fe-containing alloys, Co-containing alloys, Ni-containing alloys, Mn-containing alloys, and Heusler alloys. The fixed layer 121 and the free layer 123 may, but are not limited to, be made of the same ferromagnetic material. Furthermore, the free layer 123 may further contain boron (B) to improve the wetting properties of the free layer 123 during the process of depositing the free layer 123 onto the tunnel barrier layer 122. For example, the free layer 123 may contain CoFeB. 【0044】 Furthermore, the fixed layer 121 and the free layer 123 may be configured to have high perpendicular magnetic anisotropy (PMA). That is, the perpendicular magnetic anisotropy energy of the fixed layer 121 and the free layer 123 may exceed the out-of-plane demagnetization energy. In this case, the magnetic moments of the fixed layer 121 and the free layer 123 may be stabilized in the horizontal or planar direction (i.e., the X direction), or in the perpendicular or thickness direction (i.e., the Z direction). 【0045】 The fixed layer 121 may have a fixed magnetization direction. Once the magnetization direction of the fixed layer 121 is determined, it does not change. On the other hand, the free layer 123 may have a variable magnetization direction. The tunneling magnetoresistance layer 120 may have relatively low resistance when the magnetization directions of the fixed layer 121 and the free layer 123 are the same, and relatively high resistance when the magnetization directions of the fixed layer 121 and the free layer 123 are opposite. This phenomenon is called tunneling magnetoresistance (TMR). 【0046】 The free layer 123 may have a relatively low saturation magnetization (Ms) so that the magnetization direction can be easily changed. For this reason, the free layer 123 may be doped with at least one nonmagnetic metal selected from the group including, for example, Mg, Ru, Ir, Ti, Zn, Ga, Ta, Al, Mo, Zr, Sn, W, Sb, V, Nb, Cr, Ge, Si, Hf, Tb, Sc, Y, Rh, In, Ca, Sr, Ba, Be, V, Li, Cd, Pb, and Ga. The doping concentration of the nonmagnetic metal in the free layer 123 is, for example, in the range of about 5 at to 50 at%. 【0047】 The tunnel barrier layer 122 can serve as a tunnel barrier for a magnetic tunneling junction. The tunnel barrier layer 122 may contain crystalline Mg oxide. For example, the tunnel barrier layer 122 may be MgO, MgAl2O4, or MgTiO xIt may include. 【0048】 The magnetization direction of the free layer 123 can be varied by the spin-orbit torque (SOT) generated by the spin current that is generated in the vertical direction (i.e., the Z direction) when a current is applied horizontally (i.e., in the X direction) to the orbital Hall conduction layer 132. In this respect, the magnetic memory element 100 can be applied to SOT (spin-orbit torque) MRAM. Such an orbital Hall conduction layer 132 is also called a "spin-orbit torque generating layer". The orbital Hall conduction layer 132 can switch the magnetization direction of the free layer 123 by providing a spin current to the tunneling magnetoresistive layer 120, in particular to the free layer 123, through the current flowing through the orbital Hall conduction layer 132. For example, the free layer 123 can be magnetized in the +Z direction or the -Z direction depending on the direction of the current applied to the orbital Hall conduction layer 132. 【0049】 The orbital Hall conductive layer 132 according to the embodiment may contain elements or alloys thereof that have a relatively high orbital Hall conductivity (OHC) obtained by the orbital Hall effect (OHE). For example, the orbital Hall conductive layer 132 may contain at least one material or an alloy thereof from among iridium (Ir), manganese (Mn), vanadium (V), chromium (Cr), niobium (Nb), molybdenum (Mo), ruthenium (Ru), tantalum (Ta), tungsten (W), titanium (Ti), and rhenium (Re). For example, the alloy may contain IrMn or PtMn. The thickness of the orbital Hall conductive layer 132 may be, for example, about 1 nm to about 10 nm, or about 3 nm to about 7 nm, or about 4 nm to about 6 nm. 【0050】 According to this embodiment, when an electric current is applied to the orbital Hall conduction layer 132 having a relatively large OHC, an orbital Hall current can be generated in the orbital Hall conduction layer 132. The orbital Hall current can be converted into a spin Hall current by the spin current transmission layer 131. In this respect, the spin current transmission layer 131 can act as a conversion layer that converts the orbital Hall current into a spin Hall current. Furthermore, since current flows through the spin current transmission layer 131 itself, a spin Hall current can be generated by the spin Hall effect (SHE). Consequently, the spin current transmission layer 131 can transmit the spin current generated by the orbital Hall effect and the spin current generated by the spin Hall effect to the free layer 123. Therefore, a relatively large spin current can be generated by the combined action of the orbital Hall conduction layer 132 and the spin current transmission layer 131. As a result, even if the current applied to the orbital Hall conduction layer 132 is relatively small, a sufficient spin current can be obtained to reverse the magnetization (magnetic switching) of the free layer 123 of the tunneling magnetoresistive layer 120, allowing the magnetic memory element 100 to have a relatively low operating current density. 【0051】 The spin current transfer layer 131 may contain a material that can convert orbital Hall current into spin current and spontaneously generate spin current due to the spin Hall effect. Furthermore, the spin current transfer layer 131 may contain a material that exhibits relatively high selectivity in the reactive ion etching (RIE) process described later. For example, the spin current transfer layer 131 may contain platinum (Pt). The thickness of the spin current transfer layer 131 is approximately 0.1 nm to approximately 10 nm, or approximately 0.1 nm to approximately 5 nm, or approximately 0.5 nm to approximately 10 nm, or approximately 0.5 nm to approximately 5 nm, or approximately 0.5 nm to approximately 4 nm, or approximately 1 nm to approximately 3 nm. 【0052】 The magnetic memory element 100 may further include a first electrode 111 for reading the resistance of the tunneling magnetoresistive layer 120, and second and third electrodes 112 and 113 for applying current to the orbital Hall conduction layer 132. The first electrode 111 may be electrically connected to the fixed layer 121. The second and third electrodes 112 and 113 may be provided on the upper surface of the orbital Hall conduction layer 132 spaced apart from each other. When a voltage is applied to the second and third electrodes 112 and 113, an orbital Hall current may be generated while a current flows through the orbital Hall conduction layer 132. 【0053】 Furthermore, the magnetic memory element 100 may further include an insulating layer 141 surrounding the sides of the first electrode 111, the tunneling magnetoresistive layer 120, and the spin current transfer layer 131. A memory device such as SOT MRAM includes a plurality of two-dimensionally arranged magnetic memory elements 100, and the plurality of magnetic memory elements 100 may be electrically isolated from each other by the insulating layer 141. An orbital Hall conduction layer 132 may be provided on the upper surface of the insulating layer 141 so as to be in contact with the upper surface of the spin current transfer layer 131. 【0054】 Figure 2 is a cross-sectional view further illustrating an exemplary wiring structure located beneath the magnetic memory element 100 shown in Figure 1. When the magnetic memory element 100 is used in a memory device such as SOT-MRAM, various circuits, such as output circuits and control circuits, and wiring that electrically connects the magnetic memory element 100 to the circuits may be provided beneath the magnetic memory element 100. Referring to Figure 2, the magnetic memory element 100 may further include wiring 115 provided beneath the first electrode 111 and a via layer 114 that electrically connects the first electrode 111 and the wiring 115. An insulating layer 141 may further extend downward so as to surround the sides of the via layer 114. The wiring 115 may be provided on the underside of the insulating layer 141. 【0055】 Figure 3 is a cross-sectional view illustrating a schematic configuration of a magnetic memory element according to another embodiment. While Figures 1 and 2 show the orbital Hole conduction layer 132 as a single-layer structure, the orbital Hole conduction layer 132 is not limited to this and may have a multilayer structure in which different materials are stacked. Referring to Figure 3, the orbital Hole conduction layer 132 of the magnetic memory element 100e may include a first orbital Hole conduction layer 132a and a second orbital Hole conduction layer 132b provided on the first orbital Hole conduction layer 132a. The first orbital Hole conduction layer 132a may be provided on the spin current transmission layer 131. That is, the first orbital Hole conduction layer 132a may be provided between the spin current transmission layer 131 and the second orbital Hole conduction layer 132b. The second electrode 112 and the third electrode 113 may be provided on the upper surface of the second orbital Hole conduction layer 132b so as to be spaced apart from each other. The first orbital Hole conduction layer 132a and the second orbital Hole conduction layer 132b may contain at least one different material from among iridium (Ir), manganese (Mn), vanadium (V), chromium (Cr), niobium (Nb), molybdenum (Mo), ruthenium (Ru), tantalum (Ta), tungsten (W), titanium (Ti), and rhenium (Re). For example, the first orbital Hole conduction layer 132a may contain iridium (Ir) and the second orbital Hole conduction layer 132b may contain manganese (Mn), or conversely, the first orbital Hole conduction layer 132a may contain manganese (Mn) and the second orbital Hole conduction layer 132b may contain iridium (Ir). 【0056】 As described above, the magnetic memory elements 100 and 100a according to this embodiment reverse the magnetization of the free layer 123 using spin-orbit torque (SOT), and therefore can have a faster operating speed compared to magnetic memory elements that use spin-transfer torque (STT). For example, the magnetic memory elements 100 and 100a according to this embodiment can have a relatively fast operating speed of about 5 nsec or less, or about 1 nsec or less. Furthermore, the magnetic memory elements 100 and 100a according to this embodiment can operate at a relatively low current density while having a fast operating speed, and therefore can have relatively low power consumption. 【0057】 Figures 4A to 4I are schematic cross-sectional views illustrating the method for manufacturing the magnetic memory element 100 shown in Figure 1. 【0058】 Referring to Figure 4A, the electrode material 111' can be formed first. When the magnetic memory element 100 is formed on the circuit layer of a memory device such as SOT-MRAM, an insulating layer 141 can be formed first on the circuit layer. Then, a portion of the insulating layer 141 can be etched to form via holes, and the via holes can be filled with a conductive material to form a via layer 114. After that, the conductive electrode material 111' can be deposited on the insulating layer 141. However, it is not necessarily limited to this, and depending on the application, the electrode material 111' can also be deposited on other substrates. The electrode material 111' may include, for example, TiN or TaN. 【0059】 Referring to Figure 4B, a stationary layer material 121', a tunnel barrier layer material 122', a free layer material 123', and a spin current transfer layer material 131' can be formed sequentially on the electrode material 111'. Although not shown in Figure 4B, a seed layer can be formed first on the electrode material 111', and then the stationary layer material 121' can be formed on the seed layer. The ferromagnetic metallic material used in the stationary layer 121 is mainly determined by its hexagonal close-packed (HCP) structure with a crystal orientation of (0001). The seed layer improves the crystallinity of such a stationary layer material 121', thereby improving the perpendicular magnetic anisotropy of the stationary layer 121. Furthermore, in the structure according to the embodiment in which the stationary layer 121 is located below the tunnel barrier layer 122, the stationary layer material 121' is not formed on the tunnel barrier layer material 122', which is even more advantageous in ensuring the perpendicular magnetic anisotropy of the stationary layer 121 compared to the structure in which the stationary layer 121 is located on the tunnel barrier layer 122. 【0060】 Referring to Figure 4C, a mask layer 150 can be formed on the upper surface of the spin current transfer layer material 131'. The mask layer 150 can be partially formed on the region that remains unetched in the subsequent etching process. 【0061】 Referring to Figure 4D, the spin current transfer layer material 131', free layer material 123', tunnel barrier layer material 122', fixed layer material 121', and electrode material 111' in the remaining region not covered by the mask layer 150 can be sequentially removed through an etching process, except for the region covered by the mask layer 150. The etching process can be carried out, for example, by ion beam etching (IBE). This can form the first electrode 111, fixed layer 121, tunnel barrier layer 122, free layer 123, and spin current transfer layer 131. Alternatively, a tunneling magnetoresistive layer 120 including the fixed layer 121, tunnel barrier layer 122, and free layer 123 can be formed. According to the embodiment, the free layer 123 can be protected by the spin current transfer layer 131 placed on top of it, thereby reducing or preventing damage to the surface of the free layer 123 by the ion beam during the etching process. This is also advantageous for ensuring the perpendicular anisotropy of the free layer 123. 【0062】 Referring to Figure 4E, the portion removed by the etching process described above can be filled with the insulating layer 141. The insulating layer 141 can be formed to cover up to the top surface of the mask layer 150. This allows the insulating layer 141 to completely surround the sides of the first electrode 111, the fixed layer 121, the tunnel barrier layer 122, the free layer 123, and the spin current transfer layer 131. The insulating layer 141 can also cover the sides and top surface of the mask layer 150. 【0063】 Referring to Figure 4F, the upper surface of the insulating layer 141 can be planarized through a planarization process such as CMP (chemical mechanical polishing). Such a planarization process may be carried out until the mask layer 150 is exposed. During the planarization process, the mask layer 150 is not removed and may protrude onto the insulating layer 141. 【0064】 Referring to Figure 4G, the mask layer 150 can be removed through an etching process, further planarizing the insulating layer 141. The etching process can be carried out, for example, by reactive ion etching (RIE). The etching process can be carried out until the upper surface of the spin current transfer layer 131 is exposed. The spin current transfer layer 131 can function as an etching stop film during the etching process. Platinum (Pt), the material of the spin current transfer layer 131, has a relatively high selectivity ratio, for example, 5 or more, for etching gases such as XeF, making it suitable for use as an etching stop film. In addition, the spin current transfer layer 131 can protect other layers while reactive ion etching (RIE) is being carried out. In the additional planarization step shown in Figure 4G, the upper part of the spin current transfer layer 131 may be partially etched, slightly reducing the thickness of the spin current transfer layer 131. Therefore, in the deposition process shown in Figure 4B, the spin current transfer layer material 131' may be deposited slightly thicker than the target thickness of the final spin current transfer layer 131. 【0065】 Referring to Figure 4H, the orbital hole conduction layer material 132' can be formed to cover the entire upper surface of the insulating layer 141. This allows the orbital hole conduction layer material 132' to also cover the upper surface of the spin current transfer layer 131. 【0066】 Referring to Figure 4I, a portion of the orbital Hole conduction layer material 132' that is in contact with the upper surface of the spin current transfer layer 131 can be left, while the rest of the orbital Hole conduction layer material 132' can be removed by etching. This allows the orbital Hole conduction layer 132 that is in contact with the upper surface of the spin current transfer layer 131 to be formed. The width of the orbital Hole conduction layer 132 is wider than the width of the spin current transfer layer 131. This allows a portion of the spin current transfer layer 131 to extend further onto the upper surface of the insulating layer 141. Subsequently, a second electrode 112 and a third electrode 113, spaced apart from each other, can be formed on the upper surface of the spin current transfer layer 131. This completes the magnetic memory element 100. 【0067】 After the additional planarization step shown in Figure 4G, the spin current transmission layer 131 may be exposed to the outside until the orbital Hole conduction layer material 132' shown in Figure 4H is formed. Since platinum (Pt), the material of the spin current transmission layer 131, has relatively high resistance to oxidation, the surface of the spin current transmission layer 131 is hardly oxidized until the orbital Hole conduction layer material 132' is formed. Therefore, in the manufacturing method according to this embodiment, since hardly any oxide is formed at the interface between the spin current transmission layer 131 and the orbital Hole conduction layer 132, the properties of the magnetic memory element 100 can be further improved. 【0068】 Figures 4A to 4I show, for convenience, only one mask layer 150, indicating that one magnetic memory element 100 is formed. However, multiple mask layers 150 arranged in two dimensions can be formed on the spin current transfer layer material 131'. In that case, multiple two-dimensionally arranged magnetic memory elements 100 can be formed simultaneously. For example, in the etching process shown in Figure 4D, multiple first electrodes 111, multiple fixed layers 121, multiple tunnel barrier layers 122, multiple free layers 123, and multiple spin current transfer layers 131, all separated from each other, can be formed simultaneously. In the etching process shown in Figure 4D, an insulating layer 141 or other substrate located below the first electrode 111 can act as an etching stop film. Therefore, etching to a sufficiently deep depth can be achieved in the etching process shown in Figure 4D, potentially improving the yield. For example, it may be possible to prevent some of the ultimately formed magnetic memory elements 100 from being electrically coupled. 【0069】 When the aforementioned magnetic memory element 100 is used in a memory device such as a SOT-RMAM or other electronic device, additional wiring and circuits may be formed on the magnetic memory element 100 through a BEOL (Back-End-of-Line) process. According to the embodiment, since the fixed layer 121 is located below the magnetic memory element 100, the heat transmitted to the fixed layer 121 in the subsequent BEOL process can be reduced. Therefore, the risk of the fixed layer 121 being damaged by high heat in the subsequent BEOL process can be reduced. 【0070】 Figure 5 is a cross-sectional view illustrating a schematic configuration of a magnetic memory element according to another embodiment. Referring to Figure 5, the magnetic memory element 100b may include a spin Hall conductance layer 133 instead of the orbital Hall conduction layer 132 as a "spin orbit torque generation layer". The remaining configuration of the magnetic memory element 100a shown in Figure 5 is the same as the configuration of the magnetic memory element 100 shown in Figure 1. The spin Hall conduction layer 133 may contain elements or alloys thereof that have a relatively large spin Hall conductivity (SHC) due to the spin Hall effect. For example, the spin Hall conduction layer 133 may contain platinum (Pt) or tungsten (W) having a beta (β) phase (e.g., beta-tungsten (βW)). If a current is applied horizontally to the spin Hall conduction layer 133, a spin Hall current can be generated due to the spin Hall effect. The spin current transmission layer 131 can transmit the spin Hall current generated in the spin Hall conduction layer 133 to the free layer 123. The spin-orbit torque generated by such spin Hall currents can cause the magnetization direction of the free layer 123 to change. 【0071】 The magnetic memory element 100b shown in Figure 5 can be manufactured by the same method as the magnetic memory element 100 shown in Figures 4A to 4I. For example, the magnetic memory element 100b can be manufactured by forming a spin Hall conduction layer 133 instead of the orbital Hall conduction layer 132 in the process shown in Figures 4H and 4I. According to the embodiment, the spin Hall conduction layer 133 is formed after the ion beam etching process for forming the tunneling magnetoresistive layer 120 and the reactive ion etching (RIE) process for removing the mask layer 150 and planarizing the insulating layer 141, so there is almost no risk of the material of the spin Hall conduction layer 133 undergoing a phase change during the etching process. 【0072】 FIG. 6 is a cross-sectional view exemplarily showing a schematic configuration of a magnetic memory element according to still another embodiment. Referring to FIG. 6, the magnetic memory element 100c may further include an oxide layer 134 provided between the free layer 123 and the spin current transmission layer 131. When the free layer 123 and the spin current transmission layer 131 are in direct contact, platinum (Pt) of the spin current transmission layer 131 diffuses into the free layer 123, reducing the perpendicular magnetic anisotropy of the free layer 123 and lowering the tunneling magnetoresistance of the tunneling magnetoresistance layer 120. The oxide layer 134 may function as a diffusion prevention layer that prevents or reduces the diffusion of platinum (Pt) of the spin current transmission layer 131 into the free layer 123. The oxide layer 134 may include, for example, at least one material selected from magnesium oxide (MgO), tantalum oxide (TaO), magnesium aluminum oxide (MgAlO x ), aluminum oxide (AlO x ), hafnium oxide (HfO x ), zirconium oxide (ZrO x ), magnesium tantalum oxide (MgTaO x ), titanium oxide (TiO x ), and tungsten oxide (WO x ). 【0073】 FIG. 7 is a cross-sectional view exemplarily showing a schematic configuration of a magnetic memory element according to still another embodiment. Referring to FIG. 7, the magnetic memory element 100d may further include a diffusion barrier metal layer 135 provided between the free layer 123 and the spin current transmission layer 131. When compared with the magnetic memory element 100c shown in FIG. 6, the magnetic memory element 100d shown in FIG. 7 is different in that it includes a diffusion barrier metal layer 135 instead of the oxide layer 134. The diffusion barrier metal layer 135 performs the same function as the oxide layer 134 in that it prevents or reduces the diffusion of platinum (Pt) of the spin current transmission layer 131 in the free layer 123, and is different in that it contains a metal instead of an oxide. Further, the diffusion barrier metal layer 135 may have excellent thermal stability compared to the oxide layer 134. Therefore, it is hardly deformed in the subsequent BEOL process and can thermally protect the fixed layer 121. 【0074】 The diffusion-blocking metal layer 135 may contain at least one metal or alloy thereof from among tantalum (Ta), tungsten (W), iridium (Ir), titanium (Ti), rhenium (Re), and cobalt (Co). The diffusion-blocking metal layer 135 may have a single-layer structure or a multilayer structure. For example, the diffusion-blocking metal layer 135 may have a cobalt (Co) / iridium (Ir) / cobalt (Co) multilayer structure. In addition to the cobalt (Co) / iridium (Ir) / cobalt (Co) multilayer structure, the diffusion-blocking metal layer 135 may be formed in a multilayer structure of two or four or more layers, each containing one of the metals or alloy thereof from among tantalum (Ta), tungsten (W), iridium (Ir), titanium (Ti), rhenium (Re), and cobalt (Co). 【0075】 The oxide layer 134 and the diffusion-barrier metal layer 135 may have relatively thin thicknesses so as to transmit spin current or spin-orbit torque to the free layer 123 without passing through platinum (Pt). For example, the thickness of the oxide layer 134 and the diffusion-barrier metal layer 135 can be selected within the range of approximately 0.5 nm to approximately 2 nm, approximately 0.5 nm to approximately 1 nm, or approximately 1 nm to approximately 2 nm, depending on the physical properties of the oxide material or metal material actually used. 【0076】 Figure 8 is a cross-sectional view illustrating a schematic configuration of a magnetic memory element according to yet another embodiment. Referring to Figure 8, the fixed layer 121 of the magnetic memory element 100e may have a synthetic antiferromagnet structure. For example, the fixed layer 121 may include a first ferromagnetic layer 121a, an antiferromagnetic coupling layer 121c provided on the first ferromagnetic layer 121a, and a second ferromagnetic layer 121b provided on the antiferromagnetic coupling layer 121c. That is, the first ferromagnetic layer 121a and the second ferromagnetic layer 121b may face each other, and the antiferromagnetic coupling layer 121c may be provided between the first ferromagnetic layer 121a and the second ferromagnetic layer 121b. The first ferromagnetic layer 121a may be provided on the first electrode 111, and the second ferromagnetic layer 121b may be provided in contact with the tunnel barrier layer 122. 【0077】 The first ferromagnetic layer 121a and the second ferromagnetic layer 121b may contain a ferromagnetic metallic material. The first ferromagnetic layer 121a and the second ferromagnetic layer 121b may contain at least one ferromagnetic material selected from the group including, for example, iron (Fe), cobalt (Co), nickel (Ni), manganese (Mn), Fe-containing alloys, Co-containing alloys, Ni-containing alloys, Mn-containing alloys, and Heusler alloys. The first ferromagnetic layer 121a and the second ferromagnetic layer 121b may, but are not necessarily limited to, the same ferromagnetic material. 【0078】 The antiferromagnetic coupling layer 121c may contain a nonmagnetic metal that generates a Dzyaloshinskii-Moriya interaction at the interface between the first ferromagnetic layer 121a and the second ferromagnetic layer 121b. For example, the antiferromagnetic coupling layer 121c may contain at least one of ruthenium (Ru), iridium (Ir), tantalum (Ta), tungsten (W), palladium (Pd), zirconium (Zr), platinum (Pt), aluminum (Al), and alloys containing these. In such a structure, the first ferromagnetic layer 121a and the second ferromagnetic layer 121b can form an antiferromagnet through the antiferromagnetic coupling layer 121c. That is, the fixed layer 121 may have a stable state when the magnetization direction of the first ferromagnetic layer 121a and the magnetization direction of the second ferromagnetic layer 121b are opposite. 【0079】 According to the embodiment, the thicknesses of the first ferromagnetic layer 121a and the second ferromagnetic layer 121b may differ so that a stray field is applied to the free layer 123. For example, the thickness of the first ferromagnetic layer 121a may be greater than the thickness of the second ferromagnetic layer 121b, or the thickness of the second ferromagnetic layer 121b may be greater than the thickness of the first ferromagnetic layer 121a, to the extent that a stray field is generated within the free layer 123. This makes it possible to selectively reverse the magnetization of the free layer 123 without a configuration for applying a separate external magnetic field to the free layer 123. 【0080】 Figure 9 is a cross-sectional view illustrating a schematic configuration of a magnetic memory element according to yet another embodiment. Referring to Figure 9, the magnetic memory element 100f may include both an orbital Hall conduction layer 132 and a spin Hall conduction layer 133 as a "spin orbit torque generation layer". That is, the magnetic memory element 100f includes a spin orbit torque generation layer, and the spin orbit torque generation layer includes an orbital Hall conduction layer 132 and a spin Hall conduction layer 133. The orbital Hall conduction layer 132 may be provided on the spin current transmission layer 131, and the spin Hall conduction layer 133 may be provided on the orbital Hall conduction layer 132. The second electrode 112 and the third electrode 113 may be provided on the upper surface of the spin Hall conduction layer 133 so as to be spaced apart from each other. 【0081】 Figure 10 is a cross-sectional view illustrating a schematic configuration of a magnetic memory element according to yet another embodiment. In Figure 9, it was explained that the spin Hall conduction layer 133 is provided on the orbital Hall conduction layer 132, but this is not necessarily limited, and the positions of the spin Hall conduction layer 133 and the orbital Hall conduction layer 132 can be interchanged. Referring to Figure 10, the spin orbit torque generation layer of the magnetic memory element 100g may include a spin Hall conduction layer 133 provided on the spin current transmission layer 131 and an orbital Hall conduction layer 132 provided on the spin Hall conduction layer 133. In this case, the second electrode 112 and the third electrode 113 may be provided on the upper surface of the orbital Hall conduction layer 132 so as to be spaced apart from each other. 【0082】 Figure 11 is a cross-sectional view illustrating a schematic configuration of a magnetic memory element according to yet another embodiment. Referring to Figure 11, the magnetic memory element 100h may include a plurality of tunneling magnetoresistive layers 120 connected to a single orbital Hall conduction layer 132. For example, the magnetic memory element 100h may include a plurality of first electrodes 111, a plurality of tunneling magnetoresistive layers 120 each provided on the plurality of first electrodes 111, a plurality of spin current transmission layers 131 each provided on the plurality of tunneling magnetoresistive layers 120, a single orbital Hall conduction layer 132 provided on the plurality of spin current transmission layers 131, and second electrodes 112 and third electrodes 113 provided on the upper surface of the orbital Hall conduction layer 132 so as to be spaced apart from each other. The plurality of first electrodes 111 may each be electrically connected to a corresponding fixed layer among a plurality of fixed layers 121 of the plurality of tunneling magnetoresistive layers 120. Furthermore, the magnetic memory element 100h may further include a plurality of via layers 114 electrically connected to a plurality of first electrodes 111, and a plurality of wirings 115 electrically connected to a plurality of via layers 114. Furthermore, the magnetic memory element 100h may further include an insulating layer 141 provided between a plurality of tunneling magnetoresistive layers 120 to electrically separate the plurality of tunneling magnetoresistive layers 120. 【0083】 In the magnetic memory element 100h shown in Figure 11, the width of the orbital Hall conduction layer 132 and the distance between the second electrode 112 and the third electrode 113 are relatively long, so the orbital Hall conduction layer 132 can be made of a material with relatively high electrical conductivity or relatively low electrical resistance. For example, the orbital Hall conduction layer 132 may contain at least one material from iridium (Ir), ruthenium (Ru), and titanium (Ti). Although Figure 11 shows that the magnetic memory element 100h includes an orbital Hall conduction layer 132 as a "spin-orbit torque generating layer," the magnetic memory element 100h may also include a spin Hall conduction layer 133 as a "spin-orbit torque generating layer." In this case, the spin Hall conduction layer 133 may contain platinum (Pt) as a material with relatively high electrical conductivity and relatively low electrical resistance. 【0084】 According to the embodiment shown in Figure 11, the integration density of the multiple tunneling magnetoresistance layers 120 can be increased. Furthermore, selective writing and reading of the multiple tunneling magnetoresistance layers 120 is possible using a voltage-controlled magnetic anisotropy (VCMA) method. For example, with a current applied to the spin-orbit torque generation layer, i.e., the orbital Hall conduction layer 132 or the spin Hall conduction layer 133, through the second electrode 112 and the third electrode 113, one or more specific tunneling magnetoresistance layers from among the multiple tunneling magnetoresistance layers 120 can be selected by the voltage applied to the first electrode 111. 【0085】 Figure 12 schematically shows a memory cell including a magnetic memory element according to an embodiment. Referring to Figure 12, the memory cell MC may include a magnetic memory element 100 and a switching element TR connected thereto. The switching element TR is also a thin-film transistor. The memory cell MC may be connected between a bit line BL and a word line WL. The bit line BL and the word line WL are arranged to intersect each other, and the memory cell MC may be located at the intersection of the bit line BL and the word line WL. The bit line BL is electrically connected to the first electrode 111 of the magnetic memory element 100 through wiring 115 and via layer 114, and the word line WL may be connected to the gate of the switching element TR. In addition, the first source / drain electrode of the switching element TR may be electrically connected to the second electrode 112 of the magnetic memory element 100, and the second source / drain electrode may be electrically connected to the source line SL. Although Figure 12 shows that the memory cell MC includes the magnetic memory element 100 shown in Figures 1 and 2, the memory cell MC according to other embodiments may include any one of the magnetic memory elements shown in Figures 3, 5 through 11. 【0086】 In such a structure, a write current IW or read current IR can be applied to the memory cell MC through the word line WL, source line SL, and bit line BL. For example, if a voltage greater than or equal to the threshold voltage is applied to the word line WL and a current greater than or equal to the threshold current is applied to the source line SL, the switching element TR can be turned on and the write current IW can flow through the path between the second electrode 112 and the third electrode 113 of the magnetic memory element 100. At this time, the third electrode 113 of the magnetic memory element 100 can be grounded. As a result, the magnetization direction of the free layer 123 can change in the +Z direction or the -Z direction depending on the direction of the current applied to the orbital Hall conduction layer 132. 【0087】 On the other hand, the read current IR can flow from the second electrode 112 of the magnetic memory element 100 through the first electrode 111 to the bit line BL. For example, if a voltage greater than or equal to the threshold voltage is applied to the word line WL and a current lower than the threshold current is applied to the source line SL, the switching element TR can be turned on and the read current IR can flow from the second electrode 112 and the first electrode 111 of the magnetic memory element 100 to the bit line BL. In this case, the third electrode 113 of the magnetic memory element 100 also becomes floating. This makes it possible to measure the current flowing through the bit line BL and read the resistance value of the magnetic memory element 100. 【0088】 Figure 13 is a schematic circuit diagram showing the configuration of a memory device including the multiple memory cells shown in Figure 12. Referring to Figure 13, the memory device 200 may include multiple bit lines BL, multiple word lines WL, multiple source lines SL, multiple memory cells MC located at the intersections of the multiple bit lines BL and multiple word lines WL, a bit line driver 201 that applies current to the multiple bit lines BL, a word line driver 202 that applies current to the multiple word lines WL, and a source line driver 203 that applies current to the multiple source lines SL. Each memory cell MC may have the configuration shown in Figure 12. The memory device 200 shown in Figure 13 is, for example, an SOT-MRAM (spin-orbit torque magnetic random access memory) and can be used in electronic devices that use non-volatile memory. 【0089】 Figure 14 is a schematic cross-sectional view showing the configuration of a memory device according to another embodiment. Referring to Figure 14, the memory device 200a may have a structure in which two adjacent memory cells share one source line, one read bit line, and one orbital Hole conduction layer 132. For example, the memory device 200a may include a first memory cell MC1 and a second memory cell MC2. The first memory cell MC1 and the second memory cell MC2 may be configured to share one source line 227, one read bit line 225, and one orbital Hole conduction layer 132. 【0090】 The first memory cell MC1 may include an orbital Hall conduction layer 132, a first spin current transfer layer 131a provided on the lower surface of the orbital Hall conduction layer 132, a first tunneling magnetoresistive layer 120a provided on the lower surface of the first spin current transfer layer 131a, a first electrode 111a provided on the lower surface of the first tunneling magnetoresistive layer 120a, a second electrode 226 provided on the lower surface of the orbital Hall conduction layer 132, a third electrode 227a provided on the upper surface of the orbital Hall conduction layer 132, a first transistor TR1 electrically connected to the first electrode 111a, a readout bit line 225 electrically connected to the first transistor TR1, a source line 227 electrically connected to the second electrode 226, and a first word line 228a electrically connected to the third electrode 227a. For example, the source line 227 may be provided on the lower surface of the second electrode 226. The first word line 228a may be provided on the upper surface of the third electrode 227a. 【0091】 The first tunneling magnetoresistance layer 120a may include a free layer 123 provided on the lower surface of the first spin current transfer layer 131a, a tunnel barrier layer 122 provided on the lower surface of the free layer 123, and a fixed layer 121 provided on the lower surface of the tunnel barrier layer 122. The first electrode 111a may be electrically connected to the fixed layer 121 of the first tunneling magnetoresistance layer 120a at the lower surface of the fixed layer 121 of the first tunneling magnetoresistance layer 120a. 【0092】 The first transistor TR1 may include a first source / drain 214, a second source / drain 215, a first channel 211a between the first source / drain 214 and the second source / drain 215, a first gate insulating film 212a on the first channel 211a, and a first readout word line 213a on the first gate insulating film 212a. The first source / drain 214 may be electrically connected to the first electrode 111a via a first wiring that is perpendicular to and extends perpendicularly to the first electrode 111a. The first wiring may include, but is not limited to, a first conductive plug 221a, a first contact layer 222a, and a second conductive plug 223a. The second source / drain 215 may be electrically connected to the readout bit line 225 via a third conductive plug 224 that is perpendicular to and extends perpendicularly to the readout bit line 225. 【0093】 The second memory cell MC2 may include an orbital Hall conduction layer 132, a second spin current transfer layer 131b provided on the lower surface of the orbital Hall conduction layer 132, a second tunneling magnetoresistive layer 120b provided on the lower surface of the second spin current transfer layer 131b, a fourth electrode 111b provided on the lower surface of the second tunneling magnetoresistive layer 120b, a second electrode 226 provided on the lower surface of the orbital Hall conduction layer 132, a fifth electrode 227b provided on the upper surface of the orbital Hall conduction layer 132, a second transistor TR2 electrically connected to the fourth electrode 111b, a readout bit line 225 electrically connected to the second transistor TR2, a source line 227 electrically connected to the second electrode 226, and a second word line 228b electrically connected to the fifth electrode 227b. For example, the second word line 228b may be provided on the upper surface of the fifth electrode 227b. 【0094】 The second tunneling magnetoresistance layer 120b may include a free layer 123 provided on the lower surface of the second spin current transfer layer 131b, a tunnel barrier layer 122 provided on the lower surface of the free layer 123, and a fixed layer 121 provided on the lower surface of the tunnel barrier layer 122. The fourth electrode 111b may be electrically connected to the fixed layer 121 of the second tunneling magnetoresistance layer 120b at the lower surface of the fixed layer 121 of the second tunneling magnetoresistance layer 120b. 【0095】 The second transistor TR2 may include a second source / drain 215, a third source / drain 216, a second channel 211b between the second source / drain 215 and the third source / drain 216, a second gate insulating film 212b on the second channel 211b, and a second readout word line 213b on the second gate insulating film 212b. The third source / drain 216 may be electrically connected to the fourth electrode 111b via a second wiring that is perpendicular to and extends perpendicularly to the fourth electrode 111b. The second wiring may include, but is not limited to, a fourth conductive plug 221b, a second contact layer 222b, and a fifth conductive plug 223b. 【0096】 The first transistor TR1 and the second transistor TR2 may be arranged horizontally adjacent to each other on the substrate 210. The substrate 210 may include a drive circuit for controlling the memory device 200a. The first transistor TR1 and the second transistor TR2 may share a second source / drain 215. For example, the second source / drain 215 may be provided between the first channel 211a and the second channel 211b. 【0097】 The first memory cell MC1 and the second memory cell MC2 may further share a third conductive plug 224 and a second electrode 226. The orbital Hall conduction layer 132 shared by the first memory cell MC1 and the second memory cell MC2 extends horizontally, and the first tunneling magnetoresistive layer 120a and the second tunneling magnetoresistive layer 120b may be adjacent to each other on the underside of the orbital Hall conduction layer 132. The third conductive plug 224, read bit line 225, second electrode 226 and source line 227 shared by the first memory cell MC1 and the second memory cell MC2 may be provided between the first tunneling magnetoresistive layer 120a and the second tunneling magnetoresistive layer 120b. 【0098】 The third electrode 227a and the first word line 228a may be provided on the orbital Hole conduction layer 132, spaced apart from the fifth electrode 227b and the second word line 228b. For example, the third electrode 227a and the first word line 228a may be provided at the first side end of the orbital Hole conduction layer 132, while the fifth electrode 227b and the second word line 228b may be provided at the second side end opposite to the first side end of the orbital Hole conduction layer 132. For example, a first tunneling magnetoresistance layer 120a may be provided horizontally between the third electrode 227a and the second electrode 226. A second tunneling magnetoresistance layer 120b may be provided horizontally between the fifth electrode 227b and the second electrode 226. 【0099】 The memory device 200a may further include an insulating layer 220 that fills the space between the first transistor TR1 and the second transistor TR2 and the orbital hole conduction layer 132. The first tunneling magnetoresistive layer 120a, the second tunneling magnetoresistive layer 120b, the first electrode 111a, the first conductive plug 221a, the first contact layer 222a, the second conductive plug 223a, the fourth electrode 111b, the fourth conductive plug 221b, the second contact layer 222b, the fifth conductive plug 223b, the third conductive plug 224, the read bit line 225, the second electrode 226, and the source line 227 may be embedded within the insulating layer 220. 【0100】 During a write operation to the first memory cell MC1, a write voltage is applied to the first word line 228a, while no voltage is applied to the second word line 228b. As a result, current flows from the first word line 228a to the source line 227, a write current is applied to the first memory cell MC1, and no write current is applied to the second memory cell MC2. During a read operation to the first memory cell MC1, a voltage greater than the threshold voltage of the first transistor TR1 can be applied to the first read word line 213a to turn on the first transistor TR1. Then, a read voltage can be applied to the first word line 228a. As a result, a read current can flow from the first word line 228a to the read bit line 225. 【0101】 During a write operation to the second memory cell MC2, no voltage is applied to the first word line 228a, while a write voltage may be applied to the second word line 228b. As a result, current flows from the second word line 228b to the source line 227, a write current is applied to the second memory cell MC2, and no write current is applied to the first memory cell MC1. During a read operation to the second memory cell MC2, a voltage greater than the threshold voltage of the second transistor TR2 may be applied to the second read word line 213b to turn on the second transistor TR2. Then, a read voltage may be applied to the second word line 228b. As a result, a read current may flow from the second word line 228b to the read bit line 225. 【0102】 Figure 14 shows that the first memory cell MC1 and the second memory cell MC2 include an orbital Hall conduction layer 132 as a "spin orbit torque generation layer," but the first memory cell MC1 and the second memory cell MC2 may also include a spin Hall conduction layer 133 as a "spin orbit torque generation layer." In this case, the spin Hall conduction layer 133 as a "spin orbit torque generation layer" may contain platinum (Pt) as a material with relatively high electrical conductivity and relatively low electrical resistance. 【0103】 The aforementioned memory device 200 can be used for data storage in various electronic devices. Figure 15 is a conceptual diagram schematically showing an element architecture that may be applied to an electronic device according to an exemplary embodiment. Referring to Figure 15, the electronic device 300 may include a main memory 310, auxiliary storage 320, a CPU (central processing unit) 330, and an input / output device 340. The CPU 330 may include a cache memory 331, an ALU (arithmetic logic unit) 332, and a control unit 333. The cache memory 331 consists of SRAM (Static Random Access Memory). The main memory 310 includes DRAM elements, and the auxiliary storage 320 may include the memory device 200 according to the embodiment. Alternatively, the cache memory 331, main memory 310, and auxiliary storage 320 may all include the memory device 200 according to the embodiment. 【0104】 All functional blocks illustrated in the drawings and described above can be embodied by hardware including logic circuits, hardware / software combinations such as processors that perform software, or processing circuits such as combinations thereof. For example, processing circuits may more specifically include, but are not limited to, central processing units (CPUs), arithmetic logic units (ALUs), digital signal processors, microcomputers, field programmable gate arrays (FPGAs), system-on-chips (SoCs), programmable logic units, microprocessors, and application-specific integrated circuits (ASICs). 【0105】 The embodiments described above can be summarized as follows: 【0106】 (1) A method for manufacturing a magnetic memory element according to an embodiment may include the steps of: sequentially forming a stationary layer material, a tunnel barrier layer material, a free layer material, and a spin current transfer layer material on an electrode material; forming a mask layer on the spin current transfer layer material; removing the spin current transfer layer material, free layer material, tunnel barrier layer material, stationary layer material, and electrode material exposed by the mask layer through a first etching step to form a first electrode, a stationary layer, a tunnel barrier layer, a free layer, and a spin current transfer layer; forming an insulating layer that surrounds the sides of the first electrode, stationary layer, tunnel barrier layer, free layer, and spin current transfer layer and covers the sides and top of the mask layer; performing a second etching step until the top surface of the spin current transfer layer is exposed; and forming a spin orbit torque generating layer that is in contact with the top surface of the spin current transfer layer. 【0107】 (2) The step may further include forming two second electrodes spaced apart from each other on the upper surface of the spin current transfer layer. 【0108】 (3) The spin-orbit torque generating layer may include, for example, at least one material or an alloy thereof from among iridium (Ir), manganese (Mn), vanadium (V), chromium (Cr), niobium (Nb), molybdenum (Mo), ruthenium (Ru), tantalum (Ta), tungsten (W), titanium (Ti), rhenium (Re), platinum (Pt), and tungsten (W) having a beta (β) phase. 【0109】 (4) The spin current transmission layer may include, for example, platinum (Pt). 【0110】 (5) The first etching step may be carried out by an ion beam etching method. 【0111】 (6) The second etching step may include: a step of flattening the upper surface of the insulating layer until the mask layer is exposed; and a step of removing the mask layer by a reactive ion etching method and further flattening the insulating layer. 【0112】 (7) A magnetic memory element according to an embodiment includes a spin-orbit torque generating layer that generates spin-orbit torque; a spin-current transmission layer provided on the lower surface of the spin-orbit torque generating layer; and a tunneling magnetoresistive layer provided on the lower surface of the spin-current transmission layer, the tunneling magnetoresistive layer including a free layer, a tunnel barrier layer, and a fixed layer; wherein the spin-current transmission layer is provided to transmit the spin current generated in the spin-orbit torque generating layer to the free layer; the spin-orbit torque generating layer includes at least one material or an alloy thereof from iridium (Ir), manganese (Mn), vanadium (V), chromium (Cr), niobium (Nb), molybdenum (Mo), ruthenium (Ru), tantalum (Ta), tungsten (W), titanium (Ti), rhenium (Re), platinum (Pt), and tungsten (W) having a beta (β) phase; and the spin-current transmission layer may include platinum (Pt). 【0113】 (8) The spin-orbit torque generating layer includes an orbital Hall conducting layer that provides an orbital Hall current due to the orbital Hall effect, the orbital Hall conducting layer may include at least one material or an alloy thereof from iridium (Ir), manganese (Mn), vanadium (V), chromium (Cr), niobium (Nb), molybdenum (Mo), ruthenium (Ru), tantalum (Ta), tungsten (W), titanium (Ti), and rhenium (Re). 【0114】 (9) The orbital Hole conduction layer may include a first orbital Hole conduction layer on the spin current conduction layer and a second orbital Hole conduction layer on the first orbital Hole conduction layer. 【0115】 (10) The first orbital Hole conduction layer and the second orbital Hole conduction layer may contain at least one material or alloy thereof that is different from each other, selected from at least one material from iridium (Ir), manganese (Mn), vanadium (V), chromium (Cr), niobium (Nb), molybdenum (Mo), ruthenium (Ru), tantalum (Ta), tungsten (W), titanium (Ti), and rhenium (Re). 【0116】 (11) The spin-orbit torque generating layer includes a spin-Hall conduction layer that provides a spin-Hall current due to the spin-Hall effect, and the spin-Hall conduction layer may include platinum (Pt) or tungsten (W) having a beta (β) phase. 【0117】 (12) The thickness of the spin current transfer layer may be, for example, 0.1 nm or more and 10 nm or less. 【0118】 (13) The spin-orbit torque generating layer may include an orbital Hall conduction layer provided on the spin current transmission layer and providing an orbital Hall current due to the orbital Hall effect, and a spin Hall conduction layer provided on the orbital Hall conduction layer and providing a spin Hall current due to the spin Hall effect. 【0119】 (14) The spin-orbit torque generating layer may include a spin-Hall conduction layer provided on the spin-current transmission layer and providing a spin-Hall current due to the spin-Hall effect, and an orbital-Hall conduction layer provided on the spin-Hall conduction layer and providing an orbital-Hall current due to the orbital-Hall effect. 【0120】 (15) Further comprising an oxide layer provided between the free layer and the spin current transmission layer, wherein the oxide layer is made of magnesium oxide (MgO), tantalum oxide (TaO), magnesium aluminum oxide (MgAlO x ), aluminum oxide (AlO x ), hafnium oxide (HfO x ), zirconium oxide (ZrO x ), magnesium tantalum oxide (MgTaO x ), titanium oxide (TiO x ), and tungsten oxide (WO x ) may include at least one of the following. 【0121】 (16) The magnetic memory element may further include a diffusion-blocking metal layer provided between the free layer and the spin current transfer layer. 【0122】 (17) The diffusion-blocking metal layer may have a single layer or multilayer structure comprising at least one metal or an alloy thereof from among tantalum (Ta), tungsten (W), iridium (Ir), titanium (Ti), rhenium (Re), and cobalt (Co). 【0123】 (18) The fixed layer includes a first ferromagnetic layer, a second ferromagnetic layer, and an antiferromagnetic coupling layer between the first ferromagnetic layer and the second ferromagnetic layer, wherein the magnetization direction of the first ferromagnetic layer and the magnetization direction of the second ferromagnetic layer are opposite. 【0124】 (19) The magnetic memory element may further include a first electrode electrically connected to the fixed layer; and a second electrode and a third electrode spaced apart on the spin-orbit torque generating layer. 【0125】 (20) Multiple tunneling magnetoresistance layers and multiple spin current transfer layers may be provided for one spin orbit torque generation layer. 【0126】 (21) The spin-orbit torque generating layer may include, for example, at least one of the following materials: platinum (Pt), iridium (Ir), ruthenium (Ru), and titanium (Ti). 【0127】 (22) The magnetic memory element may further include a plurality of first electrodes electrically connected to a corresponding fixed layer among a plurality of fixed layers of the plurality of tunneling magnetoresistive layers; and a second electrode and a third electrode provided spaced apart on the spin orbit torque generating layer. 【0128】 (23) A memory device according to an embodiment includes a plurality of memory cells, each including a magnetic memory element and a switching element connected to the magnetic memory element, wherein the magnetic memory element includes: a spin-orbit torque generating layer that generates a spin-orbit torque; a spin-current transmission layer provided on the lower surface of the spin-orbit torque generating layer; and a tunneling magnetoresistive layer provided on the lower surface of the spin-current transmission layer, the tunneling magnetoresistive layer including a free layer, a tunnel barrier layer, and a fixed layer; and the spin-current transmission layer includes the spin-orbit A torque generating layer is provided to transmit the spin current generated in the torque generating layer to the free layer. The spin orbit torque generating layer contains at least one material or an alloy thereof from iridium (Ir), manganese (Mn), vanadium (V), chromium (Cr), niobium (Nb), molybdenum (Mo), ruthenium (Ru), tantalum (Ta), tungsten (W), titanium (Ti), rhenium (Re), platinum (Pt), and tungsten (W) having a beta (β) phase. The spin current transmission layer may contain platinum (Pt). 【0129】 The aforementioned magnetic memory elements, methods for manufacturing magnetic memory elements, and memory devices including magnetic memory elements have been described with reference to embodiments shown in the drawings, but these are merely illustrative examples, and a person with ordinary skill in the art will understand that a variety of modifications and equivalent other embodiments are possible therefrom. Therefore, the disclosed embodiments should be considered in an explanatory rather than restrictive manner. The scope of rights is set forth in the claims, not in the foregoing description, and all differences within an equivalent scope should be interpreted as being included within the scope of rights. [Explanation of Symbols] 【0130】 100 magnetic memory elements 111, 112, 113 electrodes 114 Beer Layer 115 Wiring 120 Tunneling magnetoresistive layer 121 Fixed layer 122 Tunnel barrier layer 123 Free layer 131 Spin current transfer layer 132 Orbital Hole Conduction Layer 133 Spin Hall Conduction Layer 134 Oxide layer 135 Diffusion-blocking metal layer 141 Insulating layer 150 mask layers 200 memory devices 201-bit line driver 202 Wordline Driver 203 Source Line Driver BL Bitline MC memory cell SL Sourceline TR switching element WL Wardline

Claims

[Claim 1] The process involves sequentially forming a fixed layer material, a tunnel barrier layer material, a free layer material, and a spin current transfer layer material on an electrode material, The steps include forming a mask layer on the spin current transfer layer material, The steps include removing the spin current transfer layer material, free layer material, tunnel barrier layer material, stationary layer material, and electrode material exposed by the mask layer through a first etching step to form a first electrode, stationary layer, tunnel barrier layer, free layer, and spin current transfer layer, The steps include forming an insulating layer that surrounds the sides of the first electrode, the fixed layer, the tunnel barrier layer, the free layer, and the spin current transfer layer, and covers the sides and top surface of the mask layer, The step of performing a second etching process until the upper surface of the spin current transfer layer is exposed, A method for manufacturing a magnetic memory element, comprising the step of forming a spin orbit torque generation layer in contact with the upper surface of the spin current transmission layer. [Claim 2] A method for manufacturing a magnetic memory element according to claim 1, further comprising the step of forming a second electrode and a third electrode spaced apart from each other on the upper surface of the spin current transfer layer. [Claim 3] The spin-orbit torque generating layer comprises at least one material or an alloy thereof from among iridium (Ir), manganese (Mn), vanadium (V), chromium (Cr), niobium (Nb), molybdenum (Mo), ruthenium (Ru), tantalum (Ta), tungsten (W), titanium (Ti), rhenium (Re), platinum (Pt), and tungsten (W) having a beta (β) phase. A method for manufacturing a magnetic memory element according to claim 1, wherein the spin current transmission layer contains platinum (Pt). [Claim 4] The method for manufacturing a magnetic memory element according to claim 1, wherein the first etching step is performed by an ion beam etching method. [Claim 5] The second etching step described above is: The steps include: flattening the upper surface of the insulating layer until the mask layer is exposed; A method for manufacturing a magnetic memory element according to claim 1, comprising the steps of removing the mask layer by a reactive ion etching method and further planarizing the insulating layer. [Claim 6] A spin-orbit torque generating layer that generates spin-orbit torque, A spin current transmission layer provided on the lower surface of the spin orbit torque generation layer, A tunneling magnetoresistive layer provided on the lower surface of the spin current transfer layer, comprising a tunneling magnetoresistive layer including a free layer, a tunnel barrier layer, and a fixed layer, The spin current transmission layer is provided to transmit the spin current generated in the spin orbit torque generation layer to the free layer. The spin-orbit torque generating layer comprises at least one material or an alloy thereof from among iridium (Ir), manganese (Mn), vanadium (V), chromium (Cr), niobium (Nb), molybdenum (Mo), ruthenium (Ru), tantalum (Ta), tungsten (W), titanium (Ti), rhenium (Re), platinum (Pt), and tungsten (W) having a beta (β) phase. The spin current transmission layer is a magnetic memory element containing platinum (Pt). [Claim 7] The spin-orbit torque generating layer includes an orbital Hall conducting layer that provides an orbital Hall current due to the orbital Hall effect. The magnetic memory element according to claim 6, wherein the orbital hole conduction layer comprises at least one material or an alloy thereof selected from iridium (Ir), manganese (Mn), vanadium (V), chromium (Cr), niobium (Nb), molybdenum (Mo), ruthenium (Ru), tantalum (Ta), tungsten (W), titanium (Ti), and rhenium (Re). [Claim 8] The orbital Hole conduction layer includes a first orbital Hole conduction layer on the spin current conduction layer and a second orbital Hole conduction layer on the first orbital Hole conduction layer. The magnetic memory element according to claim 7, wherein the first orbital Hole conduction layer and the second orbital Hole conduction layer each contain at least one material or alloy thereof that is different from each other, selected from at least one material selected from iridium (Ir), manganese (Mn), vanadium (V), chromium (Cr), niobium (Nb), molybdenum (Mo), ruthenium (Ru), tantalum (Ta), tungsten (W), titanium (Ti), and rhenium (Re). [Claim 9] The spin-orbit torque generation layer includes a spin-Hall conduction layer that provides a spin-Hall current due to the spin-Hall effect, The magnetic memory element according to claim 6, wherein the spin Hall conduction layer comprises platinum (Pt) or tungsten (W) having a beta (β) phase. [Claim 10] The magnetic memory element according to claim 6, wherein the thickness of the spin current transmission layer is 0.1 nm or more and 10 nm or less. [Claim 11] The magnetic memory element according to claim 6, wherein the spin-orbit torque generating layer includes an orbital Hall conduction layer provided on the spin current transmission layer and providing an orbital Hall current due to the orbital Hall effect, and a spin Hall conduction layer provided on the orbital Hall conduction layer and providing a spin Hall current due to the spin Hall effect. [Claim 12] The magnetic memory element according to claim 6, wherein the spin-orbit torque generating layer includes a spin-Hall conduction layer provided on the spin-current transmission layer and providing a spin-Hall current due to the spin-Hall effect, and an orbital-Hall conduction layer provided on the spin-Hall conduction layer and providing an orbital-Hall current due to the orbital-Hall effect. [Claim 13] The material further includes an oxide layer provided between the free layer and the spin current transfer layer, The oxide layer consists of magnesium oxide (MgO), tantalum oxide (TaO), and magnesium aluminum oxide (MgAlO). ｘ ), aluminum oxide (AlO ｘ ), hafnium oxide (HfO ｘ ), zirconium oxide (ZrO ｘ ), magnesium tantalum oxide (MgTaO ｘ ), titanium oxide (TiO ｘ ), and tungsten oxide (WO ｘ The magnetic memory element according to claim 6, comprising at least one of the following: [Claim 14] The material further includes a diffusion-blocking metal layer provided between the free layer and the spin current transmission layer, The magnetic memory element according to claim 6, wherein the diffusion-blocking metal layer has a single-layer or multilayer structure comprising at least one metal or an alloy thereof selected from tantalum (Ta), tungsten (W), iridium (Ir), titanium (Ti), rhenium (Re), and cobalt (Co). [Claim 15] The fixed layer includes a first ferromagnetic layer, a second ferromagnetic layer, and an antiferromagnetic coupling layer between the first ferromagnetic layer and the second ferromagnetic layer. The magnetic memory element according to claim 6, wherein the magnetization direction of the first ferromagnetic layer and the magnetization direction of the second ferromagnetic layer are opposite. [Claim 16] A first electrode electrically connected to the fixed layer, The magnetic memory element according to claim 6, further comprising a second electrode and a third electrode provided spaced apart on the spin-orbit torque generating layer. [Claim 17] The magnetic memory element according to claim 6, wherein a plurality of tunneling magnetoresistive layers and a plurality of spin current transmission layers are provided for a single spin orbit torque generation layer. [Claim 18] The magnetic memory element according to claim 17, wherein the spin-orbit torque generating layer comprises at least one material selected from platinum (Pt), iridium (Ir), ruthenium (Ru), and titanium (Ti). [Claim 19] A plurality of first electrodes are electrically connected to a corresponding fixed layer among the plurality of fixed layers of the plurality of tunneling magnetoresistive layers, The magnetic memory element according to claim 17, further comprising a second electrode and a third electrode provided spaced apart on the spin-orbit torque generating layer. [Claim 20] It includes a plurality of memory cells, each including a magnetic memory element and a switching element connected to the magnetic memory element, The aforementioned magnetic memory element is A spin-orbit torque generating layer that generates spin-orbit torque, A spin current transmission layer provided on the lower surface of the spin orbit torque generation layer, A tunneling magnetoresistive layer provided on the lower surface of the spin current transfer layer, comprising a tunneling magnetoresistive layer including a free layer, a tunnel barrier layer, and a fixed layer, The spin current transmission layer is provided to transmit the spin current generated in the spin orbit torque generation layer to the free layer. The spin-orbit torque generating layer comprises at least one material or an alloy thereof from among iridium (Ir), manganese (Mn), vanadium (V), chromium (Cr), niobium (Nb), molybdenum (Mo), ruthenium (Ru), tantalum (Ta), tungsten (W), titanium (Ti), rhenium (Re), platinum (Pt), and tungsten (W) having a beta (β) phase. The spin current transfer layer contains platinum (Pt) in the memory device.

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