Semiconductor equipment
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- RENESAS ELECTRONICS CORP
- Filing Date
- 2024-12-05
- Publication Date
- 2026-06-17
AI Technical Summary
【0007】 前記一実施の形態によれば、半導体装置において、電気ヒューズの溶断電流を小さくできる。
Smart Images

Figure 2026098320000001_ABST
Abstract
Claims
1. Metal film and A first wiring connected to the metal film via at least one first via, A second wiring connected to the metal film via a plurality of second vias, The system comprises a disconnecting transistor connected to the second wiring, The area of the contact surface of at least one first via that contacts the metal film is smaller than the area of the contact surface of the plurality of second vias that contact the metal film. The aforementioned metal film constitutes an electrical fuse element in a semiconductor device.
2. The semiconductor device according to claim 1, wherein when a cutting current flows from the first wiring to the metal film by the cutting transistor, the portion of the metal film connected to at least one first via melts.
3. The semiconductor device according to claim 1, wherein the metal film is formed of silicon chromium or titanium nitride.
4. The semiconductor device according to claim 1, wherein the width of the first wiring is narrower than the width of the second wiring.
5. The semiconductor device according to claim 1, wherein the metal film is formed on top of the first wiring and the second wiring.
6. The semiconductor device according to claim 1, wherein the metal film is formed below the first and second wirings.
7. The semiconductor device according to claim 1, wherein the number of at least one first via is less than the number of the plurality of second vias.
8. The metal film further comprises a third wiring connected via at least one third via, The semiconductor device according to claim 1, wherein when a cutting current flows from the third wiring to the metal film by the cutting transistor, the portion of the metal film connected to at least one third via melts.
9. The first wiring is connected to the first end of the metal film via the at least one first via, The third wiring is connected to the second end of the metal film opposite to the first end via at least one third via, The semiconductor device according to claim 8, wherein the second wiring is connected via the plurality of second vias to the intermediate portion between the first end and the second end of the metal film.
10. The semiconductor device according to claim 1, wherein the cutting transistor is formed on a substrate, and the first wiring, the second wiring, and the metal film are formed above the cutting transistor.
11. The semiconductor device according to claim 10, wherein the metal film and the cutting transistor are formed to overlap each other in a plan view.
12. The metal film is formed in a rectangular shape, The semiconductor device according to claim 1, wherein the width of the metal film in a direction perpendicular to the direction from the at least one first via to the plurality of second vias is constant.
13. The semiconductor device according to claim 1, wherein the width of the metal film is greater than the width of the first wiring.