Semiconductor equipment
A semiconductor device with a main terminal design that distributes stress by separating narrow and wide portions prevents cracks, enhancing stability and reducing heat generation, facilitating miniaturization and cost efficiency.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- FUJI ELECTRIC CO LTD
- Filing Date
- 2024-12-06
- Publication Date
- 2026-06-18
AI Technical Summary
The occurrence of cracks in main terminals of semiconductor devices due to stress concentration at the transition from a narrow to a wide portion, caused by ultrasonic bonding, is a significant issue.
The design of a main terminal with a narrow portion extending over a vertical and bent portion, followed by a wide portion that does not overlap with the bent portion, distributes stress and reduces the likelihood of cracks.
This design effectively suppresses the occurrence of cracks in the main terminals, stabilizes the semiconductor device, extends its lifespan, and reduces heat generation, while allowing for miniaturization and cost reduction.
Smart Images

Figure 2026098944000001_ABST