Semiconductor module

The semiconductor module addresses the challenge of maintaining electrical conduction during energy breakdowns by structuring conductive members to short-circuit upon failure, ensuring continuous operation and reduced resistance.

JP2026100273APending Publication Date: 2026-06-19KK TOSHIBA +1

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
KK TOSHIBA
Filing Date
2024-12-09
Publication Date
2026-06-19

AI Technical Summary

Technical Problem

Existing semiconductor modules face challenges in maintaining electrical conduction during large energy breakdowns, particularly when semiconductor elements fail, leading to potential open-circuit or high resistance issues that disrupt continuous operation.

Method used

The semiconductor module design includes a first and second metal member with semiconductor packages between them, each comprising conductive members connected to the metal members, allowing for contact between these conductive members when a short-circuit failure occurs, ensuring electrical continuity through a structured short-circuit mechanism.

Benefits of technology

This design enables the module to maintain electrical conductivity during high-energy failures by facilitating a controlled short-circuit between conductive members, reducing resistance and ensuring continuous operation of healthy semiconductor packages.

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Abstract

The objective is to provide a semiconductor module that can maintain electrical conductivity during high-energy destruction. [Solution] The semiconductor module of the embodiment comprises a first metal member, a second metal member, a first semiconductor package, and a second semiconductor package. Each of the first and second semiconductor packages comprises a first conductive member, a second conductive member, and a semiconductor element. The first conductive member is connected to the first metal member. The second conductive member is connected to the second metal member. The semiconductor element is disposed between the first and second conductive members. The semiconductor element is connected to the first and second conductive members. When a force is applied by a short-circuited semiconductor package that pulls at least one of the first and second metal members away from the semiconductor element, at least one of the first and second conductive members comes into contact with the other.
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Description

Technical Field

[0001] Embodiments of the present invention relate to semiconductor modules.

Background Art

[0002] For example, in order to construct a power converter of MW class with a withstand voltage of several kV, it is required to increase the current capacity of semiconductor elements. For this purpose, semiconductor modules in which a plurality of semiconductor elements are mounted in parallel have been proposed. In order to allow high voltage and large current, it is necessary to ensure the operation continuity and safety of the semiconductor module in case of failure of the semiconductor element. From such a viewpoint, it is required to maintain electrical conduction at the time of large energy breakdown.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] The problem to be solved by the present invention is to provide a semiconductor module capable of maintaining electrical conduction at the time of large energy breakdown.

Means for Solving the Problems

[0005] The semiconductor module of the embodiment includes a first metal member, a second metal member, a first semiconductor package, and a second semiconductor package. The first metal member and the second metal member are arranged facing each other. The first semiconductor package and the second semiconductor package are arranged between the first metal member and the second metal member. Each of the first semiconductor package and the second semiconductor package comprises a first conductive member, a second conductive member, and a semiconductor element. The first conductive member is connected to the first metal member. The second conductive member is connected to the second metal member. The semiconductor element is arranged between the first conductive member and the second conductive member. The semiconductor element is connected to the first conductive member and the second conductive member. When a force is applied by a short-circuited semiconductor package that pulls at least one of the first metal member and the second metal member away from the semiconductor element, at least one of the first conductive member and the second conductive member comes into contact with the other. [Brief explanation of the drawing]

[0006] [Figure 1] Side cross-sectional view of the semiconductor module of the embodiment. [Figure 2] A top view of the semiconductor package according to the embodiment. [Figure 3] A side cross-sectional view along line III-III in Figure 2. [Figure 4] This is a side cross-sectional view along the line IV-IV in Figure 2, with the sealing member omitted. [Figure 5] A diagram illustrating the forces acting on a faulty semiconductor element in the semiconductor module of the embodiment. [Figure 6] An explanatory diagram of the force acting on the second conductive member of the embodiment. [Figure 7] A diagram showing the dimensional relationships of the semiconductor package in the embodiment. [Figure 8] A diagram illustrating the induction of a short-circuit fault. [Figure 9] Enlarged view of the main part in Figure 8. [Figure 10] Figure 8 is a diagram illustrating the induction of a short-circuit fault. [Figure 11] Enlarged view of the main part of Figure 10. [Figure 12] Side cross-sectional view of the semiconductor package of the first modified example. [Figure 13] Side cross-sectional view of the semiconductor package of the second modified example. [Figure 14] Side cross-sectional view of the semiconductor package of the third modified example. [Modes for carrying out the invention]

[0007] The semiconductor module of the embodiment will be described below with reference to the drawings.

[0008] Figure 1 is a side cross-sectional view of the semiconductor module 1 of the embodiment. Figure 2 is a top view of the semiconductor package of the embodiment. Figure 3 is a side cross-sectional view along the line III-III in Figure 2. Figure 4 is a side cross-sectional view along the line IV-IV in Figure 2, in which the sealing member is omitted. The semiconductor module 1 of this embodiment comprises a bottom plate 2 (an example of a first metal member), a top plate 3 (an example of a second metal member), an insulating case 4, a first semiconductor package PA, and a second semiconductor package PB.

[0009] The base plate 2 and the top plate 3 are arranged facing each other. For example, the base plate 2 and the top plate 3 are made of a material with excellent electrical and thermal conductivity. For example, the base plate 2 and the top plate 3 mainly contain copper or aluminum. For example, the base plate 2 and the top plate 3 are made of a metal such as copper, copper alloy, aluminum, or aluminum alloy.

[0010] The base plate 2 and the top plate 3 are formed in a plate shape that conforms to the horizontal plane. The top plate 3 is positioned above the base plate 2. The top plate 3 has a uniform thickness (length in the vertical direction) along the horizontal plane. For example, the thickness of the top plate 3 is 2 mm or more and 12 mm or less. For example, the thickness of the top plate 3 is more preferably 4 mm or more and 10 mm or less.

[0011] The bottom plate 2 is connected to the top plate 3 via the insulating case 4. For example, the insulating case 4 is connected to the bottom plate 2 and the top plate 3 by an adhesive or a fastening member. For example, the insulating case 4 is formed of an insulating material having electrical insulation properties such as resin. The upper end of the insulating case 4 is connected to the lower surface of the top plate 3. The lower end of the insulating case 4 is connected to the upper surface of the bottom plate 2. Thereby, the space surrounded by the bottom plate 2, the top plate 3, and the insulating case 4 is made into a sealed space.

[0012] The bottom plate 2 has a lower connection terminal 5 (an example of a first connection terminal) that protrudes laterally more than the insulating case 4. The top plate 3 has an upper connection terminal 6 (an example of a second connection terminal) that protrudes laterally more than the insulating case 4. In the embodiment, electricity is conducted from the lower connection terminal 5 to the upper connection terminal 6.

[0013] The first semiconductor package PA and the second semiconductor package PB are disposed between the bottom plate 2 and the top plate 3. The semiconductor module 1 includes a plurality of semiconductor packages P in addition to the first semiconductor package PA and the second semiconductor package PB. For example, the semiconductor module 1 includes a plurality of semiconductor packages P in multi-parallel, including the first semiconductor package PA and the second semiconductor package PB. These plurality of semiconductor packages P are mounted in parallel within the semiconductor module 1.

[0014] Each of the first semiconductor package PA and the second semiconductor package PB includes a lower electrode 10 (an example of a first conductive member), an upper electrode 20 (an example of a second conductive member), a semiconductor element 30, and a sealing member 40. Hereinafter, unless the first semiconductor package PA and the second semiconductor package PB are distinguished, the plurality of semiconductor packages P including the first semiconductor package PA and the second semiconductor package PB may be simply referred to as "semiconductor package P".

[0015] For example, the lower electrode 10 and the upper electrode 20 are formed of a metal material with low electrical resistance such as copper. The lower electrode 10 is connected to the bottom plate 2. The upper electrode 20 is connected to the top plate 3. The semiconductor element 30 is disposed between the lower electrode 10 and the upper electrode 20. The semiconductor element 30 is connected to the lower electrode 10 and the upper electrode 20. For example, the semiconductor element 30 is a power semiconductor element used for power conversion. For example, the semiconductor element 30 is a switching element having a control electrode such as an IGBT (Insulated Gate Bipolar Transistor) or a MOSFET (Metal - Oxide - Semiconductor Field - Effect Transistor). For example, the semiconductor element 30 may be a diode such as an FRD (Fast Recovery Diode).

[0016] The semiconductor package P includes one or more semiconductor elements 30. For example, when a plurality of semiconductor elements 30 are mounted on one semiconductor package P, the plurality of semiconductor elements 30 do not have to be all the same. For example, a switching element such as an IGBT and a diode such as an FRD may be mixed in one semiconductor package P.

[0017] For example, on one surface (lower surface) of the semiconductor element 30, a collector electrode, a drain electrode, and an anode electrode are formed. These electrodes are connected to the lower electrode 10 by a bonding material (not shown) such as solder, a conductive adhesive, or silver paste.

[0018] For example, on the other surface (upper surface) of the semiconductor element 30, an emitter electrode, a source electrode, and a cathode electrode are formed. These electrodes are connected to the spacer 15 by a bonding material (not shown) such as solder, a conductive adhesive, or silver paste. For example, the spacer 15 is formed of a metal such as copper, a copper alloy, aluminum, or an aluminum alloy. The spacer 15 is connected to the upper electrode 20 by a bonding material (not shown) such as solder, a conductive adhesive, or silver paste.

[0019] The semiconductor element 30 is covered with a sealing member 40. For example, the sealing member 40 is made of an insulating material having electrical insulating properties, such as resin. For example, the sealing member 40 is formed in the shape of a rectangular box that surrounds the semiconductor element 30.

[0020] The sealing member 40 has a lower opening 41 and a side opening 42. The lower opening 41 exposes the lower surface of the lower electrode 10 (an example of the surface opposite to the surface connected to the semiconductor element 30). The lower opening 41 is formed on the lower surface of the sealing member 40. The side opening 42 opens to the side of the semiconductor element 30 so as to intersect with the lower opening 41. The side opening 42 is formed on one side of the sealing member 40. The side opening 42 is positioned substantially perpendicular to the lower opening 41.

[0021] The lower electrode 10 is connected to the base plate 2 through the lower opening 41. The lower electrode 10 is connected to the upper surface of the base plate 2 by a bonding material 31. For example, the bonding material 31 may be solder, conductive adhesive, silver paste, etc. Alternatively, the lower electrode 10 may be connected to the upper surface of the base plate 2 by a fastening member. For example, a common screw hole may be made in the base plate 2 and the lower electrode 10, and screws may be inserted into this screw hole to fasten them together.

[0022] The upper electrode 20 is connected to the top plate 3 through a side opening 42. The upper electrode 20 has a bent shape. In an embodiment, the upper electrode 20 has a crank shape. For example, at least a portion of the upper electrode 20 may be formed by bending a plate-shaped member into a crank shape. The upper electrode 20 includes a portion that extends laterally from the semiconductor element 30, then bends upward, and then bends further to extend laterally. The upper electrode 20 comprises a block portion 20A, a first extending portion 21, a second extending portion 22, and a third extending portion 23. The block portion 20A, the first extending portion 21, the second extending portion 22, and the third extending portion 23 are integrally formed from the same metal member.

[0023] The block portion 20A is formed in a block shape (for example, a rectangular parallelepiped shape) having one surface that is aligned with the upper surface of the semiconductor element 30 (an example of a surface connected to the semiconductor element 30). The first extension portion 21 extends along the horizontal plane from the upper end side of the block portion 20A. The first extension portion 21 protrudes out of the sealing member 40 from the side opening 42. The second extension portion 22 extends upward from the protruding end of the first extension portion 21 toward the top plate 3. The third extension portion 23 extends horizontally from the upper end of the second extension portion 22. The third extension portion 23 extends laterally from the upper end of the second extension portion 22 toward the third extension portion 23 of the adjacent semiconductor package.

[0024] The sealing member 40 covers all parts except the portion extending from the lower opening 41 to the lower electrode 10 and the portion extending from the side opening 42 to the upper electrode 20. The lower part of the lower electrode 10 (the portion connected to the bottom plate 2) is exposed and not covered by the sealing member 40. The upper part of the upper electrode 20 above the protruding end of the first extending portion 21 (the second extending portion 22 and the third extending portion 23) is exposed and not covered by the sealing member 40.

[0025] The sealing member 40 comprises an inner sealing portion 40A that covers the semiconductor element 30 and an outer sealing portion 40B that covers the inner sealing portion 40A. The inner sealing portion 40A has lower rigidity than the top plate 3. For example, the inner sealing portion 40A is formed of a gel material such as silicon gel. The upper electrode 20 has higher rigidity than the inner sealing portion 40A. The outer sealing portion 40B has higher rigidity than the inner sealing portion 40A. For example, the outer sealing portion 40B is formed of a resin material such as epoxy resin, or a mixture of epoxy resin and silica (filler). For example, the outer sealing portion 40B is formed by a method such as potting.

[0026] The upper electrode 20, excluding the block portion 20A, has a uniform thickness along the direction in which it extends. The first extended portion 21 and the third extended portion 23 of the upper electrode 20 have a uniform thickness (length in the vertical direction) along the horizontal plane. The second extended portion 22 has a uniform thickness (length in the left-right direction of the paper) along the vertical plane. For example, the thickness of the upper electrode 20, excluding the block portion 20A, is between 3 mm and 10 mm.

[0027] The upper end of the upper electrode 20 is at the same position as the upper end of the insulating case 4 and the lower surface of the top plate 3. In this embodiment, the upper end of the upper electrode 20 corresponds to the upper surface of the third extension portion 23. The upper end of the insulating case 4 is the end of the insulating case 4 that is connected to the lower surface of the top plate 3. The upper surface of the third extension portion 23 is a plane that is aligned with the horizontal plane. The upper electrode 20 is connected to the top plate 3 via fastening members 60 and 61. The upper electrode 20 may also be connected to the top plate 3 via spacers or the like.

[0028] For example, a nut 60 (an example of a fastening member) may be integrated with the upper electrode 20. The nut 60 is connected to the lower surface of the third extension 23. The top plate 3 and the third extension 23 each have through holes (bolt holes) through which a bolt 61 (an example of a fastening member) can be inserted. For example, a bolt 61 is inserted through each through hole from above the top plate 3 and screwed into the nut 60. This allows the upper electrode 20 to be connected to the top plate 3 via a fastening member such as a bolt 61. The upper electrode 20 is subjected to a load applied by the bolt 61 in the direction of the top plate 3 (upward). This load generates initial stress in the semiconductor element 30.

[0029] The semiconductor package P is electrically connected to the bottom plate 2 and the top plate 3 by a lower electrode 10 and an upper electrode 20. Multiple semiconductor packages P are electrically connected in parallel between the bottom plate 2 and the top plate 3 via the lower electrode 10 and the upper electrode 20. In this embodiment, power is supplied from the lower connection terminal 5. The current flows in the vertical direction of the semiconductor package P.

[0030] During normal operation, current is divided among the lower electrodes 10 of each semiconductor package P. In the example shown in the figure, during normal operation, current is divided among the first semiconductor package PA and the second semiconductor package PB. Subsequently, the current flows along the top plate 3 towards the upper connection terminal 6.

[0031] For example, the heat generated by the semiconductor element 30 during normal operation is conducted to the bottom plate 2 and top plate 3 on both sides of the semiconductor module 1. This allows the semiconductor element 30 to be cooled. For example, this improves cooling performance compared to a configuration in which only one side of the semiconductor package P is connected to a metal member. For example, the bottom plate 2 may also function as a cooler.

[0032] In this embodiment, when a force is applied by the short-circuited semiconductor package that pulls at least one of the bottom plate 2 and the top plate 3 toward the side away from the semiconductor element 30, at least one of the lower electrode 10 and the upper electrode 20 will come into contact with the other. Pulling toward the side away from the semiconductor element 30 means pulling up the metal member side that is not connected to the semiconductor element 30. This pulling force is applied by a force that pushes the top plate 3 toward the side away from the semiconductor element 30 (corresponding to the force of the short-circuited semiconductor package), which will be described next. The contact with the other includes, for example, contact between the lower electrode 10 (first conductive member) and the upper electrode 20 (second conductive member). In this embodiment, a short-circuit is caused when the lower electrode 10 and the upper electrode 20 come into contact in such a way that they fill the space between them.

[0033] Figure 5 is an explanatory diagram of the force LF acting on a faulty semiconductor element 30 in the semiconductor module 1 of the embodiment. For example, if one or more semiconductor elements 30 in the semiconductor module 1 fail, a short circuit occurs between the collector and emitter electrodes of the semiconductor element 30. As a result, a large current with a peak of several hundred kA flows through the failed semiconductor element 30 (hereinafter also referred to as the "failed chip"). In this embodiment, the current flowing through the upper electrode 20 acts as a Lorentz force, which acts in the direction of pushing up the top plate 3. The force pushing up the top plate 3 is a force that pushes the top plate 3 away from the semiconductor element 30. In this embodiment, the upper electrode 20 is crank-shaped (Z-shaped), and the direction of the current flowing through the first extension 21 VA (lateral) and the direction of the current flowing through the second extension 22 VB (vertical) are different. The Lorentz force LF acting on the Z-shaped upper electrode 20 is a force that stretches the Z shape into a flat shape. Therefore, a Lorentz force LF is generated that pushes the upper electrode 20 towards the top plate 3. In the example shown in Figure 5, the Lorentz force LF acts in the first semiconductor package PA in an oblique upward direction between the +Y and +Z directions, pushing the top plate 3 upwards in an oblique upward direction. This generation of the Lorentz force LF causes the top plate 3 to be pushed up by several millimeters.

[0034] When a large current flows, the faulty chip generates Joule heat. This can cause the constituent materials of the faulty chip (for example, silicon, a semiconductor material) to melt and vaporize. As a result, the pressure inside the semiconductor package increases by several hundred MPa. This pressure increase pushes the upper electrode 20 upward towards the top plate 3. The top plate 3 deforms upward due to the upward push of the upper electrode 20. This deformation of the top plate 3 pulls the upper electrodes 20 of other semiconductor packages connected in parallel with the faulty semiconductor package towards the top plate 3. This upward force on the upper electrodes 20 is the pulling force described above.

[0035] In this embodiment, the connection position EP of the upper electrode 20 with the top plate 3 is on the opposite side of the contact position AP with the lower electrode 10 when an upward force is applied, via the pivot position FP with the outer sealing portion 40B (see Figure 2). In the example in Figure 2, the upper electrode 20 is L-shaped, extending in the -X direction from the +X end side of the semiconductor element 30 in one semiconductor package, and also extending in the -Y direction from this semiconductor package. When the upward force described above is applied to the -Y end of the portion of the upper electrode 20 that extends in the -Y direction, the +Y end of the portion of the upper electrode 20 that extends in the +X direction comes into contact with the lower electrode 10.

[0036] Figure 6 is an explanatory diagram of the force acting on the upper electrode 20 in the embodiment. For example, to illustrate the force acting on the upper electrode 20, let's assume that the point of force application EP and the point of application are in opposite positions in the Y direction, separated by a fulcrum. In Figure 6, the point of force application (the base of the upward arrow in Figure 6) corresponds to the connection point EP between the upper electrode 20 and the top plate 3, the fulcrum (the apex of the triangle in Figure 6) corresponds to the fulcrum position FP between the upper electrode 20 and the outer sealing part 40B, and the point of application (the base of the downward arrow in Figure 6) corresponds to the contact point AP between the upper electrode 20 and the lower electrode 10 when the above-mentioned pulling force is applied. For example, if the distance from the fulcrum to the point of force application is three times the distance from the fulcrum to the point of application (a ratio of distances of 3:1), then when the above-mentioned pulling force is applied to the point of force application, a force three times greater than that applied to the fulcrum is applied to the fulcrum in the opposite direction. That is, the fulcrum is three times lower relative to the point of force application.

[0037] Figure 7 shows the dimensional relationship of the semiconductor package according to the embodiment. At least one of the lower electrode 10 and the upper electrode 20 extends outward from the semiconductor element 30 in a plan view. In the embodiment, each of the lower electrode 10 and the upper electrode 20 extends outward from the semiconductor element in a plan view. A space 29 is formed between the portions to which each of the lower electrode 10 and the upper electrode 20 extends.

[0038] When an upward pulling force is applied, the minimum distance Hm between at least one of the lower electrode 10 and the upper electrode 20 in the initial state before contact with the other is 0.1 mm or more and 2 mm or less. The minimum distance Hm corresponds to the initial distance in the Z direction between the +Z plane (upper surface) of the lower electrode 10 and the -Z plane (lower surface) of the upper electrode 20 (e.g., block portion 20A). For example, it is more preferable that the minimum distance Hm is 0.5 mm or more and 1 mm or less.

[0039] For example, a guard ring 35 may be provided on the semiconductor element 30 to protect the semiconductor element 30. For example, the semiconductor element 30 may be connected to the lower electrode 10 by a bonding material 32 such as solder. For example, the semiconductor element 30 may be connected to the upper electrode 20 by a bonding material 33 such as solder.

[0040] For example, the initial distance H1 between the +Z plane (top surface) of the lower electrode 10 and the +Z plane (top surface) of the guard ring 35 in the Z direction may be 0.1 mm or more and 0.5 mm or less. For example, the initial distance H2 between the +Z plane (top surface) of the guard ring 35 and the -Z plane (bottom surface) of the upper electrode 20 (e.g., block portion 20A) in the Z direction may be 0.1 mm or more and 0.5 mm or less.

[0041] For example, by extending the upper electrode 20 longer in the +Y direction than the semiconductor element, a larger space 29 can be created between the lower electrode 10 and the upper electrode 20. This makes it easier for the upper electrode 20 to make direct contact with the lower electrode 10. In other words, the +Y end of the upper electrode 20 is more likely to come into contact with the upper surface of the lower electrode 10. This contact causes a short circuit between the upper and lower electrodes (between the conductive members).

[0042] Furthermore, the space 29 exists so that the upper electrode 20 can come into contact with the lower electrode 10 when the above-mentioned pulling force acts on the upper electrode 20, and therefore has the following relationship (see Figure 4). 10Ly>20Ly>15Ly...Equation (1) 10Ly>30Ly...Equation (2)

[0043] In equations (1) and (2) above, 10Ly represents the length from the -Y end (reference position) to the +Y end of the lower electrode 10, 20Ly represents the length from the reference position to the +Y end of the upper electrode 20, 15Ly represents the length from the reference position to the +Y end of the spacer 15, and 30Ly represents the length from the reference position to the +Y end of the semiconductor element 30 (see Figure 4).

[0044] Figure 8 is an explanatory diagram illustrating the induction of a short-circuit fault. Figure 9 is a magnified view of the main part of Figure 8. Figure 10 is an explanatory diagram illustrating the induction of a short-circuit fault, following Figure 8. Figure 11 is a magnified view of the main part of Figure 10. For example, suppose a force acts on the top plate 3 away from the semiconductor element 30 due to the short-circuit failure of the semiconductor package, and a force acts on the -Y end of the upper electrode 20 towards the +Z side (force in the direction of arrow F1) (see Figure 8). Then, a downward force (force in the direction of arrow F2) acts on the +Y end of the upper electrode 20 via the fulcrum position FP with respect to the outer sealing portion 40B (see Figure 9). In other words, a force acts to bring the upper electrode 20 closer to the lower electrode 10 due to the lever principle. As a result, the +Y end of the upper electrode 20 comes into contact with the lower electrode 10. This contact causes a short circuit between the upper and lower electrodes (between the conductive members) (see Figures 10 and 11).

[0045] For example, spacers 16 and 17 (conductive members) may be provided on the upper surface of the lower electrode 10. Alternatively, a spacer 15 (conductive member) may be provided on the lower surface of the upper electrode 20. In this case, a force acting by the lever principle brings the upper electrode 20 closer to the lower electrode 10, causing the +Y side end of the spacer 15 on the lower side of the upper electrode 20 to contact the +Y side end of the spacer 17 on the upper side of the lower electrode 10. This contact causes a short circuit between the upper and lower electrodes (between the conductive members) (see Figures 10 and 11).

[0046] For example, in the case of Patent Document 1, design modifications are necessary to account for accompanying short-circuit failures. The magnitude of the resistance value within the semiconductor package during accompanying short-circuit failures is also prone to variation, and depending on the resistance value, there is a possibility of open-circuit failures, making the design difficult. While both Patent Document 1 and this embodiment utilize a similar pulling force to guarantee a short circuit, the methods of guaranteeing the short circuit differ. Patent Document 1 involves destroying the semiconductor chip to create a short circuit. In contrast, this embodiment does not require destroying a healthy semiconductor element. In this embodiment, a short circuit is guaranteed by bringing the conductors touching the upper and lower surfaces of the semiconductor element into contact with each other.

[0047] In this embodiment, the objective is to guarantee against short-circuit failure in the event of a malfunction. High-capacity semiconductor modules require continuous operation. High-capacity semiconductor modules have multiple semiconductor elements mounted in parallel, and the risk of failure is proportional to the number of semiconductor elements. Therefore, assuming that semiconductor elements will eventually fail, a structure is adopted that induces a short-circuit failure as a failure mode. Specifically, a short circuit is created by physically bringing a high-potential conductor and a low-potential conductor (between conductive members, for example, between the collector potential and emitter potential in the case of an IGBT) into contact. In this embodiment, a space 29 that short-circuits between conductive members is formed by the size of the conductors on the upper and lower surfaces of the semiconductor element.

[0048] As described above, the semiconductor module 1 of this embodiment includes a bottom plate 2, a top plate 3, a first semiconductor package PA, and a second semiconductor package PB. The bottom plate 2 and the top plate 3 are arranged facing each other. The first semiconductor package PA and the second semiconductor package PB are arranged between the bottom plate 2 and the top plate 3. Each of the first semiconductor package PA and the second semiconductor package PB includes a lower electrode 10, an upper electrode 20, and a semiconductor element 30. The lower electrode 10 is connected to the bottom plate 2. The upper electrode 20 is connected to the top plate 3. The semiconductor element 30 is arranged between the lower electrode 10 and the upper electrode 20. The semiconductor element 30 is connected to the lower electrode 10 and the upper electrode 20. When a force is applied by a short-circuited semiconductor package that pulls at least one of the bottom plate 2 and the top plate 3 away from the semiconductor element 30, at least one of the lower electrode 10 and the upper electrode 20 comes into contact with the other. The above configuration provides the following effects. When the above-mentioned pulling force is applied, the lower electrode 10 and the upper electrode 20 come into contact with each other, making it possible for a short-circuit failure to occur even in a healthy semiconductor package (a semiconductor package other than the one that caused the short-circuit failure). In addition, even if the first semiconductor package PA and the second semiconductor package PB are damaged, electrical conductivity can be maintained in the other semiconductor packages P. Therefore, it is possible to provide a semiconductor module 1 that can maintain electrical conductivity during high-energy failure.

[0049] At least one of the lower electrode 10 and the upper electrode 20 extends outward from the semiconductor element 30 in a plan view. The above configuration provides the following effects. Compared to the case where the lower electrode 10 and the upper electrode 20 are positioned inside the semiconductor element 30 in a plan view, the lower electrode 10 and the upper electrode 20 are more likely to come into contact with each other when the above-mentioned pulling force is applied. Therefore, this configuration is suitable for causing a short-circuit failure even in a healthy semiconductor package.

[0050] Each of the lower electrode 10 and the upper electrode 20 extends outward from the semiconductor element 30 in a plan view. A space 29 is formed between the extended portions of each of the lower electrode 10 and the upper electrode 20. The above configuration produces the following effects. For example, if the resistance is high during a short-circuit fault, the current will not flow easily after the short-circuit fault, which is equivalent to an open-circuit fault. If the system is operating under the assumption of a short-circuit fault and the situation is equivalent to an open-circuit fault, it becomes difficult to continue operation. In contrast, in this embodiment, if a short-circuit fault occurs while the above-mentioned space 29 is formed, the lower electrode 10 and the upper electrode 20 will come into direct contact with each other, resulting in low resistance. Therefore, the current will flow easily after the short-circuit fault, making it easier to continue operation.

[0051] The top plate 3 is positioned above the bottom plate 2. The semiconductor element 30 is covered with a sealing member 40. The sealing member 40 has a lower opening 41 that exposes the side of the lower electrode 10 opposite to the side connected to the semiconductor element 30, and a side opening 42 that opens to the side of the semiconductor element 30 so as to intersect with the lower opening 41. The lower electrode 10 is connected to the bottom plate 2 through the lower opening 41. The upper electrode 20 is connected to the top plate 3 through the side opening 42. The above configuration provides the following effects. The sealing member 40 protects the semiconductor element 30 from external factors. In addition, since the upper electrode 20 is connected to the top plate 3 through the side opening 42, when the above-mentioned pulling force is applied to the top plate 3, the lever principle can be used to apply a force that brings the upper electrode 20 closer to the lower electrode 10, making it easier for the lower electrode 10 and the upper electrode 20 to come into contact with each other. Therefore, it is suitable for causing a short-circuit failure even in a healthy semiconductor package.

[0052] The sealing member 40 covers the semiconductor element 30 and includes an inner sealing portion 40A which has lower rigidity than the top plate 3, and an outer sealing portion 40B which covers the inner sealing portion 40A and has higher rigidity than the inner sealing portion 40A. The above configuration provides the following effects. The inner sealing portion 40A, which has lower rigidity than the top plate 3, does not hinder the force that brings the upper electrode 20 closer to the lower electrode 10 during a short-circuit failure. In addition, the outer sealing portion 40B, which has higher rigidity than the inner sealing portion 40A, can be fixed to act as a fulcrum during a short-circuit failure. Therefore, it is more suitable for inducing short-circuit failures even in healthy semiconductor packages.

[0053] The upper electrode 20 has higher rigidity than the inner sealing portion 40A, which provides the following effects. In the event of a short-circuit failure, the upper electrode 20 can be tilted to move closer to the lower electrode 10 without deforming the upper electrode 20. Therefore, it is more suitable for inducing a short-circuit failure even in a healthy semiconductor package.

[0054] The connection position EP of the upper electrode 20 with the top plate 3 is positioned on the opposite side from the contact position AP with the lower electrode 10 when an upward force is applied, via the pivot position FP with the outer sealing portion 40B, thereby achieving the following effects. This method allows for efficient use of the lever principle, enabling a more suitable force to bring the upper electrode 20 closer to the lower electrode 10, and facilitating better contact between the lower electrode 10 and the upper electrode 20. Therefore, it is more suitable for causing short-circuit failures even in healthy semiconductor packages.

[0055] The upper electrode 20, when connected to the semiconductor element 30 via the spacer 15, produces the following effects. The spacer 15 allows adjustment of the minimum distance Hm between at least one of the lower electrode 10 and the upper electrode 20 in the initial state before contact with the other when an upward force is applied.

[0056] When an upward pulling force is applied, the minimum distance Hm between at least one of the lower electrode 10 and the upper electrode 20 in the initial state before contact with the other is 0.1 mm or more and 2 mm or less, which produces the following effects. For example, if the minimum distance Hm is less than 0.1 mm, it is too close, and there is a high possibility that the lower electrode 10 and the upper electrode 20 will come into contact with each other when no upward force is applied. For example, if the minimum distance Hm is greater than 2 mm, it is too far, and there is a high possibility that the lower electrode 10 and the upper electrode 20 will not come into contact with each other when an upward force is applied. In contrast, in this embodiment, by setting the minimum distance Hm to 0.1 mm or more and 2 mm or less, the initial state can be maintained when no upward force is applied, while making it easier for the lower electrode 10 and the upper electrode 20 to come into contact with each other when an upward force is applied.

[0057] Next, a modified example of the embodiment will be described. In this embodiment, the lower electrode and upper electrode each extend outward from the semiconductor element in a plan view. In contrast, the lower electrode and upper electrode each may be positioned inward from the semiconductor element in a plan view. The arrangement of the lower electrode and upper electrode can be changed according to the design specifications.

[0058] In the semiconductor module of this embodiment, a space is formed between the portions to which the lower electrode and the upper electrode each extend. Alternatively, a space may not be formed between the portions to which the lower electrode and the upper electrode each extend. For example, an intervening portion may be provided between the portions to which the lower electrode and the upper electrode each extend. The manner in which the space is formed can be changed according to the design specifications.

[0059] In this embodiment, the top plate (second metal member) is positioned above the bottom plate (first metal member). However, the top plate (second metal member) does not necessarily have to be positioned above the bottom plate (first metal member). For example, the second metal member may be positioned below or to the left or right of the first metal member. For example, each metal member may be in the shape of a block rather than a plate. For example, the arrangement and shape of each metal member can be changed according to the design specifications.

[0060] In this embodiment, the semiconductor module is energized from the bottom plate (first metal member) to the top plate (second metal member). However, it is not necessary for the energy to be energized from the bottom plate (first metal member) to the top plate (second metal member). For example, the energy may be energized from the top plate (second metal member) to the bottom plate (first metal member). For example, the direction of energy flow in the semiconductor module can be changed according to the design specifications.

[0061] In this embodiment, the semiconductor element is covered with a sealing member. However, the semiconductor element does not necessarily have to be covered with a sealing member. For example, the semiconductor element may be housed in a metal case covered with an insulating member. The covering method of the semiconductor element can be changed according to the design specifications.

[0062] A protrusion may be provided on the portion of the lower electrode and the upper electrode that comes into contact with the other when an upward pulling force is applied. For example, as shown in Figure 12, a protrusion 70A may be provided that projects toward the -Z side from the +Y end of the -Z plane of the upper electrode 20 toward the +Z plane of the lower electrode 10. Conversely, for example, a protrusion (not shown) may be provided that projects toward the +Z side from the +Z plane of the lower electrode 10 toward the +Y end of the -Z plane of the upper electrode 20. For example, as shown in Figure 13, a protrusion 70B may be provided that projects toward the +Y side parallel to the +Z plane of the lower electrode 10 toward the +Y side from the -Z end of the +Y plane of the upper electrode 20. This makes it easier for the lower electrode 10 and the upper electrode 20 to come into contact with each other via the protrusions 70A and 70B. Therefore, it is suitable for causing a short-circuit failure even in a healthy semiconductor package.

[0063] For example, as shown in Figure 14, the lower electrode 10 may have a portion 71 that extends from the +Y end to the upper electrode 20 parallel to the +Y plane and toward the +Z side. This makes it easier for the lower electrode 10 and the upper electrode 20 to come into contact with each other via the extended portion 71. Therefore, it is suitable for causing a short-circuit failure even in a healthy semiconductor package.

[0064] According to at least one embodiment described above, when a force is applied by a short-circuited semiconductor package that pulls at least one of the first and second metal members upward toward the opposite side of the semiconductor element, at least one of the first and second conductive members comes into contact with the other. This makes it possible to provide a semiconductor module that can maintain electrical conductivity during high-energy failure.

[0065] While several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These embodiments can be carried out in a variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims and their equivalents.

[0066] (Note 1) A first metal member and a second metal member are arranged facing each other, The device comprises a first semiconductor package and a second semiconductor package disposed between the first metal member and the second metal member, The first semiconductor package and the second semiconductor package are, A first conductive member connected to the first metal member, A second conductive member connected to the second metal member, The device comprises a semiconductor element disposed between the first conductive member and the second conductive member and connected to the first conductive member and the second conductive member, When a force is applied by a short-circuited semiconductor package that pulls at least one of the first and second metal members upward toward the opposite side from the semiconductor element, at least one of the first and second conductive members will come into contact with the other. Semiconductor module.

[0067] (Note 2) At least one of the first conductive member and the second conductive member extends outward from the semiconductor element in a plan view. The semiconductor module described in Appendix 1.

[0068] (Note 3) Each of the first conductive member and the second conductive member extends outward from the semiconductor element in the plan view, A space is formed between the portions to which each of the first conductive member and the second conductive member extends. The semiconductor module described in Appendix 2.

[0069] (Note 4) The second metal member is positioned above the first metal member, The semiconductor element is covered with a sealing member. The sealing member includes: A lower opening that exposes the surface of the first conductive member opposite to the surface connected to the semiconductor element, A side opening is formed that opens the side of the semiconductor element so as to intersect with the lower opening, The first conductive member is connected to the first metal member through the lower opening, The second conductive member is connected to the second metal member through the side opening. A semiconductor module as described in any one of the appendices 1 to 3.

[0070] (Note 5) The sealing member is An inner sealing portion that covers the semiconductor element and has lower rigidity than the second metal member, The system includes an outer sealing portion that covers the inner sealing portion and has higher rigidity than the inner sealing portion. The semiconductor module described in Appendix 4.

[0071] (Note 6) The second conductive member has higher rigidity than the inner sealing portion. The semiconductor module described in Appendix 5.

[0072] (Note 7) The connection position of the second conductive member with the second metal member is on the opposite side of the contact position with the first conductive member when the pulling force is applied, via the pivot position with the outer sealing portion. The semiconductor module described in Appendix 5 or 6.

[0073] (Note 8) The second conductive member is connected to the semiconductor element via a spacer. A semiconductor module as described in any one of the appendices 1 through 7.

[0074] (Note 9) When the aforementioned pulling force is applied, the minimum distance between at least one of the first conductive member and the second conductive member in the initial state before contact with the other is 0.1 mm or more and 2 mm or less. A semiconductor module as described in any one of the appendices 1 through 8.

[0075] (Note 10) When the aforementioned pulling force is applied, at least one of the first conductive member and the second conductive member has a protrusion at the portion that comes into contact with the other. A semiconductor module as described in any one of the appendices 1 through 9. [Explanation of Symbols]

[0076] 1...Semiconductor module, 2...Bottom plate (first metal component), 3...Top plate (second metal component), 10...Lower electrode (first conductive component), 20...Upper electrode (second conductive component), 29...Space, 30...Semiconductor element, 40...Sealing component, 40A...Inner sealing part, 40B...Outer sealing part, 41...Lower opening, 42...Side opening, 70A, 70B...Protrusions, Hm...Minimum distance, P...Semiconductor package, PA...First semiconductor package, PB...Second semiconductor package

Claims

1. A first metal member and a second metal member are arranged facing each other, The device comprises a first semiconductor package and a second semiconductor package disposed between the first metal member and the second metal member, Each of the first semiconductor package and the second semiconductor package is: A first conductive member connected to the first metal member, A second conductive member connected to the second metal member, The device comprises a semiconductor element disposed between the first conductive member and the second conductive member and connected to the first conductive member and the second conductive member, When a force is applied by a short-circuited semiconductor package that pulls at least one of the first metal member and the second metal member toward the side away from the semiconductor element, at least one of the first conductive member and the second conductive member comes into contact with the other. Semiconductor module.

2. At least one of the first conductive member and the second conductive member extends outward from the semiconductor element in a plan view. The semiconductor module according to claim 1.

3. Each of the first conductive member and the second conductive member extends outward from the semiconductor element in the plan view, A space is formed between the portions to which each of the first conductive member and the second conductive member extends. The semiconductor module according to claim 2.

4. The second metal member is positioned above the first metal member. The semiconductor element is covered with a sealing member. The sealing member includes: A lower opening that exposes the surface of the first conductive member opposite to the surface connected to the semiconductor element, A side opening is formed that opens the side of the semiconductor element so as to intersect with the lower opening, The first conductive member is connected to the first metal member through the lower opening, The second conductive member is connected to the second metal member through the side opening. A semiconductor module according to any one of claims 1 to 3.

5. The sealing member is An inner sealing portion that covers the semiconductor element and has lower rigidity than the second metal member, The system includes an outer sealing portion that covers the inner sealing portion and has higher rigidity than the inner sealing portion. The semiconductor module according to claim 4.

6. The second conductive member has higher rigidity than the inner sealing portion. The semiconductor module according to claim 5.

7. The connection position of the second conductive member with the second metal member is on the opposite side of the contact position with the first conductive member when the pulling force is applied, via the pivot position with the outer sealing portion. The semiconductor module according to claim 5.

8. The second conductive member is connected to the semiconductor element via a spacer. A semiconductor module according to any one of claims 1 to 3.

9. When the aforementioned pulling force is applied, the minimum distance between at least one of the first conductive member and the second conductive member in the initial state before contact with the other is 0.1 mm or more and 2 mm or less. A semiconductor module according to any one of claims 1 to 3.

10. The portion of the first conductive member and the second conductive member that comes into contact with the other when the aforementioned pulling force is applied is provided with a protrusion. A semiconductor module according to any one of claims 1 to 3.