Substrates for mounting semiconductor devices, and semiconductor packages
The substrate design with recessed heat sinks and uneven surfaces in semiconductor elements addresses heat transfer variations, ensuring efficient and stable heat dissipation by optimizing thermal grease volume and contact area, thus reducing thermal malfunctions.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- NITERRA CO LTD
- Filing Date
- 2024-12-11
- Publication Date
- 2026-06-23
AI Technical Summary
Existing technologies for heat transfer in semiconductor substrates exhibit variations in the amount of heat transferred to heat radiating members, leading to inefficiencies and potential thermal malfunctions.
A substrate design with a heat sink featuring recesses filled with thermal grease, where the recesses have an uneven bottom surface with increased roughness and the electrode positioned within the uneven region, allowing for precise adjustment of thermal grease volume and enhanced contact area, thereby improving heat transfer efficiency.
The design reduces variations in heat transfer, enhances thermal conductivity, and efficiently transfers heat from the semiconductor element to the heat dissipation member, minimizing thermal malfunctions.
Smart Images
Figure 2026101764000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a substrate for mounting a semiconductor element and a semiconductor package.
[0002] Conventionally, a substrate for mounting a semiconductor element including a heat sink for transferring the heat of a semiconductor element to an external heat radiating member has been known (for example, Patent Document 1).
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] However, even with the prior art such as Patent Document 1, there is still room for improvement in the technology for reducing the variation in the amount of heat transfer to the heat radiating member.
[0005] An object of the present invention is to provide a technology for reducing the variation in the amount of heat transfer to a heat radiating member in a substrate for mounting a semiconductor element.
Means for Solving the Problems
[0006] The present invention has been made to solve at least a part of the above-described problems and can be realized in the following forms.
[0007] (1) According to one embodiment of the present invention, a substrate for mounting a semiconductor element is provided. This substrate for mounting a semiconductor element comprises an insulating substrate having a pair of main surfaces, an electrode disposed on one of the pair of main surfaces of the insulating substrate and connected to a semiconductor element, and a heat sink disposed on the other of the pair of main surfaces of the insulating substrate, the heat sink having a surface on which a heat dissipation member is disposed, and a recess formed on the surface on which the heat dissipation member is disposed, the recess being filled with thermal grease that contacts both the heat dissipation member and the heat sink.
[0008] In this configuration, the heat sink plate, which contacts the external heat dissipation member via thermal grease, has recesses formed in it where the thermal grease is filled. This allows the volume of thermal grease filled in to be adjusted by adjusting the volume of the recesses. Therefore, variations in the amount of heat transferred to the heat dissipation member can be reduced.
[0009] (2) In the semiconductor element mounting substrate of the above form, the bottom surface inside the recess has an uneven shape, and the heat sink may have an arithmetic mean roughness Ra of the bottom surface greater than the arithmetic mean roughness Ra of the surface on which the insulating substrate is placed. With this configuration, the heat sink has an uneven shape on the bottom surface inside the recess, and the arithmetic mean roughness Ra of the bottom surface inside the recess is greater than the arithmetic mean roughness Ra of the surface on which the insulating substrate is placed. As a result, when thermal grease containing a filler is filled into the recess, the contact area between the filler and the heat sink can be increased. Therefore, heat transfer between the heat sink and the heat dissipation member can be promoted.
[0010] (3) In the semiconductor element mounting substrate of the above configuration, when the electrode and the recess are viewed from the stacking direction of the electrode, the insulating substrate, and the heat sink, the electrode may be located inside the region where the uneven shape is formed. With this configuration, when the electrode and the recess are viewed from the stacking direction of the electrode, the insulating substrate, and the heat sink, the electrode is located inside the region on the heat sink where the uneven shape is formed on the bottom surface inside the recess. The electrode to which the semiconductor element is connected serves as the path for heat transfer when the heat from the semiconductor element flows to the heat sink. By positioning the electrode inside the region where the uneven shape is formed in the stacking direction, the heat moving within the electrode is more easily transferred to the filler, which has an increased contact area with the heat sink, and the heat from the semiconductor element can be efficiently transferred to the heat dissipation member.
[0011] (4) In the semiconductor element mounting substrate of the above configuration, the depth of the recess may be less than the coating thickness (BLT) of the thermal grease. With this configuration, the depth of the recess into which the thermal grease is filled is less than the coating thickness specified for the thermal grease. As a result, when thermal grease containing filler is filled into the recess, the heat sink and the heat dissipation member are more easily connected via the filler. Therefore, the thermal conductivity between the heat sink and the heat dissipation member can be further improved.
[0012] (5) According to another embodiment of the present invention, a semiconductor package is provided. This semiconductor package comprises a substrate for mounting a semiconductor element and a semiconductor element connected to the electrode, wherein when the semiconductor element and the recess are viewed from the stacking direction of the semiconductor element, the electrode, the insulating substrate, and the heat sink, the semiconductor element is located inside the region where the uneven shape is formed. With this configuration, in a semiconductor package in which a semiconductor element is connected to an electrode, when the semiconductor element and the recess are viewed from the stacking direction of the semiconductor element, the electrode, the insulating substrate, and the heat sink, the semiconductor element is located inside the region where the uneven shape is formed. When thermal grease containing a filler is filled into the recess, the heat of the semiconductor element is more easily transferred to the heat dissipation member via the filler. Therefore, the heat of the semiconductor element can be efficiently transferred to the heat dissipation member, and the occurrence of thermal malfunctions in the semiconductor element can be suppressed.
[0013] Furthermore, the present invention can be realized in various forms, for example, in the form of a method for manufacturing a heat sink having a recess, a product including a heat sink having a recess, a product including a substrate for mounting semiconductor elements, a semiconductor package including a substrate for mounting semiconductor elements, a method for manufacturing the substrate for mounting semiconductor elements and the semiconductor package. [Brief explanation of the drawing]
[0014] [Figure 1] This is a schematic cross-sectional view of a semiconductor element mounting substrate according to the first embodiment. [Figure 2] This is a schematic cross-sectional view of the semiconductor package according to the first embodiment. [Figure 3] This is an enlarged view of section A in Figure 2. [Figure 4] This is a top view of the semiconductor package according to the first embodiment. [Figure 5] This is a schematic cross-sectional view of a comparative example semiconductor package. [Figure 6] This is a top view of a first modified example of the semiconductor package of the first embodiment. [Figure 7] This is a cross-sectional view of a second modified example of the semiconductor package of the first embodiment. [Modes for carrying out the invention]
[0015] <First Embodiment> Figure 1 is a schematic cross-sectional view of the semiconductor element mounting substrate 1 of the first embodiment. Figure 2 is a schematic cross-sectional view of the semiconductor package P1 of this embodiment. The semiconductor element mounting substrate 1 of this embodiment supports an optical semiconductor such as a light-emitting diode (LED) or a semiconductor laser (LD) as the semiconductor element 5 via electrodes 20 and functions as a heat dissipation substrate that releases heat generated during light emission to the outside. The semiconductor element mounting substrate 1 comprises an insulating substrate 10, electrodes 20, and a heat sink 30. The semiconductor package P1 of this embodiment comprises the semiconductor element mounting substrate 1, a semiconductor element 5, a heat dissipation member 40, and thermal grease 41. Note that the thickness relationships of the semiconductor element 5, insulating substrate 10, electrodes 20, heat sink 30, and heat dissipation member 40 in Figures 1 and 2 are illustrated differently from the actual thickness relationships for the sake of explanation.
[0016] The insulating substrate 10 is a plate-shaped member having a pair of main surfaces 10a and 10b. The insulating substrate 10 is formed from an insulating material. In this embodiment, the insulating substrate 10 is formed from aluminum nitride (AlN). As a result, the insulating substrate 10 maintains insulation between the electrode 20 and the heat sink 30 while having relatively high thermal conductivity. The thickness of the insulating substrate 10 is, for example, 3 μm. Note that the material forming the insulating substrate 10 is not limited to aluminum nitride. It may also be silicon nitride (Si3N4), silicon carbide (SiC), silicon oxide (SiO2), etc., as long as it is formed from an insulating material. It is desirable that the material forming the insulating substrate 10 is a material with high thermal conductivity.
[0017] The electrode 20 is disposed on one main surface 10a side of the pair of main surfaces 10a and 10b of the insulating substrate 10 and is connected to the semiconductor element 5. The electrode 20 is made of gold (Au). The thickness of the electrode 20 is, for example, 3.0 μm. The electrode 20 has a predetermined pattern shape so as to be connected to a predetermined location of the mounted semiconductor element 5. Note that the material forming the electrode 20 is not limited to gold and may be made of copper.
[0018] The heat sink 30 is disposed on the other main surface 10b side of the pair of main surfaces 10a and 10b of the insulating substrate 10. The heat sink 30 is formed of a material having relatively high thermal conductivity, for example, copper (Cu) or aluminum (Al). The thickness of the heat sink 30 is, for example, 100 μm. The heat sink 30 has a surface 30a on which the heat dissipation member 40 is disposed, and a depression 31 formed on the surface 30a on which the heat dissipation member 40 is disposed, and the depression 31 is filled with a heat dissipation grease 41 that contacts both the heat sink 30 and the heat dissipation member 40. The heat dissipation member 40 is, for example, a plate-like member formed of a metal having relatively high thermal conductivity. The heat dissipation grease 41 has a grease 411 and a filler 412 formed of a material having relatively high thermal conductivity.
[0019] FIG. 3 is an enlarged view of part A of FIG. 2 and shows a cross-sectional view including the bottom surface 31a inside the depression 31. As shown in FIG. 3, the bottom surface 31a inside the depression 31 of the heat sink 30 has an uneven shape. The heat sink 30 has an arithmetic mean roughness Ra of the bottom surface 31a larger than the arithmetic mean roughness Ra of the surface 30b (see FIG. 1) on which the insulating substrate 10 is disposed. In the semiconductor element mounting substrate 1 of the present embodiment, the bottom surface 31a has an uneven shape over the entire surface.
[0020] In the present embodiment, the depth d31 (see FIG. 2) of the depression 31 of the heat sink 30 is smaller than the coating thickness (BLT) of the heat dissipation grease 41. Thereby, the filler 412 of the heat dissipation grease 41 can easily contact both the heat sink 30 and the heat dissipation member 40 as shown in FIG. 2, and thus the heat conduction between the heat sink 30 and the heat dissipation member 40 can be improved.
[0021] FIG. 4 is a top view of the semiconductor package P1 of the present embodiment. FIG. 4 is a view of the semiconductor package P1 shown in FIG. 2 as seen from the positive side in the z-axis direction. In FIG. 4, for convenience of explanation, the heat dissipation member 40 is omitted. The heat dissipation plate 30 has a wall portion 32 formed so as to surround the depression 31 when the semiconductor element mounting substrate 1 is viewed from the minus side in the z-axis direction, which is the side opposite to the side from which the top view shown in FIG. 4 can be seen. The wall portion 32 contacts the heat dissipation member 40 when the semiconductor element mounting substrate 1 and the heat dissipation member 40 are joined as shown in FIG. 2. The wall portion 32 is a part of the heat dissipation plate 30 and is integrally formed as the heat dissipation plate 30. Specifically, the wall portion 32 is integrally formed with the portion that forms the bottom surface 31a inside the depression 31. In the present embodiment, as shown in FIG. 2, the wall portion 32 is formed so that the cross-sectional area decreases as it goes in the minus direction of the z-axis.
[0022] In the semiconductor element mounting substrate 1 of the present embodiment, when the electrode 20 and the depression 31 are viewed from the stacking direction (z-axis direction) of the electrode 20, the insulating substrate 10, and the heat dissipation plate 30, the electrode 20 is located inside the region where the concavo-convex shape is formed. Specifically, in the top view of the semiconductor element mounting substrate 1 shown in FIG. 4, when the bottom surface 31a of the depression 31 where the concavo-convex shape is formed is indicated by dot hatching, the electrode 20 is located inside the region R1 indicated by this dot hatching. That is, in the z-axis direction, the concavo-convex shape of the bottom surface 31a inside the depression 31 of the heat dissipation plate 30 is at least located directly below the electrode 20.
[0023] In the semiconductor package P1 of the present embodiment, when the semiconductor element 5 and the depression 31 are viewed from the stacking direction of the semiconductor element 5, the electrode 20, the insulating substrate 10, and the heat dissipation plate 30, the semiconductor element 5 is located inside the region R1 (the region R1 indicated by dot hatching) where the concavo-convex shape is formed. That is, in the z-axis direction, the concavo-convex shape of the bottom surface 31a inside the depression 31 of the heat dissipation plate 30 is at least located directly below the semiconductor element 5.
[0024] Next, the manufacturing method of the semiconductor element mounting substrate 1 of this embodiment will be described. In manufacturing the semiconductor element mounting substrate 1, first, a metal plate material that will become a heat sink 30 is prepared. Next, only one of the pair of main surfaces of the metal plate material is polished. As a result, the surface roughness of one main surface and the other main surface of the pair of main surfaces of the metal plate material will be different. Next, the other main surface of the pair of main surfaces of the metal plate material is processed to form a recess 31. At this time, the bottom surface inside the recess 31 may be roughened by another process. Next, an insulating substrate 10 is bonded to one of the main surfaces of the metal plate material. Finally, one semiconductor element mounting substrate 1 is manufactured by forming electrodes 20 on the insulating substrate 10.
[0025] Next, the manufacturing method of the semiconductor package P1 of this embodiment will be described. In the manufacturing of the semiconductor package P1, thermal grease 41 is filled into the recess 31 of the semiconductor element mounting substrate 1 so as not to form any gaps, and the semiconductor element mounting substrate 1 is placed on the heat dissipation member 40 so that the tip of the wall portion 32 of the heat sink plate 30 is in contact with the heat dissipation member 40. In this way, the volume of thermal grease 41 in contact with the heat sink plate 30 and the heat dissipation member 40 of the semiconductor element mounting substrate 1 can be adjusted by the volume of the recess 31.
[0026] Another method for manufacturing the semiconductor element mounting substrate 1 of this embodiment makes it possible to manufacture multiple semiconductor element mounting substrates 1 simultaneously. In this alternative method for manufacturing the semiconductor element mounting substrate 1, a single metal plate material having the size of multiple heat sinks 30 is prepared. Next, only one of the pair of main surfaces of the prepared metal plate material is polished. Next, an insulating substrate 10 is bonded to one of the main surfaces of the metal plate material, and multiple electrodes 20 are formed on the insulating substrate 10. Next, the metal plate material is cut together with the insulating substrate 10 between adjacent electrodes 20. As a result, multiple semiconductor element mounting substrates 1 are manufactured simultaneously. When cutting the metal plate material together with the insulating substrate 10, burrs are formed on the heat sink 30 by cutting the insulating substrate 10 and the metal plate material from the side where the electrodes 20 are formed. The burrs are formed so as to protrude on the heat sink 30 in the direction opposite to the electrodes 20. Therefore, the height of the burrs is adjusted by polishing or the like, and they are used as recesses surrounded by the burrs. In this case, the burr becomes the wall portion 32.
[0027] Figure 5 is a schematic cross-sectional view of the comparative example semiconductor package P90. The comparative example semiconductor package P90 shown in Figure 5 comprises a comparative example semiconductor element mounting substrate 90, a semiconductor element 5, a heat dissipation member 40, and a heat dissipation grease 41. The comparative example semiconductor element mounting substrate 90 comprises an insulating substrate 10, an electrode 20, a heat sink 91, and a guide member 92.
[0028] The heat sink 91 is positioned on the other main surface 10b of the pair of main surfaces 10a and 10b of the insulating substrate 10. The heat sink 91 is made of a material with relatively high thermal conductivity, similar to the heat sink 30 of the semiconductor element mounting substrate 1 in this embodiment. One of the pair of main surfaces 91a and 91b of the heat sink 91, the main surface 91a, is in contact with the heat dissipation member 40 via the thermal grease 41.
[0029] The guide member 92 is positioned on the side surface 91c of the heat sink 91. The guide member 92 is formed of, for example, resin. As shown in Figure 5, the guide member 92 is positioned such that its negative z-axis end protrudes further in the negative z-axis direction than one of the main surfaces 91a of the heat sink 91.
[0030] In the comparative example semiconductor element mounting substrate 90, when joining it to the heat dissipation member 40, the volume of the heat dissipation grease 41 is adjusted by filling a recess 93 formed by one main surface 91a of the heat sink 91 and the guide member 92 with heat dissipation grease 41. However, in order to form the recess 93, it is necessary to join the heat sink 91 and the guide member 92, which not only increases the number of steps required to manufacture the semiconductor element mounting substrate 90, but also, depending on the position where the guide member 92 is joined, the thickness of the heat dissipation grease 41 may change, potentially causing variations in the amount of heat transferred.
[0031] As described above, the semiconductor element mounting substrate 1 of this embodiment has a heat sink 30 that contacts the external heat dissipation member 40 via a heat dissipation grease 41, and a recess 31 is formed in the heat sink 30 into which the heat dissipation grease 41 is filled. This allows the volume of heat dissipation grease 41 filled to be adjusted by adjusting the volume of the recess 31. Therefore, it is possible to reduce in-plane variations in the amount of heat transferred to the heat dissipation member 40 on a single semiconductor element mounting substrate 1, so-called heat transfer unevenness.
[0032] Furthermore, in the semiconductor element mounting substrate 1 of this embodiment, a recess 31 is formed by a wall portion 32 which is part of the heat sink 30 and is integrally formed as the heat sink 30. As a result, the volume of the thermal grease 41 can be adjusted without providing a separate guide member 92, as in the semiconductor element mounting substrate 90 of the comparative example shown in Figure 5. Therefore, the number of steps required to manufacture the semiconductor element mounting substrate 1 can be reduced.
[0033] Furthermore, according to the semiconductor element mounting substrate 1 of this embodiment, the volume of the heat dissipation grease 41 filled can be adjusted by adjusting the volume of the recess 31, so that the volume of heat dissipation grease 41 filled can be adjusted for each of the multiple semiconductor element mounting substrates 1. Therefore, it is possible to reduce variations in the amount of heat transferred to the heat dissipation member 40 for each of the multiple semiconductor element mounting substrates 1.
[0034] Furthermore, according to the semiconductor element mounting substrate 1 of this embodiment, the heat sink 30 has an uneven shape on the bottom surface 31a inside the recess 31, and the arithmetic mean roughness Ra of the bottom surface 31a inside the recess 31 is greater than the arithmetic mean roughness Ra of the surface 30a on which the insulating substrate 10 is placed. This increases the contact area between the filler 412 and the heat sink 30. Therefore, heat transfer between the heat sink 30 and the heat dissipation member 40 can be promoted.
[0035] Furthermore, according to the semiconductor element mounting substrate 1 of this embodiment, when the electrode 20 and the recess 31 are viewed from the stacking direction of the electrode 20, the insulating substrate 10, and the heat sink 30, the electrode 20 is located inside the region R1 on the heat sink 30 where the uneven shape is formed on the bottom surface 31a inside the recess 31. The electrode 20 to which the semiconductor element 5 is connected serves as the path for the heat from the semiconductor element 5 to flow to the heat sink 30. By positioning the electrode 20 inside the region R1 where the uneven shape is formed in the stacking direction, the heat moving within the electrode 20 is more easily transferred to the filler 412, which has an increased contact area with the heat sink 30, and the heat from the semiconductor element 5 can be efficiently transferred to the heat dissipation member 40.
[0036] Furthermore, according to the semiconductor element mounting substrate 1 of this embodiment, the depth d31 of the recess 31 filled with thermal grease 41 is smaller than the coating thickness (BLT) specified for the thermal grease 41. This makes it easier to connect the heat sink 30 and the heat dissipation member 40 via the filler 412. Therefore, the thermal conductivity between the heat sink 30 and the heat dissipation member 40 can be further improved.
[0037] Furthermore, according to the semiconductor package P1 of this embodiment, in the semiconductor package P1 in which the semiconductor element 5 is connected to the electrode 20, when the semiconductor element 5 and the recess 31 are viewed from the stacking direction of the semiconductor element 5, electrode 20, insulating substrate 10 and heat sink 30, the semiconductor element 5 is located inside the region R1 in which the uneven shape is formed. As a result, the heat of the semiconductor element 5 is more easily transferred to the heat sink 40 via the filler 412. Therefore, the heat of the semiconductor element 5 can be efficiently transferred to the heat sink 40, and thus the occurrence of thermal malfunctions in the semiconductor element 5 can be suppressed.
[0038] <Modified form of this embodiment> The present invention is not limited to the embodiments described above, and can be implemented in various forms without departing from its spirit, for example, the following modifications are also possible.
[0039] [Example 1] In the above-described embodiment, the bottom surface 31a inside the recess 31 has an uneven shape, and the heat sink 30 is configured such that the arithmetic mean roughness Ra of the bottom surface 31a is greater than the arithmetic mean roughness Ra of the surface 30a on which the insulating substrate 10 is placed. The relationship between the arithmetic mean roughness Ra of the bottom surface 31a and the arithmetic mean roughness Ra of the surface 30a on which the insulating substrate 10 is placed is not limited to this. By processing the bottom surface 31a so that the arithmetic mean roughness Ra of the bottom surface 31a is greater than the arithmetic mean roughness Ra of the surface 30a on which the insulating substrate 10 is placed, the contact area between the filler 412 contained in the thermal grease 41 and the bottom surface 31a is increased, thereby promoting heat transfer between the heat sink 30 and the heat dissipation member 40.
[0040] [Differentiation 2] In the above-described embodiment, when the electrode 20 and the recess 31 are viewed from the stacking direction of the electrode 20, the insulating substrate 10, and the heat sink 30, the electrode 20 is assumed to be located inside the region R1 in which the uneven shape of the inner bottom surface 31a of the recess 31 is formed. However, the electrode 20 does not have to be located inside the region R1 in which the uneven shape is formed.
[0041] [Difference 3] In the above-described embodiment, the bottom surface 31a inside the recess 31 of the heat sink 30 was assumed to have an uneven surface over its entire surface. However, the location of the uneven surface on the bottom surface 31a is not limited to this.
[0042] Figure 6 is a top view of a first modified example of the semiconductor package P1 of the first embodiment. Figure 6 shows the semiconductor package P1 as seen from the positive side in the z-axis direction, as shown in Figure 4. In Figure 6, the region R1 in which the uneven shape is formed on the bottom surface 31a inside the recess 31 is located in the central part of the bottom surface 31a. Even if the region R1 in which the uneven shape is formed is located in the position shown in Figure 6, if the electrode 20 and semiconductor element 5 are located directly above it, the heat from the semiconductor element 5 can be efficiently transferred to the heat dissipation member 40.
[0043] [Differentiation Example 4] In the above-described embodiment, the depth d31 of the recess 31 was set to be smaller than the thickness of the thermal grease 41 applied. However, the depth d31 of the recess 31 may be deeper than the thickness of the thermal grease 41 applied. By making the depth of the recess 31 smaller than the thickness of the thermal grease 41 applied, the filler 412 of the thermal grease 41 can more easily come into contact with both the heat sink 30 and the heat dissipation member 40, thereby improving heat conduction between the heat sink 30 and the heat dissipation member 40.
[0044] [Difference 5] In the above-described embodiment, the thermal grease 41 is filled into the recess 31, but the thermal grease 41 may overflow from the recess 31. It is sufficient if the volume of the thermal grease 41 can be adjusted by the volume of the recess 31.
[0045] Figure 7 is a cross-sectional view of a second modified example of the semiconductor package P1 of the first embodiment. In the semiconductor package P1 shown in Figure 7, thermal grease 413 is also arranged on the outside of the recess 31, that is, on the opposite side of the recess when viewed from the wall portion 32. This thermal grease 413 is, for example, when a semiconductor element mounting substrate 1 with thermal grease 41 filled in the recess 31 is placed on the heat dissipation member 40, some of the thermal grease 41 that could not fit into the recess 31 overflows from the recess 31. Even in this state, the volume of thermal grease 41 filled in the recess 31 can be adjusted by the wall portion 32 contacting the heat dissipation member 40. This makes it possible to reduce variations in the amount of heat transferred to the heat dissipation member 40.
[0046] [Modification 6] In the above-described embodiment, the wall portion 32 of the heat sink 30 is in contact with the heat dissipation member 40 in the semiconductor package P1. In the semiconductor package P1, the wall portion 32 does not have to be in contact with the heat dissipation member 40, but by having the wall portion 32 in contact with the heat dissipation member 40, the volume of the thermal grease 41 can be made the same as the volume of the recess 31.
[0047] [Difference 7] In the embodiments described above, the semiconductor element 5 mounted on the semiconductor element mounting substrate was described as a light-emitting diode or a semiconductor laser, but it is not limited to these. It may also be a power semiconductor or the like, which generates a relatively large amount of heat.
[0048] The embodiments of this specification have been described above based on the embodiments and modifications described above. The embodiments described above are for the purpose of facilitating understanding of this specification and do not limit it. This specification may be modified and improved without departing from its spirit and the scope of the claims, and equivalents thereof are included in this specification. Furthermore, any technical features that are not described as essential in this specification may be deleted as appropriate.
[0049] (Application Example 1) A substrate for mounting semiconductor devices, An insulating substrate having a pair of main surfaces, An electrode is disposed on one of the pair of main surfaces of the insulating substrate and connected to a semiconductor element, A heat sink disposed on the other main surface side of the pair of main surfaces of the insulating substrate, comprising: a surface on which a heat dissipation member is disposed; and a recess formed on the surface on which the heat dissipation member is disposed, the recess being filled with thermal grease that contacts both the heat dissipation member and the heat sink, characterized in that it comprises a heat sink, A substrate for mounting semiconductor devices. (Application Example 2) A semiconductor element mounting substrate as described in Application Example 1, The inner bottom surface of the aforementioned recess has an uneven shape. The heat sink is characterized in that the arithmetic mean roughness Ra of the bottom surface is greater than the arithmetic mean roughness Ra of the surface on which the insulating substrate is placed. A substrate for mounting semiconductor devices. (Application Example 3) A semiconductor element mounting substrate as described in Application Example 1 or Application Example 2, When the electrode and the recess are viewed from the stacking direction of the electrode, the insulating substrate and the heat sink, The electrode is characterized by being located inside the region where the uneven shape is formed. A substrate for mounting semiconductor devices. (Application Example 4) A semiconductor element mounting substrate as described in any one of Application Examples 1 to 3, The depth of the recess is characterized by being smaller than the coating thickness (BLT) of the thermal grease. A substrate for mounting semiconductor devices. (Application Example 4) A semiconductor package, A semiconductor element mounting substrate as described in any one of Application Examples 1 to 3, The semiconductor element connected to the electrode comprises, When the semiconductor element and the recess are viewed from the stacking direction of the semiconductor element, the electrode, the insulating substrate and the heat sink, The semiconductor element is characterized by being located inside the region where the uneven shape is formed. Semiconductor package. [Explanation of symbols]
[0050] 1…Substrate for mounting semiconductor devices 5… Semiconductor elements 10…Insulating substrate 10a, 10b… A pair of main surfaces (of the insulating substrate) 10a... One main surface (of the insulating substrate) 20...Electrode 30...Heat sink 30a...Surface on which heat dissipation components are placed 31…Indentation 31a…Bottom surface 40…Heat dissipation components 41… Thermal grease 412... Filler d31… (depth of the depression) P1... Semiconductor package R1…area
Claims
1. A substrate for mounting semiconductor devices, An insulating substrate having a pair of main surfaces, An electrode is disposed on one of the pair of main surfaces of the insulating substrate and connected to a semiconductor element, A heat sink disposed on the other main surface side of the pair of main surfaces of the insulating substrate, comprising: a surface on which a heat dissipation member is disposed; and a recess formed on the surface on which the heat dissipation member is disposed, the recess being filled with thermal grease that contacts both the heat dissipation member and the heat sink, characterized in that it comprises a heat sink, A substrate for mounting semiconductor devices.
2. A semiconductor element mounting substrate according to claim 1, The inner bottom surface of the aforementioned recess has an uneven shape. The heat sink is characterized in that the arithmetic mean roughness Ra of the bottom surface is greater than the arithmetic mean roughness Ra of the surface on which the insulating substrate is placed. A substrate for mounting semiconductor devices.
3. A semiconductor element mounting substrate according to claim 2, When the electrode and the recess are viewed from the stacking direction of the electrode, the insulating substrate and the heat sink, The electrode is characterized by being located inside the region where the uneven shape is formed. A substrate for mounting semiconductor devices.
4. A substrate for mounting semiconductor elements according to claim 1 or claim 2, The depth of the recess is characterized by being smaller than the coating thickness (BLT) of the thermal grease. A substrate for mounting semiconductor devices.
5. A semiconductor package, A semiconductor element mounting substrate according to claim 2, The semiconductor element connected to the electrode comprises, When the semiconductor element and the recess are viewed from the stacking direction of the semiconductor element, the electrode, the insulating substrate and the heat sink, The semiconductor element is characterized by being located inside the region where the uneven shape is formed. Semiconductor package.