Semiconductor device and method for manufacturing a semiconductor device

JP2026101864APending Publication Date: 2026-06-23MITSUBISHI ELECTRIC CORP

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
MITSUBISHI ELECTRIC CORP
Filing Date
2024-12-11
Publication Date
2026-06-23

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Abstract

The objective is to provide a technology that can suppress the peeling of the semi-insulating film. [Solution] The semiconductor device comprises a first insulating film provided on a semiconductor layer and having a first opening that exposes an impurity region, and mainly composed of SiO2; a second insulating film provided on the first insulating film and having a second opening that exposes an impurity region, and mainly composed of SiO2; and a semi-insulating film provided on the second insulating film and connected to the impurity region via the first and second openings, wherein the width of the second opening is greater than the width of the first opening.
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Claims

1. A semiconductor layer having a first conductivity type, A semiconductor element provided in the aforementioned semiconductor layer, A second impurity region having a second conductivity type is selectively provided in the upper part of the outer peripheral portion surrounding the semiconductor element of the semiconductor layer, A first opening is provided on the semiconductor layer and exposes the impurity region, and SiO 2 A first insulating film containing as the main component, A second opening is provided on the first insulating film and exposes the impurity region, and SiO 2 A second insulating film containing as the main component, A semi-insulating film provided on the second insulating film and connected to the impurity region via the first and second openings, Equipped with, The impurity region includes at least one of a guard ring and a floating ring. A semiconductor device in which the width of the second aperture is greater than the width of the first aperture.

2. A semiconductor device according to claim 1, A semiconductor device in which the outer edge of the first opening of the semiconductor layer is located outside the semiconductor layer, beyond the outer edge of the impurity region of the semiconductor layer.

3. A semiconductor device according to claim 1 or claim 2, The impurity region includes the guard ring and the floating ring, The first opening is provided spanning the guard ring and the floating ring, The semiconductor device is connected to the guard ring and the floating ring by the aforementioned semi-insulating film.

4. A semiconductor device according to claim 1 or claim 2, A semiconductor device further comprising a moisture-resistant insulating film provided on the semi-insulating film.

5. A semiconductor device according to claim 1 or claim 2, A semiconductor device wherein the first portion of the first insulating film below the second opening is thinner than the second portion of the first insulating film other than the first portion.

6. A semiconductor device according to claim 1 or claim 2, A semiconductor device wherein the density of the second insulating film is less than the density of the first insulating film.

7. A semiconductor device according to claim 1 or claim 2, Each of the first insulating film and the second insulating film further contains phosphorus, A semiconductor device wherein the phosphorus concentration of the second insulating film is greater than the phosphorus concentration of the first insulating film.

8. A method for manufacturing a semiconductor device according to claim 1 or claim 2, A step of forming the first insulating film by thermal oxidation, The process of forming the second insulating film by chemical vapor deposition, A step of forming the first opening and the second opening in parallel with the first insulating film and the second insulating film, respectively, by wet etching. A method for manufacturing a semiconductor device, comprising:

9. A semiconductor layer having a first conductivity type, A semiconductor element provided in the aforementioned semiconductor layer, A second impurity region having a second conductivity type is selectively provided in the upper part of the outer peripheral portion surrounding the semiconductor element of the semiconductor layer, A first insulating film is provided on the semiconductor layer and has a first opening that exposes the impurity region, A nonmetallic film provided on the first insulating film, having a second opening that exposes the impurity region, and having insulating or semi-insulating properties, A semi-insulating film provided on the non-metallic film and connected to the impurity region through the first opening and the second opening, Equipped with, The aforementioned impurity region includes a floating ring. A semiconductor device in which the width of the second aperture is smaller than the width of the first aperture.

10. A semiconductor layer having a first conductivity type, A semiconductor element provided in the aforementioned semiconductor layer, A second impurity region having a second conductivity type is selectively provided in the upper part of the outer peripheral portion surrounding the semiconductor element of the semiconductor layer, A first insulating film is provided on the semiconductor layer and has a first opening that exposes the impurity region, A second insulating film is provided on the first insulating film and has a second opening that exposes the impurity region, A nonmetallic film provided on the second insulating film, having a third opening that exposes the impurity region, and having insulating or semi-insulating properties, A semi-insulating film provided on the non-metallic film and connected to the impurity region via the first opening, the second opening and the third opening, and Equipped with, The aforementioned impurity region includes a floating ring. The width of the second opening is greater than the width of the first opening. A semiconductor device wherein the width of the third aperture is smaller than the width of the second aperture.

11. A semiconductor device according to claim 9 or claim 10, The impurity region includes a plurality of the floating rings, The first opening is provided spanning the plurality of floating rings, The aforementioned semi-insulating film is connected to the plurality of floating rings in a semiconductor device.

12. A semiconductor device according to claim 9 or claim 10, The aforementioned impurity region further includes a guard ring, The first opening is provided spanning the guard ring and the floating ring, The semiconductor device is connected to the guard ring and the floating ring by the aforementioned semi-insulating film.

13. A semiconductor device according to claim 9 or claim 10, A semiconductor device in which the outer edge of the first opening of the semiconductor layer is located outside the semiconductor layer, beyond the outer edge of the impurity region of the semiconductor layer.

14. A semiconductor device according to claim 9 or claim 10, A semiconductor device further comprising a moisture-resistant insulating film provided on the semi-insulating film.

15. A method for manufacturing a semiconductor device according to claim 9, A step of forming the first insulating film by thermal oxidation, A step of forming the nonmetallic film, which has a wet etching rate lower than that of the first insulating film, by chemical vapor deposition, A step of forming the second opening in the nonmetallic film by dry etching, A step of forming the first opening in the first insulating film by wet etching. A method for manufacturing a semiconductor device, comprising:

16. A method for manufacturing a semiconductor device according to claim 10, A step of forming the first insulating film by thermal oxidation, The process of forming the second insulating film by chemical vapor deposition, A step of forming the nonmetallic film having a wet etching rate lower than that of the first insulating film and the second insulating film by chemical vapor deposition, A step of forming the third opening in the nonmetallic film by dry etching, A step of forming the first opening and the second opening in parallel with the first insulating film and the second insulating film, respectively, by wet etching. A method for manufacturing a semiconductor device, comprising: