Semiconductor equipment

Abstract

The objective is to provide a semiconductor device that can reduce the space required within the package. [Solution] The semiconductor device according to this disclosure comprises a package having a first side and a second side opposite to the first side; a conductor layer having a first region provided inside the package and a second region provided inside the package between the first region and the second side; a semiconductor chip provided on the first region; a control chip provided on the second region; a power terminal provided on the first side; a control terminal provided on the second side; and a suspension lead extending from a position on the outer periphery of the package closer to the first side than the first region to the second region, wherein the suspension lead has a stepped portion formed such that the portion connected to the second region is lower than the portion provided on the outer periphery, and the second region is provided at a lower position than the portion of the control terminal provided inside the package.

Description

Technical Field

[0001] This disclosure relates to a semiconductor device.

Background Art

[0002] Patent Document 1 discloses a package structure of a power module. This package structure includes a power element and a lead frame. A circuit board is connected to a part of the lead frame. A control element is installed on the circuit board.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In Patent Document 1, pins connected to the power element are provided on one side of the package, and pins connected to the control element are provided on the other side of the package. Each pin has a step inside the package. Thereby, the power element or the like can be arranged on the heat dissipation surface side. However, in such a structure, when the lead frame is bent to form steps on the pins on both sides of the package, there is a possibility that extra space may occur in the package.

[0005] This disclosure is made to solve the above problems, and an object thereof is to provide a semiconductor device capable of suppressing the space inside the package.

Means for Solving the Problems

[0006] The semiconductor device according to this disclosure comprises: a package having a first side and a second side opposite to the first side; a conductor layer having a first region provided inside the package and a second region provided inside the package between the first region and the second side; a semiconductor chip provided on the first region; a control chip provided on the second region and configured to control the semiconductor chip; a power terminal provided on the first side of the package and electrically connected to the semiconductor chip; a control terminal provided on the second side of the package and electrically connected to the control chip; and a suspension lead extending from a position on the outer periphery of the package closer to the first side than the first region to the second region, wherein the suspension lead has a first stepped portion formed such that the portion connected to the second region is lower than the portion provided on the outer periphery, and the second region is provided at a lower position than the portion of the control terminal provided inside the package. [Effects of the Invention]

[0007] In the semiconductor device according to this disclosure, a stepped portion is formed on the suspension lead extending from a position closer to the first edge than the first region to the second region. Therefore, it is not necessary to bend the lead on the second edge side inside the package in order to position the second region below the package. Consequently, the space required inside the package can be reduced. [Brief explanation of the drawing]

[0008] [Figure 1] This is a plan view of the semiconductor device according to Embodiment 1. [Figure 2] This is a cross-sectional view of the semiconductor device according to Embodiment 1. [Figure 3] This is a plan view of the semiconductor device relating to the first comparative example. [Figure 4] This figure illustrates the method for forming a stepped portion in the second comparative example. [Figure 5] This is a diagram illustrating the method for forming a stepped portion according to Embodiment 1. [Figure 6] This is a cross-sectional view of the semiconductor device according to Embodiment 2. [Figure 7] This is a plan view of the semiconductor device according to Embodiment 4. [Modes for carrying out the invention]

[0009] The semiconductor devices according to each embodiment will be described with reference to the drawings. The same or corresponding components are denoted by the same reference numerals, and repetition of the description may be omitted.

[0010] Embodiment 1. Figure 1 is a plan view of the semiconductor device 100 according to Embodiment 1. Figure 2 is a cross-sectional view of the semiconductor device 100 according to Embodiment 1. The semiconductor device 100 includes a package 10. The package 10 is formed of, for example, a sealing resin. The package 10 has a first side 11, a second side 12 opposite to the first side 11, and a third side 13 and a fourth side 14 between the first side 11 and the second side 12.

[0011] Inside the package 10, a conductive layer having a first region 21 and a second region 22 is provided. The first region 21 and the second region 22 are, for example, separately provided metal plates, which can be made of copper. The second region 22 is provided between the first region 21 and the second side 12. A semiconductor chip 31 is provided on the first region 21. A control chip 32 configured to control the semiconductor chip 31 is provided on the second region 22. In other words, the first region 21 is the power-side die pad, and the second region 22 is the control-side die pad. Note that the first region 21 and the second region 22 may also be circuit patterns.

[0012] In the example shown in Figure 1, six semiconductor chips 31 are mounted in four first regions 21. The semiconductor chips 31 are, for example, power chips. The number of first regions 21 in the package 10 is not limited. Furthermore, the number and type of semiconductor chips 31 housed in the package 10 are not limited. Also, the number of semiconductor chips 31 provided in a single first region 21 is not limited.

[0013] In the example shown in Figure 1, two second regions 22 are provided, and one control chip 32 is mounted in each second region 22. The control chip 32 may be an IC chip. The number of second regions 22 in the package 10 is not limited. Also, the number of control chips 32 provided in one second region 22 is not limited.

[0014] The first side 11 of the package 10 is provided with power terminals 41 that are electrically connected to the semiconductor chip 31. Some of the power terminals 41 and the semiconductor chip 31 are electrically connected by power wires 61. Some of the power terminals 41 are directly connected to the first region 21. The second side 12 of the package 10 is provided with control terminals 42 that are electrically connected to the control chip 32. Multiple control terminals 42 and the control chip 32 are electrically connected by control wires 63. In addition, the semiconductor chip 31 and the control chip 32 are electrically connected by wires 62.

[0015] The semiconductor device 100 includes suspension leads 44 that extend from a position on the outer periphery of the package 10 closer to the first side 11 than the first region 21 to the second region 22. The terminals, die pads, and suspension leads 44 shown in Figures 1 and 2 are provided as part of the lead frame. Before the outer frame of the lead frame (not shown) is cut, each terminal is supported by the outer frame of the lead frame. The suspension leads 44 have the function of fixing the second region 22 to the outer frame of the lead frame. In this embodiment, a pair of suspension leads 44 are provided on both sides of the package 10. This allows for the support of two second regions 22. The number and arrangement of the suspension leads 44 can be changed as appropriate.

[0016] As shown in FIG. 2, a stepped portion 41a is formed inside the package 10 on the power terminal 41. Thereby, the first region 21 is disposed at a position lower than a portion of the power terminal 41 provided at the end of the package 10. An insulating layer 51, which is an insulating sheet or an insulating substrate, is provided directly below the first region 21 inside the package 10. A conductor layer 24 is provided below the insulating layer 51. The lower surface of the package 10 serves as a heat dissipation surface. Therefore, by bringing the first region 21 closer to the heat dissipation surface, the heat dissipation property of the semiconductor chip 31 can be improved. In the cross-sectional view shown in FIG. 2, the plurality of power terminals 41 overlap each other.

[0017] The plurality of control terminals 42 may not have a stepped portion provided inside the package 10. That is, the plurality of control terminals 42 may extend horizontally inside the package 10. In the cross-sectional view shown in FIG. 2, the plurality of control terminals 42 overlap each other. Also, in the present embodiment, only the sealing resin is provided directly below the second region 22 inside the package 10. Note that the configuration directly below the first region 21 and the second region 22 can be changed as appropriate.

[0018] Here, for the sake of explanation, a portion from the first side 11 of the package 10 to the stepped portion 41a is defined as a region A1. In the region A1, the power terminal 41 is provided horizontally. A portion of the package 10 where the stepped portion 41a of the power terminal 41 is provided is defined as a region A2. A portion of the package 10 where the first region 21 is provided is defined as a region A3. A portion between the first region 21 and the second region 22 of the package 10 is defined as a region A4. A portion of the package 10 where the second region 22 is provided is defined as a region A5. A portion from the second side 12 of the package 10 to the second region 22 is defined as a region A6.

[0019] On the suspension lead 44, a step portion 44a is formed such that a portion connected to the second region 22 is lower than a portion provided on the outer peripheral portion of the package 10. As a result, the second region 22 is provided at a position lower than a portion of the control terminal 42 provided within the package 10. In the direction from the first side 11 to the second side 12, the step portion 44a and the step portion 41a are formed at the same position. That is, both the step portion 44a and the step portion 41a are formed in the region A2.

[0020] That is, the plurality of power terminals 41 and the plurality of suspension leads 44 provided on the first side 11 side of the package 10 are uniformly bent at the same position in the direction along the third side 13. For this reason, in the cross-sectional view shown in FIG. 2, the plurality of power terminals 41 and the plurality of suspension leads 44 overlap. Further, the first region 21 and the second region 22 will be provided at the same height.

[0021] Next, the effects of the present embodiment will be described. FIG. 3 is a plan view of a semiconductor device 800 according to a first comparative example. In the semiconductor device 800 according to the first comparative example, a suspension lead 844 for fixing the second region 22 to the outer frame of the lead frame is provided on the second side 12 side. Further, no step portion is provided on the control terminal 42 and the suspension lead 844.

[0022] In a semiconductor power module, it is assumed that with the multi-functionality of an IC (Integrated Circuit), the influence of temperature rise by a control chip becomes large. However, in the semiconductor device 800 according to the comparative example, since no step portion is provided on the control terminal 42 and the suspension lead 844, the second region 22 has the same height as the control terminal 42. Therefore, the distance from the control chip 32 to the heat dissipation surface is long, and there is a possibility that it may be difficult to ensure heat dissipation. On the other hand, according to the present embodiment, the second region 22 can be brought closer to the heat dissipation surface by the step portion 44a. Therefore, the heat dissipation performance of the control chip 32 can be improved.

[0023] Furthermore, in this embodiment, a stepped portion 44a is formed on the suspension lead 44 extending from the first side 11. Therefore, it is not necessary to bend the lead on the second side 12 inside the package 10 in order to position the second region 22 below the package 10. Consequently, the space inside the package 10 can be reduced.

[0024] This will be explained using Figures 4 and 5. Figure 4 is a diagram illustrating the method for forming the stepped portion in the second comparative example. The power terminal 41, control terminal 42, suspension lead 844, first region 21, and second region 22 of the comparative example are formed by bending a single lead frame. From top to bottom, Figure 4 shows the state before bending, the state with only the power terminal 41 bent, and the state with the power terminal 41, control terminal 42, and suspension lead 844 bent. Note that the state with only the power terminal 41 bent corresponds to the first comparative example. Let W1 be the distance between the power terminal 41 and the control terminal 42 in the state with only the power terminal 41 bent. By further bending the control terminal 42 and the suspension lead 844, the distance between the power terminal 41 and the control terminal 42 widens to W1 + W2. In other words, bending the suspension lead 844 improves the heat dissipation of the control chip 32, but widens the gap inside the package 10.

[0025] Figure 5 is a diagram illustrating the method for forming the stepped portion according to Embodiment 1. In this embodiment, the power terminal 41, control terminal 42, first region 21, second region 22, and suspension lead 44 are also formed by bending a single lead frame. Note that in Figure 5, the power terminal 41 and the suspension lead 44 overlap. In this embodiment, by bending the suspension lead 44, the control chip 32 can be positioned lower. Therefore, there is no need to bend the control terminal 42, and the distance between the power terminal 41 and the control terminal 42 becomes W1. Consequently, the heat dissipation of the control chip 32 can be improved while suppressing the space required within the package 10.

[0026] Furthermore, since the distance between the power terminal 41 and the control terminal 42 can be reduced, the semiconductor chip 31 and the control chip 32 can be placed closer together. This improves the temperature detection sensitivity, for example, when the control chip 32 has a built-in temperature monitoring function for the semiconductor chip 31.

[0027] Furthermore, the wires connected to the control chip 32 may be blown over and bent due to the resin injection pressure during resin injection. This can cause the wires to come into contact with dissimilar electrodes, leading to defects. In particular, if the distance between the power terminal 41 and the control terminal 42 is wide, the span of the wire 62, which is a direct wire connecting the control chip 32 and the semiconductor chip 31, becomes longer, making it more susceptible to the effects of resin flow. In this embodiment, it is possible to bring the power terminal 41 and the control terminal 42 closer together, and the span of the wire 62 can be shortened. Therefore, it is possible to suppress the wire 62 from coming into contact with dissimilar electrodes and causing a short circuit.

[0028] Furthermore, by using only sealing resin directly beneath the first region 21, noise leakage can be suppressed.

[0029] As a variation of this embodiment, the stepped portion 44a and the stepped portion 41a may be formed at different positions in the direction from the first side 11 to the second side 12. The effects of this embodiment can be obtained if the stepped portion 44a is provided at any position on the suspension lead 44. For example, the stepped portion 44a may be formed at any position on the first side 11 side of the first region 21. Also, the heights of the first region 21 and the second region 22 may be different. Furthermore, the end portion 44b of the suspension lead 44 is not limited to the third side 13 or the fourth side 14, but may also be provided on the first side 11.

[0030] As shown in Figure 2, the diameter of the control wire 63 connecting the control chip 32 and the control terminal 42 may be smaller than the diameter of the power wire 61 connecting the semiconductor chip 31 and the power terminal 41. Generally, high currents do not flow through the metal wire connected to the control chip 32. For this reason, the diameter of the control wire 63 can be made smaller. This makes it possible to reduce the size of the pad connecting the control chip 32 and the control wire 63. Consequently, the control chip 32 can be miniaturized. Note that the diameter of the wire 62 may also be smaller than the diameter of the power wire 61.

[0031] The control chip 32 may be equipped with a bootstrap diode (BSD) or a regulator. In this embodiment, the heat dissipation of the control chip 32 can be improved, allowing a BSD or regulator with high power consumption to be integrated into the control chip 32. This enables miniaturization of the package 10. It also improves the flexibility of the frame layout.

[0032] Furthermore, the suspension lead 44 may be connected to any of the control terminals 42 by a wire 64. The back surface of the control chip 32 is, for example, a GND electrode. In other words, the second region 22 is GND. By connecting the suspension lead 44 to the control terminal 42 with a wire 64, the control terminal 42 can be used as a GND terminal. Alternatively, the suspension lead 44 may be used as a terminal such as a GND terminal.

[0033] In the example shown in Figure 1, the outer peripheral end 44b of the suspension lead 44 is covered with sealing resin. The cut surface of the end 44b of the suspension lead 44, when the lead frame is cut, may be exposed from the sealing resin. When the suspension lead 44 is used as a terminal, it is preferable to allow the end 44b to protrude from the sealing resin.

[0034] The semiconductor chip 31 may be formed from a wide-bandgap semiconductor. Wide-bandgap semiconductors include, for example, silicon carbide, gallium nitride-based materials, or diamond.

[0035] The modifications described above can be appropriately applied to the semiconductor device according to the following embodiments. Since the semiconductor device according to the following embodiments has many similarities with Embodiment 1, the explanation will focus on the differences from Embodiment 1.

[0036] Embodiment 2. Figure 6 is a cross-sectional view of a semiconductor device 200 according to Embodiment 2. This embodiment differs from Embodiment 1 in that insulating layers 51 and 252, which are insulating sheets or insulating substrates, are provided directly beneath the first region 21 and the second region 22. The other configurations are the same as those of Embodiment 1. A conductive layer 226 is provided beneath the insulating layer 252. A DBC (Direct Bonded Copper) structure may be provided beneath the semiconductor chip 31 and the control chip 32. The DBC structure is a structure in which an insulating substrate made of ceramic or the like is provided between copper layers.

[0037] In this embodiment, heat dissipation can be further improved by providing an insulating sheet or insulating substrate with a higher thermal conductivity than the sealing material between the control chip 32 and the heat dissipation surface. Also, by making the first region 21 and the second region 22 the same height, the same type of material can be used for the insulating layers 51 and 252. However, even in this embodiment, the heights of the first region 21 and the second region 22 may be different.

[0038] Embodiment 3. In this embodiment, the dielectric constant of the material directly beneath the control chip 32 is lower than that of the material directly beneath the semiconductor chip 31. The other configurations are the same as those in Embodiment 1 or 2. For example, the dielectric constant of the insulating layer 252 in Embodiment 2 is lower than that of the insulating layer 51.

[0039] As the control chip 32 is positioned closer to the heat dissipation surface, there is a concern that noise generated by the semiconductor chip 31 may leak in from the heat dissipation surface, causing the control chip 32 to malfunction. By ensuring that the dielectric constant of the material directly beneath the control chip 32 is lower than that of the material directly beneath the semiconductor chip 31, noise leakage can be suppressed. In the configuration of Embodiment 1, noise leakage can also be suppressed by using a sealing material with a lower dielectric constant than the insulating layer 51 directly beneath the semiconductor chip 31.

[0040] Embodiment 4. Figure 7 is a plan view of a semiconductor device 300 according to Embodiment 4. In this embodiment, the injection portion 316 for the sealing resin constituting the package 10 is provided in the package 10 at a position closer to the first side 11 than to the second side 12. The injection portion 316 is provided in the package 10 as an injection mark for the sealing material. The injection portion 316 is formed, for example, in region A2.

[0041] If a metal wire thinner than the power wire 61 is used as the control wire 63 or wire 62, the injection pressure when injecting a encapsulant such as resin into the package 10 may cause the wire to flow, potentially causing it to come into contact with an unrelated electrode. In particular, if the control chip 32 is located lower than the control terminal 42, the control wire 63 needs to be launched from the control chip 32 to the control terminal 42, which may increase the likelihood of the control wire 63 flowing. In this embodiment, by injecting the encapsulant on the first side 11, the effect of the injection pressure on the control wire 63 can be mitigated. Therefore, the flow of the wire can be suppressed.

[0042] The technical features described in each embodiment may be used in combination as appropriate.

[0043] The various aspects of this disclosure are summarized below as an appendix. (Note 1) A package having a first side and a second side opposite to the first side, A conductive layer having a first region provided inside the package and a second region provided inside the package between the first region and the second side, A semiconductor chip provided on the first region, A control chip provided on the second region and configured to control the semiconductor chip, A power terminal is provided on the first side of the package and is electrically connected to the semiconductor chip, A control terminal is provided on the second side of the package and is electrically connected to the control chip, A suspension lead extending from a position on the first side of the outer periphery of the package, closer to the first side than the first region, to the second region, Equipped with, The suspension lead has a first stepped portion formed such that the portion connected to the second region is lower than the portion provided on the outer circumference. The semiconductor device is characterized in that the second region is located at a lower position than the portion of the control terminals provided within the package. (Note 2) The semiconductor device according to Appendix 1, characterized in that the first stepped portion is formed on the first side side of the first region. (Note 3) The power terminal has a second stepped portion formed inside the package. The semiconductor device according to Appendix 1 or 2, characterized in that the first step portion and the second step portion are formed at the same position in the direction from the first edge to the second edge. (Note 4) A semiconductor device according to any one of appendices 1 to 3, characterized in that a pair of the suspension leads are provided on both sides of the package. (Note 5) The semiconductor device according to any one of the appendices 1 to 4, characterized in that the first region and the second region are provided at the same height. (Note 6) The package is formed of a sealing resin, An insulating sheet or insulating substrate is provided directly below the first region inside the package. A semiconductor device according to any one of the appendices 1 to 5, characterized in that only the sealing resin is provided directly below the second region inside the package. (Note 7) The semiconductor device according to any one of the appendices 1 to 5, characterized in that an insulating sheet or insulating substrate is provided directly beneath the first region and the second region. (Note 8) The semiconductor device according to any one of the appendices 1 to 7, characterized in that the dielectric constant of the material directly beneath the control chip is lower than the dielectric constant of the material directly beneath the semiconductor chip. (Note 9) The semiconductor device according to any one of the appendices 1 to 8, characterized in that the diameter of the control wire connecting the control chip and the control terminal is smaller than the diameter of the power wire connecting the semiconductor chip and the power terminal. (Note 10) The package is formed of a sealing resin, The semiconductor device according to any one of the appendices 1 to 9, characterized in that the injection portion for the sealing resin is provided in the package at a position closer to the first side than to the second side. (Note 11) The semiconductor device according to any one of appendices 1 to 10, characterized in that the control chip is provided with a bootstrap diode or a regulator. (Note 12) The semiconductor device according to any one of the appendices 1 to 11, characterized in that the semiconductor chip is formed of a wide-bandgap semiconductor. (Note 13) The semiconductor device according to Appendix 12, characterized in that the wide-bandgap semiconductor is silicon carbide, gallium nitride-based material, or diamond. [Explanation of symbols]

[0044] 10 Package, 11 First side, 12 Second side, 13 Third side, 14 Fourth side, 21 First region, 22 Second region, 24 Conductor layer, 31 Semiconductor chip, 32 Control chip, 41 Power terminal, 41a Stepped section, 42 Control terminal, 44 Suspension lead, 44a Stepped section, 44b End, 51 Insulation layer, 61 Power wire, 62 Wire, 63 Control wire, 64 Wire, 100 Semiconductor device, 200 Semiconductor device, 226 Conductor layer, 252 Insulation layer, 300 Semiconductor device, 316 Injection section, 800 Semiconductor device, 844 Suspension lead

Claims

1. A package having a first side and a second side opposite to the first side, A conductive layer having a first region provided inside the package and a second region provided inside the package between the first region and the second side, A semiconductor chip provided on the first region, A control chip provided on the second region and configured to control the semiconductor chip, A power terminal is provided on the first side of the package and is electrically connected to the semiconductor chip, A control terminal is provided on the second side of the package and is electrically connected to the control chip, A suspension lead extending from a position on the first side of the outer periphery of the package, closer to the first side than the first region, to the second region, Equipped with, The suspension lead has a first stepped portion formed such that the portion connected to the second region is lower than the portion provided on the outer circumference. The semiconductor device is characterized in that the second region is located at a lower position than the portion of the control terminals provided within the package.

2. The semiconductor device according to claim 1, characterized in that the first stepped portion is formed on the first side side of the first region.

3. The power terminal has a second stepped portion formed inside the package. The semiconductor device according to claim 1 or 2, characterized in that the first stepped portion and the second stepped portion are formed at the same position in the direction from the first edge to the second edge.

4. The semiconductor device according to claim 1 or 2, characterized in that a pair of suspension leads are provided on both sides of the package.

5. The semiconductor device according to claim 1 or 2, characterized in that the first region and the second region are provided at the same height.

6. The package is formed of a sealing resin, An insulating sheet or insulating substrate is provided directly below the first region inside the package. The semiconductor device according to claim 1 or 2, characterized in that only the sealing resin is provided directly below the second region inside the package.

7. The semiconductor device according to claim 1 or 2, characterized in that an insulating sheet or insulating substrate is provided directly beneath the first region and the second region.

8. The semiconductor device according to claim 1 or 2, characterized in that the dielectric constant of the member directly beneath the control chip is lower than the dielectric constant of the member directly beneath the semiconductor chip.

9. The semiconductor device according to claim 1 or 2, characterized in that the diameter of the control wire connecting the control chip and the control terminal is smaller than the diameter of the power wire connecting the semiconductor chip and the power terminal.

10. The package is formed of a sealing resin, The semiconductor device according to claim 1 or 2, characterized in that the injection portion of the sealing resin is provided in the package at a position closer to the first side than to the second side.

11. The semiconductor device according to claim 1 or 2, characterized in that the control chip is provided with a bootstrap diode or a regulator.

12. The semiconductor device according to claim 1 or 2, characterized in that the semiconductor chip is formed of a wide-bandgap semiconductor.

13. The semiconductor device according to claim 12, characterized in that the wide bandgap semiconductor is silicon carbide, gallium nitride-based material, or diamond.

Images